WO2020052099A1 - 一种显示面板的驱动装置及驱动方法 - Google Patents

一种显示面板的驱动装置及驱动方法 Download PDF

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WO2020052099A1
WO2020052099A1 PCT/CN2018/118444 CN2018118444W WO2020052099A1 WO 2020052099 A1 WO2020052099 A1 WO 2020052099A1 CN 2018118444 W CN2018118444 W CN 2018118444W WO 2020052099 A1 WO2020052099 A1 WO 2020052099A1
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Prior art keywords
resistance
circuit
timing
display panel
control
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PCT/CN2018/118444
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English (en)
French (fr)
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王明良
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惠科股份有限公司
重庆惠科金渝光电科技有限公司
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Priority to US16/313,859 priority Critical patent/US10762863B2/en
Publication of WO2020052099A1 publication Critical patent/WO2020052099A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

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  • the present application relates to the field of display, and in particular, to a driving device and a driving method for a display panel.
  • TFT-LCD Thin film transistor liquid crystal display
  • the driving of the pixel unit in the display panel needs to be achieved by driving the corresponding scanning lines and data lines through the gate driving circuit and the source driving circuit.
  • the gate of the TFT needs to be The pole turn-on voltage (voltage gate high (VGH)) is beveled to reduce the voltage difference between the gate turn-on voltage VGH and the gate turn-off voltage (voltage gllow) (VGL) when the TFT is turned off, and reduce the data signal voltage. influences.
  • VGH voltage gate high
  • VGL gate turn-off voltage
  • the method of resistance ground discharge is used to achieve the purpose of chamfering. One end of the chamfering resistor is connected to the power integrated circuit, and the other end is grounded.
  • the gate turn-on voltage VGH generated by the power integrated circuit forms a chamfer through the chamfering resistor discharge.
  • the chipping waveform formed by the gate turn-on voltage VGH is also the same. Because the chipping waveform will affect the pixel charging time and cause the H-block phenomenon (Horizontal Block), It is necessary to control the chamfered waveform of the gate turn-on voltage VGH to reduce the impact on the pixel charging time and avoid the H-block phenomenon. This requires constant replacement of the chamfered resistor to find the best resistor that has the least impact on the pixel charging time. This method requires multiple repeated operations, which is relatively tedious and has low work efficiency.
  • An object of the present application is to provide a driving device for a display panel, including, but not limited to, a technical problem that, due to a capacitive coupling effect, affects the stability of a data signal voltage when the TFT is closed and closed, and further affects a picture quality.
  • a driving device for a display panel includes:
  • a storage circuit coupled to the control circuit to store and output a plurality of resistance control data
  • a timing circuit coupled to the control circuit
  • a resistance circuit coupled to the control circuit and including a resistance controller; wherein the control circuit reads the plurality of resistance control data in the storage circuit and outputs the resistance control data to the timing circuit and The resistance circuit; the resistance circuit adjusts a resistance value of the resistance according to the resistance control data received.
  • the timing circuit when the resistance circuit adjusts its own resistance according to the received resistance control data, the timing circuit is set to start timing, and sends a signal that the timing ends to the control circuit.
  • the resistance control data includes resistance value data and timing data.
  • the timing circuit is configured to receive the timing data and time it, and at the same time output a feedback signal to the control circuit.
  • the resistance controller is coupled to a plurality of switches, and each of the switches is correspondingly coupled to a resistor.
  • At least one of the switches is closed, and at least one of the resistors in the resistor circuit is turned on.
  • one of the switches is closed to turn on the resistor in the resistor circuit.
  • the resistance controller closes the corresponding switch according to the resistance value data.
  • the resistance controller and the switch are in an off state.
  • the resistance controller is respectively coupled to the corresponding resistance through a coupling element.
  • the coupling element further includes a protection element.
  • the protection element is any one of a fuse, a fusing resistor, a temperature-controlled semiconductor element, and a thermal-sensitive semiconductor element.
  • the timing circuit is configured to restart the timing at the same time when the resistance control data read by the control circuit changes.
  • the driving device of the display panel in this embodiment includes:
  • a storage circuit coupled to the control circuit to store and output a plurality of resistance control data
  • a timing circuit coupled to the control circuit
  • a resistance circuit coupled to the control circuit and including a resistance controller
  • the control circuit reads the plurality of resistance control data in the storage circuit, and outputs the resistance control data to the timing circuit and the resistance circuit; the resistance circuit receives the resistance control data and Adjust the resistance value of its own resistance;
  • the control circuit controls the resistance circuit to close one or more of the plurality of switches, and turns on at least one resistance in the resistance circuit, so that the resistance circuit has corresponding different resistance values;
  • the timing circuit re-times at the same time.
  • Another object of the present application is to provide a method for driving a display panel, including:
  • the control circuit reads the resistance control data in the storage circuit, and outputs the resistance control data to the timing circuit and the resistance circuit;
  • the resistance circuit adjusts its own resistance value according to the received resistance control data; wherein the resistance controller is coupled to a plurality of switches, and each of the switches is correspondingly coupled to each of the resistors; the control circuit controls The resistance circuit closes one or more of the plurality of switches, and turns on all or part of the resistance in the resistance circuit, so that the resistance circuit has corresponding different resistance values.
  • the driving method further includes:
  • the timing circuit restarts timing at the same time.
  • the driving method further includes:
  • the timing circuit When the resistance circuit adjusts its own resistance according to the received resistance control data, the timing circuit is set to start timing, and sends a signal that the timing ends to the control circuit.
  • the resistance control data includes resistance value data and timing data
  • the timing circuit is configured to receive the timing data and time, and output a feedback signal to the control circuit at the same time.
  • the driving method further includes:
  • the resistance controller and the switch are set to an off state.
  • the driving method further includes:
  • the resistance controller is respectively coupled to the corresponding resistance through a coupling element.
  • the driving device and driving method of the display panel provided by the embodiments of the present application can improve the angle cutting mode by designing the angle cutting circuit, realize the output of multiple different angle cutting waveforms by the same circuit, and save the angle cutting resistance. Welding resistors are needed to adjust the waveform to improve display efficiency and save panel costs.
  • FIG. 1 is a schematic diagram of a chamfered structure provided by an embodiment of the present application.
  • FIG. 2 is a schematic diagram of a chamfered waveform provided by an embodiment of the present application.
  • FIG. 3 is a schematic diagram of another chamfering structure provided by an embodiment of the present application.
  • FIG. 4 is a schematic diagram of another chamfered waveform provided by an embodiment of the present application.
  • FIG. 5 is a schematic diagram of another chamfering structure provided by an embodiment of the present application.
  • FIG. 1 is a schematic diagram of a chamfered structure provided by an embodiment of the present application.
  • FIG. 2 is a schematic diagram of a chamfered waveform provided by an embodiment of the present application.
  • an exemplary chamfering structure 100 includes:
  • An integrated control chip 110 (Integrated Circuit, IC), and a chipping resistor 120.
  • One end of the chamfering resistor 120 is coupled to the integrated control chip 110, and the other end is grounded to GND.
  • a gate turn-on voltage VGH is generated by the integrated control chip 110, and after the gate turn-on voltage passes through the chamfer resistor 120, a chamfer ⁇ V is formed (as shown in FIG. 2).
  • the chipping waveform formed by the gate turn-on voltage VGH is also the same. Because the chipping waveform will affect the pixel charging time, causing H-block phenomenon (Horizontal Block). . Therefore, it is necessary to control the chamfered waveform of the gate turn-on voltage VGH to reduce the effect on the pixel charging time and avoid the H-block phenomenon.
  • FIG. 3 is a schematic diagram of another chamfering structure provided by an embodiment of the present application.
  • FIG. 4 is a schematic diagram of another chamfered waveform provided by an embodiment of the present application.
  • a driving device 200 for a display panel includes:
  • Control circuit 210
  • the storage circuit 220 is coupled to the control circuit 210 and stores and outputs multiple resistance control data
  • a timing circuit 230 coupled to the control circuit 210, timing and outputting a feedback signal
  • the resistance circuit 240 is coupled to the control circuit 210.
  • the control circuit 210 reads the resistance control data in the storage circuit 220 and outputs the resistance control data to the timing circuit 230 and the The resistance circuit 240 adjusts its resistance according to the resistance control data received.
  • the timing circuit 230 when the resistance circuit 240 adjusts its own resistance according to the received resistance control data, the timing circuit 230 is set to start timing, and sends a signal that the timing ends to the control circuit 210.
  • the resistance control data includes resistance value data and timing data.
  • the timing circuit 230 is configured to receive and control the resistance control data, and output a feedback signal to the control circuit 210 at the same time.
  • the resistor controller 241 is coupled to each of the resistors 242 through a plurality of switches 243.
  • At least one of the switches 243 is closed, and at least one of the resistors 242 in the resistor circuit 240 is turned on.
  • one switch 243 is closed to turn on the resistor 242 in the resistor circuit 240.
  • the resistance value of the resistance circuit 240 is different. Circuit In one embodiment, before the display panel is activated, the switches 243 connecting the digital resistance controller 241 and the resistor 242 are in an off state.
  • the control circuit 210 when the display panel is activated, the control circuit 210 reads the resistance control data stored in the storage circuit 220, obtains the required timing data and resistance value data corresponding to the timing data, and outputs them to the timing circuit 230 and Resistance controller 241.
  • the resistance controller 241 closes the corresponding switch 243 according to the received resistance value data, so that the overall resistance value of the resistance circuit 240 is equal to the resistance value data output by the control circuit 210.
  • the resistance control data read by the control circuit 210 when the resistance control data read by the control circuit 210 is changed, the resistance control data is output to the timing circuit 230 and the resistance circuit 240 respectively, the timing circuit 230 re-times, and the resistance circuit 240 changes itself resistance.
  • the driving device 200 causes the output voltage (gate-on voltage) waveform to have a chamfer, as shown in FIG. 4.
  • the adjustment range of the output voltage waveform may be, for example, a range between two dashed lines in FIG. 4, where the waveform 310 is an exemplary output voltage waveform and is within the adjustment range.
  • the adjustment range of the output voltage waveform in Fig. 4 is only an example, and the size or area of the adjustment range is not limited by this. The range is determined by the design of the designer.
  • FIG. 5 is a schematic diagram of another chamfering structure provided by an embodiment of the present application.
  • a driving device 300 for a display panel includes:
  • Control circuit 210
  • the storage circuit 220 stores a plurality of resistance control data and is coupled to the control circuit 210;
  • the timing circuit 230 is coupled to the control circuit 210;
  • the resistance circuit 240 is coupled to the control circuit 210 and includes a resistance controller 241.
  • the control circuit 210 reads resistance control data of the storage circuit 220, including resistance value data and timing data, and outputs the resistance data to the resistors.
  • the resistance circuit 240 changes its resistance value, the timing circuit 230 starts timing and sends a feedback signal to the control circuit 210; when the control circuit 210 receives the feedback signal indicating the end of the current timing, it reads the next set of resistances The control data is output to the resistance circuit 240 and the timing circuit 230; the resistance circuit 240 changes its resistance value, and the timing circuit 230 restarts timing.
  • the resistance control data includes resistance value data and timing data.
  • the timing circuit receives the resistance control data and performs timing, and at the same time outputs a feedback signal to the control circuit.
  • both ends of the resistance circuit 242 are grounded (ground is not shown) before the display panel is started, and the switches in the switch circuit 243 are turned off.
  • the control circuit 210 outputs resistance.
  • Control data to the resistance controller 241 the resistance controller 241 outputs a command to close the coupling element 2531, and the remaining coupling elements are still in an open state.
  • the resistance is divided into a first part resistance and a second part resistance;
  • the equivalent resistance value of the 2521 is R1
  • the equivalent resistance value of the second part of the resistor 2522 is R2.
  • the equivalent resistance value of the resistance circuit 252 is R1 * R2 / (R1 + R2).
  • the resistor controller 241 is coupled to each of the resistors 252 through a plurality of coupling elements 253.
  • the resistance controller 241 by closing the coupling element of one of the plurality of coupling elements, the resistance controller 241 communicates with the resistance 252 and the resistance circuit 240 has a corresponding different resistance value.
  • control circuit 210 controls to close the corresponding coupling element 253, and adjusts the resistance value of the resistance 252 to be the same as or similar to the resistance value data.
  • the coupling element 253 may include a protection element.
  • the protection element may be any one of a fuse, a fusing resistor, a temperature-control semiconductor element, and a temperature-sensitive semiconductor element. stability.
  • the timing circuit 230 is configured to restart timing when the resistance control data read by the control circuit changes.
  • the storage circuit 220 may be an internal storage unit of the display device, such as a hard disk or a memory of the display device.
  • the storage circuit 220 may also be an external storage device of the display device, for example, a plug-in hard disk, a Smart Media Card (SMC), and a Secure Digital (SD) card provided on the display device. , Flash card (Flash card) and so on.
  • the storage circuit 220 may further include both an internal storage unit and an external storage device of the display device.
  • the storage circuit 220 is configured to store the computer program and other programs and data required by the display device.
  • the storage circuit 220 may be further configured to temporarily store data that has been output or is to be output.
  • control circuit 210 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), and application-specific integrated circuits (Application Specific Integrated Circuit (ASIC), off-the-shelf programmable gate array (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.
  • CPU central processing unit
  • DSP digital signal processor
  • ASIC Application Specific Integrated Circuit
  • FPGA Field-Programmable Gate Array
  • a general-purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
  • this embodiment provides a method for driving a display panel, including:
  • timing circuit 230 coupled to the control circuit 210
  • the control circuit 210 reads the resistance control data in the storage circuit 220, the control circuit 210 reads the resistance control data in the storage circuit 220, and outputs the resistance control data to the timing Circuit 230 and the resistance circuit 240;
  • the resistance circuit 240 adjusts its own resistance value according to the received resistance control data; wherein the resistance controller is coupled to a plurality of switches, and each of the switches is correspondingly coupled to each of the resistors; the control circuit controls The resistance circuit closes one or more of the plurality of switches, and turns on all or part of the resistance 252 in the resistance circuit, so that the resistance circuit has corresponding different resistance values.
  • the control circuit 210 controls the switch 243 to be closed, and adjusts the resistance value of the resistor 252 to be the same as or similar to the resistance value data.
  • control circuit 210 controls to close the corresponding coupling element 253, and adjusts the resistance value of the resistance 252 to be the same as or similar to the resistance value data.
  • the control circuit 210 controls the resistance controller 241 to close one or more of the switches 243, or close one or more of the coupling elements 253. Switches.
  • the driving method further includes:
  • the timing circuit When the resistance circuit adjusts its own resistance according to the received resistance control data, the timing circuit is set to start timing, and sends a signal that the timing ends to the control circuit.
  • the resistance control data includes resistance value data and timing data
  • the timing circuit is configured to receive the timing data and time, and output a feedback signal to the control circuit at the same time.
  • the driving method further includes:
  • the resistance controller and the switch are set to an off state.
  • the driving method further includes:
  • the resistance controller is respectively coupled to the corresponding resistance through a coupling element.
  • the display panel of the present application may be, for example, a liquid crystal display panel, but it is not limited thereto, and it may also be an OLED display panel, a W-OLED display panel, a QLED display panel, a plasma display panel, or a curved display panel. Or other types of display panels.
  • the design of the chamfering circuit can improve the chamfering method, realize the output of a variety of different chamfering waveforms by the same circuit, save the chamfering resistance, and do not need to adjust the waveform through the welding resistor to improve the display efficiency, and Save on panel costs.

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Abstract

一种显示面板的驱动装置（200, 300），包括：控制电路（210）、存储电路（220）、计时电路（230）以及电阻电路（240），其中，控制电路（210）读取存储电路（220）中的电阻控制数据，并将电阻控制数据输出至计时电路（230）和电阻电路（240），电阻电路（240）根据接收的电阻控制数据调整自身电阻（242, 252）。

Description

一种显示面板的驱动装置及驱动方法
本申请要求于2018年09月11日提交中国专利局，申请号为201811056953.4，发明名称为“一种显示面板的驱动装置及驱动方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示领域，特别涉及一种显示面板的驱动装置及驱动方法。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然的构成现有技术。薄膜晶体管液晶显示(thin film transistor-liquid crystal display，TFT-LCD)具有低成本、低功耗和高性能的优点，在电子、数码产品等领域有着广泛的运用。而显示面板中像素单元的驱动，则需通过栅极驱动电路和源极驱动电路驱动相应的扫描线和数据线加以实现。随着面板尺寸，解析度，及大视角影像品质的需求提高，并进一步提高用户体验及节约成本，各产商开发了很多有关显示领域的制造技术。
在显示面板中，由于电容耦合效应的影响，在TFT(Thin Film Transistor，薄膜晶体管)闭合与关闭时，会影响到数据(Data)信号电压的稳定，进而影响画面品质，因此需要对TFT的栅极开启电压(voltage gate high,VGH)进行削角处理，以降低TFT关闭时栅极开启电压VGH与栅极关闭电压(voltage gate low,VGL)之间的电压差，减小对数据信号电压的影响。例如采用电阻接地放电的方法来达到削角的目的，削角电阻的一端与电源集成电路相连，另一端接地；所述电源集成电路产生的栅极开启电压VGH经由削角电阻放电形成削角。对于阻值相同的削角电阻，所述栅极开启电压VGH形成的削角波形也相同，由于削角波形会影响像素充电时间，造成H-block现象(Horizontal Block，水平区块不良)，因此需要控制对栅极开启电压VGH的削角波形，以降低对像素充电时间的影响，避免H-block现象，这就需要不断更换削角电阻来找到对像素充电时间影响最小的最佳电阻，这种方法需多次重复操作，相对繁琐，工作效率低。
申请内容
本申请一目的在于提供一种显示面板的驱动装置，包括但不限于解决由于电容耦合效应的影响，在TFT闭合与关闭时，会影响到数据信号电压的稳定，进而影响画面品质的技术问题。
为了解决上述技术问题，本申请实施例采用的技术方案是：
一种显示面板的驱动装置，包括：
控制电路；
存储电路，耦接所述控制电路，存储并输出多个电阻控制数据；
计时电路，耦接所述控制电路；
电阻电路，耦接所述控制电路，包含一电阻控制器；其中，所述控制电路读取所述存储电路中的所述多个电阻控制数据，并将电阻控制数据输出至所述计时电路和所述电阻电路；所述电阻电路根据接收的所述电阻控制数据调整自身电阻阻值。
在一个实施例中，所述电阻电路根据接收的所述电阻控制数据调整自身电阻时，所述计时电路设置为开始计时，并将所述计时结束的信号发送至所述控制电路。
在一个实施例中，所述电阻控制数据包括电阻值数据和计时数据。
在一个实施例中，所述计时电路设置为接收所述计时数据并计时，同时输出反馈信号至控制电路。
在一个实施例中，所述电阻控制器耦接多个开关，每一所述开关对应耦接一个电阻。
在一个实施例中，闭合至少一个所述开关，导通所述电阻电路中的至少一个所述电阻。
在一个实施例中，闭合一个所述开关，导通所述电阻电路中的所述电阻。
在一个实施例中，所述电阻控制器根据所述电阻值数据，闭合对应的所述开关。
在一个实施例中，所述显示面板启动前，所述电阻控制器与所述开关处于断开状态。
在一个实施例中，所述电阻控制器通过耦接元件分别耦接对应的所述电阻。
在一个实施例中，所述耦接元件还包括保护元件。
在一个实施例中，所述保护元件为保险丝、熔断电阻、温控半导体元件以及热敏半导体元件中的任意一项。
在一个实施例中，所述计时电路设置为，当所述控制电路读取的电阻控制数据改变时，所述计时电路同时重新计时。
在一个实施例中，本实施例中的显示面板的驱动装置，包括：
控制电路；
存储电路，耦接所述控制电路，存储并输出多个电阻控制数据；
计时电路，耦接所述控制电路；
电阻电路，耦接所述控制电路，包含一电阻控制器；
多个开关，使得所述电阻控制器分别耦接每一所述电阻；
其中，所述控制电路读取所述存储电路中的所述多个电阻控制数据，并将电阻控制数据输出至所述计时电路和所述电阻电路；所述电阻电路接收所述电阻控制数据并调整自身电阻阻值；
所述控制电路控制所述电阻电路闭合所述多个开关中的一个或多个开关，导通电阻电路中的至少一个电阻，使所述电阻电路具有对应的不同电阻值；
当所述控制电路读取的电阻控制数据改变时，所述计时电路同时重新计时。
本申请的另一目的在于提供一种显示面板的驱动方法，包括：
设置一控制电路；
设置一存储电路，耦接所述控制电路，存储并输出多个电阻控制数据；
设置一计时电路，耦接所述控制电路；设置一电阻电路，耦接所述控制电路，包含一电阻控制器；
所述控制电路读取所述存储电路中的所述电阻控制数据，并将电阻控制数据输出至所述计时电路和所述电阻电路；
所述电阻电路根据接收的所述电阻控制数据调整自身电阻值；其中，所述电阻控制器耦接多个开关，每一所述开关对应耦接每一所述电阻；所述控制电路控制所述电阻电路闭合所述多个开关中的一个或多个开关，导通电阻电路中的全部或部分电阻，使所述电阻电路具有对应的不同电阻值。
在一个实施例中，所述驱动方法还包括：
所述控制电路读取的电阻控制数据改变时，所述计时电路同时重新计时。
在一个实施例中，所述驱动方法还包括：
所述电阻电路根据接收的所述电阻控制数据调整自身电阻时，所述计时电路设置为开始计时，并将所述计时结束的信号发送至所述控制电路。
在一个实施例中，所述电阻控制数据包括电阻值数据和计时数据；
将所述计时电路设置为接收所述计时数据并计时，同时输出反馈信号至控制电路。
在一个实施例中，所述驱动方法还包括：
在所述显示面板启动前，将所述电阻控制器与所述开关设置为断开状态。
在一个实施例中，所述驱动方法还包括：
将所述电阻控制器通过耦接元件分别耦接对应的所述电阻。
本申请实施例提供的一种显示面板的驱动装置及驱动方法，通过对削角电路的设计，可以改善削角方式，实现由同一电路输出多种不同的削角波形，节约削角电阻，不需要通过焊接电阻来调整波形，以此提高显示效率，并节约面板成本。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本申请的一些实施例，对于本领域 普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的一种削角结构示意图；
图2为本申请实施例提供的一种削角波形示意图；
图3为本申请实施例提供的另一种削角结构示意图；
图4为本申请实施例提供的另一种削角波形示意图；
图5为本申请实施例提供的另一种削角结构示意图。
本申请的实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不设置为限定本申请。
需说明的是，当部件被称为“固定于”或“设置于”另一个部件，它可以直接在另一个部件上或者间接在该另一个部件上。当一个部件被称为是“连接于”另一个部件，它可以是直接或者间接连接至该另一个部件上。术语“上”、“下”、“左”、“右”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本专利的限制，对于本领域的普通技术人员而言，可以根据具体情况理解上述术语的具体含义。术语“第一”、“第二”仅设置为便于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明技术特征的数量。“多个”的含义是两个或两个以上，除非另有明确具体的限定。
图1为本申请实施例提供的一种削角结构示意图。
图2为本申请实施例提供的一种削角波形示意图。
同时参考图1和图2，一种范例性的削角结构100，包括：
集成控制芯片110(Integrated Circuit，IC)，及削角电阻120。
所述削角电阻120一端耦接所述集成控制芯片110，另一端接地GND。通过所述集成控制芯片110产生栅极开启电压VGH，在所述栅极开启电压经过所述削角电阻120之后，形成削角△V(其如图2所示)。其中，对于阻值相同的削角电阻，所述栅极开启电压VGH形成的削角波形也相同，由于削角波形会影响像素充电时间，造成H-block现象(Horizontal Block，水平区块不良)。因此，需要控制对栅极开启电压VGH的削角波形，以降低对像素充电时间的影响，避免H-block现象。
图3为本申请实施例提供的另一种削角结构示意图。
图4为本申请实施例提供的另一种削角波形示意图。
同时参考图3和图4，在一个实施例中，一种显示面板的驱动装置200，包括：
控制电路210；
存储电路220，耦接所述控制电路210，存储并输出多个电阻控制数据；
计时电路230，耦接所述控制电路210，计时并输出反馈信号；
电阻电路240，耦接所述控制电路210；其中，所述控制电路210读取所述存储电路220中的所述电阻控制数据，并将所述电阻控制数据输出至所述计时电路230和所述电阻电路240；所述电阻电路240根据接收的所述电阻控制数据调整自身电阻。
在一个实施例中，所述电阻电路240根据接收的所述电阻控制数据调整自身电阻时，所述计时电路230设置为开始计时，并将所述计时结束的信号发送至所述控制电路210。在一个实施例中，所述电阻控制数据包括电阻值数据及计时数据。
在一个实施例中，所述计时电路230设置为接收所述电阻控制数据并计时，同时输出反馈信号至控制电路210。
在一个实施例中，通过多个开关243，使得所述电阻控制器241分别耦接每一所述电阻242。
在一个实施例中，闭合至少一个所述开关243，导通所述电阻电路240中的至少一个所述电阻242。
在一个实施例中，闭合一个所述开关243，导通所述电阻电路240中的所述电阻242。
在一个实施例中，闭合不同的所述开关243，所述电阻电路240的电阻值不同。电路在一个实施例中，显示面板启动前，连接数字电阻控制器241与电阻242的开关243均处于断开状态。
在一个实施例中，显示面板启动时，控制电路210读取存储电路220中存储的电阻控制数据，得到所需的计时数据与该计时数据对应的电阻值数据，并分别输出至计时电路230与电阻控制器241。
在一个实施例中，电阻控制器241根据所接收到的电阻值数据，闭合对应的开关243，使得电阻电路240的总体电阻值等于控制电路210输出的电阻值数据。
在一个实施例中，当所述控制电路210读取的电阻控制数据改变时，分别将所述电阻控制数据输出至计时电路230和电阻电路240，计时电路230重新计时，同时电阻电路240改变自身电阻值。
同时参考图3和图4，在一个实施例中，通过所述驱动装置200，使得所述输出电压(栅极开启电压)波形具有削角，其如图4所示。输出电压波形的调整范围，可例如为图4中两虚线之间的范围，其中，波形310为例示的输出电压波形，其位于调整范围之内。图4输出电压波形的调整范围，仅为例示，并非以此限制调整范围的大小或区域，其范围由设 计人员的设计而定。
图5为本申请实施例提供的另一种削角结构示意图。
同时参考图5和图4，在一个实施例中，一种显示面板的驱动装置300，包括：
控制电路210；
存储电路220，存储多个电阻控制数据，并耦接所述控制电路210；
计时电路230，耦接所述控制电路210；
电阻电路240，耦接所述控制电路210，包含一电阻控制器241；其中，所述控制电路210读取所述存储电路220的电阻控制数据，包括电阻值数据和计时数据，分别输出至电阻电路240和计时电路230；
在一个实施例中，电阻电路240改变自身电阻值，计时电路230开始计时并发送反馈信号至控制电路210；当控制电路210接收到表示本次计时结束的反馈信号后，读取下一组电阻控制数据并输出至电阻电路240和计时电路230；电阻电路240改变自身电阻值，计时电路230重新开始计时。
在一个实施例中，所述电阻控制数据包括电阻值数据和计时数据。
在一个实施例中，计时电路接收所述电阻控制数据并计时，同时输出反馈信号至控制电路。
在一个实施例中，参考图5，显示面板启动前电阻电路242两端接地(接地未示)，开关电路243中的开关均断开；显示面板启动时，参考图5，控制电路210输出电阻控制数据至电阻控制器241，电阻控制器241输出指令闭合耦接元件2531，其余耦接元件仍处于断开状态，此时，电阻被分为第一部分电阻与第二部分电阻；其中第一部分电阻2521的等效阻值为R1，第二部分电阻2522的等效阻值为R2，此时电阻电路252的等效阻值为R1*R2/(R1+R2)。
在一个实施例中，通过多个耦接元件253，使得所述电阻控制器241分别耦接每一所述电阻252。
在一个实施例中，通过闭合所述多个耦接元件中之一的耦接元件，使得所述电阻控制器241连通电阻252，并使所述电阻电路240具有对应的不同电阻值。
在一个实施例中，通过读取的电阻值数据，所述控制电路210控制对应所述耦接元件253闭合，并调整其电阻252的电阻值与所述电阻值数据相同或相近。
在一个实施例中，所述耦接元件253可以包括保护元件，该保护元件可以为保险丝、熔断电阻、温控半导体元件以及热敏半导体元件中的任意一项，通过设立保护元件可以提高装置的稳定性。
在一个实施例中，所述计时电路230设置为，当所述控制电路读取的电阻控制数据改 变时，所述计时电路同时重新计时。
在一个实施例中，所述存储电路220可以是所述显示装置的内部存储单元，例如显示装置的硬盘或内存。所述存储电路220也可以是所述显示装置的外部存储设备，例如所述显示装置上配备的插接式硬盘，智能存储卡(Smart Media Card，SMC)，安全数字(Secure Digital，SD)卡，闪存卡(Flash Card)等。
在一个实施例中，存储电路220还可以既包括所述显示装置的内部存储单元也包括外部存储设备。
在一个实施例中，存储电路220设置为存储所述计算机程序以及所述显示装置所需的其他程序和数据。
在一个实施例中，所述存储电路220还可以设置为暂时地存储已经输出或者将要输出的数据。
在一个实施例中，所称控制电路210可以是中央处理单元(Central Processing Unit，CPU)，还可以是其他通用处理器、数字信号处理器(Digital Signal Processor，DSP)、专用集成电路(Application Specific Integrated Circuit，ASIC)、现成可编程门阵列(Field-Programmable Gate Array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件等。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。
参考图3至图5，在一个实施例中，本实施例提供了一种显示面板的驱动方法，包括：
设置一控制电路210；
设置一存储电路220，耦接所述控制电路210，存储并输出多个电阻控制数据；
设置一计时电路230，耦接所述控制电路210；
设置一电阻电路240，耦接所述控制电路210，包含一电阻控制器241；
所述控制电路210读取所述存储电路220中的所述电阻控制数据，所述控制电路210读取所述存储电路220中的所述电阻控制数据，并将电阻控制数据输出至所述计时电路230和所述电阻电路240；
所述电阻电路240根据接收的所述电阻控制数据调整自身电阻值；其中，所述电阻控制器耦接多个开关，每一所述开关对应耦接每一所述电阻；所述控制电路控制所述电阻电路闭合所述多个开关中的一个或多个开关，导通电阻电路中的全部或部分电阻252，使所述电阻电路具有对应的不同电阻值。
在一个实施例中，通过读取的电阻值数据，所述控制电路210控制对应所述开关243闭合，并调整其电阻252的电阻值与所述电阻值数据相同或相近。
在一个实施例中，通过读取的电阻值数据，所述控制电路210控制对应所述耦接元件 253闭合，并调整其电阻252的电阻值与所述电阻值数据相同或相近。
在一个实施例中，依据所述电阻值数据，所述控制电路210控制所述电阻控制器241闭合所述开关243中一个或多个开关，或闭合所述耦接元件253中的一个或多个开关。
在一个实施例中，所述驱动方法还包括：
所述电阻电路根据接收的所述电阻控制数据调整自身电阻时，所述计时电路设置为开始计时，并将所述计时结束的信号发送至所述控制电路。
在一个实施例中，所述电阻控制数据包括电阻值数据和计时数据；
将所述计时电路设置为接收所述计时数据并计时，同时输出反馈信号至控制电路。
在一个实施例中，所述驱动方法还包括：
在所述显示面板启动前，将所述电阻控制器与所述开关设置为断开状态。
在一个实施例中，所述驱动方法还包括：
将所述电阻控制器通过耦接元件分别耦接对应的所述电阻。
在一个实施例中，本申请的显示面板可例如为液晶显示面板，然不限于此，其亦可为OLED显示面板，W-OLED显示面板，QLED显示面板，等离子体显示面板，曲面型显示面板或其他类型显示面板。
本申请通过对削角电路的设计，可以改善削角方式，实现由同一电路输出多种不同的削角波形，节约削角电阻，不需要通过焊接电阻来调整波形，以此提高显示效率，并节约面板成本。
以上所述仅为本申请的可选实施例而已，并不用以限制本申请，凡在本申请的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本申请的保护范围之内。

Claims (20)

  1. 一种显示面板的驱动装置，包括：
    控制电路；
    存储电路，耦接所述控制电路，存储并输出多个电阻控制数据；
    计时电路，耦接所述控制电路；
    电阻电路，耦接所述控制电路，包含一电阻控制器；
    其中，所述控制电路读取所述存储电路中的所述电阻控制数据，并将所述电阻控制数据输出至所述计时电路和所述电阻电路，所述电阻电路根据接收的所述电阻控制数据调整自身电阻。
  2. 如权利要求1所述的显示面板的驱动装置，所述电阻电路根据接收的所述电阻控制数据调整自身电阻时，所述计时电路设置为开始计时，并将计时结束的信号发送至所述控制电路。
  3. 如权利要求1所述的显示面板的驱动装置，其中，所述电阻控制数据包括电阻值数据和计时数据。
  4. 如权利要求3所述的显示面板的驱动装置，其中，所述计时电路设置为接收所述计时数据并计时，同时输出反馈信号至控制电路。
  5. 如权利要求3所述的显示面板的驱动装置，其中，所述电阻控制器耦接多个开关，每一所述开关对应耦接一个电阻。
  6. 如权利要求5所述的显示面板的驱动装置，其中，闭合至少一个所述开关，导通所述电阻电路中的至少一个所述电阻。
  7. 如权利要求5所述的显示面板的驱动装置，其中，闭合一个所述开关，导通所述电阻电路中的所述电阻。
  8. 如权利要求5所述的显示面板的驱动装置，其中，所述电阻控制器根据所述电阻值数据，闭合对应的所述开关。
  9. 如权利要求5所述的显示面板的驱动装置，其中，所述显示面板启动前，所述电阻控制器与所述开关处于断开状态。
  10. 如权利要求5所述的显示面板的驱动装置，其中，所述电阻控制器通过耦接元件分别耦接对应的所述电阻。
  11. 如权利要求10所述的显示面板的驱动装置，其中，所述耦接元件还包括保护元件。
  12. 如权利要求11所述的显示面板的驱动装置，其中，所述保护元件为保险丝、熔断电阻、温控半导体元件以及热敏半导体元件中的任意一项。
  13. 如权利要求1所述的显示面板的驱动装置，其中，所述计时电路设置为，当所述控制电路读取的电阻控制数据改变时，所述计时电路同时重新计时。
  14. 一种显示面板的驱动装置，包括：
    控制电路；
    存储电路，耦接所述控制电路，存储并输出多个电阻控制数据；
    计时电路，耦接所述控制电路；
    电阻电路，耦接所述控制电路，包含一电阻控制器；
    多个开关，使得所述电阻控制器分别耦接每一所述电阻；
    其中，所述控制电路读取所述存储电路中的所述多个电阻控制数据，并将电阻控制数据输出至所述计时电路和所述电阻电路；所述电阻电路接收所述电阻控制数据并调整自身电阻阻值；
    所述控制电路控制所述电阻电路闭合所述多个开关中的一个或多个开关，导通电阻电路中的至少一个电阻，使所述电阻电路具有对应的不同电阻值；
    当所述控制电路读取的电阻控制数据改变时，所述计时电路同时重新计时。
  15. 一种显示面板的驱动方法，包括：
    设置一控制电路；
    设置一存储电路，耦接所述控制电路，存储并输出多个电阻控制数据；
    设置一计时电路，耦接所述控制电路；
    设置一电阻电路，耦接所述控制电路，包含一电阻控制器；
    所述控制电路读取所述存储电路中的所述电阻控制数据，并将电阻控制数据输出至所述计时电路和所述电阻电路；所述电阻电路根据接收的所述电阻控制数据调整自身电阻值；
    其中，所述电阻控制器耦接多个开关，每一所述开关对应耦接每一所述电阻；所述控制电路控制所述电阻电路闭合所述多个开关中的一个或多个开关，导通电阻电路中的电阻，使所述电阻电路具有对应的电阻值。
  16. 如权利要求15所述的显示面板的驱动方法，其中，所述驱动方法还包括：
    所述控制电路读取的电阻控制数据改变时，所述计时电路同时重新计时。
  17. 如权利要求15所述的显示面板的驱动方法，其中，所述驱动方法还包括：
    所述电阻电路根据接收的所述电阻控制数据调整自身电阻时，所述计时电路设置为开始计时，并将计时结束的信号发送至所述控制电路。
  18. 如权利要求15所述的显示面板的驱动方法，其中，所述电阻控制数据包括电阻值数据和计时数据；
    将所述计时电路设置为接收所述计时数据并计时，同时输出反馈信号至控制电路。
  19. 如权利要求15所述的显示面板的驱动方法，其中，所述驱动方法还包括：在所述显示面板启动前，将所述电阻控制器与所述开关设置为断开状态。
  20. 如权利要求15所述的显示面板的驱动方法，其中，所述驱动方法还包括：将所述电阻控制器通过耦接元件分别耦接对应的所述电阻。
PCT/CN2018/118444 2018-09-11 2018-11-30 一种显示面板的驱动装置及驱动方法 WO2020052099A1 (zh)

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CN102693796A (zh) * 2012-05-28 2012-09-26 上海丽恒光微电子科技有限公司 数字可调电阻及其调节方法
CN102956216A (zh) * 2012-11-23 2013-03-06 深圳市华星光电技术有限公司 液晶面板驱动系统中的切角电路及均齐度调整系统、方法
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