WO2020041975A1

WO2020041975A1 - Display panel and display device

Info

Publication number: WO2020041975A1
Application number: PCT/CN2018/102737
Authority: WO
Inventors: 贾琼; 秦杰辉; 陈超
Original assignee: 深圳市柔宇科技有限公司
Priority date: 2018-08-28
Filing date: 2018-08-28
Publication date: 2020-03-05
Also published as: CN112640104A

Abstract

A display panel (100), comprising: a display area (A); a non-display area (B) located around the display area (A); a driving chip (10), disposed in the non-display area (B) to drive the display area (A) for display; and at least one discrete device (20), disposed in the non-display area (B) for cooperation with the driving chip (10). Also disclosed is a display device (200). The present invention can reduce the costs, and the size of the display device (200).

Description

Display panel and display device

Technical field

The present application relates to the field of display technology, and in particular, to a display panel and a display device.

Background technique

Existing display devices usually include a display panel and a flexible printed circuit (FPC) connected to the display panel. Wherein, at least one discrete device (for example, a resistor, a capacitor, a diode, or a transistor) is usually provided on the flexible circuit board to cooperate with a driving circuit on the display panel to drive the display panel to display. However, due to the existence of the flexible circuit board and the need for additional discrete devices, the display device is large in size and high in cost.

Summary of the Invention

The embodiments of the present application disclose a display panel and a display device, which can reduce the size and cost of the display device.

An embodiment of the present application discloses a display panel, including:

Display area;

A non-display area located around the display area;

A driving chip is provided in the non-display area for driving the display area for display; at least one discrete device is provided in the non-display area for use in conjunction with the driving chip.

The present application also discloses a display device including the above display panel.

The display panel and the display device disclosed in the present application include at least one discrete device provided on the flexible circuit board on the display panel through a TFT (Thin Film Transistor, thin film transistor) process, so that the flexible circuit board can be omitted without the need for additional Purchasing separate discrete devices reduces the cost of production while reducing the size of the display device.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to explain the technical solutions in the embodiments of the present application more clearly, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. Those of ordinary skill in the art can obtain other drawings according to the drawings without paying creative labor.

FIG. 1 is a schematic block diagram of a display panel according to an embodiment of the present application.

FIG. 2 is a cross-sectional view of a display panel according to an embodiment of the present application.

FIG. 3 is a circuit diagram of a transistor in an embodiment of the present application.

FIG. 4 is an equivalent conversion circuit diagram of a diode in an embodiment of the present application.

FIG. 5 is an equivalent conversion circuit diagram of a transient voltage suppression diode in an embodiment of the present application.

FIG. 6 is a schematic diagram of an operating principle of an equivalent transient voltage suppression diode in an embodiment of the present application.

FIG. 7 is a schematic cross-sectional view of a display panel according to an embodiment of the present application.

FIG. 8 is a circuit diagram of a resistor in an embodiment of the present application.

FIG. 9 is a schematic diagram of a shape of a resistor in the resistance layer in FIG. 8.

FIG. 10 is a schematic cross-sectional view of a display panel according to an embodiment of the present application.

FIG. 11 is a schematic diagram of a display of a display panel in an embodiment of the present application.

FIG. 12 is a schematic structural diagram of a light emitting unit in FIG. 11.

FIG. 13 is a schematic plan view of a display device according to an embodiment of the present application.

detailed description

In the following, the technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

In the description of the embodiments of the present invention, it should be understood that the terms “first” and “second” are only used for description purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the technical features indicated. quantity. Therefore, the features defined as “first” and “second” may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present invention, the meaning of "a plurality" is two or more, unless it is specifically and specifically defined otherwise.

In the description of the embodiments of the present invention, it should be noted that the terms "installation", "connection", and "connection" should be understood in a broad sense unless explicitly stated and limited otherwise. For example, they can be fixed connections or Removable connection or integral connection; can be mechanical connection, electrical connection or can communicate with each other; can be directly connected, or indirectly connected through an intermediate medium, can be the internal connection of two components or two components Interaction. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present invention can be understood according to specific situations.

Please refer to FIG. 1, which is a schematic structural diagram of a display panel 100 according to an embodiment of the present application. The display panel 100 includes, but is not limited to, an Organic Light-Emitting Diode (OLED) display panel, a Liquid Crystal Display (LCD) panel, a Quantum Dot Light Emitting Diodes (QLED) panel, and an electronic paper (QLED) panel. Products or components with display functions such as E-paper display (EPD), touch panel (Touch panel), solar cell (Page view, PV) board, radio frequency label (Radio Frequency Identification) (RFID).

As shown in FIG. 1, the display panel 100 includes a display area A and a non-display area B located around the display area A. The non-display area B is provided with a driving chip 10 and at least one discrete device 20. The driving chip 10 is used for driving the display area A to perform display. At least one discrete device 20 is electrically connected to the driving chip 10 and is used in cooperation with the driving chip 10 to jointly drive the display area A to display and ensure that the driving chip 10 works normally. Among them, the discrete device 20 refers to an independent electronic component having a separate function and a function that cannot be separated, and is a basic functional unit in the electronic component. In this embodiment, the driving chip 10 and at least one discrete device 20 together form at least a part of the driving circuit of the non-display area B.

Please refer to FIG. 2 in combination, which is a cross-sectional view of a display panel 100 according to an embodiment of the present application. The display panel 100 further includes a substrate 30, the driving chip 10 and the at least one discrete device 20 are disposed on a corresponding non-display area B of the substrate 30, and at least one discrete device 20 is formed on the substrate 30 through a TFT process, In addition, the at least one discrete device 20 is manufactured in the same process as the thin film transistor of the display area A.

Specifically, the at least one discrete device 20 includes at least one of a transistor, a diode, a transient voltage suppression diode (TVS tube), a resistor, and a capacitor, and the number of each can be designed according to specific design requirements. Be limited.

In the present application, at least one discrete device 20 provided on the flexible circuit board is provided on the display panel 100 through a TFT process, and thus the flexible circuit board can be omitted, and no separate discrete device 20 needs to be purchased additionally, thereby reducing the production cost. The size of the display device is reduced. Further, since the discrete device can be manufactured simultaneously with the driving transistor in the display area A by a TFT process, it can effectively simplify the manufacturing process and improve production efficiency.

In some embodiments, at least one discrete device 20 includes at least one transistor 201. At least one transistor 201 is disposed on the substrate 30. The transistor 201 includes, but is not limited to, a bipolar transistor (BJT), a field effect transistor (FET), and the like. For ease of description, one transistor 201 is shown in FIG. 2. However, it is understood that any number of transistors 201 may be present in the exemplary embodiments of the present application.

The substrate 30 may include an insulating material such as plastic, glass, and the like, and may be flexible. In this embodiment, the substrate 30 is a flexible substrate, that is, the substrate 30 is made of a flexible material. The flexible material is, for example, but not limited to, flexible transparent plastic, flexible glass, or metal foil. The substrate 30 is used to support the entire display panel 100.

Specifically, the transistor 201 includes a gate 21, a gate insulating layer 22, a source 231, a drain 233, and a channel layer 232.

The gate 21 is disposed on the substrate 30. The gate electrode 21 may be made of a metal (for example, aluminum, silver, copper, molybdenum, chromium, or titanium), an alloy, doped silicon, a conductive metal oxide, or a conductive polymer, or any combination of the foregoing materials. Laminated film of two or more layers.

The gate insulating layer 22 is disposed on the gate 21 and covers the gate 21, that is, the gate 21 is disposed in the gate insulating layer 22 and is disposed near a side of the substrate 30. The gate insulating layer 22 is made of an inorganic material. The inorganic material is, for example, but is not limited to, silicon nitride, silicon oxide, silicon dioxide, aluminum oxide, hafnium oxide, titanium oxide, hafnium oxide, tantalum oxide, zirconia, and the like.

The semiconductor layer 23 includes a source electrode 231, a channel layer 232, and a drain electrode 233. The semiconductor layer 23 is disposed on the gate insulating layer 22. In the present embodiment, the source electrode 231 and the drain electrode 233 are both disposed on the channel layer 232 and face each other. In other embodiments, the source electrode 231 and the drain electrode 233 may be disposed on the same layer as the channel layer 232 and connected to the channel layer 232.

The channel layer 232 may include a metal oxide. The metal oxide of the channel layer 232 may include, for example, indium oxide (InO), indium zinc oxide (IZO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO) , Indium zinc tin oxide (IZTO) including indium oxide, zinc oxide (ZnO), zinc tin oxide (ZTO), and the like. The source electrode 231 and the drain electrode 233 may include the same or different metals as the channel layer 232. In addition, the source electrode 231 and the drain electrode 233 may include the same or different metal oxides as the channel layer 232.

Please refer to FIG. 3 again, which is a circuit diagram of the transistor 201. As shown in FIG. 3, the gate 21, source 231, and drain 233 of the transistor 201 correspond to the gate G, source S, and drain D of the transistor 201, respectively. In this embodiment, a transistor (such as a BJT tube and a MOS tube) on the FPC is fabricated on the substrate 30 through a TFT process, which avoids purchasing additional independent components, reduces the cost, and reduces the size of the display device.

Please refer to FIG. 4 in combination. In some embodiments, at least one discrete device 20 includes at least one diode 202. Among them, 202 'is an equivalent circuit diagram of the diode 202. The diode 202 includes a gate 21, a gate insulating layer 22, a source 231, a drain 233, and a channel layer 232. For ease of description, a diode 202 is shown in FIG. 2. However, it is understood that any number of diodes 202 may be present in the exemplary embodiments of the present application.

The gate 21 is disposed on the substrate 30. The gate electrode 20 may be made of a metal (for example, aluminum, silver, copper, molybdenum, chromium, or titanium), an alloy, doped silicon, a conductive metal oxide, or a conductive polymer, or any combination of the foregoing materials. Laminated film of two or more layers.

The channel layer 232 may include a metal oxide. The metal oxide of the channel layer 232 may include, for example, indium oxide (InO), indium zinc oxide (IZO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO) , Indium zinc tin oxide (IZTO) including indium oxide, zinc oxide (ZnO), zinc tin oxide (ZTO), and the like. The source electrode 231 and the drain electrode 233 may include the same metal as the channel layer 232. In addition, the source electrode 231 and the drain electrode 233 may include the same metal oxide as the channel layer 232.

Further, the gate electrode 21 is electrically connected to the drain electrode 233, and the source electrode 231 and the drain electrode 233 correspond to the cathode and anode of the diode 202, respectively. It can be understood that the manner of electrically connecting the gate electrode 21 and the drain electrode 233 may be implemented by way of via holes or wire connections, which is not limited herein.

By electrically connecting the gate electrode 21 and the drain electrode 233, the transistor can be equivalently used as a diode, and an additional process is not required to separately manufacture the diode, so the production efficiency can be effectively improved.

Please refer to FIG. 5 in combination. In some embodiments, at least one discrete device 20 includes at least one TVS tube 203, where 203 'is an equivalent circuit diagram of the TVS tube 203. The structure of the TVS tube 203 in this embodiment is the same as the structure of the diode 202 in the previous embodiment, and will not be repeated here. The difference is that the source electrode 231 and the drain electrode 233 correspond to the anode and cathode of the TVS tube 203, respectively.

Please refer to FIG. 6 again, which is a working principle diagram of the equivalent circuit 203 'of the TVS tube 203. During use, the source 231 of the first TVS tube 203'1 is electrically connected to the first voltage source VCC1, and the drain 233 of the first TVS tube 203'1 and the source of the second TVS tube 203'2 are electrically connected. 231 is electrically connected, and the drain 233 of the second TVS tube 203'2 is electrically connected to the second voltage source VCC2. The first voltage VCC1 is greater than the second voltage VCC2. A signal source (not shown) is used to output the protected voltage signal, and is electrically connected to the drain 233 of the first TVS tube 203'1 and the source 231 of the second TVS tube 203'2. During normal operation, the voltage of the protected voltage signal is between the first voltage VCC1 and the second voltage VCC2. When the voltage of the protected voltage signal is higher than the first voltage VCC1 due to the surge voltage, the first TVS The tube 203'1 is turned on, so that the surge voltage is discharged through the VCC1 path; when the voltage of the protected voltage signal is lower than the second voltage VCC2 due to the surge voltage, the second TVS tube 203'2 is turned on The surge voltage is discharged through the VCC2 path, thereby achieving the same effect as the TVS tube 203, and achieving the purpose of protecting the circuit.

Similar to the case of the diode, the equivalent TVS tube does not need to add additional processes.

Please refer to FIG. 7 again. In some embodiments, at least one discrete device 20 includes at least one resistor 204. The resistor 204 includes a resistive insulating layer 71, a resistive layer 72, a first connection electrode 73, and a second connection electrode 74. For ease of description, a resistor 204 is shown in FIG. 7. However, it is understood that any number of resistors 204 may be present in the exemplary embodiments of the present application.

The resistance insulating layer 71 is provided on the substrate 30. The resistance insulating layer 71 is made of an inorganic material. The inorganic material is, for example, but is not limited to, silicon nitride, silicon oxide, silicon dioxide, aluminum oxide, hafnium oxide, titanium oxide, hafnium oxide, tantalum oxide, zirconia, and the like.

The resistance layer 72 is disposed in the resistance insulation layer 71 and is covered by the resistance insulation layer 71. The resistance layer 72 may be composed of doped silicon, a conductive metal oxide (for example, indium tin oxide (ITO)), a conductive polymer, or the like having a certain resistivity.

The first connection electrode 73 and the second connection electrode 74 are disposed on the resistance insulation layer 71 and are respectively connected to the resistance layer 72 through the resistance insulation layer 71. The first connection electrode 73 and the second connection electrode 74 may be made of metal (for example, aluminum, silver, copper, molybdenum, chromium, or titanium), alloy, doped silicon, or conductive metal oxide (for example, indium tin oxide (ITO)). )), Conductive polymer and the like.

Please refer to FIG. 8 in combination, which is a circuit diagram of the resistor 204. The first connection electrode 73 and the second connection electrode 74 correspond to the first connection terminal and the second connection terminal of the resistor 204, respectively.

It can be understood that when the resistor 204 exists with the transistor 201, the diode 202, and the TVS tube 203 at the same time, the resistance insulating layer 71 may correspond to the gate insulating layer 22, and the resistance layer 72 may correspond to the gate 21 or the channel layer 232. Among them, corresponding means that the resistance insulation layer 71 and the gate insulation layer 22 are on the same layer and made of the same material.

Please refer to FIG. 9 in combination. In some embodiments, in order to produce a resistor 204 having a large resistance value, a material having a large resistivity such as indium tin oxide or molybdenum may be used on the resistance layer 72 and different shapes may be formed by etching. For example, the resistive layer 72 can be etched into an unclosed rectangular frame shape (shown in a in FIG. 9), a “U” shape (shown in b in FIG. 9), and an “I” shape (shown in c in FIG. 9) ) Or polyline type (shown as d in FIG. 9). Wherein, the ends of each resistor 204 are respectively used to be connected to the first connection electrode 73 and the second connection electrode 74. It can be understood that, in other embodiments, the shape of the resistor 204 can also be set according to specific requirements, which is not limited herein.

In addition, in some embodiments, the resistor 204 may also be implemented by a manufacturing process of a resistor in the integrated circuit (for example, P + diffusion resistance, N + diffusion resistance, Poly resistance).

Please refer to FIG. 10 again. In some embodiments, at least one discrete device 20 includes at least one capacitor 205. The capacitor 205 includes a first electrode plate layer 81, a dielectric layer 82, and a second electrode plate layer 83. For ease of description, a capacitor 205 is shown in FIG. 10. However, it is understood that any number of capacitors 205 may be present in the exemplary embodiments of the present application.

The first electrode plate layer 81 is disposed on the substrate 30. The first electrode layer 81 may be made of metal (for example, aluminum, silver, copper, molybdenum, chromium, or titanium), alloy, doped silicon, conductive metal oxide (for example, indium tin oxide (ITO)), or conductive polymerization.物等组合。 Things constitute.

The dielectric layer 82 is disposed on the first electrode plate layer 81. The dielectric layer 82 is made of an inorganic material. The inorganic material is, for example, but is not limited to, silicon nitride, silicon oxide, silicon dioxide, aluminum oxide, hafnium oxide, titanium oxide, hafnium oxide, tantalum oxide, zirconia, and the like. It can be understood that the magnitude of the dielectric constant of the dielectric layer 82 affects the capacitance value of the capacitor 205. Therefore, capacitors 205 with different capacitance values can be made by selecting dielectrics with different dielectric constants. In other embodiments, the dielectric layer 82 may be made of an organic material. For example, organic compounds containing carbon.

The second electrode plate layer 83 is disposed on the dielectric layer 82, that is, the dielectric layer 82 is located between the first electrode plate layer 81 and the second electrode plate layer 83. The second electrode plate layer 83 may be made of metal (for example, aluminum, silver, copper, molybdenum, chromium, or titanium), alloy, doped silicon, conductive metal oxide (for example, indium tin oxide (ITO)), conductive polymer, and the like Make up.

Specifically, the capacitance value of the capacitor 205 can also be adjusted by adjusting the thickness of the dielectric layer 82 and the areas of the first and second electrode plate layers 81 and 82. In addition, the first electrode plate layer 81 and the second electrode plate layer 83 respectively correspond to two connection ends of the capacitor 205.

It can be understood that when the capacitor 205 and the transistor 201, the diode 202, and the TVS tube 203 in the foregoing embodiment coexist, the first electrode plate layer 81 and the second electrode plate layer 83 may be in phase with the gate electrode 21 and the channel layer 232 respectively Correspondingly, the dielectric layer 82 may correspond to the gate insulating layer 22.

It should be noted that at least one discrete device 20 is disposed on the substrate 30. During the manufacturing process of the display panel 10, the discrete device 20 may further be provided with a passivation layer, a planarization layer, etc. to protect the discrete device 20 and make it The surface of the display panel 10 is flattened.

The equivalent resistors and capacitors of the foregoing embodiments can also be manufactured by using a TFT process, so the manufacturing process can be simplified.

Please refer to FIGS. 11-12 again. In some embodiments, the display area A includes a plurality of light emitting units 40 arranged in an array, and the plurality of light emitting units 40 are disposed on the substrate 30 at positions corresponding to the display area A. The driving chip 10 is electrically connected to the plurality of light-emitting units 40 and is configured to drive the plurality of light-emitting units 40 for display.

Specifically, the driving chip 10 includes a scanning controller 11 and a driving controller 12. Each light-emitting unit 40 includes a scan switch T1, a driving switch T2, and a light-emitting display device 41. The scan switch T1 of each light-emitting unit 40 is electrically connected to the scan controller 11, and is used for receiving the output of the scan controller 11. The scanning signal Gn is turned on, and the driving switch tube T2 of each light-emitting unit 40 is electrically connected between a driving power source Vs and the corresponding light-emitting display device 41, and is used to turn on and scan the corresponding scanning switch tube T1. The switch T1 is turned on when receiving the data signal Dn output from the drive controller 12, so that the driving power source Vs applies a driving voltage to the corresponding light-emitting display device 41 through the turned-on drive switch T2 to emit light. In this embodiment, the light emitting display device 41 includes an organic light emitting diode D1. Of course, in other embodiments, the light emitting display device 41 may further include a plurality of organic light emitting diodes connected in parallel or in series.

Specifically, the scanning switch T1 includes a first control terminal T11, a first conducting terminal T12, and a second conducting terminal T13, and the driving switch T2 includes a second control terminal T21, a third conducting terminal T22, and a fourth conducting terminal. The terminal T23, the third conducting terminal T22, and the fourth conducting terminal T23 are respectively electrically connected between the driving power source Vs and the positive electrode of the corresponding organic light emitting diode D1, and the negative electrode of the organic light emitting diode D1 is grounded; The conducting terminal T13 is connected to the second control terminal T21 of the driving switch T2, and the first controlling terminal T11 and the first conducting terminal T12 of the scanning switch T1 are connected to the scanning controller 11 and the driving controller 12, respectively.

In some embodiments, the scan controller 11 and the driving controller 12 are two independent chips. Obviously, in other embodiments, the driving chip 10 may also be an integrated chip, having the functions of the scan controller 11 and the functions of the driving controller 12 at the same time.

During actual production, the at least one discrete device 20 can be produced simultaneously with several thin film transistors (including the scan switch tube T1 and the drive switch tube T2) in the display area A, and the same process is used to save the production time of the display panel 100.

Please refer to FIG. 13 again, which is a plan view of a display device 200 according to an embodiment of the present application. The display device 200 includes the display panel 100 in any of the embodiments described above. The display device 200 includes, but is not limited to, a mobile phone, a tablet computer, and other electronic devices or terminal devices with the display panel 100.

The display panel 100 and the display device 200 disclosed in the embodiments of the present application are avoided because the at least one discrete device 20 originally provided on the flexible circuit board is disposed at the position of the non-display area B corresponding to the substrate 30 through the TFT process. The flexible circuit board and the purchase of additional electronic components further reduce the size of the display device 200 while reducing costs.

The embodiments of the present application have been described in detail above. Specific examples are used in this document to explain the principles and embodiments of the present application. The descriptions of the above embodiments are only used to help understand the methods and core ideas of the present application. Persons of ordinary skill in the art may change the specific embodiments and application scopes according to the idea of the present application. In summary, the content of this description should not be construed as a limitation on the present application.

Claims

A display panel includes:

Display area;

A non-display area located around the display area;

A driving chip arranged in the non-display area for driving the display area to display;

At least one discrete device is disposed in the non-display area for use with the driving chip.
The display panel according to claim 1, wherein the driving chip and the at least one discrete device together form at least a part of a driving circuit of the non-display area.
The display panel of claim 1, wherein the at least one discrete device is formed by a thin film transistor process.
The display panel according to claim 3, wherein the at least one discrete device and the thin film transistor of the display area are manufactured in a same process.
The display panel of claim 1, wherein the at least one discrete device comprises at least one of a transistor, a diode, a transient voltage suppression diode, a resistor, and a capacitor.
The display panel according to claim 1, wherein the display panel further comprises a substrate, and the driving chip and the at least one discrete device are carried at positions corresponding to the non-display area of the substrate.
The display panel according to claim 6, wherein the at least one discrete device includes at least one transistor; the at least one transistor is disposed on the substrate; each transistor includes: a gate, a gate insulating layer, Source, drain and channel layers.
The display panel according to claim 7, wherein the transistor comprises a field effect transistor and / or a bipolar transistor.
The display panel according to claim 6, wherein the at least one discrete device includes at least one diode; the at least one diode is disposed on the substrate; each diode includes: a gate, a gate insulating layer, A channel layer, a source electrode, and a drain electrode, the gate electrode is electrically connected to the drain electrode, and the source electrode and the drain electrode respectively correspond to a cathode and an anode of the diode.
The display panel of claim 6, wherein the at least one discrete device comprises at least one transient voltage suppression diode; the at least one transient voltage suppression diode is disposed on the substrate; each transient voltage suppression The diode includes a gate, a gate insulating layer, a channel layer, a source, and a drain. The gate is electrically connected to the drain, and the source and the drain respectively correspond to the transient voltage suppression. Anode and cathode of the diode.
The display panel according to claim 9 or 10, wherein the gate and the drain are electrically connected through a via hole or a wire connection.
The display panel of claim 6, wherein the at least one discrete device comprises at least one resistor; the at least one resistor is disposed on the substrate; and each resistor comprises:

A resistance insulating layer is disposed on the substrate;

A resistance layer disposed in the resistance insulation layer and covered by the resistance insulation layer;

The first connection electrode and the second connection electrode are disposed on the resistance insulation layer and are connected to the resistance layer through the resistance insulation layer, respectively.
The display panel according to claim 12, wherein a shape of the resistor in the resistance layer includes any one of a rectangular frame shape, a "U" shape, a "work" shape, and a polyline shape.
The display panel according to claim 7, 9 or 10, wherein the at least one discrete device further comprises at least one resistor; the at least one resistor is disposed on the substrate; and the resistor comprises:

A resistance insulating layer is disposed on the substrate;

A resistance layer disposed in the resistance insulation layer and covered by the resistance insulation layer;

A first connection electrode and a second connection electrode, which are disposed on the resistance insulation layer and are respectively connected to the resistance layer through the resistance insulation layer;

The resistive insulating layer corresponds to the gate insulating layer, and the resistive layer corresponds to the gate or the channel layer.
The display panel of claim 6, wherein the at least one discrete device includes at least one capacitor; the at least one capacitor is disposed on the substrate; and each capacitor includes:

A first electrode plate layer disposed on the substrate;

A dielectric layer disposed on the first electrode plate layer;

The second electrode plate layer is disposed on the dielectric layer.
The display panel according to claim 7, 9 or 10, wherein the at least one discrete device includes at least one capacitor; the at least one capacitor is disposed on the substrate; and each capacitor includes:

A first electrode plate layer disposed on the substrate;

A dielectric layer disposed on the first electrode plate layer;

A second electrode plate layer disposed on the dielectric layer;

The first electrode plate layer and the second electrode plate layer respectively correspond to the gate electrode and the channel layer, and the dielectric layer and the gate insulating layer correspond to each other.
The display panel according to claim 6, wherein the display area comprises a plurality of light emitting units arranged in an array, and the plurality of light emitting units are disposed at positions of the substrate corresponding to the display area; The driving chip is electrically connected to the plurality of light emitting units, and is configured to drive the plurality of light emitting units for display.
The display panel according to claim 17, wherein the driving chip comprises a scanning controller and a driving controller; each light-emitting unit comprises a scanning switch tube, a driving switch tube and a light-emitting display device, and the scanning of each light-emitting unit The switching tubes are electrically connected to the scanning controller, and are used for conducting after receiving the line scanning signal output from the scanning controller. The devices are used for conducting when the corresponding scanning switch tube is turned on and the scanning switch tube receives a data signal output from the driving controller, so that the driving power source applies a driving voltage to the corresponding driving switch tube through the turned-on driving switching tube. The light emitting display device emits light.
A display device, comprising the display panel according to any one of claims 1-18.