WO2020040369A1 - Procédé de fabrication de cellule solaire à semi-conducteur composite - Google Patents

Procédé de fabrication de cellule solaire à semi-conducteur composite Download PDF

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Publication number
WO2020040369A1
WO2020040369A1 PCT/KR2019/000297 KR2019000297W WO2020040369A1 WO 2020040369 A1 WO2020040369 A1 WO 2020040369A1 KR 2019000297 W KR2019000297 W KR 2019000297W WO 2020040369 A1 WO2020040369 A1 WO 2020040369A1
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compound semiconductor
layer
lamination film
solar cell
protective layer
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PCT/KR2019/000297
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English (en)
Korean (ko)
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허윤호
신용일
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엘지전자 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02293—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process formation of epitaxial layers by a deposition process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0331—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76865—Selective removal of parts of the layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/0304—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/0304—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L31/03046—Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds including ternary or quaternary compounds, e.g. GaAlAs, InGaAs, InGaAsP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/544—Solar cells from Group III-V materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a method for manufacturing a compound semiconductor solar cell, a research (NRF-2017M1A3A3A03016626) carried out with the support of the Korea Research Foundation-space core technology development project as funding of the government (Ministry of Science and Technology Information and Communication) in 2018.
  • the present invention relates to a method for manufacturing a compound semiconductor solar cell capable of effectively removing a support film or a support film and a protective metal layer for supporting a compound semiconductor layer after an epitaxial lift off (ELO) process.
  • ELO epitaxial lift off
  • Compound semiconductor layer provided with compound semiconductor layer formed using III-V group compound semiconductors such as gallium arsenide (GaAs), indium phosphorus (InP), gallium aluminum arsenide (GaAlAs), and gallium indium arsenide (GaInAs)
  • the battery is a method of manufacturing a compound semiconductor solar cell using a mother substrate (GaAs wafer or Ge wafer) for forming the compound semiconductor layer as a component of the solar cell without separating from the compound semiconductor layer, or using a sacrificial layer By separating the mother substrate (GaAs wafer or Ge wafer) from the compound semiconductor layer can be prepared by a method of manufacturing a compound semiconductor solar cell using only the compound semiconductor layer as a component of the solar cell.
  • III-V group compound semiconductors such as gallium arsenide (GaAs), indium phosphorus (InP), gallium aluminum arsenide (GaAlAs), and gallium indium arsenide (GaInAs
  • the compound semiconductor layer is formed by an inverse growth method or a regular growth method.
  • the inverse growth method is a method of sequentially forming a layer located on the front electrode side to a layer located on the rear electrode side.
  • the regular growth method refers to a method of sequentially forming a layer located on the rear electrode side to a layer located on the front electrode side.
  • the inverse growth method has a problem that the process is simpler than the regular growth method, but the efficiency of the compound semiconductor solar cell is 1 to 2% lower than that formed by the regular growth method. Although an additional step is required, there is an effect of increasing the efficiency of the compound semiconductor solar cell as compared with the case formed by the inverse growth method.
  • the present invention relates to a method for manufacturing a compound semiconductor solar cell in which a compound semiconductor layer is formed using a regular growth method, and then the compound semiconductor layer is separated from a mother substrate by an epitaxial lift off (ELO) process.
  • ELO epitaxial lift off
  • An object of the present invention is to provide a method for manufacturing a compound semiconductor solar cell capable of effectively removing a support film or a support film and a protective metal layer after the Epitaxial Lift Off (ELO) process.
  • Method of manufacturing a compound semiconductor solar cell forming a sacrificial layer on one side of the mother substrate; Forming a compound semiconductor layer on the sacrificial layer using a regular growth method; Attaching a first lamination film on a first surface of the compound semiconductor layer using an adhesive including an acrylic resin; Separating the compound semiconductor layer and the first lamination film from the mother substrate by performing an ELO process to remove the sacrificial layer; Forming a rear electrode on the second surface of the compound semiconductor layer; Attaching a second lamination film on the back electrode; Removing the first lamination film; Forming a front electrode on the first surface of the compound semiconductor layer, and removing the first lamination film may use any one of the following four methods.
  • the first lamination film was peeled off after heating at a temperature of 60 to 200 ° C. for 5 seconds to 20 minutes.
  • the step of forming a first protective layer formed of a compound semiconductor on the compound semiconductor layer between the step of forming the compound semiconductor layer and the step of attaching the first lamination film may further include depositing a second passivation layer on the first passivation layer.
  • the first lamination film may be attached to the second protective layer.
  • a layer in direct contact with the first protective layer may be formed of GaAs, and the first protective layer may be formed of any one selected from other compound semiconductors except for GaAs, for example, GaInP, AlInP, and AlGaInP.
  • the first protective layer may be formed of a compound semiconductor, and may be removed using an etching solution containing hydrochloric acid (HCL).
  • the second protective layer may be formed of a first metal layer formed of copper and a second metal layer formed of a metal different from the first metal layer, and mix ammonium hydroxide (NH 4 OH) and hydrogen peroxide (H 2 O 2 ). One etching solution may remove the first metal layer.
  • NH 4 OH ammonium hydroxide
  • H 2 O 2 hydrogen peroxide
  • the second protective layer may be formed to a thickness of 1 ⁇ m 10 ⁇ m, it is preferable that the thickness of the first metal layer is formed to 80% or more of the thickness of the second protective layer.
  • the second metal layer may be formed of at least one selected from silver (Ag), gold (Au), platinum (Pt), palladium (Pd), nickel (Ni), molybdenum (Mo) or an alloy thereof, and may include potassium iodide (The second metal layer may be removed with an etching solution including at least one of KI) and potassium cyanide (H 2 O 2 ).
  • the second metal layer may be formed at at least one position between the first protective layer and the first metal layer and between the first metal layer and the first lamination film.
  • the method may further include attaching a first support handle on the first lamination film between performing the ELO process and forming the back electrode.
  • the method may further include removing the second support handle, and removing the second lamination film.
  • the acrylic resin may be silicone acrylate, polyether acrylate, or polyester acrylate, and may be used for heat curing agent and heating formed by mixing one or two materials of isocyanate crosslinking agent or methylol crosslinking agent.
  • the pressure-sensitive adhesive may be formed by mixing the foaming agent formed of the microspheres foamed with the acrylic resin, and the pressure-sensitive adhesive may be formed so that the solid content is 10 to 60% by weight based on the total weight of the pressure-sensitive adhesive.
  • the acrylic resin may be silicone acrylate, polyether acrylate or polyester acrylate, and may be one or two of benzoin ether, amine, diazonium salt, iodonium salt, sulfonium salt or metal nocene compound.
  • the pressure-sensitive adhesive may be formed by mixing a photocuring agent formed by mixing at least one substance and a foaming agent formed of microspheres foamed by light with the acrylic resin, and the pressure-sensitive adhesive may have a solid content of about 10 to about the total weight of the pressure-sensitive adhesive. It may be formed to 60% by weight.
  • the first lamination film can be effectively removed after the ELO process.
  • the yield can be improved by securing stability in a plurality of etching processes, particularly, an ELO process and a protective layer removal process, used in the process for manufacturing the compound semiconductor solar cell.
  • FIG. 1 is a block diagram illustrating a method of manufacturing a compound semiconductor solar cell according to a first embodiment of the present invention.
  • FIG. 2 is a flowchart specifically illustrating the manufacturing method of FIG. 1.
  • FIG. 3 is a block diagram illustrating a method of manufacturing a compound semiconductor solar cell according to a second embodiment of the present invention.
  • FIG. 4 is a flowchart illustrating the manufacturing method of FIG. 3 in detail.
  • FIG. 5 is a cross-sectional view illustrating various embodiments of the first protective layer and the second protective layer illustrated in FIG. 4.
  • FIG. 6 is a perspective view of a compound semiconductor solar cell manufactured by the manufacturing method of FIG. 1 or 3.
  • FIG. 7 is a photograph showing a state in which peeling occurs at the interface between the first lamination film and the lower layer after the ELO process is performed by a conventional manufacturing method, and after the ELO process is performed by the manufacturing method of the second embodiment of the present invention. It is a photograph which shows the state in which peeling is suppressed at the interface of 2 protective layers and a 1st lamination film.
  • first and second may be used to describe various components, but the components may not be limited by the terms. The terms may be used only for the purpose of distinguishing one component from another component.
  • the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component.
  • the term "and / or” may include a combination of a plurality of related items or any of a plurality of related items.
  • a component When a component is said to be “connected” or “coupled” to another component, it may be directly connected to or coupled to the other component, but other components may be present in the middle. Can be understood.
  • FIG. 3 is a block diagram illustrating a method of manufacturing a compound semiconductor solar cell according to the present invention
  • FIG. 4 is a process diagram illustrating the manufacturing method of FIG. 3 in detail.
  • FIG. 5 is a cross-sectional view illustrating various embodiments of the first protective layer and the second protective layer illustrated in FIG. 4, and FIG. 6 is a perspective view of the compound semiconductor solar cell manufactured by the manufacturing method of FIG. 4.
  • the compound semiconductor solar cell includes a light absorbing layer PV, a window layer 10 positioned on the front surface of the light absorbing layer PV, a front electrode 20 positioned on the front surface of the window layer 10, and a window layer ( 10) the front contact layer 30 positioned between the front electrode 20, the antireflection film 40 positioned on the window layer 10, the rear contact layer 50 positioned on the rear surface of the light absorbing layer PV, and
  • the rear electrode 60 may include a rear electrode 60 positioned on the rear surface of the rear contact layer 50.
  • At least one of the anti-reflection film 40, the window layer 10, the front contact layer 30, and the rear contact layer 50 may be omitted, but as shown in FIG. It demonstrates as an example.
  • the light absorbing layer PV may include a III-VI semiconductor compound, a p-type semiconductor layer PV-p doped with impurities of a first conductivity type (eg, p-type impurities), and a second conductivity It may include an n-type semiconductor layer (PV-n) doped with a type of impurities (for example, n-type impurities).
  • the light absorbing layer (PV) of this configuration can be prepared from a mother substrate by a metal organic chemical vapor deposition (MOCVD) method, a molecular beam epitaxy (MBE) method or any other suitable method for forming an epitaxial layer. Can be.
  • MOCVD metal organic chemical vapor deposition
  • MBE molecular beam epitaxy
  • the window layer 10 may be formed between the light absorbing layer PV and the front electrode 20, and may be formed by doping a group III-VI semiconductor compound with impurities of a second conductivity type.
  • the window layer 10 may not include n-type or p-type impurities, and functions to passivate the front surface of the light absorbing layer PV.
  • the anti-reflection film 40 may be located on the remaining area of the window layer 10 except for the area where the front electrode 20 and / or the front contact layer 30 is located.
  • the anti-reflection film 40 may be disposed on the front contact layer 30 and the front electrode 20 as well as the exposed window layer 10.
  • the compound semiconductor solar cell may further include a busbar electrode for physically connecting the plurality of front electrodes 20, and the busbar electrode is not covered by the anti-reflection film 40 and exposed to the outside. Can be.
  • the antireflection film 40 having such a configuration may include magnesium fluoride, zinc sulfide, titanium oxide, silicon oxide, derivatives thereof, or a combination thereof.
  • the front electrode 20 may be formed to extend in the first direction X-X ', and the plurality of front electrodes 20 may be spaced apart at regular intervals along the second direction Y-Y' perpendicular to the first direction. .
  • the front electrode 20 having such a configuration may be formed by including an electrically conductive material.
  • the front electrode 20 may include at least one of gold (Au), germanium (Ge), and nickel (Ni).
  • the front contact layer 30 positioned between the window layer 10 and the front electrode 20 is formed by doping the group III-VI semiconductor compound with a second impurity at a doping concentration higher than the impurity doping concentration of the window layer 10. can do.
  • the front contact layer 30 forms an ohmic contact between the window layer 10 and the front electrode 20.
  • the rear contact layer 50 located on the rear of the rear electric field layer may be a light absorbing layer ( It is located on the back of the PV) as a whole, and may be formed by doping the III-VI semiconductor compound with a doping concentration higher than that of the p-type semiconductor layer PV-p.
  • the back contact layer 50 may form an ohmic contact with the back electrode 160.
  • the rear electrode 60 positioned on the rear surface of the rear contact layer 50 may be formed of a sheet-shaped conductor located entirely on the rear surface of the rear contact layer 50. That is, the rear electrode 60 may also be referred to as a sheet electrode positioned on the entire rear surface of the rear contact layer 50.
  • the rear electrode 60 may be formed in the same plane as the light absorbing layer PV, and may include gold (Au), platinum (Pt), titanium (Ti), tungsten (W), silicon (Si), and nickel (Ni). ), Magnesium (Mg), palladium (Pd), copper (Cu), and germanium (Ge) may be formed as a single film or a multi-layer including at least one material selected from, and the material forming the rear electrode is It may be appropriately selected depending on the conductivity type of the contact layer.
  • FIG. 1 is a block diagram illustrating a method of manufacturing a compound semiconductor solar cell according to a first embodiment of the present invention
  • FIG. 2 is a process diagram illustrating the manufacturing method of FIG. 1 in detail.
  • FIG. 3 is a block diagram illustrating a method of manufacturing a compound semiconductor solar cell according to a second embodiment of the present invention
  • FIG. 4 is a process diagram illustrating the manufacturing method of FIG. 3 in detail
  • FIG. 1 is a cross-sectional view showing various embodiments of the protective layer and the second protective layer.
  • FIGS. 1 and 2 a manufacturing method according to a first embodiment of the present invention will be described with reference to FIGS. 1 and 2.
  • the manufacturing method of the first embodiment is large, forming a sacrificial layer on one side of the mother substrate (S110); Forming a compound semiconductor layer on the sacrificial layer (S120); Attaching a first lamination film on the first surface of the compound semiconductor layer (S130); Separating the compound semiconductor layer and the first lamination film from the mother substrate by performing an ELO process to remove the sacrificial layer (S140); Forming a rear electrode on the second surface of the compound semiconductor layer (S150); Attaching a second lamination film on the back electrode (S160); Removing the first lamination film (S170); And forming a front electrode on the first surface of the compound semiconductor layer (S180).
  • a sacrificial layer 120 is formed on one side of a mother substrate 110 serving as a base for providing an appropriate lattice structure in which a light absorbing layer PV is formed (S110).
  • a compound semiconductor layer CS is formed on the sacrificial layer 120.
  • the compound semiconductor layer CS sequentially forms the back contact layer 50, the light absorbing layer PV, the window layer 10, and the front contact layer 30 on the sacrificial layer 120 using the regular growth method. It can form by laminating
  • the first lamination film 130 is attached onto the compound semiconductor layer CS (S130).
  • the first lamination film 130 may be formed of a base film 130B serving as a support substrate and an adhesive 130A positioned on one side of the base film 130B.
  • the base film 130B may be formed of polyethylene terephthalate, polyvinyl chloride, ethylene vinyl acetate, or the like, or a polyolefin-based resin or a copolymer thereof, and may have a thickness of 2 to 200 ⁇ m.
  • the base film 130B since the first lamination film 130 is directly adhered to the first surface of the compound semiconductor layer CS, the base film 130B must support the compound semiconductor layer CS.
  • the base film 130B of the first lamination film 130 used in the manufacturing method of the present embodiment is preferably formed to a thickness of 150 to 200 ⁇ m to effectively support the compound semiconductor layer (CS).
  • the pressure-sensitive adhesive for adhering the base film 130B to the first surface of the compound semiconductor layer CS may include an acrylic resin as a composition, and in addition to the acrylic resin, a heat curing agent, a light curing agent, a foaming agent formed of microspheres, and the like may be selected. It may further include as.
  • acrylic resin silicone acrylate, polyether acrylate or polyester acrylate may be used.
  • the pressure-sensitive adhesive may be formed of a silicone acrylate, polyether acrylate or polyester acrylate-based resin.
  • the pressure-sensitive adhesive may be formed by mixing an acrylic resin (silicone acrylate, polyether acrylate or polyester acrylate) with a thermosetting agent (isocyanate-based crosslinking agent or methylol-based crosslinking agent). It may be formed by mixing a blowing agent formed of microspheres that are foamed by heating. At this time, it is preferable to form solid content in the composition which forms an adhesive so that it may become 10 to 60 weight% with respect to the total weight of the said adhesive.
  • the pressure-sensitive adhesive is one of an acrylic resin (silicone acrylate, polyether acrylate or polyester acrylate) and a light curing agent (benzoin ether, amine, diazonium salt, iodonium salt, sulfonium salt or metal nocene compound). Or a mixture of two or more materials) and a blowing agent formed of microspheres foamed by light.
  • an acrylic resin silicone acrylate, polyether acrylate or polyester acrylate
  • a light curing agent benzoin ether, amine, diazonium salt, iodonium salt, sulfonium salt or metal nocene compound.
  • a blowing agent formed of microspheres foamed by light.
  • the pressure-sensitive adhesive includes a foaming agent that is foamed by heat or light
  • the foaming agent is foamed to lower the adhesive force, thereby easily peeling off the base film 130B.
  • the first lamination film 130 is composed of a base film 130B and an adhesive applied to one side of the film.
  • the first lamination film is a pressure-sensitive adhesive on the first surface of the compound semiconductor layer.
  • the composition of the base film may be formed by applying a composition such as spin coating, bar coating or screen printing onto the pressure-sensitive adhesive.
  • the sacrificial layer 120 is removed by performing an ELO process (S140).
  • hydrofluoric acid HF
  • etching solution hydrofluoric acid
  • the sacrificial layer 120 is removed by the hydrofluoric acid (HF), and thus the compound semiconductor layer CS and the first lamination film 130 are used. ) May be separated from the mother substrate 110.
  • the first support handle 150 is attached to the rear surface of the first lamination film 130, and the compound semiconductor layer ( A rear electrode 60 is formed on the CS (S150).
  • the rear electrode 60 includes gold (Au), platinum (Pt), titanium (Ti), tungsten (W), silicon (Si), nickel (Ni), magnesium (Mg), palladium (Pd), and copper (Cu) It may be formed as a single film or multiple films containing at least one material selected from, and germanium (Ge).
  • the second lamination film 160 is attached onto the rear electrode 60 (S160).
  • the second lamination film 160 may be formed in the same structure as the first lamination film 130 and may be attached in the same manner as the first lamination film 130.
  • the second lamination film 160 may have a different structure from the first lamination film 130.
  • the first support handle 150 is disposed upward, and then, the first support handle 150 and the first support handle 150 are disposed upward.
  • the lamination film 130 is removed (S170).
  • the first lamination film 130 may be removed by any one of the following four methods.
  • the first lamination film was peeled off after heating at a temperature of 60 to 200 ° C. for 5 seconds to 20 minutes.
  • the pressure-sensitive adhesive of the first lamination film includes an acrylic resin such as silicone acrylate, polyether acrylate or polyester acrylate as a composition.
  • the adhesive force of the adhesive 130A containing an acrylic composition is generally 0.2-5 N / 25mm.
  • the first lamination film may be physically peeled off using a force of 0.2 to 5 N / 25 mm.
  • the pressure-sensitive adhesive (130A) further comprises a foaming agent formed of a microsphere foamed by heating, the foaming agent by heating for 5 seconds to 20 minutes at a temperature of 60 to 200 °C according to the method described in item (2) By foaming, the first lamination film can be peeled off.
  • the pressure-sensitive adhesive (130A) further comprises a foaming agent formed of microspheres foamed by light, the intensity of 20 to 600mJ / cm2 for light having a wavelength of 200 to 400nm according to the method described in item (3)
  • the first lamination film can be peeled off by irradiating with a foaming agent.
  • the acrylic pressure-sensitive adhesive has a physical property that is dissolved in at least one solvent of Acetone (2-propanone), Isopropyl alcohol (Isopropanol), NMP (1-Methyl-2-pyrrolidon), DMSO (dimethyl sulfoxide), the solvent
  • the first lamination film may be peeled off by dissolving the pressure-sensitive adhesive 130A using one of them.
  • the front electrode 20 is formed on the first surface of the compound semiconductor layer CS (S180).
  • the front electrode 20 may be formed by depositing a metal only on a region where the front electrode is to be formed, or by patterning after depositing a front electrode material on the front contact layer 30.
  • the second support handle 170 and the second support pattern 170 are patterned.
  • the lamination film 160 is removed to manufacture the compound semiconductor solar cell shown in FIG. 6.
  • the compound semiconductor solar cell is provided with one light absorbing layer as an example, but a plurality of light absorbing layers may be formed.
  • the lower light absorbing layer may include a GaAs compound that absorbs light in a long wavelength band and photoelectrically converts the upper light absorbing layer may include a GaInP compound that absorbs light in a short wavelength band and photoelectrically converts the upper light absorbing layer.
  • the tunnel junction layer may be positioned between the lower light absorbing layer and the lower light absorbing layer.
  • An intrinsic semiconductor layer may be further formed between the p-type semiconductor layer and the n-type semiconductor layer of the light absorbing layer.
  • the manufacturing method of the present invention largely, forming a sacrificial layer on one side of the mother substrate (S210); Forming a compound semiconductor layer on the sacrificial layer (S220); Forming a first passivation layer formed of a compound semiconductor on the first surface of the compound semiconductor layer (S230); Depositing a second protective layer formed of a metal on the first protective layer (S240); Attaching a first lamination film on the second protective layer (S250); Separating the compound semiconductor layer, the first and second protective layers, and the first lamination film from the mother substrate by performing an ELO process to remove the sacrificial layer (S260); Forming a rear electrode on the compound semiconductor layer (S270); Attaching a second lamination film on the back electrode (S280); Removing the first lamination film (S290); Removing the second protective layer (S300); Removing the first protective layer (S310); And forming a front electrode on the compound semiconductor layer (S320).
  • one of the compound semiconductor layers directly contacting the first protective layer is formed of GaAs, and the first protective layer is formed of another compound semiconductor except for the GaAs.
  • the sacrificial layer 120 is formed on one surface of the mother substrate 110 (S210), and the compound semiconductor layer CS is formed on the sacrificial layer 120 (S220).
  • the compound semiconductor layer CS is formed by the regular growth method as in the first embodiment described above.
  • the front contact layer 30 may be formed entirely on the window layer 10, and may be formed of GaAs having excellent electrical conductivity for ohmic contact.
  • a first protective layer 140A formed of a compound semiconductor is formed on the compound semiconductor layer CS (S230), and a second protective layer 140B formed of metal is formed on the first protective layer 140A. (S240). Therefore, the protective layer 140 including the first protective layer 140A and the second protective layer 140B is formed.
  • the first protective layer 140A is formed of any compound semiconductor except GaAs, preferably any one compound semiconductor selected from GaInP, AlInP, and AlGaInP.
  • the compound semiconductor layer CS and the passivation layer 140A are formed of different compound semiconductors, the compound semiconductor layer CS and the passivation layer 140A, It is possible to effectively prevent the peeling of the 140B, and to effectively prevent the etching of a portion of the compound semiconductor layer CS during the process of removing the protective layers 140A and 140B.
  • the sacrificial layer 120 and the compound semiconductor layer CS and the first protective layer 140A may be a metal organic chemical vapor deposition (MOCVD) method, a molecular beam epitaxy method, or any other suitable method for forming an epitaxial layer. It can form by a method and can be formed by a regular growth method.
  • MOCVD metal organic chemical vapor deposition
  • a molecular beam epitaxy method or any other suitable method for forming an epitaxial layer. It can form by a method and can be formed by a regular growth method.
  • the second protective layer 140B may be formed of the first metal layer 140B-1 formed of copper having excellent etching resistance, and the first metal layer 140B-1 may be formed of the second metal layer 140B-2 formed of another metal. Can be.
  • the second metal layer 140B-2 may be a metal that can prevent the surface of the first metal layer 140B-1 from being oxidized, or an etching solution used to remove the first metal layer 140B-1. It is preferable to form at least one selected from a material having corrosion resistance, for example, silver (Ag), gold (Au), platinum (Pt), palladium (Pd), nickel (Ni) and molybdenum (Mo). Do.
  • the second metal layer 140B-2 includes the first passivation layer 140A.
  • the first metal layer 140B-1 and between the first metal layer 140B-1 and the first lamination film 130, and the first metal layer 140B-1 may be formed.
  • the second metal layer 140B-2 may be further formed between the two first metal layers 140B-1.
  • an etching process and an ELO process for removing the second metal layer 140B-2 may be performed. Since the first protective layer 140A can be protected during the first protective layer 140A, the first protective layer 140A and the second protective layer 140B, in particular, between the first protective layer 140A and the first metal layer 140B-1. The peeling phenomenon which arises can be prevented.
  • the second metal layer 140B-2 is formed between the first metal layer 140B-1 and the first lamination film 130, the second metal layer 140B-2 is formed on the surface of the first metal layer 140B-1. Since the oxide film can be prevented from being formed, the peeling phenomenon occurring between the first lamination film 130 and the second protective layer 140B can be prevented during the etching process, especially the ELO process.
  • the second protective layer 140B may be formed to a thickness of 1 ⁇ m to 10 ⁇ m, and the thickness of the first metal layer 140B-1 may be used to support the compound semiconductor layer CS during the manufacturing process of the compound semiconductor solar cell. It may be formed to 80% or more of the thickness of the second protective layer (140B).
  • the first lamination film 130 is attached onto the second protective layer 140B (S250).
  • the first lamination film 130 is not directly adhered to the compound semiconductor layer CS, but directly adhered to the protective layer 140 for supporting the compound semiconductor layer CS.
  • the base film of the 1st lamination film 130 used for the manufacturing method of this embodiment with a thin thickness compared with the base film of 1st Example mentioned above.
  • the base film may be formed to a thickness of 100 ⁇ m or less
  • FIG. 4 illustrates a case in which the first lamination film is formed to have a thickness thinner than that of the first lamination film of the first embodiment.
  • the sacrificial layer 120 is removed by performing an ELO process (S260).
  • the first lamination film 130 is the second protective layer. It does not peel off from 140B.
  • FIG. 7 is a photograph showing that peeling between the first lamination film 140 and the second protective layer 130B is suppressed after performing the ELO process according to the manufacturing method of the second embodiment.
  • FIG. 7 shows the interface between the first lamination film and the protective metal layer in the conventional example in which the ELO process is performed in a state in which a single-layered protective metal layer is deposited on the first surface of the compound semiconductor layer and the first lamination film is attached thereto. It is a photograph showing that peeling occurred.
  • the first support handle 150 is attached on the rear surface of the first lamination film 130, and the compound semiconductor layer
  • the back electrode 60 is formed on the CS (S270).
  • the second lamination film 160 is attached to the rear electrode 60 (S280), and the first support handle 150 is attached to the second support handle 170 on the second lamination film 160. Place it face up.
  • first support handle 150 and the first lamination film 130 are removed (S290), and the second protective layer 140B is removed (S300).
  • the first metal layer 140B-1 is removed using an etching solution in which ammonium hydroxide (NH 4 OH) and hydrogen peroxide (H 2 O 2 ) are mixed, and the second metal layer 140B-2 is removed from the first metal layer ( 140B-1) is removed with an etching solution other than the etching solution used for removing 140B-1), for example, an etching solution containing at least one of potassium iodide (KI) and potassium cyanide (H 2 O 2 ).
  • the first metal layer 140B-1 has excellent etching resistance to the etching solution used to remove the second metal layer 140B-2, while the second metal layer 140B-2 is removed.
  • the first metal layer 140B-1 is not removed.
  • the second metal layer 140B-2 is formed between the first metal layer 140B-1 and the first lamination film 130, an oxide film is formed on the surface of the first metal layer 140B-1. Since it is suppressed by the 2 metal layer 140B-2, the peeling phenomenon which arises between the 2nd protective layer 140B and the 1st lamination film 130 during an etching process, especially an ELO process is prevented.
  • the first protective layer 140A is removed (S310).
  • the first passivation layer 140A may be removed using an etching solution including hydrochloric acid (HCL) in which the front contact layer formed of GaAs has etching resistance.
  • HCL hydrochloric acid
  • the front electrode 20 is formed on the first surface of the compound semiconductor layer CS (S320).
  • the compound semiconductor solar cell is provided with one light absorbing layer as an example, but a plurality of light absorbing layers may be formed.
  • the lower light absorbing layer may include a GaAs compound that absorbs light in a long wavelength band and photoelectrically converts the upper light absorbing layer may include a GaInP compound that absorbs light in a short wavelength band and photoelectrically converts the upper light absorbing layer.
  • the tunnel junction layer may be positioned between the lower light absorbing layer and the lower light absorbing layer.
  • An intrinsic semiconductor layer may be further formed between the p-type semiconductor layer and the n-type semiconductor layer of the light absorbing layer.

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Abstract

Un procédé de fabrication de cellule solaire à semi-conducteur composite selon un aspect de la présente invention comprend les étapes de : formation d'une couche de semi-conducteur composite sur une couche sacrificielle au moyen d'un procédé de croissance usuel ; fixation d'un premier film de stratification sur la première surface de la couche de semi-conducteur composite au moyen d'un adhésif comprenant une résine acrylique ; séparation de la couche de semi-conducteur composite et du premier film de stratification d'un substrat parent par élimination de la couche sacrificielle par l'intermédiaire d'un processus ELO ; formation d'une électrode arrière sur la deuxième surface de la couche de semi-conducteur composite ; fixation d'un deuxième film de stratification sur l'électrode arrière ; retrait du premier film de stratification ; et formation d'une électrode avant sur la première surface de la couche de semi-conducteur composite, l'étape de retrait du premier film de stratification utilisant un procédé quelconque choisi parmi les procédés de : (1) délaminage au moyen d'une force de 0,2 à 5N/25 mm ; (2) délaminage après chauffage à une température de 60 à 200 °C pendant 5 secondes à 20 minutes ; (3) délaminage après irradiation de la lumière ayant une longueur d'onde de 200 à 400 nm à une intensité de 20 à 600 mJ/cm² ; et (4) délaminage au moyen d'un ou plusieurs solvants parmi l'acétone (2-propanone), l'alcool isopropylique (isopropanol), la 1-méthyl-2-pyrrolidone (NMP) et le diméthylsulfoxyde (DMSO).
PCT/KR2019/000297 2018-08-24 2019-01-08 Procédé de fabrication de cellule solaire à semi-conducteur composite WO2020040369A1 (fr)

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JP2009049389A (ja) * 2007-07-20 2009-03-05 Japan Aerospace Exploration Agency 太陽電池の製造方法
JP2012054388A (ja) * 2010-09-01 2012-03-15 Sharp Corp 薄膜化合物太陽電池の製造方法
JP2014017366A (ja) * 2012-07-09 2014-01-30 Sharp Corp 薄膜化合物太陽電池セルおよびその製造方法
KR20140043805A (ko) * 2011-07-06 2014-04-10 더 리젠츠 오브 더 유니버시티 오브 미시간 에피택셜 리프트 오프 및 냉간 용접 결합된 반도체 태양 전지를 사용한 일체형 태양열 집열기
KR20140138340A (ko) * 2012-03-28 2014-12-03 소이텍 다중접합 태양 전지 소자들의 제조

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009049389A (ja) * 2007-07-20 2009-03-05 Japan Aerospace Exploration Agency 太陽電池の製造方法
JP2012054388A (ja) * 2010-09-01 2012-03-15 Sharp Corp 薄膜化合物太陽電池の製造方法
KR20140043805A (ko) * 2011-07-06 2014-04-10 더 리젠츠 오브 더 유니버시티 오브 미시간 에피택셜 리프트 오프 및 냉간 용접 결합된 반도체 태양 전지를 사용한 일체형 태양열 집열기
KR20140138340A (ko) * 2012-03-28 2014-12-03 소이텍 다중접합 태양 전지 소자들의 제조
JP2014017366A (ja) * 2012-07-09 2014-01-30 Sharp Corp 薄膜化合物太陽電池セルおよびその製造方法

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