WO2020037564A1 - 图像处理方法、装置、设备及存储介质 - Google Patents

图像处理方法、装置、设备及存储介质 Download PDF

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Publication number
WO2020037564A1
WO2020037564A1 PCT/CN2018/101792 CN2018101792W WO2020037564A1 WO 2020037564 A1 WO2020037564 A1 WO 2020037564A1 CN 2018101792 W CN2018101792 W CN 2018101792W WO 2020037564 A1 WO2020037564 A1 WO 2020037564A1
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WIPO (PCT)
Prior art keywords
image
sub
circuit
images
frame
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Ceased
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PCT/CN2018/101792
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English (en)
French (fr)
Inventor
高明明
李涛
杨康
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SZ DJI Technology Co Ltd
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SZ DJI Technology Co Ltd
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Priority to CN201880042238.7A priority Critical patent/CN110800284B/zh
Priority to PCT/CN2018/101792 priority patent/WO2020037564A1/zh
Publication of WO2020037564A1 publication Critical patent/WO2020037564A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/80—Camera processing pipelines; Components thereof
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60—Control of cameras or camera modules

Definitions

  • Embodiments of the present invention relate to the field of image processing, and in particular, to an image processing method, apparatus, device, and storage medium.
  • the shooting device can capture images with multiple different resolutions for processing by the image processing device, but the resolutions of the images that can be processed by different image processing devices are different.
  • the image processing device cannot process the image.
  • software programming is usually used to reduce the resolution of the image, but because the resolution of the image is large, software programming will take a long time.
  • Embodiments of the present invention provide an image processing method, device, device, and storage medium to improve the processing speed for larger resolution images.
  • a first aspect of an embodiment of the present invention is to provide an image processing apparatus, the image processing apparatus includes: an image receiving circuit, an image pre-processing circuit, and an image processing circuit;
  • the image receiving circuit is configured to receive at least one frame image captured by the photographing device
  • the image preprocessing circuit is configured to perform segmentation processing on each frame image in the at least one frame image to obtain multiple sub images corresponding to each frame image;
  • the image processing circuit is configured to perform image processing on a plurality of sub-images corresponding to each frame image
  • the image receiving circuit, the image pre-processing circuit, and the image processing circuit are circuits executed in parallel.
  • a second aspect of the embodiments of the present invention is to provide an image processing method, which is applied to an image processing apparatus.
  • the image processing apparatus includes: an image receiving circuit, an image preprocessing circuit, and an image processing circuit; the method includes:
  • the image receiving circuit receives at least one frame image captured by the photographing device
  • the image preprocessing circuit performs segmentation processing on each frame image in the at least one frame image to obtain multiple sub images corresponding to each frame image;
  • the image processing circuit performs image processing on a plurality of sub-images corresponding to each frame image
  • the image receiving circuit, the image pre-processing circuit, and the image processing circuit are circuits executed in parallel.
  • a third aspect of the embodiments of the present invention is to provide a photographing device, including:
  • a photographing device installed on the fuselage and used to collect image information
  • a fourth aspect of the embodiments of the present invention is to provide an image processing device, including:
  • An antenna mounted on the fuselage and used to communicate with a photographing device
  • a fifth aspect of the embodiments of the present invention is to provide a movable platform, including:
  • a power unit mounted on the fuselage and configured to provide power to the movable platform
  • a photographing device installed on the fuselage and used to collect image information
  • a sixth aspect of the embodiments of the present invention is to provide a computer-readable storage medium on which a computer program is stored, and the computer program is executed by a processor to implement the method according to the second aspect.
  • the image processing method, device, device, and storage medium provided in this embodiment include an image receiving circuit, an image preprocessing circuit, and an image processing circuit through the image processing device.
  • the image receiving circuit is configured to receive at least one frame of image captured by the photographing device.
  • the image preprocessing circuit is used to perform segmentation processing on each frame image in at least one frame image to obtain multiple sub-images corresponding to each frame image; the image processing circuit is used to perform image processing on multiple sub-images corresponding to each frame image, and receive images
  • Circuits, image pre-processing circuits, and image processing circuits are circuits that are executed in parallel. By parallel execution of image receiving circuits, image pre-processing circuits, and image processing circuits, the processing speed of larger resolution images can be improved.
  • FIG. 1 is a structural diagram of an image processing apparatus according to an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of an application scenario provided by an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of image segmentation according to an embodiment of the present invention.
  • FIG. 4 is a structural diagram of another image processing apparatus according to an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of another image segmentation according to an embodiment of the present invention.
  • FIG. 6 is a flowchart of an image processing method according to an embodiment of the present invention.
  • FIG. 7 is a structural diagram of a photographing device according to an embodiment of the present invention.
  • FIG. 8 is a structural diagram of an image processing apparatus according to an embodiment of the present invention.
  • 700 shooting equipment; 701: fuselage; 702: shooting device;
  • 703 image processing device
  • 800 image processing equipment
  • 801 fuselage; 802: antenna; 803: image processing device.
  • a component when a component is called “fixed to” another component, it may be directly on another component or a centered component may exist. When a component is considered to be “connected” to another component, it can be directly connected to another component or a centered component may exist at the same time.
  • FIG. 1 is a structural diagram of an image processing apparatus according to an embodiment of the present invention.
  • the image processing apparatus 10 includes an image receiving circuit 11, an image pre-processing circuit 12, and an image processing circuit 13.
  • the image receiving circuit 11 is configured to receive at least one frame of image captured by the shooting device;
  • the image preprocessing circuit 12 is configured to perform segmentation processing on each frame of the at least one frame of image to obtain multiple sub-images corresponding to each frame of image;
  • the image processing circuit 13 is configured to perform image processing on a plurality of sub-images corresponding to each frame of the image.
  • the image receiving circuit, the image pre-processing circuit, and the image processing circuit are circuits executed in parallel.
  • the image receiving circuit 11, the image pre-processing circuit 12, and the image processing circuit 13 may be mutually coordinated IPs.
  • the image receiving circuit 11 may be described as IP_A
  • the image pre-processing circuit 12 may be described as IP_B
  • the image processing circuit 13 may be Recorded as IP_C.
  • the process of receiving the image by the image receiving circuit 11, the process of pre-processing the image by the image pre-processing circuit 12, such as the process of segmentation, and the process of the image processing by the image processing circuit 13 of the divided sub-images may be performed in parallel.
  • the parallel execution may be that the image receiving circuit 11 receives the image at time T1, the image preprocessing circuit 12 performs the preprocessing of the image received by the image receiving circuit 11 at the time T2, and the image receiving circuit 11 receives the new image at the time T2, and so on. It can be understood that the foregoing embodiment is only a case of parallel execution, and other parallel execution methods may also be used.
  • the image processing apparatus 10 and the photographing apparatus may be integrated in the same device.
  • the image processing apparatus 10 and the photographing apparatus are integrated in a photographing apparatus at the same time, and the photographing apparatus may be a camera, a video camera, or another Functional devices such as smart terminals.
  • the shooting device may be a handheld shooting device or a shooting device mounted on a movable platform such as a drone.
  • the image processing device 10 and the photographing device are integrated in different devices.
  • the image processing device 10 is integrated in a remote controller, and the photographing device is integrated in the photographing device.
  • the remote controller can perform control.
  • the photographing device 21 is mounted on the drone 20 through the gimbal 22, and the remote controller 24 can control the photographing device 21.
  • the remote controller 24 may be a dedicated controller corresponding to the drone, or may be another terminal device installed with a control program, such as a smart phone or a tablet computer.
  • the remote controller 24 and the photographing device 21 can perform wired communication or wireless communication.
  • the drone 20 includes a communication interface 23, and the remote controller 24 includes a communication interface 25.
  • the communication interface 23 and the communication interface 25 can communicate with each other.
  • the shooting device 21 may send the image information captured by the shooting device 21 to the remote controller 24 through the communication interface 23.
  • the remote controller 24 and the photographing device 21 can perform wireless communication.
  • the communication interface 23 and the communication interface 25 are wireless communication interfaces.
  • the remote controller 24 further includes an antenna 26.
  • the antenna 26 is coupled to the communication interface 25.
  • the antenna 26 is configured to receive and / or send wireless signals.
  • the shooting device can collect image information in real time and send the captured image information to the image receiving circuit 11 through a corresponding image transmission protocol.
  • the image collected by the shooting device is not limited to one frame. There may be multiple frames.
  • the image receiving circuit 11 receives at least one frame of image sent by the photographing device.
  • the shooting device can capture images with multiple resolutions.
  • the shooting device can capture images with a resolution of Video Graphics Array (VGA), 720p, 1080p.
  • VGA Video Graphics Array
  • the image processing circuit 13 is used to perform image processing on the image received by the image receiving circuit 11. However, the image processing circuit 13 can only process images with a resolution lower than VGA and VGA.
  • the image pre-processing circuit 12 is used to perform segmentation processing on the image received by the image receiving circuit 11 with a resolution greater than VGA, so that The image is divided into a resolution that the image processing circuit 13 can process.
  • the image pre-processing circuit 12 divides an image with a resolution greater than VGA into sub-images with a resolution equal to or less than VGA, so that the image processing circuit 13 can perform a normal image on the sub-image obtained after the image pre-processing circuit 12 divides. deal with.
  • an image 30 represents a frame of image received by the image receiving circuit 11, and the image is any one of a plurality of frames of images captured by the photographing device.
  • the resolution of the image 30 is greater than VGA, and the image preprocessing circuit 12 performs segmentation processing on the image 30 to obtain multiple sub-images corresponding to the image 30, such as the sub-image 31, the sub-image 32, the sub-image 33, and the sub-image 34.
  • the resolution of the sub-image 31, sub-image 32, sub-image 33, and sub-image 34 is equal to or less than VGA.
  • the image processing circuit 13 can perform image processing on the sub-image 31, sub-image 32, sub-image 33, and sub-image 34.
  • the image receiving circuit is further configured to: after receiving at least one frame image captured by the camera, store the at least one frame image in a memory.
  • the image processing apparatus 10 further includes a memory, and the memory may specifically be a double-rate synchronous dynamic random access memory (Double Data Rate).
  • the image receiving circuit 11 may store the at least one frame of image in the memory.
  • the image receiving circuit 11 receives an image 30 as shown in FIG. 3, the image receiving circuit 11 stores the image 30 into the memory. Accordingly, the image pre-processing circuit 12 obtains image data from the memory.
  • the method for the image preprocessing circuit 12 to obtain image data from the memory may include the following feasible implementation manners:
  • a feasible implementation manner is that the image receiving circuit sends identification information to the image preprocessing circuit, where the identification information is used to identify a storage address of the at least one frame of image in the memory and the at least one The resolution of the frame image.
  • the image receiving circuit 11 After the image receiving circuit 11 stores the image 30 in the memory, the image receiving circuit 11 generates an identification information according to the storage address of the image 30 in the memory and the resolution of the image 30, and sends the identification information to the image Pre-processing circuit 12.
  • the identification information is used to identify a storage address of the image 30 in the memory and a resolution of the image 30.
  • the image pre-processing circuit 12 may determine the storage address of the image 30 in the memory and the resolution of the image 30 according to the identification information, and further read from the memory according to the storage address of the image 30 in the memory. Take this image 30.
  • Another feasible implementation manner is that the image receiving circuit sends the storage address of the at least one frame of image in the memory and the resolution of the at least one frame of image to the image preprocessing circuit.
  • the image receiving circuit 11 directly sends the storage address of the image 30 in the memory and the resolution of the image 30 to the image pre-processing circuit 12 so that the image The pre-processing circuit 12 reads the image 30 from the memory according to the storage address of the image 30 in the memory.
  • the image pre-processing circuit obtains the at least one frame of image from the memory according to the storage address of the at least one frame of image in the memory; the image pre-processing circuit When performing segmentation processing on each frame of the image to obtain multiple sub-images corresponding to each frame of the image, the method is specifically used to: according to the resolution of each frame of the at least one frame of image and the resolution supported by the image processing circuit Performing segmentation processing on each frame image to obtain multiple sub images corresponding to each frame image.
  • the image pre-processing circuit 12 determines the image 30 in the memory according to the identification information.
  • the address and the resolution of the image 30 are stored, and the image 30 is obtained from the memory according to the storage address of the image 30 in the memory.
  • the image preprocessing circuit 12 directly receives the storage address of the image 30 and the resolution of the image 30 sent by the image receiving circuit 11 and obtains the image 30 from the memory according to the storage address of the image 30 in the memory. .
  • the image pre-processing circuit 12 After the image pre-processing circuit 12 obtains the image 30 from the memory, it further divides the image 30 according to the resolution of the image 30 and the resolution supported by the image processing circuit 13 to obtain the image shown in FIG. 3. Multiple sub-images, and the resolution of the multiple sub-images is a resolution supported by the image processing circuit 13. It can be understood that the image 30 is merely used as an example for illustration. In other embodiments, the image receiving circuit 11 is not limited to storing one frame of image to the memory, and may also store multiple frames of image to the memory. Similarly, the image The pre-processing circuit 12 is not limited to performing segmentation processing on one frame of images, and may also perform segmentation processing on each of the multiple frames of images stored by the image receiving circuit 11 in the memory.
  • the image preprocessing circuit is further configured to: store a plurality of sub-images corresponding to each frame of the image into the memory; and store a plurality of sub-images corresponding to each frame of the image in the memory.
  • the storage address is sent to the image processing circuit.
  • the image pre-processing circuit 12 may further divide the multiple sub-images such as sub-image 31, sub-image 32, sub-image 33,
  • the sub-image 34 is stored in the memory.
  • the storage addresses of the sub-image 31, sub-image 32, sub-image 33, and sub-image 34 in the memory are consecutive, or the sub-image 31, sub-image 32, sub-image 33, and sub-image 34 are stored in the memory.
  • the storage addresses of are discontinuous, but the storage addresses of any one of the sub-images in the memory are consecutive.
  • the image pre-processing circuit 12 may also send the storage address of each of the multiple sub-images in the memory to the image processing circuit 13.
  • the image processing apparatus includes an image receiving circuit, an image preprocessing circuit, and an image processing circuit.
  • the image receiving circuit is configured to receive at least one frame of an image captured by the shooting device; the image preprocessing circuit is configured to process at least one frame of the image.
  • the image processing circuit is used to perform image processing on the multiple sub-images corresponding to each frame of image.
  • the image receiving circuit, image pre-processing circuit, and image processing circuit are executed in parallel. The parallel processing of the image receiving circuit, the image pre-processing circuit and the image processing circuit can improve the processing speed of larger resolution images.
  • a method for segmenting an image captured by a photographing device may be set in advance.
  • the image processing device 10 may be preset to divide an image photographed by the photographing device into several sub-images, a resolution of each sub-image, The position information of each sub-image in the image, and the target address where each sub-image is written into the memory.
  • the image receiving circuit sends identification information to the image preprocessing circuit, and the identification information is not only used to identify a storage address of the at least one frame of image in the memory and the at least one frame of the image.
  • the resolution of a frame of image is also used to identify at least one of the following: the number of sub-images to be divided into the image, the resolution of the sub-image, and the The location information in the image and the sub-image need to be written into the target address of the memory.
  • the image receiving circuit 11 when the image receiving circuit 11 stores the image 30 in the memory, the image receiving circuit 11 sends identification information to the image preprocessing circuit 12, and the identification information is not only used to identify the storage address of the image 30 in the memory and the image 30
  • the identification information may also identify the number of sub-images into which the image 30 set in advance by the image processing device 10 needs to be divided, the resolution of each sub-image, the position information of each sub-image in the image 30, and Each sub-image needs to be written to the destination address of the memory.
  • the image receiving circuit sends a storage address of the at least one frame of image in the memory and a resolution of the at least one frame of image to the image preprocessing circuit.
  • the image receiving circuit is further configured to send at least one of the following to the image preprocessing circuit: the number of sub-images to be divided into the image, the resolution of the sub-image, and the sub-image in the image. Location information and the sub-image need to be written into the target address of the memory.
  • the image receiving circuit 11 stores the image 30 in the memory
  • the image receiving circuit 11 directly stores the address of the image 30 in the memory
  • the resolution of the image 30, and the image 30 set in advance by the image processing device 10 needs The number of divided sub-images, the resolution of each sub-image, the position information of each sub-image in the image 30, and the target address of each sub-image to be written to the memory are sent to the image pre-processing circuit 12.
  • the image pre-processing circuit performs segmentation processing on each frame image in the at least one frame image to obtain multiple sub-images corresponding to each frame image, and is specifically configured to: The number of sub-images, and performing segmentation processing on the images to obtain multiple sub-images corresponding to the images.
  • the image pre-processing circuit 12 When the image pre-processing circuit 12 receives the identification information sent by the image receiving circuit 11 as described above, or the image pre-processing circuit 12 receives the storage address of the image 30 and the image 30 of the image 30 sent by the image receiving circuit 11 Resolution, the number of sub-images into which the image 30 set in advance by the image processing device 10 needs to be divided, the resolution of each sub-image, the position information of each sub-image in the image 30, and the target to which each sub-image needs to be written into the memory At the address, the image pre-processing circuit 12 performs segmentation processing on the image 30 according to the number of sub-images to be divided into the image 30 set in advance by the image processing device 10.
  • the image pre-processing circuit is further configured to write a plurality of sub-images corresponding to the image into corresponding target addresses according to a target address to which the sub-image needs to be written into the memory.
  • the image pre-processing circuit 12 may further perform Each sub-image needs to be written to the destination address of the memory, each sub-image obtained after the segmentation process is written to the corresponding destination address in the memory, and each sub-image is written to the corresponding destination address stored in the memory and sent to the image processing A circuit 13 so that the image processing circuit 13 can obtain the plurality of sub-images from the memory.
  • an image pre-processing circuit is used to divide the image to obtain multiple sub-images corresponding to the image according to the number of sub-images that the image needs to be divided into. Each sub-image is written into the corresponding target address, so that the image pre-processing circuit can perform image segmentation according to a preset image segmentation method, which improves the efficiency of image segmentation.
  • FIG. 4 is a structural diagram of another image processing apparatus according to an embodiment of the present invention.
  • the image pre-processing circuit 12 includes a first sub-circuit 121 and a second sub-circuit. 122.
  • the first sub-circuit uses the first configuration information to perform segmentation processing on the image
  • the second sub-circuit receives second configuration information; when the first sub-circuit sends multiple sub-images corresponding to the image
  • the second sub-circuit performs segmentation processing on the next frame image of the image by using the second configuration information.
  • the first sub-circuit 121 and the second sub-circuit 122 may be two circuits executed in parallel.
  • the first sub-circuit 121 and the second sub-circuit 122 support dynamic configuration.
  • the second sub-circuit 122 can receive the second configuration information, so that the second sub-circuit 122 uses the second configuration information to perform segmentation processing on the next frame of the image 30 That is, the first sub-circuit 121 and the second sub-circuit 122 may perform different segmentation processing on different images by using different configuration information.
  • the second sub-circuit 122 may use the second configuration information to divide the next frame of the image 30 deal with.
  • the first sub-circuit 121 sends the target addresses in the memory of the multiple sub-images obtained after the image 30 is divided to the image processing circuit 13
  • the second sub-circuit 122 may use the second configuration information to The next frame image is segmented.
  • the image receiving circuit receives at least one frame of the image captured by the shooting device, it is specifically configured to receive two frames of the image captured by the shooting device at the same time.
  • the photographing device may specifically be a binocular camera, that is, the photographing device can obtain two left and right frames of images at the same time.
  • the photographing device can obtain two left and right frames of images at the same time.
  • at least one of the two frames of images is depth. Illustration.
  • the image 50 and the image 52 respectively represent two frames of images obtained by the shooting device at the same time. Accordingly, the image receiving circuit 11 receives the image 50 and the image 52 and stores the image 50 and the image 52 to The memory stores the storage addresses of the images 50 and 52 in the memory and the resolutions of the images 50 and 52 to the image pre-processing circuit 12.
  • the image pre-processing circuit when the image pre-processing circuit performs segmentation processing on each frame image in the at least one frame image to obtain multiple sub-images corresponding to each frame image, the image pre-processing circuit is specifically configured to: Each frame image in the frame image is segmented to obtain multiple sub-images corresponding to each frame image.
  • the image pre-processing circuit 12 obtains the images 50 and 52 from the memory according to the storage addresses of the images 50 and 52 in the memory, assuming that the resolutions of the images 50 and 52 are 1080P, respectively, and the image processing circuit 13 does not support processing
  • the image pre-processing circuit 12 performs segmentation processing on the image 50 and the image 52, for example, the image 50 is divided into a sub-image A1, a sub-image A2, a sub-image A3, and a sub-image A4.
  • the image 52 is divided into a sub-image B1, a sub-image B2, a sub-image B3, and a sub-image B4.
  • the image pre-processing circuit 12 stores a plurality of sub-images corresponding to the image 50 and a plurality of sub-images corresponding to the image 52 to a memory, and stores the storage addresses of the plurality of sub-images corresponding to the image 50 in the memory, and a plurality of addresses corresponding to the image 52.
  • the storage addresses of the sub-images in the memory are sent to the image processing circuit 13.
  • the image processing circuit 13 performs image processing on the sub-image A1 and the sub-image B1 to obtain the sub-image C1, and performs image processing on the sub-image A2 and the sub-image B2 to obtain the sub-image C2.
  • Sub-image A3 and sub-image B3 are subjected to image processing to obtain sub-image C3
  • sub-image A4 and sub-image B4 are subjected to image processing to obtain sub-image C4.
  • the image processing circuit 13 combines the sub-image C1, the sub-image C2, the sub-image C3, and the sub-image C4 into the target image 54, or the IP after the image processing circuit 13 combines the sub-image C1, the sub-image C2, and the sub-image
  • the image C3 and the sub-image C4 are combined into a target image 54.
  • the target image 54 is an image of 1080P.
  • the image pre-processing circuit 12 may not only perform segmentation processing on the image received by the image receiving circuit 11, but may also perform other processing such as Gaussian filtering on the image received by the image receiving circuit 11.
  • the image pre-processing circuit 12 when it performs segmentation processing on the image received by the image receiving circuit 11, it may be specifically implemented by using down-sampling or up-sampling.
  • the image pre-processing circuit includes a first sub-circuit and a second sub-circuit.
  • the first sub-circuit uses the first configuration information to perform segmentation processing on the image
  • the second sub-circuit receives the second Configuration information; when the first sub-circuit sends multiple sub-images corresponding to the image to the image processing circuit, the second sub-circuit uses the second configuration information for the next frame of the image
  • the segmentation processing is performed so that the first sub-circuit and the second sub-circuit can be executed in parallel, which further improves the processing speed for larger resolution images.
  • FIG. 6 is a flowchart of an image processing method according to an embodiment of the present invention.
  • the image processing method is applied to an image processing apparatus.
  • the image processing apparatus includes an image receiving circuit, an image preprocessing circuit, and an image processing circuit.
  • the method in this embodiment may include:
  • Step S601 The image receiving circuit receives at least one frame image captured by a photographing device.
  • Step S602 The image preprocessing circuit performs segmentation processing on each frame image in the at least one frame image to obtain multiple sub images corresponding to each frame image.
  • Step S603 The image processing circuit performs image processing on a plurality of sub-images corresponding to each frame of the image.
  • the image receiving circuit, the image pre-processing circuit, and the image processing circuit are circuits executed in parallel.
  • the image receiving circuit stores the at least one frame image in a memory.
  • the method for obtaining image data from the memory by the image pre-processing circuit may include the following feasible implementation manners:
  • a feasible implementation manner is that the image receiving circuit sends identification information to the image preprocessing circuit, where the identification information is used to identify a storage address of the at least one frame of image in the memory and the at least one The resolution of the frame image.
  • Another feasible implementation manner is that the image receiving circuit sends the storage address of the at least one frame of image in the memory and the resolution of the at least one frame of image to the image preprocessing circuit.
  • the image pre-processing circuit obtains the at least one frame of image from the memory according to the storage address of the at least one frame of image in the memory; the image pre-processing circuit Segmenting each frame of the image to obtain multiple sub-images corresponding to each frame of the image includes: the image pre-processing circuit according to the resolution of each frame of the at least one frame of image and the resolution supported by the image processing circuit Rate, performing segmentation processing on the image of each frame to obtain multiple sub-images corresponding to the image of each frame.
  • the image pre-processing circuit may further store a plurality of sub-images corresponding to each frame of the image in the memory; the image pre-processing circuit stores the plurality of sub-images corresponding to each frame of the image in the memory.
  • a storage address in the memory is sent to the image processing circuit.
  • the image processing apparatus includes: an image receiving circuit, an image preprocessing circuit, and an image processing circuit, wherein the image receiving circuit is configured to receive at least one frame of an image captured by the photographing device; and the image processing circuit is configured to process at least one frame Each frame of the image is segmented to obtain multiple sub-images corresponding to each frame of the image; the image processing circuit is used to perform image processing on the multiple sub-images corresponding to each frame of the image.
  • the image receiving circuit, image pre-processing circuit, and image processing circuit are The parallel execution circuit can improve the processing speed of larger resolution images through the parallel execution of the image receiving circuit, the image pre-processing circuit and the image processing circuit.
  • An embodiment of the present invention provides an image processing method.
  • a method for segmenting an image captured by a shooting device may be set in advance.
  • the image processing device may be preset to divide an image captured by the shooting device into several sub-images, a resolution of each sub-image, The position information of each sub-image in the image, and the target address where each sub-image is written into the memory.
  • the image receiving circuit sends identification information to the image preprocessing circuit, and the identification information is not only used to identify a storage address of the at least one frame of image in the memory and the at least one frame of the image.
  • the resolution of a frame of image is also used to identify at least one of the following: the number of sub-images to be divided into the image, the resolution of the sub-image, and the The location information in the image and the sub-image need to be written into the target address of the memory.
  • the image receiving circuit sends a storage address of the at least one frame of image in the memory and a resolution of the at least one frame of image to the image preprocessing circuit.
  • the image receiving circuit is further configured to send at least one of the following to the image preprocessing circuit: the number of sub-images to be divided into the image, the resolution of the sub-image, and the sub-image in the image. Location information and the sub-image need to be written into the target address of the memory.
  • the image pre-processing circuit performs segmentation processing on each frame of the at least one frame of images to obtain multiple sub-images corresponding to each frame of the image, including: the image pre-processing circuit according to the image requirements The number of divided sub-images, and performing segmentation processing on the image to obtain a plurality of sub-images corresponding to the image.
  • the image pre-processing circuit is further configured to write a plurality of sub-images corresponding to the image into corresponding target addresses according to a target address to which the sub-image needs to be written into the memory.
  • an image pre-processing circuit is used to divide the image to obtain multiple sub-images corresponding to the image according to the number of sub-images that the image needs to be divided into. Each sub-image is written into the corresponding target address, so that the image pre-processing circuit can perform image segmentation according to a preset image segmentation method, which improves the efficiency of image segmentation.
  • the image pre-processing circuit includes: a first sub-circuit and a second sub-circuit; when the first sub-circuit uses the first configuration information to perform segmentation processing on the image, the first Two sub-circuits receive second configuration information; when the first sub-circuit sends multiple sub-images corresponding to the image to the image processing circuit, the second sub-circuit uses the second configuration information to The next frame of the image is divided.
  • the image receiving circuit receives at least one frame of image captured by the shooting device, and includes: the image receiving circuit receives two frames of image captured by the shooting device at the same time.
  • the image pre-processing circuit performs segmentation processing on each frame of the at least one frame of images to obtain multiple sub-images corresponding to each frame of the image, including: the image pre-processing circuit performs segmentation on the two frames of images.
  • Each frame of image is divided into multiple sub-images corresponding to each frame of image.
  • At least one of the two frames of images is a depth map.
  • the image pre-processing circuit includes a first sub-circuit and a second sub-circuit.
  • the first sub-circuit uses the first configuration information to perform segmentation processing on the image
  • the second sub-circuit receives the second Configuration information; when the first sub-circuit sends multiple sub-images corresponding to the image to the image processing circuit, the second sub-circuit uses the second configuration information for the next frame of the image
  • the segmentation processing is performed so that the first sub-circuit and the second sub-circuit can be executed in parallel, which further improves the processing speed for larger resolution images.
  • FIG. 7 is a structural diagram of a photographing device according to an embodiment of the present invention.
  • the photographing device 700 includes a body 701, a photographing device 702, and an image processing device 703.
  • the photographing device 702 is installed in the body. It is used to collect image information; the specific principle and implementation of the image processing device 703 are similar to the above embodiments, and are not repeated here.
  • FIG. 8 is a structural diagram of an image processing device according to an embodiment of the present invention.
  • the image processing device 800 includes a body 801, an antenna 802, and an image processing device 803.
  • the antenna 802 is installed in the body. Is used to communicate with the shooting device; the specific principle and implementation of the image processing device 803 are similar to the above embodiments, and are not repeated here.
  • An embodiment of the present invention provides a movable platform, and the movable platform may be an unmanned aerial vehicle, an unmanned vehicle, an unmanned ship, an intelligent vehicle, and the like.
  • the movable platform includes: a fuselage, a power device, a photographing device, and a retreat processing device; wherein the power device and the fuselage are installed on the fuselage for powering the movable platform; the photographing device is installed on the machine It is used to collect image information; the specific principle and implementation of the image processing device are similar to the above embodiments, and will not be repeated here.
  • an embodiment of the present invention further provides a computer-readable storage medium on which a computer program is stored, and the computer program is executed by a processor to implement the image processing method as described above.
  • the disclosed apparatus and method may be implemented in other manners.
  • the device embodiments described above are only schematic.
  • the division of the unit is only a logical function division.
  • multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, which may be electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, may be located in one place, or may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objective of the solution of this embodiment.
  • each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist separately physically, or two or more units may be integrated into one unit.
  • the above integrated unit may be implemented in the form of hardware, or in the form of hardware plus software functional units.
  • the above integrated unit implemented in the form of a software functional unit may be stored in a computer-readable storage medium.
  • the software functional unit is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) or a processor to execute the methods described in the embodiments of the present invention. Some steps.
  • the aforementioned storage media include: U disks, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks or compact discs, and other media that can store program codes .

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Abstract

本发明实施例提供一种图像处理方法、装置、设备及存储介质，图像处理装置包括：图像接收电路、图像预处理电路、图像处理电路；图像接收电路用于接收拍摄装置拍摄的至少一帧图像；图像预处理电路用于对至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像；图像处理电路用于对每帧图像对应的多个子图像进行图像处理；其中，图像接收电路、图像预处理电路和图像处理电路是并行执行的电路。本发明实施例通过图像处理装置包括图像接收电路、图像预处理电路和图像处理电路，通过图像接收电路、图像预处理电路和图像处理电路的并行执行，可提高对较大分辨率图像的处理速度。

Description

图像处理方法、装置、设备及存储介质 技术领域
本发明实施例涉及图像处理领域，尤其涉及一种图像处理方法、装置、设备及存储介质。
背景技术
现有技术中拍摄装置可拍摄获得多种不同分辨率的图像，以便图像处理装置进行处理，但是不同图像处理装置可处理的图像的分辨率不同。
如果该拍摄装置拍摄获得的图像的分辨率较大，而该图像处理装置可处理的图像的分辨率较小，将会导致该图像处理装置无法对该图像进行处理。为了能够使得该图像处理装置能够对该图像进行处理，通常采用软件编程的方式降低图像的分辨率，但是由于图像的分辨率较大，通过软件编程的方式会消耗较长时间。
发明内容
本发明实施例提供一种图像处理方法、装置、设备及存储介质，以提高对较大分辨率图像的处理速度。
本发明实施例的第一方面是提供一种图像处理装置，所述图像处理装置包括：图像接收电路、图像预处理电路、图像处理电路；
所述图像接收电路用于接收拍摄装置拍摄的至少一帧图像；
所述图像预处理电路用于对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像；
所述图像处理电路用于对所述每帧图像对应的多个子图像进行图像处理；
其中，所述图像接收电路、所述图像预处理电路和所述图像处理电路是并行执行的电路。
本发明实施例的第二方面是提供一种图像处理方法，应用于图像处理装置，所述图像处理装置包括：图像接收电路、图像预处理电路、图像处 理电路；所述方法包括：
所述图像接收电路接收拍摄装置拍摄的至少一帧图像；
所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像；
所述图像处理电路对所述每帧图像对应的多个子图像进行图像处理；
其中，所述图像接收电路、所述图像预处理电路和所述图像处理电路是并行执行的电路。
本发明实施例的第三方面是提供一种拍摄设备，包括：
机身；
拍摄装置，安装在所述机身，用于采集图像信息；
以及如第一方面所述的图像处理装置。
本发明实施例的第四方面是提供一种图像处理设备，包括：
机身；
天线，安装在所述机身，用于与拍摄设备进行通讯；
以及如第一方面所述的图像处理装置。
本发明实施例的第五方面是提供一种可移动平台，包括：
机身；
动力装置，安装在所述机身，用于为所述可移动平台提供动力；
拍摄装置，安装在所述机身，用于采集图像信息；
以及如第一方面所述的图像处理装置。
本发明实施例的第六方面是提供一种计算机可读存储介质，其上存储有计算机程序，所述计算机程序被处理器执行以实现如第二方面所述的方法。
本实施例提供的图像处理方法、装置、设备及存储介质，通过图像处理装置包括图像接收电路、图像预处理电路和图像处理电路，其中，图像接收电路用于接收拍摄装置拍摄的至少一帧图像；图像预处理电路用于对至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像；图像处理电路用于对每帧图像对应的多个子图像进行图像处理，图像接收电路、图像预处理电路和图像处理电路是并行执行的电路，通过图像接收电路、图像预处理电路和图像处理电路的并行执行，可提高对较大分 辨率图像的处理速度。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的图像处理装置的结构图；
图2为本发明实施例提供的一种应用场景的示意图；
图3为本发明实施例提供的一种图像分割的示意图；
图4为本发明实施例提供的另一种图像处理装置的结构图；
图5为本发明实施例提供的另一种图像分割的示意图；
图6为本发明实施例提供的图像处理方法的流程图；
图7为本发明实施例提供的拍摄设备的结构图；
图8为本发明实施例提供的图像处理设备的结构图。
附图标记：
10：图像处理装置；   11：图像接收电路；    12：图像预处理电路；
13：图像处理电路；   20：无人机；          21：拍摄设备；
22：云台；           23：通讯接口；        24：远程控制器；
25：通讯接口；       26：天线；            30：图像；
31：子图像；         32：子图像；          33：子图像；
34：子图像；         121：第一子电路；     122：第二子电路；
50：图像；           52：图像；            54：目标图像；
700：拍摄设备；      701：机身；           702：拍摄装置；
703：图像处理装置；  800：图像处理设备；
801：机身；          802：天线；           803：图像处理装置。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不 是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
需要说明的是，当组件被称为“固定于”另一个组件，它可以直接在另一个组件上或者也可以存在居中的组件。当一个组件被认为是“连接”另一个组件，它可以是直接连接到另一个组件或者可能同时存在居中组件。
除非另有定义，本文所使用的所有的技术和科学术语与属于本发明的技术领域的技术人员通常理解的含义相同。本文中在本发明的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本发明。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。
下面结合附图，对本发明的一些实施方式作详细说明。在不冲突的情况下，下述的实施例及实施例中的特征可以相互组合。
本发明实施例提供一种图像处理装置。图1为本发明实施例提供的图像处理装置的结构图，如图1所示，图像处理装置10包括：图像接收电路11、图像预处理电路12、图像处理电路13。其中，图像接收电路11用于接收拍摄装置拍摄的至少一帧图像；图像预处理电路12用于对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像；图像处理电路13用于对所述每帧图像对应的多个子图像进行图像处理。
在本实施例中，所述图像接收电路、所述图像预处理电路和所述图像处理电路是并行执行的电路。具体的，图像接收电路11、图像预处理电路12、图像处理电路13可以是相互协同的IP，例如图像接收电路11可以记为IP_A,图像预处理电路12可以记为IP_B,图像处理电路13可以记为IP_C。
图像接收电路11对图像的接收的过程、图像预处理电路12对图像的预处理例如分割处理的过程，以及图像处理电路13对分割后的子图像的图像处理的过程可以是并行执行的。
其中，并行执行可以是T1时刻图像接收电路11接收图像，T2时刻图像预处理电路12对图像接收电路11接收的图像进行预处理，而图像接收电路11在T2时刻接收新的图像，以此类推；可以理解的是，上述实施例 只是并行执行的一种情况，也可以使用其他并行执行的方法。
在本实施例中，图像处理装置10和拍摄装置可以集成在同一个设备中，例如，图像处理装置10和拍摄装置同时集成在拍摄设备中，该拍摄设备可以是相机、摄像机、或其他具有拍摄功能的设备例如智能终端等。另外，该拍摄设备可以是手持的拍摄设备，也可以是搭载在可移动平台例如无人机上的拍摄设备。
在其他实施例中，图像处理装置10和拍摄装置集成在不同的设备中，例如，图像处理装置10集成在远程控制器中，拍摄装置集成在拍摄设备中，该远程控制器可对拍摄设备进行控制。例如，如图2所示，拍摄设备21通过云台22搭载在无人机20上，远程控制器24可对拍摄设备21进行控制。可选的，远程控制器24可以是无人机对应的专用控制器，也可以是其他安装有控制程序的终端设备，例如智能手机、平板电脑等。远程控制器24和拍摄设备21可以进行有线通信或无线通信。如图2所示，无人机20包括通讯接口23，远程控制器24包括通讯接口25，通讯接口23和通讯接口25可以相互通信。例如，拍摄设备21可以通过通讯接口23将其拍摄到的图像信息发送给远程控制器24。在一些实施例中，远程控制器24和拍摄设备21可以进行无线通信，可选的，通讯接口23和通讯接口25为无线通讯接口。如图2所示，远程控制器24还包括天线26，天线26和通讯接口25耦合，天线26用于接收和/或发送无线信号。
如图1所示，拍摄装置可实时的采集图像信息，并将其采集到的图像信息通过相应的图像传输协议发送给图像接收电路11，可以理解，拍摄装置采集到的图像不限于一帧，可以是多帧，相应的，图像接收电路11接收拍摄装置发送的至少一帧图像。可选的，该拍摄装置可拍摄多种不同分辨率的图像，例如，该拍摄装置可拍摄分辨率为视频传输标准(Video Graphics Array，VGA)、720p、1080p的图像。图像处理电路13用于对该图像接收电路11接收到的图像进行图像处理，但是，图像处理电路13只能处理VGA及VGA以下分辨率的图像，当图像接收电路11接收到分辨率大于VGA的图像时，图像处理电路13将无法处理该分辨率大于VGA的图像。为了能够使图像处理电路13进行正常的图像处理，在本实施例中，通过图像预处理电路12对图像接收电路11接收到的分辨率大于VGA的图 像进行分割处理，以便将分辨率大于VGA的图像分割为图像处理电路13能够处理的分辨率。例如，图像预处理电路12将分辨率大于VGA的图像分割为分辨率等于VGA或小于VGA的子图像，从而使得图像处理电路13可以对图像预处理电路12分割后得到的子图像进行正常的图像处理。
如图3所示，图像30表示图像接收电路11接收到的一帧图像，该图像是拍摄装置拍摄的多帧图像中的任一帧。图像30的分辨率大于VGA，图像预处理电路12将图像30进行分割处理得到该图像30对应的多个子图像例如子图像31、子图像32、子图像33、子图像34。子图像31、子图像32、子图像33、子图像34的分辨率等于VGA或小于VGA，图像处理电路13可以对子图像31、子图像32、子图像33、子图像34进行图像处理。
可选的，所述图像接收电路还用于：在接收拍到所述摄装置拍摄的至少一帧图像之后，将所述至少一帧图像存储到存储器中。
如图1所示，图像处理装置10还包括存储器，该存储器具体可以是双倍速率同步动态随机存储器(Double Data Rate，DDR)。当图像接收电路11接收到拍摄装置发送的至少一帧图像时，图像接收电路11可以将该至少一帧图像存储到该存储器中。例如，当图像接收电路11接收到如图3所示的图像30时，图像接收电路11将该图像30存储到该存储器中。相应的，图像预处理电路12从该存储器中获取图像数据。
在本实施例中，图像预处理电路12从该存储器中获取图像数据的方法可以包括如下几种可行的实现方式：
一种可行的实现方式是，所述图像接收电路向所述图像预处理电路发送标识信息，所述标识信息用于标识所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率。
例如，当图像接收电路11将该图像30存储到该存储器后，图像接收电路11根据图像30在该存储器中的存储地址和图像30的分辨率生成一个标识信息，并将该标识信息发送给图像预处理电路12。该标识信息用于标识该图像30在该存储器中的存储地址和图像30的分辨率。相应的，图像预处理电路12可根据该标识信息确定该图像30在该存储器中的存储地址和图像30的分辨率，并进一步根据该图像30在该存储器中的存储地址，从该存储器中读取该图像30。
另一种可行的实现方式是，所述图像接收电路向所述图像预处理电路发送所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率。
例如，当图像接收电路11将该图像30存储到该存储器后，图像接收电路11直接将该图像30在该存储器中的存储地址和图像30的分辨率发送给图像预处理电路12，从而使得图像预处理电路12根据该图像30在该存储器中的存储地址，从该存储器中读取该图像30。
相应的，所述图像预处理电路根据所述至少一帧图像在所述存储器中的存储地址，从所述存储器中获取所述至少一帧图像；所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像时，具体用于：根据所述至少一帧图像中每帧图像的分辨率和所述图像处理电路支持的分辨率，对所述每帧图像进行分割处理得到所述每帧图像对应的多个子图像。
例如，图像预处理电路12接收到图像接收电路11发送的用于标识图像30在该存储器中的存储地址和图像30的分辨率的标识信息后，根据该标识信息确定图像30在该存储器中的存储地址和图像30的分辨率，并根据图像30在该存储器中的存储地址从该存储器中获取该图像30。或者，图像预处理电路12直接接收图像接收电路11发送的图像30在该存储器中的存储地址和图像30的分辨率，并根据图像30在该存储器中的存储地址从该存储器中获取该图像30。
在图像预处理电路12从该存储器中获取到该图像30后，进一步根据该图像30的分辨率和图像处理电路13所支持的分辨率，对该图像30进行分割处理得到如图3所示的多个子图像，且该多个子图像的分辨率是图像处理电路13所支持的分辨率。可以理解，此处只是以图像30为例进行示意性说明，在其他实施例中，图像接收电路11不限于将一帧图像存储到存储器，还可以将多帧图像存储到存储器，同理，图像预处理电路12不限于对一帧图像进行分割处理，还可以对图像接收电路11存储到该存储器中的多帧图像中的每帧图像进行分割处理。
在一些实施例中，所述图像预处理电路还用于：将所述每帧图像对应的多个子图像存储到所述存储器；将所述每帧图像对应的多个子图像在所 述存储器中的存储地址发送给所述图像处理电路。
如图1和图3所示，当图像预处理电路12将图像30分割为多个子图像后，图像预处理电路12还可以将该多个子图像例如子图像31、子图像32、子图像33、子图像34存储到该存储器中。具体的，子图像31、子图像32、子图像33、子图像34在该存储器中的存储地址是连续的，或者，子图像31、子图像32、子图像33、子图像34在该存储器中的存储地址是不连续的，但是其中任一个子图像在该存储器中的存储地址是连续的。另外，图像预处理电路12还可以将多个子图像中每个子图像在该存储器中的存储地址发送给图像处理电路13。
本实施例通过图像处理装置包括图像接收电路、图像预处理电路和图像处理电路，其中，图像接收电路用于接收拍摄装置拍摄的至少一帧图像；图像预处理电路用于对至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像；图像处理电路用于对每帧图像对应的多个子图像进行图像处理，图像接收电路、图像预处理电路和图像处理电路是并行执行的电路，通过图像接收电路、图像预处理电路和图像处理电路的并行执行，可提高对较大分辨率图像的处理速度。
在本实施例中，对拍摄装置拍摄的图像进行分割的方法可以预先设置的，例如，图像处理装置10可预先设置将该拍摄装置拍摄的图像分割为几个子图像、每个子图像的分辨率、每个子图像在该图像中的位置信息、以及每个子图像被写入存储器的目标地址。
作为一种可行的实现方式，所述图像接收电路向所述图像预处理电路发送标识信息，所述标识信息不仅用于标识所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率，可选的，所述标识信息还用于标识如下至少一种：所述图像需分割成的子图像的个数、所述子图像的分辨率、所述子图像在所述图像中的位置信息、所述子图像需写入所述存储器的目标地址。
例如，当图像接收电路11将该图像30存储到该存储器后，图像接收电路11向图像预处理电路12发送标识信息，该标识信息不仅用于标识图像30在该存储器中的存储地址和图像30的分辨率，另外，该标识信息还 可以标识图像处理装置10预先设置的图像30需分割成的子图像的个数、每个子图像的分辨率、每个子图像在图像30中的位置信息、以及每个子图像需写入存储器的目标地址。
作为另一种可行的实现方式，所述图像接收电路向所述图像预处理电路发送所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率，另外，所述图像接收电路还用于向所述图像预处理电路发送如下至少一种：所述图像需分割成的子图像的个数、所述子图像的分辨率、所述子图像在所述图像中的位置信息、所述子图像需写入所述存储器的目标地址。
例如，当图像接收电路11将该图像30存储到该存储器后，图像接收电路11直接将该图像30在该存储器中的存储地址、图像30的分辨率、图像处理装置10预先设置的图像30需分割成的子图像的个数、每个子图像的分辨率、每个子图像在图像30中的位置信息、以及每个子图像需写入存储器的目标地址发送给图像预处理电路12。
在一些实施例中，所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像时，具体用于：根据所述图像需分割成的子图像的个数，对所述所述图像进行分割处理得到所述图像对应的多个子图像。
当图像预处理电路12接收到图像接收电路11发送的如上所述的标识信息，或者，图像预处理电路12接收到图像接收电路11发送的该图像30在该存储器中的存储地址、图像30的分辨率、图像处理装置10预先设置的图像30需分割成的子图像的个数、每个子图像的分辨率、每个子图像在图像30中的位置信息、以及每个子图像需写入存储器的目标地址时，图像预处理电路12根据图像处理装置10预先设置的图像30需分割成的子图像的个数对该图像30进行分割处理。
另外，所述图像预处理电路还用于：根据所述子图像需写入所述存储器的目标地址，将所述图像对应的多个子图像写入相应的目标地址。
当图像预处理电路12根据图像处理装置10预先设置的图像30需分割成的子图像的个数对该图像30进行分割处理后，图像预处理电路12还可以进一步按照图像处理装置10预先设置的每个子图像需写入存储器的 目标地址，将分割处理后得到的每个子图像写入到该存储器中相应的目标地址，并将每个子图像写在该存储器中对应存储的目标地址发送给图像处理电路13，以使图像处理电路13可以从该存储器中获取该多个子图像。
本实施例通过图像预处理电路根据图像需分割成的子图像的个数，对图像进行分割处理得到图像对应的多个子图像，以及根据子图像需写入存储器的目标地址，将图像对应的多个子图像写入相应的目标地址，使得图像预处理电路可以按照预先设置的图像分割方法进行图像分割，提高了图像分割的效率。
本发明实施例提供一种图像处理装置。图4为本发明实施例提供的另一种图像处理装置的结构图，如图4所示，在上述实施例的基础上，图像预处理电路12包括：第一子电路121和第二子电路122。当所述第一子电路采用第一配置信息对所述图像进行分割处理时，所述第二子电路接收第二配置信息；当所述第一子电路将所述图像对应的多个子图像发送给所述图像处理电路时，所述第二子电路采用所述第二配置信息对所述图像的下一帧图像进行分割处理。
如图4所示，第一子电路121和第二子电路122可以是并行执行的两个电路，可选的，第一子电路121和第二子电路122支持动态配置，例如，在第一子电路121采用第一配置信息对图像30进行分割处理时，第二子电路122可接收第二配置信息，使得第二子电路122采用第二配置信息对图像30的下一帧图像进行分割处理，也就是说，第一子电路121和第二子电路122可分别采用不同的配置信息对不同的图像进行分割处理。另外，当第一子电路121将图像30被分割后得到的多个子图像发送给图像处理电路13的同时，第二子电路122可采用该第二配置信息对图像30的下一帧图像进行分割处理。或者，当第一子电路121将图像30被分割后得到的多个子图像在存储器中的目标地址发送给图像处理电路13的同时，第二子电路122可采用该第二配置信息对图像30的下一帧图像进行分割处理。
另外，所述图像接收电路接收拍摄装置拍摄的至少一帧图像时，具体用于：接收所述拍摄装置在同一时刻拍摄的两帧图像。
在本实施例中，拍摄装置具体可以是双目摄像头，也就是说，该拍摄装置在同一时刻可拍摄获得左右两帧图像，可选的，所述两帧图像中的至少一帧图像为深度图。
如图5所示，图像50和图像52分别表示该拍摄装置在同一时刻拍摄获得的两帧图像，相应的，图像接收电路11接收该图像50和图像52，并将图像50和图像52存储到存储器中，并将图像50和图像52在该存储器中的存储地址、以及图像50和图像52的分辨率发送给图像预处理电路12。
可选的，所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像时，具体用于：所述图像预处理电路对所述两帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像。
图像预处理电路12根据图像50和图像52在该存储器中的存储地址，从该存储器中获取图像50和图像52，假设图像50和图像52的分辨率分别为1080P，图像处理电路13不支持处理分辨率为1080P的图像，可选的，图像预处理电路12分别对图像50和图像52进行分割处理，例如，将图像50分割为子图像A1、子图像A2、子图像A3、子图像A4，将图像52分割为子图像B1、子图像B2、子图像B3、子图像B4。假设子图像A1、子图像A2、子图像A3、子图像A4、子图像B1、子图像B2、子图像B3、子图像B4的分辨率分别为VGA。进一步，图像预处理电路12将图像50对应的多个子图像和图像52对应的多个子图像存储到存储器，并将图像50对应的多个子图像在该存储器中的存储地址、以及图像52对应的多个子图像在该存储器中的存储地址发送给图像处理电路13，图像处理电路13对子图像A1和子图像B1进行图像处理得到子图像C1，对子图像A2和子图像B2进行图像处理得到子图像C2，对子图像A3和子图像B3进行图像处理得到子图像C3，对子图像A4和子图像B4进行图像处理得到子图像C4。可选的，图像处理电路13将子图像C1、子图像C2、子图像C3、子图像C4合成为目标图像54，或者，由图像处理电路13之后的IP将子图像C1、子图像C2、子图像C3、子图像C4合成为目标图像54。该目标图像54为1080P的图像。
另外，在其他实施例中，图像预处理电路12不仅可以对图像接收电 路11接收到的图像进行分割处理，还可以对图像接收电路11接收到的图像进行其他处理例如高斯滤波。另外，图像预处理电路12对图像接收电路11接收到的图像进行分割处理时，具体可以采用下采样或上采样来实现。
本实施例通过图像预处理电路包括：第一子电路和第二子电路，当所述第一子电路采用第一配置信息对所述图像进行分割处理时，所述第二子电路接收第二配置信息；当所述第一子电路将所述图像对应的多个子图像发送给所述图像处理电路时，所述第二子电路采用所述第二配置信息对所述图像的下一帧图像进行分割处理，使得第一子电路和第二子电路可以并行执行，进一步提高了对较大分辨率图像的处理速度。
本发明实施例提供一种图像处理方法。图6为本发明实施例提供的图像处理方法的流程图。该图像处理方法应用于图像处理装置，如图1所示，所述图像处理装置包括：图像接收电路、图像预处理电路、图像处理电路。如图6所示，本实施例中的方法，可以包括：
步骤S601、所述图像接收电路接收拍摄装置拍摄的至少一帧图像。
步骤S602、所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像。
步骤S603、所述图像处理电路对所述每帧图像对应的多个子图像进行图像处理。
其中，所述图像接收电路、所述图像预处理电路和所述图像处理电路是并行执行的电路。
可选的，所述图像接收电路在接收到所述拍摄装置拍摄的至少一帧图像之后，将所述至少一帧图像存储到存储器中。
在本实施例中，所述图像预处理电路从该存储器中获取图像数据的方法可以包括如下几种可行的实现方式：
一种可行的实现方式是，所述图像接收电路向所述图像预处理电路发送标识信息，所述标识信息用于标识所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率。
另一种可行的实现方式是，所述图像接收电路向所述图像预处理电路 发送所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率。
相应的，所述图像预处理电路根据所述至少一帧图像在所述存储器中的存储地址，从所述存储器中获取所述至少一帧图像；所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像，包括：所述图像预处理电路根据所述至少一帧图像中每帧图像的分辨率和所述图像处理电路支持的分辨率，对所述每帧图像进行分割处理得到所述每帧图像对应的多个子图像。
在一些实施例中，所述图像预处理电路还可以将所述每帧图像对应的多个子图像存储到所述存储器；所述图像预处理电路将所述每帧图像对应的多个子图像在所述存储器中的存储地址发送给所述图像处理电路。
本发明实施例提供的图像处理方法的具体原理和实现方式均与图1所示实施例类似，此处不再赘述。
本实施例提供的图像处理装置包括：图像接收电路、图像预处理电路和图像处理电路，其中，图像接收电路用于接收拍摄装置拍摄的至少一帧图像；图像预处理电路用于对至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像；图像处理电路用于对每帧图像对应的多个子图像进行图像处理，图像接收电路、图像预处理电路和图像处理电路是并行执行的电路，通过图像接收电路、图像预处理电路和图像处理电路的并行执行，可提高对较大分辨率图像的处理速度。
本发明实施例提供一种图像处理方法。在本实施例中，对拍摄装置拍摄的图像进行分割的方法可以预先设置的，例如，图像处理装置可预先设置将该拍摄装置拍摄的图像分割为几个子图像、每个子图像的分辨率、每个子图像在该图像中的位置信息、以及每个子图像被写入存储器的目标地址。
作为一种可行的实现方式，所述图像接收电路向所述图像预处理电路发送标识信息，所述标识信息不仅用于标识所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率，可选的，所述标识信息还用于标识如下至少一种：所述图像需分割成的子图像的个数、所述子图像 的分辨率、所述子图像在所述图像中的位置信息、所述子图像需写入所述存储器的目标地址。
作为另一种可行的实现方式，所述图像接收电路向所述图像预处理电路发送所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率，另外，所述图像接收电路还用于向所述图像预处理电路发送如下至少一种：所述图像需分割成的子图像的个数、所述子图像的分辨率、所述子图像在所述图像中的位置信息、所述子图像需写入所述存储器的目标地址。
在一些实施例中，所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像，包括：所述图像预处理电路根据所述图像需分割成的子图像的个数，对所述所述图像进行分割处理得到所述图像对应的多个子图像。
另外，所述图像预处理电路还用于：根据所述子图像需写入所述存储器的目标地址，将所述图像对应的多个子图像写入相应的目标地址。
本发明实施例提供的图像处理方法的具体原理和实现方式均与上述实施例类似，此处不再赘述。
本实施例通过图像预处理电路根据图像需分割成的子图像的个数，对图像进行分割处理得到图像对应的多个子图像，以及根据子图像需写入存储器的目标地址，将图像对应的多个子图像写入相应的目标地址，使得图像预处理电路可以按照预先设置的图像分割方法进行图像分割，提高了图像分割的效率。
本发明实施例提供一种图像处理方法。在上述实施例的基础上，所述图像预处理电路包括：第一子电路和第二子电路；当所述第一子电路采用第一配置信息对所述图像进行分割处理时，所述第二子电路接收第二配置信息；当所述第一子电路将所述图像对应的多个子图像发送给所述图像处理电路时，所述第二子电路采用所述第二配置信息对所述图像的下一帧图像进行分割处理。
可选的，所述图像接收电路接收拍摄装置拍摄的至少一帧图像，包括：所述图像接收电路接收所述拍摄装置在同一时刻拍摄的两帧图像。
可选的，所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像，包括：所述图像预处理电路对所述两帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像。
可选的，所述两帧图像中的至少一帧图像为深度图。
本发明实施例提供的图像处理方法的具体原理和实现方式均与图4、图5所示实施例类似，此处不再赘述。
本实施例通过图像预处理电路包括：第一子电路和第二子电路，当所述第一子电路采用第一配置信息对所述图像进行分割处理时，所述第二子电路接收第二配置信息；当所述第一子电路将所述图像对应的多个子图像发送给所述图像处理电路时，所述第二子电路采用所述第二配置信息对所述图像的下一帧图像进行分割处理，使得第一子电路和第二子电路可以并行执行，进一步提高了对较大分辨率图像的处理速度。
本发明实施例提供一种拍摄设备。图7为本发明实施例提供的拍摄设备的结构图，如图7所示，拍摄设备700包括机身701、拍摄装置702和图像处理装置703，其中，拍摄装置702安装在所述机身，用于采集图像信息；图像处理装置703的具体原理和实现方式均与上述实施例类似，此处不再赘述。
本发明实施例提供一种图像处理设备。该图像处理设备可以是上述实施例中所述的远程控制器。图8为本发明实施例提供的图像处理设备的结构图，如图8所示，图像处理设备800包括：机身801、天线802和图像处理装置803；其中，天线802安装在所述机身，用于与拍摄设备进行通讯；图像处理装置803的具体原理和实现方式均与上述实施例类似，此处不再赘述。
本发明实施例提供一种可移动平台，所述可移动平台可以是无人飞行器、无人车、无人船、智能载具等。所述可移动平台包括：机身、动力装置、拍摄装置和退昂处理装置；其中动力装置和安装在所述机身，用于为 所述可移动平台提供动力；拍摄装置安装在所述机身，用于采集图像信息；图像处理装置的具体原理和实现方式均与上述实施例类似，此处不再赘述。
此外，本发明实施例还提供一种计算机可读存储介质，其上存储有计算机程序，所述计算机程序被处理器执行以实现如上所述的图像处理方法。
在本发明所提供的几个实施例中，应该理解到，所揭露的装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本发明各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用硬件加软件功能单元的形式实现。
上述以软件功能单元的形式实现的集成的单元，可以存储在一个计算机可读取存储介质中。上述软件功能单元存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)或处理器(processor)执行本发明各个实施例所述方法的部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
本领域技术人员可以清楚地了解到，为描述的方便和简洁，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成，即将装置的内部结构划分成不同的功能模 块，以完成以上描述的全部或者部分功能。上述描述的装置的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (32)

  1. 一种图像处理装置，其特征在于，所述图像处理装置包括：图像接收电路、图像预处理电路、图像处理电路；
    所述图像接收电路用于接收拍摄装置拍摄的至少一帧图像；
    所述图像预处理电路用于对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像；
    所述图像处理电路用于对所述每帧图像对应的多个子图像进行图像处理；
    其中，所述图像接收电路、所述图像预处理电路和所述图像处理电路是并行执行的电路。
  2. 根据权利要求1所述的图像处理装置，其特征在于，所述图像接收电路还用于：
    在接收拍到所述摄装置拍摄的至少一帧图像之后，将所述至少一帧图像存储到存储器中。
  3. 根据权利要求2所述的图像处理装置，其特征在于，所述图像接收电路还用于：
    向所述图像预处理电路发送标识信息，所述标识信息用于标识所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率。
  4. 根据权利要求2所述的图像处理装置，其特征在于，所述图像接收电路还用于：
    向所述图像预处理电路发送所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率。
  5. 根据权利要求3或4所述的图像处理装置，其特征在于，
    所述图像预处理电路还用于：根据所述至少一帧图像在所述存储器中的存储地址，从所述存储器中获取所述至少一帧图像；
    所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像时，具体用于：
    根据所述至少一帧图像中每帧图像的分辨率和所述图像处理电路支持的分辨率，对所述每帧图像进行分割处理得到所述每帧图像对应的多个子图像。
  6. 根据权利要求5所述的图像处理装置，其特征在于，所述图像预处理电路还用于：
    将所述每帧图像对应的多个子图像存储到所述存储器；
    将所述每帧图像对应的多个子图像在所述存储器中的存储地址发送给所述图像处理电路。
  7. 根据权利要求3所述的图像处理装置，其特征在于，所述标识信息还用于标识如下至少一种：
    所述图像需分割成的子图像的个数、所述子图像的分辨率、所述子图像在所述图像中的位置信息、所述子图像需写入所述存储器的目标地址。
  8. 根据权利要求4所述的图像处理装置，其特征在于，所述图像接收电路还用于向所述图像预处理电路发送如下至少一种：
    所述图像需分割成的子图像的个数、所述子图像的分辨率、所述子图像在所述图像中的位置信息、所述子图像需写入所述存储器的目标地址。
  9. 根据权利要求7或8所述的图像处理装置，其特征在于，
    所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像时，具体用于：
    根据所述图像需分割成的子图像的个数，对所述所述图像进行分割处理得到所述图像对应的多个子图像。
  10. 根据权利要求9所述的图像处理装置，其特征在于，所述图像预处理电路还用于：
    根据所述子图像需写入所述存储器的目标地址，将所述图像对应的多个子图像写入相应的目标地址。
  11. 根据权利要求1-10任一项所述的图像处理装置，其特征在于，
    所述图像预处理电路包括：第一子电路和第二子电路；
    当所述第一子电路采用第一配置信息对所述图像进行分割处理时，所述第二子电路接收第二配置信息；
    当所述第一子电路将所述图像对应的多个子图像发送给所述图像处理电路时，所述第二子电路采用所述第二配置信息对所述图像的下一帧图像进行分割处理。
  12. 根据权利要求1-10任一项所述的图像处理装置，其特征在于， 所述图像接收电路接收拍摄装置拍摄的至少一帧图像时，具体用于：
    接收所述拍摄装置在同一时刻拍摄的两帧图像。
  13. 根据权利要求12所述的图像处理装置，其特征在于，所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像时，具体用于：
    所述图像预处理电路对所述两帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像。
  14. 根据权利要求12或13所述的图像处理装置，其特征在于，所述两帧图像中的至少一帧图像为深度图。
  15. 一种图像处理方法，应用于图像处理装置，其特征在于，所述图像处理装置包括：图像接收电路、图像预处理电路、图像处理电路；所述方法包括：
    所述图像接收电路接收拍摄装置拍摄的至少一帧图像；
    所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像；
    所述图像处理电路对所述每帧图像对应的多个子图像进行图像处理；
    其中，所述图像接收电路、所述图像预处理电路和所述图像处理电路是并行执行的电路。
  16. 根据权利要求15所述的方法，其特征在于，所述图像接收电路在接收到所述拍摄装置拍摄的至少一帧图像之后，将所述至少一帧图像存储到存储器中。
  17. 根据权利要求16所述的方法，其特征在于，所述方法还包括：
    所述图像接收电路向所述图像预处理电路发送标识信息，所述标识信息用于标识所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率。
  18. 根据权利要求16所述的方法，其特征在于，所述方法还包括：
    所述图像接收电路向所述图像预处理电路发送所述至少一帧图像在所述存储器中的存储地址和所述至少一帧图像的分辨率。
  19. 根据权利要求16或17所述的方法，其特征在于，所述方法还包括：
    所述图像预处理电路根据所述至少一帧图像在所述存储器中的存储地址，从所述存储器中获取所述至少一帧图像；
    所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像，包括：
    所述图像预处理电路根据所述至少一帧图像中每帧图像的分辨率和所述图像处理电路支持的分辨率，对所述每帧图像进行分割处理得到所述每帧图像对应的多个子图像。
  20. 根据权利要求19所述的方法，其特征在于，所述方法还包括：
    所述图像预处理电路将所述每帧图像对应的多个子图像存储到所述存储器；
    所述图像预处理电路将所述每帧图像对应的多个子图像在所述存储器中的存储地址发送给所述图像处理电路。
  21. 根据权利要求17所述的方法，其特征在于，所述标识信息还用于标识如下至少一种：
    所述图像需分割成的子图像的个数、所述子图像的分辨率、所述子图像在所述图像中的位置信息、所述子图像需写入所述存储器的目标地址。
  22. 根据权利要求18所述的方法，其特征在于，所述图像接收电路还向所述图像预处理电路发送如下至少一种：
    所述图像需分割成的子图像的个数、所述子图像的分辨率、所述子图像在所述图像中的位置信息、所述子图像需写入所述存储器的目标地址。
  23. 根据权利要求17或18所述的方法，其特征在于，所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像，包括：
    所述图像预处理电路根据所述图像需分割成的子图像的个数，对所述所述图像进行分割处理得到所述图像对应的多个子图像。
  24. 根据权利要求23所述的方法，其特征在于，所述方法还包括：
    所述图像预处理电路根据所述子图像需写入所述存储器的目标地址，将所述图像对应的多个子图像写入相应的目标地址。
  25. 根据权利要求15-24任一项所述的方法，其特征在于，
    所述图像预处理电路包括：第一子电路和第二子电路；
    当所述第一子电路采用第一配置信息对所述图像进行分割处理时，所述第二子电路接收第二配置信息；
    当所述第一子电路将所述图像对应的多个子图像发送给所述图像处理电路时，所述第二子电路采用所述第二配置信息对所述图像的下一帧图像进行分割处理。
  26. 根据权利要求25所述的方法，其特征在于，所述图像接收电路接收拍摄装置拍摄的至少一帧图像，包括：
    所述图像接收电路接收所述拍摄装置在同一时刻拍摄的两帧图像。
  27. 根据权利要求26所述的方法，其特征在于，所述图像预处理电路对所述至少一帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像，包括：
    所述图像预处理电路对所述两帧图像中的每帧图像进行分割处理得到每帧图像对应的多个子图像。
  28. 根据权利要求26或27所述的方法，其特征在于，所述两帧图像中的至少一帧图像为深度图。
  29. 一种拍摄设备，其特征在于，包括：
    机身；
    拍摄装置，安装在所述机身，用于采集图像信息；
    以及
    权利要求1-14任一项所述的图像处理装置。
  30. 一种图像处理设备，其特征在于，包括：
    机身；
    天线，安装在所述机身，用于与拍摄设备进行通讯；
    以及
    权利要求1-14任一项所述的图像处理装置。
  31. 一种可移动平台，其特征在于，包括：
    机身；
    动力装置，安装在所述机身，用于为所述可移动平台提供动力；
    拍摄装置，安装在所述机身，用于采集图像信息；
    以及
    权利要求1-14任一项所述的图像处理装置。
  32. 一种计算机可读存储介质，其特征在于，其上存储有计算机程序，所述计算机程序被处理器执行以实现如权利要求1-14任一项所述的方法。
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