WO2020029682A1 - 一种面板缺陷分析方法、装置、存储介质及网络设备 - Google Patents

一种面板缺陷分析方法、装置、存储介质及网络设备 Download PDF

Info

Publication number
WO2020029682A1
WO2020029682A1 PCT/CN2019/091087 CN2019091087W WO2020029682A1 WO 2020029682 A1 WO2020029682 A1 WO 2020029682A1 CN 2019091087 W CN2019091087 W CN 2019091087W WO 2020029682 A1 WO2020029682 A1 WO 2020029682A1
Authority
WO
WIPO (PCT)
Prior art keywords
defect
image
panel
circuit
template
Prior art date
Application number
PCT/CN2019/091087
Other languages
English (en)
French (fr)
Inventor
冀永楠
Original Assignee
腾讯科技(深圳)有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 腾讯科技(深圳)有限公司 filed Critical 腾讯科技(深圳)有限公司
Publication of WO2020029682A1 publication Critical patent/WO2020029682A1/zh

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/0002Inspection of images, e.g. flaw detection
    • G06T7/0004Industrial image inspection
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/10Segmentation; Edge detection
    • G06T7/11Region-based segmentation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/20Special algorithmic details
    • G06T2207/20081Training; Learning
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/20Special algorithmic details
    • G06T2207/20084Artificial neural networks [ANN]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/30Subject of image; Context of image processing
    • G06T2207/30108Industrial image inspection
    • G06T2207/30121CRT, LCD or plasma display

Definitions

  • the present application relates to the technical field of panel inspection, and in particular, to a method, an apparatus, a storage medium, and a network device for analyzing panel defects.
  • TFT-LCD Thin Film Transistor
  • LCD Thin Film Transistor
  • the embodiments of the present application provide a panel defect analysis method, device, and storage medium, which are intended to improve the accuracy and efficiency of panel defect analysis.
  • a panel defect analysis method performed by a network device including:
  • Circuit region segmentation of the panel image according to a preset strategy to obtain a circuit segmentation image including a plurality of circuit regions
  • the circuit region where the defect is located is intercepted from the circuit segmentation image to obtain an image to be analyzed;
  • the effect of the defect on the circuit in the panel is analyzed to obtain a defect analysis result.
  • a panel defect analysis device includes:
  • An obtaining unit configured to obtain a panel image corresponding to a panel to be analyzed
  • a detection unit configured to detect a defect in the panel image to obtain a position and a type of the defect
  • a segmenting unit configured to segment the panel image according to a preset strategy to obtain a circuit segmented image including a plurality of circuit regions
  • a intercepting unit configured to intercept the circuit area where the defect is located from the circuit segmented image according to the position of the defect to obtain an image to be analyzed
  • An analysis unit is configured to analyze, through a machine learning model and based on the image to be analyzed and the type of the defect, an influence of the defect on a circuit in the panel to obtain a defect analysis result.
  • a storage medium stores processor-executable instructions. When the instructions are executed by one or more processors, the panel defect analysis method is implemented.
  • a network device including one or more processors; and,
  • the memory is configured to store one or more programs, and when the one or more programs are executed by the one or more processors, cause the one or more processors to implement the foregoing panel defect analysis method.
  • FIG. 1 is a schematic diagram of a panel defect analysis method according to an embodiment of the present application
  • FIG. 2 is a schematic flowchart of a panel defect analysis method according to an embodiment of the present application.
  • FIG. 3 is a schematic diagram of a panel image provided by an embodiment of the present application.
  • FIG. 4 is a schematic diagram of detecting a defect in a panel image according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of a defect segmentation image provided by an embodiment of the present application.
  • FIG. 6 is another schematic diagram of a defect segmentation image provided by an embodiment of the present application.
  • FIG. 7 is another schematic diagram of a defect segmentation image provided by an embodiment of the present application.
  • FIG. 8 (a) is a schematic diagram of a template provided in an embodiment of the present application.
  • FIG. 8 (b) is a schematic diagram of a target region obtained from a template according to an embodiment of the present application.
  • FIG. 9 is a schematic diagram of obtaining a circuit divided image by dividing a circuit region according to an embodiment of the present application.
  • FIG. 10 is a schematic diagram of adjusting a template image according to an embodiment of the present application.
  • FIG. 11 is a schematic diagram of a panel defect analysis provided by an embodiment of the present application.
  • FIG. 12 is another schematic flowchart of a panel defect analysis method according to an embodiment of the present application.
  • FIG. 13 is a schematic flowchart of segmenting a circuit region of a panel image according to an embodiment of the present application.
  • FIG. 14 is a schematic structural diagram of a panel defect analysis device according to an embodiment of the present application.
  • FIG. 15 is another schematic structural diagram of a panel defect analysis device according to an embodiment of the present application.
  • 16 is another schematic structural diagram of a panel defect analysis device according to an embodiment of the present application.
  • FIG. 17 is a schematic structural diagram of a network device according to an embodiment of the present application.
  • the embodiments of the present application provide a panel defect analysis method, a device, a storage medium, and a network device.
  • FIG. 1 is a schematic diagram of a panel defect analysis method provided by an embodiment of the present application.
  • the panel defect analysis method can be applied to a panel defect analysis device.
  • the panel defect analysis device can be specifically integrated into a network device such as a terminal or In a device such as a server, for example, a network device may obtain a panel image corresponding to a panel to be analyzed, and the panel may be a TFT-LCD panel or an integrated circuit panel, etc., and detect defects in the panel image to obtain the location and type of the defect.
  • the positions corresponding to defect 1, defect 2, and defect 3 can be detected, and the type corresponding to defect 1 is the presence of foreign objects (such as fibrous objects), and the type corresponding to defect 2 is abrasion (such as surface Friction), the corresponding type of defect 3 is scratch (for example, deep scratch of sharp object) and the like.
  • the panel image can be divided into circuit regions according to a preset strategy to obtain a circuit divided image including multiple circuit regions.
  • a template including a target circuit region can be obtained, and the panel image can be template-matched according to the template according to a preset strategy to obtain Match the position, and perform circuit region segmentation on the panel image according to the matching position and the target circuit region to obtain a circuit segmented image including a plurality of circuit regions.
  • the circuit area can be divided according to components, and the area where each component is located can correspond to a circuit area, for example, the areas where component A, component B, component C, or component D in Figure 1 are located. It is a circuit area, or the circuit area may be divided in other ways. Then, according to the position of the defect, the circuit segmented image can be intercepted to obtain the image to be analyzed.
  • scenario diagram of the panel defect analysis method shown in FIG. 1 is only an example, and the scenario of the panel defect analysis method described in the embodiment of the present application is to more clearly illustrate the technical solution of the embodiment of the present application. It constitutes a limitation on the technical solutions provided by the embodiments of the present application. Those skilled in the art can know that with the evolution of the panel defect analysis method and the emergence of new business scenarios, the technical solutions provided by the embodiments of the present application are similar to similar technical problems. Be applicable.
  • a panel defect analysis device which can be specifically integrated into a network device such as a server or a terminal.
  • a panel defect analysis method includes: acquiring a panel image corresponding to a panel to be analyzed; detecting defects in the panel image to obtain the position and type of the defect; and dividing the circuit region of the panel image according to a preset strategy to obtain multiple Circuit segmentation image of each circuit area; from the circuit segmentation image based on the position of the defect, intercept the circuit area where the defect is located to obtain the image to be analyzed; through the machine learning model and based on the image to be analyzed and the type of defect, analyze the defect on the circuit in the panel The effect of the defect analysis results.
  • FIG. 2 is a schematic flowchart of a panel defect analysis method performed by a network device according to an embodiment of the present application.
  • the panel defect analysis method may include:
  • step S101 a panel image corresponding to a panel to be analyzed is acquired.
  • the panel image acquisition method may include: pre-setting an image acquisition device (such as a camera or a camera) on the production line of the production panel, and in the process of panel production, the image acquisition device is used to collect real-time or preset intervals for analysis The panel image corresponding to the panel; or obtain a pre-stored panel image from the local storage space of the panel defect analysis device; or send an image acquisition request to the image storage server and receive the panel returned by the image storage server based on the image acquisition request Images, etc.
  • panel images can also be obtained by other methods, and the specific acquisition methods are not limited here.
  • the panel may include a TFT-LCD panel, an LCD panel, an integrated circuit panel, or a chip panel, or other types of panels.
  • the panel may include a circuit area and a non-circuit area.
  • the oblique line portion in FIG. 3 may be a non-circuit area, and the non- oblique line portion may be a circuit area.
  • step S102 a defect in the panel image is detected to obtain a position and a type of the defect.
  • the defects in the panel image can be detected through a deep learning network.
  • a convolutional neural network or a region detection convolutional neural network can be used to detect the panel image. Defects in the panel are detected; or, defects in the panel image can be detected by an image segmentation method, and the specific detection method can be flexibly set according to actual needs.
  • detecting the defects in the panel image, and obtaining the location and type of the defects may include:
  • Feature detection is used to extract the defects in the panel image using a preset detection model to obtain the defect characteristics; the type of the defect is determined according to the defect characteristics; and the panel image is subjected to pixel segmentation according to the defect characteristics to obtain the defect segmented image; the pixels in the defect segmented image are extracted The area where the value is a preset value is set as the position of the defect.
  • a preset detection model may be used for detection.
  • the preset detection model may be Mask-RCNN or other detection models.
  • this application is implemented in this application.
  • the detection in a panel image using Mask-RCNN will be described as an example.
  • model training is required: collecting multiple sample images corresponding to the panel containing defects to obtain a training sample set; wherein each sample image may include one or more different defects, and include a variety of components
  • the sample image A includes defect 1
  • the sample image B includes defect 1 and defect 2
  • the sample image C includes defect 3, defect 4, and defect 5, and the like is included in each sample image in advance. Mark the location and type of the defect.
  • the defect prediction value may include the defect position and defect type calculated by Mask-RCNN.
  • Mask-RCNN may be used. RCNN performs feature extraction on the defects in the panel image to obtain the defect features, and determines the type of the defect and the position of the defect according to the defect feature.
  • the defect position may be a coordinate position or a pixel position, etc.
  • the defect type may include a foreign object, Liquid residue, scratches, or abrasion.
  • the true defect value of each sample image is obtained, and the true defect value includes the defect location and defect type of the sample image in advance.
  • the defect prediction value and the defect true value can be converged to obtain the trained Mask-RCNN. That is, comparing the predicted value of the defect with the actual value of the defect (including comparing the predicted value of the defect position with the actual value of the defect position, and comparing the predicted value of the defect type with the actual value of the defect type), by reducing the difference between the predicted value of the defect and the actual value of the defect.
  • To continuously train the Mask-RCNN so that the parameters or weights of the Mask-RCNN can be adjusted to an appropriate value, and the trained Mask-RCNN can be obtained.
  • the trained Mask-RCNN is for any input Defective panel images can detect the position and type of the defect.
  • the trained Mask-RCNN is a preset detection model.
  • the Mask-RCNN after training can be used to perform defect detection on the panel image.
  • defect detection When no defect is detected in the panel image, it can be determined that the panel corresponding to the panel image is qualified, and subsequent steps need not be performed; when the panel is detected
  • feature extraction can be performed on the defects in the panel image to obtain the defect characteristics.
  • the defect characteristics of fibrous objects are slender filaments
  • the defect characteristics of scratches are the formation of deep dents, which are worn. Defects are characterized by the formation of superficial friction marks, and so on.
  • the type of the defect can be determined according to the defect characteristics, for example, the type of the defect can be determined as the presence of the fiber based on the defect characteristics of the fibrous object, or the type of the defect is determined as the scratch based on the defect characteristics of the scratch.
  • the type of defect 1 may be determined as the presence of fibrous objects according to the defect characteristics corresponding to defects 1, 2, and 3, respectively.
  • the type of defect 2 is abrasion
  • the type of defect 3 is scratch.
  • the panel image can be pixel-divided according to the defect characteristics to obtain a defect segmented image.
  • the defect segmented image can be used to segment defective and non-defective regions with different pixel values.
  • the size of the defect segmented image can be the same as the size of the panel image.
  • the defect segmentation image can be called a mask image.
  • a defect segmentation image containing a predetermined value to identify the defect can be output; when there are multiple types of defects in the panel image, a single image can be output that contains a number of different types respectively.
  • a defect segmentation image of a defect, or a defect segmentation image in which only one defect is identified can be output.
  • the area where the pixel value in the defect segmented image is a preset value is set as the position of the defect, and the type of the defect can also be marked in the defect segmented image, that is, the type to which the defect belongs is output.
  • the preset data value can be based on Actually, flexible settings are needed.
  • the pixel value of the defect area in the segmented image can be set to 1 and the pixel values of other areas can be set to 0.
  • the pixel value of the defect area or the pixel values of other areas can also be set separately.
  • the value is set to any value from 0 to N.
  • the value of N can be flexibly set according to actual needs.
  • the pixel value of the defect region in the defect segmented image can be set to 6 and the pixel values of other regions can be set to 1.
  • a defect segmentation image ie, a mask image
  • the mask image (a) containing defect 1 only, the mask image (b) containing defect 2 only, and the mask image (c) containing defect 3 are output respectively, where the pixels of the area where the defect is located in each mask image
  • the values can all be set to 1, and the pixel values of other areas are set to 0.
  • a mask image corresponding to each defect can be output, that is, output separately.
  • a mask image (d) including only defect 1 a mask image (e) including only defect 2, and a mask image (f) including only defect 3.
  • the pixel value of the area where the defect 1 is located in the mask image (d) can be set to 1, and the pixel values of the other area can be set to 0; the pixel value of the area where the defect 2 is located in the mask image (e) can be set to 2, and other The pixel value of the area is set to 0; the pixel value of the area where defect 3 is located in the mask image (f) can be set to 3, and the pixel values of other areas are set to 0.
  • the panel image when there are three kinds of defects such as defect 1, defect 2, and defect 3 in the panel image, when the panel image is pixel-divided, only one mask image can be output.
  • the pixel value of the area where defect 1 is located can be set to 1
  • the pixel value of the area where defect 2 is located can be set to 2
  • the pixel value of the area where defect 3 is located can be set to 3
  • the pixel values of other areas can be set to 0. In this way, the position and type of each defect can be known through the pixel values in the mask image.
  • step S103 the panel image is divided into circuit regions according to a preset strategy to obtain a circuit divided image including a plurality of circuit regions.
  • step S102 may be performed first, and then step S103 may be performed; or step S103 may be performed first, and then step S102 may be performed.
  • the panel image may include a circuit, and the circuit may be a collection of various components.
  • the components may include a transistor, a diode, a resistor, a capacitor, an inductor, a line connected between the two components, a potentiometer, and a heat sink.
  • Sensors, switches, etc. the circuit area may include the area where each component is located, for example, a triode area, a resistance area, a capacitance area, and a sensor area.
  • the preset strategy can be to divide the circuit area of the panel image according to the area where each component is located, or to train the deep learning network, and to divide the circuit area of the panel image according to the trained deep learning network, or use the image
  • the segmentation method divides the panel image into circuit regions, or divides the panel image into circuit regions based on template matching.
  • the specific strategy can be flexibly set according to actual needs, and is not limited here.
  • a circuit region segmentation of a panel image in a template matching manner is taken as an example for detailed description below.
  • the circuit region segmentation is performed on the panel image according to a preset strategy, and the step of obtaining a circuit segmentation image including a plurality of circuit regions may include:
  • a template needs to be obtained.
  • a preset template can be obtained from a local storage space of a panel defect analysis device or a server.
  • the method for obtaining a template can also be other methods, and the specific content is not limited here.
  • the preset template may be consistent with a local area in the panel image.
  • the template may include a target circuit area.
  • the target circuit area may be consistent with a part of the circuit area in the panel image.
  • the circuit area may be where the components in the circuit are located. For example, when the panel image is as shown in FIG. 3, there are multiple local areas that are the same in the panel image.
  • the template can be set to be consistent with the local area, as shown in FIG. 8 (a).
  • This template can include all types of components in the panel image. Then all components included in the template are labeled manually or automatically. Different components can be labeled with different labels. For example, different components can be labeled with different colors (for example, component A is marked with red and components B is marked with blue, etc.), or different components can be marked with different numbers or letters, or different components can be marked with different coordinate points, etc.
  • the template can also be set as a mask template image.
  • the pixel values of the regions where different components are located are different.
  • the pixel value of the area where component A is located is 1, and the component B is located.
  • the pixel value of the region of is 2 and the pixel value of the region where the component C is located is 3 and so on.
  • the circuit contained in the panel image is simple, only one template can be set; when the circuit contained in the panel image is more complicated, multiple templates can be set.
  • the embodiments of the present application the following will use Set a template as an example for detailed description. It can be understood that the embodiments of the present application are only for the convenience of describing the examples given, and should not be understood as limiting the number of templates, but no matter how many templates are set, the panel defect analysis The process is similar and can be understood according to this example.
  • the panel image can be template-matched according to the template according to a preset strategy to obtain a matching position.
  • the matching position can be the position of the local area in the panel image that has the highest similarity with the template.
  • the components in the panel find matching local areas in the panel image, and calculate the similarity between the local area and the template until the local area with the highest similarity is found.
  • the panel image can be divided into circuit areas according to the matching position and the target circuit area in the template.
  • the template can be set in the panel image in sequence based on the matching position, so that the seamless and non-overlapping settings are more common.
  • Each template can cover the panel image, and then the positions of the target circuit regions in the multiple templates are mapped to the positions of the circuit regions on the panel image, and the circuit regions are labeled at the corresponding positions of the panel image, that is, each element is
  • the device performs segmentation labeling to obtain a circuit segmentation image including a plurality of circuit regions.
  • the circuit segmented image can be marked with the position and type of each circuit area (ie, the position and type of each component).
  • the circuit segmented image can be used to segment the area where each component is located with different pixel values.
  • the circuit The size of the segmented image can be consistent with the size of the panel image.
  • the areas where the pixel values in the circuit-segmented image are different are set as the position of each component.
  • the type of each component can also be marked in the circuit-segmented image.
  • the preset data value can be based on actual needs. Make flexible settings, for example, the pixel value of the area where component D is 9 or the pixel value of the area where component E is 8 etc.
  • a panel image may include multiple components of the same type, for example, the component A of the same type may include components A1 to A5 located at different positions, etc.
  • the device B may include components B1 to B5 located at different positions, etc.
  • the same type of components C to G may also include components located at different positions.
  • components A1 to A5, components B1 to B5, components C1 to C5, components D1 to D5, components E1 to E4, and component F1 can be marked with different colors or numerical values or letters. Divide and classify to F4 and components G1 and G2, etc., to obtain a circuit segmentation image.
  • performing template matching on a panel image according to a template according to a preset strategy, and the step of obtaining a matching position may include:
  • a preset strategy multiple local regions with the same size as the template are intercepted from the panel image; the similarity between each local region and the template is calculated to obtain the similarity set; the corresponding maximum value is selected from the similarity set.
  • the matching position can be determined by calculating the similarity with the template. Specifically, in the process of determining the matching position, a preset strategy such as the size of the template and the target circuit area included in the template can be firstly determined. The panel image is divided to obtain a plurality of local regions consistent with the template size, and then the similarity between each local region and the template is calculated to obtain a similarity set. The similarity set includes the similarity corresponding to each local region. degree. Secondly, the local area with the highest similarity is selected from the similarity set to obtain the target local area.
  • a preset strategy such as the size of the template and the target circuit area included in the template can be firstly determined.
  • the panel image is divided to obtain a plurality of local regions consistent with the template size, and then the similarity between each local region and the template is calculated to obtain a similarity set.
  • the similarity set includes the similarity corresponding to each local region. degree.
  • the local area with the highest similarity is selected from the similarity set to obtain the target local
  • any one of the largest multiple similarities can be randomly selected As the target similarity, and determine the local area corresponding to the target similarity as the target local area, or select a position close to the middle of the panel image from the largest plurality of similarities according to a preset rule as the target similarity, The local area corresponding to the target similarity is determined as the target local area, etc., and finally the position of the target local area is the matching position.
  • performing template matching on a panel image according to a template according to a preset strategy, and the step of obtaining a matching position may include:
  • the preset area is intercepted from the template according to the preset strategy to obtain the target area. For example, as shown in FIG. 8 As shown in (b), a partial region without defects and rich in features can be intercepted from the template in FIG. 8 (a) as a target region, that is, a region including a large number of components is taken as a target region. It should be noted that only one preset area can be intercepted from the template as the target area, and multiple preset areas can be intercepted from the template as the target area. For example, when the template contains fewer components, the template can be extracted from the template.
  • the panel image can be divided according to the size of the target area, the components included in the target area, etc., to obtain a plurality of local areas with the same size as the target area, and then the area between each local area in the panel image and the target area is calculated. Similarity, and from the calculated similarity between each local area and the target area, the local area with the highest similarity is filtered out, and the position of the local area obtained at last is the matching position.
  • the target similarity When there are multiple similarities between the multiple local regions and the target region, all of them have the maximum similarity, and any one of the largest multiple similarities can be randomly selected as the target similarity, and the target similarity
  • the position of the corresponding local area is set as the matching position, or the position of the local area near the middle of the panel image selected according to a preset rule is set as the matching position, and so on.
  • the circuit region segmentation of the panel image according to the matching position and the target circuit region, and the step of obtaining a circuit segmentation image including a plurality of circuit regions may include:
  • the template image is composed of multiple templates that cover the panel image.
  • the panel image is divided into circuit areas based on the target circuit area contained in the template image to obtain multiple circuit areas.
  • the circuit divides the image.
  • the template in the process of dividing the panel image into a circuit region, after determining the matching position, the template can be aligned with the panel image according to the matching position, and a template image composed of multiple templates covering the panel image can be generated. Place the template at the matching position in the panel image, align the local area corresponding to the matching position in the panel image with the template, and then use the template at the matching position as the reference to move up, down, left, or right in the panel image Place other templates in sequence at other locations until multiple templates can cover the panel image. For example, you can use the template at the matching position as a reference to copy the template and move it to the top, bottom, left, or right of the panel image.
  • the obtained template aligns the template at the matching position with the edge of the moved template, and performs seamless and non-overlapping stitching.
  • Multiple templates are stitched to obtain a template image, and the size of the template image can be consistent with the size of the panel image.
  • the panel image is divided into circuit regions according to the target circuit region contained in the template image, and the position and type of the previously labeled circuit region, and a circuit segmented image including multiple circuit regions is obtained. For example, because the template image is labeled with The position and type of the circuit area are copied to the corresponding position of the panel image, so that all circuit areas in the panel image can be identified.
  • the circuit region segmentation of the panel image according to the target circuit region included in the template image, and the step of obtaining a circuit segmentation image including a plurality of circuit regions may include:
  • the template image can be adjusted by calculating the matching degree between the template image and the panel image, that is, to reduce the template image and the panel image.
  • the matching error between the panel images improves the accuracy of the matching, and the obtained template image can be locally optimized.
  • the matching degree for example, the amount of mutual information
  • the matching degree between the template image and the panel image can be calculated. For example, if the template image and the panel image completely match, the matching degree between the template image and the panel image The highest, if the template image and the panel image have more misaligned areas, the matching degree between the template image and the panel image is lower. If the template image and the panel image have less misaligned areas, the template image and the panel image are less The higher the match between them.
  • the position of the panel image can be maintained, and the template image can be adjusted to move m pixels to the left, right, up, or down according to the matching degree (the value of m can be flexibly set according to actual needs) until it is obtained.
  • the matching degree between the template image and the panel image reaches the maximum value, and an adjusted template image is obtained.
  • the template image generated at the beginning has misaligned parts, and the calculated template image has a small degree of matching with the panel image.
  • the template image and the panel image can be adjusted. Align so that there is no misalignment between the template image and the panel image.
  • the panel image can be divided into circuit regions according to the target circuit region included in the adjusted template image to obtain a circuit segmented image including multiple circuit regions.
  • the circuit segmented image can use different pixel values for each element.
  • the area where the device is located is identified.
  • step S104 the circuit region where the defect is located is intercepted from the circuit segmentation image according to the position of the defect to obtain an image to be analyzed.
  • the circuit area where the defect is located can be intercepted from the circuit segmentation image according to the position of the defect to obtain an image to be analyzed.
  • the image of circuit area A can be used as the image to be analyzed;
  • the circuit area B and circuit area C can be The image is used as the image to be analyzed, and so on.
  • the step of obtaining the image to be analyzed from the circuit segmentation image based on the position of the defect to obtain the image to be analyzed may include: registering the panel image and the circuit segmentation image to obtain the position and The corresponding relationship between the positions on the circuit segmentation image; the area of the defect in the circuit segmentation image is determined according to the correspondence relationship to obtain the circuit area where the defect is located; the circuit area where the defect is located is obtained to obtain the image to be analyzed.
  • the panel image and the circuit-segmented image can be registered.
  • the panel image and the edge of the circuit-segmented image and the included circuit area can be aligned, so that The correspondence between the position on the panel image and the position on the circuit segmentation image is obtained.
  • the position of the component A in the panel image and the position of the component A in the circuit segmentation image are corresponding.
  • determine the area where the position of the defect in the panel image corresponds to the position in the circuit segmentation image to obtain the circuit area where the defect is located.
  • An image to be analyzed is obtained in a circuit region where the image includes both a defect region and a circuit region.
  • the circuit region may include a region where components are located and a region where non-components are located.
  • the image to be analyzed may be It is a characteristic image of the overlapping part of the defect area and the component area.
  • step S105 the influence of the defect on the circuit in the panel is analyzed through the machine learning model and based on the image to be analyzed and the type of the defect, and a defect analysis result is obtained.
  • the machine learning model may be a Convolutional Neural Network (CNN) or a Deep Neural Networks (DNN), etc., or other models.
  • CNN Convolutional Neural Network
  • DNN Deep Neural Networks
  • the machine learning model can be trained in advance. For example, multiple sample analysis images containing different defects and circuit regions can be collected, and then the machine learning model can be trained by using multiple sample analysis images and types of defects to obtain the defect panel.
  • the real impact can be determined based on historical records or empirical processing. At this time, the predicted impact and the real impact can be performed. Converge to get a trained machine learning model.
  • the effects of defects on the circuits in the panel can be analyzed through trained machine learning models and based on the types of images and defects to be analyzed. Short or open circuit in one or more of the lines. Among them, different types of defects and their locations can cause different effects on the circuits in the panel. According to the effects of the defects on the circuits in the panel, a defect analysis result can be generated, for example, when a fibrous substance exists in a region other than the component. , The influence of the fiber on the circuit in the panel can be ignored; when the scratch exists on the line connected between the two components, the circuit will be affected by the open circuit; and so on.
  • the step of analyzing the impact of the defect on the circuit in the panel through the machine learning model and based on the type of the image to be analyzed and the defect may include: calculating the position of the defect in the image to be analyzed by the machine learning model, and the circuit The overlapping area between component positions in the area; analyze the effect of the defect on the circuit in the panel according to the overlapping area and the type of the defect.
  • the position of the defects and the component positions in the circuit area can be identified from the image to be analyzed by a machine learning model, and then the position and The overlapping area between component positions in the circuit area.
  • the impact of the defect on the circuit in the panel can be analyzed according to the overlapping area and the type of the defect. For example, for a certain type of defect, the larger the overlapping area between the component and the component, the greater the impact of the defect on the circuit in the panel, and conversely, the smaller the overlapping area between the component and the component, the smaller the defect is on the panel.
  • the defect can affect the circuit in the panel to the same extent regardless of the size of the overlapping area. ;and many more.
  • the effect of the defect on the circuit in the panel is analyzed through a machine learning model and based on the image to be analyzed and the type of the defect.
  • the step of obtaining the result of the defect analysis may include:
  • defect repair strategy required for the defect.
  • the defect repair strategy can include scrapping, cleaning the panel, or repairing the panel through a repair department.
  • the defect analysis result corresponding to the panel can be generated according to the defect repair strategy.
  • defect 1 is the presence of foreign matter and is located in the area where multiple components are located, which may cause a short circuit.
  • the corresponding defect repair strategy is to go to department A for surface cleaning treatment; defect 2 is worn and located in a blank area of the panel ( And non-component area), which has little impact on the circuit, and its corresponding defect repair strategy is to ignore defect 2 without any treatment; defect 3 is a scratched and scratched groove located exactly on a component For the circuit part, the corresponding defect repair strategy is to scrap or go to the maintenance department B for repair and then perform functional inspection; etc.
  • the defect repair strategy is determined according to the effect of the defect on the circuit in the panel
  • the step of generating a defect analysis result corresponding to the panel according to the defect repair strategy may include: obtaining the in-circuit of the circuit according to the effect of the defect on the circuit in the panel. Damage degree of components; determine defect repair strategy according to the damage degree, and generate defect analysis results corresponding to the panel according to the defect repair strategy.
  • the degree of damage to the components in the circuit may be obtained first according to the effect of the defect on the circuit in the panel, and the degree of damage may include slight damage or severe damage, such as
  • the degree of damage can be divided into multiple levels, each level corresponds to each degree of damage, and different levels can correspond to different defect repair strategies, for example, the effect of defect 1 on the circuit in the panel1, the corresponding circuit
  • the damage degree of the components in the medium is grade A, and the corresponding treatment method for the grade A is the defect repair strategy a; the defect 2 affects the circuit in the panel2, and the damage degree of the corresponding components in the circuit is grade B, this level B corresponds to the defect repair strategy b adopted as the processing method; and so on.
  • a defect repair strategy can be determined according to the degree of damage, and a defect analysis result corresponding to the panel is generated according to the defect repair strategy.
  • the panel defect analysis device can be installed in a cloud server, can also be deployed in the data center of the production line, and can also be integrated into network equipment such as information technology (IT) systems in the production line.
  • the defect analysis device is a network device such as a terminal or a server as an example, and the panel is a TFT-LCD as an example for detailed description.
  • the network device may also collect a panel image corresponding to the panel to be analyzed by itself, and perform defect analysis on the panel image to obtain a defect analysis result, and then send the defect analysis result to a relevant quality inspector for processing.
  • the network device may be connected to an image storage system and a production line management system, where the image storage system may include a Manufacturing Execution System (MES, Manufacturing Execution System), automatic optical inspection (AOI, Automatic Optics Inspection) system, or IT system, etc.
  • the production line management system may include AOI system or IT system.
  • an image storage system can collect a panel image corresponding to the panel to be analyzed, and store the panel image, and then the image storage system can send the panel image to a network device.
  • the network device can The panel image is subjected to defect analysis to obtain the defect analysis result, and the defect analysis result is sent to the production line management system, and the production line management system sends the defect analysis result to the relevant quality inspection personnel for processing.
  • This embodiment will be described in detail below as an example.
  • FIG. 12 is another schematic flowchart of a panel defect analysis method according to an embodiment of the present application.
  • the method flow may include:
  • the network device obtains a panel image corresponding to the panel to be analyzed, and detects a defect in the panel image, and determines the position and type of the defect when a defect is detected in the panel image.
  • the network device may receive the panel image corresponding to the TFT-LCD panel to be analyzed actively sent by the image storage system, or the network device may send an image acquisition request to the image storage system and receive the image analysis system to be analyzed based on the image acquisition request.
  • Panel image corresponding to the TFT-LCD panel This panel image can be acquired by the image storage system in real-time or at preset intervals during the production of the TFT-LCD panel by the production line. The panel image is stored.
  • the network equipment can use deep learning networks such as Mask-RCNN to detect defects in the panel image, which can include establishing a Mask-RCNN model, training, etc.
  • Mask-RCNN model and application of Mask-RCNN model for detection and other steps are examples of deep learning networks.
  • a Mask-RCNN model that can detect the position and type of defects in an image can be established according to the needs of defect detection.
  • each sample image can include one or more different defects, for example, samples Image A includes defect 1 and defect 2, sample image B includes defect 3 and defect 4, and sample image C includes defect 5, defect 6, and defect 7.
  • the Mask-RCNN model can be trained according to the training sample set to obtain the defect prediction value corresponding to each sample image in the training sample set.
  • the defect prediction value can include the defect position and defect type calculated by Mask-RCNN.
  • the trained Mask-RCNN model can detect the position and type of the defect for any input panel image that has a defect.
  • the trained Mask-RCNN can be used for the panel.
  • Defect detection in the image When defects are detected in the panel image, feature extraction can be performed on the defects in the panel image to obtain the defect characteristics, and then the type of the defect can be determined according to the defect characteristics, and the panel image can be performed according to the defect characteristics.
  • Pixel segmentation to obtain a defect segmented image that is, a mask image.
  • the size of the mask image can be the same as the size of the panel image.
  • the mask image can be used to segment defective and non-defective regions with different pixel values.
  • the pixel value of the pixel can know the location and type of each defect.
  • a defect segmentation image containing different types of pixels with different types of defects can be output.
  • the area where the pixel value is 1 indicates the area where defect 1 is located.
  • the area where the pixel value is 2 indicates the area where the defect 2 is located, the area where the pixel value is 3 indicates the area where the defect 3 is, the area where the pixel value is 0 indicates the area where the non-defect is, etc .
  • the pixel value identifies a defect segmented image with only one defect. For example, as shown in FIG.
  • the area where the pixel value is 1 in the first mask image represents the area where the defect is 1, and the pixel value in the second mask image is 2.
  • the area where the defect 2 is located, and the area where the pixel value 3 in the third mask image is the area where the defect 3 is located.
  • the network device obtains a template including a target circuit area, and performs template matching on the panel image according to the template according to a preset strategy to obtain a matching position.
  • the network device needs to perform circuit region segmentation on the panel image to obtain the circuit segmentation image.
  • the network device may perform circuit region segmentation on the panel image by using a deep learning network, or perform circuit region segmentation on the panel image by using template matching.
  • the process of segmenting a circuit region of a panel image may include first obtaining a template, then performing template matching on the panel image to obtain a matching position, and secondly, aligning the template with the panel image according to the matching position to obtain a template image. , And perform partial optimization on the template image to obtain an optimized template image.
  • the circuit can be segmented according to the optimized template image to obtain a circuit segmented image, etc., which will be described in detail below.
  • the network device needs to obtain a template including a target circuit area.
  • the template may be consistent with a local area in the panel image.
  • the target circuit area included in the template may be consistent with a partial circuit area in the panel image.
  • the circuit area It can be the area where components are located in the circuit.
  • the template can be set to be consistent with the local area, such as As shown in Figure 8 (a), the template can include all types of components in the panel image, and all components included in the template are labeled. Among them, different components can be labeled with different labels, for example, different The area where the components are located can be labeled with different values and so on.
  • the network device can perform template matching on the panel image according to the template to obtain the matching position.
  • the matching position can be determined by calculating the similarity with the template.
  • the network device Multiple local areas consistent with the template size can be intercepted from the panel image according to a preset strategy, and the similarity between each local area and the template is calculated to obtain the similarity set, and the most similar part is filtered from the similarity set. Area to get the target local area, and set the position of the target local area to the matching position. Or, in order to further improve the efficiency and flexibility of processing matching, you can use some regions in the template to perform matching to determine the matching position.
  • the network device can intercept the preset region from the template according to a preset strategy to obtain the target region.
  • the target region It can be an area with many components, as shown in Figure 8 (b), and then the panel image can be divided according to the size of the target area and the components contained in the target area, etc., to obtain multiple images with the same size as the target area.
  • Local area Calculate the similarity between multiple local areas in the panel image that are the same size as the target area and the target area. At this time, you can filter out the local area with the highest similarity and set the position of the local area as the matching position. .
  • the network device aligns the template with the panel image according to the matching position, generates a template image including multiple templates, and locally optimizes the template image.
  • the network device can align the template with the panel image according to the matching position.
  • the first template can be first placed at the matching position in the panel image, and the local area corresponding to the matching position in the panel image and the template Align, then use the template at the matching position as a reference, copy the first template to get the second template, and move the second template to the top, bottom, left, or right in the panel image, so that the matching position
  • the first template is aligned with the edges of the second template after the move, and seamless and non-overlapping stitching is performed, and so on.
  • the template is placed in the local area of the panel image that matches the template, until the mosaic of multiple templates can cover the panel image, so that the template image can be obtained, and the size of the template image can be consistent with the size of the panel image.
  • the obtained template image can be locally optimized.
  • the network device can calculate the matching degree between the template image and the panel image, and determine whether the template image and the panel image are completely aligned (such as whether there is a misaligned part) according to the matching degree. If the alignment is not aligned, the panel image can be maintained. The position is unchanged, and the template image is adjusted according to the matching degree until the matching degree reaches the maximum value, indicating that the template image and the panel image are completely aligned. At this time, there is no need to adjust the template image, and the adjusted template can be obtained. Image (that is, the optimized template image).
  • the network device divides the panel image into circuit regions according to the target circuit region included in the optimized template image to obtain a circuit segmented image including a plurality of circuit regions.
  • the network device can segment the panel image based on the target circuit area included in the optimized template image, as well as the position and type of the pre-labeled target circuit area.
  • Circuit division image of circuit area For example, the position and type of the target circuit area marked in the template image can be copied to the corresponding position of the panel image, so that all the circuit areas in the panel image can be segmented.
  • Each component can be divided into corresponding circuit areas. For example, as shown in FIG.
  • multiple component areas can be divided from the panel image to obtain a circuit divided image including multiple component areas, and the circuit divided image
  • the circuit divided image For components A1 to A5, components B1 to B5, components C1 to C5, components D1 to D5, components E1 to E4, components F1 to F4 and components, different colors or values can be used. G1, G2, etc. are divided and classified.
  • the network device intercepts the circuit area where the defect is located from the circuit segmentation image according to the position of the defect to obtain an image to be analyzed.
  • the network device can register the panel image with the circuit-segmented image.
  • the panel image can be aligned with the edge of the circuit-segmented image and the circuit area included, so that the panel can be obtained.
  • the correspondence between the position on the image and the position on the circuit-divided image, and then based on the correspondence between the position on the panel image and the position on the circuit-divided image it can be determined that the position of the defect in the panel image corresponds to the position in the circuit-divided image.
  • the circuit area where the defect is located can be intercepted to obtain the image to be analyzed.
  • the image of circuit area A can be used as the image to be analyzed; when the location of defect 2 is in circuit area B and circuit area C, the circuit area B and circuit area C can be The image is used as the image to be analyzed, and so on.
  • the network device analyzes the impact of the defect on the circuit in the panel based on the machine learning model and based on the image to be analyzed and the type of the defect.
  • network devices can analyze the impact of defects on the circuits in the panel based on the types of images and defects to be analyzed through machine learning models such as CNN or DNN, such as , Calculate the position of the defect in the image to be analyzed, and the overlapping area between the component position in the circuit area; analyze the impact of the defect on the circuit in the panel according to the overlap area and the type of defect (such as causing a short circuit or open circuit of the circuit, etc.), Different types of defects and their locations can cause different effects on the circuits in the panel, for example, when scratches exist on the lines connected between two components, they can cause circuit breaks in the panel.
  • the machine learning model may be a pre-trained model. For example, multiple sample analysis images including different defects and circuit regions may be collected, and then the machine learning model may be trained by using multiple sample analysis images and types of defects. Obtain the predicted effect of the defect on the circuit in the panel, and obtain the preset true effect of the defect on the circuit in the panel. At this time, the predicted effect and the true effect can be converged to obtain a trained machine learning model.
  • the network device determines a defect repair strategy according to the influence of the defect on the circuit in the panel, and generates a defect analysis result corresponding to the panel according to the defect repair strategy.
  • network devices can obtain circuits based on the effects of defects on the circuits in the panel.
  • the degree of damage of the middle component can be further determined according to the degree of damage of the component.
  • the network device can send the defect analysis result to the production line management system, and the production line management system sends the defect analysis result to the relevant quality inspection personnel for processing.
  • a database for storage can be established to store different types of defects and their locations can cause different impacts on the circuits in the panel, and defect repair strategies that need to be collected for different impacts, such as databases Can be stored in: component A has damage (that is, there is an overlap between the location of the defect and component A), the type of damage (that is, the type of defect), the degree of damage (that is, the effect of the defect on the circuit), and the strategy for repairing the defect, etc. Correspondence relationship between components; there is a correspondence relationship between component B damage, damage type, damage degree, and defect repair strategy; component C and D simultaneously damage, damage type, damage degree, and defect repair strategy, etc. Correspondence; etc. Or, the database can store: the correspondence between defect 1 number, defect 1 type, component A affected by defect 1, and defect repair strategy, etc .; defect 2 number, defect 2 type, and element affected by defect 2 Correspondence between devices B and C, and defect repair strategies; etc.
  • two databases can also be established.
  • One database stores the defect repair strategy corresponding to the damage of each component, or the defect repair strategy corresponding to the damage of multiple components at the same time, which stores the damage and Correspondence between defect repair strategies (that is, processing methods), while another database stores the relationship between the type of damage (that is, the type of defect) and the degree of damage that may be caused to the component, among which different defects are targeted Type and different components, there may be the same defect repair strategy or different defect repair strategies, etc., you can then query to the corresponding database according to the query needs.
  • these two databases can also be replaced by one or two models.
  • One of the models can calculate the degree of damage to the component according to the type of damage, and the other can calculate the corresponding defect repair based on the damage of the component. Strategy, etc.
  • the overlapping area between the defect area in the image to be analyzed and each component in the circuit area can be calculated, and the probability and area of component damage are calculated based on the overlapping area between the defect and the component.
  • the damage level of the component to determine whether the type of the defect will damage the component. For example, the overlap between some defects and the component will cause 100% damage to the component, and the overlap between the defect and the component will cause Probabilistic damage to components, so when there is an overlap between a defect and a component, the probability of damage to the component can be calculated according to the type of defect. For example, a scratch defect has a greater probability of damage to the component, and a fiber defect to the component. The probability of damage is small and so on.
  • the database can be queried according to the degree of damage of the component to determine the defect repair strategy (that is, the processing method adopted), for example, it can be ignored or repaired in some way.
  • an image to be analyzed including a defect can be intercepted from the circuit segmented image according to the position of the defect, and a machine learning model based on the to be analyzed Image and defect type analysis of the impact of defects on the circuit in the panel, not only can detect and classify defects, but also analyze the impact of defects on the circuit, and subsequent defect repair strategies, can replace the existing manual Classification and judgment processes realize the automatic detection and analysis of panel defects without manual participation, which not only reduces manual workload, but also improves the accuracy and efficiency of panel defect analysis.
  • the embodiment of the present application further provides a device based on the foregoing panel defect analysis method.
  • the meanings of the terms are the same as in the above-mentioned panel defect analysis method.
  • FIG. 14 is a schematic structural diagram of a panel defect analysis device according to an embodiment of the present application.
  • the panel defect analysis device may include an acquisition unit 301, a detection unit 302, a segmentation unit 303, a interception unit 304, and an analysis unit 305. .
  • the obtaining unit 301 is configured to obtain a panel image corresponding to a panel to be analyzed.
  • the acquisition unit 301 can set an image acquisition device (such as a camera or a camera) in advance on the production line of the production panel, and during the production of the panel, the image acquisition device acquires the corresponding panel to be analyzed in real time or at preset intervals.
  • Panel image or, the acquisition unit 301 acquires a pre-stored panel image from the local storage space of the panel defect analysis device; or the acquisition unit 301 sends an image acquisition request to the image storage server, and receives the image storage server returning based on the image acquisition request Panel image, etc .; of course, the panel image can also be obtained by other methods, and the specific acquisition method is not limited here.
  • the panel may include a TFT-LCD panel, an LCD panel, an integrated circuit panel, or a chip panel, and may also be other types of panels.
  • the detection unit 302 is configured to detect a defect in a panel image to obtain a position and a type of the defect.
  • the detection unit 302 can detect defects in the panel image through a deep learning network such as a convolutional neural network or Mask-RCNN, or can detect defects in the panel image through an image segmentation method, etc., for specific detection
  • a deep learning network such as a convolutional neural network or Mask-RCNN
  • the method can be flexibly set according to actual needs.
  • the detection unit 302 may be specifically configured to: use a preset detection model to perform feature extraction on the defects in the panel image to obtain the defect characteristics; determine the type of the defect according to the defect characteristics, and the panel image according to the defect characteristics Perform pixel segmentation to obtain a defect segmented image; set the area where the pixel value in the defect segmented image is a preset value as the position of the defect.
  • the detection unit 302 may use a preset detection model for detection.
  • the preset detection model may be Mask-RCNN or other detection models.
  • a defect in a panel image is detected by using Mask-RCNN as an example for description.
  • model training is required: collecting multiple sample images corresponding to the panel containing defects to obtain a training sample set; wherein each sample image may include one or more different defects, and include a variety of components The composition of the circuit, etc., is marked in advance on the location and type of defects contained in each sample image.
  • Mask-RCNN is then trained according to the training sample set to obtain the defect prediction value corresponding to each sample image in the training sample set.
  • the defect prediction value may include the defect position and defect type calculated by Mask-RCNN.
  • Mask-RCNN may be used. RCNN performs feature extraction on the defects in the panel image to obtain the defect characteristics, and determines the type of the defect and the location of the defect based on the defect characteristics.
  • the detection unit 302 can use the trained Mask-RCNN to perform defect detection on the panel image.
  • the detection unit 302 can use the trained Mask-RCNN to perform defect detection on the panel image.
  • no defect is detected in the panel image, it can be determined that the panel corresponding to the panel image is qualified and subsequent steps need not be performed.
  • defect extraction can be performed on the defects in the panel image to obtain defect features.
  • the segmentation unit 303 is configured to segment the panel image according to a preset strategy to obtain a circuit segmented image including a plurality of circuit regions.
  • the panel image may include a circuit, and the circuit may be a collection of various components.
  • the component may include a transistor, a resistor, a capacitor, and an inductor
  • the circuit area may include an area where each component is located.
  • the preset strategy can be to divide the circuit area of the panel image according to the area where each component is located, or to train the deep learning network, and to divide the circuit area of the panel image according to the trained deep learning network, or use the image
  • the segmentation method divides the panel image into circuit regions, or divides the panel image into circuit regions based on template matching.
  • the specific strategy can be flexibly set according to actual needs, and is not limited here.
  • a circuit region segmentation of a panel image in a template matching manner is taken as an example for detailed description below.
  • the segmentation unit 303 may include an acquisition subunit 3031, a matching subunit 3032, a segmentation subunit 3033, and the like, which may be specifically as follows:
  • the obtaining subunit 3031 is configured to obtain a template including a target circuit area.
  • the matching subunit 3032 is configured to perform template matching on the panel image according to a template according to a preset strategy to obtain a matching position.
  • a segmentation subunit 3033 is configured to segment a panel image based on a matching position and a target circuit area to obtain a circuit segmented image including a plurality of circuit areas.
  • the obtaining subunit 3031 needs to obtain a template.
  • a preset template may be obtained from a local storage space of a panel defect analysis device or a server.
  • the method for obtaining the template may be other methods.
  • the specific content is It is not limited here.
  • the preset template may be consistent with a local area in the panel image.
  • the template may include a target circuit area.
  • the target circuit area may be consistent with a part of the circuit area in the panel image.
  • the circuit area may be where the components in the circuit are located. For example, when the panel image is as shown in FIG. 3, there are multiple local areas that are the same in the panel image.
  • the template can be set to be consistent with the local area, as shown in FIG. 8 (a).
  • This template can include all types of components in the panel image. Then all components included in the template are labeled manually or automatically. Different components can be labeled with different labels. For example, different components can be labeled with different colors or different components can be labeled with different numbers. Or use letters to mark, or different components can be marked with different coordinate points.
  • the template may also be set as a mask template image, and the pixel values of the regions where different components are located in the mask template image are different.
  • the circuit included in the panel image is simple, only one template can be set; when the circuit included in the panel image is more complicated, multiple templates can be set.
  • the matching subunit 3032 may perform template matching on the panel image according to the template according to a preset strategy to obtain a matching position.
  • the matching position may be a position of a local area in the panel image where the similarity with the template is the highest. For example, it may be Find matching local areas in the panel image according to the components contained in the template, and calculate the similarity between the local area and the template until the local area with the highest similarity is found.
  • the segmentation subunit 3033 can segment the panel image based on the matching position and the target circuit area in the template.
  • the template position can be set in order in the panel image based on the matching position, making it seamless and seamless.
  • each component is labeled and labeled to obtain a circuit-divided image including a plurality of circuit regions.
  • the circuit segmented image can be marked with the position and type of each circuit area (ie, the position and type of each component).
  • the circuit segmented image can be used to segment the area where each component is located with different pixel values.
  • the circuit The size of the segmented image can be consistent with the size of the panel image.
  • the areas where the pixel values in the circuit-segmented image are different are set as the position of each component.
  • the type of each component can also be marked in the circuit-segmented image.
  • the preset data value can be based on actual needs. Make flexible settings, for example, the pixel value of the area where component D is 9 or the pixel value of the area where component E is 8 etc.
  • the matching subunit 3032 may be specifically used to: intercept a plurality of local regions consistent with the template size from the panel image according to a preset strategy; calculate the similarity between each local region and the template to obtain similarity Degree set; select the local area with the highest similarity from the similarity set to obtain the target local area; set the position of the target local area to the matching position.
  • the matching subunit 3032 can determine the matching position by calculating the similarity with the template. Specifically, in the process of determining the matching position, the matching subunit 3032 can first determine the matching position according to the size of the template and the template. The target circuit area and other preset strategies are used to divide the panel image to obtain multiple local areas that are consistent with the template size, and then calculate the similarity between each local area and the template to obtain a similarity set. In the similarity set, Include the similarity corresponding to each local area. Secondly, the local area with the highest similarity is selected from the similarity set to obtain the target local area; the position of the target local area obtained at the end is the matching position.
  • the matching subunit 3032 may be specifically configured to: intercept a preset region from a template according to a preset strategy to obtain a target region; and calculate a plurality of local regions in the panel image that are consistent in size with the target region and the target region The similarity between them; the local area with the highest similarity is filtered out, and the position of the local area is set as the matching position.
  • the matching subunit 3032 may use a partial region in the template to determine the matching position. Specifically, the matching subunit 3032 first intercepts a preset region from the template according to a preset strategy to obtain The target region, for example, as shown in FIG. 8 (b), can be cut from the template of FIG. 8 (a) as a target region without defects and feature-rich parts, that is, a region containing a large number of components as a target region. It should be noted that only one preset area can be intercepted from the template as the target area, and multiple preset areas can be intercepted from the template as the target area. For example, when the template contains fewer components, the template can be extracted from the template. Only one preset area is intercepted as the target area; when the template contains many components, multiple preset areas can be intercepted from the template as the target area.
  • the matching subunit 3032 can divide the panel image according to the size of the target area and the components included in the target area to obtain a plurality of local areas with the same size as the target area, and then calculate each local area and target in the panel image. The similarity between regions, and from the calculated similarity between each local region and the target region, the local region with the highest similarity is filtered out, and the position of the local region finally obtained is the matching position.
  • the target similarity When there are multiple similarities between the multiple local regions and the target region, all of them have the maximum similarity, and any one of the largest multiple similarities can be randomly selected as the target similarity, and the target similarity
  • the position of the corresponding local area is set as the matching position, or the position of the local area near the middle of the panel image selected according to a preset rule is set as the matching position, and so on.
  • the segmentation sub-unit 3033 may include a generation module, a segmentation module, and the like, and may specifically be as follows:
  • a generating module for aligning the template with the panel image according to the matching position to generate a template image the template image is composed of multiple templates covering the panel image;
  • a segmentation module is configured to segment a panel image based on a target circuit area included in a template image to obtain a circuit segmented image including a plurality of circuit areas.
  • the generating module may align the template with the panel image according to the matching position to generate a template image composed of a plurality of templates covering the panel image.
  • the segmentation module divides the panel image into circuit regions based on the target circuit region contained in the template image and the position and type of the pre-labeled circuit region to obtain a circuit segmentation image that includes multiple circuit regions. For example, the template image The positions and types of the circuit areas marked in the copy are copied to the corresponding positions of the panel image, so that all the circuit areas in the panel image can be identified.
  • the segmentation module may be specifically configured to: calculate the matching degree between the template image and the panel image; adjust the template image according to the matching degree until the matching degree reaches the maximum value, and obtain the adjusted template image;
  • the target circuit region included in the adjusted template image is used to segment the panel image into a circuit region to obtain a circuit segmented image including a plurality of circuit regions.
  • the segmentation module can adjust the template image by calculating the matching degree between the template image and the panel image, that is, to reduce the template
  • the matching error between the image and the panel image improves the accuracy of the matching, and the obtained template image can be locally optimized.
  • the segmentation module may calculate a matching degree (for example, the amount of mutual information) between the template image and the panel image. For example, if the template image and the panel image completely match, the The degree of matching is the highest. If there are more regions with misalignment between the template image and the panel image, the degree of matching between the template image and the panel image is lower. If there are fewer regions with misalignment between the template image and the panel image, the template image and The higher the degree of matching between panel images.
  • the position of the panel image can be maintained, and the template image can be adjusted to move m pixels to the left, right, up, or down according to the matching degree (the value of m can be flexibly set according to actual needs) until the template
  • the matching degree between the image and the panel image reaches the maximum value, and an adjusted template image is obtained.
  • the template image generated at the beginning has misaligned parts, and the calculated template image has a small degree of matching with the panel image.
  • the template image and the panel image can be adjusted. Align so that there is no misalignment between the template image and the panel image.
  • the panel image can be divided into circuit regions according to the target circuit region included in the adjusted template image to obtain a circuit segmented image including multiple circuit regions.
  • the circuit segmented image can use different pixel values for each element.
  • the area where the device is located is identified.
  • the intercepting unit 304 is used for segmenting the image from the circuit according to the position of the defect to intercept the circuit area where the defect is located to obtain the image to be analyzed.
  • the intercepting unit 304 may be specifically configured to: register the panel image and the circuit segmented image to obtain a correspondence between the position on the panel image and the position on the circuit segmented image; and determine the position of the defect according to the correspondence.
  • the area in the image is divided by the circuit to obtain the circuit area where the defect is located; the circuit area where the defect is located is taken to obtain the image to be analyzed.
  • the interception unit 304 can register the panel image and the circuit segmented image. For example, the panel image and the edge of the circuit segmented image and the included circuit area can be aligned. Therefore, the correspondence between the position on the panel image and the position on the circuit segmentation image can be obtained. For example, the position of the component A in the panel image and the position of the component A in the circuit segmentation image are corresponding. Then, the intercepting unit 304 can determine the area where the position of the defect in the panel image corresponds to the position in the circuit segmentation image according to the correspondence between the position on the panel image and the position on the circuit segmentation image, and obtain the circuit area where the defect is located.
  • the circuit area where the defect is located can be intercepted to obtain the image to be analyzed.
  • the image to be analyzed includes both the defect area and the circuit area.
  • the circuit area can include the area where components are located and the area where non-components are located.
  • the analysis image may be a characteristic image of an overlapping portion of the defect region and the component region.
  • An analysis unit 305 is configured to analyze the impact of the defect on the circuit in the panel based on the machine learning model and the type of the image to be analyzed and the defect to obtain a defect analysis result.
  • the machine learning model may be a CNN or a DNN, or other models.
  • the analysis unit 305 can train the machine learning model in advance. For example, it can collect multiple sample analysis images containing different defects and circuit regions, and then use the multiple sample analysis images and types of defects to train the machine learning model to obtain The predicted impact of the defect on the circuit in the panel and the preset real impact of the defect on the circuit in the panel. At this time, the predicted impact and the true impact can be converged to obtain a trained machine learning model.
  • the analysis unit 305 may analyze the influence of the defect on the circuit in the panel based on the type of the image to be analyzed and the type of the defect through a trained machine learning model, such as , Cause a short circuit or open circuit of one or more lines in the circuit.
  • a trained machine learning model such as , Cause a short circuit or open circuit of one or more lines in the circuit.
  • different types of defects and their locations can cause different effects on the circuits in the panel.
  • a defect analysis result can be generated, for example, when a fibrous substance exists in a region other than the component. , The influence of the fiber on the circuit in the panel can be ignored; when the scratch exists on the line connected between the two components, the circuit will be affected by the open circuit; and so on.
  • the analysis unit 305 may include an analysis sub-unit 3051 and a determination sub-unit 3052, etc., which may be as follows:
  • An analysis subunit 3051 is configured to analyze the impact of the defect on the circuit in the panel based on the machine learning model and the type of the image to be analyzed and the defect;
  • a determining subunit 3052 is configured to determine a defect repair strategy according to the influence of the defect on the circuit in the panel, and generate a defect analysis result corresponding to the panel according to the defect repair strategy.
  • the effect of defects on the circuits in the panel determines the subsequent defect repair strategy, after analyzing the subunit 3051 to determine the impact of the defects on the circuits in the panel through the machine learning model, it is determined that the subunit 3052 can be based on the defects in the panel.
  • the effect of the circuit further determines the defect repair strategy required to address the defect.
  • the analysis subunit 3051 may be specifically configured to: calculate a position of a defect in an image to be analyzed by a machine learning model, and an overlap region between the position of a component in a circuit region; and analyze according to the type of the overlap region and the defect The effect of defects on the circuits in the panel.
  • the analysis subunit 3051 can identify the position of the defect and the position of the component in the circuit area from the image to be analyzed through a machine learning model, and then calculate the position of the image in the image to be analyzed.
  • the overlapping area between the position of the defect and the position of the component in the circuit area can be analyzed according to the overlapping area and the type of the defect.
  • the determining sub-unit 3052 may be specifically used to: obtain the damage degree of the components in the circuit according to the influence of the defect on the circuit in the panel; determine the defect repair strategy according to the damage degree, and according to the defect repair strategy Generate defect analysis results corresponding to the panel.
  • the determining subunit 3052 may first obtain the degree of damage of the components in the circuit according to the effect of the defect on the circuit in the panel. At this time, a defect repair strategy can be determined according to the degree of damage, and a defect analysis result corresponding to the panel is generated according to the defect repair strategy.
  • the embodiment of the present application further provides a network device, and the network device may be a device such as a server or a terminal.
  • the network device may be a device such as a server or a terminal.
  • FIG. 17 it shows a schematic structural diagram of a network device involved in an embodiment of the present application. Specifically,
  • the network device may include components such as a processor 401 of one or more processing cores, a memory 402 of one or more computer-readable storage media, a power source 403, and an input unit 404.
  • a processor 401 of one or more processing cores a memory 402 of one or more computer-readable storage media
  • a power source 403 a power source for converting signals to electrical signals.
  • the processor 401 is the control center of the network device, and uses various interfaces and lines to connect various parts of the entire network device.
  • the processor 401 runs or executes software programs and / or modules stored in the memory 402 and calls the stored programs in the memory 402. Data, perform various functions of network equipment and process data, so as to monitor the overall network equipment.
  • the processor 401 may include one or more processing cores; preferably, the processor 401 may integrate an application processor and a modem processor, wherein the application processor mainly processes an operating system, a user interface, and an application program, etc.
  • the processor mainly handles wireless communication. It can be understood that the foregoing modem processor may not be integrated into the processor 401.
  • the memory 402 may be configured to store one or more programs, and when the one or more programs are executed by the one or more processors, cause the one or more processors to implement the foregoing panel defect analysis method.
  • the memory 402 can be used to store software programs and modules, and the processor 401 executes various functional applications and data processing by running the software programs and modules stored in the memory 402.
  • the memory 402 may mainly include a storage program area and a storage data area, where the storage program area may store an operating system, an application program required for at least one function (such as a sound playback function, an image playback function, etc.), etc .; the storage data area may store data according to Use of data created by network devices, etc.
  • the memory 402 may include a high-speed random access memory, and may further include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, or other volatile solid-state storage devices. Accordingly, the memory 402 may further include a memory controller to provide the processor 401 access to the memory 402.
  • the network device further includes a power source 403 for supplying power to various components.
  • the power source 403 can be logically connected to the processor 401 through a power management system, so as to implement functions such as management of charging, discharging, and power consumption management through the power management system.
  • the power source 403 may further include any one or more DC or AC power sources, a recharging system, a power failure detection circuit, a power converter or inverter, and a power source status indicator.
  • the network device may further include an input unit 404, which may be used to receive inputted numeric or character information, and generate a keyboard, mouse, joystick, optical or trackball signal input related to user settings and function control.
  • an input unit 404 which may be used to receive inputted numeric or character information, and generate a keyboard, mouse, joystick, optical or trackball signal input related to user settings and function control.
  • the network device may further include a display unit and the like, and details are not described herein again.
  • the processor 401 in the network device loads the executable files corresponding to one or more application processes into the memory 402 according to the following instructions, and the processor 401 runs and stores the An application program in the memory 402 to implement the panel defect analysis method provided in the embodiment of the present application is as follows:
  • the panel image corresponding to the panel to be analyzed detect the defects in the panel image to obtain the position and type of the defect; perform circuit region segmentation on the panel image according to a preset strategy to obtain a circuit segmented image including multiple circuit regions;
  • the position of the defect is obtained from the circuit segmented image, the circuit area where the defect is located, and the image to be analyzed is obtained; based on the image to be analyzed and the type of the defect, the effect of the defect on the circuit in the panel is analyzed through the machine learning model, and the result of the defect analysis is obtained.
  • the steps may include: obtaining a template containing the target circuit area; performing template matching on the panel image according to the template according to a preset strategy to obtain a match. Position; circuit area segmentation of the panel image according to the matching position and the target circuit area to obtain a circuit segmentation image including a plurality of circuit areas.
  • the step of obtaining the result of the defect analysis includes: using the machine learning model and the type of the image to be analyzed and the type of defect, analyzing the defect on the panel
  • the impact caused by the middle circuit; the defect repair strategy is determined according to the impact of the defect on the circuit in the panel, and the defect analysis result corresponding to the panel is generated according to the defect repair strategy.
  • the embodiment of the present application can detect defects in the panel image corresponding to the panel to be analyzed, obtain the position and type of the defect (such as liquid residue, wear or scratch, etc.), and perform panel image processing according to a preset strategy. Circuit region segmentation to obtain a circuit segmentation image including multiple circuit regions, and then the circuit region where the defect is located can be intercepted from the circuit segmentation image according to the position of the defect to obtain the image to be analyzed. At this time, a machine learning model can be used and based on the analysis to be performed The types of images and defects, analyze the effect of defects on the circuit in the panel (such as the short circuit or open circuit caused by the defect), and get the result of defect analysis.
  • This solution detects the position and type of the defect and divides the circuit area of the panel image. According to the position of the defect, the image to be analyzed containing the defect can be intercepted from the circuit segmented image. Based on the image to be analyzed and the type of the defect, a machine learning model is used.
  • the analysis of the impact of defects on the circuit in the panel has realized the automatic detection and analysis of panel defects without manual participation, which not only reduces the manual workload, but also improves the accuracy and efficiency of panel defect analysis.
  • the embodiment of the present application provides a storage medium that stores processor-executable instructions.
  • the instructions are executed by one or more processors, the panel defect analysis method provided by the foregoing embodiments of the present application is implemented. Steps.
  • the storage medium may include a read-only memory (ROM, Read Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk, or an optical disk.
  • ROM read-only memory
  • RAM random access memory
  • magnetic disk or an optical disk.
  • the instructions stored in the storage medium can execute the steps in any of the panel defect analysis methods provided in the embodiments of the present application, it can implement the capabilities of any of the panel defect analysis methods provided in the embodiments of the present application.
  • the beneficial effects achieved are detailed in the previous embodiment, and are not repeated here.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Image Analysis (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Image Processing (AREA)

Abstract

本申请实施例公开了一种面板缺陷分析方法、装置、存储介质及网络设备,本申请实施例可以获取待分析的面板对应的面板图像;对所述面板图像中的缺陷进行检测,得到缺陷的位置和类型;按照预设策略对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像;根据所述缺陷的位置从所述电路分割图像中,截取所述缺陷所在的电路区域,得到待分析图像;通过机器学习模型并基于所述待分析图像和所述缺陷的类型,分析所述缺陷对所述面板中电路造成的影响,得到缺陷分析结果。

Description

一种面板缺陷分析方法、装置、存储介质及网络设备
本申请要求于2018年8月7日提交中国专利局、申请号为201810888604.2、发明名称为“一种面板缺陷分析方法、装置及存储介质”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及面板检测技术领域,具体涉及一种面板缺陷分析方法、装置、存储介质及网络设备。
发明背景
产品质量是制造业最为重视的生产指标之一,为了保证产品质量,在产品生产过程中对产品进行缺陷检测成为不可或缺的工序,例如,以薄膜晶体管液晶显示器(TFT-LCD,Thin Film Transistor-Liquid Crystal Display)为例,每条产线都需要对TFT-LCD进行缺陷检测。
现有技术中,在对TFT-LCD进行缺陷检测的过程中,需要采集TFT-LCD的图像,并利用传统的图像分析方法对特定的缺陷进行识别,从而实现对特定的缺陷部分进行判定和检测,然后由人工根据检测出的缺陷,评估和分析该缺陷对产品以及产品生产流程造成的影响,以及由人工决定后续针对该缺陷所需采取的处理方式。
在对现有技术的研究和实践过程中,本申请的发明人发现,现有方法仅对特定的缺陷进行简单检测,而且后续需要人工进行评估和分析,由于人工评估存在主观判断的差异和疲劳等因素会导致的误判及效率低下的问题,因此不仅消耗了大量的人力,而且导致分析结果非常不准确及效率低。
发明内容
本申请实施例提供一种面板缺陷分析方法、装置及存储介质,旨在提高对面板进行缺陷分析的准确性及效率。
为解决上述技术问题,本申请实施例提供以下技术方案:
一种面板缺陷分析方法,由网络设备执行,包括:
获取待分析的面板对应的面板图像;
对所述面板图像中的缺陷进行检测,得到缺陷的位置和类型;
按照预设策略对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像;
根据所述缺陷的位置从所述电路分割图像中,截取所述缺陷所在的电路区域,得到待分析图像;
通过机器学习模型并基于所述待分析图像和所述缺陷的类型,分析所述缺陷对所述面板中电路造成的影响,得到缺陷分析结果。
一种面板缺陷分析装置,包括:
获取单元,用于获取待分析的面板对应的面板图像;
检测单元,用于对所述面板图像中的缺陷进行检测,得到缺陷的位置和类型;
分割单元,用于按照预设策略对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像;
截取单元,用于根据所述缺陷的位置从所述电路分割图像中,截取所述缺陷所在的电路区域,得到待分析图像;
分析单元,用于通过机器学习模型并基于所述待分析图像和所述缺陷的类型,分析所述缺陷对所述面板中电路造成的影响,得到缺陷分析结果。
一种存储介质,存有处理器可执行指令,所述指令由一个或一个以上处理器执行时,实现上述面板缺陷分析方法。
一种网络设备,包括一个或多个处理器;以及,
存储器,配置为存储一个或多个程序,当所述一个或多个程序被所述一个或多个处理器执行时,使得所述一个或多个处理器实现上述面板缺陷分析方法。
附图简要说明
图1是本申请实施例提供的面板缺陷分析方法的场景示意图;
图2是本申请实施例提供的面板缺陷分析方法的流程示意图;
图3是本申请实施例提供的面板图像的示意图;
图4是本申请实施例提供的对面板图像中的缺陷进行检测的示意图;
图5是本申请实施例提供的缺陷分割图像的示意图;
图6是本申请实施例提供的缺陷分割图像的另一示意图;
图7是本申请实施例提供的缺陷分割图像的另一示意图;
图8(a)是本申请实施例提供的模板的示意图;
图8(b)是本申请实施例提供的从模板中截取得到的目标区域的示意图;
图9是本申请实施例提供的分割电路区域得到电路分割图像的示意图;
图10是本申请实施例提供的对模板图像进行调整的示意图;
图11是本申请实施例提供的面板缺陷分析的架构示意图;
图12是本申请实施例提供的面板缺陷分析方法的另一流程示意图;
图13是本申请实施例提供的对面板图像进行电路区域分割的流程示意图;
图14是本申请实施例提供的面板缺陷分析装置的结构示意图;
图15是本申请实施例提供的面板缺陷分析装置的另一结构示意图;
图16是本申请实施例提供的面板缺陷分析装置的另一结构示意图;
图17是本申请实施例提供的网络设备的结构示意图。
实施方式
本申请实施例提供一种面板缺陷分析方法、装置、存储介质及网络设备。
请参阅图1,图1为本申请实施例所提供的面板缺陷分析方法的场景示意图,该面板缺陷分析方法可以应用于面板缺陷分析装置,该面板缺陷分析装置具体可以集成在网络设备如终端或服务器等设备中,例如,网络设备可以获取待分析的面板对应的面板图像,该面板可以是TFT-LCD面板或集成电路面板等,并对面板图像中的缺陷进行检测,得到缺陷的位置和类型,例如,图1中,可以分别检测出缺陷1、缺陷2和缺陷3对应的位置,以及缺陷1对应的类型为存在异物(例如纤维物),缺陷2对应的类型为磨损(例如表面性的摩擦),缺陷3对应的类型为刮伤(例如尖锐物的深度刮痕)等。以及可以按照预设策略对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像,例如,可以获取包含目标电路区域的模板,按照预设策略根据模板对面板图像进行模板匹配,得到匹配位置,并根据匹配位置及目标电路区域对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。其中,电路区域可以是按照元器件进行划分,每个元器件所在的区域可以分别对应一个电路区域,例如图1中元器件A、元器件B、元器件C或元器件D等所在的区域均为电路区域,或者是电路区域可以是按照其他方式进行划分。然后可以根据缺陷的位置从电路分割图像中,截取缺陷所在的电路区域,得到待分析图像。此时可 以通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响(例如造成电路短路或断路等),根据缺陷对面板中电路造成的影响确定缺陷修复策略(例如需要对面板进行清洗或修复等),根据缺陷修复策略生成面板对应的缺陷分析结果;等等。
需要说明的是,图1所示的面板缺陷分析方法的场景示意图仅仅是一个示例,本申请实施例描述的面板缺陷分析方法的场景是为了更加清楚的说明本申请实施例的技术方案,并不构成对于本申请实施例提供的技术方案的限定,本领域普通技术人员可知,随着面板缺陷分析方法的演变和新业务场景的出现,本申请实施例提供的技术方案对于类似的技术问题,同样适用。
以下分别进行详细说明。
在本实施例中,将从面板缺陷分析装置的角度进行描述,该面板缺陷分析装置具体可以集成在服务器或终端等网络设备中。
一种面板缺陷分析方法,包括:获取待分析的面板对应的面板图像;对面板图像中的缺陷进行检测,得到缺陷的位置和类型;按照预设策略对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像;根据缺陷的位置从电路分割图像中,截取缺陷所在的电路区域,得到待分析图像;通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响,得到缺陷分析结果。
请参阅图2,图2是本申请一实施例提供,由网络设备执行的面板缺陷分析方法的流程示意图。该网络设备的具体结构可以参见图17。该面板缺陷分析方法可以包括:
在步骤S101中,获取待分析的面板对应的面板图像。
面板图像的获取方式可以包括:在生产面板的产线上预先设置图像采集装置(例如摄像头或照相机等),并在面板生产的过程中,通过图像采集装置实时或每间隔预设时间采集待分析的面板对应的面板图像;或者是,从面板缺陷分析装置的本地存储空间中获取预存的面板图像;或者是,向图像存储服务器发送图像获取请求,并接收图像存储服务器基于图像获取请求返回的面板图像等;当然,面板图像也可以通过其他方式获取到,具体获取方式在此处不作限定。其中,面板可以包括TFT-LCD面板、LCD面板、集成电路面板或芯片面板等,还可以是其他类型的面板,例如,如图3所示,该面板中可以包括电路区域和非电路区域等,图3中斜线部分可以是非电路区域,非斜线部分可以是电路区域。
在步骤S102中,对面板图像中的缺陷进行检测,得到缺陷的位置和类型。
在得到面板图像后,可以通过深度学习网络对面板图像中的缺陷进行检测,例如,可以利用卷积神经网络或区域检测卷积神经网络(Mask-RCNN,Mask-Region Convolutional Neural Network)对面板图像中的缺陷进行检测;或者,可以通过图像分割方法对面板图像中的缺陷进行检测等,具体检测方式可以根据实际需要进行灵活设置。
在某些实施方式中,对面板图像中的缺陷进行检测,得到缺陷的位置和类型的步骤可以包括:
采用预设的检测模型对面板图像中的缺陷进行特征提取,得到缺陷特征;根据缺陷特征确定缺陷的类型,以及根据缺陷特征对面板图像进行像素分割,得到缺陷分割图像;将缺陷分割图像中像素值为预设数值所在的区域设置为缺陷的位置。
为了提高对面板图像中的缺陷进行检测的准确性,可以采用预设的检测模型进行检测,其中,预设的检测模型可以是Mask-RCNN或者是其他检测模型,为了描述方便,在本申请实施例中,将以利用Mask-RCNN检测面板图像中的缺陷为例进行说明。首先,需要进行模型训练:采集多张包含缺陷的面板所对应的样本图像,得到训练样本集;其中,每张样本图像中可以包括一种或多种不同的缺陷,以及包括由多种元器件组成的电路等,例如,样本图像A中包括缺陷1,样本图像B中包括缺陷1和缺陷2,样本图像C中包括缺陷3、缺陷4和缺陷5等,预先在每张样本图像中包含的缺陷的位置和类型进行标注。然后根据训练样本集对Mask-RCNN进行训练,得到训练样本集中每张样本图像对应的缺陷预测值,该缺陷预测值可以包括Mask-RCNN计算得到的缺陷位置和缺陷类型,例如,可以采用Mask-RCNN对面板图像中的缺陷进行特征提取,得到缺陷特征,并根据缺陷特征确定缺陷的类型及缺陷的位置等,其中,该缺陷位置可以是坐标位置或像素位置等,该缺陷类型可以包括异物、液体残留、刮伤或磨损等。以及,获取每张样本图像的缺陷真实值,该缺陷真实值包括样本图像预先标注的缺陷位置和缺陷类型,此时可以对缺陷预测值和缺陷真实值进行收敛,得到训练后的Mask-RCNN,即将缺陷预测值和缺陷真实值进行比较(包括将缺陷位置预测值和缺陷位置真实值进行比较,及将缺陷类型预测值和缺陷类型真实值进行比较),通过降低缺陷预测值和缺陷真实值之间的误差,以对Mask-RCNN进行不断训练,从而可以调整Mask-RCNN的参数或权重等至合适数值,便可得到训练后的Mask-RCNN,训练后的Mask-RCNN对于输入的任何一 张存在缺陷的面板图像均可以检测出缺陷的位置和类型,该训练后的Mask-RCNN即为预设的检测模型。
此时,可以采用训练后的Mask-RCNN对面板图像进行缺陷检测,当未检测到面板图像中存在缺陷时,可以确定该面板图像对应的面板合格,不需要执行后续的步骤;当检测到面板图像中存在缺陷时,可以对面板图像中的缺陷进行特征提取,得到缺陷特征,例如,纤维物的缺陷特征为细长丝状物,刮伤的缺陷特征为形成较深的凹痕,磨损的缺陷特征为形成表面性的摩擦痕,等等。然后可以根据缺陷特征确定缺陷的类型,例如可以根据纤维物的缺陷特征确定缺陷的类型为存在纤维物,或者根据刮伤的缺陷特征确定缺陷的类型为刮伤。例如,如图4所示,当检测到面板图像中存在缺陷1、缺陷2和缺陷3时,可以根据缺陷1、缺陷2和缺陷3各自对应的缺陷特征,确定缺陷1的类型为存在纤维物,缺陷2的类型为磨损,及缺陷3的类型为刮伤等。
以及,可以根据缺陷特征对面板图像进行像素分割,得到缺陷分割图像,该缺陷分割图像可以用不同的像素值对缺陷区域和非缺陷区域进行分割,该缺陷分割图像的大小可以与面板图像的大小一致,该缺陷分割图像可以称为mask图像。当面板图像中仅存在一种缺陷时,可以输出一张包含用预设数值标识该缺陷的缺陷分割图像;当面板图像中存在多种缺陷时,可以输出一张包含用不同数值分别标识多种缺陷的缺陷分割图像,或者可以输出每张仅标识有一种缺陷的缺陷分割图像。此时将缺陷分割图像中像素值为预设数值所在的区域设置为缺陷的位置,还可以在缺陷分割图像中标注出缺陷的类型,即输出该缺陷所属的类型,该预设数据值可以根据实际需要进行灵活设置,例如可以将缺陷分割图像中缺陷所在区域的像素值设置为1,其他区域的像素值设置为0等,当然,缺陷所在区域的像素值或其他区域的像素值也可以分别设置为0至N中任意一数值,其中N的取值可以根据实际需要进行灵活设置,例如可将缺陷分割图像中缺陷所在区域的像素值设置为6,其他区域的像素值设置为1等。
例如,如图5所示,当面板图像中存在缺陷1、缺陷2和缺陷3等3种缺陷时,在对面板图像进行像素分割时,可以分别输出各个缺陷对应的缺陷分割图像(即mask图像),即分别输出仅包含缺陷1的mask图像(a)、仅包含缺陷2的mask图像(b)、仅包含缺陷3的mask图像(c),其中,每张mask图像中缺陷所在区域的像素值可以均设置为1,其他区域的像素值设置为0。
又例如,如图6所示,当面板图像中存在缺陷1、缺陷2和缺陷3等3种缺陷时,在对面板图像进行像素分割时,可以分别输出各个缺陷对应的mask图像,即分别输出仅包含缺陷1的mask图像(d)、仅包含缺陷2的mask图像(e)、仅包含缺陷3的mask图像(f)。其中,mask图像(d)中缺陷1所在区域的像素值可以均设置为1,其他区域的像素值设置为0;mask图像(e)中缺陷2所在区域的像素值可以均设置为2,其他区域的像素值设置为0;mask图像(f)中缺陷3所在区域的像素值可以均设置为3,其他区域的像素值设置为0。
又例如,如图7所示,当面板图像中存在缺陷1、缺陷2和缺陷3等3种缺陷时,在对面板图像进行像素分割时,可以仅输出一张mask图像,在该mask图像中缺陷1所在区域的像素值可以均设置为1,缺陷2所在区域的像素值可以均设置为2,缺陷3所在区域的像素值可以均设置为3,其他区域的像素值设置为0。这样通过mask图像中的像素值就可以获知各个缺陷的位置及类型。
在步骤S103中,按照预设策略对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
需要说明的是,步骤S102和步骤S103之间的执行顺序可以互换,例如,可以先执行步骤S102,后执行步骤S103;或者,先执行步骤S103,后执行步骤S102。
其中,面板图像中可以包括电路,该电路可以是各个元器件的集合,例如,元器件可以包括三极管、二极管、电阻、电容、电感、两个元器件之间连接的线路、电位器、散热器、传感器及开关等,电路区域可以包括各个元器件所在的区域,例如,三极管区域、电阻区域、电容区域及传感器区域等。该预设策略可以是根据各个元器件所在的区域对面板图像进行电路区域分割,或者是对深度学习网络进行训练,并根据训练后的深度学习网络对面板图像进行电路区域分割,或者是利用图像分割方法对面板图像进行电路区域分割,或者是根据模板匹配的方式对面板图像进行电路区域分割等,具体策略可以根据实际需要进行灵活设置,在此处不作限定。为了方便描述,在本申请实施例中,以下将以模板匹配的方式对面板图像进行电路区域分割为例进行详细说明。
在某些实施方式中,按照预设策略对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像的步骤可以包括:
获取包含目标电路区域的模板;按照预设策略根据模板对面板图像进行模板匹配,得到匹配位置;根据匹配位置及目标电路区域对面板图像进行电路区域分割, 得到包括多个电路区域的电路分割图像。
具体地,首先,需要获取模板,例如,可以从面板缺陷分析装置的本地存储空间或服务器中获取预先设置的模板等,当然,模板的获取方式也可以是其他方式,具体内容在此处不作限定。预先设置的模板可以是与面板图像中的局部区域一致,该模板中可以包括目标电路区域,该目标电路区域可以是与面板图像中部分电路区域一致,该电路区域可以是电路中元器件所在的区域,例如,当面板图像为如图3所示时,该面板图像中存在多个重复相同的局部区域,此时可以将模板设置为与该局部区域一致,如图8(a)所示,该模板中可以包括面板图像中各个类型的元器件。然后对模板中包含的所有元器件进行人工或自动标注,不同的元器件可以用不同标识进行标注,例如,不同的元器件可以用不同的颜色进行标注(例如元器件A用红色标注及元器件B用蓝色标注等),或者不同的元器件可以用不同的数字或字母进行标注,或者不同的元器件可以用不同的坐标点进行标注等。
需要说明的是,也可以将模板设置为mask模板图像,在该mask模板图像中不同元器件所在的区域的像素值不同,例如,元器件A所在的区域的像素值为1,元器件B所在的区域的像素值为2,元器件C所在的区域的像素值为3等。另外,当面板图像中包含的电路较简单时,可以仅设置一个模板;当面板图像中包含的电路较复杂时,可以设置多个模板,为了方便描述,在本申请实施例中,以下将以设置一个模板为例进行详细说明,可以理解的是,本申请实施例只是为了便于描述所举的例子,不应理解为是对模板数量的限定,但不管设置有多少个模板,面板缺陷分析的过程都是类似的,都可以按照该示例进行理解。
在得到模板后,可以按照预设策略根据模板对面板图像进行模板匹配,得到匹配位置,该匹配位置可以是面板图像中与模板相似度最高所在的局部区域的位置,例如,可以根据模板中包含的元器件在面板图像中查找匹配的局部区域,并计算该局部区域与模板之间的相似度,直到找到相似度最高所在的局部区域。此时,可以根据匹配位置及模板中的目标电路区域对面板图像进行电路区域分割,例如,可以以匹配位置为基准,在面板图像中依次排开设置模板,使得无缝且无重叠设置的多个模板可以覆盖该面板图像,然后将多个模板中目标电路区域所在的位置一一对应到面板图像上电路区域所在的位置,并在面板图像的对应位置对电路区域进行标注,即对各个元器件进行分割标注,得到包括多个电路区域的电路分割图像。该电路分割图像中可以标注有各个电路区域的位置和类型(即各个元器件的位置和类型),例 如,电路分割图像中可以用不同的像素值对各个元器件所在的区域进行分割,该电路分割图像的大小可以与面板图像的大小一致。
例如,当面板图像中存在多种元器件时,在对面板图像进行电路区域分割的过程中,可以输出一张包含用不同数值分别标识多种元器件的电路分割图像,或者可以输出每张仅标识有一种元器件的电路分割图像。此时将电路分割图像中像素值为不同预设数值所在的区域分别设置为各个元器件的位置,还可以在电路分割图像中标注出各个元器件的类型,该预设数据值可以根据实际需要进行灵活设置,例如元器件D所在的区域的像素值为9,或元器件E所在的区域的像素值为8等。
例如,如图9所示,一个面板图像中可以包括多个同一种类型的元器件,例如同一种类型的元器件A可以包括位于不同的位置的元器件A1至A5等,同一种类型的元器件B可以包括位于不同的位置的元器件B1至B5等,同样的,同一种类型的元器件C至G也可以包括位于不同的位置的元器件。此时,可以分别用不同的颜色或数值或字母等标注分别对元器件A1至A5、元器件B1至B5、元器件C1至C5、元器件D1至D5、元器件E1至E4、元器件F1至F4及元器件G1和G2等进行分割及分类等,得到电路分割图像。
在某些实施方式中,按照预设策略根据模板对面板图像进行模板匹配,得到匹配位置的步骤可以包括:
按照预设策略从面板图像中截取与模板大小一致的多个局部区域;计算每个局部区域与模板之间的相似度,得到相似度集合;从相似度集合中筛选出相似度最大值所对应的局部区域,得到目标局部区域;将目标局部区域的位置设置为匹配位置。
为了提高匹配的可靠性,可以通过计算与模板相似度的方式来确定匹配位置,具体地,在确定匹配位置的过程中,首先可以按照模板的大小及模板中包含的目标电路区域等预设策略,对面板图像进行划分,得到多个与模板大小一致的局部区域,然后计算每个局部区域与模板之间的相似度,得到相似度集合,该相似度集合中包括每个局部区域对应的相似度。其次,从相似度集合中筛选出相似度最大的局部区域,得到目标局部区域;当相似度集合中存在多个相似度均为最大时,可以从最大的多个相似度中随机选择其中任意一个作为目标相似度,并将该目标相似度所对应的局部区域确定为目标局部区域,或者是,按照预设规则从最大的多个相似度中选择位置靠近面板图像中间的一个作为目标相似度,并将该目标相似度所对应的局部区域确定为目标局部区域等,最后得到的该将目标局部区域的位置即为匹配位置。
在某些实施方式中,按照预设策略根据模板对面板图像进行模板匹配,得到匹配位置的步骤可以包括:
按照预设策略从模板中截取预设区域,得到目标区域;计算面板图像中与目标区域大小一致的多个局部区域,与目标区域之间的相似度;筛选出相似度最大的局部区域,并将局部区域的位置设置为匹配位置。
为了进一步提高处理匹配的效率及灵活性,可以利用模板中的部分区域进行匹配来确定匹配位置,具体地,首先按照预设策略从模板中截取预设区域,得到目标区域,例如,如图8(b)所示,可以从图8(a)的模板中截取没有缺陷且特征丰富的部分区域作为目标区域,即截取包含元器件较多的区域作为目标区域。需要说明的是,可以从模板中仅截取一个预设区域作为目标区域,也可以从模板中截取多个预设区域作为目标区域,例如,当模板包含的元器件较少时,可以从模板中仅截取一个预设区域作为目标区域;当模板包含的元器件较多时,可以从模板中截取多个预设区域作为目标区域,为了方便描述,在本申请实施例中,以下将以截取一个预设区域作为目标区域为例进行详细说明,而不管截取多少个预设区域作为目标区域,面板缺陷分析的过程都是类似的,都可以按照截取一个预设区域作为目标区域的示例进行理解。
然后,可以按照目标区域的大小及目标区域中包含的元器件等对面板图像进行划分,得到多个与目标区域大小一致的局部区域,其次计算面板图像中每个局部区域与目标区域之间的相似度,并从计算得到的每个局部区域与目标区域之间的相似度中,筛选出相似度最大的局部区域,最后得到的该局部区域的位置即为匹配位置。当多个局部区域与目标区域之间的相似度中,存在多个相似度均为最大时,可以从最大的多个相似度中随机选择其中任意一个作为目标相似度,并将该目标相似度所对应的局部区域所在的位置设置为匹配位置,或者是,按照预设规则选择位置靠近面板图像中间的一个局部区域所在的位置设置为匹配位置,等等。
在某些实施方式中,根据匹配位置及目标电路区域对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像的步骤可以包括:
根据匹配位置将模板与面板图像对齐,生成模板图像,模板图像由覆盖面板图像的多个模板组成;根据模板图像中包含的目标电路区域,对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
具体地,在对面板图像进行电路区域分割的过程中,在确定匹配位置后,可以 根据匹配位置将模板与面板图像对齐,生成由覆盖面板图像的多个模板组成的模板图像,例如,可以先将模板放置于面板图像中的匹配位置,并将面板图像中匹配位置对应的局部区域与模板对齐,然后以匹配位置上的模板为基准,向面板图像中的上、下、左、或右等其他位置依次排开分别放置多个模板,直至多个模板可以覆盖面板图像,例如可以以匹配位置上的模板为基准,复制模板并向面板图像中的上、下、左、或右等移动复制得到的模板,使得匹配位置上的模板与移动后的模板的边对齐,并进行无缝且无重叠拼接,多个模板拼接得到模板图像,该模板图像的大小可以与面板图像的大小一致。其次,根据模板图像中包含的目标电路区域,以及预先标注的电路区域的位置和类型,对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像,例如,由于将模板图像中标注的电路区域的位置和类型复制到面板图像对应的位置上,使得面板图像中所有的电路区域都可以识别出来。
在某些实施方式中,根据模板图像中包含的目标电路区域,对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像的步骤可以包括:
计算模板图像与面板图像之间的匹配度;根据匹配度对模板图像进行调整,直至匹配度达到最大值,得到调整后的模板图像;根据调整后的模板图像中包含的目标电路区域,对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
由于若模板图像与面板图像之间对齐得不好,则会存在误差,因此为了减小误差,可以通过计算模板图像与面板图像之间的匹配度来调整模板图像,即为了减小模板图像与面板图像之间的匹配误差,提高匹配的精准性,可以对得到的模板图像进行局部优化。具体地,在生成模板图像后,可计算模板图像与面板图像之间的匹配度(例如互信息量),例如,若模板图像与面板图像完全吻合,则模板图像与面板图像之间的匹配度最高,若模板图像与面板图像存在不对齐的区域越多,则模板图像与面板图像之间的匹配度越低,若模板图像与面板图像存在不对齐的区域越少,则模板图像与面板图像之间的匹配度越高。
然后,可以保持面板图像的位置不变,根据匹配度对模板图像进行向左、右、上或下移动m个像素值等的调整(m的取值可以根据实际需要进行灵活设置),直至得到模板图像与面板图像之间的匹配度达到最大值,得到调整后的模板图像。例如,如图10所示,刚开始生成的模板图像存在非对齐部分,计算得到的模板图像与面板图像之间的匹配度较小,在对模板图像进行调整后,可以将模板图像与面板图 像对齐,使得模板图像与面板图像之间不存在非对齐部分。此时,可以根据调整后的模板图像中包含的目标电路区域,对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像,该电路分割图像中可以使用不同的像素值对各个元器件所在的区域进行标识。
在步骤S104中,根据缺陷的位置从电路分割图像中,截取缺陷所在的电路区域,得到待分析图像。
在得到缺陷的位置和电路分割图像后,可以根据缺陷的位置从电路分割图像中,截取缺陷所在的电路区域,得到待分析图像。例如,当缺陷1的位置位于电路区域A时,可以将电路区域A的图像作为待分析图像;当缺陷2的位置位于电路区域B和电路区域C时,可以将电路区域B和电路区域C的图像作为待分析图像,等等。
在某些实施方式中,根据缺陷的位置从电路分割图像中,截取缺陷所在的电路区域,得到待分析图像的步骤可以包括:将面板图像与电路分割图像进行配准,得到面板图像上位置与电路分割图像上位置之间的对应关系;根据对应关系确定缺陷的位置在电路分割图像中的区域,得到缺陷所在的电路区域;截取缺陷所在的电路区域,得到待分析图像。
具体地,由于电路分割图像与面板图像的大小一致,因此可以将面板图像与电路分割图像进行配准,例如,可以将面板图像与电路分割图像的边缘及包含的电路区域等进行对齐,从而可以得到面板图像上位置与电路分割图像上位置之间的对应关系,例如,元器件A在面板图像中位置与元器件A在电路分割图像中位置之间是对应的。然后可以根据面板图像上位置与电路分割图像上位置之间的对应关系,确定面板图像中缺陷的位置对应在电路分割图像中的位置所在的区域,得到缺陷所在的电路区域,此时可以截取缺陷所在的电路区域,得到待分析图像,该待分析图像中既包括了缺陷区域,又包括电路区域,该电路区域可以包括元器件所在的区域和非元器件所在的区域等,该待分析图像可以是缺陷区域与元器件区域的重叠部分的特征图像。
在步骤S105中,通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响,得到缺陷分析结果。
其中,机器学习模型可以是卷积神经网络(CNN,Convolutional Neural Network)或深度神经网络(DNN,Deep Neural Networks)等,还可以是其他的模型。首先可以预先对机器学习模型进行训练,例如,可以采集多张包含不同缺陷及电路区域等 的样本分析图像,然后利用多张样本分析图像和缺陷的类型对机器学习模型进行训练,得到缺陷对面板中电路造成的预测影响,以及获取预先设置的该缺陷对面板中电路造成的真实影响,该真实影响可以是基于历史记录或者经验处理等确定的影响,此时,可以对预测影响和真实影响进行收敛,得到训练后的机器学习模型。
为了提高分析的准确率,在得到待分析图像和缺陷的类型后,可以通过训练后的机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响,例如,造成电路中一条或多条线路的短路或断路等。其中,不同类型的缺陷及其所在的位置可以对面板中电路造成不同的影响,根据缺陷对面板中电路造成的影响可以生成缺陷分析结果,例如,当纤维物存在于非元器件所在的区域时,可以忽略该纤维物对面板中电路造成的影响;当刮伤存在于两个元器件之间连接的线路上时,会对面板中电路造成断路的影响;等等。
在某些实施方式中,通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响的步骤可以包括:通过机器学习模型计算待分析图像中缺陷的位置,与电路区域中元器件位置之间的重叠区域;根据重叠区域和缺陷的类型分析缺陷对面板中电路造成的影响。
具体地,在分析缺陷对面板中电路造成的影响的过程中,可以通过机器学习模型从待分析图像中识别出缺陷的位置以及电路区域中元器件位置,然后计算待分析图像中缺陷的位置与电路区域中元器件位置之间的重叠区域,此时可以根据重叠区域和缺陷的类型分析缺陷对面板中电路造成的影响。例如,针对某种类型的缺陷,其与元器件之间重叠区域越大,该缺陷对面板中电路造成的影响越大,反之,其与元器件之间重叠区域越小,该缺陷对面板中电路造成的影响越小,甚至可以忽略;而针对另一种类型的缺陷,其与元器件之间只要存在重叠区域,不管该重叠区域的大小该缺陷均可以对面板中电路造成同等程度的影响;等等。
在某些实施方式中,通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响,得到缺陷分析结果的步骤可以包括:
通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响;根据缺陷对面板中电路造成的影响确定缺陷修复策略,根据缺陷修复策略生成面板对应的缺陷分析结果。
由于缺陷对面板中电路造成的影响决定了后续需要采取的缺陷修复策略,因此在通过机器学习模型确定缺陷对面板中电路造成的影响后,可以基于缺陷对面板中 电路造成的影响进一步确定针对该缺陷所需采取的缺陷修复策略,该缺陷修复策略可以包括报废、对面板进行清洗或者通过某个修复部门对面板进行修复等,此时可以根据缺陷修复策略生成面板对应的缺陷分析结果。例如,缺陷1为存在异物且位于多个元器件所在的区域,可能会造成电路短路,其对应的缺陷修复策略为需要去部门A进行表面清洁处理;缺陷2为磨损且位于面板的空白区域(及非元器件区域),对电路影响不大,其对应的缺陷修复策略为可以将缺陷2忽略,不需要做任何处理;缺陷3为刮伤且刮伤的槽痕恰好位于某个元器件的线路部分,其对应的缺陷修复策略为报废或者去维修部门B进行修复后再进行功能检测;等等。本申请实施例中可以在解决在对缺陷检测和分类的同时,可以评估和分析缺陷对电路造成的影响,以及后续采取的缺陷修复策略,能够替代现有的人工分类及判断流程,提高了对面板缺陷分析的效率。
在某些实施方式中,根据缺陷对面板中电路造成的影响确定缺陷修复策略,根据缺陷修复策略生成面板对应的缺陷分析结果的步骤可以包括:根据缺陷对面板中电路造成的影响,获取电路中元器件的受损程度;根据受损程度确定缺陷修复策略,并根据缺陷修复策略生成面板对应的缺陷分析结果。
具体地,在确定缺陷修复策略的过程中,可以先根据缺陷对面板中电路造成的影响,获取电路中元器件的受损程度,该受损程度可以包括轻微受损或严重受损等,例如可以将受损程度分为多个等级,每个等级与每个受损程度对应,不同的等级可以对应不同的缺陷修复策略,例如,缺陷1对面板中电路造成的影响1,所对应的电路中元器件的受损程度为等级A,该等级A对应采取的处理方式为的缺陷修复策略a;缺陷2对面板中电路造成的影响2,所对应的电路中元器件的受损程度为等级B,该等级B对应采取的处理方式为的缺陷修复策略b;等等。此时,可以根据受损程度确定缺陷修复策略,并根据缺陷修复策略生成面板对应的缺陷分析结果。
根据上述实施例所描述的方法,以下将举例作进一步详细说明。
本实施例中,面板缺陷分析装置可以搭载于云服务器中,也可以部署在产线的数据中心,还可以集成到产线的信息技术(IT,Information Technology)系统等网络设备,以下将以面板缺陷分析装置为终端或服务器等网络设备为例,并以面板为TFT-LCD为例进行详细说明。
在一实施例中,网络设备也可以自行采集待分析的面板对应的面板图像,并对面板图像进行缺陷分析,得到缺陷分析结果,然后将缺陷分析结果发送给相关的质 检人员进行处理等。
在另一实施例中,例如,如图11所示,网络设备可以与图像存储系统和产线管理系统连接,其中,图像存储系统可以包括制造执行系统(MES,Manufacturing Execution System)、自动光学检测(AOI,Automatic Optic Inspection)系统、或IT系统等,产线管理系统可以包括AOI系统或IT系统等。在进行面板缺陷分析的过程中,可以由图像存储系统采集待分析的面板对应的面板图像,并对面板图像进行存储,然后图像存储系统可以将面板图像发送给网络设备,此时网络设备可以对面板图像进行缺陷分析,得到缺陷分析结果,并将缺陷分析结果发送给产线管理系统,产线管理系统将缺陷分析结果发送给相关的质检人员进行处理等。以下将以该实施例为例进行详细说明。
请参阅图12,图12为本申请实施例提供的面板缺陷分析方法的另一流程示意图。该方法流程可以包括:
S201、网络设备获取待分析的面板对应的面板图像,及对面板图像中的缺陷进行检测,并当检测到面板图像中存在缺陷时,确定缺陷的位置和类型。
网络设备可以接收图像存储系统主动发送的待分析的TFT-LCD面板对应的面板图像,或者是,网络设备可以向图像存储系统发送图像获取请求,并接收图像存储系统基于图像获取请求返回的待分析的TFT-LCD面板对应的面板图像,该面板图像可以是在产线对TFT-LCD面板生产的过程中,图像存储系统通过预先设置的摄像头实时或每间隔预设时间采集得到的,并对该面板图像进行存储。
在得到面板图像后,为了提高对面板图像中的缺陷进行检测的准确性,网络设备可以采用Mask-RCNN等深度学习网络对面板图像中的缺陷进行检测,具体可以包括建立Mask-RCNN模型、训练Mask-RCNN模型及应用Mask-RCNN模型进行检测等步骤。其中,在建立Mask-RCNN模型时,可以根据缺陷检测的需求建立一个可以检测图像中缺陷的位置和类型等的Mask-RCNN模型。然后,在训练Mask-RCNN模型时,可以采集多张包含缺陷的面板所对应的样本图像,得到训练样本集;其中,每张样本图像中可以包括一种或多种不同的缺陷,例如,样本图像A中包括缺陷1和缺陷2,样本图像B中包括缺陷3和缺陷4,样本图像C中包括缺陷5、缺陷6和缺陷7等。此时可以根据训练样本集对Mask-RCNN模型进行训练,得到训练样本集中每张样本图像对应的缺陷预测值,该缺陷预测值可以包括Mask-RCNN计算得到的缺陷位置和缺陷类型。
在应用Mask-RCNN模型进行检测时,训练后的Mask-RCNN模型对于输入的任何一张存在缺陷的面板图像均可以检测出缺陷的位置和类型,例如,可以采用训练后的Mask-RCNN对面板图像进行缺陷检测,当检测到面板图像中存在缺陷时,可以对面板图像中的缺陷进行特征提取,得到缺陷特征,然后可以根据缺陷特征确定缺陷的类型,以及,可以根据缺陷特征对面板图像进行像素分割,得到缺陷分割图像(即mask图像),该mask图像的大小可以与面板图像的大小一致,mask图像中可以用不同的像素值对缺陷区域和非缺陷区域进行分割,这样通过mask图像中的像素值就可以获知各个缺陷的位置及类型。当面板图像中存在多种缺陷时,可以输出一张包含用不同像素值分别标识多种缺陷的缺陷分割图像,例如,如图7所示,像素值为1所在的区域表示缺陷1所在的区域,像素值为2所在的区域表示缺陷2所在的区域,像素值为3所在的区域表示缺陷3所在的区域,像素值为0所在的区域表示非缺陷所在的区域等;或者可以输出每张用像素值仅标识有一种缺陷的缺陷分割图像,例如,如图6所示,第一张mask图像中像素值为1所在的区域表示缺陷1所在的区域,第二张mask图像中像素值为2所在的区域表示缺陷2所在的区域,第三张mask图像中像素值为3所在的区域表示缺陷3所在的区域。
S202、网络设备获取包含目标电路区域的模板,并按照预设策略根据模板对面板图像进行模板匹配,得到匹配位置。
网络设备需要对面板图像进行电路区域分割,以得到电路分割图像,例如,网络设备可以采用深度学习网络对面板图像进行电路区域分割,或者采用模板匹配的方式对面板图像进行电路区域分割等。例如,如图13所示,对面板图像进行电路区域分割的流程可以包括首先获取模板,然后对面板图像进行模板匹配,得到匹配位置,其次,根据匹配位置将模板与面板图像对齐,得到模板图像,以及对模板图像进行局部优化,得到优化后的模板图像,最后可以根据优化后的模板图像对电路进行分割,得到电路分割图像等,以下将进行详细说明。
具体地,首先网络设备需要获取包含目标电路区域的模板,该模板可以是与面板图像中的局部区域一致,该模板中包含的目标电路区域可以是与面板图像中部分电路区域一致,该电路区域可以是电路中元器件所在的区域,例如,当面板图像为如图3所示时,该面板图像中存在多个重复相同的局部区域,此时可以将模板设置为与该局部区域一致,如图8(a)所示,该模板中可以包括面板图像中各个类型的元器件,以及模板中包含的所有元器件均进行标注,其中,不同的元器件可以用不 同标识进行标注,例如,不同的元器件所在的区域可以用不同数值进行标注等。
在得到模板后,网络设备可以按照预设策略根据模板对面板图像进行模板匹配,得到匹配位置,例如,为了提高匹配的可靠性,可以通过计算与模板相似度的方式来确定匹配位置,网络设备可以按照预设策略从面板图像中截取与模板大小一致的多个局部区域,计算每个局部区域与模板之间的相似度,得到相似度集合,从相似度集合中筛选出相似度最大的局部区域,得到目标局部区域,将目标局部区域的位置设置为匹配位置。或者是,为了进一步提高处理匹配的效率及灵活性,可以利用模板中的部分区域进行匹配来确定匹配位置,网络设备可以按照预设策略从模板中截取预设区域,得到目标区域,该目标区域可以是包含元器件较多的区域,如图8(b)所示,然后可以按照目标区域的大小及目标区域中包含的元器件等对面板图像进行划分,得到多个与目标区域大小一致的局部区域,计算面板图像中与目标区域大小一致的多个局部区域,与目标区域之间的相似度,此时可以筛选出相似度最大的局部区域,并将该局部区域的位置设置为匹配位置。
S203、网络设备根据匹配位置将模板与面板图像对齐,生成包含多个模板的模板图像,并对模板图像进行局部优化。
在确定匹配位置后,网络设备可以根据匹配位置将模板与面板图像对齐,例如,可以先将第一张模板放置于面板图像中的匹配位置,并将面板图像中匹配位置对应的局部区域与模板对齐,然后以匹配位置上的模板为基准,复制第一张模板,得到第二张模板,将第二张模板向面板图像中的上、下、左、或右等移动,使得匹配位置上的第一张模板与移动后的第二张模板的边缘对齐,并进行无缝且无重叠拼接,以此类推,复制第一张模板或第二张模板,得到第三张模板,将第三张模板放置于面板图像中与模板匹配的局部局域,直至多张模板拼接可以覆盖面板图像,从而可以得到模板图像,该模板图像的大小可以与面板图像的大小一致。
在得到模板图像后,为了减小模板图像与面板图像之间的匹配误差,提高匹配的精准性,可以对得到的模板图像进行局部优化。例如,网络设备可以计算模板图像与面板图像之间的匹配度,根据匹配度判断模板图像与面板图像之间是否完全对齐(例如是否存在非对齐部分),若未对齐,则可以保持面板图像的位置不变,并根据匹配度对模板图像进行调整,直至匹配度达到最大值,说明模板图像与面板图像之间已经完全对齐,此时不需要再对模板图像进行调整,可以得到调整后的模板图像(即优化后的模板图像)。
S204、网络设备根据优化后的模板图像中包含的目标电路区域,对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
在得到优化后的模板图像后,网络设备可以根据优化后的模板图像中包含的目标电路区域,以及预先标注的目标电路区域的位置和类型等,对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。例如,可以将模板图像中标注的目标电路区域的位置和类型复制到面板图像对应的位置上,使得面板图像中所有的电路区域都可以分割出来。可将每个元器件分割为对应的电路区域,例如,如图9所示,可从面板图像中分割出多个元器件区域,得到包括多个元器件区域的电路分割图像,在电路分割图像中,可以分别用不同的颜色或数值等对元器件A1至A5、元器件B1至B5、元器件C1至C5、元器件D1至D5、元器件E1至E4、元器件F1至F4及元器件G1和G2等进行分割及分类等。
S205、网络设备根据缺陷的位置从电路分割图像中,截取缺陷所在的电路区域,得到待分析图像。
在得到缺陷的位置和电路分割图像后,网络设备可以将面板图像与电路分割图像进行配准,例如,可以将面板图像与电路分割图像的边缘及包含的电路区域等进行对齐,从而可以得到面板图像上位置与电路分割图像上位置之间的对应关系,然后可以根据面板图像上位置与电路分割图像上位置之间的对应关系,确定面板图像中缺陷的位置对应在电路分割图像中的位置所在的区域,得到缺陷所在的电路区域,此时可以截取缺陷所在的电路区域,得到待分析图像。例如,当缺陷1的位置位于电路区域A时,可以将电路区域A的图像作为待分析图像;当缺陷2的位置位于电路区域B和电路区域C时,可以将电路区域B和电路区域C的图像作为待分析图像,等等。
S206、网络设备通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响。
为了提高分析的准确率,在得到待分析图像和缺陷的类型后,网络设备可以通过CNN或DNN等机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响,例如,计算待分析图像中缺陷的位置,与电路区域中元器件位置之间的重叠区域;根据重叠区域和缺陷的类型分析缺陷对面板中电路造成的影响(例如造成电路的短路或断路等),不同类型的缺陷及其所在的位置可以对面板中电路造成不同的影响,例如,当刮伤存在于两个元器件之间连接的线路上时,会对面 板中电路造成断路的影响等。其中,该机器学习模型可以是预先训练好的模型,例如,可以采集多张包含不同缺陷及电路区域等的样本分析图像,然后利用多张样本分析图像和缺陷的类型对机器学习模型进行训练,得到缺陷对面板中电路造成的预测影响,以及获取预先设置的该缺陷对面板中电路造成的真实影响,此时可以对预测影响和真实影响进行收敛,得到训练后的机器学习模型。
S207、网络设备根据缺陷对面板中电路造成的影响确定缺陷修复策略,根据缺陷修复策略生成面板对应的缺陷分析结果。
由于缺陷对面板中电路造成的影响决定了后续需要采取的缺陷修复策略,因此在通过机器学习模型确定缺陷对面板中电路造成的影响后,网络设备可以基于缺陷对面板中电路造成的影响获取电路中元器件的受损程度,此时可以根据元器件的受损程度进一步确定针对该缺陷所需采取的缺陷修复策略。网络设备可以将缺陷分析结果发送给产线管理系统,产线管理系统将缺陷分析结果发送给相关的质检人员进行处理等。
需要说明的是,可以建立用于存储的数据库,以存储不同类型的缺陷及其所在的位置可以对面板中电路造成不同的影响,以及针对不同影响所需采集的缺陷修复策略等,例如,数据库中可以存储:元器件A存在损伤(即缺陷所在的位置与元器件A之间存在重叠)、损伤类型(即缺陷类型)、损伤程度(即缺陷对电路造成的影响)、及缺陷修复策略等之间的对应关系;元器件B存在损伤、损伤类型、损伤程度、及缺陷修复策略等之间的对应关系;元器件C和D同时损伤、损伤类型、损伤程度、及缺陷修复策略等之间的对应关系;等等。或者是,数据库中可以存储:缺陷1编号、缺陷1类型、缺陷1影响到的元器件A、及缺陷修复策略等之间的对应关系;缺陷2编号、缺陷2类型、缺陷2影响到的元器件B和C、及缺陷修复策略等之间的对应关系;等等。
可以理解的是,也可以建立两个数据库,其中一个数据库中存储各个元器件受损对应的缺陷修复策略,或者多个元器件同时受损对应的缺陷修复策略等,其存储的是受损与缺陷修复策略(即处理方式)之间的对应关系,而另一个数据库中存储的是受损的类型(即缺陷的类型)和可能造成元器件损伤程度之间的关系,其中,针对不同的缺陷的类型及不同的元器件,可能存在同样的缺陷修复策略或不同的缺陷修复策略等,后续可以根据查询需求到对应的数据库进行查询。当然,这两个数据库也可以建立一个或两个模型来替代,其中一个模型可以根据受损的类型计算出 可能造成元器件损伤程度,另一个模型可以根据元器件受损计算出对应的缺陷修复策略等。
在得到待分析图像后,可以计算待分析图像中缺陷区域与电路区域中每个元器件之间的重叠区域,根据缺陷与元器件之间的重叠区域计算出元器件受损的概率和面积等,得到元器件的受损程度,以确定该缺陷的类型是否会损伤元器件,例如,某些缺陷与元器件之间存在重叠会造成元器件百分之百损伤,缺陷与元器件之间存在重叠会造成元器件的概率性损伤,因此当缺陷与元器件之间存在重叠后,可以根据缺陷的类型计算元器件受损的概率,例如刮伤缺陷对于元器件损伤的概率较大,纤维缺陷对于元器件损伤的概率较小等。此时可以根据元器件的受损程度查询数据库确定缺陷修复策略(即采取的处理方式),例如,可忽略或可采取某种方式修复等。
本申请实施例中,通过对缺陷的位置和类型进行检测及对面板图像进行电路区域分割,可以根据缺陷的位置从电路分割图像中截取包含缺陷的待分析图像,并通过机器学习模型基于待分析图像和缺陷的类型分析缺陷对面板中电路造成的影响,不仅可以对缺陷进行检测和分类等,而且还可以分析缺陷对电路造成的影响,以及后续采取的缺陷修复策略,能够替代现有的人工分类及判断等流程,实现了自动对面板缺陷进行检测及分析,而无需人工参与,不仅减少了人工的工作量,而且提高了对面板进行缺陷分析的准确性及效率。
为便于更好的实施本申请实施例提供的面板缺陷分析方法,本申请实施例还提供一种基于上述面板缺陷分析方法的装置。其中名词的含义与上述面板缺陷分析方法中相同,具体实现细节可以参考方法实施例中的说明。
请参阅图14,图14为本申请实施例提供的面板缺陷分析装置的结构示意图,其中该面板缺陷分析装置可以包括获取单元301、检测单元302、分割单元303、截取单元304及分析单元305等。
其中,获取单元301,用于获取待分析的面板对应的面板图像。
获取单元301可以在生产面板的产线上预先设置图像采集装置(例如摄像头或照相机等),并在面板生产的过程中,通过图像采集装置实时或每间隔预设时间采集待分析的面板对应的面板图像;或者是,获取单元301从面板缺陷分析装置的本地存储空间中获取预存的面板图像;或者是,获取单元301向图像存储服务器发送图像获取请求,并接收图像存储服务器基于图像获取请求返回的面板图像等;当然,面板图像也可以是通过其他方式获取到,具体获取方式在此处不作限定。其中,面 板可以包括TFT-LCD面板、LCD面板、集成电路面板或芯片面板等,还可以是其他类型的面板。
检测单元302,用于对面板图像中的缺陷进行检测,得到缺陷的位置和类型。
在得到面板图像后,检测单元302可以通过卷积神经网络或Mask-RCNN等深度学习网络对面板图像中的缺陷进行检测,或者可以通过图像分割方法对面板图像中的缺陷进行检测等,具体检测方式可以根据实际需要进行灵活设置。
在某些实施方式中,检测单元302具体可以用于:采用预设的检测模型对面板图像中的缺陷进行特征提取,得到缺陷特征;根据缺陷特征确定缺陷的类型,以及根据缺陷特征对面板图像进行像素分割,得到缺陷分割图像;将缺陷分割图像中像素值为预设数值所在的区域设置为缺陷的位置。
为了提高对面板图像中的缺陷进行检测的准确性,检测单元302可以采用预设的检测模型进行检测,其中,预设的检测模型可以是Mask-RCNN或者是其他检测模型,为了描述方便,在本申请实施例中,将以利用Mask-RCNN检测面板图像中的缺陷为例进行说明。首先,需要进行模型训练:采集多张包含缺陷的面板所对应的样本图像,得到训练样本集;其中,每张样本图像中可以包括一种或多种不同的缺陷,以及包括由多种元器件组成的电路等,预先在每张样本图像中包含的缺陷的位置和类型进行标注。然后根据训练样本集对Mask-RCNN进行训练,得到训练样本集中每张样本图像对应的缺陷预测值,该缺陷预测值可以包括Mask-RCNN计算得到的缺陷位置和缺陷类型,例如,可以采用Mask-RCNN对面板图像中的缺陷进行特征提取,得到缺陷特征,并根据缺陷特征确定缺陷的类型及缺陷的位置等,
此时,检测单元302可以采用训练后的Mask-RCNN对面板图像进行缺陷检测,当未检测到面板图像中存在缺陷时,可以确定该面板图像对应的面板合格,不需要执行后续的步骤;当检测到面板图像中存在缺陷时,可以对面板图像中的缺陷进行特征提取,得到缺陷特征。
分割单元303,用于按照预设策略对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
其中,面板图像中可以包括电路,该电路可以是各个元器件的集合,例如,元器件可以包括三极管、电阻、电容及电感等,电路区域可以包括各个元器件所在的区域。该预设策略可以是根据各个元器件所在的区域对面板图像进行电路区域分割,或者是对深度学习网络进行训练,并根据训练后的深度学习网络对面板图像进行电 路区域分割,或者是利用图像分割方法对面板图像进行电路区域分割,或者是根据模板匹配的方式对面板图像进行电路区域分割等,具体策略可以根据实际需要进行灵活设置,在此处不作限定。为了方便描述,在本申请实施例中,以下将以模板匹配的方式对面板图像进行电路区域分割为例进行详细说明。
在某些实施方式中,如图15所示,分割单元303可以包括获取子单元3031、匹配子单元3032及分割子单元3033等,具体可以如下:
获取子单元3031,用于获取包含目标电路区域的模板。
匹配子单元3032,用于按照预设策略根据模板对面板图像进行模板匹配,得到匹配位置。
分割子单元3033,用于根据匹配位置及目标电路区域对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
具体地,首先,获取子单元3031需要获取模板,例如,可以从面板缺陷分析装置的本地存储空间或服务器中获取预先设置的模板等,当然,模板的获取方式也可以是其他方式,具体内容在此处不作限定。预先设置的模板可以是与面板图像中的局部区域一致,该模板中可以包括目标电路区域,该目标电路区域可以是与面板图像中部分电路区域一致,该电路区域可以是电路中元器件所在的区域,例如,当面板图像为如图3所示时,该面板图像中存在多个重复相同的局部区域,此时可以将模板设置为与该局部区域一致,如图8(a)所示,该模板中可以包括面板图像中各个类型的元器件。然后对模板中包含的所有元器件进行人工或自动标注,不同的元器件可以用不同标识进行标注,例如,不同的元器件可以用不同的颜色进行标注,或者不同的元器件可以用不同的数字或字母进行标注,或者不同的元器件可以用不同的坐标点进行标注等。
需要说明的是,也可以将模板设置为mask模板图像,在该mask模板图像中不同元器件所在的区域的像素值不同。另外,当面板图像中包含的电路较简单时,可以仅设置一个模板;当面板图像中包含的电路较复杂时,可以设置多个模板。
在得到模板后,匹配子单元3032可以按照预设策略根据模板对面板图像进行模板匹配,得到匹配位置,该匹配位置可以是面板图像中与模板相似度最高所在的局部区域的位置,例如,可以根据模板中包含的元器件在面板图像中查找匹配的局部区域,并计算该局部区域与模板之间的相似度,直到找到相似度最高所在的局部区域。此时,分割子单元3033可以根据匹配位置及模板中的目标电路区域对面板图像 进行电路区域分割,例如,可以以匹配位置为基准,在面板图像中依次排开设置模板,使得无缝且无重叠设置的多个模板可以覆盖该面板图像,然后将多个模板中目标电路区域所在的位置一一对应到面板图像上电路区域所在的位置,并在面板图像上对应位置对电路区域进行标注,即对各个元器件进行分割标注,得到包括多个电路区域的电路分割图像。该电路分割图像中可以标注有各个电路区域的位置和类型(即各个元器件的位置和类型),例如,电路分割图像中可以用不同的像素值对各个元器件所在的区域进行分割,该电路分割图像的大小可以与面板图像的大小一致。
例如,当面板图像中存在多种元器件时,在对面板图像进行电路区域分割的过程中,可以输出一张包含用不同数值分别标识多种元器件的电路分割图像,或者可以输出每张仅标识有一种元器件的电路分割图像。此时将电路分割图像中像素值为不同预设数值所在的区域分别设置为各个元器件的位置,还可以在电路分割图像中标注出各个元器件的类型,该预设数据值可以根据实际需要进行灵活设置,例如元器件D所在的区域的像素值为9,或元器件E所在的区域的像素值为8等。
在某些实施方式中,匹配子单元3032具体可以用于:按照预设策略从面板图像中截取与模板大小一致的多个局部区域;计算每个局部区域与模板之间的相似度,得到相似度集合;从相似度集合中筛选出相似度最大的局部区域,得到目标局部区域;将目标局部区域的位置设置为匹配位置。
为了提高匹配的可靠性,匹配子单元3032可以通过计算与模板相似度的方式来确定匹配位置,具体地,在确定匹配位置的过程中,首先匹配子单元3032可以按照模板的大小及模板中包含的目标电路区域等预设策略,对面板图像进行划分,得到多个与模板大小一致的局部区域,然后计算每个局部区域与模板之间的相似度,得到相似度集合,该相似度集合中包括每个局部区域对应的相似度。其次,从相似度集合中筛选出相似度最大的局部区域,得到目标局部区域;最后得到的该将目标局部区域的位置即为匹配位置。
在某些实施方式中,匹配子单元3032具体可以用于:按照预设策略从模板中截取预设区域,得到目标区域;计算面板图像中与目标区域大小一致的多个局部区域,与目标区域之间的相似度;筛选出相似度最大的局部区域,并将局部区域的位置设置为匹配位置。
为了进一步提高处理匹配的效率及灵活性,匹配子单元3032可以利用模板中的部分区域进行匹配来确定匹配位置,具体地,首先匹配子单元3032按照预设策略从 模板中截取预设区域,得到目标区域,例如,如图8(b)所示,可以从图8(a)的模板中截取没有缺陷且特征丰富的部分区域作为目标区域,即截取包含元器件较多的区域作为目标区域。需要说明的是,可以从模板中仅截取一个预设区域作为目标区域,也可以从模板中截取多个预设区域作为目标区域,例如,当模板包含的元器件较少时,可以从模板中仅截取一个预设区域作为目标区域;当模板包含的元器件较多时,可以从模板中截取多个预设区域作为目标区域。
然后,匹配子单元3032可以按照目标区域的大小及目标区域中包含的元器件等对面板图像进行划分,得到多个与目标区域大小一致的局部区域,其次计算面板图像中每个局部区域与目标区域之间的相似度,并从计算得到的每个局部区域与目标区域之间的相似度中,筛选出相似度最大的局部区域,最后得到的该局部区域的位置即为匹配位置。当多个局部区域与目标区域之间的相似度中,存在多个相似度均为最大时,可以从最大的多个相似度中随机选择其中任意一个作为目标相似度,并将该目标相似度所对应的局部区域所在的位置设置为匹配位置,或者是,按照预设规则选择位置靠近面板图像中间的一个局部区域所在的位置设置为匹配位置,等等。
在某些实施方式中,分割子单元3033可以包括生成模块和分割模块等,具体可以如下:
生成模块,用于根据匹配位置将模板与面板图像对齐,生成模板图像,模板图像由覆盖面板图像的多个模板组成;
分割模块,用于根据模板图像中包含的目标电路区域,对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
具体地,在对面板图像进行电路区域分割的过程中,在确定匹配位置后,生成模块可以根据匹配位置将模板与面板图像对齐,生成由覆盖面板图像的多个模板组成的模板图像。其次,分割模块根据模板图像中包含的目标电路区域,以及预先标注的电路区域的位置和类型,对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像,例如,由于将模板图像中标注的电路区域的位置和类型复制到面板图像对应的位置上,使得面板图像中所有的电路区域都可以识别出来。
在某些实施方式中,分割模块具体可以用于:计算模板图像与面板图像之间的匹配度;根据匹配度对模板图像进行调整,直至匹配度达到最大值,得到调整后的模板图像;根据调整后的模板图像中包含的目标电路区域,对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
由于若模板图像与面板图像之间对齐得不好,则会存在误差,因此为了减小误差,分割模块可以通过计算模板图像与面板图像之间的匹配度来调整模板图像,即为了减小模板图像与面板图像之间的匹配误差,提高匹配的精准性,可以对得到的模板图像进行局部优化。具体地,在生成模板图像后,分割模块可计算模板图像与面板图像之间的匹配度(例如互信息量),例如,若模板图像与面板图像完全吻合,则模板图像与面板图像之间的匹配度最高,若模板图像与面板图像存在不对齐的区域越多,则模板图像与面板图像之间的匹配度越低,若模板图像与面板图像存在不对齐的区域越少,则模板图像与面板图像之间的匹配度越高。
然后,可以保持面板图像的位置不变,根据匹配度对模板图像进行向左、右、上或下移动m个像素值等的调整(m的取值可以根据实际需要进行灵活设置),直至模板图像与面板图像之间的匹配度达到最大值,得到调整后的模板图像。例如,如图10所示,刚开始生成的模板图像存在非对齐部分,计算得到的模板图像与面板图像之间的匹配度较小,在对模板图像进行调整后,可以将模板图像与面板图像对齐,使得模板图像与面板图像之间不存在非对齐部分。此时,可以根据调整后的模板图像中包含的目标电路区域,对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像,该电路分割图像中可以使用不同的像素值对各个元器件所在的区域进行标识。
截取单元304,用于根据缺陷的位置从电路分割图像中,截取缺陷所在的电路区域,得到待分析图像。
在某些实施方式中,截取单元304具体可以用于:将面板图像与电路分割图像进行配准,得到面板图像上位置与电路分割图像上位置之间的对应关系;根据对应关系确定缺陷的位置在电路分割图像中的区域,得到缺陷所在的电路区域;截取缺陷所在的电路区域,得到待分析图像。
具体地,由于电路分割图像与面板图像的大小一致,因此截取单元304可以将面板图像与电路分割图像进行配准,例如,可以将面板图像与电路分割图像的边缘及包含的电路区域等进行对齐,从而可以得到面板图像上位置与电路分割图像上位置之间的对应关系,例如,元器件A在面板图像中位置与元器件A在电路分割图像中位置之间是对应的。然后截取单元304可以根据面板图像上位置与电路分割图像上位置之间的对应关系,确定面板图像中缺陷的位置对应在电路分割图像中的位置所在的区域,得到缺陷所在的电路区域,此时可截取缺陷所在的电路区域,得到待 分析图像,该待分析图像中既包括了缺陷区域,又包括电路区域,该电路区域可以包括元器件所在的区域和非元器件所在的区域等,该待分析图像可以是缺陷区域与元器件区域的重叠部分的特征图像。
分析单元305,用于通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响,得到缺陷分析结果。
其中,机器学习模型可以是CNN或DNN等,还可以是其他的模型。首先分析单元305可以预先对机器学习模型进行训练,例如,可以采集多张包含不同缺陷及电路区域等的样本分析图像,然后利用多张样本分析图像和缺陷的类型对机器学习模型进行训练,得到缺陷对面板中电路造成的预测影响,以及获取预先设置的该缺陷对面板中电路造成的真实影响,此时,可以对预测影响和真实影响进行收敛,得到训练后的机器学习模型。
为了提高分析的准确率,在得到待分析图像和缺陷的类型后,分析单元305可以通过训练后的机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响,例如,造成电路中一条或多条线路的短路或断路等。其中,不同类型的缺陷及其所在的位置可以对面板中电路造成不同的影响,根据缺陷对面板中电路造成的影响可以生成缺陷分析结果,例如,当纤维物存在于非元器件所在的区域时,可以忽略该纤维物对面板中电路造成的影响;当刮伤存在于两个元器件之间连接的线路上时,会对面板中电路造成断路的影响;等等。
在某些实施方式中,如图16所示,分析单元305可以包括分析子单元3051及确定子单元3052等,具体可以如下:
分析子单元3051,用于通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响;
确定子单元3052,用于根据缺陷对面板中电路造成的影响确定缺陷修复策略,根据缺陷修复策略生成面板对应的缺陷分析结果。
由于缺陷对面板中电路造成的影响决定了后续需要采取的缺陷修复策略,因此在分析子单元3051通过机器学习模型确定缺陷对面板中电路造成的影响后,确定子单元3052可以基于缺陷对面板中电路造成的影响进一步确定针对该缺陷所需采取的缺陷修复策略。
在某些实施方式中,分析子单元3051具体可以用于:通过机器学习模型计算待分析图像中缺陷的位置,与电路区域中元器件位置之间的重叠区域;根据重叠区域 和缺陷的类型分析缺陷对面板中电路造成的影响。
具体地,在分析缺陷对面板中电路造成的影响的过程中,分析子单元3051可以通过机器学习模型从待分析图像中识别出缺陷的位置以及电路区域中元器件位置,然后计算待分析图像中缺陷的位置与电路区域中元器件位置之间的重叠区域,此时可以根据重叠区域和缺陷的类型分析缺陷对面板中电路造成的影响。
在某些实施方式中,确定子单元3052具体可以用于:根据缺陷对面板中电路造成的影响,获取电路中元器件的受损程度;根据受损程度确定缺陷修复策略,并根据缺陷修复策略生成面板对应的缺陷分析结果。
具体地,在确定缺陷修复策略的过程中,确定子单元3052可以先根据缺陷对面板中电路造成的影响,获取电路中元器件的受损程度。此时,可以根据受损程度确定缺陷修复策略,并根据缺陷修复策略生成面板对应的缺陷分析结果。
本申请实施例还提供一种网络设备,该网络设备可以为服务器或终端等设备。如图17所示,其示出了本申请实施例所涉及的网络设备的结构示意图,具体来讲:
该网络设备可以包括一个或者一个以上处理核心的处理器401、一个或一个以上计算机可读存储介质的存储器402、电源403和输入单元404等部件。本领域技术人员可以理解,图17中示出的网络设备结构并不构成对网络设备的限定,可以包括比图示更多或更少的部件,或者组合某些部件,或者不同的部件布置。其中:
处理器401是该网络设备的控制中心,利用各种接口和线路连接整个网络设备的各个部分,通过运行或执行存储在存储器402内的软件程序和/或模块,以及调用存储在存储器402内的数据,执行网络设备的各种功能和处理数据,从而对网络设备进行整体监控。处理器401可包括一个或多个处理核心;优选的,处理器401可集成应用处理器和调制解调处理器,其中,应用处理器主要处理操作系统、用户界面和应用程序等,调制解调处理器主要处理无线通信。可以理解的是,上述调制解调处理器也可以不集成到处理器401中。
存储器402可用于配置为存储一个或多个程序,当所述一个或多个程序被所述一个或多个处理器执行时,使得所述一个或多个处理器实现上述面板缺陷分析方法。换言之,存储器402可用于存储软件程序以及模块,处理器401通过运行存储在存储器402的软件程序以及模块,从而执行各种功能应用以及数据处理。存储器402可主要包括存储程序区和存储数据区,其中,存储程序区可存储操作系统、至少一个功能所需的应用程序(比如声音播放功能、图像播放功能等)等;存储数据区可 存储根据网络设备的使用所创建的数据等。此外,存储器402可以包括高速随机存取存储器,还可以包括非易失性存储器,例如至少一个磁盘存储器件、闪存器件、或其他易失性固态存储器件。相应地,存储器402还可以包括存储器控制器,以提供处理器401对存储器402的访问。
网络设备还包括给各个部件供电的电源403,优选的,电源403可以通过电源管理系统与处理器401逻辑相连,从而通过电源管理系统实现管理充电、放电、以及功耗管理等功能。电源403还可以包括一个或一个以上的直流或交流电源、再充电系统、电源故障检测电路、电源转换器或者逆变器、电源状态指示器等任意组件。
该网络设备还可包括输入单元404,该输入单元404可用于接收输入的数字或字符信息,以及产生与用户设置以及功能控制有关的键盘、鼠标、操作杆、光学或者轨迹球信号输入。
尽管未示出,网络设备还可以包括显示单元等,在此不再赘述。具体在本实施例中,网络设备中的处理器401会按照如下的指令,将一个或一个以上的应用程序的进程对应的可执行文件加载到存储器402中,并由处理器401来运行存储在存储器402中的应用程序,从而实现本申请实施例提供的面板缺陷分析方法,如下:
获取待分析的面板对应的面板图像;对面板图像中的缺陷进行检测,得到缺陷的位置和类型;按照预设策略对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像;根据缺陷的位置从电路分割图像中,截取缺陷所在的电路区域,得到待分析图像;通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响,得到缺陷分析结果。
按照预设策略对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像的步骤可以包括:获取包含目标电路区域的模板;按照预设策略根据模板对面板图像进行模板匹配,得到匹配位置;根据匹配位置及目标电路区域对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响,得到缺陷分析结果的步骤包括:通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响;根据缺陷对面板中电路造成的影响确定缺陷修复策略,根据缺陷修复策略生成面板对应的缺陷分析结果。
在上述实施例中,对各个实施例的描述都各有侧重,某个实施例中没有详述的部分,可以参见上文针对面板缺陷分析方法的详细描述,此处不再赘述。
由上可知,本申请实施例可以对待分析的面板对应的面板图像中的缺陷进行检测,得到缺陷的位置和类型(例如液体残留、磨损或刮伤等),以及按照预设策略对面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像,然后可以根据缺陷的位置从电路分割图像中,截取缺陷所在的电路区域,得到待分析图像,此时可以通过机器学习模型并基于待分析图像和缺陷的类型,分析缺陷对面板中电路造成的影响(例如该缺陷对电路造成的短路或断路等影响),得到缺陷分析结果。该方案通过缺陷的位置和类型进行检测及对面板图像进行电路区域分割,可以根据缺陷的位置从电路分割图像中截取包含缺陷的待分析图像,并通过机器学习模型基于待分析图像和缺陷的类型分析缺陷对面板中电路造成的影响,实现了自动对面板缺陷进行检测及分析,而无需人工参与,不仅减少了人工的工作量,而且提高了对面板进行缺陷分析的准确性及效率。
本领域普通技术人员可以理解,上述实施例的各种方法中的全部或部分步骤可以通过指令来完成,或通过指令控制相关的硬件来完成,该指令可以存储于一计算机可读存储介质中,并由处理器进行加载和执行。
为此,本申请实施例提供一种存储介质,存有处理器可执行指令,所述指令由一个或一个以上处理器执行时,实现本申请上述实施例所提供的任一种面板缺陷分析方法中的步骤。
其中,该存储介质可以包括:只读存储器(ROM,Read Only Memory)、随机存取记忆体(RAM,Random Access Memory)、磁盘或光盘等。
由于该存储介质中所存储的指令,可以执行本申请实施例所提供的任一种面板缺陷分析方法中的步骤,因此,可以实现本申请实施例所提供的任一种面板缺陷分析方法所能实现的有益效果,详见前面的实施例,在此不再赘述。
以上对本申请实施例所提供的一种面板缺陷分析方法、装置、存储介质及网络设备进行了详细介绍,本文中应用了具体个例对本申请的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本申请的方法及其核心思想;同时,对于本领域的技术人员,依据本申请的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本申请的限制。

Claims (16)

  1. 一种面板缺陷分析方法,由网络设备执行,包括:
    获取待分析的面板对应的面板图像;
    对所述面板图像中的缺陷进行检测,得到缺陷的位置和类型;
    按照预设策略对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像;
    根据所述缺陷的位置从所述电路分割图像中,截取所述缺陷所在的电路区域,得到待分析图像;
    通过机器学习模型并基于所述待分析图像和所述缺陷的类型,分析所述缺陷对所述面板中电路造成的影响,得到缺陷分析结果。
  2. 根据权利要求1所述的面板缺陷分析方法,所述按照预设策略对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像的步骤包括:
    获取包含目标电路区域的模板;
    按照预设策略根据所述模板对所述面板图像进行模板匹配,得到匹配位置;
    根据所述匹配位置及所述目标电路区域对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
  3. 根据权利要求2所述的面板缺陷分析方法,所述根据所述匹配位置及所述目标电路区域对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像的步骤包括:
    根据所述匹配位置将所述模板与面板图像对齐,生成模板图像,所述模板图像由覆盖所述面板图像的多个所述模板组成;
    根据所述模板图像中包含的目标电路区域,对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
  4. 根据权利要求3所述的面板缺陷分析方法,所述根据所述模板图像中包含的目标电路区域,对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像的步骤包括:
    计算所述模板图像与所述面板图像之间的匹配度;
    根据所述匹配度对所述模板图像进行调整,直至所述匹配度达到最大值,得到调整后的模板图像;
    根据所述调整后的模板图像中包含的目标电路区域,对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
  5. 根据权利要求2所述的面板缺陷分析方法,所述按照预设策略根据所述模板对所述面板图像进行模板匹配,得到匹配位置的步骤包括:
    按照预设策略从所述面板图像中截取与所述模板大小一致的多个局部区域;
    计算每个局部区域与所述模板之间的相似度,得到相似度集合;
    从所述相似度集合中筛选出相似度最大的局部区域,得到目标局部区域;
    将所述目标局部区域的位置设置为匹配位置。
  6. 根据权利要求2所述的面板缺陷分析方法,所述按照预设策略根据所述模板对所述面板图像进行模板匹配,得到匹配位置的步骤包括:
    按照预设策略从所述模板中截取预设区域,得到目标区域;
    计算所述面板图像中与所述目标区域大小一致的多个局部区域,与所述目标区域之间的相似度;
    筛选出相似度最大的局部区域,并将所述局部区域的位置设置为匹配位置。
  7. 根据权利要求1所述的面板缺陷分析方法,所述对所述面板图像中的缺陷进行检测,得到缺陷的位置和类型的步骤包括:
    采用预设的检测模型对所述面板图像中的缺陷进行特征提取,得到缺陷特征;
    根据所述缺陷特征确定所述缺陷的类型,以及根据所述缺陷特征对所述面板图像进行像素分割,得到缺陷分割图像;
    将所述缺陷分割图像中像素值为预设数值所在的区域设置为缺陷的位置。
  8. 根据权利要求1所述的面板缺陷分析方法,所述根据所述缺陷的位置从所述电路分割图像中,截取所述缺陷所在的电路区域,得到待分析图像的步骤包括:
    将所述面板图像与所述电路分割图像进行配准,得到所述面板图像上位置与所述电路分割图像上位置之间的对应关系;
    根据所述对应关系确定所述缺陷的位置在所述电路分割图像中的区域,得到所述缺陷所在的电路区域;
    截取所述缺陷所在的电路区域,得到待分析图像。
  9. 根据权利要求1至8任一项所述的面板缺陷分析方法,所述通过机器学习模型并基于所述待分析图像和所述缺陷的类型,分析所述缺陷对所述面板中电路造成的影响,得到缺陷分析结果的步骤包括:
    通过机器学习模型并基于所述待分析图像和所述缺陷的类型,分析所述缺陷对所述面板中电路造成的影响;
    根据所述缺陷对所述面板中电路造成的影响确定缺陷修复策略,根据所述缺陷修复策略生成所述面板对应的缺陷分析结果。
  10. 根据权利要求9所述的面板缺陷分析方法,所述通过机器学习模型并基于所述待分析图像和所述缺陷的类型,分析所述缺陷对所述面板中电路造成的影响的步骤包括:
    通过机器学习模型计算所述待分析图像中所述缺陷的位置,与所述电路区域中元器件位置之间的重叠区域;
    根据所述重叠区域和缺陷的类型分析所述缺陷对所述面板中电路造成的影响。
  11. 根据权利要求9所述的面板缺陷分析方法,所述根据所述缺陷对所述面板中电路造成的影响确定缺陷修复策略,根据所述缺陷修复策略生成所述面板对应的缺陷分析结果的步骤包括:
    根据所述缺陷对所述面板中电路造成的影响,获取所述电路中元器件的受损程度;
    根据所述受损程度确定缺陷修复策略,并根据所述缺陷修复策略生成所述面板对应的缺陷分析结果。
  12. 一种面板缺陷分析装置,包括:
    获取单元,用于获取待分析的面板对应的面板图像;
    检测单元,用于对所述面板图像中的缺陷进行检测,得到缺陷的位置和类型;
    分割单元,用于按照预设策略对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像;
    截取单元,用于根据所述缺陷的位置从所述电路分割图像中,截取所述缺陷所在的电路区域,得到待分析图像;
    分析单元,用于通过机器学习模型并基于所述待分析图像和所述缺陷的类型,分析所述缺陷对所述面板中电路造成的影响,得到缺陷分析结果。
  13. 根据权利要求12所述的面板缺陷分析装置,所述分割单元包括:
    获取子单元,用于获取包含目标电路区域的模板;
    匹配子单元,用于按照预设策略根据所述模板对所述面板图像进行模板匹配,得到匹配位置;
    分割子单元,用于根据所述匹配位置及所述目标电路区域对所述面板图像进行电路区域分割,得到包括多个电路区域的电路分割图像。
  14. 根据权利要求12或13所述的面板缺陷分析装置,所述分析单元包括:
    分析子单元,用于通过机器学习模型并基于所述待分析图像和所述缺陷的类型,分析所述缺陷对所述面板中电路造成的影响;
    确定子单元,用于根据所述缺陷对所述面板中电路造成的影响确定缺陷修复策略,根据所述缺陷修复策略生成所述面板对应的缺陷分析结果。
  15. 一种存储介质,存有处理器可执行指令,所述指令由一个或一个以上处理器执行时,实现如权利要求1-11中任一的面板缺陷分析方法。
  16. 一种网络设备,包括:
    一个或多个处理器;
    存储器,配置为存储一个或多个程序,当所述一个或多个程序被所述一个或多个处理器执行时,使得所述一个或多个处理器实现如权利要求1至11中任一项所述的面板缺陷分析方法。
PCT/CN2019/091087 2018-08-07 2019-06-13 一种面板缺陷分析方法、装置、存储介质及网络设备 WO2020029682A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810888604.2 2018-08-07
CN201810888604.2A CN109118482B (zh) 2018-08-07 2018-08-07 一种面板缺陷分析方法、装置及存储介质

Publications (1)

Publication Number Publication Date
WO2020029682A1 true WO2020029682A1 (zh) 2020-02-13

Family

ID=64852053

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/091087 WO2020029682A1 (zh) 2018-08-07 2019-06-13 一种面板缺陷分析方法、装置、存储介质及网络设备

Country Status (2)

Country Link
CN (1) CN109118482B (zh)
WO (1) WO2020029682A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023005100A1 (zh) * 2021-07-30 2023-02-02 安徽继远软件有限公司 基于边缘计算的输电线路缺陷识别方法及系统
US11797646B2 (en) 2020-11-30 2023-10-24 Wistron Corp Method, electronic device, and computer program product for standardizing image annotation

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109118482B (zh) * 2018-08-07 2019-12-31 腾讯科技(深圳)有限公司 一种面板缺陷分析方法、装置及存储介质
CN109919925A (zh) * 2019-03-04 2019-06-21 联觉(深圳)科技有限公司 印刷电路板智能检测方法、系统、电子装置及存储介质
TWI694250B (zh) * 2019-03-20 2020-05-21 英業達股份有限公司 表面缺陷偵測系統及其方法
CN110310260B (zh) * 2019-06-19 2021-10-15 北京百度网讯科技有限公司 基于机器学习模型的分料决策方法、设备和存储介质
US11030738B2 (en) 2019-07-05 2021-06-08 International Business Machines Corporation Image defect identification
CN110363756A (zh) * 2019-07-18 2019-10-22 佛山市高明金石建材有限公司 一种用于磨头的磨损检测系统及检测方法
TWI710762B (zh) * 2019-07-31 2020-11-21 由田新技股份有限公司 基於影像的分類系統
CN110599453A (zh) * 2019-08-08 2019-12-20 武汉精立电子技术有限公司 一种基于图像融合的面板缺陷检测方法、装置及设备终端
CN110390682B (zh) * 2019-09-19 2019-12-27 视睿(杭州)信息科技有限公司 一种模板自适应的图像分割方法、系统和可读存储介质
US11295439B2 (en) 2019-10-16 2022-04-05 International Business Machines Corporation Image recovery
CN111008961B (zh) * 2019-11-25 2021-10-19 深圳供电局有限公司 一种输电线路设备缺陷检测方法及其系统、设备、介质
CN111080612B (zh) * 2019-12-12 2021-01-01 哈尔滨市科佳通用机电股份有限公司 一种货车轴承破损检测方法
CN111160432A (zh) * 2019-12-19 2020-05-15 成都数之联科技有限公司 一种面板生产制造缺陷的自动分类方法及系统
CN110967851B (zh) * 2019-12-26 2022-06-21 成都数之联科技股份有限公司 一种液晶面板array图像的线路提取方法及系统
CN111179253B (zh) * 2019-12-30 2023-11-24 歌尔股份有限公司 一种产品缺陷检测方法、装置与系统
CN111145231A (zh) * 2019-12-30 2020-05-12 国家卫星海洋应用中心 遥感图像的波段偏移确定方法、装置和电子设备
CN111369517B (zh) * 2020-02-28 2023-08-01 创新奇智(合肥)科技有限公司 太阳能板自动质检方法、装置、电子设备及存储介质
CN111353983B (zh) * 2020-02-28 2023-05-23 腾讯科技(深圳)有限公司 缺陷检测识别方法、装置、计算机可读介质及电子设备
CN113468350A (zh) * 2020-03-31 2021-10-01 京东方科技集团股份有限公司 一种图像标注方法、装置及系统
CN111598879A (zh) * 2020-05-18 2020-08-28 湖南大学 一种结构疲劳累积损伤评估的方法、系统及设备
CN111784662A (zh) * 2020-06-29 2020-10-16 深圳至峰精密制造有限公司 工件识别方法、装置、计算机设备及存储介质
CN112465775B (zh) * 2020-11-26 2022-11-25 云谷(固安)科技有限公司 触控面板缺陷检测系统及触控面板缺陷检测方法
CN112329896B (zh) * 2021-01-05 2021-05-14 武汉精测电子集团股份有限公司 模型训练方法及装置
WO2022246643A1 (zh) * 2021-05-25 2022-12-01 京东方科技集团股份有限公司 图像获取方法及装置、存储介质
CN113298793B (zh) * 2021-06-03 2023-11-24 中国电子科技集团公司第十四研究所 一种基于多视角模板匹配的电路板表面缺陷检测的方法
CN113920117B (zh) * 2021-12-14 2022-02-22 成都数联云算科技有限公司 一种面板缺陷区域检测方法、装置、电子设备及存储介质
CN114049353B (zh) * 2022-01-11 2022-05-03 合肥金星智控科技股份有限公司 炉管温度监测方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1846170A (zh) * 2003-07-03 2006-10-11 恪纳腾技术公司 使用设计者意图数据检查晶片和掩模版的方法和系统
CN101536011A (zh) * 2005-01-21 2009-09-16 光子动力学公司 自动缺陷修复系统
WO2017009823A1 (en) * 2015-07-13 2017-01-19 Ecoppia Scientific Ltd. A solar row onsite automatic inspection system
CN106934803A (zh) * 2017-03-13 2017-07-07 珠海格力智能装备有限公司 电子器件表面缺陷的检测方法及装置
CN109118482A (zh) * 2018-08-07 2019-01-01 腾讯科技(深圳)有限公司 一种面板缺陷分析方法、装置及存储介质

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101688458B1 (ko) * 2016-04-27 2016-12-23 디아이티 주식회사 깊은 신경망 학습 방법을 이용한 제조품용 영상 검사 장치 및 이를 이용한 제조품용 영상 검사 방법
CN107886500A (zh) * 2017-10-13 2018-04-06 北京邮电大学 一种基于机器视觉和机器学习的产品生产监控方法及系统
CN107966447B (zh) * 2017-11-14 2019-12-17 浙江大学 一种基于卷积神经网络的工件表面缺陷检测方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1846170A (zh) * 2003-07-03 2006-10-11 恪纳腾技术公司 使用设计者意图数据检查晶片和掩模版的方法和系统
CN101536011A (zh) * 2005-01-21 2009-09-16 光子动力学公司 自动缺陷修复系统
WO2017009823A1 (en) * 2015-07-13 2017-01-19 Ecoppia Scientific Ltd. A solar row onsite automatic inspection system
CN106934803A (zh) * 2017-03-13 2017-07-07 珠海格力智能装备有限公司 电子器件表面缺陷的检测方法及装置
CN109118482A (zh) * 2018-08-07 2019-01-01 腾讯科技(深圳)有限公司 一种面板缺陷分析方法、装置及存储介质

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
HE, JUNJIE ET AL.7: "LCD Circuit defects detection based on faster R-CNN", TFT-LCD, 31 July 2018 (2018-07-31), pages 33 - 38 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11797646B2 (en) 2020-11-30 2023-10-24 Wistron Corp Method, electronic device, and computer program product for standardizing image annotation
WO2023005100A1 (zh) * 2021-07-30 2023-02-02 安徽继远软件有限公司 基于边缘计算的输电线路缺陷识别方法及系统

Also Published As

Publication number Publication date
CN109118482A (zh) 2019-01-01
CN109118482B (zh) 2019-12-31

Similar Documents

Publication Publication Date Title
WO2020029682A1 (zh) 一种面板缺陷分析方法、装置、存储介质及网络设备
EP3502966A1 (en) Data generation apparatus, data generation method, and data generation program
US11982628B2 (en) System and method for detecting defects on imaged items
Sun et al. Surface defects detection based on adaptive multiscale image collection and convolutional neural networks
CN110490842B (zh) 一种基于深度学习的带钢表面缺陷检测方法
US20190164270A1 (en) System and method for combined automatic and manual inspection
WO2020238256A1 (zh) 基于弱分割的损伤检测方法及装置
TW202013248A (zh) 車輛損壞識別方法及裝置
CN101726951A (zh) 缺陷修复装置和缺陷修复方法
WO2021120179A1 (zh) 产品制造消息处理方法、设备和计算机存储介质
CN110403232A (zh) 一种基于二级算法的烟支质量检测方法
WO2024002187A1 (zh) 缺陷检测方法、缺陷检测设备及存储介质
US20210216062A1 (en) System and Method for Intelligently Monitoring the Production Line
CN110020691A (zh) 基于卷积神经网络对抗式训练的液晶屏幕缺陷检测方法
TWI694250B (zh) 表面缺陷偵測系統及其方法
CN115661160A (zh) 一种面板缺陷检测方法及系统及装置及介质
CN115937101A (zh) 质量检测方法、装置、设备及存储介质
CN112485935A (zh) 液晶显示屏缺陷自动检测调整系统
Kunze et al. Efficient deployment of deep neural networks for quality inspection of solar cells using smart labeling
CN105973910A (zh) 基于结构纹理特征的灯管质量检测与瑕疵分类方法及系统
TWI755953B (zh) 自動檢測系統及其操作方法
US20240046617A1 (en) Machine Learning-Based Generation of Rule-Based Classification Recipes for Inspection System
CN114627114B (zh) 产品缺陷严重程度测量方法及系统及装置及介质
CN113344872A (zh) 基于机器视觉的段码液晶屏缺陷检测方法
TWI238949B (en) Examining and repairing system and method with a self-learning function

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19845977

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19845977

Country of ref document: EP

Kind code of ref document: A1