WO2020024339A1

WO2020024339A1 - Time sequence controller and time sequence detection method therefor, and liquid crystal display

Info

Publication number: WO2020024339A1
Application number: PCT/CN2018/101306
Authority: WO
Inventors: 肖光星
Original assignee: 深圳市华星光电技术有限公司
Priority date: 2018-08-01
Filing date: 2018-08-20
Publication date: 2020-02-06
Also published as: CN109036309A

Abstract

A time sequence controller and a time sequence detection method therefor, and a liquid crystal display. The time sequence detection method comprises the following steps: acquiring configuration parameters corresponding to a standard time sequence of a data enabling signal (S1); acquiring real-time parameters in the time sequence controller that correspond to an actual time sequence of the data enabling signal, and determining the real-time time sequence state of the data enabling signal according to the real-time parameters and the configuration parameters (S2); outputting a corresponding time sequence of the data enabling signal according to the real-time time sequence state of the data enabling signal (S3). Real-time parameters corresponding to a real-time time sequence of a data enabling signal are detected before outputting the data enabling signal to determine whether each parameter complies with the requirements of a standard time sequence; if not, a standard is re-generated and outputted; and if so, the real-time time sequence is directly outputted; as such, it may be guaranteed that an output time sequence of the data enabling signal is normal, thereby guaranteeing that the time sequence of a GOA circuit is normal.

Description

Timing controller, timing detection method, and liquid crystal display

Technical field

The invention belongs to the technical field of timing controllers, and in particular, relates to a timing controller, a timing detection method thereof, and a liquid crystal display.

Background technique

A liquid crystal display is a flat and ultra-thin display device. It consists of a certain number of color or black and white pixels and is placed in front of a light source or reflective surface. Liquid crystal displays have very low power consumption, and have the characteristics of high image quality, small size, and light weight. Therefore, they have become the mainstream of displays. At present, liquid crystal displays are mainly thin film transistor liquid crystal displays, and liquid crystal panels are the main components of liquid crystal displays. The liquid crystal panel generally includes a color filter substrate and a TFT array substrate disposed opposite to each other, and a liquid crystal layer flat between the two substrates. With the development of flat panel display technology, people's pursuit of narrow bezels of displays is getting higher and higher.

Among them, in order to realize a narrow bezel, an array substrate row driving (GOA) technology is often used in a liquid crystal display panel. The GOA technology integrates a gate row driving circuit on the array substrate in the array substrate manufacturing process, which can be omitted. The original gate drive IC on the array substrate achieves the purpose of reducing production costs and achieving a narrow frame.

In the existing GOA driving circuit, in a static environment or when the signal source is unstable, the GOA timing may be disordered, causing the GOA disorder in the panel, resulting in overcurrent protection of the level shift device and causing a black screen. Among them, the timing of the GOA driving circuit is generated by the timing controller, and the timing controller needs to generate the corresponding GOA timing according to the data enable signal (Data Enable). If the DE timing timing is disordered, it will eventually cause the GOA timing disorder. .

Summary of the invention

In order to solve the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a timing controller capable of outputting a correct timing of a data enable signal, a timing detection method thereof, and a liquid crystal display.

In order to achieve the above object, the present invention adopts the following technical solutions:

A timing detection method of a timing controller includes the following steps:

S1: Obtain a configuration parameter corresponding to the standard timing of the data enable signal;

S2: Acquire real-time parameters corresponding to the actual timing of the data enable signal in the timing controller, and judge the state of the real-time timing of the data enable signal according to the real-time parameters and the configuration parameters;

S3: According to the state of the real-time timing of the data enable signal, output the standard timing or real-time timing of the data enable signal.

Optionally, the configuration parameter includes a number of standard high levels corresponding to a standard timing of a data enable signal;

The step S2 specifically includes:

Detect if a frame of video is on;

If yes, calculate the number of real-time high levels corresponding to the real-time timing of the data enable signal;

Determine whether the number of real-time high levels is the same as the number of standard high levels;

If it is, the real-time timing of the data enable signal is normal; if not, the real-time timing of the data enable signal is abnormal.

Optionally, the configuration parameter includes a number of standard low levels corresponding to a standard timing of a data enable signal;

The step S2 specifically includes:

Detect if a frame of video is on;

If yes, the number of real-time low-levels corresponding to the real-time timing of the detection data enable signal;

Judging whether the number of real-time low levels is the same as the number of standard low levels;

Optionally, the configuration parameter includes a standard line blanking duration range value corresponding to a standard timing of the data enable signal;

The step S2 specifically includes:

Detect if a frame of video is on;

If yes, the real-time blanking duration corresponding to the real-time timing of the detection data enable signal;

Determining whether the real-time line blanking duration is within the range of the standard line blanking duration;

Optionally, the configuration parameter includes a standard field blanking duration range value corresponding to a standard timing of a data enable signal;

The step S2 specifically includes:

Detect if a frame of video is on;

If yes, the real-time field blanking duration corresponding to the real-time timing of the detection data enable signal;

Judging whether the real-time field blanking duration is within the range of the standard field blanking duration;

Optionally, step S3 specifically includes:

If the real-time timing of the data enable signal is abnormal, the standard timing of the data enable signal is regenerated and output;

If the real-time timing of the data enable signal is normal, the real-time timing of the data enable signal is directly output.

The invention also discloses a timing controller, including:

A configuration unit configured to obtain configuration parameters corresponding to a standard timing of a data enable signal;

A detecting unit, configured to obtain a real-time parameter corresponding to the actual timing of the data enable signal, and judge a state of the real-time timing of the data enable signal according to the real-time parameter and the configuration parameter;

The processing unit is configured to output a standard timing or a real-time timing of the data enable signal according to a state of the real-time timing of the data enable signal.

Optionally, the configuration parameters include a range value of the number of standard high levels corresponding to the standard timing of the data enable signal, a range value of the number of standard low levels, a range value of the standard line blanking duration, and a standard field cancellation. At least one of the hidden time range values; the real-time parameters include the number of real-time high levels, the number of real-time low levels, the real-time line blanking time, and the real-time field blanking time corresponding to the real-time timing of the data enable signal At least one of.

Optionally, the detection unit includes:

Video frame header detection module, used to detect whether a frame of video is turned on;

The detection module is configured to obtain a real-time parameter corresponding to the actual timing of the data enable signal after a frame of the video is turned on, and judge a state of the real-time timing of the data enable signal according to the real-time parameter and the configuration parameter.

The invention also discloses a liquid crystal display. The liquid crystal display stores a plurality of instructions, and the plurality of instructions are suitable for being loaded by a processor and executing the following steps:

Obtaining preset configuration parameters corresponding to the standard timing of the data enable signal;

Acquiring a real-time parameter corresponding to the actual timing of the data enable signal in the timing controller, and judging a state of the real-time timing of the data enable signal according to the real-time parameter and the configuration parameter;

According to the state of the real-time timing of the data enable signal, the corresponding timing of the data enable signal is output.

Beneficial effect: A timing controller, a timing detection method and a liquid crystal display disclosed by the present invention detect the real-time timing corresponding to the real-time parameters of the data enable signal before outputting the data enable signal, and determine whether each parameter meets the standard timing If the requirements are not met, the standard is re-generated and output. If the requirements are met, the real-time timing is directly output. This can ensure that the output timing of the data enable signal is normal and thus the GOA circuit timing is normal.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a flowchart of a timing detection method according to the first embodiment of the present invention;

2 is a timing diagram of a timing controller according to the first embodiment of the present invention;

3 is another timing diagram of the timing controller according to the first embodiment of the present invention;

4 is a schematic diagram of a timing controller according to a second embodiment of the present invention;

FIG. 5 is a schematic diagram of a detection unit according to a second embodiment of the present invention.

detailed description

In order to make the objectives, technical solutions, and advantages of the present invention clearer, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

Example one

FIG. 1 shows a flowchart of a timing detection method of a timing controller according to a first embodiment of the present invention. The timing detection method includes steps S1 to S3:

Step S1: Acquire a configuration parameter corresponding to the standard timing of the data enable signal.

Specifically, the standard timings of the data enable signals in the displays with different resolutions are different, and the configuration parameters corresponding to the standard timings are different. The configuration parameters include the number of standard high levels and the number of standard low levels corresponding to the standard timing. Number, standard line blanking time range value, and standard field blanking time range value.

Step S2: Acquire a real-time parameter corresponding to the actual timing of the data enable signal in the timing controller, and judge the state of the real-time timing of the data enable signal according to the real-time parameter and the configuration parameter.

The following describes this step in detail through a number of different embodiments.

Embodiment 1, the step S2 includes:

Step S201: Detect whether a frame of the video is turned on.

Specifically, as shown in FIG. 2 and FIG. 3, in the timing of the video signal, when the video signal is in a vertical blanking period (Vorizonal Blanking, VB for short), the data enable signal is at a low level, that is, DE_VB, when the video signal is in the vertical valid period, that is, VVD in the timing diagram, the DE signal includes a plurality of DE periodic signals, wherein each DE periodic signal includes a plurality of alternating high and low levels. When the low-level duration of the DE signal is detected to be greater than the total duration of the multiple DE periodic signals, a frame of the marker video begins. The multiple DE periodic signals mentioned in this embodiment need to be determined according to the specific parameters of the specific display panel. For example, for a 4K display with a resolution of 4800 * 3840, the low-level duration of the DE signal is greater than 4800 DE periodic signals. When the total duration of the video is determined, one frame of the video is turned on.

Step S202: if yes, calculate the number of real-time high levels corresponding to the real-time timing of the data enable signal.

When a frame of the video starts, the DE signal in the vertical valid period is detected. When the rising edge of the DE signal is detected, the real-time high level number of the DE signal is counted until the entire vertical valid period is detected.

Step S203: determine whether the number of real-time high levels is the same as the number of standard high levels;

Step S204: if yes, judge that the real-time timing of the data enable signal is normal; if not, judge that the real-time timing of the data enable signal is abnormal.

In the second embodiment, the step S2 includes:

Step S211: It is detected whether a frame of the video is turned on. This step S211 is the same as step S201, and details are not described herein.

Step S212: If yes, calculate the number of low-level real-time signals corresponding to the real-time timing of the data enable signal.

Specifically, when a frame of a video is started, a DE period signal in a vertical valid period is detected, and when a falling edge of the DE period signal is detected, a real-time low level number of the DE signal is counted until a complete vertical valid period is detected. .

Step S213: It is determined whether the number of real-time low levels is the same as the number of standard low levels.

Step S214: if yes, judge that the real-time timing of the data enable signal is normal; if not, judge that the real-time timing of the data enable signal is abnormal.

Embodiment 3, the step S2 includes:

Step S221: It is detected whether a frame of the video is turned on. This step S221 is the same as step S201, and details are not described herein.

Step S222: The real-time line blanking duration corresponding to the real-time timing of the data enable signal is detected.

Step S223: determine whether the real-time line blanking duration is within the range of the standard line blanking duration;

Step S224: if yes, judge that the real-time timing of the data enable signal is normal; if not, judge that the real-time timing of the data enable signal is abnormal.

Embodiment 4: The step S2 includes:

Step S231: It is detected whether a frame of the video is turned on. This step S231 is the same as step S201, and details are not described herein.

Step S232: If yes, the real-time field blanking duration corresponding to the real-time timing of the detection data enable signal.

Step S233: Determine whether the real-time field blanking duration is within the range of the standard field blanking duration.

Step S234: if yes, judge that the real-time timing of the data enable signal is normal; if not, judge that the real-time timing of the data enable signal is abnormal.

In the above, by detecting the real-time parameters corresponding to the real-time timing of the data enable signal, for example, the number of real-time high levels, the number of real-time low levels, the real-time blanking time and the real-time field effect duration, it is determined whether each parameter meets the standard As long as one of the parameters does not meet the requirements of the timing, it indicates that the current timing is abnormal and corresponding processing needs to be taken.

Step S3: output the corresponding timing of the data enable signal according to the state of the real-time timing of the data enable signal.

According to the detection situation of step S2, there are two possibilities for the state of the real-time sequence. If the real-time timing is normal, it can be directly output. Correspondingly, the timing controller generates a timing signal required by the GOA circuit according to the real-time timing.

If the real-time timing is abnormal, use the standard timing generation module to generate the standard timing of the data enable signal, and replace the standard timing with the real-time timing. Accordingly, the timing controller generates the timing required by the GOA circuit according to the standard timing. The standard timing generation module generates a corresponding standard timing according to the specifications of the display. For example, for a 4K display, the standard timing generation module generates a standard timing corresponding to a 4K display.

The timing detection method disclosed in the first embodiment of the present invention detects the real-time timing corresponding to the real-time parameters of the data enable signal before outputting the data enable signal, and determines whether each parameter meets the requirements of the standard timing. Generate standards and output, if they meet, directly output the real-time timing, this can ensure that the output timing of the data enable signal is normal, and thus the GOA circuit timing is normal.

Example two

As shown in FIG. 4, the timing controller according to the second embodiment of the present invention includes a configuration unit 10, a detection unit 20, and a processing unit 30. The configuration unit 10 is configured to obtain a data enable signal from an external microcontroller. Configuration parameters corresponding to standard timing; the detection unit 20 is configured to obtain real-time parameters corresponding to the real-time timing of the data enable signal, and judge the status of the real-time timing of the data enable signal according to the real-time parameters and configuration parameters; the processing unit 30 is configured to The state of the real-time timing of the data enable signal, and the corresponding timing of the output data enable signal.

Further, as shown in FIG. 5, the detection unit 20 includes a video frame header detection module 21 and a detection module 22. Video frame header detection module 21 is used to detect whether a frame of video is turned on; detection module 22 is used to obtain real-time parameters corresponding to the actual timing of the data enable signal after a frame of video is turned on, and according to the real-time parameters and configuration parameters Determine the status of the real-time timing of the data enable signal.

The configuration parameters include a range value of the number of standard high levels corresponding to the standard timing of the data enable signal, a range value of the number of standard low levels, a range value of the standard line blanking period, and a range value of the standard field blanking period. At least one of the real-time parameters includes at least one of the number of real-time high levels, the number of real-time low levels, the real-time blanking duration, and the real-time field blanking duration corresponding to the real-time timing of the data enable signal. The method for obtaining the foregoing parameters has been described in the first embodiment, and details are not described herein again.

Example three

A plurality of instructions are stored in the liquid crystal display according to the third embodiment of the present invention, and the plurality of instructions are suitable for being loaded by the processor and executing the following steps:

The specific embodiments of the present invention have been described in detail above. Although some embodiments have been shown and described, those skilled in the art should understand that without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents In the case of these embodiments, modifications and improvements can be made to these embodiments, and these modifications and improvements should also fall within the protection scope of the present invention.

Claims

A timing detection method of a timing controller includes the following steps:

S1: Obtain a configuration parameter corresponding to the standard timing of the data enable signal;

S2: Acquire a real-time parameter corresponding to the actual timing of the data enable signal in the timing controller, and judge the state of the real-time timing of the data enable signal according to the real-time parameter and the configuration parameter;

S3: According to the state of the real-time timing of the data enable signal, output the standard timing or real-time timing of the data enable signal.
The timing detection method of the timing controller according to claim 1, wherein the configuration parameter comprises a number of standard high levels corresponding to a standard timing of a data enable signal;

The step S2 specifically includes:

Detect if a frame of video is on;

If yes, calculate the number of real-time high levels corresponding to the real-time timing of the data enable signal;

Determine whether the number of real-time high levels is the same as the number of standard high levels;

If it is, the real-time timing of the data enable signal is normal; if not, the real-time timing of the data enable signal is abnormal.
The timing detection method of a timing controller according to claim 2, wherein step S3 specifically comprises:

If the real-time timing of the data enable signal is abnormal, the standard timing of the data enable signal is regenerated and output;

If the real-time timing of the data enable signal is normal, the real-time timing of the data enable signal is directly output.
The timing detection method of the timing controller according to claim 1, wherein the configuration parameter comprises a standard low-level number corresponding to a standard timing of a data enable signal;

The step S2 specifically includes:

Detect if a frame of video is on;

If yes, the number of real-time low-levels corresponding to the real-time timing of the detection data enable signal;

Judging whether the number of real-time low levels is the same as the number of standard low levels;

If it is, the real-time timing of the data enable signal is normal; if not, the real-time timing of the data enable signal is abnormal.
The timing detection method of the timing controller according to claim 4, wherein step S3 specifically comprises:

If the real-time timing of the data enable signal is abnormal, the standard timing of the data enable signal is regenerated and output;

If the real-time timing of the data enable signal is normal, the real-time timing of the data enable signal is directly output.
The timing detection method of a timing controller according to claim 1, wherein the configuration parameter comprises a standard line blanking duration range value corresponding to a standard timing of a data enable signal;

The step S2 specifically includes:

Detect if a frame of video is on;

If yes, the real-time blanking duration corresponding to the real-time timing of the detection data enable signal;

Determining whether the real-time line blanking duration is within the range of the standard line blanking duration;

If it is, the real-time timing of the data enable signal is normal; if not, the real-time timing of the data enable signal is abnormal.
The timing detection method of the timing controller according to claim 6, wherein step S3 specifically comprises:

If the real-time timing of the data enable signal is abnormal, the standard timing of the data enable signal is regenerated and output;

If the real-time timing of the data enable signal is normal, the real-time timing of the data enable signal is directly output.
The timing detection method of a timing controller according to claim 1, wherein the configuration parameter comprises a standard field blanking duration range value corresponding to a standard timing of a data enable signal;

The step S2 specifically includes:

Detect if a frame of video is on;

If yes, the real-time field blanking duration corresponding to the real-time timing of the detection data enable signal;

Judging whether the real-time field blanking duration is within the range of the standard field blanking duration;

If it is, the real-time timing of the data enable signal is normal; if not, the real-time timing of the data enable signal is abnormal.
The timing detection method of the timing controller according to claim 8, wherein step S3 specifically comprises:

If the real-time timing of the data enable signal is abnormal, the standard timing of the data enable signal is regenerated and output;

If the real-time timing of the data enable signal is normal, the real-time timing of the data enable signal is directly output.
The timing detection method of the timing controller according to claim 1, wherein step S3 specifically comprises:

If the real-time timing of the data enable signal is abnormal, the standard timing of the data enable signal is regenerated and output;

If the real-time timing of the data enable signal is normal, the real-time timing of the data enable signal is directly output.
A timing controller, including:

A configuration unit configured to obtain configuration parameters corresponding to a standard timing of a data enable signal;

A detecting unit, configured to obtain a real-time parameter corresponding to the actual timing of the data enable signal, and judge a state of the real-time timing of the data enable signal according to the real-time parameter and the configuration parameter;

The processing unit is configured to output a standard timing or a real-time timing of the data enable signal according to a state of the real-time timing of the data enable signal.
The timing controller according to claim 11, wherein the configuration parameters include a range value of the number of standard high levels, a range value of the number of standard low levels, and a standard line corresponding to the standard timing of the data enable signal. At least one of a blanking duration range value and a standard field blanking duration range value; the real-time parameters include the number of real-time high-levels, the number of real-time low-levels, and the real-time line corresponding to the real-time timing of the data enable signal At least one of a blanking duration and a real-time field blanking duration.
The timing controller according to claim 11, wherein the detection unit comprises:

Video frame header detection module, used to detect whether a frame of video is turned on;

The detection module is configured to obtain a real-time parameter corresponding to the actual timing of the data enable signal after a frame of the video is turned on, and judge a state of the real-time timing of the data enable signal according to the real-time parameter and the configuration parameter.
A liquid crystal display, wherein the liquid crystal display stores a plurality of instructions, and the plurality of instructions are suitable for being loaded by a processor and executing the following steps:

Obtaining preset configuration parameters corresponding to the standard timing of the data enable signal;

Acquiring a real-time parameter corresponding to the actual timing of the data enable signal in the timing controller, and judging a state of the real-time timing of the data enable signal according to the real-time parameter and the configuration parameter;

According to the state of the real-time timing of the data enable signal, the standard timing or real-time timing of the data enable signal is output.