WO2020015515A1 - 显示装置耳机控制电路及显示装置 - Google Patents

显示装置耳机控制电路及显示装置 Download PDF

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Publication number
WO2020015515A1
WO2020015515A1 PCT/CN2019/093708 CN2019093708W WO2020015515A1 WO 2020015515 A1 WO2020015515 A1 WO 2020015515A1 CN 2019093708 W CN2019093708 W CN 2019093708W WO 2020015515 A1 WO2020015515 A1 WO 2020015515A1
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Prior art keywords
switch
signal
main chip
display device
output
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PCT/CN2019/093708
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English (en)
French (fr)
Inventor
王林
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青岛海信电器股份有限公司
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Priority to US16/540,346 priority Critical patent/US10845626B2/en
Publication of WO2020015515A1 publication Critical patent/WO2020015515A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R1/00—Details of transducers, loudspeakers or microphones
    • H04R1/10—Earpieces; Attachments therefor ; Earphones; Monophonic headphones
    • H04R1/1041—Mechanical or electronic switches, or control elements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R1/00—Details of transducers, loudspeakers or microphones
    • H04R1/10—Earpieces; Attachments therefor ; Earphones; Monophonic headphones
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R29/00—Monitoring arrangements; Testing arrangements

Definitions

  • the present disclosure relates to the technical field of display devices, and in particular, to a headset control circuit for a display device and a display device.
  • the speaker of the display device can be muted by inserting headphones into the earphone socket on the display device.
  • an embodiment of the present disclosure provides a display device earphone control circuit, including:
  • a switching circuit including a control circuit, a left channel switch, and a right channel switch; wherein the control circuit, the left channel switch, and the right channel switch are connected to the main chip, and The control circuit is connected to the left channel switch and the right channel switch, and the left channel switch and the right channel switch are connected to the headphone port;
  • the control circuit is configured to receive a control signal output by the main chip, and output a first signal to the left channel switch and a second signal to the right channel switch respectively according to the control signal;
  • the first signal is used to control the opening or closing of the left channel switch, and the second signal is used to control the opening or closing of the right channel switch.
  • Some embodiments of the present disclosure provide a display device including a headphone control circuit.
  • the headphone control circuit includes:
  • a switching circuit including a control circuit, a left channel switch, and a right channel switch; wherein the control circuit, the left channel switch, and the right channel switch are connected to the main chip, and The control circuit is connected to the left channel switch and the right channel switch, and the left channel switch and the right channel switch are connected to the headphone port;
  • the control circuit is configured to receive a control signal output by the main chip, and output a first signal to the left channel switch and a second signal to the right channel switch respectively according to the control signal;
  • the first signal is used to control the opening or closing of the left channel switch, and the second signal is used to control the opening or closing of the right channel switch.
  • FIG. 1A is a schematic structural diagram of a control circuit for a headset of a display device in the related art
  • FIG. 1B is a schematic structural diagram of a headset control circuit of a display device in the related art
  • FIG. 2 is a schematic structural diagram of an embodiment of a headphone control circuit of a display device of the present disclosure
  • FIG. 3 is a schematic structural diagram of an embodiment of a headset control circuit of a display device of the present disclosure
  • FIG. 4 is a schematic structural diagram of an embodiment of a headset control circuit of a display device of the present disclosure
  • FIG. 5 is a schematic structural diagram of an embodiment of a headset control circuit of a display device of the present disclosure
  • FIG. 6 is a schematic structural diagram of an embodiment of a headset control circuit of a display device of the present disclosure
  • FIG. 7 is a schematic structural diagram of an embodiment of a headset control circuit of a display device of the present disclosure.
  • FIG. 8 is a schematic structural diagram of an embodiment of a control circuit for a headset of a display device according to the present disclosure
  • FIG. 9 is a schematic structural diagram of an embodiment of a display device of the present disclosure.
  • FIG. 1A and 1B are schematic structural diagrams of a control circuit for a headset of a display device in the related art.
  • the earphone control circuit of the related display device shown in FIG. 1A because the power of the sound signal output by the main chip is low, it usually cannot meet the minimum output power required by the earphone in the earphone port for playback, so the sound signal output by the main chip Will pass a power amplifier chip and then output to the headphone port to output a sound signal that meets the minimum output power of the headphone.
  • the headset of the display device when the display device uses a headset to make sound, if the user needs to mute the headset output, there are two ways to mute the headset of the display device: one is to control the capacitance in the circuit when the display device is turned off. Discharge. The change in the high and low levels of the control circuit caused by the capacitor discharge generates a control signal output to the power amplifier chip. The control signal is used to make the power amplifier chip disconnect the sound signal output from the main chip to the headphone port to mute the headphone.
  • One is, for example, by operating the remote control, when the control circuit receives the mute control signal from the remote control of the display device, the control circuit outputs the control signal to the power amplifier chip to control the power amplifier chip to mute the headset.
  • the headphone control circuit of the display device shown in FIG. 1B is a possible specific implementation of the headphone control circuit in FIG. 1A.
  • the power amplifier chip is the chip indicated by N119 in the figure, and the headphone port is XS9. Shown port.
  • the interface of the main chip labeled HP_Audio-L is connected to the pin 13 of the headphone amplifier chip N119, which is used by the main chip to output the left channel sound signal to the amplifier chip; the left channel sound signal is amplified by the headphone amplifier chip N119 and passed
  • the pin number 12 outputs the sound signal HP_LOUT to the interface L in the headphone port XS9 with the number 1 to provide an amplified left channel sound signal for the headphones.
  • the interface labeled HP_Audio-R is connected to the headphone amplifier chip N119.
  • the pin labeled 2 is used by the main chip to output the right channel sound signal to the headphone amplifier chip.
  • the right channel sound signal is amplified by the headphone amplifier chip N119.
  • the sound signal HP_ROUT is output to the headphone port XS9 by a pin number 3 to a port number 2 in the headphone port XS9 to provide an amplified right channel sound signal for the headphone.
  • the headphone amplifier chip N119 also provides a pin labeled 5 for implementing the mute control function of the headphone.
  • the headphone amplifier chip N119 receives the mute control signal MUTE_HP through the pin number 5, it stops outputting the right channel sound signal through the pin number 3 and stops outputting the left channel sound signal through the pin number 12. Thereby, the output sound of the earphone of the display device is turned off.
  • the first is that when the display device is turned off, the input voltage labeled + 5V_Normal in the figure drops to 0V, and the negative electrode of the capacitor labeled C933 is grounded. At this time, the capacitor C933 needs to be discharged through the resistor labeled R1000.
  • the base of the transistor V81 is extremely high, and the transistor V81 is turned on, and its collector is pulled down. That is to say, the high level output of the collector of the transistor V82 is low after the inversion of the transistor V81.
  • the level signal is the mute control signal MUTE_HP.
  • the mute control signal MUTE_HP is input to the headphone amplifier chip N119 through the pin number 5 in the chip N119. When the pin 5 of the headphone amplifier chip N119 receives the low-level mute control signal, it stops outputting sound to the headphone port XS9. Signal to mute the headset.
  • the capacitors C933 and C934 can use capacitor discharge to maintain the low voltage of the pin 5 of the headphone amplifier chip when the display device is turned off, so that the pins 3 and 12 of the headphone amplifier chip have no sound signal. Output, thereby preventing the main chip from outputting some uncontrolled sound signals after the display device is turned off, thereby affecting the user experience.
  • the second is to receive the software mute instruction signal AMP_MUTE through the interface labeled diode VD50 with the number 1.
  • the remote control of the display device sends a software mute instruction signal; the mute instruction signal AMP_MUTE is a high-level signal, and the diode VD50 is turned on;
  • the branches where capacitors C933 and C934 are located are disconnected, and diode VD54 and diode BAT54C are turned off.
  • the base of transistor V81 is extremely high and the transistor V81 is turned on, that is, the software mute indication signal AMP_MUTE also receives the mute control signal MUTE_HP after the inversion of the triode V81, and inputs it into the pin 5 of the headphone amplifier chip N119 to make the headphone amplifier N119 mute the headphones.
  • the structure of the earphone control circuit in the related art mentioned above because the capacitor is introduced to ensure the quietness of the display device shutdown, but the capacitor is an analog component. As the device ages and is damaged, the display device will output after the shutdown. Uncontrolled noise and popping affect user experience.
  • control signal sent by the control circuit to the power amplifier chip needs to undergo an inverting operation, and the power amplifier chip also needs to perform an operation of stopping the output of a sound signal to the headphone port according to the control signal.
  • the present disclosure provides a display device earphone control circuit.
  • the display device earphone can prevent the display device from outputting uncontrolled noise during the mute operation when the display device is turned off, thereby improving the experience of the display device user.
  • FIG. 2 is a schematic structural diagram of an embodiment of a headphone control circuit of a display device of the present disclosure.
  • the display device earphone control circuit provided in this embodiment includes a main chip 1, a switch circuit 2, and an earphone port 3.
  • the main chip 1 is connected to the earphone port 3 through the switch circuit 2.
  • the sound signal output by the main chip 1 can be output to the headphone port 3 through the switch circuit 2.
  • the power of the sound signal output by the main chip 1 is greater than or equal to the preset power of the earphones in the headphone port 3.
  • the main chip 1 is used to provide the switch circuit 2 outputs a control signal.
  • the control signal is used to switch the switching circuit 2 to an open state or a closed state.
  • the sound signal output by the main chip 1 has been amplified to a first power, where the first power is greater than or equal to a preset power of the headset, and the preset power may be the lowest of the headset.
  • Output power The minimum output power of the earphone is the power of the sound signal that the earphone can normally output when the sound is turned to the minimum. For example, if the lowest output power of a certain earphone is 5 milliwatts (milliwatt, mw), the first power of the sound signal that the main chip 1 can output at this time needs to be greater than or equal to 5mw.
  • the main chip 1 may also determine the minimum output power of the earphone by detecting the earphone or reporting the model of the earphone, which is not specifically limited in this embodiment.
  • the sound signal output from the main chip may further pass through a resistance-capacitance (RC) filter, also known as a phase shift filter, which is input after filtering to eliminate interference Headphone port.
  • RC resistance-capacitance
  • the preset power may also be greater than the minimum output power, and the implementation manner is similar, which will not be described again.
  • the switch circuit 2 when the switch circuit 2 is in a closed state, the path from the main chip 1 to the earphone port 3 is conducted, and the sound signal output by the main chip 1 can be Output to headphone port 3 through switch circuit 2 to provide sound signals for earphones in headphone port 3.
  • switch circuit 2 When switch circuit 2 is in the off state, the path from main chip 1 to headphone port 3 is disconnected and output from main chip 1 The sound signal cannot be output to the earphone port 3 through the switch circuit 2, thereby realizing the mute of the earphone.
  • the open state and the closed state of the switch circuit 2 can be switched by a control signal sent by the main chip 1.
  • the switch circuit 2 is switched to the closed state; when the main chip 1 sends a low-level control signal to the switch circuit 2, the switch circuit 2 is switched to the open state .
  • the form in which the control signal is high or low is merely an example, and the specific form of the control signal is not limited in this embodiment.
  • the control signal for switching the state of the switch circuit 2 in this embodiment may also be generated by shutting down and receiving a mute indication.
  • the high and low levels in the above example are used as an example for description.
  • the default output control signal for the output pin of the main chip 1 to the switch circuit 2 is a low level control signal, that is, the main chip 1 is at the headphone port 3
  • the control signal output to the switch circuit 2 when no earphones are plugged in or is not powered is a low-level control signal, so that the default state of the switch circuit 2 is an off state.
  • the detection method can refer to the embodiment of FIG. 7 or FIG.
  • the main chip 1 will output a high-level control signal to the switch circuit 2 to switch the switch circuit 2 to the closed state. , So that the sound signal output by the main chip 1 can be output to the headphone port 3 through the switch circuit 2. Therefore, when the display device is turned off, the main chip is powered off, and the pins of the main chip outputting control signals to the switch circuit 2 return to the default low-level control signals, so that the state of the switch circuit 2 is switched to or continues to be in an off state. Thereby, the mute of the earphone of the display device is realized.
  • a mute instruction from a remote control of the display device can be received, and the mute instruction can be directly output to the switch circuit 2 through a control signal, so that the switch circuit 2 switches.
  • the headset of the display device is muted.
  • the main chip may send a control signal to the switch circuit 2 so that the switch circuit 2 is switched to the off state, thereby realizing the mute of the headset of the display device.
  • the main chip since the main chip directly outputs a sound signal that satisfies the minimum output power of the earphone, a power amplifier chip may not be provided in the display device earphone control circuit.
  • the sound signal can be directly input into the headphone port through the switch circuit. Therefore, when the headset control circuit of the display device is used to control the mute of the headset of the display device, the mute of the headset is not required to be controlled by the main chip indirectly controlling the headphone amplifier chip as in the related art.
  • the earphone can be mute, thereby reducing the circuit complexity of the earphone control circuit of the display device.
  • a capacitor for controlling the mute of the power amplifier chip when the display device is turned on and off will not be set in the display device headphone control circuit, and no cause will appear.
  • the capacitor is aging and damaged and cannot control the mute of the power amplifier chip, which leads to the phenomenon that the display device outputs uncontrolled noise and pop noise after the power is turned off, thereby improving the sound quality of the display device earphones during mute and improving the user experience of the display device.
  • the main chip can mute the earphones directly by opening and closing the switch circuit, so whether the earphones are muted when the display device is turned off, or the earphones are controlled by the user ’s remote control.
  • the main chip indirectly controls the power amplifier chip to mute the headset, which reduces the complexity and time complexity of the display device headset control circuit, reduces the response time of the display device headset mute, and further improves The user experience of the display device.
  • FIG. 3 is a schematic structural diagram of an embodiment of a headphone control circuit of a display device of the present disclosure.
  • the earphone control circuit shown in FIG. 3 is based on the embodiment shown in FIG. 2.
  • the switch circuit 2 includes a control circuit 21, a left channel switch 22 and a right channel switch 23.
  • the left channel sound signal output from the main chip 1 can be output to the headphone port 3 through the left channel switch 22, and the right channel sound signal output from the main chip 1 can be output to the headphone port 3 through the right channel switch 23.
  • the control circuit 21 is configured to receive a control signal output from the main chip 1, and output a first signal to the left channel switch 22 and a second signal to the right channel switch 23 according to the control signal.
  • the first signal is used to control the left channel switch. 22 is opened and closed, and the second signal is used to control the opening and closing of the right channel switch 23.
  • the sound signal output from the main chip 1 is divided into a left channel sound signal and a right channel in a more detailed manner based on the embodiment shown in FIG. 2.
  • Sound signals, and the two signals are transmitted to the headphone port 3 through different switches in the switch circuit 2.
  • the headphone in the headphone port 3 can finally output two sound signals according to the received left channel sound signal and right channel sound signal .
  • the control circuit 21 can control the opening and closing of the left channel switch 22 and the right channel switch 23.
  • the control circuit 21 needs to control the left channel switch 22 and the right channel switch 23 according to the received control signal, and open or close at the same time.
  • the control circuit 21 can also separately control the left channel switch 22 and the right channel switch 23 to be in different open or closed states, which is not limited in this embodiment.
  • the left channel sound signal output by the main chip 1 can be transmitted to the headphone port 3 through the closed left channel switch 22; when the control circuit 21 controls the left channel switch 22 to be opened At this time, the left channel sound signal output from the main chip 1 cannot be transmitted to the earphone port 3 through the left channel switch 22 that is turned off, so as to mute the left channel of the earphone.
  • the control circuit 21 controls the right channel switch 23 to be closed, the right channel sound signal output by the main chip 1 can be transmitted to the headphone port 3 through the closed right channel switch 23; when the control circuit 21 controls the right channel switch When 23 is disconnected, the right channel sound signal output by the main chip 1 cannot be transmitted to the earphone port 3 through the disconnected right channel switch 23, so as to mute the right channel of the earphone.
  • FIG. 4 is a schematic structural diagram of an embodiment of a headphone control circuit of a display device of the present disclosure.
  • the earphone control circuit shown in FIG. 4 provides a more specific implementation based on the embodiment shown in FIG. 3, where the control circuit 21 is a first switch and the left channel switch 22 is a second switch.
  • the right channel switch 23 is a third switch.
  • the first end of the first switch is connected to the main chip for receiving a control signal output by the main chip; the second end of the first switch is connected to the left channel switch for outputting the first to the left channel switch. Signal; the second end of the first switch is also connected to the right channel switch for outputting the second signal to the right channel switch; the third end of the first switch is grounded.
  • the first end of the second switch is connected to the main chip for receiving the left channel sound signal output from the main chip; the second end of the second switch is connected to the headphone port for outputting the left channel sound signal to the headphone port; the second switch
  • the third terminal is connected to the second terminal of the first switch for receiving a first signal.
  • the first end of the third switch is connected to the main chip for receiving the right channel sound signal output from the main chip; the second end of the third switch is connected to the headphone port for outputting the right channel sound signal to the headphone port; the third switch The third terminal is connected to the second terminal of the first switch for receiving a second signal.
  • the first switch when the first switch receives the control signal sent by the main chip, it can control the opening and closing of the second switch and the opening and closing of the third switch according to the control signal.
  • the first switch controls the second switch to be closed by the first signal
  • the left channel sound signal output by the main chip can be transmitted to the headphone port through the closed second switch;
  • the first switch controls the second switch to open by the first signal
  • the left channel sound signal output by the main chip cannot be transmitted to the earphone port through the disconnected second switch, so as to mute the left channel of the earphone.
  • the right channel sound signal output by the main chip can be transmitted to the headphone port through the closed third switch; when the first switch controls the third switch by the second signal When the switch is turned off, the right channel sound signal output by the main chip cannot be transmitted to the headphone port through the third switch that is turned off, so as to mute the right channel of the headphone.
  • the first signal output by the first switch to the second switch and the second signal output by the third switch are the same signal output by the first switch to implement the second switch and the third switch.
  • the switches are opened or closed simultaneously. That is, in order to control the states of the second switch and the third switch at the same time, only two different signals are output to the second switch and the third switch due to the way of circuit connection.
  • one output terminal of the first switch can be connected to the second switch, the other output terminal is connected to the third switch, and the first switch is output to the second switch.
  • Signal, and output a second signal opposite to the first signal to the third switch so as to achieve independent control of the second switch and the third switch, and the specific implementation manner is not described again.
  • FIG. 5 is a schematic structural diagram of an embodiment of a headphone control circuit of a display device of the present disclosure.
  • the earphone control circuit shown in FIG. 5 is based on the embodiment shown in FIG. 4.
  • the above switch is implemented by a three-stage tube and a metal oxide semiconductor (MOS) tube.
  • the first switch, the second switch, and Each of the third switches can be a triode or a MOS tube, and the three switches can be arbitrarily combined.
  • the first switch that receives the control signal may be a triode. Since the MOS transistor has a stronger driving capability than the triode, the second switch and the third switch for transmitting sound signals
  • the switch can be a MOS tube.
  • FIG. 6 is a schematic structural diagram of an embodiment of a headphone control circuit of a display device of the present disclosure.
  • FIG. 6 is a circuit connection implementation manner of the control circuit 2 in the embodiment shown in FIG. 5.
  • the transistor labeled V31 may be the first switch described in the above embodiment
  • the MOS tube labeled V84 may be the second switch described in the above embodiment
  • the MOS tube labeled V85 may be the above embodiment.
  • the port labeled XS9 may be the headphone port described in the above embodiment.
  • the pin labeled HP_Audio-L of the main chip is connected to the second switch V84 in the control circuit, and is used by the main chip to output the left channel sound to the pin labeled L of the headphone port XS9 through the second switch V84.
  • Signal HP_LOUT; the pin of the main chip labeled HP_Audio-R is connected to the third switch V85 in the control circuit, and is used by the main chip to output the right channel sound signal HP_ROUT to the pin of the headphone port XS9 labeled R through the third switch V85.
  • the pin of the main chip labeled HP_SWITCH is used to connect the first switch V31.
  • the main chip outputs a control signal to the first switch V31 through this pin, so that the first switch V31 controls the second switch V84 and the third switch V85 according to the control signal. status.
  • the HP_SWITCH pin of the main chip is a general-purpose input / output GPIO port of the main chip, that is, the main chip outputs a control signal to the control circuit through its GPIO port.
  • the purpose of setting the first switch V31 in the circuit shown in FIG. 6 is to increase the driving capability of the control signal and maintain the high-impedance state of the GPIO port of the main chip.
  • control signal may be a high-level signal output by the master chip through the HP_SWITCH pin.
  • the base of the first switch V31 is at a high level, the first switch V31 is turned on, and the collector and the emitter of the first switch V31 are turned on.
  • the collector of the first switch V31 When the emitter of the first switch V31 is grounded, the collector is at a low level, and the collector of the first switch V31 outputs a low level to the gate of the second switch V84 and the gate of the third switch V85, so that the second switch V84 and The third switch V85 is turned off, the drain and source of the second switch V84 are turned off, and the drain and source of the third switch V85 are turned off, thereby making the left sound in the interface HP_Audio-L connected to the drain of the second switch V84.
  • the sound signal HP_LOUT cannot be output to the pin labeled L in the headphone port through the second switch V84 to mute the left channel of the headphones and make the right sound signal in the interface HP_Audio-R connected to the drain of the third switch HP_ROUT cannot be output to the pin labeled R in the headphone port through the third switch V85, so as to mute the right channel of the headphone.
  • control signal is a high-level signal for example only.
  • the control signal may also be a low-level signal, and only the connection relationship of the circuit shown in FIG. 6 needs to be adjusted. For example, adding a triode to invert the control signal again, the same control mode as in FIG. 6 can also be implemented.
  • the specific implementation of the signal is not limited.
  • the display device earphone control circuit provided in this embodiment sends a control signal to the control circuit through the GPIO port of the main chip, and the control circuit can directly control the open or closed state of the left channel switch and the right channel switch according to the control signal.
  • the headset of the display device can be mute. Therefore, the function of mute control of the headset of the display device is realized by a relatively simple circuit connection, the headphone amplifier circuit is simplified, and the cost of the motherboard of the display device is reduced.
  • the circuit can directly control the control circuit through the main chip to mute the headset.
  • the control circuit is provided with a capacitor for controlling the mute of the power amplifier chip when the display device is turned on and off, so that the mute of the power amplifier chip cannot be controlled due to aging and damage of the capacitor, which does not cause the display device to output unaffected after the power is turned off.
  • the phenomenon of controlled noise and pop noise improves the sound quality of the display device when the headset is muted, and improves the user experience of the display device.
  • FIG. 7 is a schematic structural diagram of an embodiment of a headphone control circuit of a display device of the present disclosure.
  • the earphone control circuit shown in FIG. 7 further includes: a detection circuit 4, a first end of the detection circuit 4 is connected to the main chip 1, and a second end of the detection circuit 4 is connected to the earphone port 3;
  • the main chip 1 detects whether a headphone is inserted into the headphone port 3 through the detection circuit 4. If yes, the main chip 1 controls the speaker of the display device to be mute.
  • FIG. 8 is a schematic structural diagram of an embodiment of a headphone control circuit of a display device of the present disclosure.
  • the first end of the detection circuit is connected to the HPDET pin of the main chip
  • the second end is connected to the SW pin of the headphone port XS9
  • the third end is connected to the GND pin of the headphone port XS9.
  • the HPDET pin of the main chip is used to detect whether a headset is inserted in the headset port through a detection circuit. Wherein, when headphones are inserted into the earphone port XS9, the pins labeled SW and GND in the earphone port XS9 are turned on.
  • the GND pin is a ground pin
  • the SW pin is used to connect the HPDET pin of the main chip through a detection circuit.
  • a path of the SW pin-earphone-GND pin is formed. Because the GND interface is grounded in this path, the level of the HPDET pin of the main chip will change.
  • the main chip determines that a headphone is inserted in the earphone port XS9 through the level change of the HPDET pin, the main chip outputs a control signal to the first switch V31 through the HP_SWITCH pin, so as to finally control the mute of the display device earphone.
  • FIG. 9 is a schematic structural diagram of an embodiment of a display device of the present disclosure.
  • the display device 9 provided in this embodiment includes a headphone control circuit 91 of the display device in any of the embodiments shown in FIG. 1-8.
  • the display device 9 may be a device for displaying, such as a television, a computer monitor, or a video player.

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Abstract

本公开提供一种显示装置耳机控制电路及显示装置，包括：主芯片、和耳机端口和开关电路，其中所述开关电路包括：控制电路、左声道开关和右声道开关；其中，所述控制电路、所述左声道开关和所述右声道开关与所述主芯片连接，所述控制电路与所述左声道开关和所述右声道开关连接，所述左声道开关和所述右声道开关与所述耳机端口连接；以及所述控制电路用于接收所述主芯片输出的控制信号，并根据所述控制信号分别向所述左声道开关输出第一信号、向所述右声道开关输出第二信号；其中，所述第一信号用于控制所述左声道开关的断开或闭合，所述第二信号用于控制所述右声道开关的断开或闭合。

Description

显示装置耳机控制电路及显示装置 技术领域
本公开涉及显示装置技术领域，尤其涉及一种显示装置耳机控制电路及显示装置。
背景技术
随着显示装置技术的快速发展，为了满足消费者日益增长的多元化需求，如电视机、电脑显示器等许多显示装置上都配备了耳机电路以实现耳机播放声音信号的功能。显示装置主芯片发出的声音信号除了可以通过主扬声器发出，也可以经耳机电路内的功放进行功率放大后通过耳机发出。为了能够使用户在欣赏电视节目时不影响周围其他人休息，可以通过将耳机插入显示装置上的耳机插座实现对显示装置扬声器的静音。
发明内容
本部分提供本公开的简要说明，并非全面披露其全部范围或其所有特征。
一方面，本公开实施例提供一种显示装置耳机控制电路，包括：
主芯片；
耳机端口；以及
开关电路，所述开关电路包括：控制电路、左声道开关和右声道开关；其中，所述控制电路、所述左声道开关和所述右声道开关与所述主芯片连接，所述控制电路与所述左声道开关和所述右声道开关连接，所述左声道开关和所述右声道开关与所述耳机端口连接；
所述控制电路用于接收所述主芯片输出的控制信号，并根据所述控制信号分别向所述左声道开关输出第一信号、向所述右声道开关输出第二信号；其中，所述第一信号用于控制所述左声道开关的断开或闭合，所述第二信号用于控制所述右声道开关的断开或闭合。
本公开的一些实施例提供一种显示装置，包括耳机控制电路，所述耳机控制电路包括：
主芯片；
耳机端口；以及
开关电路，所述开关电路包括：控制电路、左声道开关和右声道开关；其中，所述控制电路、所述左声道开关和所述右声道开关与所述主芯片连接，所述控制电路与所述左声道开关和所述右声道开关连接，所述左声道开关和所述右声道开关与所述耳机端口连接；
所述控制电路用于接收所述主芯片输出的控制信号，并根据所述控制信号分别向所述左声道开关输出第一信号、向所述右声道开关输出第二信号；其中，所述第一信号用于控制所述左声道开关的断开或闭合，所述第二信号用于控制所述右声道开关的断开或闭合。
附图说明
为了更清楚地说明本公开实施例或相关技术中的技术方案，下面将对实施例或相关技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1A为相关技术中显示装置耳机控制电路的结构示意图；
图1B为相关技术中显示装置耳机控制电路的结构示意图；
图2为本公开显示装置耳机控制电路实施例的结构示意图；
图3为本公开显示装置耳机控制电路实施例的结构示意图；
图4为本公开显示装置耳机控制电路实施例的结构示意图；
图5为本公开显示装置耳机控制电路实施例的结构示意图；
图6为本公开显示装置耳机控制电路实施例的结构示意图；
图7为本公开显示装置耳机控制电路实施例的结构示意图；
图8为本公开显示装置耳机控制电路实施例的结构示意图；
图9为本公开显示装置实施例的结构示意图。
通过上述附图，已示出本公开明确的实施例，后文中将有更详细的描述。这些附图和文字描述并不是为了通过任何方式限制本公开构思的范围，而是通过参考特定实施例为本领域技术人员说明本公开的概念。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
本公开的说明书和权利要求书及上述附图中的术语“第一”、“第二”、“第三”、“第四”等(如果存在)是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的本公开的实施例，例如，能够以除了在这里图示或描述的那些以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
图1A和图1B为相关技术中显示装置耳机控制电路的结构示意图。如图1A所示的相关显示装置耳机控制电路中，由于主芯片所输出的声音信号功率较低，通常不能满足耳机端口内的耳机播放时所需要的最低输出功率，所以主芯片输出的声音信号会通过一个功放芯片后再输出到耳机端口，以输出满足耳机最低输出功率的声音信号。
相关技术中，当显示装置采用耳机发声时，用户如果需要对耳机输出进行静音操作，可以通过两种方式对显示装置的耳机进行静音操作：一种是当显示装置关机时，控制电路内的电容放电，由电容放电造成的控制电路高低电平的变化生成一个向功放芯片输出的控制信号，该控制信号用于使功放芯片断开主芯片向耳机端口输出的声音信号，实现耳机静音；另一种是，可以通过例如操作遥控器的方式，当控制电路接收到来自显示装置遥控器的静音控制信号时，控制电路向功放芯片输出控制信号，控制功放芯片实现耳机静音。
如图1B所示的显示装置耳机控制电路是图1A中耳机控制电路的一种可能的具体实现方式，其中，功放芯片为图中标号为N119所示的芯片，耳机端口为图中标号为XS9所示的端口。主芯片标号为HP_Audio-L的接口连接耳 机功放芯片N119标号为13的管脚，用于主芯片向功放芯片输出左声道声音信号；左声道声音信号经过耳机功放芯片N119进行放大后，通过标号为12的管脚将声音信号HP_LOUT输出至耳机端口XS9内标号为1的接口L中，为耳机提供放大后的左声道声音信号。类似地，标号为HP_Audio-R的接口连接耳机功放芯片N119标号为2的管脚，用于主芯片向耳机功放芯片输出右声道声音信号，右声道声音信号经过耳机功放芯片N119进行放大后，通过标号为3的管脚将声音信号HP_ROUT输出至耳机端口XS9内标号为2的接口R中，为耳机提供放大后的右声道声音信号。
耳机功放芯片N119还提供了标号为5的管脚用于实现耳机的静音控制功能。当耳机功放芯片N119通过标号为5的管脚接收到静音控制信号MUTE_HP后，停止通过标号为3的管脚输出右声道声音信号并停止通过标号为12的管脚输出左声道声音信号，从而实现显示装置耳机输出声音的关闭。
而对于如图2所示的电路中，用于控制功放芯片的静音控制信号MUTE_HP有两种生成方式。
第一种是，显示装置关机时，图中标号为+5V_Normal的输入电压降为0V，同时标号为C933的电容的负极接地，此时电容C933就需要通过标号为R1000的电阻放电。当电容C933放电后，连接电容正极的三极管V82的发射极为高电平，而由于+5V_Normal将为0V，三极管V82的基极电平也就降为0V，因此三极管V82导通，三极管V82导通后，三极管V82的集电极输出高电平，二极管VD54导通；类似的，关机时12VS迅速降为0V，电容C9343放电，二极管BAT54C导通；此外，关机时，无法接收静音控制信号MUTE_HP，因此二极管VD50截止。综上，三极管V81的基极为高电平，三极管V81导通，其集电极被拉低，也就是说三极管V82的集电极输出的高电平经过三极管V81的反相处理后，最终得到的低电平信号即为静音控制信号MUTE_HP。静音控制信号MUTE_HP通过芯片N119中标号为5的管脚输入耳机功放芯片N119中，当耳机功放芯片N119标号为5的管脚收到该低电平静音控制信号后，停止向耳机端口XS9输出声音信号，从而实现耳机静音。其中，电容C933和C934的作用就是在显示装置关机时能够利用电容放电来维持耳机功放芯片的标号为5的管脚低电压，使得耳机功放芯片标号为3和标号为12的管脚无声音信号输出，从而防止显示装置在关机后主芯片仍输出一些不受控 的声音信号而影响用户体验。
第二种是，通过标号为VD50的二极管的标号为1的接口接收软件静音指示信号AMP_MUTE，如显示装置的遥控器发出软件静音指示信号；该静音指示信号AMP_MUTE为高电平信号，此时二极管VD50导通；另外，由于系统正常工作，电容C933和C934所在支路都被断开，二极管VD54、二极管BAT54C截止，因此，三极管V81基极为高电平，三极管V81导通，即软件静音指示信号AMP_MUTE同样经过三极管V81的反相处理后，得到静音控制信号MUTE_HP并输入耳机功放芯片N119标号为5的管脚中以使耳机功放N119实现耳机静音。
综上，上述相关技术中耳机控制电路的结构，由于引入电容来保证显示装置关机的静音，但是电容属于模拟元器件，随着器件的老化、损坏，就又会出现显示装置在关机后还输出不受控的杂音、爆音的现象，影响用户体验。
此外，由于控制电路向功放芯片发送的控制信号需要经过反相操作，并且功放芯片还需要根据控制信号进行停止向耳机端口输出声音信号的操作。这些步骤均会对耳机静音控制产生一定的延迟。因此不论控制信号是由显示装置关机时电容放电产生、还是由用户的遥控器控制产生的，都会造成显示装置耳机静音的响应速度较慢，也进一步地降低了显示装置用户的体验。
本公开提供一种显示装置耳机控制电路，通过简化显示装置耳机控制电路，以提高显示装置耳机在关机的静音操作时使得显示装置不会输出不受控的杂音，从而提高显示装置用户的体验。
下面以具体地实施例对本公开的技术方案进行详细说明。下面这几个具体的实施例可以相互结合，对于相同或相似的概念或过程可能在某些实施例不再赘述。
图2为本公开显示装置耳机控制电路实施例的结构示意图。如图2所示，本实施例提供的显示装置耳机控制电路包括：主芯片1、开关电路2和耳机端口3，主芯片1通过开关电路2连接耳机端口3。其中，主芯片1输出的声音信号能够通过开关电路2输出至耳机端口3，主芯片1输出的声音信号的功率大于或等于耳机端口3内耳机的预设功率，主芯片1用于向开关电路2输出控制信号，控制信号用于将开关电路2切换为断开状态或闭合状态。
在本实施例的显示装置耳机控制电路中，主芯片1所输出的声音信号已 经过放大至第一功率，其中，第一功率大于等于耳机的预设功率，该预设功率可以为耳机的最低输出功率，耳机的最低输出功率为耳机在声音调到最小时，能够正常输出的声音信号的功率。例如：某耳机的最低输出功率为5毫瓦(milliwatt，mw)，则主芯片1此时能够输出的声音信号的第一功率需要能够大于或等于5mw。若不同耳机的最低输出功率不同，主芯片1还可以通过耳机检测或耳机上报其型号的方式确定耳机的最低输出功率，本实施例对此不做具体限定。可选地，为了提高主芯片输出声音信号的音质，在主芯片输出的声音信号还可以再经过电阻电容(Resistance-Capacitance，RC)滤波器，也称相移滤波器，进行滤波消除干扰后输入耳机端口。上述预设功率，还可以大于最低输出功率，其实现方式类似，对此不再赘述。
在一些实施例中，如图2所示的显示装置耳机控制电路中，当开关电路2处于闭合状态时，主芯片1到耳机端口3的通路被导通，主芯片1所输出的声音信号能够通过开关电路2输出至耳机端口3中，为耳机端口3中的耳机提供声音信号；当开关电路2处于断开状态时，主芯片1到耳机端口3的通路被断开，主芯片1所输出的声音信号不能够通过开关电路2输出至耳机端口3中，从而实现耳机的静音。其中，开关电路2的断开状态和闭合状态可以通过主芯片1所发送的控制信号来切换。例如：主芯片1向开关电路2发送一高电平控制信号，则开关电路2切换为闭合状态；主芯片1向开关电路2发送一低电平控制信号，则开关电路2切换为断开状态。此处的控制信号为高低电平的形式仅为示例，本实施例并不对控制信号的具体形式进行限定。
在一些实施例中，本实施例中的用于切换开关电路2状态的控制信号也可以通过关机和接收静音指示的方式生成。其中，以上述示例中的高低电平为例进行说明，主芯片1中用于向开关电路2输出的管脚设置默认输出的控制信号为低电平控制信号，即主芯片1在耳机端口3中没有插入耳机或者未得电的情况下向开关电路2所输出的控制信号为低电平控制信号，使得开关电路2的默认状态为断开状态。当耳机端口3中被检测到有耳机插入时(检测方法可参照7或图8实施例)，主芯片1才会向开关电路2输出高电平控制信号，以将开关电路2切换为闭合状态，使得主芯片1所输出的声音信号能够通过开关电路路2输出至耳机端口3。因此当显示装置关机后，主芯片掉 电，主芯片向开关电路2输出控制信号的管脚又恢复默认输出的低电平控制信号，使得开关电路2的状态切换为或继续保持断开状态，从而实现了显示装置耳机的静音。
此外，在通过静音指示的方式实现显示装置耳机静音中，可以接收如显示装置的遥控器发出的静音指示，该静音指示可以通过控制信号的方式直接输出至开关电路2中，使得开关电路2切换为断开状态，实现显示装置耳机的静音。或者，可以在主芯片接收到静音指示后，由主芯片向开关电路2发出控制信号，使得开关电路2切换为断开状态，实现显示装置耳机的静音。
因此，综上，本实施例提供的显示装置耳机控制电路中，由于主芯片直接输出的是满足耳机最低输出功率的声音信号，因此显示装置耳机控制电路中就可以不设置功放芯片，主芯片的声音信号可以直接通过开关电路输入耳机端口中。因此显示装置耳机控制电路在控制显示装置耳机静音时也就不需要如相关技术中通过主芯片间接控制耳机功放芯片的方式实现耳机的静音，而是主芯片直接通过开关电路的断开与闭合就可以实现耳机的静音，从而降低了显示装置耳机控制电路的电路复杂度。并且通过主芯片直接控制开关电路的断开与闭合实现耳机静音时，不会在显示装置耳机控制电路中设置用于在显示装置开机和关机时控制功放芯片静音的电容，也就不会出现因电容老化、损坏而不能控制功放芯片静音而导致出现显示装置在关机后还输出不受控的杂音、爆音的现象，从而提高了显示装置耳机在静音时的音质，提高了显示装置的用户体验。
此外，本实施例提供的显示装置耳机控制电路，主芯片直接通过开关电路的断开与闭合就可以实现耳机的静音，因此不论显示装置关机时的耳机静音、还是由用户的遥控器控制的耳机静音，都只需要通过控制主芯片直接向开关电路发送控制信号的方式实现耳机静音。与相关技术中主芯片间接控制功放芯片实现耳机静音的方式相比更为直接，降低了显示装置耳机控制电路复杂度和时间复杂度，减少了显示装置耳机静音的响应时间，也进一步地提高了显示装置的用户体验。
图3为本公开显示装置耳机控制电路实施例的结构示意图。如图3所示的耳机控制电路在图2所示实施例的基础上，开关电路2包括：控制电路21、左声道开关22和右声道开关23。其中，主芯片1输出的左声道声音 信号能够通过左声道开关22输出至耳机端口3，主芯片1输出的右声道声音信号能够通过右声道开关23输出至耳机端口3。控制电路21用于接收主芯片1输出的控制信号，并根据控制信号向左声道开关22输出第一信号，向右声道开关23输出第二信号，第一信号用于控制左声道开关22的断开和闭合，第二信号用于控制右声道开关23的断开和闭合。
在一些实施例中，在图3所示的实施例中在图2所示实施例的基础上，更为细化地将主芯片1输出的声音信号划分为左声道声音信号和右声道声音信号，并且两种信号经过开关电路2内不同的开关后传输至耳机端口3，耳机端口3内的耳机能够根据接收到的左声道声音信号和右声道声音信号最终输出两种声音信号。其中，控制电路21能够控制左声道开关22和右声道开关23的断开和闭合。一般情况下，控制电路21需要根据接收到的控制信号控制左声道开关22和右声道开关23，同时断开或同时闭合。而在需要时，控制电路21也可单独控制左声道开关22与右声道开关23处于不同的断开或闭合状态，本实施例对此不做限定。
当控制电路21控制左声道开关22闭合时，主芯片1输出的左声道声音信号能够经过闭合的左声道开关22传输至耳机端口3；当控制电路21控制左声道开关22断开时，主芯片1输出的左声道声音信号不能够经过断开的左声道开关22传输至耳机端口3，实现耳机左声道的静音。同样地，当控制电路21控制右声道开关23闭合时，主芯片1输出的右声道声音信号能够经过闭合的右声道开关23传输至耳机端口3；当控制电路21控制右声道开关23断开时，主芯片1输出的右声道声音信号不能够经过断开的右声道开关23传输至耳机端口3，实现耳机右声道的静音。
图4为本公开显示装置耳机控制电路实施例的结构示意图。如图4所示的耳机控制电路在图3所示实施例的基础上，提供了一种更为具体的实现方式，其中，控制电路21为第一开关，左声道开关22为第二开关，右声道开关23为第三开关。
在一些实施例中，第一开关的第一端连接主芯片，用于接收主芯片输出的控制信号；第一开关的第二端连接左声道开关，用于向左声道开关输出第一信号；第一开关的第二端也连接右声道开关，用于向右声道开关输出第二信号；第一开关的第三端接地。第二开关的第一端连接主芯片，用于接收主 芯片输出的左声道声音信号；第二开关的第二端连接耳机端口，用于向耳机端口输出左声道声音信号；第二开关的第三端连接第一开关的第二端，用于接收第一信号。第三开关的第一端连接主芯片，用于接收主芯片输出的右声道声音信号；第三开关的第二端连接耳机端口，用于向耳机端口输出右声道声音信号；第三开关的第三端连接第一开关的第二端，用于接收第二信号。
在一些实施例中，当第一开关接收到主芯片发送的控制信号，能够根据控制信号控制第二开关的断开和闭合、第三开关的断开和闭合。当第一开关通过第一信号控制第二开关闭合时，主芯片输出的左声道声音信号能够经过闭合的第二开关传输至耳机端口；当第一开关通过第一信号控制第二开关断开时，主芯片输出的左声道声音信号不能够经过断开的第二开关传输至耳机端口，实现耳机左声道的静音。类似地，当第一开关通过第二信号控制第三开关闭合时，主芯片输出的右声道声音信号能够经过闭合的第三开关传输至耳机端口；当第一开关通过第二信号控制第三开关断开时，主芯片输出的右声道声音信号不能够经过断开的第三开关传输至耳机端口，实现耳机右声道的静音。
在如图4所示的示例中，第一开关向第二开关输出的第一信号、向第三开关输出的第二信号为第一开关所输出的同一信号，以实现第二开关和第三开关的同时断开或闭合。即为了同时控制第二开关和第三开关的状态，因此只是因电路连接的方式分别向第二开关和第三开关输出了两路不同的信号。而为了实现第二开关和第三开关独立的控制断开或闭合，可将第一开关的一个输出端连接第二开关，另一输出端连接第三开关，并且分别向第二开关输出第一信号、向第三开关输出与第一信号相反的第二信号，从而实现第二开关和第三开关的独立控制，其具体实现方式不再赘述。
在一些实施例中，图5为本公开显示装置耳机控制电路实施例的结构示意图。如图5所示的耳机控制电路在图4所示实施例的基础上，将上述开关通过三级管与金属氧化物半导体(Metal Oxide Semiconductor，MOS)管实现，第一开关、第二开关和第三开关中每一个开关均可以是三极管或者MOS管，三个开关可以任意组合。在一种实施方式中，如图5所示，作为接收控制信号的第一开关可以为三极管，由于MOS管相对于三极管拥有更强的驱动能力，用于传输声音信号的第二开关和第三开关可以为MOS管。
图6为本公开显示装置耳机控制电路实施例的结构示意图。图6为前述图5的实施例中的控制电路2的一种电路连接实现方式。其中，标号为V31的三极管可以是上述实施例中所述的第一开关，标号为V84的MOS管可以是上述实施例中所述的第二开关，标号为V85的MOS管可以是上述实施例中所述的第三开关，标号为XS9的端口可以是上述实施例中所述的耳机端口。
在一些实施例中，主芯片标号为HP_Audio-L的管脚连接控制电路内第二开关V84，用于主芯片通过第二开关V84向耳机端口XS9的标号为L的管脚输出左声道声音信号HP_LOUT；主芯片标号为HP_Audio-R的管脚连接控制电路内第三开关V85，用于主芯片通过第三开关V85向耳机端口XS9的标号为R的管脚输出右声道声音信号HP_ROUT。主芯片标号为HP_SWITCH的管脚用于连接第一开关V31，主芯片通过该管脚向第一开关V31输出控制信号，以使第一开关V31根据控制信号控制第二开关V84和第三开关V85的状态。
在一些实施例中，主芯片的HP_SWITCH管脚为主芯片的通用输入输出GPIO端口，即主芯片通过其GPIO端口向控制电路输出控制信号。其中，在如图6所示的电路中设置第一开关V31的目的是增加控制信号的驱动能力，保持主芯片GPIO端口的高阻态状态。
在一些实施例中，在如图6所述的示例中，控制信号可以是主芯片通过HP_SWITCH管脚输出的高电平信号。第一开关V31的基极处于高电平，第一开关V31导通，第一开关V31的集电极与发射极导通。第一开关V31的发射极接地则集电极为低电平，第一开关V31的集电极向第二开关V84的栅极和第三开关V85的栅极输出低电平，使得第二开关V84和第三开关V85截止，第二开关V84的漏极和源极断开，第三开关V85的漏极和源极断开，进而使得第二开关V84漏极连接的接口HP_Audio-L中的左声道声音信号HP_LOUT不能通过第二开关V84输出到耳机端口内标号为L的管脚，实现耳机左声道的静音，并使得第三开关漏极连接的接口HP_Audio-R中的右声道声音信号HP_ROUT不能通过第三开关V85输出到耳机端口内标号为R的管脚，实现耳机右声道的静音。
上述图6的具体电路连接中，控制信号为高电平信号仅为示例。控制信号还可以是低电平信号，只需对图6所示电路连接关系进行调整，例如增加 一个三极管对控制信号再次反相，同样能够实现如图6相同的控制方式，本实施例对控制信号的具体实现方式不做限定。
综上，本实施例提供的显示装置耳机控制电路，通过主芯片GPIO端口向控制电路发送控制信号，并且控制电路能够根据控制信号直接控制左声道开关和右声道开关的断开或闭合状态。当控制电路左声道开关和右声道开关同时断开时，能够实现显示装置耳机的静音。从而以较为简单的电路连接方式实现了对显示装置耳机静音控制的功能，简化了耳机功放电路，降低了显示装置主板的成本，并且该电路能够通过主芯片直接控制控制电路实现耳机静音，不用在控制电路中设置用于在显示装置开机和关机时控制功放芯片静音的电容，也就不会出现因电容老化、损坏而不能控制功放芯片静音，不会导致出现显示装置在关机后还输出不受控的杂音、爆音的现象，从而提高了显示装置耳机在静音时的音质，并提高了显示装置的用户体验。
图7为本公开显示装置耳机控制电路实施例的结构示意图。如图7所示的耳机控制电路在上述实施例的基础上，还包括：检测电路4，检测电路4的第一端连接主芯片1，检测电路4的第二端连接耳机端口3；其中，主芯片1通过检测电路4检测耳机端口3中是否有耳机插入，若是，主芯片1控制显示装置的扬声器静音。
图8为本公开显示装置耳机控制电路实施例的结构示意图。以图8中的具体电路连接方式为例，检测电路的第一端连接主芯片的HPDET管脚，第二端连接耳机端口XS9的SW管脚，第三端连接耳机端口XS9的GND管脚。主芯片的HPDET管脚用于通过检测电路检测耳机端口中是否有耳机插入。其中，当耳机端口XS9中插入耳机时，耳机端口XS9中标号为SW和GND的管脚导通。其中，GND管脚为接地管脚，SW管脚用于通过检测电路连接主芯片的HPDET管脚，当耳机端口内插入耳机会形成SW管脚-耳机-GND管脚的通路。在该通路中由于GND接口接地，则主芯片HPDET管脚的电平会发生变化。当主芯片通过HPDET管脚的电平变化确定耳机端口XS9中有耳机插入时，则主芯片通过HP_SWITCH管脚向第一开关V31输出控制信号，以最终控制显示装置耳机静音。
图9为本公开显示装置实施例的结构示意图。如图9所示，本实施例提供的显示装置9包括如图1-8任一项实施例中的显示装置耳机控制电路91。 其中，显示装置9可以是电视机、电脑显示器或影音播放器等用于显示的装置。
以上所述，仅是本公开的较佳实施例而已，并非对本公开作任何形式上的限制，依据本公开的技术实质对以上实施例所作的任何简单修改、等同变化与修饰，均仍属于本公开技术方案的范围内。
最后应说明的是：以上各实施例仅用以说明本公开的技术方案，而非对其限制；尽管参照前述各实施例对本公开进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本公开各实施例技术方案的范围。

Claims (20)

  1. 一种显示装置耳机控制电路，包括：
    主芯片；
    耳机端口；以及
    开关电路，其中所述开关电路包括：控制电路、左声道开关和右声道开关；其中，所述控制电路、所述左声道开关和所述右声道开关与所述主芯片连接，所述控制电路与所述左声道开关和所述右声道开关连接，所述左声道开关和所述右声道开关与所述耳机端口连接；以及所述控制电路用于接收所述主芯片输出的控制信号，并根据所述控制信号分别向所述左声道开关输出第一信号、向所述右声道开关输出第二信号；其中，所述第一信号用于控制所述左声道开关的断开或闭合，所述第二信号用于控制所述右声道开关的断开或闭合。
  2. 根据权利要求1所述的电路，其中所述主芯片输出的左声道声音信号能够通过所述左声道开关输出至所述耳机端口，所述主芯片输出的右声道声音信号能够通过所述右声道开关输出至所述耳机端口。
  3. 根据权利要求2所述的电路，其中所述左声道声音信号和所述右声道声音信号的功率大于或等于预设功率，所述预设功率为所述耳机端口内耳机的最低输出功率。
  4. 根据权利要求1所述的电路，其中所述控制电路包括第一开关；其中，所述第一开关的第一端连接至所述主芯片，用于接收所述主芯片输出的控制信号；所述第一开关的第二端连接至所述左声道开关，用于向所述左声道开关输出所述第一信号以及连接至所述右声道开关用于向所述右声道开关输出所述第二信号，所述第一开关的第三端接地。
  5. 根据权利要求4所述的电路，其中所述左声道开关包括第二开关；其中，所述第二开关的第一端连接所述主芯片，用于接收所述主芯片输出的所述左声道声音信号；所述第二开关的第二端连接所述耳机端口，用于向所述耳机端口输出所述左声道声音信号；所述第二开关的第三端连接所述第一开关的第二端，用于接收所述第一信号。
  6. 根据权利要求4所述的电路，其中所述右声道开关包括第三开关；其中，所述第三开关的第一端连接所述主芯片，用于接收所述主芯片输出的所 述右声道声音信号；所述第三开关的第二端连接所述耳机端口，用于向所述耳机端口输出所述右声道声音信号；所述第三开关的第三端连接所述第一开关的第二端，用于接收所述第二信号。
  7. 根据权利要求6所述的电路，其中
    所述第一开关为三极管，所述第二开关和所述第三开关为金属氧化物半导体MOS晶体管。
  8. 根据权利要求7所述的电路，其中所述第一开关的第一端为基极，第二端为集电极，第三端为发射极；所述第二开关的第一端为漏极，第二端为栅极，第三端为源极；所述第三开关的第一端为漏极，第二端为栅极，第三端为源极。
  9. 根据权利要求8所述的电路，其中，
    所述控制信号为高电平信号时，所述第一开关的基极接收所述高电平信号后，使得所述第一开关的集电极和发射极导通；所述第一开关的集电极为低电平并向所述第二开关的栅极和所述第三开关的栅极输出低电平信号，使得所述第二开关的漏极和源极断开、所述第三开关的漏极和源极断开；
    所述控制信号为低电平信号时，所述第一开关的基极接收所述低电平信号后，使得所述第一开关的集电极和发射极断开；所述第一开关的集电极为高电平并向所述第二开关的栅极和所述第三开关的栅极输出高电平信号，使得所述第二开关的漏极和源极导通、所述第三开关的漏极和源极导通。
  10. 根据权利要求1所述的电路，其中，
    所述主芯片具体通过通用输入输出GPIO端口向所述控制电路输出所述控制信号。
  11. 根据权利要求1所述的电路，其中，还包括：
    检测电路，所述检测电路的第一端连接所述主芯片，所述检测电路的第二端连接所述耳机端口；其中，所述主芯片通过所述检测电路检测所述耳机端口中是否有耳机插入，若是，所述主芯片控制所述显示装置的扬声器静音。
  12. 一种显示装置，包括耳机控制电路，所述耳机控制电路包括：
    主芯片；
    耳机端口；以及
    开关电路，所述开关电路包括：控制电路、左声道开关和右声道开关； 其中，所述控制电路、所述左声道开关和所述右声道开关与所述主芯片连接，所述控制电路与所述左声道开关和所述右声道开关连接，所述左声道开关和所述右声道开关与所述耳机端口连接；
    所述控制电路用于接收所述主芯片输出的控制信号，并根据所述控制信号分别向所述左声道开关输出第一信号、向所述右声道开关输出第二信号；其中，所述第一信号用于控制所述左声道开关的断开或闭合，所述第二信号用于控制所述右声道开关的断开或闭合。
  13. 根据权利要求12所述的显示装置，其中所述主芯片输出的左声道声音信号能够通过所述左声道开关输出至所述耳机端口，所述主芯片输出的右声道声音信号能够通过所述右声道开关输出至所述耳机端口。
  14. 根据权利要求12所述的显示装置，其中所述左声道声音信号和所述右声道声音信号的功率大于或等于预设功率，所述预设功率为所述耳机端口内耳机的最低输出功率。
  15. 根据权利要求12所述的显示装置，其中所述控制电路包括第一开关；其中，所述第一开关的第一端连接至所述主芯片，用于接收所述主芯片输出的控制信号；所述第一开关的第二端连接至所述左声道开关，用于向所述左声道开关输出所述第一信号以及连接至所述右声道开关用于向所述右声道开关输出所述第二信号，所述第一开关的第三端接地。
  16. 根据权利要求15所述的显示装置，其中，所述左声道开关包括第二开关；其中，所述第二开关的第一端连接所述主芯片，用于接收所述主芯片输出的所述左声道声音信号；所述第二开关的第二端连接所述耳机端口，用于向所述耳机端口输出所述左声道声音信号；所述第二开关的第三端连接所述第一开关的第二端，用于接收所述第一信号。
  17. 根据权利要求16所述的显示装置，其中，所述右声道开关包括第三开关；其中，所述第三开关的第一端连接所述主芯片，用于接收所述主芯片输出的所述右声道声音信号；所述第三开关的第二端连接所述耳机端口，用于向所述耳机端口输出所述右声道声音信号；所述第三开关的第三端连接所述第一开关的第二端，用于接收所述第二信号。
  18. 根据权利要求17所述的显示装置，其中，
    所述第一开关为三极管，所述第二开关和所述第三开关为金属氧化物半 导体MOS晶体管；所述第一开关的第一端为基极，第二端为集电极，第三端为发射极；所述第二开关的第一端为漏极，第二端为栅极，第三端为源极；所述第三开关的第一端为漏极，第二端为栅极，第三端为源极。
  19. 根据权利要求18所述的显示装置，其中，
    所述控制信号为高电平信号时，所述第一开关的基极接收所述高电平信号后，使得所述第一开关的集电极和发射极导通；所述第一开关的集电极为低电平并向所述第二开关的栅极和所述第三开关的栅极输出低电平信号，使得所述第二开关的漏极和源极断开、所述第三开关的漏极和源极断开；
    所述控制信号为低电平信号时，所述第一开关的基极接收所述低电平信号后，使得所述第一开关的集电极和发射极断开；所述第一开关的集电极为高电平并向所述第二开关的栅极和所述第三开关的栅极输出高电平信号，使得所述第二开关的漏极和源极导通、所述第三开关的漏极和源极导通。
  20. 根据权利要求12所述的显示装置，其中，还包括：
    检测电路，所述检测电路的第一端连接所述主芯片，所述检测电路的第二端连接所述耳机端口；其中，所述主芯片通过所述检测电路检测所述耳机端口中是否有耳机插入，若是，所述主芯片控制所述显示装置的扬声器静音。
PCT/CN2019/093708 2018-07-17 2019-06-28 显示装置耳机控制电路及显示装置 WO2020015515A1 (zh)

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Publication number Priority date Publication date Assignee Title
CN112637722B (zh) * 2020-12-21 2021-11-09 成都极米科技股份有限公司 一种静音控制电路及终端设备
CN113115180B (zh) * 2021-04-28 2022-08-02 广州朗国电子科技股份有限公司 一种音频输出端的爆破音去除装置及音频设备

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203872338U (zh) * 2014-04-02 2014-10-08 深圳市冠旭电子有限公司 一种电子开关电路及便携式音频播放装置
CN104244160A (zh) * 2013-06-21 2014-12-24 鸿富锦精密工业（深圳）有限公司 可通过耳机接口进行调试的电子装置
CN107864422A (zh) * 2017-09-26 2018-03-30 捷开通讯(深圳)有限公司 播放设备及基于播放设备的播放方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN200969673Y (zh) * 2006-08-07 2007-10-31 海信集团有限公司 耳机静音电路及具有所述耳机静音电路的电视机
CN201114733Y (zh) * 2007-10-19 2008-09-10 青岛海信电器股份有限公司 耳机电路和具有该电路的电视机
CN201131008Y (zh) * 2007-12-19 2008-10-08 康佳集团股份有限公司 一种电视耳机静音电路
CN201270580Y (zh) * 2008-10-23 2009-07-08 青岛海信电器股份有限公司 一种耳机静音电路及具有该耳机静音电路的电视机
CN202738011U (zh) * 2012-07-28 2013-02-13 深圳市同洲电子股份有限公司 静音电路、数字电视接收机及音频装置
CN103037287B (zh) * 2012-11-26 2015-12-02 华为技术有限公司 静音电路及具有该静音电路的电子设备
CN204465819U (zh) * 2015-03-27 2015-07-08 谭玉庆 预连耳机
CN104869512A (zh) * 2015-05-28 2015-08-26 盛耀无线通讯科技（北京）有限公司 一种抑制耳机插拔杂音电路
CN205069115U (zh) * 2015-10-26 2016-03-02 西安科技大学 一种基于脑电波控制的音乐播放器
CN206413166U (zh) * 2016-12-30 2017-08-15 惠州市康冠科技有限公司 一种耳机输出静音电路

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104244160A (zh) * 2013-06-21 2014-12-24 鸿富锦精密工业（深圳）有限公司 可通过耳机接口进行调试的电子装置
CN203872338U (zh) * 2014-04-02 2014-10-08 深圳市冠旭电子有限公司 一种电子开关电路及便携式音频播放装置
CN107864422A (zh) * 2017-09-26 2018-03-30 捷开通讯(深圳)有限公司 播放设备及基于播放设备的播放方法

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