WO2020015133A1 - 一种关联式垃圾数据回收方法 - Google Patents

一种关联式垃圾数据回收方法 Download PDF

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WO2020015133A1
WO2020015133A1 PCT/CN2018/105892 CN2018105892W WO2020015133A1 WO 2020015133 A1 WO2020015133 A1 WO 2020015133A1 CN 2018105892 W CN2018105892 W CN 2018105892W WO 2020015133 A1 WO2020015133 A1 WO 2020015133A1
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flash
flash memory
valid data
memory
block
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PCT/CN2018/105892
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French (fr)
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许豪江
李庭育
黄中柱
蔡定国
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江苏华存电子科技有限公司
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Publication of WO2020015133A1 publication Critical patent/WO2020015133A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory

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  • the invention relates to the technical field of flash memory, and in particular relates to an associated garbage data recovery method.
  • Flash memory is a non-volatile memory device that can store data. Data will not be lost after power is lost. Common are three-level cell (TLC) that stores three bits, two-level multilevel cell (MLC) flash memory and one single-level cell (SLC) flash memory. The larger the number of bits, the larger the capacity.
  • TLC three-level cell
  • MLC multilevel cell
  • SLC single-level cell
  • flash garbage collection Since data cannot be re-written after it is written to the flash memory, additional flash blocks must be used to organize the written data, a process called flash garbage collection. There are three cases of garbage collection. The first type is called the replacement mechanism, and the new flash data completely replaces the old flash block. The second type is the partial replacement mechanism. The new data flash block only needs to be partially replaced by the old flash block. The third type is the non-replaceable mechanism. The newly generated data flash blocks are all taken from several old flash blocks. The first type is the most efficient, and the third type takes the most time and cost.
  • a flash memory conversion layer is required in the flash memory to implement a virtual block device on the flash memory chip, and the logical address is mapped to the physical address of the flash memory mainly through a mapping table.
  • the second and third types of garbage collection mechanisms need to quickly find valid data in the block and move it to a new flash block.
  • the traditional method must read each position in the block, compare the mapping table, find out whether it matches the mapping table content, and judge the valid data or invalid data. This method takes a lot of reading time and affects the overall efficiency.
  • Traditional methods use valid data tables to record flash blocks that need garbage collection. However, the manufacturing process of flash memory chips has progressed, more and more flash pages are stored in a single flash block, and only the valid data table is used for recording. Although the flash block with the least valid data can be found, the use position cannot be precisely defined. It still takes a lot of searching time to find the location of valid data.
  • the invention proposes an associated flash memory valid data table to improve the search efficiency. Reduce flash garbage collection time.
  • the purpose of the present invention is to provide an associated garbage data recovery method to solve the problems raised in the background art described above.
  • An associated garbage data recovery method including a memory control chip and a plurality of flash memories, wherein the memory control chip is provided with a flash memory instruction control device and a flash memory logical address mapping physical address table , A flash block valid data table, a data buffer, and a plurality of associated flash effective data tables, the memory control chip is connected to a plurality of flash memories; the plurality of associated flash effective data tables includes a first associated flash effective data table, a second The associative flash memory valid data table, the third associative flash memory valid data table, and the Nth associative flash memory valid data table, where N is an integer greater than 3; the memory control chip is connected to the host.
  • the plurality of flash memories include a first flash memory, a second flash memory, a third flash memory, and an M-th flash memory, where M is an integer greater than 3, each flash memory has 1024 blocks, each block has 256 pages, and each page has A combination of 32 sectors.
  • an associated garbage data collection method includes the following steps:
  • A. Receive the data information to be written from the host, and configure a writable physical address according to the flash memory block in the memory control chip;
  • the present invention has the beneficial effect that the present invention divides a plurality of regions for a flash memory block through a relational flash memory valid data table, thereby accelerating the speed of finding valid data. Quickly find the garbage collection flash page and move the flash data. Significantly reduce garbage collection time.
  • FIG. 1 is a schematic block diagram of the present invention
  • FIG. 2 is a flowchart of the present invention.
  • an associated garbage data recovery method which includes a memory control chip 1 and a plurality of flash memories.
  • the memory control chip 1 is provided with a flash memory instruction control device 2 and a flash memory logical address.
  • Map physical address table 3, flash block valid data table 4, data buffer 5 and multiple associated flash memory valid data tables, the memory control chip 1 is connected to multiple flash memories; the multiple associated flash valid data tables include a first association Flash memory valid data table 6, second associated flash memory valid data table 7, third associated flash memory valid data table 8, Nth associated flash memory valid data table, N is an integer greater than 3; the memory control chip 1 is connected Host 9; multiple flash memories include first flash memory 10, second flash memory 11, third flash memory 12, and Mth flash memory, where M is an integer greater than 3, each flash memory has 1024 blocks, each block has 256 pages, each Each page has 32 fan-shaped combinations.
  • flash memory instruction control device in the memory control chip. Through this device, instructions can be issued to control the flash memory chip.
  • flash block valid data sheet M associated flash data valid data sheets, where M is a positive integer greater than or equal to 1, in units of 0 flash pages, and O is a positive integer greater than 1, assuming that the flash block has 256 flash memories Page, the flash page is divided into four equal parts, each flash block has four associated flash valid data tables, the first one records the valid data of 0 ⁇ 63 flash pages, and the second one represents the valid pages of 64 ⁇ 127 flash pages Data, the third is valid data for 128-191 flash pages, and the last is valid data for 192-255 flash pages.
  • Each flash block and flash page valid data table has a counter to record the valid data in the flash memory area. When a flash block writes a piece of data, the corresponding counter is incremented by 1, and the flash block counter in the replaced data is decremented. 1. When the counter is zero, it means that the flash block can be erased and reused.
  • an associated garbage data recovery method includes the following steps:
  • A. Receive the data information to be written from the host, and configure a writable physical address according to the flash memory block in the memory control chip;
  • the flash page valid data table can skip the flash page area that does not need to be moved, and directly search the flash page that needs to be moved.
  • the oldest data that is least moved such as a 256 page flash block, has four flash page valid data tables
  • the valid data in the flash memory block is flash page 3 and flash page 200.
  • the traditional method must find the 240th flash page to find all valid data positions. Using this method, it can be found from the flash page valid data table that only the first One block and the fourth block, you only need to search 128 times to find the data you need to move.
  • the present invention divides a plurality of regions into one flash memory block through a relational flash memory valid data table, thereby accelerating the speed of finding valid data. Quickly find the garbage collection flash page and move the flash data. Significantly reduce garbage collection time.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
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Abstract

一种关联式垃圾数据回收方法，包括存储器控制芯片（1）和多个闪存，存储器控制芯片（1）内设有闪存指令控制装置（2）、闪存逻辑地址映射物理地址表（3）、闪存块有效数据表（4）、数据缓冲区（5）以及多个关联式闪存有效数据表，存储器控制芯片（1）连接多个闪存。该方法通过关系型的闪存有效数据表，为一个闪存块划分多个区域，进而加速找到有效数据的速度，快速的找到该垃圾回收的闪存页，搬移闪存数据，大幅的缩减垃圾回收的时间。

Description

一种关联式垃圾数据回收方法 技术领域
本发明涉及闪存技术领域，具体为一种关联式垃圾数据回收方法。
背景技术
闪存为非消失性的存储器装置，能保存数据。不会再失去电力后遗失数据，常见的有存储三个比特的三级单元(TLC)，两个比特的多级单元(MLC)闪存以及一个单级单元(SLC)闪存，当单元内储存的比特数越多，容量也越大。
由于闪存写入数据后不可以重复再写入数据，必须要使用额外的闪存块整理已写入的数据，此过程称为闪存垃圾回收。垃圾回收有三种情况，第一种类型称为替换机制，新的闪存数据完全取代旧的闪存块；第二种类型为部分替换机制，新的数据闪存块只有部分需要由旧闪存块取得数据补足；第三种类型为不能替换机制，新产生的数据闪存块，全部的数据内容都从好几个旧的闪存块取出。第一类型最有效率，第三类型需花费最多的时间和成本。
为了使闪存有高效的使用效能，闪存中需要一个闪存转换层在闪存芯片上实现了一个虚拟块设备，主要透过映射表来把逻辑地址映射到闪存的物理地址。依照第二和第三类型的垃圾回收机制需要很快的在块中找寻有效数据，搬移到新的闪存块中。传统方法必须要把块中每一个位置读取后，比对映像表，找出是否符合映射表内容，判断有效数据或无效数据。此方式花费大量的读取时间，影响整体效率。傳統方式利用有效数据表来纪录需要垃圾回收的闪存块。但是闪存芯片制造工艺进步，单一个闪存块内的闪存页越来越多，只利用有效数据表来记录，虽然能找到最少有效数据的闪存块，但是无法精准的定义使用位置。依然要花大量的搜寻时间来找到有效数据的所在位置。
本发明提出一个关联式的闪存有效数据表，提升搜寻的效率。降低闪存垃圾回收的时间。
发明内容
本发明的目的在于提供一种关联式垃圾数据回收方法，以解决上述背景技术中提出的问题。
为实现上述目的，本发明提供如下技术方案：一种关联式垃圾数据回收方法,包括存储器控制芯片和多个闪存，所述存储器控制芯片内设有闪存指令控制装置、闪存逻辑地址映射物理地址表、闪存块有效数据表、数据缓冲区以及多个关联式闪存有效数据表，所述存储器控制芯片连接多个闪存；多个关联式闪存有效数据表包括第一关联式闪存有效数据表、第二关联式闪存有效数据表、第三关联式闪存有效数据表、第N关联式闪存有效数据表，N为大于3的整数；所述存储器控制芯片连接主机。
优选的，多个闪存包括第一闪存、第二闪存、第三闪存、第M闪存，M为大于3的整数，每个闪存有1024个块，每个块有256个页，每个页有32个扇形组合而成。
优选的，一种关联式垃圾数据回收方法，包括以下步骤：
A、从主机端收到要写入的数据信息，依照存储器控制芯片中的闪存块配置一个可以写的物理地址；
B、由闪存逻辑地址映像物理地址表中读取旧的物理地址，计算出是哪一个闪存块和闪存页，将闪存块有效数据表和关联式闪存有效数据表中对应的闪存计数器减1；
C、更新新的物理地址到闪存逻辑地址映像物理地址表中；
D、由新的物理地址算出闪存块和闪存页，将闪存块有效数据表和关联式闪存有效数据表中对应的闪存块计数器加1。
与现有技术相比，本发明的有益效果是：本发明通过关系型的闪存有效数据表，为一个闪存块划分多个区域，进而加速找到有效数据的速度。快速的找到该垃圾回收的闪存页，搬移闪存数据。大幅的缩减垃圾回收的时间。
附图说明
图1为本发明原理框图；
图2为本发明流程图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参阅图1，本发明提供一种技术方案：一种关联式垃圾数据回收方法,包括存储器控制芯片1和多个闪存，所述存储器控制芯片1内设有闪存指令控制装置2、闪存逻辑地址映射物理地址表3、闪存块有效数据表4、数据缓冲区5以及多个关联式闪存有效数据表，所述存储器控制芯片1连接多个闪存；多个关联式闪存有效数据表包括第一关联式闪存有效数据表6、第二关联式闪存有效数据表7、第三关联式闪存有效数据表8、第N关联式闪存有效数据表，N为大于3的整数；所述存储器控制芯片1连接主机9；多个闪存包括第一闪存10、第二闪存11、第三闪存12、第M闪存，M为大于3的整数，每个闪存有1024个块，每个块有256个页，每个页有32个扇形组合而成。
存储器控制芯片内有一个闪存指令控制装置，透过这个装置可以发出指令控制闪存芯片。一个用于存放数据的缓冲区，一个闪存逻辑地址映像物理地址表，纪录所有写入闪存内的地址对应关系。一份闪存块有效数据表，M份关联式闪存有效数据表，M为大于等于1的正整数，以O个闪存页为单位，O为大于1的正整数，假设把闪存块有256个闪存页，将闪存页切为四等份，每个闪存块有四份关联式闪存有效数据表，第一份为纪录0～63闪存页的有效数据，第二分代表64～127闪存页的有效数据，第三份为128～191闪存页的有效数据，最后一份为记录192～255闪存页的有效数据。每个闪存块和闪存页 有效数据表有一个计数器记录闪存区域内的有效数据，当闪存块写入一笔数据时，把对应的计数器加1，而被取代的数据所存在的闪存块计数器减1。当计数器为零时代表闪存块可以抹除再利用。
如图2所示，本发明中，一种关联式垃圾数据回收方法，包括以下步骤：
A、从主机端收到要写入的数据信息，依照存储器控制芯片中的闪存块配置一个可以写的物理地址；
B、由闪存逻辑地址映像物理地址表中读取旧的物理地址，计算出是哪一个闪存块和闪存页，将闪存块有效数据表和关联式闪存有效数据表中对应的闪存计数器减1；
C、更新新的物理地址到闪存逻辑地址映像物理地址表中；
D、由新的物理地址算出闪存块和闪存页，将闪存块有效数据表和关联式闪存有效数据表中对应的闪存块计数器加1。
当垃圾回收发生时，要从现有的闪存中挑选一个为垃圾回收的目标。透过闪存有效数据表，能迅速找到闪存块中有效数据最少的闪存块。再透过闪存页有效数据表能略过不需要搬移的闪存页区域，直接搜寻需要搬移的闪存页，搬移最少的旧数据，例如一个有256页的闪存块，拥有四个闪存页有效数据表，而闪存块里面的有效数据为闪存页3和闪存页200，传统方式必须要找到第240个闪存页后才能找到全部的有效数据位置，利用本方法可以由闪存页有效数据表查出只有第一个区块和第四个区块，只需寻找128次即可以找到需要搬移的数据。
本发明通过关系型的闪存有效数据表，为一个闪存块划分多个区域，进而加速找到有效数据的速度。快速的找到该垃圾回收的闪存页，搬移闪存数据。大幅的缩减垃圾回收的时间。
尽管已经示出和描述了本发明的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行 多种变化、修改、替换和变型，本发明的范围由所附权利要求及其等同物限定。

Claims (3)

  1. 一种关联式垃圾数据回收方法,其特征在于：包括存储器控制芯片(1)和多个闪存，所述存储器控制芯片(1)内设有闪存指令控制装置(2)、闪存逻辑地址映射物理地址表(3)、闪存块有效数据表(4)、数据缓冲区(5)以及多个关联式闪存有效数据表，所述存储器控制芯片(1)连接多个闪存；多个关联式闪存有效数据表包括第一关联式闪存有效数据表(6)、第二关联式闪存有效数据表(7)、第三关联式闪存有效数据表(8)、第N关联式闪存有效数据表，N为大于3的整数；所述存储器控制芯片(1)连接主机(9)。
  2. 根据权利要求1所述的一种关联式垃圾数据回收方法，其特征在于：多个闪存包括第一闪存(10)、第二闪存(11)、第三闪存(12)、第M闪存，M为大于3的整数，每个闪存有1024个块，每个块有256个页，每个页有32个扇形组合而成。
  3. 根据权利要求1所述的一种关联式垃圾数据回收方法，其特征在于：包括以下步骤：
    A、从主机端收到要写入的数据信息，依照存储器控制芯片中的闪存块配置一个可以写的物理地址；
    B、由闪存逻辑地址映像物理地址表中读取旧的物理地址，计算出是哪一个闪存块和闪存页，将闪存块有效数据表和关联式闪存有效数据表中对应的闪存计数器减1；
    C、更新新的物理地址到闪存逻辑地址映像物理地址表中；
    D、由新的物理地址算出闪存块和闪存页，将闪存块有效数据表和关联式闪存有效数据表中对应的闪存块计数器加1。
PCT/CN2018/105892 2018-07-20 2018-09-15 一种关联式垃圾数据回收方法 WO2020015133A1 (zh)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1728282A (zh) * 2004-07-30 2006-02-01 深圳市朗科科技有限公司 提高闪存盘数据写入速度的方法
CN101833510A (zh) * 2010-03-29 2010-09-15 清华大学 闪存ftl的地址转换方法
CN102279815A (zh) * 2010-06-13 2011-12-14 宇瞻科技股份有限公司 以快闪存储器为基础的存储装置及其数据写入方法
CN103176916A (zh) * 2013-03-07 2013-06-26 中国科学院苏州纳米技术与纳米仿生研究所 闪存及闪存的地址转换方法
CN104239229A (zh) * 2013-06-20 2014-12-24 慧荣科技股份有限公司 数据储存装置及用于快闪存储器的数据读取方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1728282A (zh) * 2004-07-30 2006-02-01 深圳市朗科科技有限公司 提高闪存盘数据写入速度的方法
CN101833510A (zh) * 2010-03-29 2010-09-15 清华大学 闪存ftl的地址转换方法
CN102279815A (zh) * 2010-06-13 2011-12-14 宇瞻科技股份有限公司 以快闪存储器为基础的存储装置及其数据写入方法
CN103176916A (zh) * 2013-03-07 2013-06-26 中国科学院苏州纳米技术与纳米仿生研究所 闪存及闪存的地址转换方法
CN104239229A (zh) * 2013-06-20 2014-12-24 慧荣科技股份有限公司 数据储存装置及用于快闪存储器的数据读取方法

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