WO2020010671A1 - 显示方法、装置以及电视机、存储介质 - Google Patents

显示方法、装置以及电视机、存储介质 Download PDF

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Publication number
WO2020010671A1
WO2020010671A1 PCT/CN2018/101741 CN2018101741W WO2020010671A1 WO 2020010671 A1 WO2020010671 A1 WO 2020010671A1 CN 2018101741 W CN2018101741 W CN 2018101741W WO 2020010671 A1 WO2020010671 A1 WO 2020010671A1
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WIPO (PCT)
Prior art keywords
video signal
signal
chip
resolution
output
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PCT/CN2018/101741
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English (en)
French (fr)
Inventor
李新
卢铁军
黄建
洪文生
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深圳创维－Rgb电子有限公司
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Application filed by 深圳创维－Rgb电子有限公司 filed Critical 深圳创维－Rgb电子有限公司
Priority to EP18925761.1A priority Critical patent/EP3751862A4/en
Priority to US16/977,910 priority patent/US10965904B2/en
Publication of WO2020010671A1 publication Critical patent/WO2020010671A1/zh

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/37—Details of the operation on graphic patterns
    • G09G5/377—Details of the operation on graphic patterns for mixing or overlaying two or more graphic patterns
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/431—Generation of visual interfaces for content selection or interaction; Content or additional data rendering
    • H04N21/4312—Generation of visual interfaces for content selection or interaction; Content or additional data rendering involving specific graphical features, e.g. screen layout, special fonts or colors, blinking icons, highlights or animations
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/391—Resolution modifying circuits, e.g. variable screen formats
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41—Structure of client; Structure of client peripherals
    • H04N21/426—Internal components of the client ; Characteristics thereof
    • H04N21/42653—Internal components of the client ; Characteristics thereof for processing graphics
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/44—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs
    • H04N21/4402—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
    • H04N21/440263—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display by altering the spatial resolution, e.g. for displaying on a connected PDA
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/44—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs
    • H04N21/4402—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
    • H04N21/440281—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream or rendering scenes according to encoded video stream scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display by altering the temporal resolution, e.g. by frame skipping
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H04N5/44504—Circuit details of the additional information generator, e.g. details of the character or graphics signal generator, overlay mixing circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/10—Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/20—Details of the management of multiple sources of image data
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/60—Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals

Definitions

  • the present invention relates to the technical field of image display processing, and in particular, to a display method, a display device, a television, and a computer-readable storage medium.
  • the TV's 8K decoding capability and back-end video processing capabilities need to be strengthened.
  • the current technology for 8K video decoding can only be processed by adding an 8K decoding chip to output HDMI or VBO format 8K video The signal is output to the back end for further processing.
  • the OSD menu on-screen
  • display screen menu-style adjustment method
  • the OSD menu can only be called up after exiting the video being played. If the OSD menu is forcibly called when playing 8K / 120Hz video, the OSD menu will have poor display and blurred edges. , Which in turn affects the user experience.
  • the main object of the present invention is a display method, a display device, a television, and a computer-readable storage medium, which are aimed at solving the technical problem of how to avoid poor display of the OSD menu screen when playing 8K resolution video.
  • the present invention provides a display method, which includes the following steps:
  • the system-on-chip SOC chip decodes the input audio and video signals and identifies the resolution corresponding to the decoded video signal
  • the video signal is a video signal with 8K resolution
  • the video signal is output to the back end for processing through the first interface
  • the on-screen menu-style adjustment OSD signal generated by the SOC chip is output to the back end through the second interface.
  • the video signal is a video signal with a resolution of 4K or 2K
  • the video signal is preprocessed and then output to the back end for processing through the second interface, and the OSD signal generated by the SOC chip is output to the rear through the first interface. End processing
  • the video signals and the OSD signals having the same signal format, resolution, and refresh rate, which are formed after the back ends are processed independently, are mixed-encoded and output to a display screen for display.
  • the first interface includes: a PCI-E interface; and the second interface includes: a VBO interface.
  • the video signal is an 8K resolution video signal
  • the video signal is output to the back end through a first interface for processing, and the on-screen menu-type adjustment mode OSD signal generated by the SOC chip is passed through the first
  • the output of the two interfaces to the back end for processing includes:
  • the SOC chip converts the video signal into a PCI-E format and outputs the video signal to an 8K decoding chip through a PCI-E interface for the 8K decoding chip to convert the video signal.
  • VBO format
  • Outputting the video signal in the VBO format obtained after the 8K decoding chip performs signal format conversion to an image processing chip for the image processing chip to perform a refresh rate improvement process on the video signal;
  • the SOC chip converts the on-screen menu-type adjustment method OSD signal generated by the SOC chip into a VBO format and outputs it to the image processing chip through a VBO interface for the image processing chip to detect
  • the OSD signal is subjected to resolution enhancement processing and refresh rate enhancement processing, respectively.
  • the video signal is a 4K resolution video signal
  • the video signal is preprocessed and then output to the back end for processing through the second interface, and the OSD signal generated by the SOC chip is passed through the first
  • the interface output to the back end for processing includes:
  • the SOC chip converts the video signal into a VBO format and outputs it to an image processing chip through a VBO interface, so that the image processing chip can improve the resolution of the video signal respectively. Processing and refresh rate improvement processing;
  • the SOC chip converts the OSD signal generated by the SOC chip into a PCI-E format and outputs it to an 8K decoding chip through a PCI-E interface, so that the 8K decoding chip can convert the OSD Signal conversion to VBO format;
  • the OSD signal in the VBO format obtained after the signal format conversion of the 8K decoding chip is output to an image processing chip for the image processing chip to perform resolution improvement processing and refresh rate improvement processing on the OSD signal, respectively.
  • the video signal is a video signal with a resolution of 2K
  • the video signal is preprocessed and then output to the back end for processing through the second interface, and the OSD signal generated by the SOC chip is passed through the first
  • the interface output to the back end for processing includes:
  • the SOC chip upgrades the video signal from a 2K resolution to a 4K resolution, converts the video signal to a VBO format, and outputs the VBO interface to an image processing chip for image processing.
  • the chip separately performs resolution improvement processing and refresh rate improvement processing on the video signal;
  • the SOC chip converts the OSD signal generated by the SOC chip into the PCI-E format and outputs it to the 8K decoding chip through the PCI-E interface for the 8K decoding chip to convert the OSD Signal conversion to VBO format;
  • the OSD signal in the VBO format obtained after the signal format conversion of the 8K decoding chip is output to an image processing chip for the image processing chip to perform resolution improvement processing and refresh rate improvement processing on the OSD signal, respectively.
  • the display method further includes:
  • the SOC chip When the SOC chip decodes the input audio and video signals, it uses one or more frames of audio and video signals as a period to segment the decoded audio signals and video signals respectively.
  • the display method further includes:
  • the SOC chip judges whether the sound played by the amplifier is synchronized with the picture displayed on the display screen based on the test results of the black and white field signals;
  • the present invention further provides a display device, the display device includes a memory, a processor, and a display program stored on the memory and executable on the processor, the display program When executed by the processor, the steps of implementing the display method according to any one of the foregoing.
  • the present invention further provides a television including an 8K decoding chip and an image processing chip, and the television further includes the display device as described above.
  • the present invention further provides a computer-readable storage medium, where the computer-readable storage medium stores a display program, and the display program is implemented as described in any one of the above when executed by a processor. Steps of the display method.
  • the OSD image is caused to be bad.
  • the signal is output separately from the video signal with a resolution of 8K or below. Specifically, if the video signal is a video signal with 8K resolution, the video signal is output to the back end for processing through the first interface, and the OSD signal generated by the SOC chip is processed.
  • the video signal is a 4K or 2K resolution video signal, preprocess the video signal and then output to the back end for processing through the second interface, and OSD signals generated by the SOC chip Output to the back end for processing through the first interface; finally, the video signals with the same signal format, resolution, and refresh rate that are formed after the back end are processed independently are mixed-encoded with the OSD signal and output to the display for display Therefore, while ensuring the normal display of the video image, the normal display of the OSD image is realized, and the user experience is improved.
  • FIG. 1 is a schematic structural diagram of a device hardware operating environment involved in a solution of an embodiment of a display device according to the present invention
  • FIG. 2 is a schematic diagram of performing MEMC compensation processing in an embodiment of a display method of the present invention
  • FIG. 3 is a schematic flowchart of an embodiment of a display method according to the present invention.
  • FIG. 4 is a schematic flowchart of processing a 8K-resolution video signal and an OSD signal in an embodiment of a display method according to the present invention
  • FIG. 5 is a schematic flowchart of processing a 4K or 2K resolution video signal and an OSD signal in an embodiment of a display method according to the present invention
  • FIG. 6 is a schematic diagram of synchronous processing of audio and video signals in an embodiment of a display method of the present invention.
  • the invention provides a display device.
  • FIG. 1 is a schematic structural diagram of a hardware operating environment of a device according to an embodiment of a display device according to the present invention.
  • the display device of the present invention is specifically applied to a television.
  • the display device may include a processor 1001, such as a CPU.
  • the display device of the present invention is applied to a television. Therefore, the processor 1001 is preferably a SOC chip (System-on-a-Chip).
  • SOC chip System-on-a-Chip
  • a system-on-chip, also known as a system-on-chip, is an integrated circuit with a dedicated target, which contains the entire system and the entire contents of the embedded software.
  • the display device may further include a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005.
  • the communication bus 1002 is used to implement connection and communication between these components.
  • the user interface 1003 may include a display, an input unit such as a keyboard, and the optional user interface 1003 may further include a standard wired interface and a wireless interface.
  • the network interface 1004 may optionally include a standard wired interface and a wireless interface (such as a WI-FI interface).
  • the memory 1005 may be a high-speed RAM memory or a non-volatile memory. memory), such as disk storage.
  • the memory 1005 may optionally be a storage device independent of the foregoing processor 1001. It should be noted that the processor 1001 is installed in the display device by using an embedded chip method.
  • FIG. 1 does not constitute a limitation on the display device, and may include more or fewer components than shown in the figure, or some components may be combined, or different components. Layout.
  • the memory 1005 as a computer-readable storage medium may include an operating system, a network communication module, a user interface module, and a display program.
  • the operating system is a program that manages and controls the display device and software resources, and supports the operation of the network communication module, user interface module, display program, and other programs or software;
  • the network communication module is used to manage and control the network interface 1004;
  • the user interface module Used to manage and control the user interface 1003.
  • the network interface 1004 is mainly used to connect to the background of the system and perform data communication with the system background;
  • the user interface 1003 is mainly used to connect to the client (user) and perform data communication with the client;
  • the display device calls the display program stored in the memory 1005 through the processor 1001 and performs the following operations:
  • the video signal is a video signal with 8K resolution
  • the video signal is output to the back end for processing through the first interface
  • the on-screen menu-style adjustment OSD signal generated by the SOC chip is output to the back end through the second interface.
  • the video signal is a video signal with a resolution of 4K or 2K
  • the video signal is preprocessed and then output to the back end for processing through the second interface, and the OSD signal generated by the SOC chip is output to the rear through the first interface. End processing
  • the video signals and the OSD signals having the same signal format, resolution, and refresh rate, which are formed after the back ends are processed independently, are mixed-encoded and output to a display screen for display.
  • the first interface includes a PCI-E interface
  • the second interface includes a VBO interface
  • the display device calls the display program stored in the memory 1005 through the processor 1001 and further performs the following operations:
  • the video signal is a video signal with 8K resolution
  • the video signal is converted into a PCI-E format and then output to an 8K decoding chip through a PCI-E interface for the 8K decoding chip to convert the video signal into a VBO. format;
  • Outputting the video signal in the VBO format obtained after the 8K decoding chip performs signal format conversion to an image processing chip for the image processing chip to perform a refresh rate improvement process on the video signal;
  • the on-screen menu-type adjustment OSD signal generated by the SOC chip is converted into a VBO format and then output to the image processing chip through a VBO interface, so that the image processing chip can respond to the OSD signal. Perform resolution enhancement processing and refresh rate enhancement processing separately.
  • the display device calling the display program stored in the memory 1005 through the processor 1001 also performs the following operations:
  • the video signal is a video signal with a resolution of 4K
  • the video signal is converted into a VBO format and then output to an image processing chip through a VBO interface, so that the image processing chip may perform resolution enhancement processing on the video signal and Refresh rate improvement processing;
  • the OSD signal generated by the SOC chip is converted into a PCI-E format and then output to an 8K decoding chip through a PCI-E interface for the 8K decoding chip to convert the OSD signal.
  • VBO format
  • the OSD signal in the VBO format obtained after the signal format conversion of the 8K decoding chip is output to an image processing chip for the image processing chip to perform resolution improvement processing and refresh rate improvement processing on the OSD signal, respectively.
  • the display device calling the display program stored in the memory 1005 through the processor 1001 also performs the following operations:
  • the video signal is a video signal with a resolution of 2K
  • the video signal is upgraded from a 2K resolution to a 4K resolution, and is converted to a VBO format and then output to an image processing chip through a VBO interface for the image processing chip pair.
  • the video signal is separately subjected to resolution enhancement processing and refresh rate enhancement processing;
  • the OSD signal generated by the SOC chip is converted into a PCI-E format and then output to an 8K decoding chip through a PCI-E interface for the 8K decoding chip to convert the OSD signal.
  • VBO format
  • the OSD signal in the VBO format obtained after the signal format conversion of the 8K decoding chip is output to an image processing chip for the image processing chip to perform resolution improvement processing and refresh rate improvement processing on the OSD signal, respectively.
  • the display device calling the display program stored in the memory 1005 through the processor 1001 also performs the following operations:
  • the display device calling the display program stored in the memory 1005 through the processor 1001 also performs the following operations:
  • the invention also provides a television.
  • the television of this embodiment supports 8K resolution and 120Hz refresh rate video playback. Because existing video sources are usually 2K, 4K, or 8K resolution and 60Hz refresh rate, in order to decode 8K resolution video and To improve the resolution and refresh rate of video playback, the television set of this embodiment includes an 8K decoding chip and an image processing chip.
  • the 8K video decoding technology can only process 8K video signals in the HDMI or VBO format by adding an 8K decoding chip.
  • 8K ultra-high-definition display screens have been developed on the hardware, but in software, the existing video sources are usually 2K or 4K. Even if there are 8K resolution video sources, the refresh rate is only only 60Hz, which in turn affects the viewing experience of users on 8K ultra-high-definition display screens. Therefore, it is necessary to improve the resolution and refresh rate of the existing video source through an image processing chip.
  • Scaler actually changes the horizontal and vertical resolution of the image to make the video content suitable for the display resolution.
  • the common solution to increase the 60Hz video signal to 120Hz video signal is to add a MEMC chip at the back end of the 60Hz output signal (Motion Estimate and Motion Compensation, motion estimation and motion compensation) to improve the display frame rate.
  • the function of the MEMC chip is to use a dynamic image system to perform motion estimation based on two or more images, and add a frame of motion compensation between the traditional two frames through a specific pin algorithm, thereby improving the 60Hz refresh rate. 120Hz.
  • the OSD menu In the prior art, it is usually impossible to call up the OSD menu at the same time when playing 8K / 120Hz video.
  • the OSD menu can only be called after exiting the currently playing video. If the OSD menu is forcibly called when playing 8K / 120Hz video, then The OSD menu may have poor display and blurred edges, which will affect the user experience.
  • the television uses the display device to separate and output the OSD signal from a video signal with a resolution of 8K or below, thereby avoiding the OSD signal being mixed with a video signal with a resolution of 8K or below 8K and output to the back-end processing Bad OSD image.
  • the 8K decoding chip, the image processing chip, and the display device can communicate with each other, send or receive control instructions.
  • the SOC chip sends system control signals to the 8K decoding chip and image processing chip, respectively, so as to control the 8K.
  • the decoding chip and image processing chip process video signals and OSD signals.
  • the OSD signal is mixed with 4K or 8K video signals and processed again at the back end, such as FRC processing by the back-end MEMC chip (increasing the refresh rate).
  • FRC processing by the back-end MEMC chip (increasing the refresh rate).
  • the OSD menu is opened, the OSD picture is also At the same time, it is processed by the MEMC chip for FRC, which causes the problem of bad OSD images.
  • the bad problem of the OSD image can be explained by the example shown in Figure 2.
  • the video frame ball in the first frame of motion is in the A position
  • the video frame ball in the second frame of motion is in the B position.
  • the pin algorithm adds a frame of motion compensation between the first and second images.
  • the position of the ball displayed in the picture is the C position.
  • MEMC technology is to process the video signal of the entire picture.
  • the OSD menu interface is called when the OSD menu interface is mostly a still image.
  • the OSD menu interface also participates in the processing of the MEMC motion algorithm. Therefore, the OSD image will be processed together at this time. It is jagged, which affects the user viewing experience.
  • FIG. 3 is a schematic flowchart of an embodiment of a display method according to the present invention.
  • the display method includes the following steps:
  • Step S10 The system-on-chip SOC chip decodes the input audio and video signals, and identifies the resolution corresponding to the decoded video signal;
  • audio and video signals can be input to the SOC chip for processing through HDMI, USB, Internet, and other methods.
  • the SOC chip has at least two signal output channels.
  • 8K video decoding can only be processed by adding an 8K decoding chip, it can output 8K video signals in HDMI or VBO format, that is, for 8K resolution video signals, it can only be output by connecting the 8K decoding chip. Channel for output.
  • the SOC chip decodes the input audio and video signals, it is necessary to first identify the resolution corresponding to the decoded video signal, and then determine the corresponding signal output channel (output interface) based on the resolution.
  • the resolution of the video signal may be specifically determined based on a coding mode or a coding parameter of the video signal.
  • step S20 if the video signal is a video signal with 8K resolution, the video signal is output to the back end through the first interface for processing, and the on-screen menu-type adjustment OSD signal generated by the SOC chip is output through the second interface. Go to the backend for processing;
  • the 8K decoding chip needs to be connected to the signal output channel to output the 8K resolution video signal to the 8K decoding chip.
  • the back-end module performs processing, such as performing signal format conversion and improving the refresh rate of the video signal.
  • step S30 if the video signal is a video signal with a resolution of 4K or 2K, the video signal is preprocessed and then output to the back end for processing through the second interface, and the OSD signal generated by the SOC chip is passed through the first interface. Output to the backend for processing;
  • the currently decoded video signal is a video signal with a resolution of 4K or 2K, that is, 8K decoding is not required. Therefore, it can be output to a back end for processing through a commonly used signal transmission channel.
  • preprocessing is required, such as performing signal format conversion and improving the resolution of the video signal.
  • a 4K or 2K resolution video signal is preferably preprocessed and then output to the back end for processing through the second interface, and an OSD signal is output to the back end for processing through the first interface.
  • step S40 the video signals with the same signal format, resolution, and refresh rate, which are formed after the back-end processes are processed independently, are mixed-encoded with the OSD signals and output to a display screen for display.
  • the video signal and the OSD signal are output separately on the SOC chip side and are processed separately at the back end, the video signal and the OSD signal must be mixed on the back end before being output to the display screen for display. coding.
  • the video signal and the OSD signal after the back end final processing preferably have the same signal format, the same resolution, and the same refresh rate.
  • the video signal and the OSD signal are both VBO signal format, 8K resolution, and 120Hz refresh. rate.
  • the OSD signal is output separately from a video signal with a resolution of 8K or below. Specifically, if the video signal is a video signal with a resolution of 8K, the video signal is output to the back end through the first interface for processing, and the OSD generated by the SOC chip is processed.
  • the signal is output to the back end for processing through the second interface; if the video signal is a video signal with 4K or 2K resolution, the video signal is pre-processed and then output to the back end for processing through the second interface and the OSD generated by the SOC chip The signal is output to the back end for processing through the first interface; finally, the video signals with the same signal format, resolution, and refresh rate formed by the back end are processed independently and mixed with the OSD signal and output to the display screen for processing. Display, so as to ensure the normal display of the video image, while achieving the normal display of the OSD image, improving the user experience.
  • the present invention is not limited to the types of the first interface and the second interface in the foregoing embodiments, and is specifically set according to actual needs.
  • the first interface is a PCI-E interface, a VGA interface, a DVI interface, an HDMI interface, and the like
  • a second interface is a VBO interface, an IBO interface, a VAO interface, and the like.
  • the first embodiment is specifically a PCI-E interface and the second interface is a VBO interface, and the foregoing embodiment is described in detail.
  • Example 1 Processing of 8K resolution video signals and OSD signals
  • the SOC chip converts the video signal to the PCI-E format
  • the SOC chip outputs the video signal in the PCI-E format to the 8K decoding chip through the PCI-E interface;
  • the SOC chip controls the 8K decoding chip to convert the video signal to VBO format
  • the SOC chip outputs the video signal in the VBO format to the image processing chip for the image processing chip to perform a refresh rate improvement process on the video signal.
  • the SOC chip when a signal with 8K resolution is input, the SOC chip decodes and recognizes the input signal with 8K resolution and separates the audio and video. After the audio signal is processed by the SOC chip, it is output in I2S format through audio coding. Audio signals, while video signals are converted to PCI-E format and output directly to the 8K decoding chip. After receiving the 8K code stream, the 8K decoding chip performs decoding and format conversion, and outputs 8K @ 60Hz , VBO format video signal. This signal is decoded by the image processing chip to perform the MEMC refresh rate improvement processing, and then converted into a 8K @ 120Hz, VBO format video signal.
  • the SOC chip converts the OSD signal generated by the SOC chip into a VBO format
  • the SOC chip outputs the OSD signal in VBO format to the image processing chip through the VBO interface;
  • the SOC chip controls the image processing chip to perform resolution enhancement processing and refresh rate enhancement processing on the OSD signal, respectively.
  • the SOC chip when the SOC chip decodes the input signal, it has been judged that the received input signal is an 8K resolution signal. Therefore, after the SOC chip converts the OSD signal generated by itself into a VBO format, it outputs 4K @ 60Hz through the VBO interface.
  • the OSD signal of the VBO protocol This signal then enters the image processing chip, is decoded in the image processing chip, and is scaled with resolution enhancement and MEMC refresh rate, converted to 8K @ 120Hz,
  • the OSD signal in VBO format is finally mixed with the video signal of 8K @ 120Hz and VBO format that has undergone the MEMC refresh rate enhancement processing and output to the display at the same time. Situation, thereby realizing the normal display of the OSD image.
  • the 8K decoding chip and the image processing chip are controlled by the SOC chip to make corresponding processing functions.
  • Embodiment 2 Processing of 4K resolution video signals and OSD signals
  • the SOC chip converts the video signal to VBO format
  • the SOC chip outputs the video signal in VBO format to the image processing chip through the VBO interface;
  • the SOC chip controls the image processing chip to perform resolution enhancement processing and refresh rate enhancement processing on the video signal, respectively.
  • the SOC chip decodes and recognizes the 4K resolution input signal and separates it from audio and video. After the audio signal is processed by the SOC chip, it is output in I2S format through audio coding. audio signal.
  • SOC chip directly decodes video signals and outputs 4K @ 60Hz, VBO format video signals after video encoding; 4K @ 60Hz
  • the resolution is improved by the scaler function in the image processing chip (that is, 4K to 8K), and the output is 8K @ 60Hz , VBO format video signal, this signal is then motion-frame compensated by the MEMC function in the image processing chip, thereby increasing the refresh rate from 60Hz to 120Hz.
  • the SOC chip converts the OSD signal generated by the SOC chip into the PCI-E format
  • SOC chip outputs PCI-E format OSD signal to 8K decoding chip through PCI-E interface;
  • the SOC chip controls the 8K decoding chip to convert the OSD signal to VBO format
  • the SOC chip outputs the OSD signal in the VBO format obtained by the signal format conversion of the 8K decoding chip to the image processing chip;
  • the SOC chip controls the image processing chip to perform resolution enhancement processing and refresh rate enhancement processing on the OSD signal, respectively.
  • the SOC chip when the SOC chip has decoded the input signal, it has determined that the received input signal is a 4K resolution signal. Therefore, the SOC chip converts the OSD signal generated by itself into the PCI-E format and then passes the PCI-E interface. Output to 8K decoding chip, then output 4K @ 60Hz after signal conversion by 8K decoding chip The OSD signal of the VBO protocol. This signal is then entered into the image processing chip to decode and increase the resolution of the scaler and the refresh rate of the MEMC. Then it is converted to 8K @ 120Hz, The OSD signal in VBO format is finally mixed with the video signal of 8K @ 120Hz and VBO format that has undergone the MEMC refresh rate enhancement processing and output to the display at the same time. Situation, thereby realizing the normal display of the OSD image. In this process, the 8K decoding chip and the image processing chip are controlled by the SOC chip to make corresponding processing functions.
  • Embodiment 3 Processing of 2K Resolution Video Signals and OSD Signals
  • the SOC chip improves the video signal from 2K resolution to 4K resolution and converts it to VBO format
  • the SOC chip outputs the video signal in VBO format to the image processing chip through the VBO interface;
  • the SOC chip controls the image processing chip to perform resolution enhancement processing and refresh rate enhancement processing on the video signal, respectively.
  • the SOC chip decodes and recognizes the 2K resolution input signal and separates it from audio and video. After the audio signal is processed by the SOC chip, it is output in I2S format through audio coding. audio signal.
  • the SOC chip decodes a 2K resolution video signal
  • the 2K resolution is increased to 4K resolution
  • the video signal of 4K @ 60Hz and VBO format is output through video encoding;
  • 4K @ 60Hz After the video signal in VBO format is decoded in the image processing chip, the resolution is improved by the scaler function in the image processing chip (that is, 4K to 8K), and the output is 8K @ 60Hz , VBO format video signal, this signal is then motion-frame compensated by the MEMC function in the image processing chip, thereby increasing the refresh rate from 60Hz to 120Hz.
  • the SOC chip converts the OSD signal generated by the SOC chip into the PCI-E format
  • SOC chip outputs PCI-E format OSD signal to 8K decoding chip through PCI-E interface;
  • the SOC chip controls the 8K decoding chip to convert the OSD signal to VBO format
  • the SOC chip outputs the OSD signal in the VBO format obtained by the signal format conversion of the 8K decoding chip to the image processing chip;
  • the SOC chip controls the image processing chip to perform resolution enhancement processing and refresh rate enhancement processing on the OSD signal, respectively.
  • the SOC chip when the SOC chip has decoded the input signal, it has determined that the received input signal is a 2K resolution signal. Therefore, the SOC chip converts the OSD signal generated by itself into the PCI-E format and passes the PCI-E interface. Output to 8K decoding chip, then output 4K @ 60Hz after signal conversion by 8K decoding chip The OSD signal of the VBO protocol. This signal is then entered into the image processing chip to decode and increase the resolution of the scaler and the refresh rate of the MEMC. Then it is converted to 8K @ 120Hz, The OSD signal in VBO format is finally mixed with the video signal of 8K @ 120Hz and VBO format that has undergone the MEMC refresh rate enhancement processing and output to the display at the same time. Situation, thereby realizing the normal display of the OSD image. In this process, the 8K decoding chip and the image processing chip are controlled by the SOC chip to make corresponding processing functions.
  • the separated video signal is output, and the separated audio signal is encoded and output.
  • the 8K video signal is processed due to the large amount of data. It takes more time, which will cause the output sound and the picture to be out of sync.
  • the present invention also provides a method for synchronizing audio and video.
  • the specific implementation process is as follows:
  • the SOC chip When the SOC chip decodes the input audio and video signals, it uses one or more frames of audio and video signals as a period to segment the decoded audio signals and video signals respectively.
  • the audio signal Before outputting the video signal to the display screen for display, based on the segmentation marks of the audio signal and the video signal, the audio signal is output to the amplifier for playback and the video signal is output to the display screen for display.
  • the audio signal and the video signal are output, and the input signal of each frame or multiple frames is used to segment the audio signal and the video.
  • the signal is segmented, and the segmented audio signal is re-encoded and stored to wait for the entire processing process of the segmented video signal to be completed, and then the SOC chip is notified, and the segmented mark is used as the synchronization reference.
  • the segmented video signal and the stored segmented audio signal are output synchronously, thereby achieving the purpose of outputting audio signals and video signals simultaneously.
  • the audio signal is delayed after being processed by the power amplifier, and the video signal is delayed after being displayed on the screen, if the delay time of the two is different, there will still be a problem that the audio and video are not synchronized.
  • this embodiment provides the following implementation manners, including the following processes:
  • the SOC chip judges whether the sound played by the power amplifier is synchronized with the picture displayed on the display screen based on the test results of the black and white field signals;
  • the SOC chip can determine whether the sound played by the power amplifier is synchronized with the picture displayed on the display screen based on the test of the black and white field signals (assuming that there is sound in the white field and no sound in the black field).
  • the audio and video synchronization at the back end must be achieved by adjusting the audio or video signal at the front end. Specifically, based on the segmentation marks of the audio signal and the video signal, the output time of the audio signal or the video signal can be adjusted, and the output can be synchronized after the adjustment is completed, so as to achieve the purpose of synchronizing the audio and video of the television.
  • the time difference between sound playback and screen display can be determined first, and then the output time of the audio signal or video signal can be adjusted based on the time difference to keep the sound played by the amplifier and the screen displayed on the display screen.
  • the delay time T1 of the audio signal after being processed by the power amplifier is 0.3 seconds
  • the delay time T2 of the video signal after being displayed by the screen is 0.7 seconds, that is, the screen display has a lag relative to the sound playback, and the lag time is 0.4 seconds, so You need to adjust the time difference of the audio or video signal output.
  • the segmentation mark (equivalent to the time stamp) of the audio signal and the video signal, and delay the output time of the audio signal by 0.4 seconds.
  • the other is to refer to the minutes of the audio signal and the video signal.
  • the segment mark advances the output time of the video signal by 0.4 seconds, so as to achieve the purpose of synchronizing the audio and video on the TV side.
  • the invention also provides a computer-readable storage medium.
  • a display program is stored on a computer-readable storage medium, and when the display program is executed by a processor, the steps of the display method described in any one of the foregoing embodiments are implemented.
  • the methods in the above embodiments can be implemented by means of software plus a necessary universal hardware platform, and of course, also by hardware, but in many cases the former is better.
  • Implementation. Based on such an understanding, the technical solution of the present invention in essence or part that contributes to the existing technology can be embodied in the form of a software product.
  • the computer software product is stored in a storage medium (such as ROM / RAM), including Several instructions are used to cause a terminal (which may be a mobile phone, a computer, a television, a server, or a network device, etc.) to execute the methods described in the embodiments of the present invention.

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Abstract

本发明公开了一种显示方法，包括以下步骤：SOC芯片解码输入的音视频信号，并识别解码得到的视频信号对应的分辨率；若为8K分辨率的视频信号，则将视频信号通过第一接口输出至后端进行处理、将OSD信号通过第二接口输出至后端进行处理；若为4K或2K分辨率的视频信号，则对视频信号进行预处理后通过第二接口输出至后端进行处理、将OSD信号通过第一接口输出至后端进行处理；将后端分别独立进行处理后所形成的具有相同信号格式、分辨率、刷新率的视频信号与OSD信号进行混合编码并输出至显示屏进行显示。本发明还公开了一种显示装置、电视机及计算机可读存储介质。本发明提升了视频播放时OSD画面的显示效果。

Description

显示方法、装置以及电视机、存储介质
技术领域
本发明涉及图像显示处理技术领域，尤其涉及一种显示方法、显示装置、电视机及计算机可读存储介质。
背景技术
随着电视机及显示领域的发展和人们对影音体验要求的不断提升，未来的显示产品会朝向更大尺寸和更高清分辨率的方向发展，在同样的屏幕分辨率下随着尺寸的不断增大，像素点也随之增大，观看时清晰度随之变差。目前主流的显示屏分辨率为2K(1920*1080)和4K（3840*2160），当随着显示屏尺寸不断增大后，即便是4K分辨率的屏幕，一定距离观看也会感到很强的颗粒感，影响观看体验，因此，8K（7680*4320）分辨率的显示屏会是未来的发展方向。
但随着显示清晰度的提高，电视机对8K解码能力及后端视频处理能力还有待加强，目前现技术对8K视频解码只能通过外加8K解码芯片处理，才能输出HDMI或VBO格式的8K视频信号输出给后端做进一步处理，现有技术通常在播放8K/120Hz视频的时候是无法同时调出OSD菜单（on-screen display，屏幕菜单式调节方式）的，只有退出正在播放的视频后才能调出OSD菜单，如果在播放8K/120Hz视频的时候强行调出OSD菜单，那么OSD菜单会存在显示不良、边缘模糊等情况，进而影响用户体验。
发明内容
本发明的主要目的在于一种显示方法、显示装置、电视机及计算机可读存储介质，旨在解决如何在播放8K分辨率的视频时避免OSD菜单画面显示不良的技术问题。
为实现上述目的，本发明提供一种显示方法，所述显示方法包括以下步骤：
片上系统SOC芯片解码输入的音视频信号，并识别解码得到的视频信号对应的分辨率；
若所述视频信号为8K分辨率的视频信号，则将所述视频信号通过第一接口输出至后端进行处理、将SOC芯片产生的屏幕菜单式调节方式OSD信号通过第二接口输出至后端进行处理；
若所述视频信号为4K或2K分辨率的视频信号，则对所述视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理；
将后端分别独立进行处理后所形成的具有相同信号格式、分辨率、刷新率的所述视频信号与所述OSD信号进行混合编码并输出至显示屏进行显示。
可选地，所述第一接口包括：PCI-E接口；所述第二接口包括：VBO接口。
可选地，所述若所述视频信号为8K分辨率的视频信号，则将所述视频信号通过第一接口输出至后端进行处理、将SOC芯片产生的屏幕菜单式调节方式OSD信号通过第二接口输出至后端进行处理包括：
若所述视频信号为8K分辨率的视频信号，则SOC芯片将所述视频信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述视频信号转换为VBO格式；
将8K解码芯片进行信号格式转换后得到的VBO格式的所述视频信号输出至图像处理芯片，以供图像处理芯片对所述视频信号进行刷新率提升处理；
若所述视频信号为8K分辨率的视频信号，则SOC芯片将SOC芯片产生的屏幕菜单式调节方式OSD信号转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
可选地，所述若所述视频信号为4K分辨率的视频信号，则对所述视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理包括：
若所述视频信号为4K分辨率的视频信号，则SOC芯片将所述视频信号转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述视频信号分别进行分辨率提升处理与刷新率提升处理；
若所述视频信号为4K分辨率的视频信号，则SOC芯片将SOC芯片产生的OSD信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述OSD信号转换为VBO格式；
将8K解码芯片进行信号格式转换后得到的VBO格式的所述OSD信号输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
可选地，所述若所述视频信号为2K分辨率的视频信号，则对所述视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理包括：
若所述视频信号为2K分辨率的视频信号，则SOC芯片将所述视频信号从2K分辨率提升为4K分辨率，并转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述视频信号分别进行分辨率提升处理与刷新率提升处理；
若所述视频信号为2K分辨率的视频信号，则SOC芯片将SOC芯片产生的OSD信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述OSD信号转换为VBO格式；
将8K解码芯片进行信号格式转换后得到的VBO格式的所述OSD信号输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
可选地，所述显示方法还包括：
SOC芯片在解码输入的音视频信号时，以一帧或多帧音视频信号为周期进行分段，以对解码后的音频信号和视频信号分别进行分段标记；
在将所述视频信号输出至显示屏进行显示之前，基于所述音频信号与所述视频信号的分段标记，同步将所述音频信号输出至功放进行播放、将所述视频信号输出至显示屏进行显示。
可选地，所述显示方法还包括：
SOC芯片基于黑白场信号测试结果，判断功放播放的声音与显示屏显示的画面是否同步；
若不同步，则基于所述音频信号与所述视频信号的分段标记，调整所述音频信号或所述视频信号的输出时间，以使功放播放的声音与显示屏显示的画面保持同步。
进一步地，为实现上述目的，本发明还提供一种显示装置，所述显示装置包括存储器、处理器以及存储在所述存储器上并可在所述处理器上运行的显示程序，所述显示程序被所述处理器执行时实现如上述任一项所述的显示方法的步骤。
进一步地，为实现上述目的，本发明还提供一种电视机，包括8K解码芯片、图像处理芯片，所述电视机还包括如上所述的显示装置。
进一步地，为实现上述目的，本发明还提供一种计算机可读存储介质，所述计算机可读存储介质上存储有显示程序，所述显示程序被处理器执行时实现如上述任一项所述的显示方法的步骤。
本发明中，当解码得到8K或8K以下分辨率的视频信号时，为防止OSD信号在与8K或8K以下分辨率的视频信号混合输出至后端处理时导致OSD图像不良问题，因此，将OSD信号与8K或8K以下分辨率的视频信号分离输出，具体为：若视频信号为8K分辨率的视频信号，则将视频信号通过第一接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第二接口输出至后端进行处理；若视频信号为4K或2K分辨率的视频信号，则对视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理；最后再将后端分别独立进行处理后所形成的具有相同信号格式、分辨率、刷新率的视频信号与OSD信号进行混合编码并输出至显示屏进行显示，从而在保证视频图像正常显示的同时，实现OSD图像的正常显示，提升了用户使用体验。
附图说明
图1为本发明显示装置实施例方案涉及的设备硬件运行环境的结构示意图；
图2为本发明显示方法一实施例中进行MEMC补偿处理示意图；
图3为本发明显示方法一实施例的流程示意图；
图4为本发明显示方法一实施例中8K分辨率的视频信号与OSD信号的处理流程示意图；
图5为本发明显示方法一实施例中4K或2K分辨率的视频信号与OSD信号的处理流程示意图；
图6为本发明显示方法一实施例中音视频信号同步处理示意图。
本发明目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
应当理解，此处所描述的具体实施例仅用以解释本发明，并不用于限定本发明。
本发明提供一种显示装置。
参照图1，图1为本发明显示装置实施例方案涉及的设备硬件运行环境的结构示意图。
本发明的显示装置具体应用于电视机。
如图1所示，显示装置可以包括：处理器1001，例如CPU，本发明显示装置应用于电视机，因此，处理器1001优选为SOC芯片（System-on-a-Chip），SOC芯片称为系统级芯片，也称片上系统，是一种有专用目标的集成电路，其中包含有完整系统并有嵌入软件的全部内容。
此外，显示装置还可以包括：通信总线1002、用户接口1003，网络接口1004，存储器1005。其中，通信总线1002用于实现这些组件之间的连接通信。用户接口1003可以包括显示屏（Display）、输入单元比如键盘（Keyboard），可选用户接口1003还可以包括标准的有线接口、无线接口。网络接口1004可选的可以包括标准的有线接口、无线接口（如WI-FI接口）。存储器1005可以是高速RAM存储器，也可以是稳定的存储器（non-volatile memory），例如磁盘存储器。存储器1005可选的还可以是独立于前述处理器1001的存储设备。需要说明的是，处理器1001采用嵌入式芯片方式安装在显示装置内。
本领域技术人员可以理解，图1中示出的显示装置的硬件结构并不构成对显示装置的限定，可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置。
如图1所示，作为一种计算机可读存储介质的存储器1005中可以包括操作系统、网络通信模块、用户接口模块以及显示程序。其中，操作系统是管理和控制显示装置与软件资源的程序，支持网络通信模块、用户接口模块、显示程序以及其他程序或软件的运行；网络通信模块用于管理和控制网络接口1004；用户接口模块用于管理和控制用户接口1003。
在图1所示的显示装置硬件结构中，网络接口1004主要用于连接系统后台，与系统后台进行数据通信；用户接口1003主要用于连接客户端（用户端），与客户端进行数据通信；显示装置通过处理器1001调用存储器1005中存储的显示程序，并执行以下操作：
解码输入的音视频信号，并识别解码得到的视频信号对应的分辨率；
若所述视频信号为8K分辨率的视频信号，则将所述视频信号通过第一接口输出至后端进行处理、将SOC芯片产生的屏幕菜单式调节方式OSD信号通过第二接口输出至后端进行处理；
若所述视频信号为4K或2K分辨率的视频信号，则对所述视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理；
将后端分别独立进行处理后所形成的具有相同信号格式、分辨率、刷新率的所述视频信号与所述OSD信号进行混合编码并输出至显示屏进行显示。
进一步地，所述第一接口包括：PCI-E接口；所述第二接口包括：VBO接口；显示装置通过处理器1001调用存储器1005中存储的显示程序还执行以下操作：
若所述视频信号为8K分辨率的视频信号，则将所述视频信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述视频信号转换为VBO格式；
将8K解码芯片进行信号格式转换后得到的VBO格式的所述视频信号输出至图像处理芯片，以供图像处理芯片对所述视频信号进行刷新率提升处理；
若所述视频信号为8K分辨率的视频信号，则将SOC芯片产生的屏幕菜单式调节方式OSD信号转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
进一步地，显示装置通过处理器1001调用存储器1005中存储的显示程序还执行以下操作：
若所述视频信号为4K分辨率的视频信号，则将所述视频信号转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述视频信号分别进行分辨率提升处理与刷新率提升处理；
若所述视频信号为4K分辨率的视频信号，则将SOC芯片产生的OSD信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述OSD信号转换为VBO格式；
将8K解码芯片进行信号格式转换后得到的VBO格式的所述OSD信号输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
进一步地，显示装置通过处理器1001调用存储器1005中存储的显示程序还执行以下操作：
若所述视频信号为2K分辨率的视频信号，则将所述视频信号从2K分辨率提升为4K分辨率，并转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述视频信号分别进行分辨率提升处理与刷新率提升处理；
若所述视频信号为2K分辨率的视频信号，则将SOC芯片产生的OSD信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述OSD信号转换为VBO格式；
将8K解码芯片进行信号格式转换后得到的VBO格式的所述OSD信号输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
进一步地，显示装置通过处理器1001调用存储器1005中存储的显示程序还执行以下操作：
在解码输入的音视频信号时，以一帧或多帧音视频信号为周期进行分段，以对解码后的音频信号和视频信号分别进行分段标记；
在将所述视频信号输出至显示屏进行显示之前，基于所述音频信号与所述视频信号的分段标记，同步将所述音频信号输出至功放进行播放、将所述视频信号输出至显示屏进行显示。
进一步地，显示装置通过处理器1001调用存储器1005中存储的显示程序还执行以下操作：
基于黑白场信号测试结果，判断功放播放的声音与显示屏显示的画面是否同步；
若不同步，则基于所述音频信号与所述视频信号的分段标记，调整所述音频信号或所述视频信号的输出时间，以使功放播放的声音与显示屏显示的画面保持同步。
本发明还提供一种电视机。
本实施例的电视机支持8K分辨率和120Hz刷新率的视频播放，由于现有视频源通常都是2K、4K或8K分辨率以及60Hz刷新率，因此，为实现对8K分辨率视频的解码以及提升播放视频的分辨率及刷新率，本实施例的电视机包含有8K解码芯片以及图像处理芯片。
（1）8K解码芯片
目前现技术对8K视频解码只能通过外加8K解码芯片处理，才能输出HDMI或VBO格式的8K视频信号。
（2）图像处理芯片
随着技术的发展，硬件上已经研发出了8K超高清显示屏幕，但软件上，现有的视频源通常都是2K或4K，即使存在8K分辨率的视频源，但其刷新率也仅仅只有60Hz，进而影响了用户在8K超高清显示屏幕上的观看体验。因此，需要通过图像处理芯片，提升现有视频源的分辨率以及刷新率。
目前，将2K分辨率提升到4K、将4K分辨率提升到8K的通常解决方案为通过Scaler显示处理芯片，完成图像的拉伸或者压缩。Scaler实际上是通过改变图像的水平和垂直分辨率，以使视频内容适合于显示屏分辨率。
目前，将60Hz视频信号提升到120Hz视频信号的通常解决方案为在60Hz输出信号后端加MEMC芯片（Motion Estimate and Motion Compensation，运动估计和运动补偿）来提高显示画面帧率。MEMC芯片的功能是采用动态影像系统，根据两帧或两帧以上图像进行运动估计，通过特定的插针算法在传统的两帧图像之间加插一帧运动补偿帧，从而将60Hz刷新率提升为120Hz。
（3）显示装置
现有技术通常在播放8K/120Hz视频的时候是无法同时调出OSD菜单的，只有退出正在播放的视频后才能调出OSD菜单，如果在播放8K/120Hz视频的时候强行调出OSD菜单，那么OSD菜单会存在显示不良、边缘模糊等情况，进而影响用户体验。
本实施例中电视机通过显示装置，将OSD信号与8K或8K以下分辨率的视频信号分离输出，从而避免了OSD信号在与8K或8K以下分辨率的视频信号混合输出至后端处理时导致OSD图像不良的问题。
本实施例中，8K解码芯片、图像处理芯片和显示装置（包括SOC芯片）可以互相通信、发送或接收控制指令，比如SOC芯片向8K解码芯片、图像处理芯片分别发送系统控制信号，从而控制8K解码芯片、图像处理芯片对视频信号和OSD信号进行处理。
基于上述本发明显示装置实施例方案涉及的设备硬件运行环境以及电视机的功能模块，提出本发明的显示方法的以下各实施例。
通常情况下OSD信号在与4K或8K视频信号混合输出并在后端再次对视频信号进行处理，比如被后端的MEMC芯片做FRC处理（提升刷新率），当OSD菜单打开后，由于OSD画面也同时被MEMC芯片做FRC处理，进而导致OSD图像出现不良的问题。
OSD图像的不良问题可以通过如图2所示的例子进行解释，图2中第一帧运动的视频画面小球在A位置，第二帧运动的视频画面小球在B位置，通过MEMC特定的插针算法在第一帧和第二帧图像之间加插一帧运动补偿帧，此时小球在画面中显示的位置为C位置，MEMC技术是对整个画面的视频信号进行处理，如果此时调用OSD菜单界面，由于OSD菜单界面多是静止的图像，此时OSD菜单界面也参与了MEMC运动算法处理，因而这时候OSD图像会被连带处理，OSD菜单界面也直观表现为图像边缘抖动、有锯齿感，进而影响用户观看体验。
参照图3，图3为本发明显示方法一实施例的流程示意图。为解决OSD图像显示不良的问题，本实施例中，所述显示方法包括以下步骤：
步骤S10，片上系统SOC芯片解码输入的音视频信号，并识别解码得到的视频信号对应的分辨率；
本实施例中，音视频信号可通过HDMI、USB、Internet等方式输入SOC芯片进行处理。为实现视频信号与OSD信号的分离输出，SOC芯片至少存在两条信号输出通道。
由于目前现有技术对8K视频解码只能通过外加8K解码芯片进行处理，才能输出HDMI或VBO格式的8K视频信号，也即对于8K分辨率的视频信号，只能通过连接8K解码芯片的信号输出通道进行输出。
因此，SOC芯片解码输入的音视频信号时，需要先识别解码得到的视频信号对应的分辨率，进而基于分辨率，确定对应的信号输出通道（输出接口）。其中，视频信号的分辨率具体可基于视频信号的编码方式或编码参数进行确定。
步骤S20，若所述视频信号为8K分辨率的视频信号，则将所述视频信号通过第一接口输出至后端进行处理、将SOC芯片产生的屏幕菜单式调节方式OSD信号通过第二接口输出至后端进行处理；
本实施例中，如果当前解码得到的视频信号为8K分辨率的视频信号，也即需要通过连接8K解码芯片的信号输出通道，将该8K分辨率的视频信号输出至包括8K解码芯片在内的后端模块进行处理，比如进行信号格式转换、提升该视频信号的刷新率等处理。
本实施例中优选将8K分辨率的视频信号通过第一接口输出至后端进行处理，而将OSD信号通过第二接口输出至后端进行处理，其中，第一接口连接8K解码芯片。
步骤S30，若所述视频信号为4K或2K分辨率的视频信号，则对所述视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理；
本实施例中，如果当前解码得到的视频信号为4K或2K分辨率的视频信号，也即无需进行8K解码，因此，可通过常用的信号传输通道输出至后端进行处理。此外，在将4K或2K分辨率的视频信号输出至后端处理之前，还需进行预处理，比如进行信号格式转换、提升视频信号的分辨率等处理。
本实施例中优选将4K或2K分辨率的视频信号进行预处理后通过第二接口输出至后端进行处理，而将OSD信号通过第一接口输出至后端进行处理。
步骤S40，将后端分别独立进行处理后所形成的具有相同信号格式、分辨率、刷新率的所述视频信号与所述OSD信号进行混合编码并输出至显示屏进行显示。
本实施例中，由于视频信号与OSD信号在SOC芯片端为分离输出，同时在后端分别独立处理，因此，在输出至显示屏进行显示之前，后端还需将视频信号与OSD信号进行混合编码。
本实施例中，经过后端最终处理后的视频信号与OSD信号优选具有相同信号格式、相同分辨率以及相同刷新率，比如，视频信号与OSD信号都为VBO信号格式、8K分辨率以及120Hz刷新率。
本实施例中，当解码得到8K或8K以下分辨率的视频信号时，为防止OSD信号在与8K或8K以下分辨率的视频信号混合输出至后端处理时导致OSD图像不良问题，因此，将OSD信号与8K或8K以下分辨率的视频信号分离输出，具体为：若视频信号为8K分辨率的视频信号，则将视频信号通过第一接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第二接口输出至后端进行处理；若视频信号为4K或2K分辨率的视频信号，则对视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理；最后再将后端分别独立进行处理后所形成的具有相同信号格式、分辨率、刷新率的视频信号与OSD信号进行混合编码并输出至显示屏进行显示，从而在保证视频图像正常显示的同时，实现OSD图像的正常显示，提升了用户使用体验。
本发明对于上述实施例中的第一接口与第二接口的类型不限，具体根据实际需要进行设置。例如，第一接口为PCI-E接口、VGA接口、DVI接口、HDMI接口等，第二接口为VBO接口、IBO接口、VAO接口等。
为便于理解本发明的显示方法，下面具体以第一接口为PCI-E接口，第二接口为VBO接口，对上述实施例进行详细说明。
实施例一：8K分辨率的视频信号与OSD信号的处理
1、 8K分辨率的视频信号的处理流程
1.1、SOC芯片将视频信号转换为PCI-E格式；
1.2、SOC芯片将PCI-E格式的视频信号通过PCI-E接口输出至8K解码芯片；
1.3、SOC芯片控制8K解码芯片将视频信号转换为VBO格式；
1.4、SOC芯片将VBO格式的视频信号输出至图像处理芯片，以供图像处理芯片对视频信号进行刷新率提升处理。
如图4所示，当8K分辨率的信号输入时，SOC芯片对8K分辨率的输入信号进行解码识别后，对其进行音画分离，音频信号经过SOC芯片处理后通过音频编码输出I2S格式的音频信号，而视频信号转为PCI-E格式后直接输出至8K解码芯片，8K解码芯片接收8K码流后，进行解码、格式转换等处理，输出8K@60Hz 、VBO格式的视频信号，此信号经过图像处理芯片解码进行MEMC刷新率提升处理后，转换成8K@120Hz、VBO格式的视频信号。
2、OSD信号的处理流程
2.1、SOC芯片将SOC芯片产生的OSD信号转换为VBO格式；
2.2、SOC芯片将VBO格式的OSD信号通过VBO接口输出至图像处理芯片；
2.3、SOC芯片控制图像处理芯片对OSD信号分别进行分辨率提升处理与刷新率提升处理。
如图4所示，由于在SOC芯片解码输入信号的时候已判断接收的输入信号为8K分辨率信号，因此，SOC芯片将自身产生的OSD信号转换为VBO格式后，通过VBO接口输出4K@60Hz VBO协议的OSD信号，此信号再进入图像处理芯片，在图像处理芯片中解码并进行scaler分辨率提升以及MEMC刷新率提升后，转换为8K@120Hz、 VBO格式的OSD信号，最后再与经过MEMC刷新率提升处理后的8K@120Hz、VBO格式的视频信号进行视频编码混合处理并同时输出给显示屏，从而达到避免OSD信号经过MEMC处理后产生图像不良情况，从而实现OSD图像的正常显示。此过程中8K解码芯片和图像处理芯片通过SOC芯片控制以做出相应的处理功能。
实施例二：4K分辨率的视频信号与OSD信号的处理
1、 4K分辨率的视频信号的处理流程
1.1、SOC芯片将视频信号转换为VBO格式；
1.2、SOC芯片将VBO格式的视频信号通过VBO接口输出至图像处理芯片；
1.3、SOC芯片控制图像处理芯片对视频信号分别进行分辨率提升处理与刷新率提升处理。
如图5所示，当4K分辨率的信号输入时，SOC芯片对4K分辨率的输入信号进行解码识别后，对其进行音画分离，音频信号经过SOC芯片处理后通过音频编码输出I2S格式的音频信号。SOC芯片对视频信号直接解码并通过视频编码后输出4K@60Hz、VBO格式的视频信号；4K@60Hz 、VBO格式的视频信号在图像处理芯片中解码后，通过图像处理芯片中的scaler功能对其进行分辨率提升（即4K转8K），输出8K@60Hz 、VBO格式的视频信号，此信号再通过图像处理芯片中的MEMC功能对其进行运动帧补偿，从而将刷新率从60Hz提升为120Hz。
2、OSD信号的处理流程
2.1、SOC芯片将SOC芯片产生的OSD信号转换为PCI-E格式；
2.2、SOC芯片将PCI-E格式的OSD信号通过PCI-E接口输出至8K解码芯片；
2.3、SOC芯片控制8K解码芯片将OSD信号转换为VBO格式；
2.4、SOC芯片将8K解码芯片进行信号格式转换后得到的VBO格式的OSD信号输出至图像处理芯片；
2.5、SOC芯片控制图像处理芯片对OSD信号分别进行分辨率提升处理与刷新率提升处理。
如图5所示，由于在SOC芯片解码输入信号的时候已判断接收的输入信号为4K分辨率信号，因此，SOC芯片将自身产生的OSD信号转换为PCI-E格式后，通过PCI-E接口输出至8K解码芯片，再经过8K解码芯片进行信号转换后输出4K@60Hz VBO协议的OSD信号，此信号再进入图像处理芯片解码并做scaler分辨率提升以及MEMC刷新率提升后，转换为8K@120Hz、 VBO格式的OSD信号，最后再与经过MEMC刷新率提升处理后的8K@120Hz、VBO格式的视频信号进行视频编码混合处理并同时输出给显示屏，从而达到避免OSD信号经过MEMC处理后产生图像不良情况，从而实现OSD图像的正常显示。此过程中8K解码芯片和图像处理芯片通过SOC芯片控制以做出相应的处理功能。
实施例三：2K分辨率的视频信号与OSD信号的处理
1、 2K分辨率的视频信号的处理流程
1.1、SOC芯片将视频信号从2K分辨率提升为4K分辨率，并转换为VBO格式；
1.2、SOC芯片将VBO格式的视频信号通过VBO接口输出至图像处理芯片；
1.3、SOC芯片控制图像处理芯片对视频信号分别进行分辨率提升处理与刷新率提升处理。
如图5所示，当2K分辨率的信号输入时，SOC芯片对2K分辨率的输入信号进行解码识别后，对其进行音画分离，音频信号经过SOC芯片处理后通过音频编码输出I2S格式的音频信号。SOC芯片对2K分辨率视频信号进行解码时，将2K分辨率提升为4K分辨率后，再通过视频编码输出4K@60Hz、VBO格式的视频信号；4K@60Hz 、VBO格式的视频信号在图像处理芯片中解码后，通过图像处理芯片中的scaler功能对其进行分辨率提升（即4K转8K），输出8K@60Hz 、VBO格式的视频信号，此信号再通过图像处理芯片中的MEMC功能对其进行运动帧补偿，从而将刷新率从60Hz提升为120Hz。
2、OSD信号的处理流程
2.1、SOC芯片将SOC芯片产生的OSD信号转换为PCI-E格式；
2.2、SOC芯片将PCI-E格式的OSD信号通过PCI-E接口输出至8K解码芯片；
2.3、SOC芯片控制8K解码芯片将OSD信号转换为VBO格式；
2.4、SOC芯片将8K解码芯片进行信号格式转换后得到的VBO格式的OSD信号输出至图像处理芯片；
2.5、SOC芯片控制图像处理芯片对OSD信号分别进行分辨率提升处理与刷新率提升处理。
如图5所示，由于在SOC芯片解码输入信号的时候已判断接收的输入信号为2K分辨率信号，因此，SOC芯片将自身产生的OSD信号转换为PCI-E格式后，通过PCI-E接口输出至8K解码芯片，再经过8K解码芯片进行信号转换后输出4K@60Hz VBO协议的OSD信号，此信号再进入图像处理芯片解码并做scaler分辨率提升以及MEMC刷新率提升后，转换为8K@120Hz、 VBO格式的OSD信号，最后再与经过MEMC刷新率提升处理后的8K@120Hz、VBO格式的视频信号进行视频编码混合处理并同时输出给显示屏，从而达到避免OSD信号经过MEMC处理后产生图像不良情况，从而实现OSD图像的正常显示。此过程中8K解码芯片和图像处理芯片通过SOC芯片控制以做出相应的处理功能。
进一步地，在上述实施例中，在SOC芯片对视频信号进行解码的过程中，将分离出的视频信号输出，同时将分离出的音频信号进行编码输出，8K视频信号由于数据量大，处理过程需要较多的时间，因而会导致输出声音和画面不同步的问题。
为解决上述问题，本发明还提供一种音画同步方法，具体实现过程如下：
（1）SOC芯片在解码输入的音视频信号时，以一帧或多帧音视频信号为周期进行分段，以对解码后的音频信号和视频信号分别进行分段标记；
（2）在将视频信号输出至显示屏进行显示之前，基于音频信号与视频信号的分段标记，同步将音频信号输出至功放进行播放、将视频信号输出至显示屏进行显示。
如图6所示，输入信号（也即音视频信号）被SOC芯片解码后输出音频信号及视频信号，并以每一帧或多帧的输入信号为周期进行分段，进而对音频信号和视频信号进行分段标记，被分段标记的音频信号进行重新编码后进行存储，以等待被分段标记的视频信号的整个处理流程完成后，再通知SOC芯片，以分段标记为同步基准，将分段标记的视频信号和存储的分段标记的音频信号进行同步输出，进而达到音频信号和视频信号同步输出的目的。
进一步可选的，由于音频信号经过功放处理后会有延迟，而视频信号经过屏体显示后也会有延迟，如果二者延迟时间不同，则仍然会存在声画不同步的问题。
因此，为解决该问题，本实施例提供以下实现方式，包括以下流程：
（1）SOC芯片基于黑白场信号测试结果，判断功放播放的声音与显示屏显示的画面是否同步；
（2）若不同步，则基于音频信号与视频信号的分段标记，调整音频信号或视频信号的输出时间，以使功放播放的声音与显示屏显示的画面保持同步；
（3）同步将音频信号输出至功放进行播放、将视频信号输出至显示屏进行显示。
本实例中，SOC芯片可基于黑白场信号（假定白场有声音，黑场没有声音）的测试，判断功放播放的声音与显示屏显示的画面是否同步。
若功放播放的声音与显示屏显示的画面不同步，则需要在前端通过调整音频信号或视频信号来实现后端的音画同步。具体可基于音频信号与视频信号的分段标记，调整音频信号或视频信号的输出时间，调整完成后再同步输出，从而达到电视机端音画同步的目的。
本实施例中，既可以通过先确定声音播放与画面显示之间的时间差，然后再基于该时间差调整音频信号或视频信号的输出时间的方式，来使功放播放的声音与显示屏显示的画面保持同步，也可以通过不断微调音频信号或视频信号的输出时间，并通过多次黑白场信号测试的方式，来使功放播放的声音与显示屏显示的画面保持同步。
例如，音频信号经过功放处理后的延迟时长T1为0.3秒，而视频信号经过屏体显示后的延迟时长T2为0.7秒，也即画面显示相对于声音播放存在滞后，滞后时间为0.4秒，因此需要对音频信号或视频信号的输出进行时间差调整。
调整时间差的方式有两种，一种是参照音频信号与视频信号的分段标记（相当于时间戳），将音频信号的输出时间延迟0.4秒；另一种是参照音频信号与视频信号的分段标记，将视频信号的输出时间提前0.4秒，从而实现电视机端音画同步的目的。
本发明还提供一种计算机可读存储介质。
本实施例中，计算机可读存储介质上存储有显示程序，所述显示程序被处理器执行时实现如上述任一项实施例中所述的显示方法的步骤。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到上述实施例方法可借助软件加必需的通用硬件平台的方式来实现，当然也可以通过硬件，但很多情况下前者是更佳的实施方式。基于这样的理解，本发明的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质（如ROM/RAM）中，包括若干指令用以使得一台终端（可以是手机，计算机，电视机、服务器或者网络设备等）执行本发明各个实施例所述的方法。
上面结合附图对本发明的实施例进行了描述，但是本发明并不局限于上述的具体实施方式，上述的具体实施方式仅仅是示意性的，而不是限制性的，本领域的普通技术人员在本发明的启示下，在不脱离本发明宗旨和权利要求所保护的范围情况下，还可做出很多形式，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，这些均属于本发明的保护之内。

Claims (20)

  1. 一种显示方法，其特征在于，所述显示方法包括以下步骤：
    片上系统SOC芯片解码输入的音视频信号，并识别解码得到的视频信号对应的分辨率；
    若所述视频信号为8K分辨率的视频信号，则将所述视频信号通过第一接口输出至后端进行处理、将SOC芯片产生的屏幕菜单式调节方式OSD信号通过第二接口输出至后端进行处理；
    若所述视频信号为4K或2K分辨率的视频信号，则对所述视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理；
    将后端分别独立进行处理后所形成的具有相同信号格式、分辨率、刷新率的所述视频信号与所述OSD信号进行混合编码并输出至显示屏进行显示。
  2. 如权利要求1所述的显示方法，其特征在于，所述第一接口包括：PCI-E接口；所述第二接口包括：VBO接口。
  3. 如权利要求2所述的显示方法，其特征在于，所述若所述视频信号为8K分辨率的视频信号，则将所述视频信号通过第一接口输出至后端进行处理、将SOC芯片产生的屏幕菜单式调节方式OSD信号通过第二接口输出至后端进行处理包括：
    若所述视频信号为8K分辨率的视频信号，则SOC芯片将所述视频信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述视频信号转换为VBO格式；
    将8K解码芯片进行信号格式转换后得到的VBO格式的所述视频信号输出至图像处理芯片，以供图像处理芯片对所述视频信号进行刷新率提升处理；
    若所述视频信号为8K分辨率的视频信号，则SOC芯片将SOC芯片产生的屏幕菜单式调节方式OSD信号转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
  4. 如权利要求2所述的显示方法，其特征在于，所述若所述视频信号为4K分辨率的视频信号，则对所述视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理包括：
    若所述视频信号为4K分辨率的视频信号，则SOC芯片将所述视频信号转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述视频信号分别进行分辨率提升处理与刷新率提升处理；
    若所述视频信号为4K分辨率的视频信号，则SOC芯片将SOC芯片产生的OSD信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述OSD信号转换为VBO格式；
    将8K解码芯片进行信号格式转换后得到的VBO格式的所述OSD信号输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
  5. 如权利要求2所述的显示方法，其特征在于，所述若所述视频信号为2K分辨率的视频信号，则对所述视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理包括：
    若所述视频信号为2K分辨率的视频信号，则SOC芯片将所述视频信号从2K分辨率提升为4K分辨率，并转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述视频信号分别进行分辨率提升处理与刷新率提升处理；
    若所述视频信号为2K分辨率的视频信号，则SOC芯片将SOC芯片产生的OSD信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述OSD信号转换为VBO格式；
    将8K解码芯片进行信号格式转换后得到的VBO格式的所述OSD信号输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
  6. 如权利要求1所述的显示方法，其特征在于，所述显示方法还包括：
    SOC芯片在解码输入的音视频信号时，以一帧或多帧音视频信号为周期进行分段，以对解码后的音频信号和视频信号分别进行分段标记；
    在将所述视频信号输出至显示屏进行显示之前，基于所述音频信号与所述视频信号的分段标记，同步将所述音频信号输出至功放进行播放、将所述视频信号输出至显示屏进行显示。
  7. 如权利要求3所述的显示方法，其特征在于，所述显示方法还包括：
    SOC芯片在解码输入的音视频信号时，以一帧或多帧音视频信号为周期进行分段，以对解码后的音频信号和视频信号分别进行分段标记；
    在将所述视频信号输出至显示屏进行显示之前，基于所述音频信号与所述视频信号的分段标记，同步将所述音频信号输出至功放进行播放、将所述视频信号输出至显示屏进行显示。
  8. 如权利要求4所述的显示方法，其特征在于，所述显示方法还包括：
    SOC芯片在解码输入的音视频信号时，以一帧或多帧音视频信号为周期进行分段，以对解码后的音频信号和视频信号分别进行分段标记；
    在将所述视频信号输出至显示屏进行显示之前，基于所述音频信号与所述视频信号的分段标记，同步将所述音频信号输出至功放进行播放、将所述视频信号输出至显示屏进行显示。
  9. 如权利要求5所述的显示方法，其特征在于，所述显示方法还包括：
    SOC芯片在解码输入的音视频信号时，以一帧或多帧音视频信号为周期进行分段，以对解码后的音频信号和视频信号分别进行分段标记；
    在将所述视频信号输出至显示屏进行显示之前，基于所述音频信号与所述视频信号的分段标记，同步将所述音频信号输出至功放进行播放、将所述视频信号输出至显示屏进行显示。
  10. 如权利要求6所述的显示方法，其特征在于，所述显示方法还包括：
    SOC芯片基于黑白场信号测试结果，判断功放播放的声音与显示屏显示的画面是否同步；
    若不同步，则基于所述音频信号与所述视频信号的分段标记，调整所述音频信号或所述视频信号的输出时间，以使功放播放的声音与显示屏显示的画面保持同步。
  11. 一种显示装置，其特征在于，所述显示装置包括存储器、处理器以及存储在所述存储器上并可在所述处理器上运行的显示程序，所述显示程序被所述处理器执行时，实现以下步骤：
    解码输入的音视频信号，并识别解码得到的视频信号对应的分辨率；
    若所述视频信号为8K分辨率的视频信号，则将所述视频信号通过第一接口输出至后端进行处理、将SOC芯片产生的屏幕菜单式调节方式OSD信号通过第二接口输出至后端进行处理；
    若所述视频信号为4K或2K分辨率的视频信号，则对所述视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理；
    将后端分别独立进行处理后所形成的具有相同信号格式、分辨率、刷新率的所述视频信号与所述OSD信号进行混合编码并输出至显示屏进行显示。
  12. 如权利要求11所述的显示装置，其特征在于，所述显示程序被所述处理器执行时，还实现以下步骤：
    若所述视频信号为8K分辨率的视频信号，则将所述视频信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述视频信号转换为VBO格式；
    将8K解码芯片进行信号格式转换后得到的VBO格式的所述视频信号输出至图像处理芯片，以供图像处理芯片对所述视频信号进行刷新率提升处理；
    若所述视频信号为8K分辨率的视频信号，则将SOC芯片产生的屏幕菜单式调节方式OSD信号转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
  13. 如权利要求11所述的显示装置，其特征在于，所述显示程序被所述处理器执行时，还实现以下步骤：
    若所述视频信号为4K分辨率的视频信号，则将所述视频信号转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述视频信号分别进行分辨率提升处理与刷新率提升处理；
    若所述视频信号为4K分辨率的视频信号，则将SOC芯片产生的OSD信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述OSD信号转换为VBO格式；
    将8K解码芯片进行信号格式转换后得到的VBO格式的所述OSD信号输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
  14. 如权利要求11所述的显示装置，其特征在于，所述显示程序被所述处理器执行时，还实现以下步骤：
    若所述视频信号为2K分辨率的视频信号，则将所述视频信号从2K分辨率提升为4K分辨率，并转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述视频信号分别进行分辨率提升处理与刷新率提升处理；
    若所述视频信号为2K分辨率的视频信号，则将SOC芯片产生的OSD信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述OSD信号转换为VBO格式；
    将8K解码芯片进行信号格式转换后得到的VBO格式的所述OSD信号输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
  15. 如权利要求11所述的显示装置，其特征在于，所述显示程序被所述处理器执行时，还实现以下步骤：
    在解码输入的音视频信号时，以一帧或多帧音视频信号为周期进行分段，以对解码后的音频信号和视频信号分别进行分段标记；
    在将所述视频信号输出至显示屏进行显示之前，基于所述音频信号与所述视频信号的分段标记，同步将所述音频信号输出至功放进行播放、将所述视频信号输出至显示屏进行显示。
  16. 一种电视机，包括8K解码芯片、图像处理芯片，其特征在于，所述电视机还包括权利要求11所述的显示装置。
  17. 一种计算机可读存储介质，其特征在于，所述计算机可读存储介质上存储有显示程序，所述显示程序被处理器执行时，实现以下步骤：
    解码输入的音视频信号，并识别解码得到的视频信号对应的分辨率；
    若所述视频信号为8K分辨率的视频信号，则将所述视频信号通过第一接口输出至后端进行处理、将SOC芯片产生的屏幕菜单式调节方式OSD信号通过第二接口输出至后端进行处理；
    若所述视频信号为4K或2K分辨率的视频信号，则对所述视频信号进行预处理后通过第二接口输出至后端进行处理、将SOC芯片产生的OSD信号通过第一接口输出至后端进行处理；
    将后端分别独立进行处理后所形成的具有相同信号格式、分辨率、刷新率的所述视频信号与所述OSD信号进行混合编码并输出至显示屏进行显示。
  18. 如权利要求17所述的计算机可读存储介质，其特征在于，所述显示程序被处理器执行时，还实现以下步骤：
    若所述视频信号为8K分辨率的视频信号，则将所述视频信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述视频信号转换为VBO格式；
    将8K解码芯片进行信号格式转换后得到的VBO格式的所述视频信号输出至图像处理芯片，以供图像处理芯片对所述视频信号进行刷新率提升处理；
    若所述视频信号为8K分辨率的视频信号，则将SOC芯片产生的屏幕菜单式调节方式OSD信号转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
  19. 如权利要求17所述的计算机可读存储介质，其特征在于，所述显示程序被处理器执行时，还实现以下步骤：
    若所述视频信号为4K分辨率的视频信号，则将所述视频信号转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述视频信号分别进行分辨率提升处理与刷新率提升处理；
    若所述视频信号为4K分辨率的视频信号，则将SOC芯片产生的OSD信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述OSD信号转换为VBO格式；
    将8K解码芯片进行信号格式转换后得到的VBO格式的所述OSD信号输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
  20. 如权利要求17所述的计算机可读存储介质，其特征在于，所述显示程序被处理器执行时，还实现以下步骤：
    若所述视频信号为2K分辨率的视频信号，则将所述视频信号从2K分辨率提升为4K分辨率，并转换为VBO格式后通过VBO接口输出至图像处理芯片，以供图像处理芯片对所述视频信号分别进行分辨率提升处理与刷新率提升处理；
    若所述视频信号为2K分辨率的视频信号，则将SOC芯片产生的OSD信号转换为PCI-E格式后通过PCI-E接口输出至8K解码芯片，以供8K解码芯片将所述OSD信号转换为VBO格式；
    将8K解码芯片进行信号格式转换后得到的VBO格式的所述OSD信号输出至图像处理芯片，以供图像处理芯片对所述OSD信号分别进行分辨率提升处理与刷新率提升处理。
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