WO2020000945A1 - 一种nvme背板点灯控制方法、系统、介质及设备 - Google Patents

一种nvme背板点灯控制方法、系统、介质及设备 Download PDF

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Publication number
WO2020000945A1
WO2020000945A1 PCT/CN2018/123470 CN2018123470W WO2020000945A1 WO 2020000945 A1 WO2020000945 A1 WO 2020000945A1 CN 2018123470 W CN2018123470 W CN 2018123470W WO 2020000945 A1 WO2020000945 A1 WO 2020000945A1
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target
nvme
vpp
backplane
address
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PCT/CN2018/123470
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English (en)
French (fr)
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宁辰
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郑州云海信息技术有限公司
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Priority to US16/493,289 priority Critical patent/US11438987B2/en
Publication of WO2020000945A1 publication Critical patent/WO2020000945A1/zh

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3003Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3037Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B15/00Systems controlled by a computer
    • G05B15/02Systems controlled by a computer electric
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3055Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/32Monitoring with visual or acoustical indication of the functioning of the machine
    • G06F11/324Display of status information
    • G06F11/325Display of status information by lamps or LED's
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/10Controlling the light source
    • H05B47/175Controlling the light source by remote control

Definitions

  • the present invention relates to the technical field of servers, and in particular, to a method, a system, a medium, and a device for controlling NVME back panel lighting.
  • NVME Virtual PinPort
  • NVME Non-Volatile Memory Express
  • NVME Protocol Non-Volatile Memory Express
  • an object of the present invention is to provide a method, a system, a medium, and a device for controlling an NVME back panel lighting, so as to reduce the complexity of lighting the NVME back panel.
  • the specific scheme is as follows:
  • An NVME backplane lighting control method applied to a motherboard includes:
  • VPP addresses corresponding to all NVME backplanes connected to the motherboard;
  • the process of running the target code to parse the target VPP signal further includes:
  • the method further includes:
  • the method further includes:
  • the abnormal information of the target NVME backplane is recorded in a log.
  • the process of issuing the target VPP address to a target NVME backplane corresponding to the target VPP address to light the target NVME backplane includes:
  • the step of determining whether the NVME hard disk is in a running state, and after obtaining the determination result the method further includes:
  • the operation is stopped.
  • an NVME back panel lighting control system which is applied to a motherboard and includes:
  • a code running module is configured to run a target code to parse the target VPP signal when a target VPP signal is received, wherein the target code is a code added to the motherboard in advance, and the target code VPP addresses corresponding to all NVME backplanes connected to the mainboard are stored therein;
  • a signal analysis module configured to parse the target VPP signal to obtain a target VPP address corresponding to the target VPP signal
  • a backplane lighting module is configured to deliver the target VPP address to a target NVME backplane corresponding to the target VPP address, so as to light up the target NVME backplane.
  • the back panel lighting module includes:
  • Hard disk detection unit which is used to test all NVME hard disks corresponding to the NVME backplane
  • a state judging unit configured to judge whether the NVME hard disk is in a running state and obtain a judgment result
  • a link determining unit configured to determine a communication link of an NVME backplane corresponding to the target VPP address according to the judgment result and the target VPP address;
  • a backplane lighting unit is configured to use the communication link to deliver the target VPP address to a target NVME backplane corresponding to the target VPP address, so as to light up the target NVME backplane.
  • the present invention also discloses a computer-readable storage medium.
  • a computer program is stored on the computer-readable storage medium.
  • the computer program is executed by a processor, the NVME backplane lighting control as disclosed above is implemented. Method steps.
  • an NVME back panel lighting control device including:
  • a processor configured to implement the steps of a method for controlling an NVME backplane lighting as disclosed above when the computer program is executed.
  • the present invention by adding target codes of corresponding functions in the motherboard, that is, storing VPP addresses corresponding to all NVME backplanes connected to the motherboard in the target code, when the motherboard receives the target VPP signal, You can analyze the target VPP address corresponding to the target VPP signal by running the target code, and then use the target VPP address obtained by the analysis to control the corresponding NVME backplane for lighting operations, thereby achieving 1 VPP signal to multiple NVME backplanes.
  • the board performs lighting.
  • an additional modification of the NVME backplane is likely to cause the wrong version of the NVME backplane.
  • the method of the present invention can reduce the complexity of lighting the backplane.
  • the NVME back panel lighting control system, medium and equipment disclosed in the present invention also have the above-mentioned beneficial effects.
  • FIG. 1 is a schematic diagram of lighting an NVME backplane in the prior art
  • FIG. 2 is another schematic diagram of lighting an NVME backplane in the prior art
  • FIG. 3 is a flowchart of a method for controlling an NVME back panel lighting according to an embodiment of the present invention
  • FIG. 4 is a schematic diagram of lighting an NVME backplane according to an embodiment of the present invention.
  • FIG. 5 is a flowchart of another NVME back panel lighting control method according to an embodiment of the present invention.
  • FIG. 6 is a structural diagram of an NVME back panel lighting control system according to an embodiment of the present invention.
  • FIG. 7 is a structural diagram of an NVME back panel lighting control device according to an embodiment of the present invention.
  • An embodiment of the present invention discloses a method for controlling the lighting of an NVME backplane. As shown in FIG. 3, the method includes:
  • Step S11 when the target VPP signal is received, run the target code to parse the target VPP signal;
  • the target code is a code added to the main board in advance, and the target code stores VPP addresses corresponding to all NVME backplanes connected to the main board;
  • Step S12 Parse the target VPP signal to obtain a target VPP address corresponding to the target VPP signal
  • Step S13 Deliver the target VPP address to the target NVME backplane corresponding to the target VPP address to light up the target NVME backplane.
  • the target code of the corresponding function is first added on the motherboard, that is, the target code stores the VPP addresses corresponding to all NVME backplanes connected to the motherboard. Then, When the motherboard receives the target VPP signal, it can parse the target VPP signal to determine the target VPP address of the NVME backplane contained in the target VPP signal that needs to be lit. When the motherboard obtains the target VPP address corresponding to the target VPP signal by running the target code added to the motherboard in advance, the target VPP address can be sent to the target NVME backplane corresponding to the target VPP address to control The target NVME backplane lights up.
  • this embodiment provides a schematic diagram of lighting the NVME backplane.
  • the target VPP signal can be analyzed.
  • the motherboard CPLD Compplex Programmable Logic Device
  • the motherboard CPLD By analyzing the target VPP signal to determine which backplane the target VPP signal is lighting; when the motherboard CPLD is acting as the master, it can send the parsed target VPP signal to the corresponding NVME back that needs to be lit board. And finally realize the use of one VPP signal to light the multi-channel NVME backplane.
  • the correspondence between the VPP address and the NVME backplane has been implemented in the motherboard CPLD code.
  • the VPP communication path is controlled by the motherboard CPLD. Therefore, the NVME backplane does not require multiple CPLD versions and does not need to use a dial switch to distinguish the NVME backplane.
  • the address of the board also avoids the maintenance difficulties caused by multiple versions.
  • the method in this embodiment realizes the lighting operation of multiple NVME backplanes operated by a single VPP, which not only fulfills different requirements for different application scenarios, but also because of its simple method and strong scalability, Provides better solutions for subsequent product solutions.
  • this embodiment further describes and optimizes the technical solution. Specifically, after the above step S11: when the target VPP signal is received, the process of running the target code to parse the target VPP signal further includes:
  • the motherboard receives the target VPP signal
  • the target VPP signal is parsed by using the target code previously added to the motherboard chip CPLD. If the VPP address corresponding to the target VPP signal is not resolved during the process of parsing the target VPP signal, it indicates that this operation is abnormal. At this time, the operation needs to be stopped to reduce the consumption of system resources.
  • this embodiment further describes and optimizes the technical solution.
  • the above step S13 send the target VPP address to the target NVME backplane corresponding to the target VPP address, so as to target the NVME backplane. After the lighting process, it also includes:
  • the target VPP address when the target VPP address is delivered to the target NVME backplane corresponding to the target VPP address, under normal circumstances, the target NVME backplane will realize the lighting operation, but if the target NVME backplane is not illuminated , It means that the target NVME backplane has an abnormal situation. Then, in this case, an alarm message can be issued to prompt the maintenance personnel to detect and repair the target NVME backplane.
  • the alarm information may be a voice alarm, a light alarm, or other forms of alarms, which are not specifically limited here.
  • this embodiment further describes and optimizes the technical solution.
  • the above step S13 send the target VPP address to the target NVME backplane corresponding to the target VPP address, so as to target the NVME backplane. After the lighting process, it also includes:
  • the target NVME backplane has not been lit, it means that the target NVME backplane is abnormal.
  • the abnormal information of the target NVME backplane can be recorded in the log, so that maintenance personnel can use the information recorded in the log Repair the NVME backplane.
  • this embodiment further optimizes and explains the previous embodiment.
  • the above step S13 the target VPP address is sent to the target NVME back corresponding to the target VPP address.
  • Board to light the target NVME backplane including:
  • Step S131 detecting the NVME hard disks corresponding to all the NVME backplanes
  • Step S132 determine whether the NVME hard disk is in a running state and obtain a judgment result
  • Step S133 Determine a communication link of the NVME backplane corresponding to the target VPP address according to the judgment result and the target VPP address;
  • Step S134 Use the communication link to send the target VPP address to the target NVME backplane corresponding to the target VPP address, so as to light the target NVME backplane.
  • the target VPP address can be sent to the target NVME backplane corresponding to the target VPP address to perform the target NVME backplane. Light up.
  • the motherboard will detect the NVME hard drives in all NVME backplanes. Obviously, the purpose of this operation is to determine whether the NVME hard drive is running. Status so that in the subsequent process steps, the target VPP address is used to determine the communication link of the NVME backplane corresponding to the target VPP address among the NVME hard disks in the running state, that is, the target link is determined according to the judgment result The communication link of the NVME backplane corresponding to the VPP address.
  • the communication link can be used to send the target VPP address to the target NVME backplane corresponding to the target VPP address through a preset transmission format, and finally realize Lighting operation on the target NVME backplane.
  • step S132 judging whether the NVME hard disk is in a running state, and after obtaining the judgment result, the method further includes:
  • the operation is stopped.
  • the present invention also discloses an NVME back panel lighting control system.
  • the system includes:
  • the code running module 31 is configured to run the target code to analyze the target VPP signal when the target VPP signal is received, wherein the target code is a code added to the main board in advance, and the target code stores a code connected to the main board.
  • the signal analysis module 32 is configured to parse the target VPP signal to obtain a target VPP address corresponding to the target VPP signal;
  • the backplane lighting module 33 is configured to deliver the target VPP address to the target NVME backplane corresponding to the target VPP address, so as to light the target NVME backplane.
  • the system further includes:
  • An operation stopping module configured to run the target code when the target VPP signal is received, and after the process of parsing the target VPP signal, if the VPP address corresponding to the target VPP signal is not parsed, then Stop operation.
  • the system further includes:
  • the system further includes:
  • the log recording module is used to send the target VPP address to the target NVME backplane corresponding to the target VPP address to perform the lighting process on the target NVME backplane. If the target NVME backplane is not turned on, the target backplane is The abnormal information of the board is recorded in the log.
  • the back panel lighting module includes:
  • Hard disk detection unit which is used to test all NVME hard disks corresponding to the NVME backplane
  • a state judging unit for judging whether the NVME hard disk is in a running state and obtaining a judgment result
  • a link determining unit configured to determine a communication link of the NVME backplane corresponding to the target VPP address according to the judgment result and the target VPP address;
  • the backplane lighting unit is used to send a target VPP address to a target NVME backplane corresponding to the target VPP address by using a communication link to light up the target NVME backplane.
  • the system further includes:
  • the operation stopping unit is configured to determine whether the NVME hard disk is in a running state. After obtaining the judgment result, if the target VNME backplane corresponding to the target VPP address is determined to be in an unrunning state according to the judgment result, the operation is stopped.
  • the present invention also provides a computer-readable storage medium.
  • a computer program is stored on the computer-readable storage medium.
  • the steps of a method for controlling an NVME backplane lighting as disclosed above are implemented.
  • the present invention also provides an NVME back panel lighting control device, as shown in FIG. 7, including:
  • the processor 42 is configured to implement steps of a method for controlling an NVME back panel lighting as disclosed above when executing a computer program.
  • RAM random access memory
  • ROM read-only memory
  • electrically programmable ROM electrically erasable programmable ROM
  • registers hard disks, removable disks, CD-ROMs, or in technical fields Any other form of storage medium is known.

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Abstract

一种NVME背板点灯控制方法、系统、介质及设备,应用于主板,该方法包括:当接收到目标VPP信号时,则运行目标代码,以对目标VPP信号进行解析(S11);其中,目标代码为预先添加至主板中的代码,目标代码中存储有与主板相连的所有NVME背板所对应的VPP地址;对目标VPP信号进行解析,得到与目标VPP信号所对应的目标VPP地址(S12);将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,以对目标NVME背板进行点灯(S13)。可见,通过上述方法,可以实现1路VPP信号对多路NVME背板进行点灯,极大地减少了对NVME背板进行点灯的复杂度。

Description

一种NVME背板点灯控制方法、系统、介质及设备
本申请要求于2018年06月29日提交中国专利局、申请号为201810715035.1、发明名称为“一种NVME背板点灯控制方法、系统、介质及设备”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本发明涉及服务器技术领域,特别涉及一种NVME背板点灯控制方法、系统、介质及设备。
背景技术
随着服务器行业的快速发展,用户对服务器的性能要求越来越高。例如:在某一应用场景下,需要一块主板搭配多块背板,来实现VPP(Vritual Pin Port)点灯,在现有技术当中,一般是采用以下两种方式来对NVME背板进行点灯。
如图1所示,当在主板端的一个VPP接口上添加Redriver芯片之后,就可以通过Cable连接一块NVME(Non-Volatile Memory Express,NVME协议)背板进行点灯。显然,如果在此种点灯方式下,当需要对多个NVME背板进行点灯操作时,那么就必须通过Cable连接多个VPP接口来对多个NVME背板进行点灯,在此种状态下,完全由主板控制对应的NVME背板进行点灯,虽然,NVME背板不需要做任何修改,但是,主板链路过于复杂,资源利用率低,主板空间受到约束。如图2所示,当在主板端的一个VPP接口上添加Rediver芯片之后,就可以通过多个VPP接口对多个NVME背板进行点灯。但是,在此种点灯方式下,多个NVME背板将会接收到相同的VPP信号,而NVME背板却无法通过VPP信号来区分目的端的地址,此种情况下,就需要增加拨码开关,来设置NVME背板所对应的VPP地址,但是,此种方法不仅需要额外修改NVME背板,而且,在对NVME背板进行修改的过程中,容易造成NVME背板的版本错乱。由此可见,利用怎样一种更好的方法来对NVME背板进行点灯,是本领域技术人员亟待解决的 问题。
发明内容
有鉴于此,本发明的目的在于提供一种NVME背板点灯控制方法、系统、介质及设备,以减少对NVME背板进行点灯的复杂度。其具体方案如下:
一种NVME背板点灯控制方法,应用于主板,包括:
当接收到目标VPP信号时,则运行目标代码,以对所述目标VPP信号进行解析;其中,所述目标代码为预先添加至所述主板中的代码,所述目标代码中存储有与所述主板相连的所有NVME背板所对应的VPP地址;
对所述目标VPP信号进行解析,得到与所述目标VPP信号所对应的目标VPP地址;
将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯。
优选的,所述当接收到目标VPP信号时,则运行目标代码,以对所述目标VPP信号进行解析的过程之后,还包括:
若未解析到与所述目标VPP信号相对应的VPP地址时,则停止操作。
优选的,所述将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯的过程之后,还包括:
若所述目标NVME背板未进行点灯,则提示报警信息。
优选的,所述将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯的过程之后,还包括:
若所述目标NVME背板未进行点灯,则将所述目标NVME背板的异常信息记录至日志。
优选的,所述将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯的过程,包括:
对所有NVME背板所对应的NVME硬盘进行检测;
判断所述NVME硬盘是否处于运行状态,得到判断结果;
根据所述判断结果与目标VPP地址,确定与所述目标VPP地址相对应的NVME背板的通信链路;
利用所述通信链路将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯。
优选的,所述判断所述NVME硬盘是否处于运行状态,得到判断结果的过程之后,还包括:
若根据所述判断结果判定与所述目标VPP地址相对应的目标VNME背板处于未运行状态,则停止操作。
相应的,本发明还公开了一种NVME背板点灯控制系统,应用于主板,包括:
代码运行模块,用于当接收到目标VPP信号时,则运行目标代码,以对所述目标VPP信号进行解析;其中,所述目标代码为预先添加至所述主板中的代码,所述目标代码中存储有与所述主板相连的所有NVME背板所对应的VPP地址;
信号解析模块,用于对所述目标VPP信号进行解析,得到与所述目标VPP信号所对应的目标VPP地址;
背板点灯模块,用于将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯。
优选的,背板点灯模块包括:
硬盘检测单元,用于对所有NVME背板所对应的NVME硬盘进行检测;
状态判断单元,用于判断所述NVME硬盘是否处于运行状态,得到判断结果;
链路确定单元,用于根据所述判断结果与目标VPP地址,确定与所述目标VPP地址相对应的NVME背板的通信链路;
背板点灯单元,用于利用所述通信链路将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯。
相应的,本发明还公开了一种计算机可读存储介质,所述计算机可读存储介质上存储有计算机程序,所述计算机程序被处理器执行时实现如前述公开的一种NVME背板点灯控制方法的步骤。
相应的,本发明还公开了一种NVME背板点灯控制设备,包括:
存储器,用于存储计算机程序;
处理器,用于执行所述计算机程序时实现如前述公开的一种NVME背板点灯控制方法的步骤。
可见,在本发明中,通过在主板中添加对应功能的目标代码,也即,将与主板相连的所有NVME背板所对应的VPP地址存储在目标代码中,当主板接收到目标VPP信号时,就可以通过运行目标代码来解析目标VPP信号所对应的目标VPP地址,然后,利用解析得到的目标VPP地址来控制相应的NVME背板进行点灯操作,从而实现了1路VPP信号对多路NVME背板进行点灯。显然,相比于现有技术当中,需要额外修改NVME背板,容易造成NVME背板版本错误的现象,显然,通过本发明中的方法,可以减少对背板进行点灯的复杂度。相应的,本发明公开的一种NVME背板点灯控制系统、介质及设备,同样具有上述有益效果。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据提供的附图获得其他的附图。
图1为现有技术当中对NVME背板进行点灯的示意图;
图2为现有技术当中对NVME背板进行点灯的另一种示意图;
图3为本发明实施例提供的一种NVME背板点灯控制方法的流程图;
图4为本发明实施例提供的一种对NVME背板进行点灯的示意图;
图5为本发明实施例提供的另一种NVME背板点灯控制方法的流程图;
图6为本发明实施例提供的一种NVME背板点灯控制系统的结构图;
图7为本发明实施例提供的一种NVME背板点灯控制设备的结构图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
本发明实施例公开了一种NVME背板点灯控制方法,如图3所示,该方法包括:
步骤S11:当接收到目标VPP信号时,则运行目标代码,以对目标VPP信号进行解析;
其中,目标代码为预先添加至主板中的代码,目标代码中存储有与主板相连的所有NVME背板所对应的VPP地址;
步骤S12:对目标VPP信号进行解析,得到与目标VPP信号所对应的目标VPP地址;
步骤S13:将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,以对目标NVME背板进行点灯。
在本实施例中,为了对NVME背板进行点灯,首先是在主板上添加对应功能的目标代码,也即,目标代码中存储有与主板相连的所有NVME背板所对应的VPP地址,那么,当主板接收到目标VPP信号时,就可以对目标VPP信号进行解析,以确定目标VPP信号中所蕴含的需要进行点灯的NVME背板的目标VPP地址。当主板通过运行预先添加至主板中的目标代码,解析得到与目标VPP信号所对应的目标VPP地址时,就可以将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,以控制目标NVME背板进行点灯。
具体的,如图4所示,为本实施例提供的一种对NVME背板进行点灯的示意图。通过在主板CPLD(Complex Programmable Logic Device,复杂可编程逻辑器件)中添加对应功能的代码模块,以模拟VPP通信的Slave端与Master端,当主板CPLD作为Slave端时,能够对目标VPP信号进行 解析,通过对目标VPP信号进行解析来确定此目标VPP信号是对哪一个背板进行点灯操作;当主板CPLD作为Master端时,能够将解析得到的目标VPP信号发送至对应需要进行点灯操作的NVME背板。并最终实现利用1路VPP信号,对多路NVME背板进行点灯操作。而且,VPP地址与NVME背板的对应关系已经在主板CPLD代码中实现,VPP的通信通路由主板CPLD控制,因此,NVME背板也无需多个CPLD版本,也无需使用拨码开关来区分NVME背板的地址,同时也避免了多个版本所带来的维护困难的问题。而且,通过本实施例中的方法,实现了由单路VPP操作多块NVME背板的点灯操作,不仅完成了对不同应用场景的不同需求,而且,由于其方法简单,可扩展性强,也为后续的产品方案提供了更好的解决思路。
可见,在本实施例中,通过在主板中添加对应功能的目标代码,也即,将与主板相连的所有NVME背板所对应的VPP地址存储在目标代码中,当主板接收到目标VPP信号时,就可以通过运行目标代码来解析目标VPP信号所对应的目标VPP地址,然后,利用解析得到的目标VPP地址来控制相应的NVME背板进行点灯操作,从而实现了1路VPP信号对多路NVME背板进行点灯。显然,相比于现有技术当中,需要额外修改NVME背板,容易造成NVME背板版本错误的方法,显然,通过本实施例中的方法,可以减少对背板进行点灯的复杂度。
基于上述实施例,本实施例对技术方案作进一步的说明和优化。具体的,上述步骤S11:当接收到目标VPP信号时,则运行目标代码,以对目标VPP信号进行解析的过程之后,还包括:
若未解析到与目标VPP信号相对应的VPP地址时,则停止操作。
可以理解的是,当主板接收到目标VPP信号时,则会利用预先添加至主板芯片CPLD中的目标代码来对目标VPP信号进行解析。如果在对目标VPP信号进行解析的过程中,未解析到与目标VPP信号相对应的VPP地址时,则说明此操作出现了异常,此时,就需要停止操作,以减少系统资源的消耗。
基于上述实施例,本实施例对技术方案作进一步的说明与优化,具体的,上述步骤S13:将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,以对目标NVME背板进行点灯的过程之后,还包括:
若目标NVME背板未进行点灯,则提示报警信息。
可以理解的是,当将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板时,在正常情况下,目标NVME背板会实现点灯操作,但是,如果目标NVME背板未进行点灯,则说明目标NVME背板出现异常情况,那么,在此种情况下,就可以发出报警信息,以提示维修人员对目标NVME背板进行检测与维修。具体的,在实际应用当中,报警信息可以是语音报警、灯光报警或者是其它形式的报警,此处不作具体的限定。
基于上述实施例,本实施例对技术方案作进一步的说明与优化,具体的,上述步骤S13:将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,以对目标NVME背板进行点灯的过程之后,还包括:
若目标NVME背板未进行点灯,则将目标NVME背板的异常信息记录至日志。
可以理解的是,如果目标NVME背板未进行点灯操作,说明目标NVME背板发生异常,此时,可以将目标NVME背板的异常信息记录至日志当中,以方便维修人员可以根据日志记录的信息对NVME背板进行维修。
基于上述实施例,本实施例对上以实施例作进一步的优化与说明,如图5所示,具体的,上述步骤S13:将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,以对目标NVME背板进行点灯的过程,包括:
步骤S131:对所有NVME背板所对应的NVME硬盘进行检测;
步骤S132:判断NVME硬盘是否处于运行状态,得到判断结果;
步骤S133:根据判断结果与目标VPP地址,确定与目标VPP地址相对应的NVME背板的通信链路;
步骤S134:利用通信链路将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,以对目标NVME背板进行点灯。
可以理解的是,当主板解析得到了与目标VPP信号相对应的目标VPP地址时,则可以将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,来对目标NVME背板进行点灯。
具体的,在利用目标VPP地址对目标NVME背板进行点灯的过程中,首先,主板会对所有NVME背板中的NVME硬盘进行检测,显然,此操作的目的是,为了确定NVME硬盘是否处于运行状态,以便在后续的流程步骤中,在处于运行状态下的NVME硬盘当中,利用目标VPP地址来确定与目标VPP地址相对应的NVME背板的通信链路,也即,根据判断结果确定与目标VPP地址相对应的NVME背板的通信链路。
当利用目标VPP地址确定了相应的通信链路以后,就可以利用该通信链路将目标VPP地址通过预先设置好的传输格式下发至与目标VPP地址相对应的目标NVME背板,并最终实现对目标NVME背板的点灯操作。
相应的,上述步骤S132:判断NVME硬盘是否处于运行状态,得到判断结果的过程之后,还包括:
若根据判断结果判定与目标VPP地址相对应的目标NVME背板处于未运行状态,则停止操作。
可以理解的是,在所有NVME背板的NVME硬盘当中,必定有一些NVME背板是处于运行状态,另一些NVME背板时处于未运行状态。那么,如果根据对所有NVME背板所对应的NVME硬盘进行检测的判断结果,判定与目标VPP地址相对应的目标NVME背板处于未运行状态时,则说明解析过程出现异常,在此种情况下就需要停止操作,以减少系统资源的消耗。
相应的,本发明还公开了一种NVME背板点灯控制系统,如图6所示,该系统包括:
代码运行模块31,用于当接收到目标VPP信号时,则运行目标代码,以对目标VPP信号进行解析;其中,目标代码为预先添加至主板中的代码,目标代码中存储有与主板相连的所有NVME背板所对应的VPP地址;
信号解析模块32,用于对目标VPP信号进行解析,得到与目标VPP信号所对应的目标VPP地址;
背板点灯模块33,用于将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,以对目标NVME背板进行点灯。
优选的,该系统还包括:
操作停止模块,用于当接收到目标VPP信号时,则运行目标代码,以对所述目标VPP信号进行解析的过程之后,若未解析到与所述目标VPP信号相对应的VPP地址时,则停止操作。
优选的,该系统还包括:
信息报警模块,用于将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,以对目标NVME背板进行点灯的过程之后,若目标NVME背板未进行点灯,则提示报警信息。
优选的,该系统还包括:
日志记录模块,用于将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,以对目标NVME背板进行点灯的过程之后,若目标NVME背板未进行点灯,则将目标背板的异常信息记录至日志。
优选的,背板点灯模块包括:
硬盘检测单元,用于对所有NVME背板所对应的NVME硬盘进行检测;
状态判断单元,用于判断NVME硬盘是否处于运行状态,得到判断结果;
链路确定单元,用于根据判断结果与目标VPP地址,确定与目标VPP地址相对应的NVME背板的通信链路;
背板点灯单元,用于利用通信链路将目标VPP地址下发至与目标VPP地址相对应的目标NVME背板,以对目标NVME背板进行点灯。
优选的,该系统还包括:
操作停止单元,用于判断NVME硬盘是否处于运行状态,得到判断结果的过程之后,若根据判断结果判定与目标VPP地址相对应的目标VNME背板处于未运行状态,则停止操作。
相应的,本发明还提供了一种计算机可读存储介质,计算机可读存储介质上存储有计算机程序,计算机程序被处理器执行时实现如前述公开的一种NVME背板点灯控制方法的步骤。
相应的,本发明还提供了一种NVME背板点灯控制设备,如图7所示,包括:
存储器41,用于存储计算机程序;
处理器42,用于执行计算机程序时实现如前述公开的一种NVME背板点灯控制方法的步骤。
本说明书中各个实施例采用递进的方式描述,每个实施例重点说明的都是与其它实施例的不同之处,各个实施例之间相同或相似部分互相参见即可。对于实施例公开的装置而言,由于其与实施例公开的方法相对应,所以描述的比较简单,相关之处参见方法部分说明即可。
专业人员还可以进一步意识到,结合本文中所公开的实施例描述的各示例的单元及算法步骤,能够以电子硬件、计算机软件或者二者的结合来实现,为了清楚地说明硬件和软件的可互换性,在上述说明中已经按照功能一般性地描述了各示例的组成及步骤。这些功能究竟以硬件还是软件方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本发明的范围。
结合本文中所公开的实施例描述的方法或算法的步骤可以直接用硬件、处理器执行的软件模块,或者二者的结合来实施。软件模块可以置于随机存储器(RAM)、内存、只读存储器(ROM)、电可编程ROM、电可擦除可编程ROM、寄存器、硬盘、可移动磁盘、CD-ROM、或技术领域内所公知的任意其它形式的存储介质中。
最后,还需要说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
以上对本发明所提供的一种NVME背板点灯控制方法、系统、介质及设备进行了详细介绍,本文中应用了具体个例对本发明的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本发明的方法及其核心思想;同时,对于本领域的一般技术人员,依据本发明的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本发明的限制。

Claims (10)

  1. 一种NVME背板点灯控制方法,其特征在于,应用于主板,包括:
    当接收到目标VPP信号时,则运行目标代码,以对所述目标VPP信号进行解析;其中,所述目标代码为预先添加至所述主板中的代码,所述目标代码中存储有与所述主板相连的所有NVME背板所对应的VPP地址;
    对所述目标VPP信号进行解析,得到与所述目标VPP信号所对应的目标VPP地址;
    将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯。
  2. 根据权利要求1所述的方法,其特征在于,所述当接收到目标VPP信号时,则运行目标代码,以对所述目标VPP信号进行解析的过程之后,还包括:
    若未解析到与所述目标VPP信号相对应的VPP地址时,则停止操作。
  3. 根据权利要求1所述的方法,其特征在于,所述将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯的过程之后,还包括:
    若所述目标NVME背板未进行点灯,则提示报警信息。
  4. 根据权利要求1所述的方法,其特征在于,所述将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯的过程之后,还包括:
    若所述目标NVME背板未进行点灯,则将所述目标NVME背板的异常信息记录至日志。
  5. 根据权利要求1至4任一项所述的方法,其特征在于,所述将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯的过程,包括:
    对所有NVME背板所对应的NVME硬盘进行检测;
    判断所述NVME硬盘是否处于运行状态,得到判断结果;
    根据所述判断结果与目标VPP地址,确定与所述目标VPP地址相对应的NVME背板的通信链路;
    利用所述通信链路将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯。
  6. 根据权利要求5所述的方法,其特征在于,所述判断所述NVME硬盘是否处于运行状态,得到判断结果的过程之后,还包括:
    若根据所述判断结果判定与所述目标VPP地址相对应的目标VNME背板处于未运行状态,则停止操作。
  7. 一种NVME背板点灯控制系统,其特征在于,应用于主板,包括:
    代码运行模块,用于当接收到目标VPP信号时,则运行目标代码,以对所述目标VPP信号进行解析;其中,所述目标代码为预先添加至所述主板中的代码,所述目标代码中存储有与所述主板相连的所有NVME背板所对应的VPP地址;
    信号解析模块,用于对所述目标VPP信号进行解析,得到与所述目标VPP信号所对应的目标VPP地址;
    背板点灯模块,用于将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯。
  8. 根据权利要求7所述的系统,其特征在于,背板点灯模块包括:
    硬盘检测单元,用于对所有NVME背板所对应的NVME硬盘进行检测;
    状态判断单元,用于判断所述NVME硬盘是否处于运行状态,得到判断结果;
    链路确定单元,用于根据所述判断结果与目标VPP地址,确定与所述目标VPP地址相对应的NVME背板的通信链路;
    背板点灯单元,用于利用所述通信链路将所述目标VPP地址下发至与所述目标VPP地址相对应的目标NVME背板,以对所述目标NVME背板进行点灯。
  9. 一种计算机可读存储介质,其特征在于,所述计算机可读存储介质上存储有计算机程序,所述计算机程序被处理器执行时实现如权利要求1至6任一项所述的NVME背板点灯控制方法的步骤。
  10. 一种NVME背板点灯控制设备,其特征在于,包括:
    存储器,用于存储计算机程序;
    处理器,用于执行所述计算机程序时实现如权利要求1至6任一项所述的NVME背板点灯控制方法的步骤。
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