WO2019242590A1 - 一种光网络装置和光模块 - Google Patents

一种光网络装置和光模块 Download PDF

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Publication number
WO2019242590A1
WO2019242590A1 PCT/CN2019/091617 CN2019091617W WO2019242590A1 WO 2019242590 A1 WO2019242590 A1 WO 2019242590A1 CN 2019091617 W CN2019091617 W CN 2019091617W WO 2019242590 A1 WO2019242590 A1 WO 2019242590A1
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Prior art keywords
optical
signal
processing
electrical signal
chip
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PCT/CN2019/091617
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English (en)
French (fr)
Inventor
陈国导
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华为技术有限公司
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Priority to EP19822640.9A priority Critical patent/EP3796574A4/en
Priority to JP2020570966A priority patent/JP7150893B2/ja
Publication of WO2019242590A1 publication Critical patent/WO2019242590A1/zh
Priority to US17/126,851 priority patent/US11563494B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/40—Transceivers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/25—Arrangements specific to fibre transmission
    • H04B10/2507—Arrangements specific to fibre transmission for the reduction or elimination of distortion or dispersion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/25—Arrangements specific to fibre transmission
    • H04B10/2575—Radio-over-fibre, e.g. radio frequency signal modulated onto an optical carrier
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/25—Arrangements specific to fibre transmission
    • H04B10/2575—Radio-over-fibre, e.g. radio frequency signal modulated onto an optical carrier
    • H04B10/25752—Optical arrangements for wireless networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/25—Arrangements specific to fibre transmission
    • H04B10/2589—Bidirectional transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/25—Arrangements specific to fibre transmission
    • H04B10/2589—Bidirectional transmission
    • H04B10/25891—Transmission components
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J14/00—Optical multiplex systems
    • H04J14/02—Wavelength-division multiplex systems
    • H04J14/0278—WDM optical network architectures
    • H04J14/0279—WDM point-to-point architectures
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B2210/00—Indexing scheme relating to optical transmission systems
    • H04B2210/006—Devices for generating or processing an RF signal by optical means
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J14/00—Optical multiplex systems
    • H04J14/02—Wavelength-division multiplex systems
    • H04J14/0227—Operation, administration, maintenance or provisioning [OAMP] of WDM networks, e.g. media access, routing or wavelength allocation
    • H04J14/0254—Optical medium access
    • H04J14/0256—Optical medium access at the optical channel layer

Definitions

  • the embodiments of the present application relate to the field of communication technologies, and in particular, to an optical network device and an optical module.
  • the optical network equipment uses 4 optical transmitters (Optical Transmitter), which is implemented by Non-Retum Zero (NRZ) coding.
  • Optical Transmitter which is implemented by Non-Retum Zero (NRZ) coding.
  • the 4 * 25.78125G electrical signal is converted into an optical signal, and then multiplexing is achieved through oMUX, that is, the 4 optical signals of 4 * 25.78125G are transmitted through the same optical fiber.
  • the optical network equipment receives 4 optical signals of 4 * 25.78125G through the same fiber, and then uses 4 optical receivers to restore the optical signals of 4 * 25.78125G to electrical signals.
  • optical network equipment is mainly reflected in optical transmitters and receivers.
  • optical transmitters and optical receivers there are four optical transmitters and optical receivers in optical network equipment. The number of optical transmitters and optical receivers is large and the cost is high.
  • the embodiments of the present application provide an optical network device and an optical module, which are used to reduce the number of optical transmission components and reduce costs.
  • an embodiment of the present application provides an optical network device for use as a first optical network device, including: a processing chip, a first optical transmission component, and a second optical transmission component;
  • the processing chip is used for:
  • N electrical signals Process the N electrical signals, convert the received N electrical signals into two electrical signals, and the two electrical signals are respectively represented as a first electrical signal and a second electrical signal;
  • the first optical transmission component is configured to convert the first electrical signal into a first optical signal, and an input end of the first optical transmission component is coupled to an output end of the processing chip;
  • the second optical transmission component is configured to convert a second electrical signal into a second optical signal, and an input end of the second optical transmission component is coupled to an output end of the processing chip.
  • the processing chip includes a 100Gbps Attachment Unit Interface (CAUI) -4 interface.
  • CAUI Attachment Unit Interface
  • the single-board interface chip is a 100G single-board interface chip
  • the processing chip passes the The CAUI-4 interface is connected to the 100G single board interface chip.
  • the first circuit is configured to perform physical media attachment (PMA) processing and physical coding sublayer (PCS) conversion processing on the electrical signals A1 to A4, and obtain a processed 8 Electrical signals, and the processed eight electrical signals are respectively expressed as electrical signals B1 to B8;
  • PMA physical media attachment
  • PCS physical coding sublayer
  • the second circuit is configured to perform forward error correction (FEC) coding and PMA (2: 2) processing on the electrical signals B1 to B4 to obtain the processed electrical signals C1 and C2;
  • FEC forward error correction
  • the second circuit is further configured to perform FEC encoding and PMA (2: 2) processing on the electrical signals B5 to B8 to obtain processed electrical signals C3 and C4;
  • the third circuit is configured to perform PMA (2: 1) processing on the electrical signal C1 and the electrical signal C2 to obtain the processed first electrical signal;
  • the third circuit is further configured to perform PMA (2: 1) processing on the electrical signals C3 and C4 to obtain the processed second electrical signals.
  • the first circuit is configured to perform PMA processing and PCS conversion processing on the electrical signals A1 to A4, and obtaining the electrical signals B1 to B8 specifically includes:
  • the first circuit performs PMA (20: 4) processing on the electrical signals A1 to A4 to obtain processed 20 electrical signals, and the processed 20 electrical signals are respectively expressed as electrical signals D1 to electrical Signal D20;
  • the first circuit performs a PCS conversion process on the electrical signals D1 to D20 to obtain the electrical signals B1 to B8.
  • the processing chip includes two 50Gbps Attachment Unit Interfaces (50GAUI) -2 interfaces, and the two 50GAUI-2 interfaces are respectively represented as a first 50GAUI-2 interface and a first 50GAUI-2 interface.
  • 50GAUI-2 interfaces Two 50GAUI-2 interfaces.
  • the single board interface chip is a 50G single board interface chip
  • the processing chip is connected to the 50G single board interface chip through the first 50GAUI-2 interface and the second 50GAUI-2 interface.
  • the single-board interface chip is a 50G single-board interface chip
  • the N is equal to 4
  • the N electrical signals are expressed as electrical signals A1 to A4, respectively;
  • the processing chip receives the electrical signal A1 and the electrical signal A2 through the first 50GAUI-2 interface;
  • the processing chip receives the electrical signal A3 and the electrical signal A4 through the second 50GAUI-2 interface;
  • the processing chip further includes a third circuit, and the third circuit is configured to:
  • the processing chip includes two 50GAUI-1 interfaces, and the two 50GAUI-1 interfaces are respectively represented as a first 50GAUI-1 interface and a second 50GAUI-1 interface;
  • the processing chip is connected to the first optical transmission component through the first 50GAUI-1 interface, and is connected to the second optical transmission component through the second 50GAUI-1 interface.
  • the first optical transmission component includes a first electro-optical conversion module and a first optical multiplexer connected to the first electro-optical conversion module.
  • the first optical conversion module is configured to convert the A first electrical signal is converted into the first optical signal
  • the first optical multiplexer is configured to send the first optical signal to a second optical network device;
  • the second optical transmission component includes a second electro-optical conversion module and a second optical multiplexer connected to the second electro-optical conversion module.
  • the second optical conversion module is configured to convert the second electrical signal into the second electrical signal.
  • a second optical signal, and the second optical multiplexer is configured to send the second optical signal to the second optical network device.
  • the first optical transmission component further includes: a first optical detector connected to the first optical multiplexer, and the second optical transmission component further includes a multiplexed with the second optical A second photodetector connected to the receiver;
  • the first optical multiplexer is configured to receive a third optical signal sent by the second optical network device, and output the third optical signal to the first optical detector; the first optical detector For converting the third optical signal into a third electrical signal;
  • the second optical multiplexer is configured to receive a fourth optical signal sent by the second optical network device, and output the fourth optical signal to the second optical detector; the second optical detector, Configured to convert the fourth optical signal into a fourth electrical signal;
  • the processing chip is configured to process the third electrical signal and the fourth electrical signal, and send the N electrical signals obtained after the processing to the board interface chip;
  • a wavelength of the first optical signal is different from a wavelength of the third optical signal, and a wavelength of the first optical signal is the same as a wavelength of the fourth optical signal;
  • the second optical signal has a different wavelength from the fourth optical signal, and the second optical signal has the same wavelength as the third optical signal.
  • the optical network device can not only send optical signals but also receive optical signals, and the first optical transmission component and the second optical transmission component are respectively connected to different optical fibers, so the optical network device can reuse the optical fibers in the prior art for communication. And if one of the optical fibers fails, the sending and receiving function can also be realized through the other optical fiber, ensuring normal communication between the two optical network devices, and there are both sending and receiving directions in the same optical fiber, which can guarantee time delay consistency.
  • the wavelength of the optical signal sent by the first optical transmission component is the same as the wavelength of the optical signal received by the second optical transmission component
  • the wavelength of the optical signal received by the first optical transmission component is the same as the wavelength of the optical signal sent by the second optical transmission component. Therefore, it is not necessary to distinguish two optical network devices when the optical network device communicates with another optical network device through an optical fiber, which avoids the problem that the single fiber needs to be paired and used in the prior art and does not need to change user habits.
  • the first optical transmission component and the second optical transmission component are respectively packaged by a coaxial transistor (Transistor Outline Package, TO package).
  • TO package Transistor Outline Package
  • the TO package has a complete industrial chain and lower cost.
  • an embodiment of the present application provides an optical network device for a second optical network device, including: a processing chip, a first optical transmission component, and a second optical transmission component;
  • the first optical transmission component is configured to convert a first optical signal into a first electrical signal and send the first optical signal to the processing chip, and an output end of the first optical transmission component is coupled to an input end of the processing chip;
  • the second optical transmission component is configured to convert a second optical signal into a second electrical signal and send the second optical signal to the processing chip, and an output end of the second optical transmission component is coupled to an input end of the processing chip;
  • the processing chip is used for:
  • N an integer greater than 2.
  • the N electrical signals output by the processing chip are obtained by processing 2 electrical signals, this makes the number of optical transmission components connected to the processing chip less than N. There is no need to connect N optical transmission components to the processing chip, which reduces the number of optical transmission components. The number reduces costs.
  • the processing chip includes a CAUI-4 interface
  • the processing chip is connected to the 100G single board interface chip through the CAUI-4 interface.
  • the third circuit is configured to perform PMA (2: 1) processing on the first electrical signal to obtain an electrical signal C1 and an electrical signal C2;
  • the third circuit is further configured to perform PMA (2: 1) processing on the second electrical signal to obtain an electrical signal C3 and an electrical signal C4;
  • the second circuit is configured to perform PMA (2: 2) processing and FEC encoding on the electrical signals C1 and C2 to obtain electrical signals B1 to B4;
  • the second electrical signal is further used to perform PMA (2: 2) processing and FEC encoding on the electrical signals C3 and C4 to obtain electrical signals B5 to B8;
  • the first circuit is configured to perform a PCS conversion process and a PMA process on the electrical signals B1 to B8 to obtain the electrical signals A1 to A4.
  • the first circuit is configured to perform a PCS conversion process and a PMA process on the electrical signals B1 to B8, and obtaining the electrical signals A1 to A4 specifically includes:
  • the first circuit performs a PCS conversion process on the electric signals B1 to B8 to obtain processed 20 electric signals, and the processed 20 electric signals are respectively expressed as electric signals D1 to D20;
  • the first circuit performs PMA (20: 4) processing on the electrical signals D1 to D20 to obtain the electrical signals A1 to A4.
  • the processing chip includes two 50GAUI-2 interfaces, and the two 50GAUI-2 interfaces are respectively represented as a first 50GAUI-2 interface and a second 50GAUI-2 interface.
  • the interface chip is a 50G single board interface chip
  • the processing chip is connected to the 50G single board interface chip through the first 50GAUI-2 interface and the second 50GAUI-2 interface.
  • the single-board interface chip is a 50G single-board interface chip
  • the N is equal to 4
  • the N electrical signals are expressed as electrical signals A1 to A4, respectively;
  • the processing chip sends the electrical signal A1 and electrical signal A2 through the first 50GAUI-2 interface;
  • the processing chip sends the electrical signal A3 and electrical signal A4 through the second 50GAUI-2 interface
  • the processing chip further includes a third circuit, and the third circuit is configured to:
  • the processing chip includes two 50GAUI-1 interfaces, and the two 50GAUI-1 interfaces are respectively represented as a first 50GAUI-1 interface and a second 50GAUI-1 interface;
  • the processing chip is connected to the first optical transmission component through the first 50GAUI-1 interface, and is connected to the second optical transmission component through the second 50GAUI-1 interface.
  • the first optical transmission component includes a first optical detector and a first optical multiplexer connected to the first optical detector.
  • the first optical multiplexer is configured to receive all Said first optical signal, sending said first optical signal to said first photodetector; said first photodetector, for converting said first optical signal into said first electrical signal;
  • the second optical transmission component includes a second optical detector and a second optical multiplexer connected to the second optical detector.
  • the second optical multiplexer is configured to receive the second optical signal, The second optical signal is sent to the second photodetector; the second photodetector is configured to convert the second optical signal into the second electrical signal.
  • the first optical transmission component further includes a first electric-optical conversion module connected to the first optical multiplexer, and the second optical transmission component further includes a second optical multiplexer.
  • the processing chip is further configured to receive N electrical signals sent by the single-board interface chip, process the N electrical signals, and convert the received N electrical signals into two electrical signals. Each electrical signal is expressed as a third electrical signal and a fourth electrical signal;
  • the first electrical-optical conversion module is configured to convert the third electrical signal into a third optical signal; the first optical multiplexer is further configured to send the third optical signal;
  • the second electrical-optical conversion module is configured to convert the fourth electrical signal into a fourth optical signal; the second optical multiplexer is further configured to send the fourth optical signal;
  • a wavelength of the first optical signal is different from a wavelength of the third optical signal, and a wavelength of the first optical signal is the same as a wavelength of the fourth optical signal;
  • the second optical signal has a different wavelength from the fourth optical signal, and the second optical signal has the same wavelength as the third optical signal.
  • the optical network device can not only send optical signals but also receive optical signals, and the first optical transmission component and the second optical transmission component are respectively connected to different optical fibers, so the optical network device can reuse the optical fibers in the prior art for communication. And if one of the optical fibers fails, the sending and receiving function can also be realized through the other optical fiber, ensuring normal communication between the two optical network devices, and there are both sending and receiving directions in the same optical fiber, which can guarantee time delay consistency.
  • the wavelength of the optical signal sent by the first optical transmission component is the same as the wavelength of the optical signal received by the second optical transmission component
  • the wavelength of the optical signal received by the first optical transmission component is the same as the wavelength of the optical signal sent by the second optical transmission component. Therefore, it is not necessary to distinguish two optical network devices when the optical network device communicates with another optical network device through an optical fiber, which avoids the problem that the single fiber needs to be paired and used in the prior art and does not need to change user habits.
  • the first optical transmission component and the second optical transmission component are respectively packaged by TO.
  • the TO package has a complete industrial chain and lower cost.
  • an embodiment of the present application provides an optical module, including the optical network device described in the first aspect or the second aspect of the embodiment of the present application.
  • FIG. 1 is a schematic structural diagram of a communication system according to an embodiment of the present application.
  • FIG. 2 is a schematic diagram of a PCS Lane correspondence relationship provided by an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of an optical network device according to an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of an optical network device according to another embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a communication system according to an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of a communication system according to another embodiment of the present application.
  • FIG. 7 is a schematic structural diagram of a communication system according to another embodiment of the present application.
  • FIG. 8 is a schematic diagram of processing applied to an 1 * 100GE optical network device according to an embodiment of the present application.
  • FIG. 9 is a schematic processing diagram of an optical network device applied to a 2 * 50GE according to an embodiment of the present application.
  • FIG. 10 is a schematic diagram of a processing chip switching between two modes provided by an embodiment of the present application.
  • FIG. 11 is a schematic structural diagram of a communication system according to another embodiment of the present application.
  • FIG. 13 is a flowchart of a signal processing method according to another embodiment of the present application.
  • FIG. 1 is a schematic structural diagram of a communication system according to an embodiment of the present application.
  • the communication system of this embodiment includes two optical network devices, and the two optical network devices are connected through optical fibers, and are connected to each other through optical fibers.
  • Optical signals are transmitted between two optical fibers in FIG. 1 as an example, but this embodiment is not limited thereto.
  • Optical network equipment includes, but is not limited to, the following: switches, routers, Packet Transport Network (PTN) equipment, and transmission equipment.
  • PTN Packet Transport Network
  • the optical network device mentioned below may be the aforementioned optical network device or may be a component of the aforementioned optical network device.
  • CAUI-4 interface an optional interface for the PMA sublayer within the 100GE interface, which is mainly used to provide interconnection between the chip and the chip, or between the chip and the optical module, and the interface rate is 4 * 25.78125G.
  • the interface rate is 4 * 25.78125G.
  • 50GAUI-2 interface an optional interface for the PMA sublayer within the 50GE interface, which is mainly used to provide interconnection between the chip and the chip, or between the chip and the optical module, and the interface rate is 2 * 26.5625G.
  • the interface rate is 2 * 26.5625G.
  • 50GAUI-1 interface an optional interface for the PMA sublayer within the 50GE interface, mainly used to provide interconnection between the chip and the chip, or between the chip and the optical module, the interface rate is 1 * 53.125G Annex 135G in the standard IEEE P802.3cd TM /D3.1 will not be repeated here.
  • PMA (20: 4) processing 4 PCS Lanes are converted into 20 PCS Lanes, or 20 PCS Lanes are converted into 4 PCS Lanes; for example, it may be PMA layer processing according to the 100GE standard. For example, refer to 83.Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE-R in the standard IEEE Std 802.3-2015_SECTION6, which will not be repeated here.
  • PMA Physical Medium Attachment
  • PCS conversion When applied to 100G optical modules, this application refers to PCS conversion of 100GE / 2 * 50GE. Take the direction of sending signals as an example. First, the processing is performed according to the requirements of the PCS layer of 100GE. The corresponding Lane alignment and lock processing is performed on 20 PCS lanes. The Amplitude Modulation (AM) alignment block is removed. At the same time, it supports bit Bit error ratio (BER) detection function. The data after removing the AM word is a 66B block after scrambling. Distribute the data of 66B blocks to 8 PCS Lanes. The direction of the received signal is opposite to the direction of the transmitted signal, which is not described again. As shown in Figure 2, the bandwidth of each PCS Lane is 12.890625G.
  • AM Amplitude Modulation
  • BER bit Bit error ratio
  • Lane [0: 3] constitutes the first 50G
  • Lane [4: 7] constitutes the second 50G
  • Lane [4: 7] composes the first 50G.
  • PCS Physical Coding Sublayer
  • 64B / 66B type 40GBASE-R and 100GBASE-R in 802.3-2015_SECTION6
  • IEEE P802.3cd TM / D3 133 Physical Coding Sublayer (PCS) in .1 for 64B / 66B, type 50GBASE-R.
  • FEC In terms of sending direction, FEC refers to FEC encoding.
  • the main principle is to first perform alignment synchronization, rearrange, remove the AM word, and then perform FEC transcoding (such as 66B to 257B conversion), and then re-insert the translated AM word, and then FEC encoding.
  • the FEC used here is, for example, RS (544,514), which is usually called KP4FEC.
  • Its error correction capability is 2e-4, which can basically make up for 4-Level Pulse amplitude modulation. , PAM4) encoding loss, using the same optoelectronic device, can reach a substantially equivalent transmission distance.
  • the data after FEC encoding will be distributed to 2 FEC Lanes for PMA (2: 2) processing.
  • FEC refers to FEC decoding.
  • FEC decoding is the opposite of FEC encoding. See, for example, 134.
  • RS-FEC Reed-Solomon Forward Error Correction
  • PMA (2: 2) processing similar to the PMA (20: 4) processing described above, except that the input and output here are two PMA lanes; this application may refer to the PMA (50 2: 2) Processing. For example, see 135. Physical Medium Attachment (PMA) sublayer, type 50GBASE-R and 100GBASE-P in IEEE P802.3cd TM /D3.1.
  • PMA Physical Medium Attachment
  • PMA (2: 1) processing In addition to converting 2 PMA Lanes into 1 PMA Lane, or 1 PMA Lane into 2 PMA Lanes, it also implements the PAM4 encoding function.
  • the PAM4 encoding has 4 electrical signals. Flat, achieving the effect of single lane50G.
  • this application may refer to PMA (2: 1) processing performed in accordance with the 50GE standard. For example, see 135. Physical Medium Attachment (PMA) sublayer, type 50GBASE-R and 100GBASE-P in IEEE P802.3cd TM /D3.1.
  • PMA Physical Medium Attachment
  • PAM4 processing There are 4 levels of PAM4 signals. Compared to NRZ signals of 2 levels, under the premise that the frequency of sign inversion is unchanged, the information of each sample contains 2bit information, which effectively doubles the bandwidth. For example, see 135. Physical Medium Attachment (PMA) sublayer, type 50GBASE-R and 100GBASE-P 135.5.7PAM4encoding in IEEE P802.3cd TM /D3.1.
  • PMA Physical Medium Attachment
  • FIG. 3 is a schematic structural diagram of an optical network device according to an embodiment of the present application.
  • the optical network device 100 of this embodiment is used as a first optical network device, and is described in terms of a transmission direction.
  • the optical network device 100 may include a processing chip 110, an optical transmission component 120, and an optical transmission component 130.
  • An input terminal of the optical transmission component 120 is coupled to an output terminal of the processing chip 110, and an input terminal of the optical transmission component 130. It is coupled to the output terminal of the processing chip 110.
  • the processing chip 110 obtains N electrical signals sent by the receiving board interface chip, where N is an integer greater than 2. Each of the N electrical signals has the same bandwidth. The processing chip 110 then processes the N electrical signals, and merges the received N electrical signals into two electrical signals. It should be noted that the N electrical signals are combined to obtain only two signals. Each of the electric signals has the same bandwidth, and these two electric signals are respectively denoted as electric signal 1 and electric signal 2. After the processing chip 110 obtains the electrical signals 1 and 2 described above, it sends the electrical signal 1 to the optical transmission component 120 and the electrical signal 2 to the optical transmission component 130.
  • the optical transmission component 120 receives the electrical signal 1 sent by the processing chip 110 and converts the received electrical signal 1 into an optical signal 1.
  • the optical transmission component 130 receives the electric signal 2 sent by the processing chip 110 and converts the received electric signal 2 into an optical signal 2.
  • the optical transmission component 120 is connected to one optical fiber (for example, optical fiber 1), and the optical transmission component 130 is connected to another optical fiber (for example, optical fiber 2).
  • the other ends of the optical fiber 1 and optical fiber 2 can be connected to another optical network device (such as Figure 4).
  • the optical transmission component 120 transmits optical signals through the optical fiber 1, and the optical transmission component 130 transmits optical signals through the optical fiber 2.
  • the optical network device of this embodiment first combines N electrical signals into two fewer electrical signals through a processing chip, and then converts one of the electrical signals into one optical signal through the optical transmission component, and passes the other through the other.
  • the optical transmission component converts another electrical signal into another optical signal. Since the N electrical signals to be sent obtained by the processing chip are combined, so that there are only two optical transmission components connected to the processing chip, there is no need to connect the N optical transmission components to the processing chip, which reduces the number of optical transmission components. Reduced costs.
  • FIG. 4 is a schematic structural diagram of an optical network device according to another embodiment of the present application.
  • the optical network device 200 of this embodiment is used as a second optical network device, and is described in terms of a receiving direction.
  • An exemplary optical network device 200 may include a processing chip 210, an optical transmission component 220, and an optical transmission component 230.
  • An output terminal of the optical transmission component 220 is coupled to an input terminal of the processing chip 210, and an output terminal of the optical transmission component 230 is coupled to an input terminal of the processing chip 210.
  • the optical transmission component 220 receives the optical signal 3, converts the received optical signal 3 into an electrical signal 3, and then sends the electrical signal 3 to the processing chip 210.
  • the optical transmission component 230 receives the optical signal 4, converts the received optical signal 4 into an electrical signal 4, and then sends the electrical signal 4 to the processing chip 210.
  • the bandwidth of the electrical signal 3 and the electrical signal 4 is the same.
  • the optical transmission component 220 can be connected to one optical fiber (for example, optical fiber 1), and the optical transmission component 220 can be connected to another optical fiber (for example, optical fiber 2).
  • the other ends of the optical fiber 1 and optical fiber 2 can be connected to another optical network device ( For example, as shown in Figure 3).
  • the optical transmission component 220 receives the optical signal 3 through the optical fiber 1, and the optical transmission component 230 receives the optical signal 4 through the optical fiber 2.
  • the processing chip 210 processes the electrical signals 3 and 4 (that is, two electrical signals) to obtain N electrical signals, where N is an integer greater than 2, and each of the N electrical signals has the same bandwidth.
  • the processing chip 210 then sends the obtained N electrical signals to the single-board interface chip.
  • the optical network device of this embodiment receives an optical signal through an optical transmission component and converts it into an electrical signal, receives another optical signal through another optical transmission component and converts it into another electrical signal, and then the processing chip pairs the two The electric signals are processed to obtain more N electric signals and output. Because the N electrical signals output by the processing chip are obtained by processing 2 electrical signals, this makes the number of optical transmission components connected to the processing chip less than N. There is no need to connect N optical transmission components to the processing chip, which reduces the number of optical transmission components. The number reduces costs.
  • FIG. 5 is a schematic structural diagram of a communication system according to an embodiment of the present application.
  • the communication system in this embodiment may include an optical network device 100 and an optical network device 200.
  • the optical network device 100 may adopt a structure as shown in FIG. 3, and the implementation principles are similar, and details are not described herein again.
  • the optical network device 200 may adopt a structure as shown in FIG. 4, and the implementation principles are similar, and the processing is not described again.
  • the optical network device 100 and the optical network device 200 can communicate through an optical fiber connection.
  • the optical network device 100 sends two optical signals to the optical network device 200.
  • the optical signal 1 may also be an optical signal 3
  • the optical signal 2 may be an optical signal 4
  • the electrical signal 1 may be an electrical signal 3
  • the electrical signal 2 may be an electrical signal 4.
  • N is equal to four. That is, the processing chip 110 in the optical network device 100 converts the four electrical signals received from the single-board interface chip into two electrical signals (electrical signal 1 and electrical signal 2), and then sends the electrical signal 1 to the optical transmission component 120. And sending the electrical signal 2 to the optical transmission component 130, the optical transmission component 120 converts the electrical signal 1 into the optical signal 1 and sends it to the optical network device 200 through the optical fiber 1, and the optical transmission component 130 converts the electrical signal 2 into an optical signal 2 and sends it to the optical network device 200 through the optical fiber 2.
  • optical transmission component 220 in the optical network device 200 and the optical transmission component 120 in the optical network device 100 are connected through an optical fiber, and the optical transmission component 230 in the optical network device 200 and the optical transmission component 130 in the optical network device 100 are connected through an optical fiber. connection.
  • the optical transmission component 220 in the optical network device 200 can receive the optical signal 1, convert the optical signal 1 into an electrical signal 1, and then send the optical signal 1 to the processing chip 210.
  • the optical transmission component 230 can receive the optical signal 2, convert the optical signal 2 into an electrical signal 2, and then send the optical signal 2 to the processing chip 210.
  • the processing chip 210 receives the electrical signal 1 from the optical transmission component 220 and the electrical signal 2 from the optical transmission component 230, a total of two electrical signals, and then processes the two electrical signals (electrical signal 1 and electrical signal 2) to obtain 4 electrical signals, and send the 4 electrical signals to the single board interface chip.
  • the processing chip needs to connect four optical transmission components to obtain four electrical signals.
  • the processing chip only needs to connect two optical transmission components to obtain four electrical signals, which reduces the number of optical transmission components. Reduced costs.
  • this application can be applied to 100GE optical modules, and can also be applied to include, but not limited to, 200GE optical modules and 400GE optical modules.
  • the solution of the present application can be integrated into two cases, used as a 200GE optical module alone, or used as two 100GE optical modules respectively.
  • the processing method is similar to the solution described below, except that when applied as a 200GE optical module, the processing chip needs to support both the 100GE interface and the 200GE interface.
  • the following uses a 100GE optical module as an example to further describe the embodiment of the present application.
  • the processing chip receives the four electrical signals sent by the single-board interface chip in at least two cases:
  • the processing chip 110 includes a CAUI-4 interface 111.
  • the processing chip 110 passes the CAUI-4 interface 111 Connect the single board interface chip.
  • the processing chip 210 includes a CAUI-4 interface 211.
  • the processing chip 210 is connected to the board interface chip through the CAUI-4 interface 111.
  • the processing chip 110 receives the four electrical signals (ie, the electrical signal A1 to the electrical signal A4) sent by the single-board interface chip through the one CAUI-4 interface 111. Accordingly, correspondingly, the processing chip 210 can output four electrical signals (that is, electrical signals A1 to A4) to the single-board interface chip through the CAUI-4 interface 211.
  • the bandwidth of each of the four electrical signals can be 25.78125G, and the bandwidth of the electrical signals 1 and 2 can be 53.125G.
  • the processing chip 110 includes two 50GAUI-2 interfaces, which are respectively denoted as 50GAUI-2 interface 112 and 50GAUI-2 interface 113.
  • the processing chip 110 is connected to the 50G single board interface chip through the 50GAUI-2 interface 112 and the 50GAUI-2 interface 113.
  • the processing chip 210 includes two 50GAUI-2 interfaces, which are denoted as 50GAUI-2 interface 212 and 50GAUI-2 interface 213, respectively.
  • the single board interface chip is a 50G single board interface chip
  • the processing chip 210 is connected to the 50G single board interface chip through the 50GAUI-2 interface 212 and the 50GAUI-2 interface 213.
  • one 50GAUI-2 interface can transmit two electrical signals. Therefore, the processing chip 110 can receive the single-board interface chip through the 50GAUI-2 interface 112 to send two electrical signals (that is, electrical signal A1 and electrical signal A2), and can pass through The 50GAUI-2 interface 113 receives a single board interface chip and sends two other electrical signals (ie, electrical signal A3 and electrical signal A4).
  • the processing chip 210 can send two electrical signals (that is, electrical signal A1 and electrical signal A2) to the single-board interface chip through the 50GAUI-2 interface 212, and can receive the single-board interface chip to send another two electrical signals through the 50GAUI-2 interface 213 (Ie, electrical signal A3 and electrical signal A4).
  • the bandwidth of each of the four electrical signals can be 26.5625G, and the bandwidth of the electrical signals 1 and 2 can be 53.125G.
  • the processing chip 110 may further include: two 50GAUI-1 interfaces, which are denoted as 50GAUI-1 interface 114 and 50GAUI-1 interface 115, respectively.
  • the processing chip 110 is connected to the optical transmission component 120 through a 50GAUI-1 interface 114, and the processing chip 110 is connected to the optical transmission component 130 through a 50GAUI-1 interface 115.
  • the processing chip 210 may further include: two 50GAUI-1 interfaces, which are respectively represented as a 50GAUI-1 interface 214 and a 50GAUI-1 interface 215.
  • the processing chip 210 is connected to the optical transmission component 220 through a 50GAUI-1 interface 214, and the processing chip 210 is connected to the optical transmission component 230 through a 50GAUI-1 interface 215.
  • Each 50GAUI-1 interface is used to transmit an electrical signal.
  • the processing chip 110 receives the four electrical signals (electrical signal A1 to electrical signal A4) output by the single-board interface chip (for example, after processing by PMA (20: 4)) through the CAUI-4 interface 111 After that, the processing chip 110 combines the electrical signals A1 to A4 into electrical signals 1 and 2 in one implementation manner:
  • the processing chip 110 further includes a first circuit, a second circuit, and a third circuit; the first circuit performs PMA processing and PCS conversion processing on the electrical signals A1 to A4 to obtain processed eight electrical signals.
  • the eight electrical signals are represented as electrical signals B1 to B8, respectively.
  • the second circuit performs FEC encoding and PMA (2: 2) processing on the electrical signals B1 to B4 to obtain the processed electrical signals C1 and C2. For example, the second circuit performs FEC on the electrical signals B1 to B4.
  • the second circuit performs FEC encoding on electrical signals B5 to B8 to obtain electrical signals E3 and E4.
  • PMA (2: 2) processing is performed on the electric signals E3 and E4 to obtain the electric signals C3 and C4.
  • the third circuit performs PMA (2: 1) processing on the electrical signals C1 and C2 to obtain the processed electrical signal 1, and performs PMA (2: 1) processing on the electrical signals C3 and C4 to obtain processing. After the electric signal 2.
  • the first circuit performs PMA processing and PCS conversion processing on the electrical signals A1 to A4, and obtains the electrical signals B1 to B8. Specifically, the first circuit first performs the electrical signals A1 to A4. Perform PMA (20: 4) processing to obtain processed 20 electrical signals, and the processed 20 electrical signals are respectively expressed as electrical signals D1 to D20; and then perform the electrical signals D1 to D20 The PCS conversion process obtains the electrical signals B1 to B8. Alternatively, the first circuit first performs PMA (16: 4) processing on the electrical signals A1 to A4 to obtain processed 16 electrical signals, and the processed 20 electrical signals are respectively expressed as electrical signals D1 to Electrical signal D16; and then performing a PCS conversion process on the electrical signals D1 to D16 to obtain the electrical signals B1 to B8.
  • the processing chip 110 combines the four electrical signals into two electrical signals.
  • the processing chip 210 After the processing chip 210 receives the electrical signal 1 sent by the optical transmission component 220 and the electrical signal 2 sent by the optical transmission component 230, the processing chip 210 processes the electrical signal 1 and the electrical signal 2,
  • One way to achieve the four electrical signals can be:
  • the processing chip 210 further includes a first circuit, a second circuit, and a third circuit.
  • the third circuit performs PMA (2: 1) processing on the electrical signal 1 to obtain two electrical signals, which are expressed as electrical signal C1 and electrical signal C2; and performs PMA (2: 1) processing on the electrical signal 2 to obtain two Electrical signals, expressed as electrical signal C3 and electrical signal C4.
  • the second circuit performs PMA (2: 2) processing and FEC decoding on the electrical signals C1 and C2, and obtains four electrical signals, which are expressed as electrical signals B1 to B4. For example, the second circuit performs electrical signals C1 and electrical signals.
  • Signal C2 performs PMA (2: 2) processing to obtain electrical signal E1 and electrical signal E2, and then performs FEC decoding on electrical signal E1 and electrical signal E2 to obtain electrical signal B1 to electrical signal B4; and the second circuit performs electrical signal C3 And C4 perform PMA (2: 2) processing and FEC decoding to obtain 4 electrical signals, which are expressed as electrical signals B5 to B8.
  • the second circuit performs PMA (2: 2) on electrical signals C3 and C4. Processing to obtain electrical signals E3 and E4, and then perform FEC decoding on electrical signals E3 and E4 to obtain electrical signals B5 to B8.
  • the first circuit performs a PCS conversion process and a PMA process on the electrical signals B1 to B8, and obtains four electrical signals, which are expressed as electrical signals A1 to A4.
  • the first circuit is configured to perform PCS conversion processing and PMA processing on the electrical signals B1 to B8.
  • Obtaining the electrical signals A1 to A4 specifically includes: the first circuit performs PCS conversion on the electrical signals B1 to B8. Processing to obtain processed 20 electrical signals, and the processed 20 electrical signals are respectively expressed as electrical signals D1 to D20; and then perform PMA (20: 4) processing on the electrical signals D1 to D20 To obtain the electrical signals A1 to A4.
  • the first circuit performs a PCS conversion process on the electric signals B1 to B8 to obtain processed 16 electric signals, and the processed 16 electric signals are respectively expressed as electric signals D1 to D16;
  • the electrical signals D1 to D16 are subjected to PMA (16: 4) processing to obtain the electrical signals A1 to A4.
  • the processing chip 210 obtains 4 electric signals according to the 2 electric signals.
  • the processing chip 110 is an oDSP chip as an example.
  • the single-board interface chip is a 100G single-board interface chip
  • the first circuit, the second circuit, and the third circuit in the processing chip 110 all work.
  • the single-board interface chip will send the four electrical signals obtained through 100GE PMA (20: 4) processing, that is, electrical signals A1 to A4, to the processing chip 110 through the CAUI-4 interface 111.
  • a circuit performs 100GE PMA (20: 4) processing on the electrical signals A1 to A4, and obtains 20 electrical signals (represented as electrical signals D1 to D20.
  • the first circuit then performs the electrical signals D1 to D20 Perform the PCS conversion of 100GE / 2 * 50GE to obtain 8 electrical signals, which are expressed as electrical signals B1 to B8.
  • the second circuit performs 50G FEC encoding on electrical signals B1 to B4 and then performs 50G PMA (2: 1) Obtain 2 electrical signals, expressed as electrical signal C1 and electrical signal C2, and perform 50G FEC encoding on electrical signals B5 to B8, and then execute 50G PMA (2: 2) to obtain 2 electrical signals, expressed as electrical The signal C3 and the electric signal C4.
  • the third circuit processes the electric signal C1 and the electric signal C2 to perform 50G PMA (2: 1), obtains the electric signal 1, and executes the electric signal C3 and electric signal C4 to 50G PMA (2: 1) Process to obtain electrical signal 2.
  • the processing chip 110 sends electrical signal 1 to the optical transmission component 120 through the 50GAUI-1 interface 114, and processes The chip 110 sends the electrical signal 2 to the optical transmission component 130 through the 50GAUI-1 interface 115.
  • the optical transmission component 120 converts the electrical signal 1 to the optical signal 1 and then sends the optical signal 1 to the optical network device 200 through the optical fiber 1, where the optical transmission component 130
  • the electrical signal 2 is converted into an optical signal 2 and then transmitted to the optical network device 200 through the optical fiber 2.
  • the single-board interface chip is a 100G single-board interface chip
  • the first circuit, the second circuit, and the third circuit in the processing chip 210 all work.
  • the optical transmission component 220 in the optical network device 200 receives the optical signal 1 through the optical fiber 1, converts the optical signal 1 into an electrical signal 1, and then sends the electrical signal 1 to the processing chip 210 through the 50GAUI-1 interface 214; and the optical transmission component 230
  • the optical signal 2 is received through the optical fiber 2, the optical signal 2 is converted into an electric signal 2, and then the electric signal 2 is sent to the processing chip 210 through the 50GAUI-1 interface 215.
  • the third circuit of the processing chip 210 performs 50G PMA (2: 1) processing on the electric signal 1 to obtain 2 electric signals, which are expressed as the electric signal C1 and the electric signal C2, and performs 50G PMA (2: 1) on the electric signal 2. After processing, two electric signals are obtained, which are expressed as electric signal C3 and electric signal C4, and a total of four electric signals can be obtained.
  • the second circuit performs 50G PMA (2: 2) processing on the electrical signals C1 and C2 and then performs 50G FEC decoding to obtain 4 electrical signals, which are expressed as electrical signals B1 to B4, and electrical signals C3 and electrical Signal C4 performs 50G PMA (2: 2) processing and then performs 50G FEC decoding to obtain 4 electrical signals, which are expressed as electrical signals B5 to B8.
  • the first circuit performs a PCS conversion of 100GE / 2 * 50GE on the obtained electrical signals B1 to B8, and obtains 20 electrical signals, expressed as electrical signals D1 to D20, and then performs 100GE on electrical signals D1 to D20.
  • PMA (20: 4) processing to obtain 4 electrical signals, expressed as electrical signals A1 to A4.
  • the processing chip 210 then sends the electrical signals A1 to A4 to the single interface chip through the CAUI-4 interface 211.
  • the processing chip 110 receives the two electrical signals (electrical signal A1 and electrical signal A2) sent by the single-board interface chip (for example, after processing through 50G PMA (2: 1)) through the 50GAUI-2 interface 113. After receiving the two electrical signals (electrical signal A3 and electrical signal A4) sent by the single-board interface chip (for example, processed through 50G PMA (2: 1)) through the 50GAUI-2 interface 114, the processing chip 110 will receive the electrical signals
  • An implementation manner in which the signal A1 to the electric signal A4 are combined into the electric signal 1 and the electric signal 2 may be:
  • the processing chip 110 further includes a third circuit; the third circuit performs PMA (2: 1) processing on the electric signal A1 and the electric signal A2 to obtain the processed electric signal 1; and the electric signal A3 and the electric signal A3.
  • the signal A4 performs PMA (2: 1) processing to obtain the processed electrical signal 2.
  • the processing chip 110 combines the four electrical signals into two electrical signals.
  • the processing chip 210 After the processing chip 210 receives the electrical signal 1 sent by the optical transmission component 220 and the electrical signal 2 sent by the optical transmission component 230, the processing chip 210 processes the electrical signal 1 and the electrical signal 2,
  • One way to achieve the four electrical signals can be:
  • the processing chip 210 further includes a third circuit.
  • the third circuit performs PMA (2: 1) processing on the electric signal 1 to obtain the electric signal A1 and the electric signal A2; and performs PMA (2: 1) processing on the electric signal 2 to obtain the electric signal A3 and the electric signal A4.
  • the processing chip 210 obtains 4 electric signals according to the 2 electric signals.
  • FIG. 9 describes a processing process of the processing chip 110 and the processing chip 210 by using a specific example.
  • the single-board interface chip is a 50G single-board interface chip
  • the third circuit in the processing chip 110 works.
  • the single-board interface chip will send the electrical signals A1 and A2 obtained after processing through 50GE PMA (2: 2), and send them to the processing chip 110 through 50GAUI-2 interface 112, and will process them through 50GE PMA (2: 1).
  • the electrical signals A3 and A4 obtained afterwards are sent to the processing chip 110 through the 50GAUI-2 interface 113.
  • the processing chip 110 performs 50G PMA (2: 1) processing on the electric signal A1 and the electric signal A2 to obtain the electric signal 1, and performs 50G PMA (2: 1) processing on the electric signal A3 and the electric signal A4 to obtain the electric signal 2. That is, a total of 2 electrical signals are obtained.
  • the processing chip 110 sends the electrical signal 1 to the optical transmission component 120 through the 50GAUI-1 interface 114, and sends the electrical signal 2 to the optical transmission component 130 through the 50GAUI-1 interface 115.
  • the optical transmission component 120 converts the electrical signal 1 into the optical signal 1 and sends it to the optical network device 200 through the optical fiber 1.
  • the optical transmission component 130 converts the electrical signal 2 into the optical signal 2 and then sends it to the optical network device through the optical fiber 2. 200.
  • the third circuit in the processing chip 210 works.
  • the optical transmission component 220 in the optical network device 200 receives the optical signal 1 through the optical fiber 1, converts the optical signal 1 into an electrical signal 1, and then sends the electrical signal 1 to the processing chip 210 through the 50GAUI-1 interface 214; and the optical transmission component 230
  • the optical signal 2 is received through the optical fiber 2, the optical signal 2 is converted into an electric signal 2, and then the electric signal 2 is sent to the processing chip 210 through the 50GAUI-1 interface 215.
  • the third circuit of the processing chip 210 performs 50G PMA (2: 1) processing on the electric signal 1 to obtain 2 electric signals, which are expressed as the electric signal A1 and the electric signal A2, and performs 50G PMA (2: 1) on the electric signal 2. Processing, two electrical signals are obtained, which are expressed as electrical signal A3 and electrical signal A4.
  • the processing chip 210 then sends the electrical signal A1 and the electrical signal A2 to the single interface chip through the 50GAUI-2 interface 214, and sends the electrical signal A3 and the electrical signal A4 to the single interface chip through the 50GAUI-2 interface 215.
  • the PMA (2: 1) processing mentioned in the above embodiments includes PAM4 processing.
  • the PAM4 processing can achieve the effect of doubling the effective bandwidth without increasing the symbol frequency of the signal.
  • the above-mentioned processing chip may include a CAUI-4 interface (indicating that it works in 1 * 100GE mode) and a 2 * 50GAUI-2 interface (indicating that it works in 2 * 50GE mode).
  • the management control module learns the working mode through the management interface. After learning the working mode, it controls two selectors through a management control signal. As shown in FIG. 10, when the management control module learns that the working mode is 1 * 100GE mode through the management interface, The management control module controls the upper selector in the diagram to select the CAUI-4 interface between the board interface chip and the oDSP chip, and the lower selector in the control diagram selects the input processed by PMA (2: 1) as PMA (2 : 2).
  • the management control module When the management control module learns that the working mode is 2 * 50GE mode through the management interface, the management control module controls the upper selector in the diagram to select the 50GAUI-2 interface between the board interface chip and the oDSP chip to work, and the lower one in the control diagram.
  • the selector selects the input of PMA (2: 1) as the electrical signal received by the oDSP chip through the 50GAUI-2 interface.
  • optical transmission component The structure of the optical transmission component is described below.
  • FIG. 11 is a schematic structural diagram of a communication system according to another embodiment of the present application.
  • the optical transmission component 120 of this embodiment may include: The conversion module 121 and an optical multiplexer 122 connected to the electro-optical conversion module 121.
  • the electro-optical conversion module 121 converts the electrical signal 1 into an optical signal 1, and the optical multiplexer 122 sends the optical signal 1 to the optical network device 200.
  • the optical transmission component 130 in this embodiment may include an electro-optical conversion module 131 and an optical multiplexer 132 connected to the electro-optical conversion module 131.
  • the electro-optical conversion module 131 converts the electrical signal 2 into an optical signal 2, and the optical multiplexer 132 sends the optical signal 2 to the optical network device 200.
  • the electro-optic conversion module may be a laser.
  • the optical transmission component 220 in this embodiment may include a light detector 221 and an optical multiplexer 222 connected to the light detector.
  • the optical multiplexer 222 receives the optical signal 1 and sends the optical signal 1 to the optical detector 221; the optical detector 221 converts the optical signal 1 into the electrical signal 1 and converts the electrical signal 1 1 is sent to the processing chip 210.
  • the optical transmission component 230 in this embodiment may include a light detector 231 and an optical multiplexer 232 connected to the light detector 231.
  • the optical multiplexer 232 receives the optical signal 2 and sends the optical signal 2 to the optical detector 231; the optical detector 231 converts the optical signal 2 into the electrical signal 2 and converts the electrical signal 2 is sent to the processing chip 210.
  • the optical transmission component 220 may further include a transimpedance amplifier 223 that is connected to the photodetector 221.
  • the photodetector 221 outputs the converted electrical signal 1 to a transimpedance amplifier 223.
  • the transimpedance amplifier 223 amplifies the electrical signal 1, and then sends the amplified electrical signal 1 to the processing chip 210.
  • the optical transmission component 230 may further include a transimpedance amplifier 233 connected to the photodetector 231.
  • the photodetector 231 outputs the converted electrical signal 2 to a transimpedance amplifier 233.
  • the transimpedance amplifier 233 amplifies the electrical signal 2 and then sends the amplified electrical signal 2 to the processing chip 210.
  • the optical transmission component 220 further includes an electro-optical conversion module 224 connected to the optical multiplexer 222
  • the optical transmission component 230 further includes an electro-optical conversion module 234 connected to the optical multiplexer 232.
  • the processing chip 210 is further configured to receive N electrical signals sent by a single-board interface chip, process the N electrical signals, and convert the received N electrical signals into two electrical signals. The two electrical signals are denoted as electrical signal 5 and electrical signal 6, respectively.
  • the electro-optical conversion module 224 is configured to convert the electrical signal 5 into an optical signal 5; the optical multiplexer 222 is further configured to send the optical signal 5.
  • the electro-optical conversion module 234 is configured to convert the electrical signal 6 into an optical signal 6; the optical multiplexer 232 is further configured to send the optical signal 6.
  • the optical transmission component 120 further includes a light detector 123 connected to the optical multiplexer 122
  • the optical transmission component 130 further includes a light detector 133 connected to the optical multiplexer 132.
  • the optical multiplexer 122 is configured to receive the optical signal 5 sent by the optical network device 200 and output the optical signal 5 to the optical detector 123; the optical detector 123 is configured to output the optical signal 5 turns into electrical signal 5.
  • the optical multiplexer 132 is configured to receive the optical signal 6 sent by the optical network device 200 and output the optical signal 6 to the light detector 133; the light detector 133 is configured to output the light The signal 6 is converted into an electric signal 6.
  • the optical transmission component 120 in this embodiment further includes a transimpedance amplifier 124 connected to the photodetector 123.
  • the photodetector 123 outputs the converted electrical signal 5 to a transimpedance amplifier 124, and the transimpedance amplifier 124 amplifies the electrical signal 5, and then sends the amplified electrical signal 5 to the processing chip 110.
  • the optical transmission component 130 may further include a transimpedance amplifier 134 connected to the photodetector 133.
  • the photodetector 133 outputs the converted electrical signal 6 to a transimpedance amplifier 134, and the transimpedance amplifier 134 amplifies the electrical signal 6, and then sends the amplified electrical signal 6 to the processing chip 110.
  • the processing chip is configured to process the electrical signals 5 and 6 to obtain N electrical signals, and send the N electrical signals to a board interface chip.
  • This embodiment is described in the direction in which the optical network device 200 sends signals and the direction in which the optical network device 100 receives signals.
  • the optical multiplexer 122 can send the optical signal 1 or receive the optical signal 5, the optical multiplexer 132 can send the optical signal 2 or the optical signal 6, and the optical multiplexer 222 can receive the optical signal 1 or the optical signal 5.
  • the optical multiplexer 232 may receive the optical signal 2 or transmit the optical signal 6.
  • the wavelength of the optical signal sent by the same optical multiplexer is different from the wavelength of the received optical signal. Therefore, the above-mentioned The wavelength of the optical signal 1 is different from the wavelength of the optical signal 5, and the wavelength of the optical signal 2 is different from the wavelength of the optical signal 6.
  • each optical transmission component can send and receive optical signals from the outside, and the wavelength of the optical signal received by each optical transmission component is different from the wavelength of the transmitted optical signal, in order to ensure the optical network device 100
  • Two optical fibers can still be used to communicate with the optical network device 200.
  • One optical transmission component in the optical network device is connected to one optical fiber, and the other optical transmission component is connected to the other optical fiber. If one of the optical fibers fails, Another optical fiber can also realize the sending and receiving function, ensuring the normal communication between the two optical network devices, and the same optical fiber has both the sending direction and the receiving direction, which can ensure the consistency of delay.
  • the electro-optical conversion module 121 in the optical transmission module 120 converts an electrical signal into an optical signal with a wavelength of ⁇ 1
  • the optical multiplexer 122 includes, for example, a lens that can transmit a ⁇ 1 wavelength and reflect a ⁇ 2 wavelength, so if the optical multiplexer 122 receives An optical signal with a wavelength of ⁇ 1 is transmitted and transmitted to the optical network device 200 through an optical fiber. If the electric-optical conversion module 122 receives an optical signal with a wavelength of ⁇ 2, it is reflected to the optical detector 123.
  • ⁇ 1 1295.56nm
  • ⁇ 2 1309.14nm, but this embodiment is not limited to this.
  • the wavelength of the optical signal 1 is the same as the wavelength of the optical signal 6; the wavelength of the optical signal 2 is the same as the wavelength of the optical signal 5.
  • the wavelength of the optical signal 1 sent by the optical transmission component 120 is ⁇ 1, the wavelength of the received optical signal 5 is ⁇ 2; the wavelength of the optical signal 6 received by the optical transmission component 130 is ⁇ 1
  • the wavelength of the transmitted optical signal 5 is ⁇ 2.
  • the wavelength of the optical signal 6 sent by the optical transmission component 230 is ⁇ 1, the wavelength of the received optical signal 2 is ⁇ 2; the wavelength of the optical signal 1 received by the optical transmission component 220 is ⁇ 1, and the sent optical signal 5
  • the wavelength is ⁇ 2. Therefore, the optical network device 100 shown in FIG. 11 is the same as the upper optical transmission component in the optical network device 200, and the lower optical transmission component is the same. Therefore, it is not necessary to distinguish between the two when the optical network device 100 and the optical network device 200 communicate through optical fibers.
  • the optical network device avoids the problem of single-fiber bidirectional pairing and use in the prior art, and does not need to change user habits.
  • the optical network device uses single-fiber bidirectional technology, so in other application scenarios that have high requirements for fiber symmetry, such as 1588 services, the 1588 packet interaction between network elements at both ends requires the path length in the sending and receiving directions. Consistent, the larger the length difference, the worse the performance.
  • the optical signals in the transmitting and receiving directions are transmitted on the same optical fiber, which does not introduce the problem of unequal length of the optical fibers in the transmitting and receiving directions, and can achieve better 1588 performance.
  • the light transmission component 120, the light transmission component 130, the light transmission component 220, and the light transmission component 230 are respectively packaged by TO.
  • the optical transmission module 120 is taken as an example for description.
  • the photodetector 123 and the transimpedance amplifier 124 in the optical transmission module can be packaged together as a module through TO.
  • the electro-optical conversion module 121 can also be packaged as a module through TO.
  • This TO packaging process has a very complete industrial chain.
  • all modules that convert light to electricity in an optical network device are generally packaged together through a BOX.
  • all modules that are converted to electricity are packaged together through a BOX.
  • This packaging form is relative to the processing technology.
  • the TO package is much more complicated, and the corresponding corresponding cost is also much higher. Therefore, using the TO package in this embodiment can achieve a very low cost.
  • embodiments of the present application can be applied to 100GBASE-ER4, 40GE, 100G OTU4 interfaces, etc., to reduce costs.
  • an embodiment of the present application further provides an optical module, which includes an optical network device.
  • the optical network device may adopt the structure of the optical network device 100 or the optical network device 200 described above, and its implementation principles and technical effects are similar. Here, No longer.
  • FIG. 12 is a flowchart of a signal processing method according to an embodiment of the present application.
  • the method in this embodiment can be applied to a first optical network device.
  • the first optical network device includes a processing chip, a first An optical transmission component and a second optical transmission component, and an input terminal of the first optical transmission component is coupled to an output terminal of the processing chip, and an input terminal of the second optical transmission component is connected to an output terminal of the processing chip coupling.
  • the method may include:
  • the processing chip receives N electrical signals sent by the board interface chip.
  • N is an integer greater than two.
  • the processing chip processes the N electrical signals, and converts the received N electrical signals into two electrical signals, where the two electrical signals are respectively represented as a first electrical signal and a second electrical signal.
  • the processing chip sends the first electrical signal and the second electrical signal to the first optical transmission component and the second optical transmission component, respectively.
  • the first optical transmission component converts the first electrical signal into a first optical signal.
  • the second optical transmission component converts the second electrical signal into a second optical signal.
  • S1204 and S1205 are executed in no particular order.
  • the processing chip may be the processing chip 110 in the foregoing embodiment
  • the first optical transmission component may be the optical transmission component 120 in the foregoing embodiment
  • the first electrical signal may be the electrical signal 1 in the foregoing embodiment.
  • the signal may be the optical signal 1 in the foregoing embodiment
  • the second optical transmission component may be the optical transmission component 130 in the foregoing embodiment
  • the second electrical signal may be the electrical signal 2 in the foregoing embodiment
  • the second optical signal may be Optical signal 2 in the above embodiment.
  • FIG. 13 is a flowchart of a signal processing method according to another embodiment of the present application.
  • the method in this embodiment can be applied to a second optical network device.
  • the second optical network device includes a processing chip, A first optical transmission component and a second optical transmission component, and an output terminal of the first optical transmission component is coupled to an input terminal of the processing chip, and an output terminal of the second optical transmission component is connected to an input of the processing chip Terminal coupling.
  • the method may include:
  • the first optical transmission component converts the first optical signal into a first electrical signal, and sends the first electrical signal to a processing chip.
  • the second optical transmission component converts the second optical signal into a second electrical signal and sends the second optical signal to the processing chip.
  • S1301 and S1302 are executed in no particular order.
  • the processing chip receives the first electrical signal sent by the first optical transmission component and the second electrical signal sent by the second optical transmission component.
  • the processing chip processes the first electrical signal and the second electrical signal, and sends the N electrical signals obtained after the processing to the board interface chip.
  • N is an integer greater than two.
  • the processing chip may be the processing chip 210 in the foregoing embodiment
  • the first optical transmission component may be the optical transmission component 220 in the foregoing embodiment
  • the first electrical signal may be the electrical signal 1 or the electrical signal 3 in the foregoing embodiment.
  • the first optical signal may be the optical signal 1 or the optical signal 3 in the foregoing embodiment
  • the second optical transmission component may be the optical transmission component 230 in the foregoing embodiment
  • the second electrical signal may be the electrical signal in the foregoing embodiment. 2 or electrical signal 4
  • the second optical signal may be the optical signal 2 or the optical signal 4 in the above embodiment.
  • the units described as separate components may or may not be physically separated.
  • a component displayed as a unit may or may not be a physical unit. It can be located in one place or distributed across multiple network elements. Some or all of the units may be selected according to actual needs to achieve the objective of the solution of this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each of the units may exist separately physically, or two or more units may be integrated into one unit.
  • the above-mentioned integrated unit may be implemented in the form of hardware, or in the form of hardware combined with software.

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Abstract

本申请实施例提供一种光网络装置和光模块，光网络装置包括：处理芯片、第一光传输组件以及第二光传输组件；处理芯片用于：接收单板接口芯片发送的N个电信号，N为大于2的整数，将接收到的N个电信号转换为两个电信号，分别表示为第一电信号和第二电信号；以及将第一电信号和第二电信号分别发送给第一光传输组件和第二光传输组件；第一光传输组件用于将第一电信号转换成第一光信号；第二光传输组件用于将第二电信号转换成第二光信号。由于处理芯片获取的待发送的N个电信号做了合并处理，这样使得处理芯片连接的光传输组件只有两个，所以无需处理芯片必须连接4个光传输组件，减少了光传输组件的数量，降低了成本。

Description

一种光网络装置和光模块
本申请要求于2018年06月21日提交中国国家知识产权局、申请号为201810644555.8、申请名称为“一种光网络装置和光模块”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及通信技术领域，尤其涉及一种光网络装置和光模块。
背景技术
随着5G时代的到来，对网络带宽的诉求越来越高，100GE接口，200GE接口以及400GE接口等高速接口的应用越来越广泛。以100GE接口为例，目前为了实现100GE接口的通信，在发送方向上，光网络设备的使用4个光发送器(Optical Transmitter)，采用不归零码(Non-Retum to Zero，NRZ)编码实现将4*25.78125G的电信号转换为光信号，然后通过oMUX实现合波，即将4*25.78125G的4个光信号通过同一根光纤传输。在接收方向上，光网络设备通过同一根光纤接收4*25.78125G的4个光信号，然后采用4个光接收机(Optical receiver)，将4*25.78125G的光信号恢复为电信号。
但是，光网络设备的成本主要体现在光发送器和光接收器上，而目前为了支持100GE以上的光接口，光网络设备中的光发送器和光接收器均为4个，因此光网络设备中的光发送器和光接收器的数量较多，成本较高。
发明内容
本申请实施例提供一种光网络装置和光模块，用于降低光传输组件的数量，降低成本。
第一方面，本申请实施例提供一种光网络装置，用作第一光网络装置，包括：处理芯片、第一光传输组件以及第二光传输组件；其中，
所述处理芯片用于：
接收单板接口芯片发送的N个电信号，其中，N为大于2的整数；
对所述N个电信号进行处理，将接收到的所述N个电信号转换为两个电信号，所述两个电信号分别表示为第一电信号和第二电信号；以及
将所述第一电信号和所述第二电信号分别发送给所述第一光传输组件和所述第二光传输组件；
所述第一光传输组件用于将所述第一电信号转换成第一光信号，所述第一光传输组件的输入端与所述处理芯片的输出端耦合；
所述第二光传输组件用于将第二电信号转换成第二光信号，所述第二光传输组件的输入端与所述处理芯片的输出端耦合。
由于处理芯片获取的待发送的N个电信号做了合并处理，这样使得处理芯片连接的光传输组件只有两个，所以无需处理芯片必须连接N个光传输组件，减少了光传输组件的数 量，降低了成本。
在一种可能的设计中，所述处理芯片包括100Gbps附属单元接口(100Gbps Attachment Unit Interface，CAUI)-4接口，当所述单板接口芯片是100G单板接口芯片时，所述处理芯片通过所述CAUI-4接口连接所述100G单板接口芯片。
在一种可能的设计中，所述单板接口芯片是100G单板接口芯片，N＝4，所述N个电信号分别表示为电信号A1至电信号A4，所述处理芯片还包括第一电路、第二电路和第三电路；
所述第一电路用于对所述电信号A1至电信号A4执行物理媒体附加(Physical Medium Attachment，PMA)处理和物理编解码子层(Physical Coding Sublayer，PCS)转换处理，得到处理后的8个电信号，所述处理后的8个电信号分别表示为电信号B1至电信号B8；
所述第二电路用于对电信号B1至电信号B4执行前向纠错(Forward Error Correction，FEC)编码以及PMA(2:2)处理，得到处理后的电信号C1和电信号C2；
所述第二电路还用于以及对电信号B5至电信号B8执行FEC编码以及PMA(2:2)处理，获得处理后电信号C3和电信号C4；
所述第三电路用于对电信号C1和电信号C2执行PMA(2:1)处理，得到处理后的所述第一电信号；
所述第三电路还用于对电信号C3和电信号C4执行PMA(2:1)处理，得到处理后的所述第二电信号。
在一种可能的设计中，所述第一电路用于对所述电信号A1至电信号A4执行PMA处理和PCS转换处理，得到所述电信号B1至电信号B8具体包括：
所述第一电路对所述电信号A1至电信号A4执行PMA(20:4)处理，得到处理后的20个电信号，所述处理后的20个电信号分别表示为电信号D1至电信号D20；
所述第一电路对所述电信号D1至电信号D20执行PCS转换处理，得到所述电信号B1至电信号B8。
在一种可能的设计中，所述处理芯片包括2个50Gbps附属单元接口(50Gbps Attachment Unit Interface，50GAUI)-2接口，所述2个50GAUI-2接口分别表示为第一50GAUI-2接口和第二50GAUI-2接口，当所述单板接口芯片为50G单板接口芯片时，所述处理芯片通过所述第一50GAUI-2接口和第二50GAUI-2接口连接所述50G单板接口芯片。
在一种可能的设计中，所述单板接口芯片是50G单板接口芯片，所述N等于4，所述N个电信号分别表示为电信号A1至电信号A4；
所述处理芯片通过所述第一50GAUI-2接口接收所述电信号A1和电信号A2；
所述处理芯片通过所述第二50GAUI-2接口接收所述电信号A3和电信号A4；
所述处理芯片还包括第三电路，所述第三电路用于：
对所述电信号A1和电信号A2执行PMA(2:1)处理，得到处理后的所述第一电信号；
对所述电信号A3和电信号A4执行PMA(2:1)处理，得到处理后的所述第二电信号。
在一种可能的设计中，所述处理芯片包括2个50GAUI-1接口，所述2个50GAUI-1接口分别表示为第一50GAUI-1接口和第二50GAUI-1接口；
所述处理芯片通过所述第一50GAUI-1接口与所述第一光传输组件连接，以及通过所述第二50GAUI-1接口与所述第二光传输组件连接。
在一种可能的设计中，所述第一光传输组件包括第一电光转换模块以及与所述第一电光转换模块连接的第一光复用器，所述第一光转换模块用于将所述第一电信号转为所述第一光信号，所述第一光复用器用于向第二光网络装置发送所述第一光信号；
所述第二光传输组件包括第二电光转换模块以及与所述第二电光转换模块连接的第二光复用器，所述第二光转换模块用于将所述第二电信号转为所述第二光信号，所述第二光复用器用于向所述第二光网络装置发送所述第二光信号。
在一种可能的设计中，所述第一光传输组件还包括：与所述第一光复用器连接的第一光探测器，所述第二光传输组件还包括与所述第二光复用器连接的第二光探测器；
所述第一光复用器，用于接收所述第二光网络装置发送的第三光信号，并将所述第三光信号输出给所述第一光探测器；所述第一光探测器，用于将所述第三光信号转换为第三电信号；
所述第二光复用器，用于接收所述第二光网络装置发送的第四光信号，将所述第四光信号输出给所述第二光探测器；所述第二光探测器，用于将所述第四光信号转换为第四电信号；
所述处理芯片，用于对所述第三电信号和所述第四电信号进行处理，并将处理后得到的N个电信号发送给单板接口芯片；
所述第一光信号与所述第三光信号的波长不同，所述第一光信号的波长与所述第四光信号的波长相同；
所述第二光信号与所述第四光信号的波长不同，所述第二光信号的波长与所述第三光信号的波长相同。
因此，光网络装置不仅可以发送光信号也可以接收光信号，而且第一光传输组件与第二光传输组件分别连接不同的光纤，所以光网络装置可以复用现有技术中的光纤进行通信，而且如果其中一根光纤出现了故障，通过另一根光纤也能实现收发功能，保证了两个光网络装置之间的正常通信，而且同一光纤中既有发送方向也有接收方向，可以保证时延一致性。另外第一光传输组件发送的光信号的波长与第二光传输组件接收的光信号的波长相同、第一光传输组件接收的光信号的波长与第二光传输组件发送的光信号的波长相同，因此在光网络装置与另一光网络装置通过光纤通信时无需区分两个光网络装置，避免了现有技术中单纤双向需要配对使用的问题，不需要改变用户习惯。
在一种可能的设计中，所述第一光传输组件和所述第二光传输组件分别通过同轴型晶体管封装(Transistor Outline Packet，TO封装)。TO封装与现有技术中的BOX封装相比，工艺具备完善的产业链，成本较低。
第二方面，本申请实施例提供一种光网络装置，用于第二光网络装置，包括：处理芯片、第一光传输组件以及第二光传输组件；其中，
所述第一光传输组件，用于将第一光信号转换为第一电信号，并发送给所述处理芯片，所述第一光传输组件的输出端与所述处理芯片的输入端耦合；
所述第二光传输组件，用于将第二光信号转换为第二电信号，并发送给所述处理芯片，所述第二光传输组件的输出端与所述处理芯片的输入端耦合；
所述处理芯片用于：
接收所述第一光传输组件发送的第一电信号以及所述第二光传输组件发送的第二电信号；
对所述第一电信号和所述第二电信号进行处理，并将处理后得到的所述N个电信号发送给单板接口芯片，其中，N为大于2的整数。
由于处理芯片输出的N个电信号是由2个电信号处理得到的，这样使得处理芯片连接的光传输组件的数量少于N，无需处理芯片必须连接N个光传输组件，减少了光传输组件的数量，降低了成本。
在一种可能的设计中，所述处理芯片包括CAUI-4接口；
当所述单板接口芯片是100G单板接口芯片时，所述处理芯片通过所述CAUI-4接口连接所述100G单板接口芯片。
在一种可能的设计中，所述单板接口芯片是100G单板接口芯片，N＝4，所述N个电信号分别表示为电信号A1至电信号A4，所述处理芯片还包括第一电路、第二电路和第三电路；
所述第三电路用于对所述第一电信号执行PMA(2:1)处理，获得电信号C1和电信号C2；
所述第三电路还用于对所述第二电信号执行PMA(2:1)处理，获得电信号C3和电信号C4；
所述第二电路用于对电信号C1和电信号C2执行PMA(2:2)处理以及FEC编码，获得电信号B1至电信号B4；
所述第二电信号还用于对电信号C3和C4执行PMA(2:2)处理以及FEC编码，获得电信号B5至电信号B8；
所述第一电路用于对电信号B1至电信号B8执行PCS转换处理和PMA处理，获得所述电信号A1至电信号A4。
在一种可能的设计中，所述第一电路用于对电信号B1至电信号B8执行PCS转换处理和PMA处理，获得所述电信号A1至电信号A4具体包括：
所述第一电路对电信号B1至电信号B8执行PCS转换处理，获得处理后的20个电信号，所述处理后的20个电信号分别表示为电信号D1至电信号D20；
所述第一电路对所述电信号D1至电信号D20执行PMA(20:4)处理，获得所述电信号A1至电信号A4。
在一种可能的设计中，所述处理芯片包括2个50GAUI-2接口，所述2个50GAUI-2接口分别表示为第一50GAUI-2接口和第二50GAUI-2接口，当所述单板接口芯片为50G单板接口芯片时，所述处理芯片通过所述第一50GAUI-2接口和第二50GAUI-2接口连接所述50G单板接口芯片。
在一种可能的设计中，所述单板接口芯片是50G单板接口芯片，所述N等于4，所述N个电信号分别表示为电信号A1至电信号A4；
所述处理芯片通过所述第一50GAUI-2接口发送所述电信号A1和电信号A2；
所述处理芯片通过所述第二50GAUI-2接口发送所述电信号A3和电信号A4
所述处理芯片还包括第三电路，所述第三电路用于：
对所述第一电信号执行PMA(2:1)处理，得到电信号A1和电信号A2；
对所述第二电信号执行PMA(2:1)处理，得到电信号A3和电信号A4。
在一种可能的设计中，所述处理芯片包括2个50GAUI-1接口，所述2个50GAUI-1接口分别表示为第一50GAUI-1接口和第二50GAUI-1接口；
所述处理芯片通过所述第一50GAUI-1接口与所述第一光传输组件连接，以及通过所述第二50GAUI-1接口与所述第二光传输组件连接。
在一种可能的设计中，所述第一光传输组件包括第一光探测器以及与所述第一光探测器连接的第一光复用器，所述第一光复用器，用于接收所述第一光信号，将所述第一光信号发送给所述第一光探测器；所述第一光探测器，用于将所述第一光信号转换为所述第一电信号；
所述第二光传输组件包括第二光探测器以及与所述第二光探测器连接的第二光复用器，所述第二光复用器，用于接收所述第二光信号，将所述第二光信号发送给所述第二光探测器；所述第二光探测器，用于将所述第二光信号转换为所述第二电信号。
在一种可能的设计中，所述第一光传输组件还包括与所述第一光复用器连接的第一电光转换模块，所述第二光传输组件还包括与所述第二光复用器连接的第二电光转换模块；
所述处理芯片，还用于接收单板接口芯片发送的N个电信号，对所述N个电信号进行处理，将接收到的所述N个电信号转换为两个电信号，所述两个电信号分别表示为第三电信号和第四电信号；
所述第一电光转换模块，用于将所述第三电信号转换为第三光信号；所述第一光复用器，还用于发送所述第三光信号；
所述第二电光转换模块，用于将所述第四电信号转换为第四光信号；所述第二光复用器，还用于发送所述第四光信号；
所述第一光信号与所述第三光信号的波长不同，所述第一光信号的波长与所述第四光信号的波长相同；
所述第二光信号与所述第四光信号的波长不同，所述第二光信号的波长与所述第三光信号的波长相同。
因此，光网络装置不仅可以发送光信号也可以接收光信号，而且第一光传输组件与第二光传输组件分别连接不同的光纤，所以光网络装置可以复用现有技术中的光纤进行通信，而且如果其中一根光纤出现了故障，通过另一根光纤也能实现收发功能，保证了两个光网络装置之间的正常通信，而且同一光纤中既有发送方向也有接收方向，可以保证时延一致性。另外第一光传输组件发送的光信号的波长与第二光传输组件接收的光信号的波长相同、第一光传输组件接收的光信号的波长与第二光传输组件发送的光信号的波长相同，因此在光网络装置与另一光网络装置通过光纤通信时无需区分两个光网络装置，避免了现有技术中单纤双向需要配对使用的问题，不需要改变用户习惯。
在一种可能的设计中，所述第一光传输组件和所述第二光传输组件分别通过TO封装。TO封装与现有技术中的BOX封装相比，工艺具备完善的产业链，成本较低。
第三方面，本申请实施例提供一种光模块，包括第一方面或第二方面本申请实施例所 述的光网络装置。
附图说明
图1为本申请实施例提供的通信系统的结构示意图；
图2为本申请一实施例提供的PCS Lane对应关系的示意图；
图3为本申请一实施例提供的光网络装置的结构示意图；
图4为本申请另一实施例提供的光网络装置的结构示意图；
图5为本申请一实施例提供的通信系统的结构示意图；
图6为本申请另一实施例提供的通信系统的结构示意图；
图7为本申请另一实施例提供的通信系统的结构示意图；
图8为本申请一实施例提供的应用于1*100GE的光网络装置的处理示意图；
图9为本申请一实施例提供的应用于2*50GE的光网络装置的处理示意图；
图10为本申请一实施例提供的处理芯片在两种模式切换的示意图；
图11为本申请另一实施例提供的通信系统的结构示意图；
图12为本申请一实施例提供的信号处理方法的流程图；
图13为本申请另一实施例提供的信号处理方法的流程图。
具体实施方式
图1为本申请实施例提供的通信系统的结构示意图，如图1所示，本实施例的通信系统包括两个光网络设备，两个光网络设备之间通过光纤进行连接，并通过光纤相互之间传输光信号，图1中以两根光纤为例，但本实施例并不限于此。光网络设备包括但不限于如下所示：交换机、路由器、分组传送网络(Packet Transport Network，PTN)设备及传输设备。
其中，下述提及的光网络装置可以为上述的光网络设备也可以为上述的光网络设备中的一部件。
下面对本申请中提及的专用名词进行解释。
CAUI-4接口：用于100GE接口内PMA子层的一个可选接口，主要用于芯片与芯片之间，或者芯片与光模块之间提供互连，接口速率为4*25.78125G。具体说明可以参见标准IEEE Std 802.3-2015_SECTION6中的Annex 83E，此处不再赘述。
50GAUI-2接口：用于50GE接口内PMA子层的一个可选接口，主要用于芯片与芯片之间，或者芯片与光模块之间提供互连，接口速率为2*26.5625G。具体说明可参见可以参见标准IEEE P802.3cd TM/D3.1中的Annex 135D，此处不再赘述。
50GAUI-1接口：用于50GE接口内PMA子层的一个可选接口，主要用于芯片与芯片之间，或者芯片与光模块之间提供互连，接口速率为1*53.125G具体说明可以参见标准IEEE P802.3cd TM/D3.1中的Annex 135G，此处不再赘述。
PMA(20:4)处理：将4条PCS Lane转化为20条PCS Lane，或者，将20条PCS Lane转化为4条PCS Lane；例如可以是按照100GE标准进行的PMA层处理。例如可以参见标准IEEE Std 802.3-2015_SECTION6中的83.Physical Medium Attachment(PMA)sublayer,type 40GBASE-R and 100GBASE-R的相关说明，此处不再赘述。
PCS转换：当应用于100G光模块时，本申请中指100GE/2*50GE的PCS转换。以发送信号的方向为例，首先按照100GE的PCS层要求进行处理，对20条PCS Lane做相应的Lane对齐锁定处理，调辐(Amplitude Modulation，AM)对齐block的移除工作，同时会支持比特出错率(Bit Error Ratio，BER)检测功能。移除AM字以后的数据后是经过扰码的66B块。将66B块的数据，分发到8条PCS Lane。其中，接收信号的方向与发送信号的方向相反，不再赘述。如图2所示，每条PCS Lane的带宽是12.890625G。其中Lane[0:3]组成第一个50G，Lane[4:7]组成第二个50G(这里指发送方向，若是接收方向则处理过程相反，即Lane[0:3]组成第二个50G，Lane[4:7]组成第一个50G。例如可以参见802.3-2015_SECTION6中的82.Physical Coding Sublayer(PCS)for 64B/66B,type 40GBASE-R and 100GBASE-R；IEEE P802.3cd TM/D3.1中的133.Physical Coding Sublayer(PCS)for 64B/66B,type 50GBASE-R。
FEC：以发送方向来说，FEC是指FEC编码，主要原理是先进行对齐同步，重排，移除AM字，再进行FEC的转码(例如66B到257B转换)，再重新插入转译过的AM字，再做FEC编码，这里使用的FEC例如是RS(544，514)，通常称为KP4FEC，其纠错能力是2e-4，基本可以弥补4电平脉冲调制(4-Level Pulse amplitude modulation，PAM4)编码带来的损失，使用相同的光电器件，可以达到基本相当的传输距离。经过FEC编码后的数据，会分发到2个FEC Lane，以进行PMA(2:2)处理。以接收方向来说，FEC是指FEC解码，FEC解码与FEC编码相反。例如可以参见IEEE P802.3cd TM/D3.1中的134.Reed-Solomon Forward Error Correction(RS-FEC)sublayer for 50GBASE-R PHYs。
PMA(2:2)处理：与上面介绍的PMA(20:4)处理类似，不同的是此处的输入和输出均是2条PMA Lane；本申请中可以是指按照50GE标准进行的PMA(2:2)处理。例如可以参见IEEE P802.3cd TM/D3.1中的135.Physical Medium Attachment(PMA)sublayer,type50GBASE-R and 100GBASE-P。
PMA(2:1)处理：除了将2条PMA Lane转化为1条PMA Lane，或者，将1条PMA Lane转化为2条PMA Lane之外，还实现了PAM4编码功能，PAM4编码有4个电平，实现了单lane50G的效果。例如本申请中可以是指按照50GE标准进行的PMA(2:1)处理。例如可以参见IEEE P802.3cd TM/D3.1中的135.Physical Medium Attachment(PMA)sublayer,type50GBASE-R and 100GBASE-P。
PAM4处理：PAM4信号存在4个电平，相对于2电平的NRZ信号，在符号翻转频率不变的前提下，每次采样的信息，包含2bit信息，效果上达到带宽翻倍的效果。例如可以参见IEEE P802.3cd TM/D3.1中的135.Physical Medium Attachment(PMA)sublayer,type50GBASE-R and 100GBASE-P 135.5.7PAM4encoding。
图3为本申请一实施例提供的光网络装置的结构示意图，如图3所示，本实施例的光网络装置100用作第一光网络装置，以发送方向的角度进行描述，本实施例的光网络装置100可以包括：处理芯片110、光传输组件120和光传输组件130，所述光传输组件120的输入端与所述处理芯片110的输出端耦合，所述光传输组件130的输入端与所述处理芯片110的输出端耦合。
其中，处理芯片110获取接收单板接口芯片发送的N个电信号，N为大于2的整数。该N个电信号中的每个电信号的带宽相同。然后处理芯片110对这N个电信号进行处理， 将接收到的N个电信号合并为两个电信号，需要说明的是，对N个电信号合并仅获得两个信号，合并后获得的2个电信号中的每个电信号的带宽相同，这两个电信号分别表示为电信号1和电信号2。处理芯片110获得上述电信号1和电信号2后，将电信号1发送给光传输组件120，以及将电信号2发送给光传输组件130。
光传输组件120接收处理芯片110发送的电信号1，并将接收的电信号1转换为光信号1。光传输组件130接收处理芯片110发送的电信号2，并将接收的电信号2转换为光信号2。
其中，光传输组件120连接一根光纤(例如光纤1)，光传输组件130连接另一根光纤(例如光纤2)，例如光纤1和光纤2的另一端可以连接另一个光网络装置(例如如图4所示)。光传输组件120通过光纤1发送光信号，光传输组件130通过光纤2发送光信号。
本实施例的光网络装置，先通过处理芯片将N个电信号合并为个数更少的2个电信号，再经由光传输组件将其中一个电信号转换为1个光信号，以及经由另一个光传输组件将另一个电信号转换为另一个光信号。由于处理芯片获取的待发送的N个电信号做了合并处理，这样使得处理芯片连接的光传输组件只有两个，所以无需处理芯片必须连接N个光传输组件，减少了光传输组件的数量，降低了成本。
图4为本申请另一实施例提供的光网络装置的结构示意图，如图4所示，本实施例的光网络装置200用作第二光网络装置，以接收方向的角度进行描述，本实施例的光网络装置200可以包括：处理芯片210、光传输组件220和光传输组件230。其中，所述光传输组件220的输出端与所述处理芯片210的输入端耦合，所述光传输组件230的输出端与所述处理芯片210的输入端耦合。
其中，光传输组件220接收光信号3，将接收的光信号3转换为电信号3，然后向处理芯片210发送电信号3。光传输组件230接收光信号4，将接收的光信号4转换为电信号4，然后向处理芯片210发送电信号4，电信号3和电信号4的带宽相同。其中，光传输组件220可以连接一根光纤(例如光纤1)，光传输组件220可以连接另一根光纤(例如光纤2)，例如光纤1和光纤2的另一端可以连接另一个光网络装置(例如如图3所示)。光传输组件220通过光纤1接收光信号3，光传输组件230通过光纤2接收光信号4。
处理芯片210对电信号3和电信号4(即2个电信号)进行处理，得到N个电信号，N为大于2的整数，N个电信号中的每个电信号的带宽相同。然后处理芯片210将获得的N个电信号发送给单板接口芯片。
本实施例的光网络装置，通过光传输组件接收一个光信号并转换为一个电信号，通过另一个光传输组件接收另一个光信号并转换为另一个电信号，再由处理芯片对这两个电信号进行处理得到个数更多的N个电信号并输出。由于处理芯片输出的N个电信号是由2个电信号处理得到的，这样使得处理芯片连接的光传输组件的数量少于N，无需处理芯片必须连接N个光传输组件，减少了光传输组件的数量，降低了成本。
图5为本申请一实施例提供的通信系统的结构示意图，如图5所示，本实施例的通信系统可以包括光网络装置100和光网络装置200。光网络装置100可以采用如图3所示的结构，实现原理类似，此处不再赘述。光网络装置200可以采用如图4所示的结构，实现原理类似，处理不再赘述。光网络装置100与光网络装置200可以通过光纤连接进行通信，例如光网络装置100向光网络装置200发送2个光信号。其中，在一些实施例中，光信号 1也可以是光信号3，光信号2可以是光信号4，电信号1可以是电信号3，电信号2可以是电信号4。
在一些实施例中，N等于4。也就是光网络装置100中的处理芯片110将从单板接口芯片接收的4个电信号转换为2个电信号(电信号1和电信号2)，然后将电信号1发送给光传输组件120以及将电信号2发送给光传输组件130，光传输组件120将电信号1转换为光信号1，并通过光纤1发送给光网络装置200，并且光传输组件130将电信号2转换为光信号2，并通过光纤2发送给光网络装置200。其中，光网络装置200中的光传输组件220与光网络装置100中的光传输组件120通过光纤连接，光网络装置200中的光传输组件230与光网络装置100中的光传输组件130通过光纤连接。
所以，光网络装置200中的光传输组件220可以接收光信号1，再将光信号1转换为电信号1，然后发送给处理芯片210。光传输组件230可以接收光信号2，再将光信号2转换为电信号2，然后发送给处理芯片210。处理芯片210从光传输组件220接收电信号1以及从光传输组件230接收电信号2，共计2个电信号，然后再对该2个电信号(电信号1和电信号2)进行处理，得到4个电信号，并将这4个电信号发送给单板接口芯片。
与现有技术中处理芯片获取4个电信号需要连接4个光传输组件相比，本实施例中处理芯片获取4个电信号只需要连接2个光传输组件，减少了光传输组件的数量，降低了成本。
本领域技术人员可以理解的是，本申请可以应用在100GE光模块上，也可以应用于包括但不限于200GE光模块，400GE光模块。例如，当应用于200GE光模块时，本申请的方案可以融合两种情况，单独作为200GE光模块使用，或者作为两个100GE光模块分别使用。其处理方式与下文所述的方案类似，只是作为200GE光模块应用时，处理芯片需要同时支持100GE接口和200GE接口。下面以100GE光模块为例，对本申请实施例做进一步的说明。其中，处理芯片接收单板接口芯片发送的4个电信号至少包括两种情况：
第一种情况，应用于1*100GE，如图6所示，处理芯片110包括CAUI-4接口111，当单板接口芯片为100G单板接口芯片时，处理芯片110通过该CAUI-4接口111连接单板接口芯片连接。处理芯片210包括CAUI-4接口211，当单板接口芯片为100G单板接口芯片时，处理芯片210通过该CAUI-4接口111连接单板接口芯片连接。
处理芯片110通过该一个CAUI-4接口111接收单板接口芯片发送的4个电信号(即电信号A1至电信号A4)。相应地，相应地，处理芯片210可以通过该CAUI-4接口211向单板接口芯片输出4个电信号(即电信号A1至电信号A4)。
举例来说，上述的4个电信号中每个电信号的带宽均可以为25.78125G，上述的电信号1与电信号2的带宽可以为53.125G。
第二种情况，应用于2*50GE，如图7所示，处理芯片110包括2个50GAUI-2接口，分别表示为50GAUI-2接口112和50GAUI-2接口113。当所述单板接口芯片为50G单板接口芯片时，所述处理芯片110通过所述50GAUI-2接口112和50GAUI-2接口113连接所述50G单板接口芯片。相应地，处理芯片210包括2个50GAUI-2接口，分别表示为50GAUI-2接口212和50GAUI-2接口213。当所述单板接口芯片为50G单板接口芯片时，所述处理芯片210通过所述50GAUI-2接口212和50GAUI-2接口213连接所述50G单板接口芯片。
其中，一个50GAUI-2接口可以传输2个电信号，因此，处理芯片110可以通过50GAUI-2接口112接收单板接口芯片发送2个电信号(即电信号A1和电信号A2)，以及可以通过50GAUI-2接口113接收单板接口芯片发送另外2个电信号(即电信号A3和电信号A4)。处理芯片210可以通过50GAUI-2接口212向单板接口芯片发送2个电信号(即电信号A1和电信号A2)，以及可以通过50GAUI-2接口213接收单板接口芯片发送另外2个电信号(即电信号A3和电信号A4)。
举例来说，上述的4个电信号中每个电信号的带宽均可以为26.5625G，上述的电信号1与电信号2的带宽可以为53.125G。
在一些实施例中，处理芯片110还可以包括：2个50GAUI-1接口，分别表示为50GAUI-1接口114和50GAUI-1接口115。处理芯片110通过50GAUI-1接口114与光传输组件120连接，处理芯片110通过50GAUI-1接口115与光传输组件130连接。相应地，处理芯片210还可以包括：2个50GAUI-1接口，分别表示为50GAUI-1接口214和50GAUI-1接口215。处理芯片210通过50GAUI-1接口214与光传输组件220连接，处理芯片210通过50GAUI-1接口215与光传输组件230连接。其中每个50GAUI-1接口用于传输一个电信号。
在上述第一种情况下，处理芯片110通过该CAUI-4接口111接收单板接口芯片(例如通过PMA(20:4)处理后)输出的4个电信号(电信号A1至电信号A4)之后，处理芯片110将电信号A1至电信号A4合并为电信号1和电信号2的一种实现方式可以为：
处理芯片110还包括第一电路、第二电路和第三电路；第一电路对电信号A1至电信号A4执行PMA处理和PCS转换处理，得到处理后的8个电信号，所述处理后的8个电信号分别表示为电信号B1至电信号B8。第二电路对电信号B1至电信号B4执行FEC编码以及PMA(2:2)处理，得到处理后的电信号C1和电信号C2，例如：第二电路对电信号B1至电信号B4执行FEC编码，获得电信号E1和电信号E2，然后对电信号E1和电信号E2执行PMA(2:2)处理，获得电信号C1和电信号C2；以及第二电路对电信号B5至电信号B8执行FEC编码以及PMA(2:2)处理，获得处理后的电信号C3和电信号C4，例如：第二电路对电信号B5至电信号B8执行FEC编码，获得电信号E3和电信号E4，然后对电信号E3和电信号E4执行PMA(2:2)处理，获得电信号C3和电信号C4。第三电路对电信号C1和电信号C2执行PMA(2:1)处理，得到处理后的所述电信号1，以及对电信号C3和电信号C4执行PMA(2:1)处理，得到处理后的所述电信号2。
其中，第一电路对所述电信号A1至电信号A4执行PMA处理和PCS转换处理，得到所述电信号B1至电信号B8具体包括：第一电路先对所述电信号A1至电信号A4执行PMA(20:4)处理，得到处理后的20个电信号，所述处理后的20个电信号分别表示为电信号D1至电信号D20；然后对所述电信号D1至电信号D20执行PCS转换处理，得到所述电信号B1至电信号B8。或者，第一电路先对所述电信号A1至电信号A4执行PMA(16:4)处理，得到处理后的16个电信号，所述处理后的20个电信号分别表示为电信号D1至电信号D16；然后对所述电信号D1至电信号D16执行PCS转换处理，得到所述电信号B1至电信号B8。
从而实现了处理芯片110将4个电信号合并为2个电信号。
相应地，在上述第一种情况下，处理芯片210接收光传输组件220发送的电信号1以 及光传输组件230发送的电信号2之后，处理芯片210对电信号1和电信号2进行处理，得到4个电信号的一种实现方式可以为：
处理芯片210还包括第一电路、第二电路和第三电路。第三电路对电信号1执行PMA(2:1)处理，获得两个电信号，表示为电信号C1和电信号C2；以及对所述电信号2执行PMA(2:1)处理，获得两个电信号，表示为电信号C3和电信号C4。第二电路对电信号C1和电信号C2执行PMA(2:2)处理以及FEC解码，获得4个电信号，表示为电信号B1至电信号B4，例如：第二电路对电信号C1和电信号C2执行PMA(2:2)处理，获得电信号E1和电信号E2，再对电信号E1和电信号E2执行FEC解码，获得电信号B1至电信号B4；以及第二电路对电信号C3和C4执行PMA(2:2)处理以及FEC解码，获得4个电信号，表示为电信号B5至电信号B 8，例如第二电路对电信号C3和电信号C4执行PMA(2:2)处理，获得电信号E3和电信号E4，再对电信号E3和电信号E4执行FEC解码，获得电信号B5至电信号B8。第一电路对电信号B1至电信号B8执行PCS转换处理和PMA处理，获得4个电信号，表示为电信号A1至电信号A4。
其中，第一电路用于对电信号B1至电信号B8执行PCS转换处理和PMA处理，获得所述电信号A1至电信号A4具体包括：第一电路对电信号B1至电信号B8执行PCS转换处理，获得处理后的20个电信号，所述处理后的20个电信号分别表示为电信号D1至电信号D20；然后对所述电信号D1至电信号D20执行PMA(20:4)处理，获得所述电信号A1至电信号A4。或者，第一电路对电信号B1至电信号B8执行PCS转换处理，获得处理后的16个电信号，所述处理后的16个电信号分别表示为电信号D1至电信号D16；然后对所述电信号D1至电信号D16执行PMA(16:4)处理，获得所述电信号A1至电信号A4。
从而实现了处理芯片210根据2个电信号得到4个电信号。
下面以一个具体的例子对上述处理芯片110和处理芯片210的处理过程进行描述，参见图8所示，图8中以处理芯片为oDSP芯片为例示出。
若单板接口芯片为100G单板接口芯片，则处理芯片110中的第一电路、第二电路和第三电路均工作。其中，单板接口芯片将通过100GE PMA(20:4)处理后获得的4个电信号，即电信号A1至电信号A4，通过CAUI-4接口111发送给处理芯片110，处理芯片110的第一电路对这电信号A1至电信号A4执行100GE PMA(20:4)处理，获得20个电信号(表示为电信号D1至电信号D20。第一电路再对这电信号D1至电信号D20执行100GE/2*50GE的PCS转换，获得8个电信号，表示为电信号B1至电信号B8。然后第二电路对电信号B1至电信号B4执行50G FEC编码后再执行50G PMA(2:1)获得2个电信号，表示为电信号C1和电信号C2，以及对电信号B5至电信号B8执行50G FEC编码后再执行50G PMA(2:2)获得2个电信号，表示为电信号C3和电信号C4。第三电路将电信号C1和电信号C2执行50G PMA(2:1)处理，获得电信号1，以及将电信号C3和电信号C4执行50G PMA(2:1)处理，获得电信号2。处理芯片110将电信号1通过50GAUI-1接口114发送给光传输组件120，处理芯片110将电信号2通过50GAUI-1接口115发送给光传输组件130。光传输组件120将电信号1转换为光信号1，然后通过光纤1发送给光网络装置200，其中，光传输组件130将电信号2转换为光信号2，然后通过光纤2发送给光网络装置200。
相应地，若单板接口芯片为100G单板接口芯片，则处理芯片210中的第一电路、第二电路和第三电路均工作。光网络装置200中的光传输组件220通过光纤1接收光信号1， 将光信号1转换为电信号1，然后将电信号1通过50GAUI-1接口214发送给处理芯片210；以及光传输组件230通过光纤2接收光信号2，将光信号2转换为电信号2，然后将电信号2通过50GAUI-1接口215发送给处理芯片210。处理芯片210的第三电路对电信号1执行50G PMA(2:1)处理，获得2个电信号，表示为电信号C1和电信号C2，以及对电信号2执行50G PMA(2:1)处理，获得2个电信号，表示为电信号C3和电信号C4，一共可获得4个电信号。第二电路对电信号C1和电信号C2执行50G PMA(2:2)处理后再执行50G FEC解码，获得4个电信号，表示为电信号B1至电信号B4，以及对电信号C3和电信号C4执行50G PMA(2:2)处理后再执行50G FEC解码，获得4个电信号，表示为电信号B5至电信号B8。第一电路对获得的电信号B1至电信号B8执行100GE/2*50GE的PCS转换，获得20个电信号，表示为电信号D1至电信号D20，然后对电信号D1至电信号D20执行100GE PMA(20:4)处理，获得4个电信号，表示为电信号A1至电信号A4。然后处理芯片210通过CAUI-4接口211将电信号A1至电信号A4发送给单接口芯片。
在上述第二种情况下，处理芯片110通过50GAUI-2接口113接收单板接口芯片(例如通过50G PMA(2:1)处理后)发送的2个电信号(电信号A1和电信号A2)，以及通过50GAUI-2接口114接收单板接口芯片(例如通过50G PMA(2:1)处理后)发送的2个电信号(电信号A3和电信号A4)之后，处理芯片110将接收的电信号A1至电信号A4合并为电信号1和电信号2的一种实现方式可以为：
处理芯片110还包括第三电路；第三电路对所述电信号A1和电信号A2执行PMA(2:1)处理，得到处理后的所述电信号1；以及对所述电信号A3和电信号A4执行PMA(2:1)处理，得到处理后的所述电信号2。
从而实现了处理芯片110将4个电信号合并为2个电信号。
相应地，在上述第二种情况下，处理芯片210接收光传输组件220发送的电信号1以及光传输组件230发送的电信号2之后，处理芯片210对电信号1和电信号2进行处理，得到4个电信号的一种实现方式可以为：
处理芯片210还包括第三电路。第三电路对电信号1执行PMA(2:1)处理，得到电信号A1和电信号A2；以及对电信号2执行PMA(2:1)处理，得到电信号A3和电信号A4。
从而实现了处理芯片210根据2个电信号得到4个电信号。
下面图9，以一个具体的例子对上述处理芯片110和处理芯片210的处理过程进行描述。若单板接口芯片为50G单板接口芯片，则处理芯片110中第三电路工作。其中，单板接口芯片将通过50GE PMA(2:2)处理后获得的电信号A1和电信号A2，通过50GAUI-2接口112发送给处理芯片110，以及将通过50GE PMA(2:1)处理后获得的电信号A3和电信号A4，通过50GAUI-2接口113发送给处理芯片110。处理芯片110对电信号A1和电信号A2执行50G PMA(2:1)处理，获得电信号1，以及对电信号A3和电信号A4执行50G PMA(2:1)处理，获得电信号2，即共获得2个电信号。处理芯片110将电信号1通过50GAUI-1接口114发送给光传输组件120，以及将电信号2通过50GAUI-1接口115发送给光传输组件130。光传输组件120将电信号1转换为光信号1，然后通过光纤1发送给光网络装置200，其中，光传输组件130将电信号2转换为光信号2，然后通过光纤2发送给光网络装置200。
相应地，若单板接口芯片为50G单板接口芯片，则处理芯片210中第三电路工作。光 网络装置200中的光传输组件220通过光纤1接收光信号1，将光信号1转换为电信号1，然后将电信号1通过50GAUI-1接口214发送给处理芯片210；以及光传输组件230通过光纤2接收光信号2，将光信号2转换为电信号2，然后将电信号2通过50GAUI-1接口215发送给处理芯片210。处理芯片210的第三电路对电信号1执行50G PMA(2:1)处理，获得2个电信号，表示为电信号A1和电信号A2，以及对电信号2执行50G PMA(2:1)处理，获得2个电信号，表示为电信号A3和电信号A4。然后处理芯片210通过50GAUI-2接口214将电信号A1和电信号A2发送给单接口芯片，以及通过50GAUI-2接口215将电信号A3和电信号A4发送给单接口芯片。
其中，上述各实施例中的所提及的PMA(2:1)处理包括PAM4处理，PAM4处理可以在不提升信号的符号频率的情况下，达到有效带宽翻倍的效果。
在一些实施例中，上述的处理芯片可以包括CAUI-4接口(表示工作在1*100GE模式)和2*50GAUI-2接口(表示工作在2*50GE模式)，上电初始化的时候，处理芯片的管理控制模块通过管理接口获知工作模式，获知工作模式后通过一个管理控制信号控制其中的两个选择器，如图10所示，当管理控制模块通过管理接口获知工作模式为1*100GE模式，则管理控制模块控制图中上面的选择器选择单板接口芯片与oDSP芯片之间的CAUI-4接口工作，以及控制图中下面的选择器选择PMA(2:1)处理的输入为PMA(2:2)的输出。当管理控制模块通过管理接口获知工作模式为2*50GE模式，则管理控制模块控制图中上面的选择器选择单板接口芯片与oDSP芯片之间的50GAUI-2接口工作，以及控制图中下面的选择器选择PMA(2:1)的输入为oDSP芯片通过50GAUI-2接口接收的电信号。
下面对光传输组件的结构进行介绍。
图11为本申请另一实施例提供的通信系统的结构示意图，如图11所示，本实施例的通信系统在上述各实施例的基础上，本实施例的光传输组件120可以包括：电光转换模块121以及与电光转换模块121连接的光复用器122。电光转换模块121将电信号1转换为光信号1，光复用器122向光网络装置200发送该光信号1。本实施例的光传输组件130可以包括：电光转换模块131以及与电光转换模块131连接的光复用器132。电光转换模块131将电信号2转换为光信号2，光复用器132向光网络装置200发送该光信号2。可选地，电光转换模块可以为激光器。
相应地，本实施例的光传输组件220可以包括：光探测器221以及与光探测器连接的光复用器222。光复用器222接收所述光信号1，将所述光信号1发送给所述光探测器221；所述光探测器221将所述光信号1转换为所述电信号1，并将电信号1发送给处理芯片210。本实施例的光传输组件230可以包括：光探测器231以及与光探测器231连接的光复用器232。光复用器232接收所述光信号2，将所述光信号2发送给所述光探测器231；所述光探测器231将所述光信号2转换为所述电信号2，并将电信号2发送给处理芯片210。
可选地，光传输组件220还可以包括跨阻放大器223，该跨阻放大器223与光探测器221连接。光探测器221将转换获得的电信号1输出给跨阻放大器223，跨阻放大器223对该电信号1进行放大处理，然后再将放大处理后的电信号1发送给处理芯片210。光传输组件230还可以包括跨阻放大器233，该跨阻放大器233与光探测器231连接。光探测器231将转换获得的电信号2输出给跨阻放大器233，跨阻放大器233对该电信号2进行 放大处理，然后再将放大处理后的电信号2发送给处理芯片210。
在一实施例中，所述光传输组件220还包括与所述光复用器222连接的电光转换模块224，所述光传输组件230还包括与所述光复用器232连接的电光转换模块234。所述处理芯片210，还用于接收单板接口芯片发送的N个电信号，对所述N个电信号进行处理，将接收到的所述N个电信号转换为两个电信号，所述两个电信号分别表示为电信号5和电信号6。所述电光转换模块224，用于将所述电信号5转换为光信号5；所述光复用器222，还用于发送所述光信号5。所述电光转换模块234，用于将所述电信号6转换为光信号6；所述光复用器232，还用于发送所述光信号6。
相应地，所述光传输组件120还包括：与所述光复用器122连接的光探测器123，所述光传输组件130还包括与所述光复用器132连接的光探测器133。所述光复用器122，用于接收光网络装置200发送的光信号5，并将所述光信号5输出给所述光探测器123；所述光探测器123，用于将所述光信号5转换为电信号5。所述光复用器132，用于接收所述光网络装置200发送的光信号6，将所述光信号6输出给所述光探测器133；所述光探测器133，用于将所述光信号6转换为电信号6。可选地，本实施例的光传输组件120还包括跨阻放大器124，该跨阻放大器124与光探测器123连接。光探测器123将转换获得的电信号5输出给跨阻放大器124，跨阻放大器124对该电信号5进行放大处理，然后再将放大处理后的电信号5发送给处理芯片110。光传输组件130还可以包括跨阻放大器134，该跨阻放大器134与光探测器133连接。光探测器133将转换获得的电信号6输出给跨阻放大器134，跨阻放大器134对该电信号6进行放大处理，然后再将放大处理后的电信号6发送给处理芯片110。所述处理芯片，用于对所述电信号5和所述电信号6进行处理，得到N个电信号，并将所述N个电信号发送给单板接口芯片。
此实施例是以光网络装置200发送信号的方向、以光网络装置100接收信号的方向进行描述。其中，光网络装置200发送光信号5和光信号6可以参见光网络装置100发送光信号1和光信号2的相关描述，光网络装置100接收光信号5和光信号6可以参见光网络装置200接收光信号1和光信号2的相关描述，此处不再赘述。
因此，光复用器122可以发送光信号1也可以接收光信号5，光复用器132可以发送光信号2也可以接收光信号6，光复用器222可以接收光信号1也可以发送光信号5，光复用器232可以接收光信号2也可以发送光信号6。为了保证同一光复用器既发送光信号也接收光信号，而且一个光复用器连接一根光纤，所以同一光复用器发送的光信号与接收的光信号的波长不同，所以本实施例中上述的光信号1的波长与光信号5的波长不同，光信号2的波长与光信号6的波长不同。
由于每个光传输组件既可以向外发送光信号，也可以从外接收光信号，而且每个光传输组件接收的光信号的波长与发送的光信号的波长不同，所以为了保证光网络装置100仍然可以采用两根光纤与光网络装置200进行通信，光网络装置中的一个光传输组件连接一根光纤，另一个光传输组件连接另一根光纤，这样如果其中一根光纤出现了故障，通过另一根光纤也能实现收发功能，保证了两个光网络装置之间的正常通信，而且同一光纤中既有发送方向也有接收方向，可以保证时延一致性。例如：光传输组件120中的电光转换模块121将电信号转换为波长为λ1的光信号，而且光复用器122例如包括透镜，可透射λ1波长，反射λ2波长，因此如果光复用器122接收到波长为λ1的光信号，则透射出去，通 过光纤发送给光网络装置200，如果电光转换模块122接收到波长为λ2的光信号，则反射给光探测器123。例如：λ1＝1295.56nm，λ2＝1309.14nm，但本实施例并不限于此。
在一些实施例中，所述光信号1的波长与所述光信号6的波长相同；所述光信号2的波长与所述光信号5的波长相同。
如图11所示，在光网络装置100中，光传输组件120发送的光信号1的波长为λ1、接收的光信号5的波长为λ2；光传输组件130接收的光信号6的波长为λ1、发送的光信号5的波长为λ2。在光网络装置200中，光传输组件230发送的光信号6的波长为λ1、接收的光信号2的波长为λ2；光传输组件220接收的光信号1的波长为λ1、发送的光信号5的波长为λ2。所以图11所示的光网络装置100与光网络装置200中的上面的光传输组件相同，下面的光传输组件相同，因此在光网络装置100与光网络装置200通过光纤通信时无需区分两个光网络装置，避免了现有技术中单纤双向需要配对使用的问题，不需要改变用户习惯。
如上分析可知，光网络装置采用了单纤双向技术，所以在其它对光纤对称要求很高的应用场景，比如1588业务，其两端网元之间的1588报文交互，要求收发方向的路径长度一致，长度差异越大，性能越差，而单纤双向技术，收发方向的光信号在同一根光纤传输，不会引入收发方向光纤不等长问题，可以实现更好的1588性能。
在一些实施例中，光传输组件120、光传输组件130、光传输组件220和光传输组件230分别通过TO封装。以光传输组件120为例进行说明，光传输组件中的光探测器123和跨阻放大器124可以通过TO进行封装在一起作为一个模块，另外，电光转换模块121也可以通过TO进行封装为一个模块，这种TO封装工艺具备很完善产业链。而且现有技术中一般将光网络装置中的所有光转为电的模块通过BOX封装在一起，另外将所有电转为光的模块通过BOX封装在一起，这种封装形式在加工工艺上，相对于TO封装要复杂很多，相应的对应成本也会高很多，所以本实施例采用TO封装可以实现很低的成本。
另外，本申请各实施例可以应用于100GBASE-ER4、40GE、100G OTU4接口等中，用于降低成本。
而且，本申请实施例还提供一种光模块，该光模块包括光网络装置，该光网络装置可以采用上述光网络装置100或光网络装置200的结构，其实现原理和技术效果类似，此处不再赘述。
另外，如图12所示，图12为本申请一实施例提供的信号处理方法的流程图，本实施例的方法可以应用于第一光网络装置，第一光网络装置包括：处理芯片、第一光传输组件以及第二光传输组件，并且所述第一光传输组件的输入端与所述处理芯片的输出端耦合，所述第二光传输组件的输入端与所述处理芯片的输出端耦合。所述方法可以包括：
S1201、处理芯片接收单板接口芯片发送的N个电信号。其中，N为大于2的整数。
S1202、处理芯片对所述N个电信号进行处理，将接收到的所述N个电信号转换为两个电信号，所述两个电信号分别表示为第一电信号和第二电信号。
S1203、处理芯片将所述第一电信号和所述第二电信号分别发送给所述第一光传输组件和所述第二光传输组件。
S1204、所述第一光传输组件将所述第一电信号转换成第一光信号。
S1205、所述第二光传输组件将所述第二电信号转换成第二光信号。
本实施例中，S1204和S1205的执行顺序不分先后。
其中，处理芯片可以为上述实施例中的处理芯片110，第一光传输组件可以为上述实施例中的光传输组件120，第一电信号可以为上述实施例中的电信号1，第一光信号可以为上述实施例中的光信号1，第二光传输组件可以为上述实施例中的光传输组件130，第二电信号可以为上述实施例中的电信号2，第二光信号可以为上述实施例中的光信号2。具体实现过程可以参见上述实施例中的相关描述，此处不再赘述。
另外，如图13所示，图13为本申请另一实施例提供的信号处理方法的流程图，本实施例的方法可以应用于第二光网络装置，第二光网络装置包括：处理芯片、第一光传输组件以及第二光传输组件，并且所述第一光传输组件的输出端与所述处理芯片的输入端耦合，所述第二光传输组件的输出端与所述处理芯片的输入端耦合。所述方法可以包括：
S1301、第一光传输组件将第一光信号转换为第一电信号，并发送给处理芯片。
S1302、第二光传输组件将第二光信号转换为第二电信号，并发送给处理芯片。
其中，S1301和S1302的执行顺序不分先后。
S1303、处理芯片接收所述第一光传输组件发送的所述第一电信号以及所述第二光传输组件发送的所述第二电信号。
S1304、处理芯片对所述第一电信号和所述第二电信号进行处理，并将处理后得到的N个电信号发送给单板接口芯片。其中，N为大于2的整数。
其中，处理芯片可以为上述实施例中的处理芯片210，第一光传输组件可以为上述实施例中的光传输组件220，第一电信号可以为上述实施例中的电信号1或电信号3，第一光信号可以为上述实施例中的光信号1或光信号3，第二光传输组件可以为上述实施例中的光传输组件230，第二电信号可以为上述实施例中的电信号2或电信号4，第二光信号可以为上述实施例中的光信号2或光信号4。具体实现过程可以参见上述实施例中的相关描述，此处不再赘述。
本说明书的各个部分均采用递进的方式进行描述，各个实施例之间相同相似的部分互相参见即可，每个实施例重点介绍的都是与其他实施例不同之处。尤其，对于方法实施例而言，由于其基本相似于产品实施例，所以描述的比较简单，相关之处参见产品实施例部分的说明即可。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的。作为单元显示的部件可以是或者也可以不是物理单元。即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用硬件结合软件的形式实现。
最后，需要说明的是：以上所述仅为本申请技术方案的较佳实施例而已，并非用于限定本申请的保护范围。显然，本领域技术人员可以对本申请进行各种改动和变型而不脱离本申请的范围。倘若本申请的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则所作的任何修改、等同替换、改进等，均应包含在本申请的保护范围之内。

Claims (37)

  1. 一种光网络装置，用作第一光网络装置，其特征在于，包括：处理芯片、第一光传输组件以及第二光传输组件；其中，
    所述处理芯片用于：
    接收单板接口芯片发送的N个电信号，其中，N为大于2的整数；
    对所述N个电信号进行处理，将接收到的所述N个电信号转换为两个电信号，所述两个电信号分别表示为第一电信号和第二电信号；以及
    将所述第一电信号和所述第二电信号分别发送给所述第一光传输组件和所述第二光传输组件；
    所述第一光传输组件用于将所述第一电信号转换成第一光信号，所述第一光传输组件的输入端与所述处理芯片的输出端耦合；
    所述第二光传输组件用于将所述第二电信号转换成第二光信号，所述第二光传输组件的输入端与所述处理芯片的输出端耦合。
  2. 根据权利要求1所述的光网络装置，其特征在于，所述处理芯片包括100Gbps附属单元接口CAUI-4接口，当所述单板接口芯片是100G单板接口芯片时，所述处理芯片通过所述CAUI-4接口连接所述100G单板接口芯片。
  3. 根据权利要求2所述的光网络装置，其特征在于，所述单板接口芯片是100G单板接口芯片，N＝4，所述N个电信号分别表示为电信号A1至电信号A4，所述处理芯片还包括第一电路、第二电路和第三电路；
    所述第一电路用于对所述电信号A1至电信号A4执行物理媒体附加PMA处理和物理编解码子层PCS转换处理，得到处理后的8个电信号，所述处理后的8个电信号分别表示为电信号B1至电信号B8；
    所述第二电路用于对电信号B1至电信号B4执行前向纠错FEC编码以及PMA(2:2)处理，得到处理后的电信号C1和电信号C2；
    所述第二电路还用于以及对电信号B5至电信号B8执行FEC编码以及PMA(2:2)处理，获得处理后电信号C3和电信号C4；
    所述第三电路用于对电信号C1和电信号C2执行PMA(2:1)处理，得到处理后的所述第一电信号；
    所述第三电路还用于对电信号C3和电信号C4执行PMA(2:1)处理，得到处理后的所述第二电信号。
  4. 根据权利要求3所述的光网络装置，其特征在于，所述第一电路用于对所述电信号A1至电信号A4执行PMA处理和PCS转换处理，得到所述电信号B1至电信号B8具体包括：
    所述第一电路对所述电信号A1至电信号A4执行PMA(20:4)处理，得到处理后的20个电信号，所述处理后的20个电信号分别表示为电信号D1至电信号D20；
    所述第一电路对所述电信号D1至电信号D20执行PCS转换处理，得到所述电信号B1至电信号B8。
  5. 根据权利要求1或2所述的光网络装置，其特征在于，所述处理芯片包括2个 50Gbps附属单元接口50GAUI-2接口，所述2个50GAUI-2接口分别表示为第一50GAUI-2接口和第二50GAUI-2接口，当所述单板接口芯片为50G单板接口芯片时，所述处理芯片通过所述第一50GAUI-2接口和第二50GAUI-2接口连接所述50G单板接口芯片。
  6. 根据权利要求5所述的光网络装置，其特征在于，所述单板接口芯片是50G单板接口芯片，所述N等于4，所述N个电信号分别表示为电信号A1至电信号A4；
    所述处理芯片通过所述第一50GAUI-2接口接收所述电信号A1和电信号A2；
    所述处理芯片通过所述第二50GAUI-2接口接收所述电信号A3和电信号A4；
    所述处理芯片还包括第三电路，所述第三电路用于：
    对所述电信号A1和电信号A2执行PMA(2:1)处理，得到处理后的所述第一电信号；
    对所述电信号A3和电信号A4执行PMA(2:1)处理，得到处理后的所述第二电信号。
  7. 根据权利要求1-6任一项所述的光网络装置，其特征在于，所述处理芯片包括2个50GAUI-1接口，所述2个50GAUI-1接口分别表示为第一50GAUI-1接口和第二50GAUI-1接口；
    所述处理芯片通过所述第一50GAUI-1接口与所述第一光传输组件连接，以及通过所述第二50GAUI-1接口与所述第二光传输组件连接。
  8. 根据权利要求1-7任一项所述的光网络装置，其特征在于，
    所述第一光传输组件包括第一电光转换模块以及与所述第一电光转换模块连接的第一光复用器，所述第一电光转换模块用于将所述第一电信号转换为所述第一光信号，所述第一光复用器用于向第二光网络装置发送所述第一光信号；
    所述第二光传输组件包括第二电光转换模块以及与所述第二电光转换模块连接的第二光复用器，所述第二电光转换模块用于将所述第二电信号转换为所述第二光信号，所述第二光复用器用于向所述第二光网络装置发送所述第二光信号。
  9. 根据权利要求8所述的光网络装置，其特征在于，所述第一光传输组件还包括：与所述第一光复用器连接的第一光探测器，所述第二光传输组件还包括与所述第二光复用器连接的第二光探测器；
    所述第一光复用器，用于接收所述第二光网络装置发送的第三光信号，并将所述第三光信号输出给所述第一光探测器；所述第一光探测器，用于将所述第三光信号转换为第三电信号；
    所述第二光复用器，用于接收所述第二光网络装置发送的第四光信号，将所述第四光信号输出给所述第二光探测器；所述第二光探测器，用于将所述第四光信号转换为第四电信号；
    所述处理芯片，用于对所述第三电信号和所述第四电信号进行处理，并将处理后得到的N个电信号发送给所述单板接口芯片；
    其中，所述第一光信号与所述第三光信号的波长不同，所述第一光信号的波长与所述第四光信号的波长相同；
    所述第二光信号与所述第四光信号的波长不同，所述第二光信号的波长与所述第 三光信号的波长相同。
  10. 根据权利要求1-9任一项所述的光网络装置，其特征在于，所述第一光传输组件和所述第二光传输组件分别通过晶体管外形TO封装。
  11. 一种光网络装置，用于第二光网络装置，其特征在于，包括：处理芯片、第一光传输组件以及第二光传输组件；其中，
    所述第一光传输组件，用于将第一光信号转换为第一电信号，并发送给所述处理芯片，所述第一光传输组件的输出端与所述处理芯片的输入端耦合；
    所述第二光传输组件，用于将第二光信号转换为第二电信号，并发送给所述处理芯片，所述第二光传输组件的输出端与所述处理芯片的输入端耦合；
    所述处理芯片用于：
    接收所述第一光传输组件发送的所述第一电信号以及所述第二光传输组件发送的所述第二电信号；
    对所述第一电信号和所述第二电信号进行处理，并将处理后得到的N个电信号发送给单板接口芯片，其中，N为大于2的整数。
  12. 根据权利要求11所述的光网络装置，其特征在于，所述处理芯片包括100Gbps附属单元接口CAUI-4接口；
    当所述单板接口芯片是100G单板接口芯片时，所述处理芯片通过所述CAUI-4接口连接所述100G单板接口芯片。
  13. 根据权利要求12所述的光网络装置，其特征在于，所述单板接口芯片是100G单板接口芯片，N＝4，所述N个电信号分别表示为电信号A1至电信号A4，所述处理芯片还包括第一电路、第二电路和第三电路；
    所述第三电路用于对所述第一电信号执行物理媒体附加PMA(2:1)处理，获得电信号C1和电信号C2；
    所述第三电路还用于对所述第二电信号执行PMA(2:1)处理，获得电信号C3和电信号C4；
    所述第二电路用于对电信号C1和电信号C2执行PMA(2:2)处理以及前向纠错FEC编码，获得电信号B1至电信号B4；
    所述第二电信号还用于对电信号C3和C4执行PMA(2:2)处理以及FEC解码，获得电信号B5至电信号B8；
    所述第一电路用于对电信号B1至电信号B8执行物理编解码子层PCS转换处理和PMA处理，获得所述电信号A1至电信号A4。
  14. 根据权利要求13所述的光网络装置，其特征在于，所述第一电路用于对电信号B1至电信号B8执行PCS转换处理和PMA处理，获得所述电信号A1至电信号A4具体包括：
    所述第一电路对电信号B1至电信号B8执行PCS转换处理，获得处理后的20个电信号，所述处理后的20个电信号分别表示为电信号D1至电信号D20；
    所述第一电路对所述电信号D1至电信号D20执行PMA(20:4)处理，获得所述电信号A1至电信号A4。
  15. 根据权利要求11或12所述的光网络装置，其特征在于，所述处理芯片包括2个 50Gbps附属单元接口50GAUI-2接口，所述2个50GAUI-2接口分别表示为第一50GAUI-2接口和第二50GAUI-2接口，当所述单板接口芯片为50G单板接口芯片时，所述处理芯片通过所述第一50GAUI-2接口和第二50GAUI-2接口连接所述50G单板接口芯片。
  16. 根据权利要求15所述的光网络装置，其特征在于，所述单板接口芯片是50G单板接口芯片，所述N等于4，所述N个电信号分别表示为电信号A1至电信号A4；
    所述处理芯片通过所述第一50GAUI-2接口向所述单板接口芯片发送所述电信号A1和电信号A2；
    所述处理芯片通过所述第二50GAUI-2接口向所述单板接口芯片发送所述电信号A3和电信号A4
    所述处理芯片还包括第三电路，所述第三电路用于：
    对所述第一电信号执行PMA(2:1)处理，得到所述电信号A1和电信号A2；
    对所述第二电信号执行PMA(2:1)处理，得到所述电信号A3和电信号A4。
  17. 根据权利要求11-16任一项所述的光网络装置，其特征在于，所述处理芯片包括2个50GAUI-1接口，所述2个50GAUI-1接口分别表示为第一50GAUI-1接口和第二50GAUI-1接口；
    所述处理芯片通过所述第一50GAUI-1接口与所述第一光传输组件连接，以及通过所述第二50GAUI-1接口与所述第二光传输组件连接。
  18. 根据权利要求11-17任一项所述的光网络装置，其特征在于，所述第一光传输组件和所述第二光传输组件分别通过晶体管外形TO封装。
  19. 一种光模块，其特征在于，包括权利要求1-18任一项所述的光网络装置。
  20. 一种信号处理方法，应用于第一光网络装置，其特征在于，所述第一光网络装置包括：处理芯片、第一光传输组件以及第二光传输组件，并且所述第一光传输组件的输入端与所述处理芯片的输出端耦合，所述第二光传输组件的输入端与所述处理芯片的输出端耦合。所述方法包括：
    所述处理芯片接收单板接口芯片发送的N个电信号，其中，N为大于2的整数；
    所述处理芯片对所述N个电信号进行处理，将接收到的所述N个电信号转换为两个电信号，所述两个电信号分别表示为第一电信号和第二电信号；
    所述处理芯片将所述第一电信号和所述第二电信号分别发送给所述第一光传输组件和所述第二光传输组件；
    所述第一光传输组件将所述第一电信号转换成第一光信号。
    所述第二光传输组件将所述第二电信号转换成第二光信号。
  21. 根据权利要求20所述的方法，其特征在于，所述处理芯片包括100Gbps附属单元接口CAUI-4接口，当所述单板接口芯片是100G单板接口芯片时，所述处理芯片通过所述CAUI-4接口连接所述100G单板接口芯片。
  22. 根据权利要求21所述的方法，其特征在于，所述单板接口芯片是100G单板接口芯片，N＝4，所述N个电信号分别表示为电信号A1至电信号A4，所述处理芯片还包括第一电路、第二电路和第三电路；
    所述第一电路用于对所述电信号A1至电信号A4执行物理媒体附加PMA处理和物理编解码子层PCS转换处理，得到处理后的8个电信号，所述处理后的8个电信号分别表示为电信号B1至电信号B8；
    所述第二电路用于对电信号B1至电信号B4执行前向纠错FEC编码以及PMA(2:2)处理，得到处理后的电信号C1和电信号C2；
    所述第二电路还用于以及对电信号B5至电信号B8执行FEC编码以及PMA(2:2)处理，获得处理后电信号C3和电信号C4；
    所述第三电路用于对电信号C1和电信号C2执行PMA(2:1)处理，得到处理后的所述第一电信号；
    所述第三电路还用于对电信号C3和电信号C4执行PMA(2:1)处理，得到处理后的所述第二电信号。
  23. 根据权利要求22所述的方法，其特征在于，所述第一电路用于对所述电信号A1至电信号A4执行PMA处理和PCS转换处理，得到所述电信号B1至电信号B8具体包括：
    所述第一电路对所述电信号A1至电信号A4执行PMA(20:4)处理，得到处理后的20个电信号，所述处理后的20个电信号分别表示为电信号D1至电信号D20；
    所述第一电路对所述电信号D1至电信号D20执行PCS转换处理，得到所述电信号B1至电信号B8。
  24. 根据权利要求20或21所述的方法，其特征在于，所述处理芯片包括2个50Gbps附属单元接口50GAUI-2接口，所述2个50GAUI-2接口分别表示为第一50GAUI-2接口和第二50GAUI-2接口，当所述单板接口芯片为50G单板接口芯片时，所述处理芯片通过所述第一50GAUI-2接口和第二50GAUI-2接口连接所述50G单板接口芯片。
  25. 根据权利要求24所述的方法，其特征在于，所述单板接口芯片是50G单板接口芯片，所述N等于4，所述N个电信号分别表示为电信号A1至电信号A4；
    所述处理芯片通过所述第一50GAUI-2接口接收所述电信号A1和电信号A2；
    所述处理芯片通过所述第二50GAUI-2接口接收所述电信号A3和电信号A4；
    所述处理芯片还包括第三电路，所述第三电路用于：
    对所述电信号A1和电信号A2执行PMA(2:1)处理，得到处理后的所述第一电信号；
    对所述电信号A3和电信号A4执行PMA(2:1)处理，得到处理后的所述第二电信号。
  26. 根据权利要求20-25任一项所述的方法，其特征在于，所述处理芯片包括2个50GAUI-1接口，所述2个50GAUI-1接口分别表示为第一50GAUI-1接口和第二50GAUI-1接口；
    所述处理芯片通过所述第一50GAUI-1接口与所述第一光传输组件连接，以及通过所述第二50GAUI-1接口与所述第二光传输组件连接。
  27. 根据权利要求20-26任一项所述的光网络装置，其特征在于，
    所述第一光传输组件包括第一电光转换模块以及与所述第一电光转换模块连接的第一光复用器，所述第一电光转换模块用于将所述第一电信号转换为所述第一光信号，所述第一光复用器用于向第二光网络装置发送所述第一光信号；
    所述第二光传输组件包括第二电光转换模块以及与所述第二电光转换模块连接的第二光复用器，所述第二电光转换模块用于将所述第二电信号转换为所述第二光信号， 所述第二光复用器用于向所述第二光网络装置发送所述第二光信号。
  28. 根据权利要求27所述的光网络装置，其特征在于，所述第一光传输组件还包括：与所述第一光复用器连接的第一光探测器，所述第二光传输组件还包括与所述第二光复用器连接的第二光探测器；
    所述第一光复用器，用于接收所述第二光网络装置发送的第三光信号，并将所述第三光信号输出给所述第一光探测器；所述第一光探测器，用于将所述第三光信号转换为第三电信号；
    所述第二光复用器，用于接收所述第二光网络装置发送的第四光信号，将所述第四光信号输出给所述第二光探测器；所述第二光探测器，用于将所述第四光信号转换为第四电信号；
    所述处理芯片，用于对所述第三电信号和所述第四电信号进行处理，并将处理后得到的N个电信号发送给所述单板接口芯片；
    其中，所述第一光信号与所述第三光信号的波长不同，所述第一光信号的波长与所述第四光信号的波长相同；
    所述第二光信号与所述第四光信号的波长不同，所述第二光信号的波长与所述第三光信号的波长相同。
  29. 根据权利要求20-28任一项所述的光网络装置，其特征在于，所述第一光传输组件和所述第二光传输组件分别通过晶体管外形TO封装。
  30. 一种信号处理方法，应用于第二光网络装置，其特征在于，第二光网络装置包括：处理芯片、第一光传输组件以及第二光传输组件，并且所述第一光传输组件的输出端与所述处理芯片的输入端耦合，所述第二光传输组件的输出端与所述处理芯片的输入端耦合。所述方法包括：
    所述第一光传输组件将第一光信号转换为第一电信号，并发送给所述处理芯片。
    所述第二光传输组件将第二光信号转换为第二电信号，并发送给所述处理芯片。
    所述处理芯片接收所述第一光传输组件发送的所述第一电信号以及所述第二光传输组件发送的所述第二电信号。
    所述处理芯片对所述第一电信号和所述第二电信号进行处理，并将处理后得到的N个电信号发送给单板接口芯片。其中，N为大于2的整数。
  31. 根据权利要求30所述的方法，其特征在于，所述处理芯片包括100Gbps附属单元接口CAUI-4接口；
    当所述单板接口芯片是100G单板接口芯片时，所述处理芯片通过所述CAUI-4接口连接所述100G单板接口芯片。
  32. 根据权利要求31所述的方法，其特征在于，所述单板接口芯片是100G单板接口芯片，N＝4，所述N个电信号分别表示为电信号A1至电信号A4，所述处理芯片还包括第一电路、第二电路和第三电路；
    所述第三电路用于对所述第一电信号执行物理媒体附加PMA(2:1)处理，获得电信号C1和电信号C2；
    所述第三电路还用于对所述第二电信号执行PMA(2:1)处理，获得电信号C3和电信号C4；
    所述第二电路用于对电信号C1和电信号C2执行PMA(2:2)处理以及前向纠错FEC 编码，获得电信号B1至电信号B4；
    所述第二电信号还用于对电信号C3和C4执行PMA(2:2)处理以及FEC解码，获得电信号B5至电信号B8；
    所述第一电路用于对电信号B1至电信号B8执行物理编解码子层PCS转换处理和PMA处理，获得所述电信号A1至电信号A4。
  33. 根据权利要求32所述的方法，其特征在于，所述第一电路用于对电信号B1至电信号B8执行PCS转换处理和PMA处理，获得所述电信号A1至电信号A4具体包括：
    所述第一电路对电信号B1至电信号B8执行PCS转换处理，获得处理后的20个电信号，所述处理后的20个电信号分别表示为电信号D1至电信号D20；
    所述第一电路对所述电信号D1至电信号D20执行PMA(20:4)处理，获得所述电信号A1至电信号A4。
  34. 根据权利要求30或31所述的方法，其特征在于，所述处理芯片包括2个50Gbps附属单元接口50GAUI-2接口，所述2个50GAUI-2接口分别表示为第一50GAUI-2接口和第二50GAUI-2接口，当所述单板接口芯片为50G单板接口芯片时，所述处理芯片通过所述第一50GAUI-2接口和第二50GAUI-2接口连接所述50G单板接口芯片。
  35. 根据权利要求34所述的方法，其特征在于，所述单板接口芯片是50G单板接口芯片，所述N等于4，所述N个电信号分别表示为电信号A1至电信号A4；
    所述处理芯片通过所述第一50GAUI-2接口向所述单板接口芯片发送所述电信号A1和电信号A2；
    所述处理芯片通过所述第二50GAUI-2接口向所述单板接口芯片发送所述电信号A3和电信号A4
    所述处理芯片还包括第三电路，所述第三电路用于：
    对所述第一电信号执行PMA(2:1)处理，得到所述电信号A1和电信号A2；
    对所述第二电信号执行PMA(2:1)处理，得到所述电信号A3和电信号A4。
  36. 根据权利要求30-35任一项所述的方法，其特征在于，所述处理芯片包括2个50GAUI-1接口，所述2个50GAUI-1接口分别表示为第一50GAUI-1接口和第二50GAUI-1接口；
    所述处理芯片通过所述第一50GAUI-1接口与所述第一光传输组件连接，以及通过所述第二50GAUI-1接口与所述第二光传输组件连接。
  37. 根据权利要求30-36任一项所述的方法，其特征在于，所述第一光传输组件和所述第二光传输组件分别通过晶体管外形TO封装。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN204859187U (zh) * 2015-08-31 2015-12-09 武汉光迅科技股份有限公司 一种带前向纠错功能基于直接调制激光器的100g光收发模块
CN105553561A (zh) * 2015-12-24 2016-05-04 武汉光迅科技股份有限公司 一种2×100g光收发模块
CN107124225A (zh) * 2017-03-08 2017-09-01 武汉电信器件有限公司 一种基于dml的高速pam4光收发模块
CN107167886A (zh) * 2017-07-25 2017-09-15 苏州海光芯创光电科技有限公司 一种多波长并行光收发器件

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4635763B2 (ja) 2005-07-21 2011-02-23 住友電気工業株式会社 光送受信モジュール
EP1989796A4 (en) * 2006-02-17 2013-10-23 Finisar Corp DISCRETE PRIMING IN AN OPTICAL RECEIVER TO PREVENT SIGNAL FEEDBACK
US8721193B2 (en) 2010-08-13 2014-05-13 Finisar Corporation Electronic module having multiple flex circuit connectors
JP5759358B2 (ja) 2011-12-13 2015-08-05 日本電信電話株式会社 光伝送システム及び光伝送方法
KR101819254B1 (ko) * 2013-09-13 2018-01-17 한국전자통신연구원 대용량 광 트랜시버 모듈
US9281970B2 (en) * 2013-10-11 2016-03-08 Intel Corporation Error burst detection for assessing reliability of a communication link
US9553670B2 (en) 2014-03-03 2017-01-24 Inphi Corporation Optical module
EP3499750B1 (en) 2014-03-20 2021-04-07 Nippon Telegraph and Telephone Corporation Transport apparatus and transport method
EP3267603B1 (en) 2015-03-04 2019-07-24 Mitsubishi Electric Corporation Signal transmission device and signal transmission method
CN105071865A (zh) 2015-07-27 2015-11-18 武汉光迅科技股份有限公司 一种100g中距离传输cfp光模块
CN106936500B (zh) * 2015-12-30 2020-02-14 华为技术有限公司 一种光信号的传输方法及装置、系统
JP6844229B2 (ja) 2016-08-26 2021-03-17 住友電気工業株式会社 ホスト基板、光受信器、光送信器、光トランシーバ、およびホスト基板への光トランシーバの実装方法
CN106375017A (zh) * 2016-08-29 2017-02-01 武汉光迅科技股份有限公司 一种基于pam4调制的光收发模块
CN206461624U (zh) 2017-03-03 2017-09-01 成都欧飞凌通讯技术有限公司 一种100g的qsfp28 lr4双通道接收光模块
US10447423B2 (en) * 2017-11-03 2019-10-15 The Boeing Company Bidirectional, multi-wavelength gigabit optical fiber network

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN204859187U (zh) * 2015-08-31 2015-12-09 武汉光迅科技股份有限公司 一种带前向纠错功能基于直接调制激光器的100g光收发模块
CN105553561A (zh) * 2015-12-24 2016-05-04 武汉光迅科技股份有限公司 一种2×100g光收发模块
CN107124225A (zh) * 2017-03-08 2017-09-01 武汉电信器件有限公司 一种基于dml的高速pam4光收发模块
CN107167886A (zh) * 2017-07-25 2017-09-15 苏州海光芯创光电科技有限公司 一种多波长并行光收发器件

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
HUAWEI: "Issues in standardization of lower layer splits 5, 6, 7", 3GPP TSG RAN WG3 #95 R3-170736, 12 February 2017 (2017-02-12), XP051213314 *
See also references of EP3796574A4

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JP7150893B2 (ja) 2022-10-11
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US20210105072A1 (en) 2021-04-08
US11563494B2 (en) 2023-01-24

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