WO2019228221A1 - Procédé et appareil de synchronisation d'horloge, dispositif terminal, puce et support d'informations lisible - Google Patents

Procédé et appareil de synchronisation d'horloge, dispositif terminal, puce et support d'informations lisible Download PDF

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Publication number
WO2019228221A1
WO2019228221A1 PCT/CN2019/087709 CN2019087709W WO2019228221A1 WO 2019228221 A1 WO2019228221 A1 WO 2019228221A1 CN 2019087709 W CN2019087709 W CN 2019087709W WO 2019228221 A1 WO2019228221 A1 WO 2019228221A1
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WIPO (PCT)
Prior art keywords
clock
terminal device
information
signaling
deviation value
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PCT/CN2019/087709
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English (en)
Chinese (zh)
Inventor
汲桐
杨坤
高峰
宋兴华
于光炜
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华为技术有限公司
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Publication of WO2019228221A1 publication Critical patent/WO2019228221A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/001—Synchronization between nodes

Definitions

  • the present application relates to communication technologies, and in particular, to a clock synchronization method, device, terminal device, chip, and readable storage medium.
  • terminal devices In a mobile communication system, it may be necessary to perform high-precision clock synchronization (such as clock synchronization with microsecond accuracy) before the terminal device and the terminal device, so that the terminal devices can perform normal information interaction.
  • terminal devices interact with each other through a network device (such as a base station).
  • the network device can be regarded as a centralized controller of the terminal device, so the network device can be used as a clock synchronization source.
  • Each terminal device only needs to maintain clock synchronization with the network, respectively, to achieve clock synchronization between terminal devices.
  • a network device sends clock information to a terminal device through a preset system message. After receiving the clock information sent by the network device, the terminal device directly uses the clock information to synchronize the clock of the terminal device.
  • the method of the prior art does not consider the influence of wireless propagation delay on clock accuracy, and the propagation delay will reduce the clock synchronization accuracy of the terminal device and the base station, and thus cannot meet the high-accuracy clock between terminal devices in some application scenarios demand.
  • This application provides a clock synchronization method, device, terminal device, chip, and readable storage medium, which are used to solve the problem that the high-precision clock requirements of the mobile communication system cannot be met in the prior art.
  • a first aspect of the present application provides a clock synchronization method, which includes:
  • the terminal device first determines clock information, where the clock information includes at least one of a first clock and a correction parameter, and the first clock is determined by the terminal device according to the first information sent by the network device. Further, the terminal device performs clock synchronization according to the clock information.
  • the terminal device performs clock synchronization according to the clock information, where the clock information includes at least one of a first clock and a correction parameter, that is, the terminal device synchronizes with factors such as time delay or deviation when performing clock synchronization,
  • the clock synchronization between the terminal device and the network device is ensured, thereby ensuring normal communication between the terminal device and the terminal device.
  • the correction parameter includes a first deviation value, and the first deviation value is an estimated value of a deviation between a terminal device clock and a network device clock;
  • the terminal device performing clock synchronization according to the clock information includes:
  • the terminal device determines a target clock according to the first deviation value and an original clock of the terminal device.
  • the terminal device determining the target clock according to the first deviation value and the original clock of the terminal device includes:
  • the terminal device determines that the target clock is a sum or difference between the original clock of the terminal device and the first deviation value.
  • the terminal device performing clock synchronization according to the clock information includes:
  • the terminal device performs clock synchronization according to the first clock and the correction parameter.
  • the correction parameter includes an estimated value of uplink timing advance
  • the terminal device performing clock synchronization according to the first clock and the correction parameter includes:
  • the terminal device determines a target clock according to the first clock and the estimated value of the uplink timing advance.
  • the determining, by the terminal device, a target clock according to the first clock and the estimated value of the uplink timing advance includes:
  • the terminal device determines that the target clock is the sum of the first clock and half of the estimated value of the uplink timing advance.
  • the correction parameter includes an estimated value of uplink timing advance and a second deviation value
  • the second deviation value is an actual receiving time of the network device that receives the second information sent by the terminal device and Deviation of ideal receiving time
  • the terminal device performing clock synchronization according to the first clock and the correction parameter includes:
  • the terminal device determines a target clock according to the first clock, the estimated value of the uplink timing advance, and the second deviation value.
  • determining, by the terminal device, a target clock according to the first clock, the estimated value of the uplink timing advance, and the second deviation value includes:
  • the terminal device determines that the target clock is a sum of a first clock and a target function, and the target function is a function of an estimated value of the uplink timing advance and the second deviation value.
  • the objective function is a sum or difference between half of the estimated value of the uplink timing advance and half of the second deviation value.
  • the method before the terminal device determines the clock information, the method further includes:
  • the terminal device determining the clock information includes:
  • the terminal device determines the correction parameter according to at least one of MAC access control signaling, MAC signaling, radio resource control RRC signaling, and physical layer signaling.
  • the first information is at least one of physical layer signaling, MAC signaling, non-access layer NAS signaling, dedicated RRC signaling, and system messages.
  • a second aspect of the present application provides a clock synchronization method, which includes:
  • the network device sends the first information to the terminal device, so that the terminal device determines the first clock according to the first information
  • the network device sends instruction information to the terminal device, so that the terminal device determines a correction parameter according to the instruction information.
  • the indication information is at least one of MAC access control signaling, radio resource control RRC signaling, and physical layer signaling.
  • the first information is at least one of physical layer signaling, MAC signaling, non-access layer NAS signaling, dedicated RRC signaling, and system messages.
  • a third aspect of the present application provides a clock synchronization device, which has the functions of implementing the first aspect. These functions can be implemented by hardware, or they can be implemented by hardware to execute corresponding software.
  • the hardware or software includes one or more modules corresponding to the functions described above.
  • the electronic device may include a processing module, and the processing module may perform a corresponding function in the foregoing method, for example, the processing module is configured to determine clock information, where the clock information includes a first clock and a correction parameter At least one of the above, wherein the first clock is determined by the terminal device according to the first information sent by the network device, and the processing module is further configured to perform clock synchronization according to the clock information.
  • a fourth aspect of the present application provides a clock synchronization device, which has the functions of implementing the second aspect. These functions can be implemented by hardware, or they can be implemented by hardware to execute corresponding software.
  • the hardware or software includes one or more modules corresponding to the functions described above.
  • the electronic device may include a processing module and a sending module, and the processing module and the sending module may perform corresponding functions in the foregoing method, for example, a processing module is configured to send the first device to the terminal device through the sending module. Information, so that the terminal device determines a first clock according to the first information, and the processing module is further configured to send instruction information to the terminal device through a sending module, so that the terminal device determines a correction parameter according to the instruction information .
  • a fifth aspect of the present application provides a terminal device, where the terminal device includes a memory and a processor.
  • the processor is configured to be coupled to the memory, and read and execute instructions in the memory to execute the method in the first aspect.
  • a sixth aspect of the present application provides a network device, where the network device includes a memory and a processor.
  • the processor is configured to be coupled to the memory, and read and execute instructions in the memory to execute the method in the second aspect.
  • a seventh aspect of the present application provides a chip including: at least one communication interface, at least one processor, and at least one memory, wherein the communication interface, the processor, and the memory are communicatively connected, and the processor Call the instructions stored in the memory, so that the terminal device executes the method of the first aspect.
  • An eighth aspect of the present application provides a chip including: at least one communication interface, at least one processor, and at least one memory, wherein the communication interface, the processor, and the memory are communicatively connected, and the processor Call the instructions stored in the memory, so that the terminal device executes the method of the first aspect.
  • a ninth aspect of the present application provides a computer program product, where the computer program product includes computer program code, and when the computer program code is executed by a computer, causes the computer to execute the method according to the first aspect or the second aspect.
  • a tenth aspect of the present application provides a computer-readable storage medium, where the computer storage medium stores computer instructions, and when the computer instructions are executed by a computer, cause the computer to execute the foregoing or the second aspect. Instructions for the method.
  • An eleventh aspect of the present application provides a clock synchronization device for performing the method described in the first aspect.
  • a twelfth aspect of the present application provides a clock synchronization device for performing the method described in the second aspect.
  • FIG. 1 is a system architecture diagram related to a clock synchronization method provided by this application;
  • FIG. 2 is a schematic flowchart of an embodiment of a clock synchronization method provided by this application.
  • FIG. 3 is a schematic timing diagram of a terminal device and a base station sending timing signals respectively;
  • FIG. 4 is a schematic diagram of timings when a terminal device and a base station respectively send a timing signal and a base station schedules an uplink timing signal;
  • 5 is a schematic diagram of sending timing information by a base station
  • FIG. 6 is a block structural diagram of a first embodiment of a clock synchronization device provided by the present application.
  • FIG. 7 is a block structural diagram of a second embodiment of a clock synchronization device provided by the present application.
  • FIG. 8 is a physical block diagram of a terminal device 800 provided in this application.
  • FIG. 9 is a physical block diagram of a chip 900 provided in this application.
  • FIG. 10 is a module structural diagram of another clock synchronization device provided by the present application.
  • FIG. 11 is a physical block diagram of a network device 1100 provided in this application.
  • FIG. 12 is a physical block diagram of a chip 1200 provided by the present application.
  • the controller needs to maintain clock synchronization with the actuator.
  • the controller sends control signaling to the actuator, instructing the actuator to execute the command at a certain time. If the actuator and the controller have different perceptions of time, that is, the clock is not synchronized, the actuator will execute the command at the wrong time. Causes task execution to fail.
  • the actuator thinks that the 3 o'clock appears to the controller at 3.01 seconds, so the actuator appears to the controller to start at 3.01 seconds, turning for 5 seconds, and lasting to 3.06 seconds. And this 1 second lag may cause conflicts with other actuators.
  • phase synchronization modules (Phasor Measurement Unit, PMU) need clock synchronization, and PMUs are deployed on power lines as terminal devices to sense changes in power information, such as changes in voltage and current.
  • PMU Phase synchronization modules
  • PMUs are deployed on power lines as terminal devices to sense changes in power information, such as changes in voltage and current.
  • a fault occurs somewhere on the power line, a power wave is generated there, and the power wave is transmitted in both directions along the power line.
  • the PMU will sense the changes in voltage and current.
  • Time which represents the time when the power wave reaches the location.
  • the PMUs at both ends of the power line sense power waves in two directions, the power waves in both directions are generated simultaneously. If the time of the two PMUs is synchronized, the time difference can be used to calculate the power wave.
  • the position is the difference between the distance between the two PMUs and the distance between the two PMUs is fixed, and the specific fault location can be calculated.
  • terminal devices interact with each other through network devices.
  • the network device can be regarded as a centralized controller of the terminal device, so the network device can be used as a synchronization source of the time.
  • Each terminal device only needs to maintain clock synchronization with the network device, respectively, to achieve clock synchronization between the terminal devices.
  • the terminal device directly uses the clock information sent by the network device for clock synchronization, and ignores the propagation delay or the clock deviation between the terminal device and the network device when the network device sends a message to the terminal device.
  • the clock synchronization accuracy between terminal devices requires high accuracy, which generally requires accuracy in the order of 1 to 10 microseconds. With such a high accuracy requirement, if the propagation delay or clock deviation of the message is not considered, it may lead to fatal errors. For example, assuming a cell radius of 30 kilometers, the propagation delay is about 100 microseconds, and the accuracy requirement relative to 1 to 10 microseconds cannot be ignored, otherwise serious errors may occur in communication between terminal devices. For example, in the second example scenario described above, the propagation delay or clock deviation may cause the fault point location calculation to be incorrect.
  • the technical solution of this application aims to solve the above problems.
  • This application can be applied to cellular communication network systems, such as the NR system, Long Term Evolution (LTE) system, Global System for Mobile Communication (GSM), Universal Mobile Telecommunications System (UMTS) ), Code Division Multiple Access (Code Division Multiple Access, CDMA) systems, etc.
  • LTE Long Term Evolution
  • GSM Global System for Mobile Communication
  • UMTS Universal Mobile Telecommunications System
  • CDMA Code Division Multiple Access
  • FIG. 1 is a system architecture diagram related to a clock synchronization method provided in this application. As shown in FIG. 1, the method involves a terminal device and a network device.
  • the terminal device may be a device providing voice and / or data connectivity to a user, a handheld device having a wireless connection function, or other processing device connected to a wireless modem.
  • a wireless terminal device can communicate with one or more core networks via a Radio Access Network (RAN).
  • the wireless terminal device can be a mobile terminal device, such as a mobile phone (also called a "cellular" phone) and has mobile
  • the computer of the terminal device may be, for example, a portable, compact, handheld, built-in computer or vehicle-mounted mobile device, which exchanges language and / or data with a wireless access network.
  • a wireless terminal device can also be called a system, a subscriber unit, a subscriber station, a mobile station, a mobile station, a remote station, and an access point.
  • Remote Terminal Equipment Remote Terminal Equipment
  • Access Terminal Access Terminal
  • User Terminal Equipment User Terminal Equipment
  • User Agent User Agent
  • User Equipment User Equipment
  • User Equipment User Equipment
  • the above network device may be a base station, which may be used to convert the received air frames and IP packets to each other and serve as a router between the wireless terminal device and the rest of the access network, where the rest of the access network may include the Internet Protocol (IP) network.
  • IP Internet Protocol
  • the base station can also coordinate the attribute management of the air interface.
  • the base station can be a Global System for Mobile (Communication, Global Communication System, GSM) or a Base Station (Base Transceiver Station, BTS) in Code Division Multiple Access (CDMA), or it can be a Broadband Code Division Multiple Access
  • the base station (NodeB) in Wideband Code Division Multiple Access (WCDMA) can also be an evolved base station (eNB or e-NodeB, evolutional NodeB) in LTE, or gNB in NR. This application is not limited.
  • a base station is used to represent a network device.
  • FIG. 2 is a schematic flowchart of an embodiment of a clock synchronization method provided in this application. As shown in FIG. 2, the method includes:
  • the terminal device determines clock information, where the clock information includes at least one of a first clock and a correction parameter, where the first clock is determined by the terminal device according to the first information sent by the network device.
  • the first clock is a public clock synchronized by a network device.
  • the public clock refers to a public clock that has a uniform standard and does not change with the change of subjective consciousness of any independent person or social group.
  • it can be Global Positioning System (GPS) clock, Universal Time Coordinated (UTC) time, Beidou clock, etc.
  • GPS Global Positioning System
  • UTC Universal Time Coordinated
  • Beidou clock etc.
  • the first clock is determined by the terminal device according to the first information sent by the network device.
  • the first information carries time information
  • the time information is a time corresponding to a determined time reference point
  • the time reference point may be a sending time of the first information or any other determined network device and
  • the terminal device has a consensus reference time.
  • the first information carries time reference point information and time information of the time reference point.
  • the clock synchronization may be a preliminary clock synchronization, and the terminal device may adjust it by a certain method.
  • the first information may be at least one of physical layer signaling or high layer signaling.
  • the physical layer signaling may be a signal carried on a physical downlink control channel (Physical Downlink Control Channel, PDCCH) or a physical hybrid automatic retransmission indicator channel (Physical Hybrid ARQ Indicator Channel, PHICH), or the physical layer signaling It can be a reference signal.
  • PDCCH Physical Downlink Control Channel
  • PHICH Physical Hybrid ARQ Indicator Channel
  • the above-mentioned high-level signaling may be system messages, Radio Resource Control (RRC) signaling, (Media Access Control Control Elment, MAC CE) signaling, or non-access stratum (NAS) signaling. make.
  • RRC Radio Resource Control
  • MAC CE Media Access Control Control Elment
  • NAS non-access stratum
  • the base station broadcasts the time information of the first clock through a system message, and after receiving the system message, the terminal device determines the time information of the first clock according to the content of the system message.
  • the terminal device when the terminal device obtains both the time information of the first clock through the system message and the non-system message (such as dedicated RRC signaling, physical layer signaling, MAC CE, or NAS signaling, etc.) Time information, the terminal device can determine the first clock according to the time information of the first clock obtained from non-system messages, because generally, non-system messages have higher security, privacy and reliability than system messages. .
  • the non-system message such as dedicated RRC signaling, physical layer signaling, MAC CE, or NAS signaling, etc.
  • the terminal device when the terminal device obtains both the time information of the first clock through a system message and the time information of the first clock through a non-system message, two pieces of time information of the first clock can be compared.
  • the terminal device may determine the first clock according to the time information of the first clock obtained through the system message or the time information of the first clock obtained through the non-system message; otherwise, the terminal device may The time information of the first clock obtained by the message is used to determine the first clock.
  • the terminal device may obtain The time information of the first clock is used to determine the first clock, and the certain time range may be a positive integer number of symbols, time slots, subframes, frames, or Transmission Time Interval (TTI).
  • TTI Transmission Time Interval
  • the above-mentioned correction parameter may include an estimated value of a deviation value of the terminal device clock and a network device clock, an estimated value of an uplink timing advance, and the like.
  • the terminal device may determine the correction parameter according to at least one of MAC CE signaling, RRC signaling, and physical layer signaling.
  • the physical layer signaling may be a signal carried on a PDCCH or a PHICH, or a reference signal.
  • the network device sends indication information to the terminal device, where the indication information is at least one of MAC signaling, RRC signaling, and physical layer signaling.
  • the terminal device determines the correction parameter according to the instruction information.
  • the terminal device performs clock synchronization according to the clock information.
  • the terminal device may adjust the local clock of the terminal device based on the clock information, so that the local clock of the terminal device and the clock of the base station remain synchronized.
  • the terminal device performs clock synchronization according to the clock information, where the clock information includes at least one of the first clock and the correction parameter, that is, the terminal device synchronizes with factors such as time delay or deviation when performing clock synchronization Therefore, the accuracy of clock synchronization between the terminal device and the network device is ensured to be sufficiently high, thereby ensuring normal communication between the terminal device and the terminal device.
  • the terminal device can perform clock synchronization in the following three ways.
  • the terminal device performs clock synchronization according to the first clock
  • Terminal equipment performs clock synchronization according to the modified parameters
  • the terminal device performs clock synchronization according to the first clock.
  • the network device sends the first information to the terminal device, the terminal device receives the first information sent by the network device, and further, the terminal device determines the first clock according to the first information.
  • the network device has taken into account information such as propagation delay when sending the first information, and accordingly, the first clock determined by the terminal device according to the first information is a clock that takes into account information such as propagation delay. Therefore, the terminal device can directly perform clock synchronization according to the first clock.
  • the network device may determine that the first clock is a function of a common clock and an uplink timing advance synchronized by the network device.
  • the function of the common clock and uplink timing advance synchronized by the network device may be specifically:
  • the common clock is added to half of the estimated value of the uplink timing advance.
  • the terminal device performs clock synchronization according to the correction parameter
  • the correction parameter may include a first deviation value, and the first deviation value is an estimated value of a deviation between the terminal device clock and the network device clock.
  • the clock of the terminal device may drift, which may cause the terminal device clock to deviate from the network device clock.
  • the terminal device may determine the target clock based on the first deviation value, that is, the estimated value of the deviation between the terminal device clock and the network device clock, and the original clock of the terminal device.
  • the original clock of the terminal device is a local clock of the terminal device before performing clock synchronization.
  • the terminal device determines the target clock as a function of the original clock of the terminal device and the first deviation value.
  • the function of the original clock of the terminal device and the first deviation value may be specifically:
  • the terminal device adjusts the time of the first deviation value forward or backward based on the original clock of the terminal device.
  • the first deviation deviation value is 5 seconds
  • the time of the original clock of the terminal device is 3:01:08.
  • the sum of the first deviation value and the adjusted target clock time of the terminal device is 3:01:13. If the function of the original clock of the terminal device and the first deviation value is a difference between the original clock of the terminal device and the first deviation value, after adjustment, the target clock time of the terminal device is 3:01:03. Thereby, adjustment of the clock deviation of the terminal device is realized.
  • the first deviation value Before performing clock synchronization based on the first deviation value and the original clock, the first deviation value needs to be determined first.
  • the terminal device can determine the first deviation value in the following two optional ways.
  • the first deviation value may be determined according to time information of the timing signal sent by the terminal device and the network device, respectively.
  • FIG. 3 is a timing diagram of a terminal device and a base station sending timing signals respectively.
  • the base station and the terminal device each send a signal to the other party, which is called a timing signal.
  • the downlink timing signal is sent by the base station to the terminal device
  • the uplink timing signal is sent by the terminal device to the base station.
  • the base station sends a downlink timing signal to the terminal device at t 0 BS
  • the terminal device receives the downlink timing signal at t 1 UE
  • the terminal device sends an uplink timing signal to the base station at t 2 UE
  • the base station receives at t 3 BS
  • the uplink timing signal is P UL and P DL, respectively .
  • the first offset value is offset, that is, there is an offset time offset between the terminal device and the base station.
  • the above-mentioned first deviation value offset can be calculated, and the calculation formula is the following formula (4):
  • the time of the original clock of the terminal device is The target device's target clock time is Then the time of the target clock can be calculated by the following formula (5):
  • formulas (1), (2), and (3) may be Replaced with:
  • the following describes the method for acquiring the above t 0 BS , t 1 UE , t 2 UE , and t 3 BS .
  • t 1 UE and t 2 UE are the time of receiving and sending signals on the terminal device side, and can be obtained based on the local implementation method of the terminal device. For example, they can be directly obtained through the local clock of the terminal device, or sent by the receiving base station.
  • the terminal device may obtain t 1 UE and t 2 UE by receiving clock information and / or indication information of uplink timing advance sent by the base station.
  • t 0 BS is the time when the base station sends the downlink timing signal. Before the base station sends the downlink timing signal to the terminal device, it can instruct the terminal device to send the downlink timing signal through instruction information such as RRC signaling, MAC CE, or physical layer signaling. At time, the terminal device can obtain t 0 BS by receiving the instruction information.
  • instruction information such as RRC signaling, MAC CE, or physical layer signaling.
  • t 3 BS is the time when the base station side receives the uplink timing signal.
  • the base station may send the instruction information for indicating the t 3 BS to the terminal device, and the terminal device may obtain the t 3 BS by receiving the instruction information.
  • the above instruction information for indicating t 3 BS may be indicated to the terminal device by an indirect instruction method.
  • the base station may indicate to the terminal device the scheduling time of the uplink timing signal and the actual receiving time.
  • the scheduling time of the uplink timing signal refers to the ideal receiving timing of the uplink timing signal, that is, the time at which the base station requests the terminal device to send the uplink timing signal to the base station.
  • the above downlink timing signal may specifically be a cell reference signal (CRS), or a channel state information reference signal (Channel-Information Reference Signal, CSI-RS), or a demodulation reference signal (DeModulation, Reference Signal, DMRS), or Phase-tracking Reference Signal (PTRS).
  • the uplink timing signal may be a sounding reference signal (SRS), a demodulation reference signal (DMRS), or a phase-tracking reference signal (PTRS).
  • the above-mentioned downlink timing signal and the above-mentioned timing timing signal may be transmitted periodically, and their periods and resource locations are configured by the base station to the terminal device through RRC signaling or MAC CE beforehand.
  • the base station sends an instruction to the terminal device.
  • the instruction information can be sent based on two forms.
  • the first method is to send at a fixed time, and the second is to send at a non-fixed time.
  • the fixed time transmission refers to that the base station sends the instruction information to the terminal device at a predetermined time.
  • the base station may send the indication information to the terminal device in a semi-static scheduling manner; or the base station may periodically send the indication information to the terminal device through RRC signaling, MAC CE, or physical layer signaling.
  • Non-fixed time transmission means that the base station sends the instruction information to the terminal device from RRC signaling, MAC CE, or physical layer signaling from time to time.
  • the terminal device monitors the PDCCH channel at the corresponding position to detect whether the base station sends the instruction to it. information.
  • the terminal device may determine the first deviation value according to the time information of the timing signal and the estimated value of the uplink advance respectively sent by the terminal device and the network device.
  • FIG. 4 is a schematic diagram of timings when a terminal device and a base station respectively transmit a timing signal and a base station schedules an uplink timing signal.
  • the meanings of t 0 BS , t 1 UE , t 2 UE , t 3 BS , P UL , and P DL in FIG. 4 and The determination method is the same as that in FIG. 3 described above, and reference may be made to the description in FIG. 3 described above, and details are not described herein again.
  • t 4 BS is the time position of the uplink timing signal scheduled by the base station
  • t 5 UE is the reception time on the terminal device side corresponding to t 4 BS .
  • the terminal device can calculate the first deviation value by the following formula (6).
  • the terminal device can determine the target clock by using the above formula (5).
  • the T TA is an estimated value of the current uplink timing advance of the terminal device.
  • the terminal device performs clock synchronization according to the first clock and the correction parameter.
  • the network device sends the first information to the terminal device, the terminal device receives the first information sent by the network device, and determines a correction parameter. Further, the terminal device performs clock synchronization according to the first clock and the correction parameter.
  • the correction parameter may specifically have two values, and the first value is: the correction parameter includes an estimated value of uplink timing advance.
  • the second value is: the correction parameter includes the estimated value of the uplink timing advance and the second deviation value, where the second deviation value is the deviation between the actual reception time and the ideal reception time of the network device receiving the second information sent by the terminal .
  • Correction parameters include estimates of upstream timing advance
  • the terminal device determines a target clock according to the first clock and the estimated value of the uplink timing advance.
  • the terminal device may determine the target clock as a function of the first clock and the uplink timing advance.
  • the function of the first clock and the uplink timing advance is specifically:
  • the first clock is added to a half of the estimated value of the uplink timing advance.
  • the uplink timing advance can be used to determine an estimated propagation delay.
  • the following describes the specific process of the terminal device determining the target clock as a function of the first clock and the uplink timing advance.
  • FIG. 5 is a schematic diagram of a base station sending timing information. As shown in FIG. 5, the time when the base station sends timing signals is The time when the terminal equipment receives the timing signal is
  • the terminal device determines the target clock by the following formula (7):
  • the above-mentioned TA is an estimated value of the uplink timing advance.
  • the terminal device may obtain the estimated value of the uplink timing advance by receiving the indication information of the uplink timing advance sent by the base station.
  • the base station may send the foregoing uplink timing advance indication information to the terminal device through RRC signaling, MAC CE, or physical layer signaling.
  • the base station may indicate the timing of sending the timing signal to the terminal device by sending the timing signal indication information of the timing signal.
  • the base station may send the above-mentioned indication information of sending timing signals to the terminal device through RRC signaling, MAC CE, or physical layer signaling.
  • the correction parameters include the estimated value of the uplink timing advance and the second deviation value
  • the second deviation value is a deviation between an actual receiving time of the network device receiving the second information sent by the terminal device and an ideal receiving time.
  • the terminal device determines a target clock according to the first clock, the estimated value of the uplink timing advance, and the second deviation value.
  • the terminal device determines that the target clock is a sum of the first clock and a target function, and the target function is a function of the estimated value of the uplink timing advance and the foregoing second deviation value.
  • a function of the estimated value of the uplink timing advance and the second deviation value may be:
  • the following describes the specific process for the terminal device to determine the target clock.
  • the terminal device may use the following formula (8) to determine the target clock according to the time signal sending and receiving and scheduling time shown in the foregoing FIG. 4.
  • the time when the timing signal is sent to the base station that is, the time of the first clock. It is half of the estimated value of the upstream timing advance. It is half of the second deviation value. Calculated Time for the target clock.
  • the terminal device adjusts the time adjusted from the original clock to the time of the target clock according to the time of the target clock.
  • FIG. 6 is a module structure diagram of a first embodiment of a clock synchronization apparatus provided in this application.
  • the apparatus is applied to a terminal device. As shown in FIG. 6, the apparatus includes:
  • the processing module 601 is configured to determine clock information, where the clock information includes at least one of a first clock and a correction parameter, where the first clock is determined by the terminal device according to the first information sent by the network device.
  • the processing module is further configured to perform clock synchronization according to the clock information.
  • the correction parameter includes a first deviation value
  • the first deviation value is an estimated value of a deviation between a terminal device clock and a network device clock.
  • the processing module 601 is specifically configured to:
  • the target clock is determined according to the first deviation value and the original clock of the terminal device.
  • processing module 601 is specifically configured to:
  • the target clock is the sum or difference between the original clock of the terminal device and the first deviation value.
  • processing module 601 is specifically configured to:
  • the correction parameter includes an estimated value of uplink timing advance.
  • the processing module 601 is specifically configured to:
  • the target clock is determined according to the first clock and the estimated value of the uplink timing advance.
  • processing module 601 is specifically configured to:
  • the target clock is the sum of the first clock and half of the estimated value of the uplink timing advance.
  • the correction parameter includes an estimated value of uplink timing advance and a second deviation value, where the second deviation value is an actual reception time and ideal reception time of the network device receiving the second information sent by the terminal device. Time deviation.
  • the processing module 601 is specifically configured to:
  • the target clock is determined according to the first clock, the estimated value of the uplink timing advance, and the second deviation value.
  • processing module 601 is specifically configured to:
  • the target clock is a sum of a first clock and a target function
  • the target function is a function of the estimated value of the uplink timing advance and the second deviation value.
  • the objective function is a sum or difference between half of the estimated value of the uplink timing advance and half of the second deviation value.
  • FIG. 7 is a module structure diagram of a second embodiment of a clock synchronization device provided in this application. As shown in FIG. 7, the device further includes:
  • the receiving module 602 is configured to receive the first information sent by the network device.
  • the processing module 601 is further configured to:
  • processing module 601 is specifically configured to:
  • the correction parameter is determined according to at least one of MAC CE signaling, RRC signaling, and physical layer signaling.
  • the first information is at least one of physical layer signaling, MAC signaling, NAS signaling, dedicated RRC signaling, and system messages.
  • FIG. 8 is a physical block diagram of a terminal device 800 provided in this application. As shown in FIG. 8, the terminal device 800 includes:
  • the processor 802 is configured to be coupled to the memory 801, and read and execute instructions in the memory 801 to execute the following methods:
  • the clock information including at least one of a first clock and a correction parameter, wherein the first clock is determined by the terminal device according to the first information sent by the network device.
  • the correction parameter includes a first deviation value
  • the first deviation value is an estimated value of a deviation between a terminal device clock and a network device clock.
  • the processor 802 is specifically configured to:
  • the target clock is determined according to the first deviation value and the original clock of the terminal device.
  • processor 802 is specifically configured to:
  • the target clock is the sum or difference between the original clock of the terminal device and the first deviation value.
  • processor 802 is specifically configured to:
  • the correction parameter includes an estimated value of uplink timing advance.
  • the processor 802 is specifically configured to:
  • the target clock is determined according to the first clock and the estimated value of the uplink timing advance.
  • processor 802 is specifically configured to:
  • the target clock is the sum of the first clock and half of the estimated value of the uplink timing advance.
  • the correction parameter includes an estimated value of uplink timing advance and a second deviation value, where the second deviation value is an actual reception time and ideal reception time of the network device receiving the second information sent by the terminal device. Time deviation.
  • the processor 802 is specifically configured to:
  • the target clock is determined according to the first clock, the estimated value of the uplink timing advance, and the second deviation value.
  • processor 802 is specifically configured to:
  • the target clock is a sum of a first clock and an objective function
  • the objective function is a function of the estimated value of the uplink timing advance and the second deviation value.
  • the objective function is a sum or difference between half of the estimated value of the uplink timing advance and half of the second deviation value.
  • processor 802 is specifically configured to:
  • processor 802 is specifically configured to:
  • the correction parameter is determined according to at least one of MAC CE signaling, RRC signaling, and physical layer signaling.
  • the first information is at least one of physical layer signaling, MAC signaling, NAS signaling, dedicated RRC signaling, and system messages.
  • FIG. 9 is a physical block diagram of a chip 900 provided in the present application.
  • the chip 900 may be used in a terminal device.
  • the chip includes: at least one communication interface 901, at least one processor 902, and at least one memory 903.
  • the communication interface 901, the processor 902, and the memory 903 are interconnected by a circuit (or a bus in some cases) 904, and the processor 902 calls an instruction stored in the memory 903 to execute the following method:
  • the clock information including at least one of a first clock and a correction parameter, wherein the first clock is determined by the terminal device according to the first information sent by the network device.
  • the correction parameter includes a first deviation value
  • the first deviation value is an estimated value of a deviation between a terminal device clock and a network device clock.
  • the processor 902 is specifically configured to:
  • the target clock is determined according to the first deviation value and the original clock of the terminal device.
  • processor 902 is specifically configured to:
  • the target clock is the sum or difference between the original clock of the terminal device and the first deviation value.
  • processor 902 is specifically configured to:
  • the correction parameter includes an estimated value of uplink timing advance.
  • the processor 902 is specifically configured to:
  • the target clock is determined according to the first clock and the estimated value of the uplink timing advance.
  • processor 902 is specifically configured to:
  • the target clock is the sum of the first clock and half of the estimated value of the uplink timing advance.
  • the correction parameter includes an estimated value of uplink timing advance and a second deviation value, where the second deviation value is an actual reception time and ideal reception time of the network device receiving the second information sent by the terminal device. Time deviation.
  • the processor 902 is specifically configured to:
  • the target clock is determined according to the first clock, the estimated value of the uplink timing advance, and the second deviation value.
  • processor 902 is specifically configured to:
  • the target clock is a sum of a first clock and an objective function
  • the objective function is a function of the estimated value of the uplink timing advance and the second deviation value.
  • the objective function is a sum or difference between half of the estimated value of the uplink timing advance and half of the second deviation value.
  • processor 902 is specifically configured to:
  • processor 902 is specifically configured to:
  • the correction parameter is determined according to at least one of MAC CE signaling, RRC signaling, and physical layer signaling.
  • the first information is at least one of physical layer signaling, MAC signaling, NAS signaling, dedicated RRC signaling, and system messages.
  • FIG. 10 is a module structure diagram of another clock synchronization device provided by the present application. As shown in FIG. 10, the device includes:
  • the processing module 1001 is configured to send the first information to the terminal device through the sending module 1002, so that the terminal device determines the first clock according to the first information.
  • the processing module 1001 is further configured to send instruction information to the terminal device through the sending module 1002, so that the terminal device determines a correction parameter according to the instruction information.
  • the indication information is at least one of MAC signaling, RRC signaling, and physical layer signaling.
  • the first information is at least one of physical layer signaling, MAC signaling, CE signaling, non-access layer NAS signaling, dedicated RRC signaling, and system messages.
  • FIG. 11 is a physical block diagram of a network device 1100 provided in this application. As shown in FIG. 11, the network device 1100 includes:
  • the processor 1102 is coupled to the memory 1101, reads and executes the instructions in the memory 1101, and executes the following methods:
  • the indication information is at least one of MAC signaling, RRC signaling, and physical layer signaling.
  • the first information is at least one of physical layer signaling, MAC signaling, CE signaling, non-access layer NAS signaling, dedicated RRC signaling, and system messages.
  • FIG. 12 is a physical block diagram of a chip 1200 provided in the present application.
  • the chip 1200 can be used for network equipment.
  • the chip includes: at least one communication interface 1201, at least one processor 1202, and at least one memory 1203.
  • the communication interface 1201, the processor 1202, and the memory 1203 are interconnected through a circuit (or a bus in some cases) 1204, and the processor 1202 calls an instruction stored in the memory 1203 to execute the following method:
  • the indication information is at least one of MAC signaling, RRC signaling, and physical layer signaling.
  • the first information is at least one of physical layer signaling, MAC signaling, CE signaling, non-access layer NAS signaling, dedicated RRC signaling, and system messages.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be from a website site, a computer, a server, or a data center.
  • the computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, a data center, or the like that includes one or more available medium integration.
  • the usable medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a Solid State Disk (SSD)).
  • this application may be provided as a method, a system, or a computer program product. Therefore, this application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, this application may take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
  • computer-usable storage media including, but not limited to, disk storage, CD-ROM, optical storage, etc.
  • These computer program instructions may be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing device to produce a machine, so that the instructions generated by the processor of the computer or other programmable data processing device are used to generate instructions Means for implementing the functions specified in one or more flowcharts and / or one or more blocks of the block diagrams.
  • These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to work in a specific manner such that the instructions stored in the computer-readable memory produce a manufactured article including an instruction device, the instructions
  • the device implements the functions specified in one or more flowcharts and / or one or more blocks of the block diagram.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of steps can be performed on the computer or other programmable device to produce a computer-implemented process, which can be executed on the computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more flowcharts and / or one or more blocks of the block diagrams.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

La présente invention concerne un procédé et un appareil de synchronisation d'horloge, un dispositif terminal, une puce et un support d'informations lisible. Le procédé comprend les étapes suivantes : un dispositif terminal détermine d'abord des informations d'horloge, les informations d'horloge comprenant une première horloge et/ou un paramètre de correction, et la première horloge est déterminée par le dispositif terminal selon des premières informations envoyées par un dispositif de réseau; puis le dispositif terminal effectue une synchronisation d'horloge selon les informations d'horloge. Dans le procédé, un dispositif terminal effectue une synchronisation d'horloge en fonction d'informations d'horloge, les informations d'horloge comprenant au moins une première horloge et/ou un paramètre de correction, c'est-à-dire que le dispositif terminal effectue une synchronisation d'horloge en combinaison avec des facteurs tels qu'un retard ou un écart, garantissant ainsi la synchronisation d'horloge entre le dispositif terminal et un dispositif de réseau, et assurant la communication normale entre le dispositif terminal et le dispositif de réseau.
PCT/CN2019/087709 2018-05-31 2019-05-21 Procédé et appareil de synchronisation d'horloge, dispositif terminal, puce et support d'informations lisible WO2019228221A1 (fr)

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CN116095810A (zh) * 2020-03-02 2023-05-09 Oppo广东移动通信有限公司 同步方法及装置
CN115104346B (zh) * 2020-04-29 2024-03-26 诺基亚技术有限公司 将终端设备与网络时钟同步
CN111865465B (zh) * 2020-07-03 2022-09-02 火星人厨具股份有限公司 一种物联网设备精准校时方法
CN113541913B (zh) * 2020-11-05 2022-08-02 中兴通讯股份有限公司 时钟校准方法、时钟校准装置、电子设备和可读介质
CN113543303B (zh) * 2021-06-30 2022-10-21 紫光展锐(重庆)科技有限公司 一种同步方法、装置、芯片及模组设备
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