WO2019227440A1 - Ultra-high-definition image display driving method and device - Google Patents

Abstract

Disclosed are an ultra-high-definition image display driving method and device, comprising the following steps: dividing a frame/field of an ultra-high-definition image into several rows of video data by row; caching K rows of video data in the several rows of video data; parallelly outputting the cached K rows of video data to the ultra-high-definition display array and driving the row, corresponding to the K rows of video data, of the ultra-high-definition display array to be simultaneously displayed; caching another K rows of video data in the several rows of video data; parallelly outputting the other cached K rows of video data to the ultra-high-definition display array and driving the row, corresponding to the another K rows of video data, of the ultra-high-definition display array to be simultaneously displayed; and doing this to the rest of the several rows of video data in the same way, until the rows, corresponding to the several rows of video data of the one frame of the ultra-high-definition image, of the ultra-high-definition display array are all driven to be displayed. The method reduces a video data rate and ensures the grayscale accuracy of the displayed image.

Description

Ultra-high-definition image display driving method and device Technical field

The present invention relates to an ultra-high-definition image display driving technology, and in particular, to an ultra-high-definition image display driving method and device.

Background technique

At present, the mainstream high-resolution screen is full high-definition resolution 1920x1080 (FHD). With the development of science and technology, the demand for ultra-high-resolution displays in living and entertainment, scientific engineering, and medical industries is also increasing. Ultra HD resolutions include 3840x2160 (4K), 7680x4320 (8K), 10240x4320 (10K), 15360x8640 (16K), and even higher resolutions. Adopting a single video interface, such as HDMI2.0 interface or DP1.2 interface, can realize the transmission of ultra high-definition video data, but the transmission distance is quite limited, which greatly reduces the ease of use. The traditional scanning method is progressive scanning or interlaced scanning (as shown in Figure 1), and only one row in the pixel array is selected during each scanning. The use of the traditional single-row scanning method to drive the gate of an ultra-high-definition display array requires a faster scanning frequency, which poses higher requirements for IC design and is difficult to control in terms of cost. At such a high scanning frequency, it is also critical that the UHD display array has more display gray levels and high dynamic range when actually displaying images. In reality, a commonly used method is to use a multi-screen method to achieve ultra-high-definition display, that is, to use ultra-high-definition image processing devices to segment ultra-high-definition video information and transmit it to the corresponding display in the mosaic display. The use of block technology has realized the display of ultra-high-resolution images, but the need to cache one frame of ultra-high-definition video data results in the need for a large-capacity storage unit. In actual display, due to the presence of multiple screens, there are black borders in the image. , Affecting the user experience.

Summary of the invention

The technical problem to be solved by the present invention is to provide an ultra high-definition image display driving method and device, which can reduce the video data rate and ensure the grayscale accuracy of the displayed image.

To solve the above technical problems, the present invention adopts the following technical solutions.

An ultra high-definition image display driving method includes the following steps:

S1. During progressive scanning, a frame of ultra-high-definition image is divided into several lines of video data by line; during interlaced scanning, a field of ultra-high-definition images is divided into several lines of video data by line;

S2, buffering the K line of video data of the plurality of lines of video data, where K is a natural number greater than or equal to 2 and K is less than or equal to the number of lines of line video data into which one frame / field of ultra-high-definition image is divided into lines;

S3. Parallelly output the buffered K-line video data to the UHD display array and drive the UHD display array corresponding to the K-line video data to display simultaneously;

S4. After the K lines of video data are output in parallel, buffer the other K lines of video data in the lines of video data;

S5. Parallelly output the buffered video data of the other K lines to the ultra-high-definition display array and drive the lines corresponding to the additional K-line video data of the ultra-high-definition display array to be displayed simultaneously;

S6, and so on, until all the lines corresponding to the several lines of video data of the one-frame / field ultra-high-definition image driving the ultra-high-definition display array are completely displayed.

During progressive scanning, the K-line video data corresponds to K lines adjacent to each other in the ultra-high-definition display array; when interlaced scanning, the K-line video data corresponds to K lines of one line in the ultra-high-definition display array .

In step S3, the buffered K lines of video data are output in parallel through multiple HDMI interfaces, multiple DP interfaces, multiple V-BY-ONE interfaces, multiple LVDS interfaces, or multiple MIPI interfaces; said step In S5, the buffered video data of the other K lines is output in parallel through multiple HDMI interfaces, multiple DP interfaces, multiple V-BY-ONE interfaces, multiple LVDS interfaces, or multiple MIPI interfaces.

The line video data includes video image data Data, a data clock Clock, a data valid signal DE, a line synchronization signal Hsync, and a frame / field synchronization signal Vsync.

An ultra high-definition image display driving device includes:

A segmentation unit, which is used to progressively divide a frame of ultra-high-definition image into several lines of video data during progressive scanning; and a segmentation unit, which is used to deinterleave a field of ultra-high-definition images into several lines of video data during progressive scanning;

The buffer unit is configured to buffer K lines of video data in the plurality of lines of video data, and buffer the other K lines of video data in the plurality of lines of video data after the K lines of video data are output in parallel, and so on, Until the last K lines of video data in the plurality of lines of video data are cached;

A receiving output driving unit configured to output the received K-line video data output in parallel by the buffer unit to an ultra-high-definition display array and drive the ultra-high-definition display array corresponding to the K-line video data Lines are simultaneously displayed, and then the other K lines of video data output in parallel by the buffer unit are received in parallel to the ultra high definition display array and the lines corresponding to the other K lines of video data are driven in the ultra high definition display array Simultaneous display, and so on, until all the lines corresponding to the several lines of video data of the one frame / field ultra high-definition image of the ultra-high-definition display array are completely displayed.

During progressive scanning, the K-line video data corresponds to K lines adjacent to each other in the ultra-high-definition display array; when interlaced scanning, the K-line video data corresponds to K lines of one line in the ultra-high-definition display array .

The buffer unit transmits the K-line video data to the receiving output driving unit in parallel through multiple HDMI interfaces, multiple DP interfaces, multiple V-BY-ONE interfaces, multiple LVDS interfaces, or multiple MIPI interfaces. .

The line video data includes video image data Data, a data clock Clock, a data valid signal DE, a line synchronization signal Hsync, and a frame / field synchronization signal Vsync.

The invention has the following beneficial technical effects.

The present invention divides a frame of ultra-high-definition image into several lines of video data line by line during progressive scanning; in an interlaced scan, divides a field of ultra-high-definition image into lines of video data line by line; caches the K in the several lines of video data Line video data; output the buffered K line video data to the UHD display array in parallel and drive the UHD display array corresponding to the K line video data at the same time; wait for the K line video data After parallel output, another K lines of video data in the plurality of lines of video data are buffered; the buffered K lines of video data are output in parallel to the UHD display array and drive the UHD display array with the other K The lines corresponding to the line of video data are displayed simultaneously; and so on, until the lines corresponding to the lines of video data of the one-frame / field ultra-high-definition image of the ultra-high-definition display array are all displayed. Its advantages are: 1. Compared with single-channel transmission of ultra-high-definition video, the video data rate of each line is greatly reduced, which is conducive to the transmission of ultra-high-speed video; 2. each of the K-line video data in the several lines of video data is cached , When K is less than one frame / field of ultra-high-definition image lines and video data, it can greatly reduce the need for memory capacity; 3, K lines simultaneously drive display (such as multiple gate drivers and multiple source drivers, connection The method is determined by the scanning method) so that each pixel unit of the ultra-high-definition display array has more time to charge and discharge, which ensures the accuracy of grayscale and is conducive to achieving high contrast.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 schematically illustrates a conventional progressive scan structure.

FIG. 2 schematically illustrates a structural diagram of an ultra-high-definition image display driving device of the present invention.

FIG. 3 schematically illustrates a progressive scanning structure of the present invention.

FIG. 4 schematically illustrates a structure of an interlaced scan according to the present invention.

FIG. 5 schematically illustrates a gate driving timing chart of progressive scanning according to the present invention.

FIG. 6 schematically illustrates a gate driving timing chart of interlaced scanning according to the present invention.

FIG. 7 is a schematic flowchart of a method of the present invention.

Detailed ways

In order to make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions in the embodiments of the present invention will be described clearly and completely in combination with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are merely It is a part, but not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by a person of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention. Without conflict, the embodiments of the present invention and the features in the embodiments can be arbitrarily combined with each other. And, although the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than here.

The present invention can be applied to, but not limited to, ultra-high-definition display devices and devices such as LCD, OLED, QLCD, QLED, Mini-LED, Micro-LED, Nano-LED, and Micro-OLED.

Referring to FIGS. 1, 2 and 3 together, the ultra-high-definition display array 4 according to the present invention includes a plurality of pixel units arranged in a matrix manner to form an M × N pixel array, where M is the number of rows and N is the number of columns. The value range of the row number m of the M × N pixel array is 0, 1, 2, ..., M-1, and the value range of the column number n is 0, 1, 2, ..., N-1.

Referring to FIG. 2, an ultra-high-definition image display driving device according to the present invention includes a dividing unit 1, a buffer unit 2, and a receiving output driving unit 3.

The segmentation unit 1 is used for segmenting one frame of ultra-high-definition image into several lines of video data during progressive scanning. The segmentation unit 1 is also used to segment a field of ultra-high-definition images into several lines of video data during interlaced scanning. (1) In the progressive scanning mode, the one ultra-high-definition image is divided into several lines of video data line by line: line video data 0, line video data 1, line video data 2, ..., line video data M-1. When the one ultra-high-definition image is displayed on the ultra-high-definition display array 4, line 0 of the ultra-high-definition display array 4 displays the image contained in the foregoing line of video data 0, that is, the phase of the ultra-high-definition display array 4 and the line of video data 0 The corresponding line 0 displays the image contained in line video data 0; line 1 of the ultra-high-definition display array 4 displays the image contained in the foregoing line video data 1, that is, the image corresponding to line video data 1 of the ultra-high-definition display array 4. 1 line displays the images contained in line video data 1; 2 lines of UHD display array 4 displays the images contained in the aforementioned line video data 2, that is, 2 lines corresponding to line video data 2 of UHD display array 4 The image contained in the line video data 2 is displayed; the others are the same. (2) In the interlaced scanning mode, it is divided into even field scanning and odd field scanning. Even / odd field UHD images are divided into several lines of video data by line: line video data 0, line video data 1, line video data 2, ..., line video data (M / 2) -1. When the even-numbered field ultra-high-definition image is displayed on the ultra-high-definition display array 4, line 0 of the ultra-high-definition display array 4 displays the image contained in the foregoing line of video data 0, that is, the phase of the ultra-high-definition display array 4 and the line of video data 0 The corresponding 0 line displays the image contained in the line video data 0; the 2 lines of the UHD display array 4 display the image contained in the aforementioned line video data 1, that is, the corresponding image of the UHD display array 4 corresponding to the line video data 1 2 lines display images contained in line video data 1; 4 lines of UHD display array 4 display the images contained in the aforementioned line video data 2, that is, 4 lines corresponding to line video data 2 of UHD display array 4 The image contained in the line video data 2 is displayed; the others are the same. When the odd field UHD image is displayed on the UHD display array 4, one line of the UHD display array 4 displays the image contained in the foregoing line of video data 0, that is, the phase of the UHD display array 4 and the line video data 0 The corresponding 1 line displays the image contained in the line video data 0; the 3 lines of the UHD display array 4 display the images contained in the aforementioned line video data 1, that is, the image corresponding to the line video data 1 of the UHD display array 4 3 lines display the images contained in line video data 1; 5 lines of UHD display array 4 display the images contained in the aforementioned line video data 2, that is, 5 lines corresponding to line video data 2 of UHD display array 4 The image contained in the line video data 2 is displayed; the others are the same.

The buffer unit 2 is configured to buffer K line video data among the foregoing lines of video data. For example, the K line video data is: line video data 0, line video data 1, line video data 2, line video data 3; After the K lines of video data are output in parallel, the other K lines of video data in the lines of video data are cached. For example, the other K lines of video data are: line video data 4, line video data 5, line Video data 6, line video data 7, or the other K lines of video data are: line video data 8, line video data 9, line video data 10, line video data 11; and so on, until the lines of video are cached The last K lines of video data in the data, when progressive scanning, the last K lines of video data are: line video data M-4, line video data M-3, line video data M-2, line video data M-1; in interlaced scanning, the last K lines of video data are: line video data (M / 2) -4, line video data (M / 2) -3, line video data (M / 2)- 2. Line video data (M / 2) -1.

The buffer unit 2 outputs K lines of video data to the receiving output driving unit 3 in parallel, and the control unit in the receiving output driving unit 3 generates digital gate driving signals and digital source driving signals by using the corresponding line video data and sends them to the corresponding gate driving respectively. Unit and source drive unit. K gate drive units and K source drive units load K rows of video data into the UHD display array 4 at the same time to display UHD video images with correct and high dynamic range. Among them, K is a natural number greater than or equal to 2, and K is less than or equal to the number of lines of line video data into which one frame / field ultra-high-definition image is divided into lines. For example, in the embodiment shown in FIG. 2, the number of channels for the buffer unit 2 to output K lines of video data to the receiving output driving unit 3 in parallel is K, and the receiving output driving unit 3 includes K control units and K source driving units. And K gate driving units, the channels of the buffer unit 2 and the control unit of the receiving output driving unit 3 are in one-to-one correspondence. For example, channel 0 of buffer unit 2 is connected to control unit 0 of receiving output driving unit 3, channel 1 of buffer unit 2 is connected to control unit 1 of receiving output driving unit 3, and so on. In the embodiment shown in FIG. 2, the control unit 0 receives the line video data output by the buffer unit 2 from the channel 0 of the buffer unit 2, and the control unit 0 generates a digital source driving signal and a digital gate driving signal according to the line of video data and respectively Corresponding output to the source drive unit 0 and the gate drive unit 0; the control unit 1 receives the line video data output from the buffer unit 2 through the channel 1 of the buffer unit 2, and the control unit 1 generates a digital source drive signal and a digital gate according to the line video data The driving signals are correspondingly output to the source driving unit 1 and the gate driving unit 1 respectively; and so on.

The receiving output driving unit 3 is configured to output the received K-line video data output in parallel by the buffer unit 2 to the ultra-high-definition display array 4 in parallel and drive the ultra-high-definition display array 4 with the K-line video data. The corresponding rows are displayed at the same time, and the other K lines of video data output in parallel by the buffer unit 2 are received and output to the UHD display array 4 in parallel and the UHD video data of the UHD display array 4 is driven The corresponding rows are displayed simultaneously, and so on, until all the rows corresponding to the video data of the one frame / field ultra high-definition image of the ultra-high-definition display array 4 are completely displayed.

For the sake of clarity, the foregoing example illustrates how the receiving output driving unit 3 works.

(1) During progressive scanning, for example, the K lines of video data are: line video data 0, line video data 1, line video data 2, line video data 3, and the other K lines of video data are: Line video data 4, line video data 5, line video data 6, line video data 7, and the last K lines of line video data are: line video data M-4, line video data M-3, line video data M-2, Line video data M-1. The receiving output driving unit 3 outputs the K lines of video data output in parallel from the received buffer unit 2, that is, line video data 0, line video data 1, line video data 2, and line video data 3 in parallel to the UHD display array 4, For example, line video data 0 is output from channel 0 of buffer unit 2 to control unit 0 of receiving output driving unit 3, line video data 1 is output from channel 1 of buffer unit 2 to control unit 1 of receiving output driving unit 3, line video Data 2 is output from the channel 2 of the buffer unit 2 to the control unit 2 receiving the output driving unit 3, and line video data 3 is output from the channel 3 of the buffer unit 2 to the control unit 3 receiving the output driving unit 3. The receiving output driving unit 3 drives the lines corresponding to the K line of video data of the UHD display array 4 to be displayed simultaneously, that is, the image contained in the 0 line display video data 0 of the UHD display array 4 and the UHD display array The image contained in the 1 line display line 4 of the video data 1, the image contained in the 2 line display of the ultra-high-definition display array 4 includes the image contained in the video data 2, and the 3 line displayed in the ultra-high-definition display array 4 contains the image included in the video data 3. After the line video data 0, line video data 1, line video data 2, and line video data 3 are output to the UHD display array 4 in parallel and drive 0-3 lines of display at the same time, the receiving output driving unit 3 then outputs the received The other K lines of video data output in parallel by the buffer unit 2 are line video data 4, line video data 5, line video data 6, and line video data 7 and are output to the UHD display array 4 in parallel. For example, the line video data 4 is output from the cache unit Channel 0 of 2 is output to control unit 0 of receiving output drive unit 3. Line video data 5 is output from channel 1 of buffer unit 2 to control unit 1 of receiving output drive unit 3. Line video data 6 is from channel 2 of cache unit 2. The output is sent to the control unit 2 receiving the output driving unit 3, and the line video data 7 is output from the channel 3 of the buffer unit 2 to the control unit 3 receiving the output driving unit 3. The receiving output driving unit 3 then drives the lines corresponding to the other K lines of video data of the UHD display array 4 to display simultaneously, that is, the images contained in the 4 lines of the UHD display array 4 and the video data 4, UHD The image contained in 5 rows of display array video data 5 of display array 4, the image contained in 6 rows of ultra high definition display array 4 displayed video data 6, and the image contained in 7 rows of ultra high definition display array 4 video data 7. image. By analogy, the last K lines of video data are: line video data M-4, line video data M-3, line video data M-2, and line video data M-1 corresponding to the AND of the UHD display array 4. The lines corresponding to the last K lines of video data are displayed simultaneously. And so on, until the lines corresponding to the several lines of video data of the one frame of ultra-high-definition image of the ultra-high-definition display array 4 are completely displayed.

(2) During interlaced scanning, for example, the K-line video data of even / odd field ultra high-definition images are: line video data 0, line video data 1, line video data 2, line video data 3, and the other K lines The line video data is: line video data 4, line video data 5, line video data 6, line video data 7, and the last K line video data is: line video data (M / 2) -4, line video data ( M / 2) -3, line video data (M / 2) -2, line video data (M / 2) -1. The receiving output driving unit 3 outputs the K lines of video data output in parallel from the received buffer unit 2, that is, line video data 0, line video data 1, line video data 2, and line video data 3 in parallel to the UHD display array 4, For example, line video data 0 is output from channel 0 of buffer unit 2 to control unit 0 of receiving output driving unit 3, line video data 1 is output from channel 1 of buffer unit 2 to control unit 1 of receiving output driving unit 3, line video Data 2 is output from the channel 2 of the buffer unit 2 to the control unit 2 receiving the output driving unit 3, and line video data 3 is output from the channel 3 of the buffer unit 2 to the control unit 3 receiving the output driving unit 3. The receiving output driving unit 3 drives the ultra-high-definition display array 4 to display lines corresponding to the K-line video data at the same time. ① In the even field scanning of the interlaced scanning method, 0 lines of the UHD display array 4 display the images contained in the video data 0, and 2 lines of the UHD display array 4 display the images contained in the video data 1 and the UHD display The 4 rows of the array 4 display the images contained in the video data 2, and the 6 rows of the UHD display array 4 display the images contained in the video data 3. After the line video data 0, line video data 1, line video data 2, and line video data 3 are output to the UHD display array 4 in parallel and drive 0, 2, 4, and 6 lines of display at the same time, the output drive unit 3 receives the The other K lines of video data output in parallel by the buffer unit 2 are line video data 4, line video data 5, line video data 6, and line video data 7 and output to the UHD display array 4 in parallel, for example, line video data. 4 Output from channel 0 of buffer unit 2 to control unit 0 of receiving output driving unit 3, line video data 5 Output from channel 1 of buffer unit 2 to control unit 1 of receiving output driving unit 3, line video data 6 from buffer unit Channel 2 of 2 is output to control unit 2 of receiving output driving unit 3, and line video data 7 is output from channel 3 of buffer unit 2 to control unit 3 of receiving output driving unit 3. The receiving output driving unit 3 then drives the lines corresponding to the other K lines of video data of the UHD display array 4 to display at the same time, that is, the images contained in the 8 lines of the UHD display array 4 and the video data 4, UHD The image contained in 10 rows of display array video data 5 of display array 4, the image contained in 12 rows of display array video 4 of ultra high definition display array 4 and the image contained in video data 7 of 14 rows of ultra high definition display array 4 image. And so on, until the lines corresponding to the several lines of video data of the even-field ultra-high-definition image driving the ultra-high-definition display array 4 are all displayed. ② During the odd field scanning in the interlaced scanning mode, one line of the UHD display array 4 displays the image contained in the video data 0, and the three lines of the UHD display array 4 displays the image contained in the video data 1 and the UHD display The 5 rows of the array 4 display the images contained in the video data 2, and the 7 rows of the UHD display array 4 display the images contained in the video data 3. After the line video data 0, line video data 1, line video data 2, and line video data 3 are output to the UHD display array 4 in parallel and drive 1, 3, 5, and 7 lines of display at the same time, the receiving output driving unit 3 then outputs all The other K lines of video data output in parallel by the buffer unit 2 are line video data 4, line video data 5, line video data 6, and line video data 7 and output to the UHD display array 4 in parallel, for example, line video data. 4 Output from channel 0 of buffer unit 2 to control unit 0 of receiving output driving unit 3, line video data 5 Output from channel 1 of buffer unit 2 to control unit 1 of receiving output driving unit 3, line video data 6 from buffer unit Channel 2 of 2 is output to control unit 2 of receiving output driving unit 3, and line video data 7 is output from channel 3 of buffer unit 2 to control unit 3 of receiving output driving unit 3. The receiving output driving unit 3 then drives the lines corresponding to the other K lines of video data of the UHD display array 4 to display at the same time, that is, the 9 lines of the UHD display array 4 display the images contained in the video data 4 and the UHD 11 images of display array 4 include images contained in video data 5, 13 images of UHD display array 4 contain images contained in video data 6, 15 images of UHD display array 4 contain images contained in video data 7 image. And so on, until all the lines corresponding to the several lines of video data of the odd-field ultra-high-definition image driving the ultra-high-definition display array 4 are completely displayed.

In some embodiments, during progressive scanning, the foregoing K-line video data should correspond to K lines adjacent to each other in the UHD display array; during interlaced scanning, the K-line video data should correspond to each other in the UHD display array. K lines apart.

In some embodiments, the buffer unit 2 transmits the K-line video data to the receiver in parallel through multiple HDMI interfaces, multiple DP interfaces, multiple V-BY-ONE interfaces, multiple LVDS interfaces, or multiple MIPI interfaces. Output drive unit 3.

In some embodiments, the foregoing line of video data includes video image data Data, a data clock Clock, a data valid signal DE, a line synchronization signal Hsync, and a frame / field synchronization signal Vsync.

As shown in FIG. 7, a method for driving an ultra-high-definition image display of the present invention includes the following steps:

S1. During progressive scanning, a frame of ultra-high-definition image is divided into several lines of video data by line; during interlaced scanning, a field of ultra-high-definition images is divided into several lines of video data by line;

S2, buffering K lines of video data in the plurality of lines of video data;

S3. Parallelly output the buffered K-line video data to the UHD display array and drive the UHD display array corresponding to the K-line video data to display simultaneously;

S4. After the K lines of video data are output in parallel, buffer the other K lines of video data in the lines of video data;

S5. Parallelly output the buffered video data of the other K lines to the ultra-high-definition display array and drive the lines corresponding to the additional K-line video data of the ultra-high-definition display array to be displayed simultaneously;

S6, and so on, until all the lines corresponding to the several lines of video data of the one-frame / field ultra-high-definition image driving the ultra-high-definition display array are completely displayed.

In some embodiments, during progressive scanning, the K-line video data should correspond to the K lines adjacent to each other in the ultra-high-definition display array; during interlaced scanning, the K-line video data should correspond to the ultra-high-definition display array. K rows separated from each other.

In some embodiments, in step S3, the buffered K lines of video data are output in parallel through multiple HDMI interfaces, multiple DP interfaces, multiple V-BY-ONE interfaces, multiple LVDS interfaces, or multiple MIPI interfaces. In step S5, the buffered video data of the other K lines are output in parallel through multiple HDMI interfaces, multiple DP interfaces, multiple V-BY-ONE interfaces, multiple LVDS interfaces, or multiple MIPI interfaces.

In some embodiments, the foregoing line of video data includes video image data Data, a data clock Clock, a data valid signal DE, a line synchronization signal Hsync, and a frame / field synchronization signal Vsync.

As shown in Figures 3 and 4, K = 4, that is, the four gate drive units are gate drive unit 0, gate drive unit 1, gate drive unit 2, and gate drive unit 3, and the four source drive units are source drive unit 0, Source drive unit 1, source drive unit 2, source drive unit 3.

Below, an ultra-high-definition image with 8K resolution (7680x4320) passes through the segmentation unit 1 and the cache unit 2 and passes through four (ie, K = 4) channels (channel numbers are j, j = 0, 1, 2, 3) and output 4 in parallel. The progressive video data is taken as an example, and the present invention is further specifically described according to a scanning method (progressive scanning or interlaced scanning).

(1) When performing progressive scanning on the ultra-high-definition display array 4, the row number m and the column number n of the pixel unit of the video data derived from the channel j satisfy:

j = 0,1,2, ..., K-1, K = 4.

Referring to Figs. 2 and 3, the dividing unit 1 divides one frame of ultra-high-definition image into M lines of video data.

The buffer unit 2 buffers 4 lines of video data among the foregoing M lines of video data, such as line video data 0, line video data 1, line video data 2, line video data 3.

The receiving output driving unit 3 is configured to output the received 4 lines of video data output in parallel by the buffer unit 2 to the UHD display array 4 in parallel and drive the UHD display array 4 with the 4 lines of video data. The corresponding lines are displayed at the same time. Specifically, the 4 lines of line video data output in parallel by 4 channels are line video data 0, line video data 1, line video data 2, line video data 3 (each line of line video data includes corresponding video data Data, data clock Clock, data valid signal DE, line synchronization signal Hsync, and frame synchronization signal Vsync) are input to the four control units 0, control unit 1, control unit 2, and control unit 3 respectively.

As shown in Figures 2 and 3, for example, the ultra-high-definition display array 4 supports 8K resolution of progressive scanning. Pixel units with row numbers satisfying m = 4 * i (i is a natural number, ie, 0,1,2, ...) are connected to the gate drive unit 0 and source drive unit 0, and pixels with row numbers satisfying m = 4 * i + 1 The unit is connected to the gate drive unit 1 and the source drive unit 1, and the pixel unit whose row number satisfies m = 4 * i + 2 is connected to the gate drive unit 2 and the source drive unit 2. The row number satisfies m = 4 * i + 3 The pixel unit is connected to the gate driving unit 3 and the source driving unit 3. For example, the pixel units with row number 2 and column number 3 are connected to the gate driving unit 2 and the source driving unit 2.

Specifically, as four channels of parallel line video data are input, the control unit 0 includes a clock, a data valid signal DE, and a line synchronization signal included in the line video data 0 output from the channel 0 of the buffer unit 2 as received by itself. Hsync and frame synchronization signal Vsync generate corresponding digital gate drive signals and digital source drive signals and send them to gate drive unit 0 and source drive unit 0, respectively. Gate drive unit 0 and source drive unit 0 scan the corresponding data Data to the gate drive. The pixel unit with row number 0 of the ultra high-definition display array 4 selected by unit 0 displays the image contained in the video data 0 of the line 0 of the ultra-high-definition display array 4. At the same time, the control unit 1 generates a corresponding digital gate driving signal according to the clock Clock, data valid signal DE, line synchronization signal Hsync, and frame synchronization signal Vsync included in the line video data 1 output from the channel 1 of the buffer unit 2 received by the control unit 1. And the digital source driving signals are sent to the gate driving unit 1 and the source driving unit 1, respectively. The gate driving unit 1 and the source driving unit 1 scan the corresponding data Data to the corresponding pixel unit on the row number 1 selected by the gate driving unit 1. , One line of the ultra-high-definition display array 4 displays the images included in the video data 1. At the same time, the control unit 2 generates a corresponding digital gate driving signal according to the clock Clock, the data valid signal DE, the line synchronization signal Hsync, and the frame synchronization signal Vsync included in the line video data 2 output from the channel 2 of the buffer unit 2 received by itself. And the digital source driving signals are sent to the gate driving unit 2 and the source driving unit 2, respectively. The gate driving unit 2 and the source driving unit 2 scan the corresponding data Data to the corresponding pixel unit on the row number 2 selected by the gate driving unit 2. , The two lines of the ultra-high-definition display array 4 display the images contained in the video data 2. At the same time, the control unit 3 generates a corresponding digital gate driving signal according to the clock Clock, the data valid signal DE, the line synchronization signal Hsync, and the frame synchronization signal Vsync included in the line video data 3 output from the channel 3 of the buffer unit 2 received by itself. And the digital source driving signals are sent to the gate driving unit 3 and the source driving unit 3, respectively. The gate driving unit 3 and the source driving unit 3 scan the corresponding data Data to the corresponding pixel unit on the row number 3 selected by the gate driving unit 3. The images contained in the video data 3 of the 3 lines of the ultra high definition display array 4 are displayed.

After the foregoing line video data 0, line video data 1, line video data 2, and line video data 3 are output in parallel, the buffer unit 2 buffers the other four lines of video data in the foregoing M lines of video data, such as line video data 4. , Line video data 5, line video data 6, line video data 7.

The receiving output driving unit 3 is configured to output the received additional four lines of video data output in parallel by the buffer unit 2 to the ultra high definition display array 4 and drive the ultra high definition display array 4 and the other four lines of video. The rows corresponding to the data are displayed at the same time. The 4, 5, 6, and 7 lines of the ultra-high-definition display array 4 correspond to the images contained in the video data lines 4, 5, 6, and 7 at the same time.

After the foregoing line video data 4, line video data 5, line video data 6, and line video data 7 are output in parallel, the buffer unit 2 buffers the other four lines of video data in the foregoing M lines of video data, such as line video data 8, Line video data 9, line video data 10, line video data 11.

By analogy, when the 8K UHD pixel array 4 is scanned by 4 channels, a complete UHD image is displayed on the UHD display array 4.

The above-mentioned gate driving timing when performing progressive scanning on the ultra high-definition display array is shown in FIG. 5. When the gate driving signal corresponding to the four rows is high, it indicates that the four rows are selected and corresponding source driving is performed.

(2) When the ultra high-definition display array 4 is interlaced, the row video data from the pixel unit of the channel j, the row number m and the column number n satisfy:

or

i = 0,1,2, ..., j = 0,1,2, ..., K-1, K = 4.

In this embodiment, the buffer unit 2 outputs 4 lines of video data in parallel, that is, K = 4.

As shown in Figures 2 and 4, for example, the UHD display array 4 supports 8K resolution for interlaced scanning. A pixel unit whose row number satisfies m = 8 * i or m = 8 * i + 1 (i is a natural number, that is, 0, 1, 2, ...) is connected to the gate driving unit 0 and the source driving unit 0, and the row number satisfies m A pixel unit of 8 = i * 2 or m = 8 * i + 3 is connected to the gate driving unit 1 and the source driving unit 1, and the pixel whose row number satisfies m = 8 * i + 4 or m = 8 * i + 5 The unit is connected to the gate driving unit 2 and the source driving unit 2, and the pixel unit whose row number satisfies m = 8 * i + 6 or m = 8 * i + 7 is connected to the gate driving unit 3 and the source driving unit 3. For example, the pixel units with row number 2 and column number 3 are connected to the gate driving unit 1 and the source driving unit 1. ① When scanning ultra-high-definition images in even fields:

Referring to FIGS. 2 and 4, the segmenting unit 1 divides a field of ultra-high-definition images into M / 2 lines of video data line by line.

The buffer unit 2 buffers 4 lines of video data among the foregoing M / 2 lines of video data, such as line video data 0, line video data 1, line video data 2, line video data 3.

The receiving output driving unit 3 is configured to output the received 4 lines of video data output in parallel by the buffer unit 2 to the UHD display array 4 in parallel and drive the UHD display array 4 and the 4 lines of video data. The corresponding rows are displayed at the same time. Specifically, the 4 lines of line video data output in parallel by 4 channels are line video data 0, line video data 1, line video data 2, line video data 3 (each line of line video data includes corresponding video data Data, data clock Clock, data valid signal DE, line synchronization signal Hsync, and field synchronization signal Vsync) are input to the four control units 0, control unit 1, control unit 2, and control unit 3 respectively.

As four channels of parallel line video data are input, the control unit 0 includes a clock, a data valid signal DE, a line synchronization signal Hsync, and a field included in the line video data 0 output from the channel 0 of the buffer unit 2 received by itself. The synchronization signal Vsync generates corresponding digital gate driving signals and digital source driving signals and sends them to the gate driving unit 0 and the source driving unit 0, respectively. The gate driving unit 0 and the source driving unit 0 scan the corresponding data Data to the gate driving unit 0 and select them. The row number is the corresponding pixel unit on 0, and the row 0 of the ultra high-definition display array 4 displays the image contained in the row video data 0. At the same time, the control unit 1 generates a corresponding digital gate driving signal according to the clock Clock, the data valid signal DE, the line synchronization signal Hsync, and the field synchronization signal Vsync included in the line video data 1 output from the channel 1 of the buffer unit 2 received by the control unit 1. And digital source drive signals are sent to the gate drive unit 1 and source drive unit 1, respectively. The gate drive unit 1 and source drive unit 1 scan the corresponding data Data to the corresponding pixel unit on the row number 2 selected by the gate drive unit 1. The images contained in the video data 1 of the 2 lines of the ultra high definition display array 4 are displayed. At the same time, the control unit 2 generates a corresponding digital gate driving signal according to the clock Clock, the data valid signal DE, the line synchronization signal Hsync, and the field synchronization signal Vsync included in the line video data 2 output from the channel 2 of the buffer unit 2 received by itself. And the digital source driving signals are sent to the gate driving unit 2 and the source driving unit 2, respectively. The gate driving unit 2 and the source driving unit 2 scan the corresponding data Data to the corresponding pixel unit on the row number 4 selected by the gate driving unit 2. The images contained in the 4 lines of the UHD display array 4 video data 2. At the same time, the control unit 3 generates a corresponding digital gate driving signal according to the clock Clock, the data valid signal DE, the line synchronization signal Hsync, and the field synchronization signal Vsync included in the line video data 3 output from the channel 3 of the buffer unit 2 received by itself. And the digital source driving signals are sent to the gate driving unit 3 and the source driving unit 3, respectively. The gate driving unit 3 and the source driving unit 3 scan the corresponding data Data to the corresponding pixel unit on the row number 6 selected by the gate driving unit 3. The images contained in the 6-line display line video data 3 of the ultra-high-definition display array 4.

After the foregoing line video data 0, line video data 1, line video data 2, and line video data 3 are output in parallel, the buffer unit 2 buffers the other four lines of video data in the foregoing M / 2 line video data, such as line video Data 4, line video data 5, line video data 6, line video data 7.

The receiving output driving unit 3 is configured to output the received four other lines of video data output in parallel by the buffer unit 2 to the UHD display array 4 in parallel and drive the UHD display array 4 and the other 4 lines. The lines corresponding to the video data are displayed simultaneously. The 8, 10, 12, and 14 lines of the ultra-high-definition display array 4 correspond to the images contained in the video data lines 4, 5, 6, and 7 at the same time.

By analogy, when 4 channels transmit a complete field of even high-definition video data, the ultra-high-definition image of the even-numbered field appears on the ultra-high-definition display array 4.

② During scanning of UHD images in each odd field:

Referring to FIGS. 2 and 4, the segmenting unit 1 divides a field of ultra-high-definition images into M / 2 lines of video data line by line.

The buffer unit 2 buffers 4 lines of video data among the foregoing M / 2 lines of video data, such as line video data 0, line video data 1, line video data 2, line video data 3.

The receiving output driving unit 3 is configured to output the received 4 lines of video data output in parallel by the buffer unit 2 to the UHD display array 4 in parallel and drive the UHD display array 4 and the 4 lines of video data. The corresponding rows are displayed at the same time. Specifically, the 4 lines of line video data output in parallel by 4 channels are line video data 0, line video data 1, line video data 2, line video data 3 (each line of line video data includes corresponding video data Data, data clock Clock, data valid signal DE, line synchronization signal Hsync, and field synchronization signal Vsync) are input to four control units 0, control unit 1, control unit 2, and control unit 3.

As four channels of parallel line video data are input, the control unit 0 includes a clock, a data valid signal DE, a line synchronization signal Hsync, and a field included in the line video data 0 output from the channel 0 of the buffer unit 2 received by itself. The synchronization signal Vsync generates corresponding digital gate driving signals and digital source driving signals and sends them to the gate driving unit 0 and the source driving unit 0, respectively. The gate driving unit 0 and the source driving unit 0 scan the corresponding data Data to the gate driving unit 0 and select them. The row number is 1 corresponding to the pixel unit, and one row of the ultra-high-definition display array 4 displays the image contained in the video data 0. At the same time, the control unit 1 generates a corresponding digital gate driving signal according to the clock Clock, the data valid signal DE, the line synchronization signal Hsync, and the field synchronization signal Vsync included in the line video data 1 output from the channel 1 of the buffer unit 2 received by the control unit 1. And digital source drive signals are sent to the gate drive unit 1 and source drive unit 1, respectively. The gate drive unit 1 and source drive unit 1 scan the corresponding data Data to the corresponding pixel unit on the row number 3 selected by the gate drive unit 1. The images contained in the three-line display line video data 1 of the ultra-high-definition display array 4. At the same time, the control unit 2 generates a corresponding digital gate driving signal according to the clock Clock, the data valid signal DE, the line synchronization signal Hsync, and the field synchronization signal Vsync included in the line video data 2 output from the channel 2 of the buffer unit 2 received by itself. And digital source drive signals are sent to the gate drive unit 2 and source drive unit 2, respectively. The gate drive unit 2 and source drive unit 2 scan the corresponding data Data to the corresponding pixel unit on the row number 5 selected by the gate drive unit 2. The images contained in the video data 2 of the 5 lines of the UHD display array 4 are displayed. At the same time, the control unit 3 generates a corresponding digital gate driving signal according to the clock Clock, the data valid signal DE, the line synchronization signal Hsync, and the field synchronization signal Vsync included in the line video data 3 output from the channel 3 of the buffer unit 2 received by itself. And the digital source drive signals are sent to the gate drive unit 3 and the source drive unit 3, respectively. The gate drive unit 3 and the source drive unit 3 scan the corresponding data Data to the corresponding pixel unit on the row number 7 selected by the gate drive unit 3. The 7-line display image of the ultra-high-definition display array 4 contains the video data 3.

After the foregoing line video data 0, line video data 1, line video data 2, and line video data 3 are output in parallel, the buffer unit 2 buffers the other four lines of video data in the foregoing M / 2 line video data, such as line video Data 4, line video data 5, line video data 6, line video data 7.

The receiving output driving unit 3 is configured to output the received four other lines of video data output in parallel by the buffer unit 2 to the UHD display array 4 in parallel and drive the UHD display array 4 and the other 4 lines. The lines corresponding to the video data are displayed simultaneously. The 9, 11, 13, and 15 lines of the ultra-high-definition display array 4 correspond to the images contained in the video data lines 4, 5, 6, and 7 at the same time.

By analogy, when four channels transmit a complete field of ultra-high-definition video images, the ultra-high-definition images corresponding to the odd-numbered fields appear on the ultra-high-definition display array 4.

The above-mentioned gate driving timing when the interlace scanning is performed on the ultra high-definition display array is shown in FIG. 6. When the gate driving signal corresponding to the 4 rows is high, it indicates that the 4 rows are selected and corresponding source driving is performed.

In the embodiments provided by the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the unit is only a logical function division. In actual implementation, there may be another division manner. For example, multiple units or components may be combined or It can be integrated into another device, or some features can be ignored or not implemented. In addition, the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, which may be electrical, mechanical or other forms.

The units described as separate components may or may not be physically separated, that is, they may be located in one place, or may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objective of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist separately physically, or two or more units may be integrated into one unit. The above integrated unit may be implemented in the form of hardware or in the form of software functional unit.

If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it may be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention essentially or part that contributes to the existing technology or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium , Including a plurality of instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor to perform all or part of the steps of the method described in each embodiment of the present invention. The foregoing storage medium / unit includes: universal serial bus flash disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), Various media such as magnetic disks or optical disks that can store program codes.

Obviously, those skilled in the art can make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. In this way, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these modifications and variations.

Claims (8)

1. A method for driving an ultra-high-definition image display, comprising the following steps:

   S1. During progressive scanning, a frame of ultra-high-definition image is divided into several lines of video data by line; during interlaced scanning, a field of ultra-high-definition images is divided into several lines of video data by line;

   S2, buffering K lines of video data among the plurality of lines of video data, where K is a natural number greater than or equal to 2 and K is less than or equal to the number of lines of line video data into which one frame / field of ultra-high-definition image is divided by line ;

   S3. Parallelly output the buffered K-line video data to the UHD display array and drive the UHD display array corresponding to the K-line video data to display simultaneously;

   S4. After the K lines of video data are output in parallel, buffer the other K lines of video data in the lines of video data;

   S5. Parallelly output the buffered video data of the other K lines to the ultra-high-definition display array and drive the lines corresponding to the additional K-line video data of the ultra-high-definition display array to be displayed simultaneously;

   S6, and so on, until all the lines corresponding to the several lines of video data of the one-frame / field ultra-high-definition image driving the ultra-high-definition display array are completely displayed.
2. The method for driving an ultra-high-definition image display according to claim 1, wherein, during progressive scanning, the K-line video data corresponds to K lines adjacent to each other in the ultra-high-definition display array; during interlaced scanning, the The K-line video data corresponds to K lines that are separated from each other in the UHD display array.
3. The method for driving an ultra-high-definition image according to claim 1, wherein in step S3, multiple HDMI interfaces, multiple DP interfaces, multiple V-BY-ONE interfaces, multiple LVDS interfaces, or multiple The MIPI interfaces output the buffered K lines of video data in parallel; in step S5, via multiple HDMI interfaces, multiple DP interfaces, multiple V-BY-ONE interfaces, multiple LVDS interfaces, or multiple MIPI interfaces The buffered video data of the other K lines are output in parallel.
4. The method for driving an ultra high-definition image display according to claim 1, wherein the line video data comprises video image data Data, a data clock Clock, a data valid signal DE, a line synchronization signal Hsync, and a frame / field synchronization signal Vsync.
5. An ultra high-definition image display driving device, comprising:

   A segmentation unit, which is used to progressively divide a frame of ultra-high-definition image into several lines of video data during progressive scanning; and a segmentation unit, which is used to deinterleave a field of ultra-high-definition images into several lines of video data during progressive scanning;

   The buffer unit is configured to buffer K lines of video data in the plurality of lines of video data, and buffer the other K lines of video data in the plurality of lines of video data after the K lines of video data are output in parallel, and so on, Until the last K lines of video data in the plurality of lines of video data are cached;

   A receiving output driving unit configured to output the received K-line video data output in parallel by the buffer unit to an ultra-high-definition display array and drive the ultra-high-definition display array corresponding to the K-line video data Lines are simultaneously displayed, and then the other K lines of video data output in parallel by the buffer unit are received in parallel to the ultra high definition display array and the lines corresponding to the other K lines of video data are driven in the ultra high definition display array Simultaneous display, and so on, until all the lines corresponding to the several lines of video data of the one frame / field ultra high-definition image of the ultra-high-definition display array are completely displayed.
6. The device for driving an ultra-high-definition image display according to claim 5, wherein, in progressive scanning, the K-line video data corresponds to K lines adjacent to each other in the ultra-high-definition display array; during interlaced scanning, the The K-line video data corresponds to K lines that are separated from each other in the UHD display array.
7. The device for driving an ultra-high-definition image display according to claim 5, wherein the buffer unit includes multiple HDMI interfaces, multiple DP interfaces, multiple V-BY-ONE interfaces, multiple LVDS interfaces, or multiple MIPIs. The interface sends the K-line video data to the receiving output driving unit in parallel.
8. The driving device for an ultra-high-definition image display according to claim 5, wherein the line video data comprises video image data Data, a data clock Clock, a data valid signal DE, a line synchronization signal Hsync, and a frame / field synchronization signal Vsync.

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