WO2019205447A1 - Procédé d'amélioration de récupération d'espace de mémoire flash - Google Patents

Procédé d'amélioration de récupération d'espace de mémoire flash Download PDF

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Publication number
WO2019205447A1
WO2019205447A1 PCT/CN2018/105862 CN2018105862W WO2019205447A1 WO 2019205447 A1 WO2019205447 A1 WO 2019205447A1 CN 2018105862 W CN2018105862 W CN 2018105862W WO 2019205447 A1 WO2019205447 A1 WO 2019205447A1
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WO
WIPO (PCT)
Prior art keywords
flash
flash memory
data
memory
block
Prior art date
Application number
PCT/CN2018/105862
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English (en)
Chinese (zh)
Inventor
许豪江
李庭育
黄中柱
谢享奇
Original Assignee
江苏华存电子科技有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 江苏华存电子科技有限公司 filed Critical 江苏华存电子科技有限公司
Publication of WO2019205447A1 publication Critical patent/WO2019205447A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0253—Garbage collection, i.e. reclamation of unreferenced memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7205—Cleaning, compaction, garbage collection, erase control

Definitions

  • the present invention relates to the field of flash memory technology, and in particular to a method for improving flash garbage data recovery.
  • Flash memory is a long-lived non-volatile memory that retains stored data information in the event of a power outage. Data deletion is not in a single byte but in a fixed block. The block size is typically 256KB to 20MB. Flash memory is a variant of electronically erasable read-only memory (EEPROM). Unlike flash memory, EEPROM can be erased and rewritten at the byte level instead of the entire chip eraser, while most chips in flash require a block erase. except. Since data can still be saved when it is powered off, flash memory is often used to save setup information, such as saving data in a computer's BIOS (basic program), PDA (personal digital assistant), digital camera, and so on.
  • BIOS basic program
  • PDA personal digital assistant
  • Flash memory is a non-disappearing memory device that holds data. Data is lost after losing power.
  • Common three-level cells TLC that store three bits
  • MLC multi-level cell
  • SLC single-level cell
  • flash garbage collection Since flash cannot write data repeatedly after writing data, additional flash blocks must be used to organize the written data. This process is called flash garbage collection. There are three cases of garbage collection. The first type is called the replacement mechanism. The new flash data completely replaces the old flash block. The second type is the partial replacement mechanism. The new data flash block only needs to be supplemented by the old flash block. The third type is the non-replacement mechanism, the newly generated data flash block, and all the data content is taken from several old flash blocks. The first type is the most efficient, and the third type takes the most time and cost.
  • a flash translation layer is needed in the flash memory to implement a virtual block device on the flash chip, and the logical address is mapped to the physical address of the flash memory through the mapping table.
  • garbage collection mechanisms it is necessary to quickly find valid data in the block and move to a new flash block.
  • the traditional method must read each position in the block and compare the image table to find out whether the content of the mapping table is met, and whether the valid data or invalid data is judged. This method takes a lot of reading time and affects the overall efficiency.
  • a method for improving flash garbage data recovery comprising a memory control chip, wherein the memory control chip is provided with a flash instruction control device, a flash physical address table, and a data buffer,
  • the data buffer is connected to a plurality of external flash memories;
  • the plurality of flash memories include a first flash memory, a second flash memory, a third flash memory, an Nth flash memory, and N is an integer greater than 3.
  • the flash memory has 1024 blocks, each block has 256 pages, and each page is composed of 32 sectors.
  • the method comprises the following steps:
  • the instruction control device of the memory control chip moves the data in the buffer to the new flash page
  • the invention has the beneficial effects that the invention substantially reduces the time of garbage collection by flash physical address table. Quickly find the garbage block of the garbage collection and only move the minimum amount of flash data. Complete a single garbage collection.
  • Figure 1 is a schematic block diagram of the present invention
  • Figure 2 is a flow chart of the present invention.
  • the present invention provides a technical solution: a method for improving flash garbage data recovery, comprising a memory control chip 1 , wherein the memory control chip 1 is provided with a flash instruction control device 2 , a flash physical address table 3 and data a buffer 4, the data buffer 4 is connected to a plurality of external flash memories; the plurality of flash memories include a first flash memory 5, a second flash memory 6, a third flash memory 7, an Nth flash memory, and N is an integer greater than 3; There are 1024 blocks, each block has 256 pages, and each page is composed of 32 sectors; assuming that a flash block has 256 pages, the flash physical address table can be 4096 bits or a flash page as a unit. 1 is valid data and 0 is invalid data.
  • the memory control chip has a flash command control device through which commands can be issued to control the flash chip.
  • the method for improving flash garbage data recovery includes the following steps:
  • the instruction control device of the memory control chip moves the data in the buffer to the new flash page
  • the actual valid data has 64, and the flash physical address table is in units of one flash page.
  • 256 blocks must be read when garbage collection is performed, and then the logical address is mapped to the flash physics.
  • the address mapping table determines whether to move to a new flash block. In this way, the entire old flash block data can be moved by reading the actual effective position 128 times. Save four times the time. The less valid data in a flash block, the more time is saved.
  • the present invention substantially reduces the time for garbage collection by flashing a physical address table. Quickly find the garbage block of the garbage collection and only move the minimum amount of flash data. Complete a single garbage collection.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)

Abstract

L'invention concerne un procédé d'amélioration de la récupération d'espace de mémoire flash, comprenant : une puce de commande de mémoire (1). La puce de commande de mémoire (1) est pourvue d'un dispositif de commande d'instruction de mémoire flash (2), d'une table d'adresses physiques de mémoire flash (3) et d'un tampon de données (4). Le tampon de données (4) est connecté à une pluralité de mémoires flash externes, qui comprennent une première mémoire flash (5), une deuxième mémoire flash (6), une troisième mémoire flash (7) et jusqu'à une nième mémoire flash, N Étant un nombre entier supérieur à 3. En utilisant la table d'adresses physiques de mémoire flash (3), le procédé réduit significativement le temps nécessaire pour effectuer une récupération d'espace et peut localiser rapidement un bloc de mémoire flash pour ladite récupération d'espace. De cette manière, une tâche de récupération d'espace unique peut être achevée en ne déplaçant qu'une quantité minimale de données dans une mémoire flash.
PCT/CN2018/105862 2018-04-27 2018-09-14 Procédé d'amélioration de récupération d'espace de mémoire flash WO2019205447A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201810394412.6 2018-04-27
CN201810394412.6A CN108874682A (zh) 2018-04-27 2018-04-27 一种提升闪存垃圾数据回收方法

Publications (1)

Publication Number Publication Date
WO2019205447A1 true WO2019205447A1 (fr) 2019-10-31

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Application Number Title Priority Date Filing Date
PCT/CN2018/105862 WO2019205447A1 (fr) 2018-04-27 2018-09-14 Procédé d'amélioration de récupération d'espace de mémoire flash

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WO (1) WO2019205447A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112052193B (zh) * 2020-09-28 2023-04-07 成都佰维存储科技有限公司 一种垃圾回收方法、装置、可读存储介质及电子设备

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120005405A1 (en) * 2010-06-30 2012-01-05 William Wu Pre-Emptive Garbage Collection of Memory Blocks
CN104166634A (zh) * 2014-08-12 2014-11-26 华中科技大学 一种固态盘系统中的映射表缓存管理方法
CN104268095A (zh) * 2014-09-24 2015-01-07 上海新储集成电路有限公司 一种存储器及基于该存储器进行数据读/写操作的方法
CN105528301A (zh) * 2015-12-07 2016-04-27 中国人民解放军信息工程大学 一种NAND Flash闪存垃圾回收方法
CN107391392A (zh) * 2017-07-21 2017-11-24 重庆大学 一种基于闪存存储设备并行特征的垃圾回收优化方法
CN107797772A (zh) * 2017-11-27 2018-03-13 郑州云海信息技术有限公司 一种基于闪存介质的垃圾回收系统及方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120005405A1 (en) * 2010-06-30 2012-01-05 William Wu Pre-Emptive Garbage Collection of Memory Blocks
CN104166634A (zh) * 2014-08-12 2014-11-26 华中科技大学 一种固态盘系统中的映射表缓存管理方法
CN104268095A (zh) * 2014-09-24 2015-01-07 上海新储集成电路有限公司 一种存储器及基于该存储器进行数据读/写操作的方法
CN105528301A (zh) * 2015-12-07 2016-04-27 中国人民解放军信息工程大学 一种NAND Flash闪存垃圾回收方法
CN107391392A (zh) * 2017-07-21 2017-11-24 重庆大学 一种基于闪存存储设备并行特征的垃圾回收优化方法
CN107797772A (zh) * 2017-11-27 2018-03-13 郑州云海信息技术有限公司 一种基于闪存介质的垃圾回收系统及方法

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