WO2019190410A1 - Communication sans fil à porteuse unique - Google Patents

Communication sans fil à porteuse unique Download PDF

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Publication number
WO2019190410A1
WO2019190410A1 PCT/SG2019/050186 SG2019050186W WO2019190410A1 WO 2019190410 A1 WO2019190410 A1 WO 2019190410A1 SG 2019050186 W SG2019050186 W SG 2019050186W WO 2019190410 A1 WO2019190410 A1 WO 2019190410A1
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WIPO (PCT)
Prior art keywords
cyclic prefix
data
sequence
data block
equalized
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PCT/SG2019/050186
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English (en)
Inventor
Yonghong Zeng
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Agency For Science, Technology And Research
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Publication of WO2019190410A1 publication Critical patent/WO2019190410A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H04L27/2605—Symbol extensions, e.g. Zero Tail, Unique Word [UW]
    • H04L27/2607—Cyclic extensions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202—Channel estimation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03159—Arrangements for removing intersymbol interference operating in the frequency domain
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/01—Equalisers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/12—Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W4/00—Services specially adapted for wireless communication networks; Facilities therefor
    • H04W4/30—Services specially adapted for particular environments, situations or purposes
    • H04W4/40—Services specially adapted for particular environments, situations or purposes for vehicles, e.g. vehicle-to-pedestrians [V2P]
    • H04W4/46—Services specially adapted for particular environments, situations or purposes for vehicles, e.g. vehicle-to-pedestrians [V2P] for vehicle-to-vehicle communication [V2V]

Definitions

  • the present invention generally relates to single-carrier wireless communication, including a method of transmitting data, a method of receiving data, a corresponding transmitter and a corresponding receiver, and more particularly, under fast time-varying channel condition.
  • Wireless communication systems with fast time-varying channels such as Vehicle-to- Vehicle (V2V) and UAV wireless communication systems
  • V2V Vehicle-to- Vehicle
  • UAV wireless communication systems have attracted attention in recent years.
  • current waveforms such as IEEE 802.1 lp and LTE
  • 802. l lp does not seem to perform well under such fast time-varying channel condition, e.g., suffers from extremely high data packet error rate.
  • OFDM orthogonal frequency division multiplexing
  • LTE is also not a suitable option as it is not designed for fast time-varying channel condition, e.g., it has low spectral efficiency at fast time-varying channel condition.
  • Cyclic prefixed single-carrier which may also be referred to as single carrier with frequency-domain equalization (SC-FDE)
  • SC-FDE single carrier with frequency-domain equalization
  • CP-SC possesses the low PAPR property of general single -carrier systems.
  • PAPR peak-to- average power ratio
  • the modulated data sequence may be divided into multiple blocks, and each block may be added with a cyclic prefix (CP) to facilitate the frequency-domain equalization.
  • CP may be used to cope with time dispersive channels.
  • Another problem in OFDM and conventional CP-SC is that some symbols are theoretically not recoverable when some channel nulls meet the transmitted subcarriers or the discrete Fourier transform (DFT) of channel having zero (or near) coefficients.
  • DFT discrete Fourier transform
  • a method of transmitting data based on single-carrier wireless communication comprising:
  • each data block comprising a data block sequence
  • cyclically extending each of the plurality of data blocks comprising inserting, for each of the plurality of data blocks, a cyclic prefix to a beginning of the data block to produce a plurality of extended data blocks, the cyclic prefix comprising a cyclic prefix sequence;
  • the data frame comprising a data frame sequence
  • cyclic prefix sequence is a predefined sequence.
  • a method of receiving data based on single-carrier wireless communication comprising: producing a plurality of extended data blocks based on a received data transmitted over a channel, each extended data block comprising a data block and a cyclic prefix inserted at a beginning of the data block, the cyclic prefix comprising a cyclic prefix sequence;
  • the cyclic prefix sequence is a predefined sequence.
  • a transmitter for transmitting data based on single-carrier wireless communication comprising:
  • At least one processor communicatively coupled to the memory and configured to: produce a plurality of data blocks based on an input data, each data block comprising a data block sequence;
  • each of the plurality of data blocks comprising inserting, for each of the plurality of data blocks, a cyclic prefix to a beginning of the data block to produce a plurality of extended data blocks, the cyclic prefix comprising a cyclic prefix sequence;
  • cyclic prefix sequence is a predefined sequence.
  • a receiver for receiving data based on single-carrier wireless communication comprising:
  • At least one processor communicatively coupled to the memory and configured to: produce a plurality of extended data blocks based on a received data transmitted over a channel, each extended data block comprising a data block and a cyclic prefix inserted at a beginning of the data block, the cyclic prefix comprising a cyclic prefix sequence;
  • the cyclic prefix sequence is a predefined sequence.
  • FIG. 1 depicts a flow diagram illustrating a method of transmitting data based on single-carrier wireless communication, according to various embodiments of the present invention
  • FIG. 2 depicts a flow diagram illustrating a method of receiving data based on single-carrier wireless communication, according to various embodiments of the present invention
  • FIG. 3 depicts a schematic block diagram of a transmitter for transmitting data based on single-carrier wireless communication, according to various embodiments of the present invention
  • FIG. 4 depicts a schematic block diagram of a receiver for receiving data based on single-carrier wireless communication, according to various embodiments of the present invention
  • FIG. 5 depicts a wireless communication system, according to various embodiments of the present invention.
  • FIG. 6 depicts a schematic representation of an exemplary basic frame structure of a pilot cyclic prefixed single carrier (PCP-SC), according to various example embodiments of the present invention
  • FIG. 7 depicts a schematic representation of an exemplary basic frame structure of a pilot skew-cyclic prefixed single carrier (PSCP-SC), according to various example embodiments of the present invention
  • FIGs. 8A and 8B depict schematic operation flow diagrams for a PCP-SC transmitter and a PSCP-SC transmitter, respectively, according to various example embodiments of the present invention
  • FIG. 9 depicts a schematic operation flow diagram for a PCP-SC (and/or PSCP- SC) receiver, according to various example embodiments of the present invention.
  • FIG. 10 depicts a schematic representation of a PSCP-SC data structure, according to various example embodiments of the present invention.
  • FIG. 11 depicts a flow diagram of a method for estimating phase and amplitude (or phase and amplitude distortions) based on the PCP according to various example embodiments of the present invention.
  • FIG. 12 depicts a flow diagram of a method for estimating (or tracking) a channel block by block according to various example embodiments of the present invention.
  • Various embodiments of the present invention provide single-carrier wireless communication methods, including a method of transmitting data and/or a method of receiving data based on single-carrier wireless communication, and corresponding single carrier wireless communication system, including a transmitter for transmitting data and/or a receiver for receiving data based on single-carrier wireless communication.
  • conventional wireless communication methods/systems suffer from various problems or deficiencies, especially under fast time- varying channel condition.
  • various embodiments of the present invention provide single-carrier wireless communication methods and corresponding single-carrier wireless communication system that seek to overcome, or at least ameliorate, one or more of the deficiencies in conventional wireless communication methods/systems, especially under fast time-varying channel condition.
  • FIG. 1 depicts a flow diagram illustrating a method 100 of transmitting data based on single-carrier wireless communication, according to various embodiments of the present invention.
  • the method 100 comprising: producing (at 102) a plurality of data blocks based on an input data, each data block comprising a data block sequence; cyclically extending (at 104) each of the plurality of data blocks, comprising inserting (e.g., adding or attaching), for each of the plurality of data blocks, a cyclic prefix to a beginning of the data block to produce a plurality of extended data blocks, the cyclic prefix comprising a cyclic prefix sequence; and combining (at 106) the plurality of extended data blocks to produce a data frame for transmission, the data frame comprising a data frame sequence.
  • the cyclic prefix sequence is a predefined sequence. It will be understood by a person skilled in the art that, unless stated or context requires otherwise, the term“sequence” in relation to data refers to a predefined
  • the plurality of data blocks may be produced using a serial-to-parallel converter.
  • an input data may be mapped to a symbol sequence by a symbol mapper and the symbol sequence may subsequently be inputted to a serial-to-parallel converter configured to produce the plurality of data blocks based on the symbol sequence (e.g., divide the symbol sequence into the plurality of data blocks), each data block comprising a data block sequence.
  • an additional cyclic prefix may be inserted to an end (opposite to the beginning) of the last data block of the plurality of data blocks (i.e., last data block in the data frame to be formed).
  • the predefined sequence may be a known sequence (e.g., a unique word).
  • such a cyclic prefix comprising a predefined cyclic prefix sequence is different from conventional cyclic prefix (CP), and such a configuration or type of cyclic prefix may herein be referred to as a pilot cyclic prefix (PCP), and the single-carrier wireless communication using such a PCP may herein be referred to as pilot cyclic prefixed single carrier (PSP-SC).
  • PCP pilot cyclic prefix
  • PSP-SC pilot cyclic prefixed single carrier
  • the plurality of extended data blocks may be combined using a parallel-to-serial converter to produce the data frame for transmission.
  • the method 100 of transmitting data has been found to be advantageous over conventional wireless communication methods (e.g., CP- SC or SC-FDE) with respect to performances under fast time-varying channel condition as the method 100 has been found to result in improved performances under fast time- varying channel condition.
  • conventional wireless communication methods e.g., CP- SC or SC-FDE
  • the PCP has been found according to various embodiments of the present invention to enable or facilitate channel estimation (or channel tracking), channel synchronization and/or enhanced equalization (signal equalization) at the receiver end, which improves or enhances performances under fast time-varying channel condition.
  • the method 100 of transmitting data is further configured to, for example, enhance operations and/or suitability under fast time-varying channel condition, such as to further address (e.g., eliminate or mitigate) non-zero DV value (DC power of the transmitted signal (PSP-SC transmitted signal)) and/or the power spectrum density (PSD) of the transmitted signal being unsmooth.
  • the above-mentioned cyclically extending each of the plurality of data blocks further comprises subjecting, for each of the plurality of data blocks, the cyclic prefix (for the above-mentioned inserting to the beginning of the data block) to an interleave sequence.
  • each of the cyclic prefix to be inserted to the corresponding data block is subjected to an interleave sequence, and the cyclic prefix may thus be modified by the interleave sequence.
  • the interleave sequence comprises a plurality (or a set) of elements, including one element for each cyclic prefix to be inserted to the plurality of data blocks.
  • the number of elements in the interleave sequence may be the same as the number of cyclic prefixes to be inserted to the plurality of data blocks.
  • each cyclic prefix may correspond respectively to an element in the interleave sequence, and thus may be modified by the corresponding element depending on the value of the corresponding element.
  • the interleave sequence is a pseudo-random sequence.
  • each element in the interleave sequence has either a first predefined value or a second predefined value.
  • the above-mentioned subjecting the cyclic prefix to the interleave sequence results in the cyclic prefix being a first type if the element in the interleave sequence corresponding to the cyclic prefix has the first predefined value, and results in the cyclic prefix being a second type if the element in the interleave sequence corresponding to the cyclic prefix has the second predefined value.
  • the second type of cyclic prefix is a negative of the first type of cyclic prefix, or in other words, the first and second types of cyclic prefix may be opposite in value.
  • each element of the pseudo-random sequence is either‘G (e.g., corresponding to the above-mentioned “first predefined value”) or‘-G (e.g., corresponding to the above-mentioned“second predefined value”) (e.g., only either ‘G or ‘-G).
  • the above-mentioned subjecting the cyclic prefix to the interleave sequence results in the cyclic prefix being a first type (e.g., cyclic prefix multiplied by‘1’, and thus no change to the cyclic prefix sequence, thus for example, a positive or unmodified type) if the element in the interleave sequence corresponding to the cyclic prefix has a value of‘ 1’ , and results in the cyclic prefix being a second type (e.g., cyclic prefix sequence multiplied by‘-G, and thus a negative of the initial cyclic prefix may be obtained, thus for example, a negative or modified type) if the element in the interleave sequence corresponding to the cyclic prefix has a value of‘ - G .
  • a first type e.g., cyclic prefix multiplied by‘1’, and thus no change to the cyclic prefix sequence, thus for example, a positive or unmodified type
  • the PCP is interleaved into the plurality of data blocks (i.e., into the data frame produced).
  • the above- mentioned sequence which the cyclic prefix is subjected to may thus be referred to herein as an interleave sequence.
  • such a cyclic prefix is further differentiated from conventional cyclic prefix (CP), and such a configuration or type of cyclic prefix may herein be referred to as a pilot skew-cyclic prefix (PSCP), and the single-carrier wireless communication using such a PSCP may be referred to as pilot skew-cyclic prefixed single carrier (PSCP-SC).
  • PSCP pilot skew-cyclic prefix
  • PSCP-SC pilot skew-cyclic prefixed single carrier
  • the PSCP is a further defined or configured version/structure of PSP (e.g., further subjected to an interleave sequence as described hereinbefore), and therefore, unless stated or context requires otherwise, reference to PSP (or PSP-SC) also includes (or encompasses) PSCP (or PSCP-SC).
  • PSP or PSP-SC
  • PSCP PSCP-SC
  • interleaving the PCP (or the like such as the CP or PSCP) into the plurality of data blocks may refer to multiplying the PCP by the corresponding element in the interleave sequence.
  • FIG. 2 depicts a flow diagram illustrating a method 200 of receiving data based on single-carrier wireless communication according to various embodiments of the present invention, such as corresponding to the method 100 of transmitting data as described hereinbefore with reference to FIG. 1 (e.g., receiving the transmitted data according to the method 100).
  • the method 200 comprising: producing (at 202) a plurality of extended data blocks based on a received data transmitted over a channel, each extended data block comprising a data block and a cyclic prefix inserted at a beginning of the data block, the cyclic prefix comprising a cyclic prefix sequence; equalizing (signal equalization) (at 204), for each of the plurality of extended data blocks, the extended data block based on the cyclic prefix of the extended data block to obtain a plurality of first equalized data blocks; and recovering (at 206) the received data based on the plurality of first equalized data blocks.
  • the cyclic prefix sequence is a predefined sequence.
  • the plurality of extended data blocks may be produced using a serial-to-parallel converter (e.g., divide the received data into the plurality of extended data blocks).
  • the received data may correspond to the data transmitted according to the method 100 of transmitting data as described hereinbefore with reference to FIG. 1, and thus the received data comprises data corresponding to the plurality of extended data blocks combined by the method 100 (i.e., at the transmitter) to produce the data frame for transmission.
  • the plurality of extended data blocks produced at the receiver at 202 corresponds to the plurality of extended data blocks produced at the transmitter at 104, each having been cyclically extended as described hereinbefore in the method 100 of transmitting data with reference to FIG.
  • each extended data block comprises a data block and a cyclic prefix inserted at a beginning of the data block, as described hereinbefore in the method 100 of transmitting data with reference to FIG. 1.
  • the last data block of the plurality of data blocks may have an additional cyclic prefix inserted to an end thereof (opposite to the beginning).
  • the cyclic prefix in each of the plurality of extended data blocks produced at 202 also comprises the predefined cyclic prefix sequence, which as described hereinbefore, may be referred to as a pilot cyclic prefix (PCP).
  • PCP pilot cyclic prefix
  • the cyclic prefix may be a pilot skew- cyclic prefix (PS CP), whereby the cyclic prefix may be either a first type or a second type (e.g., only either a first type or a second type), the second type of cyclic prefix may be a negative of the first type of cyclic prefix, or in other words, the first and second types of cyclic prefix may be opposite in value.
  • PS CP pilot skew- cyclic prefix
  • the method 200 of receiving data has been found to be advantageous over conventional wireless communication methods (e.g., CP- SC or SC-FDE) with respect to performances under fast time-varying channel condition as the method 200 has been found to result in improved performances under fast time- varying channel condition.
  • the PCP has been found according to various embodiments of the present invention to enable or facilitate channel estimation (or channel tracking), channel synchronization and/or enhanced equalization (signal equalization) at the receiver end, which improves or enhances performances under fast time-varying channel condition.
  • the extended data block is equalized (signal equalization) based on the cyclic prefix inserted at the beginning of the data block (of the extended data block) to obtain a plurality of first equalized data blocks.
  • the plurality of extended data blocks are equalized block by block.
  • the above-mentioned equalization of the plurality of first equalized data blocks is enhanced by estimating and compensating for the phase distortion and amplitude distortion associated with the plurality of first equalized data block.
  • the method 200 further comprises enhancing equalization of the plurality of first equalized data blocks to produce a plurality of second equalized data blocks, comprising, for each of the plurality of first equalized data blocks: estimating a phase distortion and an amplitude distortion associated with the first equalized data block p based on the cyclic prefix of the first equalized data block; and modifying the first equalized data block based on the estimated phase distortion and the estimated amplitude distortion to produce the second equalized data block.
  • the above-mentioned recovering the received data comprises recovering, for each of the plurality of second equalized data blocks, the second equalized data block into a recovered data sequence based on a first type of cyclic convolution or a second type of cyclic convolution based on (e.g., depending on) a type of the cyclic prefix (e.g., whether it is the above-mentioned first type or second type of cyclic prefix) of the second equalized data block.
  • a type of the cyclic prefix e.g., whether it is the above-mentioned first type or second type of cyclic prefix
  • the method 200 further comprises determining, for each of the plurality of second equalized data block, a channel estimate of the channel at the second equalized data block based on the recovered data sequence of the second equalized data block and the cyclic prefix of the second equalized data block.
  • the channel estimate of the channel determined at the second equalized data block may then be used as the channel estimate for a subsequent data block (e.g., immediately subsequent or next equalized data block to the second (current) equalized data block).
  • the above-mentioned determining the channel estimate of the channel at the second equalized data block comprises: determining a first channel estimate (e.g., an initial channel estimate) based on the above-mentioned recovered data sequence of the second equalized data block, the cyclic prefix of the second equalized data block and a previous channel estimate (e.g., a previous channel estimate determined at a previous second equalized data block, such as an immediately previous channel estimate determined at an immediately previous second equalized data block); and determining a second channel estimate (e.g., a modified channel estimate) based on an average of the first channel estimate and one or more previous channel estimates (e.g., one or more immediately previous channel estimates determined at immediately one or more previous second equalized data blocks).
  • a first channel estimate e.g., an initial channel estimate
  • a previous channel estimate e.g., a previous channel estimate determined at a previous second equalized data block, such as an immediately previous channel estimate determined at an immediately previous second equalized data block
  • a single-carrier wireless communication method comprising a method 100 of transmitting data as described hereinbefore with reference to FIG. 1 for transmitting data and a method 200 of receiving data as described hereinbefore with reference to FIG. 2 to receive the data transmitted by the method 100.
  • FIG. 3 depicts a schematic block diagram of a transmitter 300 for transmitting data based on single-carrier wireless communication, according to various embodiments of the present invention, such as corresponding to the method 100 of transmitting data as described hereinbefore with reference to FIG. 1 according to various embodiments of the present invention.
  • the transmitter 300 comprises a memory 302 and at least one processor 304 communicatively coupled to the memory 302 and configured to: produce a plurality of data blocks based on an input data, each data block comprising a data block sequence; cyclically extend each of the plurality of data blocks, comprising inserting, for each of the plurality of data blocks, a cyclic prefix to a beginning of the data block to produce a plurality of extended data blocks, the cyclic prefix comprising a cyclic prefix sequence; and combine the plurality of extended data blocks to produce a data frame for transmission, the data frame comprising a data frame sequence.
  • the cyclic prefix sequence is a predefined sequence. It will be appreciated to a person skilled in the art that the transmitter 300 may be a transmitter system, which may also be embodied as a transmitter device or a transmitter apparatus.
  • the at least one processor 304 may be configured to perform the required functions or operations through set(s) of instructions (e.g., software modules) executable by the at least one processor 304 to perform the required functions or operations. Accordingly, as shown in FIG.
  • the transmitter 300 may further comprise a data block generator (e.g., a data block generating module or circuit) 306 configured to perform the above-mentioned producing (at 102) a plurality of data blocks based on an input data; a cyclic prefix inserter (e.g., a cyclic prefix inserting module or circuit) 308 configured to perform the above-mentioned cyclically extending (at 104) each of the plurality of data blocks; and data block combiner (e.g., a data block generating module or circuit) 310 configured to perform the above- mentioned combining (at 106) the plurality of extended data blocks to produce a data frame for transmission.
  • a data block generator e.g., a data block generating module or circuit
  • a cyclic prefix inserter e.g., a cyclic prefix inserting module or circuit
  • data block combiner e.g., a data block generating module or circuit
  • modules are not necessarily separate modules, and two or more modules may be realized by or implemented as one functional module (e.g., a circuit or a software program) as desired or as appropriate without deviating from the scope of the present invention.
  • the data block generator 306, the cyclic prefix inserter 308 and the data block combiner 310 may be realized (e.g., compiled together) as one executable software program (e.g., software application or simply referred to as an“app”), which for example may be stored in the memory 302 and executable by the at least one processor 304 to perform the functions/operations as described herein according to various embodiments.
  • the transmitter 300 corresponds to the method 100 as described hereinbefore with reference to FIG. 1, therefore, various functions or operations configured to be performed by the least one processor 304 may correspond to various steps of the method 100 described hereinbefore according to various embodiments, and thus need not be repeated with respect to the transmitter 300 for clarity and conciseness.
  • various embodiments described herein in context of the method 100 are analogously valid for the corresponding transmitter 300, and vice versa.
  • the memory 302 may have stored therein the data block generator 306, the cyclic prefix inserter 308 and/or the data block combiner 310, which respectively correspond to various steps of the method 100 as described hereinbefore according to various embodiments, which are executable by the at least one processor 304 to perform the corresponding functions/operations as described herein.
  • FIG. 4 depicts a schematic block diagram of a receiver 400 for receiving data based on single-carrier wireless communication, according to various embodiments of the present invention, such as corresponding to the method 200 of receiving data as described hereinbefore with reference to FIG. 2 according to various embodiments of the present invention.
  • the receiver 400 comprises a memory 402 and at least one processor 404 communicatively coupled to the memory 402 and configured to: produce a plurality of extended data blocks based on a received data transmitted over a channel, each extended data block comprising a data block and a cyclic prefix inserted at a beginning of the data block, the cyclic prefix comprising a cyclic prefix sequence; equalize, for each of the plurality of extended data blocks, the extended data block based on the cyclic prefix of the extended data block to obtain a plurality of first equalized data blocks; and recover the received data based on the plurality of first equalized data blocks.
  • the cyclic prefix sequence is a predefined sequence. It will be appreciated to a person skilled in the art that the receiver 400 may be a receiver system, which may also be embodied as a receiver device or a receiver apparatus.
  • the at least one processor 404 may be configured to perform the required functions or operations through set(s) of instructions (e.g., software modules) executable by the at least one processor 404 to perform the required functions or operations. Accordingly, as shown in FIG.
  • the receiver 400 may further comprise a data block generator (e.g., a data block generating module or circuit) 406 configured to perform the above-mentioned producing (at 202) a plurality of extended data blocks based on a received data transmitted over a channel; a signal equalizer (e.g., a signal equalizing module or circuit) 408 configured to perform the above-mentioned equalizing (at 204), for each of the plurality of extended data blocks, the extended data block based on the cyclic prefix of the extended data block to obtain a plurality of first equalized data blocks; and a data symbol recoverer 410 configured to perform the above-mentioned recovering (at 206) the received data based on the plurality of first equalized data blocks.
  • a data block generator e.g., a data block generating module or circuit
  • a signal equalizer e.g., a signal equalizing module or circuit
  • a data symbol recoverer 410 configured to perform the above-mentioned recovering (at 206)
  • the above-mentioned modules are not necessarily separate modules, and two or more modules may be realized by or implemented as one functional module (e.g., a circuit or a software program) as desired or as appropriate without deviating from the scope of the present invention.
  • the data block generator 406, the signal equalizer 408 and the data symbol recoverer 410 may be realized (e.g., compiled together) as one executable software program (e.g., software application or simply referred to as an“app”), which for example may be stored in the memory 402 and executable by the at least one processor 404 to perform the functions/operations as described herein according to various embodiments.
  • the receiver 400 corresponds to the method 200 as described hereinbefore with reference to FIG. 2, therefore, various functions or operations configured to be performed by the least one processor 304 may correspond to various steps of the method 200 described hereinbefore according to various embodiments, and thus need not be repeated with respect to the receiver 400 for clarity and conciseness.
  • various embodiments described herein in context of the method 200 are analogously valid for the corresponding receiver 400, and vice versa.
  • the memory 402 may have stored therein the data block generator 406, the signal equalizer 408 and/or the data symbol recoverer 410, which respectively correspond to various steps of the method 200 as described hereinbefore according to various embodiments, which are executable by the at least one processor 404 to perform the corresponding functions/operations as described herein.
  • FIG. 5 depicts a wireless communication system 500 according to various embodiments of the present invention.
  • the wireless communication system 500 comprises a transmitter 300 configured to transmit data as described hereinbefore with reference to FIG. 3 and a receiver 400 configured to receive the data transmitted from the transmitter 300 as described hereinbefore with reference to FIG. 4.
  • a computing system, a controller, a microcontroller or any other system providing a processing capability may be provided according to various embodiments in the present disclosure.
  • Such a system may be taken to include one or more processors and one or more computer-readable storage mediums.
  • the transmitter 300 and the receiver 400 described hereinbefore may each include a processor (or controller) 304/404 and a computer-readable storage medium (or memory) 302/402 which are for example used in various processing carried out therein as described herein.
  • a memory or computer-readable storage medium used in various embodiments may be a volatile memory, for example a DRAM (Dynamic Random Access Memory) or a non-volatile memory, for example a PROM (Programmable Read Only Memory), an EPROM (Erasable PROM), EEPROM (Electrically Erasable PROM), or a flash memory, e.g., a floating gate memory, a charge trapping memory, an MRAM (Magnetoresistive Random Access Memory) or a PCRAM (Phase Change Random Access Memory).
  • DRAM Dynamic Random Access Memory
  • PROM Programmable Read Only Memory
  • EPROM Erasable PROM
  • EEPROM Electrical Erasable PROM
  • flash memory e.g., a floating gate memory, a charge trapping memory, an MRAM (Magnetoresistive Random Access Memory) or a PCRAM (Phase Change Random Access Memory).
  • a“circuit” may be understood as any kind of a logic implementing entity, which may be special purpose circuitry or a processor executing software stored in a memory, firmware, or any combination thereof.
  • a“circuit” may be a hard-wired logic circuit or a programmable logic circuit such as a programmable processor, e.g., a microprocessor (e.g., a Complex Instruction Set Computer (CISC) processor or a Reduced Instruction Set Computer (RISC) processor).
  • A“circuit” may also be a processor executing software, e.g., any kind of computer program, e.g., a computer program using a virtual machine code, e.g., Java.
  • a“module” may be a portion of a system according to various embodiments in the present invention and may encompass a “circuit” as above, or may be understood to be any kind of a logic-implementing entity therefrom.
  • the present specification also discloses a system (e.g., which may also be embodied as a device or an apparatus) for performing the operations/functions of the methods described herein.
  • a system may be specially constructed for the required purposes, or may comprise a general purpose computer or other device selectively activated or reconfigured by a computer program stored in the computer.
  • the algorithms presented herein are not inherently related to any particular computer or other apparatus.
  • Various general-purpose machines may be used with computer programs in accordance with the teachings herein. Alternatively, the construction of more specialized apparatus to perform the required method steps may be appropriate.
  • the present specification also at least implicitly discloses a computer program or software/functional module, in that it would be apparent to the person skilled in the art that the individual steps of the methods described herein may be put into effect by computer code.
  • the computer program is not intended to be limited to any particular programming language and implementation thereof. It will be appreciated that a variety of programming languages and coding thereof may be used to implement the teachings of the disclosure contained herein.
  • the computer program is not intended to be limited to any particular control flow. There are many other variants of the computer program, which can use different control flows without departing from the spirit or scope of the invention.
  • modules described herein may be software module(s) realized by computer program(s) or set(s) of instructions executable by a computer processor to perform the required functions, or may be hardware module(s) being functional hardware unit(s) designed to perform the required functions. It will also be appreciated that a combination of hardware and software modules may be implemented.
  • a computer program/module or method described herein may be performed in parallel rather than sequentially.
  • Such a computer program may be stored on any computer readable medium.
  • the computer readable medium may include storage devices such as magnetic or optical disks, memory chips, or other storage devices suitable for interfacing with a general purpose computer.
  • the computer program when loaded and executed on such a general-purpose computer effectively results in an apparatus that implements the steps of the methods described herein.
  • a first computer program product embodied in one or more computer-readable storage mediums (non-transitory computer- readable storage medium), comprising instructions (e.g., the data block generator 306, the cyclic prefix inserter 308, and/or the data block combiner 310) executable by one or more computer processors to perform a method 100 of transmitting data as described hereinbefore with reference to FIG. 1.
  • instructions e.g., the data block generator 306, the cyclic prefix inserter 308, and/or the data block combiner 310 executable by one or more computer processors to perform a method 100 of transmitting data as described hereinbefore with reference to FIG. 1.
  • a second computer program product embodied in one or more computer -readable storage mediums (non-transitory computer-readable storage medium), comprising instructions (e.g., the data block generator 406, the signal equalizer 408 and/or the data symbol recoverer 410) executable by one or more computer processors to perform a method 200 of receiving data as described hereinbefore with reference to FIG. 2.
  • various computer programs or modules described herein may be stored in a computer program product receivable by a system therein, such as the transmitter 300 as shown in FIG. 3, for execution by at least one processor 304 of the transmitter 300 to perform the required or desired functions and the receiver 400 as shown in FIG. 4, for execution by at least one processor 404 of the receiver 400 to perform the required or desired functions.
  • the first and second computer program products may be combined or integrated as one computer program product.
  • the software or functional modules described herein may also be implemented as hardware modules. More particularly, in the hardware sense, a module is a functional hardware unit designed for use with other components or modules. For example, a module may be implemented using discrete electronic components, or it can form a portion of an entire electronic circuit such as an Application Specific Integrated Circuit (ASIC). Numerous other possibilities exist. Those skilled in the art will appreciate that the software or functional module(s) described herein can also be implemented as a combination of hardware and software modules.
  • ASIC Application Specific Integrated Circuit
  • the transmitter 300 may be implemented in any wireless communication system, which may also be embodied as a wireless communication device or apparatus (e.g., portable or desktop computer system, such as tablet computers, laptop computers, mobile communications devices (e.g., smart phones), car navigation system and so on), for enabling the system to transmit data based on single-carrier wireless communication in a manner as described hereinbefore according to various embodiments.
  • a wireless communication device or apparatus e.g., portable or desktop computer system, such as tablet computers, laptop computers, mobile communications devices (e.g., smart phones), car navigation system and so on
  • the receiver 400 may be implemented in any wireless communication system, which may also be embodied as a wireless communication device or apparatus (e.g., portable or desktop computer system, such as tablet computers, laptop computers, mobile communications devices (e.g., smart phones), and so on), for enabling the system to receive data based on single-carrier wireless communication in a manner as described hereinbefore according to various embodiments.
  • a wireless communication device or apparatus e.g., portable or desktop computer system, such as tablet computers, laptop computers, mobile communications devices (e.g., smart phones), and so on
  • the transmitter 300 and receiver 400 may be integrated as a transceiver, and the transceiver may be implemented in any wireless communication system for enabling the system to transmit data and receive data based on single-carrier wireless communication in a manner as described hereinbefore according to various embodiments.
  • Various example embodiments of the present invention relate generally to communication, and more specifically to techniques for transmitting and receiving data in a wireless communication system under fast time-varying and severe frequency selective channel conditions.
  • various example embodiments of the present invention provide channel tracking and equalization for cyclic prefixed single carrier based wireless communication system.
  • wireless communication systems with fast time-varying channels such as Vehicle-to- Vehicle (V2V) and UAV wireless communication systems
  • V2V Vehicle-to- Vehicle
  • current waveforms such as IEEE 802. l lp and LTE
  • 802. l lp does not seem to perform well under such fast time-varying channel condition, e.g., suffers from extremely high data packet error rate.
  • OFDM orthogonal frequency division multiplexing
  • LTE is also not a suitable option as it is not designed for fast time-varying channel condition, e.g., it has low spectral efficiency at fast time-varying channel condition.
  • PCP- SC e.g., including PSCP-SC
  • channel tracking and equalization for addressing the fast moving terminal problem.
  • PCP-SC may have relatively large non-zero DC value, which may induce high bit error rate (BER) at receiver if imperfect hardware devices create DC errors in the received signal. It may also cause issues with high peaks within bands and out-of-band.
  • BER bit error rate
  • one option may be to reduce the DC value (DC value may cause impairment when down converting), as the DC value may impair the receiver unless the data blocks are large.
  • DC value may cause impairment when down converting
  • smaller blocks may be desired but the DC value error may in turn become too large.
  • SC-FDE Single carrier with frequency-domain equalization
  • PAPR peak to average power ratio
  • SC-FDE channel tracking for SC-FDE is different from that of OFDM, which is a challenging problem in communication systems for high frequency and mobility.
  • PCP-SC pilot cyclic prefixed single carrier
  • Various example embodiments also provide a method of tracking and estimating the channel by using the pilot cyclic prefix (PCP).
  • PCP pilot cyclic prefix
  • Various example embodiments further provide a method of PCP-based amplitude and phase estimation and compensation, and a method of PCP-based channel estimation.
  • such methods described herein employs PCP without sacrificing any additional bandwidth, and are found to be effective for communication systems with fast time-varying channels.
  • PCP- SC may have non-zero power levels, which may induce errors in signal recovery at the receiver.
  • various example embodiments further define or configure the PCP to provide a pilot skew-cyclic prefixed single carrier (PSCP- SC).
  • PSCP- SC pilot skew-cyclic prefixed single carrier
  • Cyclic prefixed single-carrier which may also be referred to as single carrier with frequency-domain equalization (SC-FDE), is a wireless communication technology that has nearly the same advantages as OFDM for combating channel frequency selectivity.
  • CP-SC possesses the low PAPR property of general single -carrier systems.
  • the modulated data sequence may be divided into multiple blocks, and each block may be added with a cyclic prefix (CP) to facilitate the frequency-domain equalization.
  • CP may be used to cope with time dispersive channels.
  • Another problem in OFDM and conventional CP-SC is that some symbols are theoretically not recoverable when some channel nulls meet the transmitted subcarriers or the discrete Fourier transform (DFT) of channel having zero (or near) coefficients.
  • DFT discrete Fourier transform
  • various example embodiments of the present invention seek to make the CP useful by replacing the CP with a predefined sequence (symbol sequence) (e.g., a known constant sequence or a unique word), which may herein be referred to as a pilot cyclic prefix (PCP), and the single-carrier wireless communication using such a PCP may herein be referred to as pilot cyclic prefixed single carrier (PSP-SC).
  • a predefined sequence e.g., a known constant sequence or a unique word
  • PCP-SC pilot cyclic prefixed single carrier
  • an advantage of PCP-SC over conventional CP-SC or SC-FDE is that the PCP can be used for channel estimation, synchronization and/or enhancing equalization (signal equalization), which has been found to be especially useful for communication systems with fast time-varying fading channel.
  • the PCP-SC as described herein may be applied in a large variety of communication systems, such as but not limited to, vehicular to vehicular (V2V) communication, vehicular to infrastructure (V2I) communication, aircraft to aircraft (A2A) communication, and aircraft to ground (A2G) communication.
  • V2V vehicular to vehicular
  • V2I vehicular to infrastructure
  • A2A aircraft to aircraft
  • A2G aircraft to ground
  • the equalization method based on the PCP-SC according to various example embodiments has been found to enhance the equalization performance substantially for frequency selective channels.
  • PCP-SC based on channel tracking and amplitude/phase distortion compensation according to various example embodiments of the present invention has been found to enable robust communications at doubly selective channels (time varying and frequency selective channels). For example, extensive simulations have been done for various communications scenarios at very challenging conditions with good or improved performance results, such as but not limited to, UAV (unmanned aerial vehicle), V2V, A2A, and A2G.
  • UAV unmanned aerial vehicle
  • V2V unmanned aerial vehicle
  • A2A A2G
  • the modulated data sequence is divided into multiple blocks (data blocks) of length N and each block is added by a PCP as a prefix with length N c .
  • An additional PCP is also added at the end of a data frame (i.e., to an end of the last block in the data frame).
  • the PCP has a predefined sequence (e.g., a fixed sequence) with length N c .
  • FIG. 6 depicts a schematic representation of an exemplary basic frame structure 600 of the PCP-SC, comprising a plurality of data blocks 602 and a plurality of PCP 604 added thereto, according to various example embodiments of the present invention.
  • the DC power of the signal may not be zero, which may induce errors in signal equalization at the receiver as imperfect hardware devices may create DC errors in the received signal.
  • the power spectrum density (PSD) of the PCP-SC signal may not be smooth due to the periodic occurrence of the PCP block in the time domain signal.
  • PSD power spectrum density
  • various example embodiments of the present invention provide a PSCP-SC structure, which is a further defined or configured version/structure of the PSP-SC structure.
  • a key change/modification in the PSCP-SC structure is that the PCP is interleaved in the data frame (e.g., based on an interleave sequence as described hereinbefore according to various embodiments).
  • interleaving the PCP in the data frame may generally be deemed as going against conventional teachings/understanding in the art (relating to SC- FDE) since doing so would lose the cyclic convolution property associated with PCP-SC.
  • the interleave PCP may appear to cause another potential issue to the receiver whereby at a given processing block, the first N c symbols may be no longer the repetition of the last N c symbols, where N c denotes the length of a PCP block. Therefore, in PSCP-SC, the cyclic convolution property may be deemed lost, while the cyclic convolution property is a major advantage for the PCP-SC to have low complexity frequency domain equalization.
  • PSCP-SC it is desirable for PSCP-SC to have similar low complexity frequency domain equalization.
  • various example embodiments found that, in PSCP-SC, the block structure still has near repetition property, whereby the first N c symbols are either the repetition of the last N c symbols or only a sign change of the last N c symbols. Accordingly, such a finding addresses the above-mentioned potential issue in light of conventional teachings to advantageously enable the implementation of the PSCP-SC according to various example embodiments, against conventional understanding in the art.
  • the modulated data sequence is divided into multiple blocks (data blocks) of length N and each block is added by a PSCP with length N c .
  • the PSCP may be referred to as an interleaved version of the fixed PCP, or in other words, the PSCP sequence is an interleaved PCP.
  • an additional PSCP is also added at the end of a data frame (i.e., to an end of the last block in the data frame).
  • the PSCP sequence may be determined based on the PCP sequence as follows:
  • the interleave sequence p(m ) may be a pseudo-random sequence with elements ‘G or ‘-G.
  • FIG. 7 depicts a schematic representation of an exemplary basic frame structure 700 of the PSCP-SC, comprising a plurality of data blocks 602 and a plurality of PSCP 704 added thereto, according to various example embodiments of the present invention.
  • FIG. 8A depicts a schematic operation flow 800 diagram for a PCP-SC transmitter (without being based on the interleave sequence as described hereinbefore) according to various example embodiments of the present invention.
  • the operation flow 800 includes a scrambling stage/step 802, a coding stage/step 804, an interleave stage/step 806, a symbol mapping stage/step 808, a preamble and pilot insertion stage/step 810, a PCP adding stage/step 812 and an upconvert and low-pass filter stage/step 814.
  • the PCP adding step 812 is configured to cyclically extend each of the plurality of data blocks by inserting, for each of the plurality of data blocks, a PCP to a beginning of the data block, such as described hereinbefore according to various embodiments, and the scrambling step 802, the coding step 804, the interleave step 806, the symbol mapping step 808, the preamble and pilot insertion step 810, the PCP adding step 812 and the upconvert and low -pass filter (LPF) step 814 may be steps or operations known in the art and thus need not be described herein for conciseness and clarity.
  • LPF low -pass filter
  • FIG. 8B depicts a schematic operation flow 830 diagram for a PSCP-SC transmitter (based on the interleave sequence as described hereinbefore) according to various example embodiments of the present invention.
  • the operation flow 830 is the same as the operation flow 800 described above except that the PCP adding step 812 is replaced or modified with a PSCP adding stage/step 822.
  • the PCP adding step 812 is configured to cyclically extend each of the plurality of data blocks by inserting, for each of the plurality of data blocks, a PSCP to a beginning of the data block, such as described hereinbefore according to various embodiments.
  • FIG. 9 depicts a schematic operation flow 900 diagram for a PCP-SC (and/or PSCP-SC) receiver according to various example embodiments of the present invention.
  • the operation flow 900 includes a LPF and downconvert stage/step 902, a timing and frequency synchronization stage/step 904, a channel estimation and tracking stage/step 906, an enhanced equalization stage/step 908, a preamble and pilot removal stage/step 910, a symbol demapper stage/step 912, a deinterleave stage/step 914, a decoding stage/step 916 and a descramble stage/step 918.
  • the channel estimation/tracking step 912 is configured to estimate (or track) a channel, such as described hereinbefore according to various embodiments
  • the enhanced equalization is configured to equalize, for each of the plurality of data blocks received, the received data block based on the cyclic prefix (e.g., PCP or PSCP) of the received data block to obtain a plurality of equalized data blocks (e.g., enhanced equalized data blocks), such as described hereinbefore according to various embodiments.
  • the cyclic prefix e.g., PCP or PSCP
  • the LPF and downconvert step 902, the timing and frequency synchronization step 904, the preamble and pilot removal stage/step 910, the symbol demapper stage/step 912, the deinterleave stage/step 914, the decoding stage/step 916 and the descramble stage/step 918 may be steps or operations known in the art and thus need not be described herein for conciseness and clarity.
  • PSCP-SC is still a single carrier system, thus, the advantage of low peak to average power ratio (PAPR) of single carrier system is advantageously maintained.
  • PAPR peak to average power ratio
  • the power amplifier back-off requirement may be reduced to around 4dB, which is much lower than that for OFDM.
  • PSCP-SC has PSCP blocks distributed over the data frame, which may be used for, e.g., channel tracking and enhanced equalization, resulting in increased data rate and/or improved BER performance.
  • SC-FDE single-frequency division multiplexing
  • the power amplifier can have better efficiency, and the back-off requirement can be reduced to around 3dB. This means that, for the same power amplifier, SC-FDE can output higher power compared to OFDM.
  • a special advantage of the PCP-SC over OFDM is the PCP over CP, where PCP serves as both CP and pilots. Accordingly, the PCP can be used for channel tracking and enhanced equalization, resulting in increased data rate and/or improved BER performance.
  • the baseband received signal may be written as:
  • h(n, l ) denotes the channel
  • e denotes the carrier frequency offset (CFO)
  • q(h) denotes the phase error
  • t denotes the symbol timing error (STO)
  • STO symbol timing error
  • s(n) denotes the transmitted signal
  • w(n ) denotes the noise.
  • the CFO and STO may be estimated by the preamble at the beginning of a data frame.
  • the received signal may then be corrected by the estimated CFO and STO, such as based on techniques known in the art and thus need not be described herein.
  • the preamble may be used to obtain an initial channel estimation of the channel, such as based on techniques known in the art and thus need not be described herein.
  • the corrected received signal may be divided into blocks of length N and the corrected received signal may be equalized block by block.
  • a conventional basic equalization method is the one-tap equalization, which requires two FFTs of length N at each block.
  • the performance of one-tap equalization is severely degraded for channel with high frequency selectivity.
  • various example embodiments provide an equalization method based on the PCP (including PSCP) as described hereinbefore, which has been found to be effective and may herein be referred to as PCP -based (including PSCP-based) enhanced equalization.
  • PCP or PSCP is used to turn the signal input-output relationship (e.g., Equation (4) as will be mentioned later below) into a cyclic convolution or skew-cyclic convolution.
  • PCP or PSCP may also be used for amplitude and phase estimation and compensation.
  • Equalization through Skew-Cyclic Convolution or Cyclic Convolution e.g., corresponding to PSP-based (including PSCP-based) enhanced equalization as described herein according to various embodiments
  • FIG. 10 depicts a schematic representation of a PSCP-SC data structure 1000.
  • the PSCP-SC data structure 1000 includes an extended block 1002 comprising a block (data block) m 1004 and a first PSCP 1006 added to a beginning of the block 1004, as well as a second PSCP 1008 added immediately after the block 1002 (or immediately after the extended data block 1002, which may be the PSCP added to a beginning of the next data block).
  • the received signal is the convolution of the transmitted signal s(n) with a channel h(n ):
  • y(n) x(n + N c )
  • n n
  • PSCP(m-i-l) PSCP(m)
  • the received signal y(n ) is the cyclic convolution of a(n ) and the channel h(n).
  • PSCP(m-i-l) -PSCP(m)
  • various example embodiments of the present invention demonstrate (or prove) that the received signal is the skew-cyclic convolution of a(n ) and the channel h(ri).
  • y(n ) is the skew-cyclic convolution of a(n ) and h(n).
  • the skew-cyclic convolution can be converted to cyclic convolution.
  • the following equation can be derived:
  • the coefficients of Y (ocz) is the cyclic convolution of the coefficients of H(az) and A(az). Based on this, the skew-cyclic convolution can be computed by cyclic convolution with pre- and post-processing.
  • example specific steps for the computation of the skew-cyclic convolution are as follows:
  • Step 1 Compute
  • Step 2 Compute the fast Fourier transform (FFT) (length N ) of h'(n) and a'(n). Denote the FFTs of them as //'(/c) and A'(k), respectively.
  • FFT fast Fourier transform
  • Step 4 Compute the inverse fast Fourier transform (IFFT) of U (/c) and denote the output as u(n );
  • PSCP-SC receiver may also require synchronization and channel estimation/tracking, such as illustrated in the schematic operation flow diagram for a PSCP-SC (including and PCP-SC) receiver as shown in FIG. 9 according to various example embodiments.
  • the PCP -based enhanced equalization for PCP-SC is modified to cater for the skew-cyclic property, resulting in an enhanced equalization for the PSCP-SC.
  • the channel tracking and amplitude/phase compensation for PCP-SC are modified for the PSCP-SC.
  • the propagation channel is in general varying fast and frequency selective.
  • the time varying of the channel may be caused by various factors, such as movement of the transmitter/receiver, changing of the environment, phase noise, residue CFO, and non-stable circuits. Accordingly, in various example embodiments, the channel change is tracked frequently.
  • FIG. 11 depicts a flow diagram of a method 1100 for estimating the phase and amplitude (or phase and amplitude distortions) based on the PCP (which may be referred to as PCP -based amplitude/phase estimation and compensation (PCP-APEC) method) according to various example embodiments.
  • the method 1100 comprises performing (at 1102) equalization using the previous estimated channel; selecting (at 1104) the equalized PCP signal; coherently combining (at 1106) the equalized PCP signal by the true PCP signal (the original PCP sequence); dividing (at 1108) by the power of the true PCP signal.
  • the amplitude and phase estimation steps may be combined according to Equation (15) as will be described later below according to various example embodiments,
  • Equation (15) a specific method for estimating and compensating for the phase and amplitude based on the PCP will now be described below by way of an example only and without limitation.
  • the received signal may first be equalized based on the previously estimated channel (i.e., the channel estimated in the immediately previous block).
  • the signal compensation according to various example embodiments is shown in Equation (16) as will be described later below.
  • the equalization may be performed block by block, thus according to various example embodiments, only the estimation and compensation at any particular block is considered or performed. Due to the change of channel state, the recovered data may differ from the original data that is transmitted. In a given block, the recovered data may be expressed approximately as:
  • s(n) denotes the original data including PCP
  • s(n) denotes the equalized data
  • a(n) denote the amplitude distortion
  • d(h) denotes the phase distortion.
  • the PCP is used to estimate the amplitude and phase distortions.
  • the amplitude and phase together may be estimated as:
  • Equation (15) above may correspond to the amplitude and phase estimation as described herein according to various embodiments
  • Equation (16) may correspond to the amplitude and phase compensation as described herein according to various embodiments.
  • FIG. 12 depicts a flow diagram of a method 1200 for estimating (tracking) the channel block by block according to various example embodiments.
  • the method 1200 comprises performing (at 1202) equalization using the previous estimated channel; cancelling (at 1204) interference from data symbols in the received signal; averaging (at 1206) signals from multiple blocks; estimating (1208) the channel using the PCP; and combining (at 1210) the current estimated channel with the previous estimated channel(the immediately previous estimated channel, i.e., the estimated channel in the immediately previous block).
  • the method 1200 comprises performing (at 1202) equalization using the previous estimated channel; cancelling (at 1204) interference from data symbols in the received signal; averaging (at 1206) signals from multiple blocks; estimating (1208) the channel using the PCP; and combining (at 1210) the current estimated channel with the previous estimated channel(the immediately previous estimated channel, i.e., the estimated channel in the immediately previous block).
  • one simple way may be to use the pilot symbols to find the current frequency-domain channel at the particular frequencies (corresponding to the pilot subcarrier frequencies). Then interpolation may be used to find the frequency-domain channel at other frequencies.
  • interpolation may be used to find the frequency-domain channel at other frequencies.
  • additional pilot symbols that reduce data rate.
  • PCP-SC PCP-based decision feedback channel estimation
  • the PCP at every block and decision feedback are used to track the channel change.
  • an initial channel estimation is found by the preambles at the beginning of a data frame.
  • Let // 0 (/c) denote the frequency domain initial channel estimation.
  • the channel may change with time.
  • // ; (/c) denote the frequency domain channel at block l.
  • Xi ( n ) denote the received signal at block l and the discrete Fourier transform (DFT) of Xi(n) be denoted by A ( (/c) .
  • DFT discrete Fourier transform
  • a ( (/c) the channel -iOfc)
  • the channel -iOfc) may be used to give a coarse estimation of the transmitted signal.
  • the one-tap equalization or the PCP-based enhanced equalization may be used for this purpose.
  • the amplitude/phase estimation and compensation as described hereinbefore may be applied.
  • s ; (n) denote the recovered data symbols after the above-mentioned equalization and amplitude/phase compensation.
  • the estimated signals s ; (n) and the PCP may then be used to determine (e.g., update) the channel estimation.
  • Lor example let s L and s be two vectors of length N defined as follows:
  • s is a pre-determined constant vector and known to the receiver.
  • DPT of Xi(ri) may approximately be:
  • X l // ; 0FFT(s ; ) + HiQ FFT(s) + W l (19) where O denotes the element-by-element multiplication, and IT) denotes the LPT of the noise.
  • the channel estimation at the previous block may be used to cancel the interference and obtain: HiQ FFT(s) * X t - // ⁇ iOFFTCs - W t (20)
  • Equation (20) an estimation for may be obtained as follows:
  • the outputs on a number of previous blocks may be averaged. For example, the following may be computed:
  • g v is a weight.
  • q is related to changing rate of the channel, and the above-mentioned number of previous blocks may be determined accordingly. If H v does not change much for different v , then the following approximation may be obtained:
  • An estimation for the frequency domain channel at block, H may be obtained as follows:
  • the weight g v is adapted to the Doppler frequency.
  • the current estimated channel (Hi) and the previously estimated channel (// i-1 ) may be combined based on a weight (g) as shown in Equation (25) below as an example only and the resultant estimated channel (Hi) may then be used for the equalization of the next or subsequent block (e.g., the immediately subsequent block).
  • FFT(s) is divided to obtain the frequency domain channel Hi (Equation (21)).
  • s is chosen or determined according to various example embodiments such that the elements of FFT(s) have least variations in their powers.
  • a particular or most suitable PCP block v(n), n 0,1, ... , N C — 1, is specifically selected for minimizing the channel estimation error.
  • two basic requirements for the PCP may be:
  • various example embodiments may advantageously implement channel tracking (e.g., as described with reference to FIG. 12), and for example, the PCP-based channel tracking as described hereinbefore has been found to be effective. Under such conditions, differential modulation such as DQPSK does not work better than the conventional QPSK. For static or flat-fading channel, employment amplitude/phase estimation and compensation may be sufficient, and for example, the PCP-based amplitude/phase estimation and compensation as described hereinbefore may be implemented without sacrificing additional bandwidth.
  • various example embodiments may implement the PCP-based enhanced equalization as described hereinbefore, which has been found to advantageously boost BER performance considerably compared to the conventional one-tap equalization.
  • various example embodiments of the present invention provide a method of tracking and equalising channel for a cyclic prefixed single carrier (CP-SC) based communication system.
  • the system may comprise a PSCP-SC transmitter and a PSCP-SC receiver.
  • the PSCP-SC waveform and transmitter comprises a pilot cyclic prefix (PCP) interleaved across a data frame to generate a constant data sequence (e.g., corresponding to the PSCP as described hereinbefore); whereby the modulated data sequence is divided into blocks of length N and each block is added by a PCP as a prefix with length N_c, as well as an additional PCP being added at the end of the data frame.
  • PCP is a fixed sequence with length N_c.
  • the PSCP-SC receiver comprises a channel tracker and equalizer.
  • the channel tracker and equalizer being configured to discard the first PSCP frame from the data frame structure, divide the data frame into block lengths of N + N c , perform DFT, and recover the data symbols by cyclic convolution or by skew- cyclic convolution depending on the interleaved sequence (e.g., depending on the type (e.g., first type or second type) of the cyclic prefix of the data block).
  • the channel tracker and equalizer may be configured to perform the data symbol recovering function.
  • the DC of the PSCP-SC signal is virtually zero, and hence robust to DC error.
  • the DC value of PSCP-SC may be reduced by over 90% compared with PCP-SC, and has a smoother PSD that reduces out-of-band emission.
  • the PSCP-SC receiver further comprises a PCP -based amplitude/phase estimation and compensation (PCP-APEC) module.
  • PCP-APEC PCP -based amplitude/phase estimation and compensation
  • the PCP-APEC module being configured to equalize the received signal using an estimated channel, and combine coherently the equalized PCP signal by the true PCP signal.
  • the PSCP-SC receiver further comprises a PCP -based decision feedback channel estimation module.
  • the PCP-based decision feedback channel estimation module being configured to equalize the received signal using a previous estimated channel, cancel the interference from data symbols in the received signal, obtain the signal average from the multiple blocks, estimate the channel using PCP, and combine current estimated channel with previous estimated channels.

Abstract

L'invention concerne un procédé de transmission de données sur la base d'une communication sans fil à porteuse unique. Le procédé consiste à : produire une pluralité de blocs de données sur la base d'une donnée d'entrée, chaque bloc de données comprenant une séquence de blocs de données ; étendre cycliquement chaque bloc de la pluralité de blocs de données, comprenant l'insertion, pour chaque bloc de données de la pluralité de blocs de données, d'un préfixe cyclique au début du bloc de données pour produire une pluralité de blocs de données étendus, le préfixe cyclique comprenant une séquence de préfixe cyclique ; et combiner la pluralité de blocs de données étendus pour produire une trame de données pour la transmission, la trame de données comprenant une séquence de trames de données. En particulier, la séquence de préfixe cyclique est une séquence prédéfinie. L'invention concerne également un procédé correspondant de réception de données sur la base d'une communication sans fil à porteuse unique et d'un émetteur et d'un récepteur correspondants.
PCT/SG2019/050186 2018-03-29 2019-03-29 Communication sans fil à porteuse unique WO2019190410A1 (fr)

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