WO2019185846A1

WO2019185846A1 - X-ray radiation detector with a porous silicon interposer

Info

Publication number: WO2019185846A1
Application number: PCT/EP2019/057948
Authority: WO
Inventors: Marc Anthony CHAPPO
Original assignee: Koninklijke Philips N.V.
Priority date: 2018-03-29
Filing date: 2019-03-28
Publication date: 2019-10-03

Abstract

A radiation detector (114) of an imaging system (100) includes a first detection layer (116), electronics (120), and a porous silicon interposer (118) disposed between the first detection layer and the electronics. The porous silicon interposer is in electrical communication with the first detection layer and the electronics and provides an electrical pathway between a first pixel of the first detection layer and the electronics through the electrical communication. An imaging system (100) includes a radiation source (110) configured to emit X-ray radiation, a detector array (112) configured to detect X-ray radiation and generate an electrical signal indicative thereof, and a reconstructor (124) configured to process the electrical signal to generate an image. The detector array includes a radiation detector with at least one detection layer, electronics, and a porous silicon interposer. The porous silicon interposer is configured to route an electrical signal produced by the at least one detection layer in response to detecting radiation to the electronics.

Description

X-RAY RADIATION DETECTOR WITH A POROUS SILICON INTERPOSER

FIELD OF THE INVENTION

The following generally relates to imaging and more particular to an X-ray radiation detector with a porous silicon (pSi) interposer, and is described with particular application to computed tomography (CT) imaging, and is also amenable to other

applications with multiple layers of electronic circuitry.

BACKGROUND OF THE INVENTION

Computed tomography (CT) imaging systems have include single and multi- (e.g., dual) layer X-ray radiation detectors in a detector module. Multi-layer X-ray radiation detectors provide the ability to implement spectral CT detectors by utilizing different energy absorbing materials sometimes stacked on top of each other. With single and multi-layer X- ray radiation detectors, the detection layer(s) is often coupled to a substrate, and detection signals are routed from the detection layer(s) to conversion circuitry through or around the substrate.

However, the ability to route the detection signals as such has been limited to through-hole-via’s (THV’s) in the substrate and a flex interconnect that routes detection signals around the substrate. Unfortunately, THV’s, due to their aspect ratio limitations and relatively large area, limit the density (pitch) of the electrical pathways (and thus are not well- suited for high definition applications) and increase detector cost, and a flex interconnect sacrifices additional geometric detection efficiency of the detector by increasing the space between active detection areas of the pixels.

SUMMARY OF THE INVENTION

Aspects described herein address the above-referenced problems and others.

In one aspect, a radiation detector of an imaging system includes a first detection layer, electronics, and a porous silicon interposer disposed between the first detection layer and the electronics. The porous silicon interposer is in electrical

communication with the first detection layer and the electronics and provides an electrical pathway between a first pixel of the first detection layer and the electronics through the electrical communication.

In another aspect, an interposer includes a porous silicon bulk material. The porous silicon bulk material includes columns of silicon and columnar holes. The columns of silicon are interlaced with the columnar holes. A first set of the columnar holes includes an an electrically conductive material. A second different set of the columnar holes include an electrically insulative material.

In another aspect, a method includes detecting first radiation with a first detection layer, converting the detected first radiation to a first electrical signal, routing the first electrical signal to electronics through a porous silicon interposer disposed between the first detection layer and the electronics, and routing the first electrical signal from the electronics to a processing device.

Still further aspects of the present invention will be appreciated to those of ordinary skill in the art upon reading and understanding the following detailed description.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention may take form in various components and arrangements of components, and in various steps and arrangements of steps. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention.

FIGETRE 1 schematically illustrates an example CT imaging system with a radiation detector with a porous silicon (pSi) interposer.

FIGETRE 2 schematically illustrates an example of the pSi interposer of

FIGURE 1.

FIGURE 3 schematically illustrates an example of routing an electrical signal from an upper detection layer through a lower detection layer and to the pSi interposer of FIGURE 1.

FIGURE 4 schematically illustrates another example of routing an electrical signal from an upper detection layer through a lower detection layer and to the pSi interposer of FIGURE 1.

FIGURE 5 illustrates an example method in accordance with an embodiment(s) herein

FIGURE 6 illustrates another example method in accordance with an embodiment(s) herein DETAILED DESCRIPTION OF EMBODIMENTS

The following generally relates to a porous silicon (pSi) interposer for routing signals of multiple layers of electronic circuitry. The pSi interposer includes porous silicon (pSi) bulk material with an electrically conductive material in some of the pores and an electrically insulative material in other of the pores. In one non-limiting instance, the electrically conductive material includes electrically conductive QD nanoparticles and/or the electrically insulative material includes electrically insulative QD nanoparticles. The pores with the electrically conductive material provide electrically conductive pathways between multiple layers of electronic circuitry. An example of suitable QD nanoparticles is described in application serial number EP 14186022.1, entitled“Encapsulated materials in porous particles,” and fded on September 23, 2014, the entirety of which is incorporated herein by reference.

FIGETRE 1 schematically illustrates an example imaging system 100 such as a computed tomography (CT) system configured for spectral and/or non-spectral imaging. The imaging system 100 includes a stationary gantry 102 and a rotating gantry 104, which is rotatably supported by the stationary gantry 102. The rotating gantry 104 rotates around an examination region 106 about a longitudinal or z-axis 108. A radiation source 110, such as an x-ray tube, is supported by the rotating gantry 104, rotates therewith, and generates and emits X-ray radiation.

A radiation sensitive detector array 112 includes one or more rows detectors arranged parallel to each other along the z-axis 108 direction, each row including a plurality of detectors 114 extending transverse to the z-axis 108 direction. The detectors 114 detect X- ray radiation traversing the examination region 106 and generate electrical signals (projection data) indicative thereof. At least one of the detectors 114 includes one or more detection layers 116i, . . ., 116_N, where N is a positive integer equal to or greater than one (collectively referred to here as detection layer(s) 116), a pSi interposer 118, and electronics 120.

In one instance, the detection layer(s) 116 includes an indirect conversion (e.g., a scintillator / photosensor pair) detector. In another instance, the detection layer(s) 116 includes a direction conversion detector. Examples of pSi based scintillator / photosensor and direction conversion detection layers are described in patent application serial number 62/202,397, filed August 7, 2015, and entitled“Quantum Dot Based Imaging Detector,” and patent application serial number 62/312,083, filed March 23, 2016, and entitled“Radiation Detector Scintillator with an Integral Through-Hole Interconnect,” the entireties of both are incorporated herein by reference. The pSi interposer 118 electrically connects the detection layer(s) 116 and the electronics 120. As described in greater detail below, the pSi interposer 118 includes a porous silicon (pSi) membrane or other suitable materials in which some of the pores are fdled with an electrically insulative material (e.g., insulative QD’s or other insulative material such as silicon dioxide) and other pores are fdled with an electrically conductive material (e.g., QD’s), which provide electrical pathways to route electrical signals from the detection layer(s) 116 to the electronics 120. In one instance, the pSi interposer 118 is configured with fine pitch dense electrical pathways, which is finer than the pitch achievable with THVs and less expensive and/or does not sacrifice geometric detection efficiency like a flex

interconnect, which increases the non-detection areas between detectors. In another instance, the pSi interposer 118 has a density of electrical pathways achievable using THVs or flex interconnects, but is less expensive and provides a more reliable interconnect.

The electronics 120 include an integrated circuit (IC), an application specific integrated circuit (ASIC) or the like. In one instance, the electronics 120 include circuitry configured to route the electrical signals off the radiation sensitive detector array 112. In another instance, the electronics 120 include circuitry configured to process the electrical signals and route the raw (unprocessed) electrical signals and/or the processed electrical signals off the radiation sensitive detector array 112. In the illustrated example, the unprocessed and/or processed electrical signals are routed for reconstruction.

A subject support 122, such as a couch, supports an object or subject in the examination region 106. A reconstructor 124 reconstructs the electrical signals with one or more reconstruction algorithms. A computing system serves as an operator console 126 and includes a human readable output device such as a display, an input device such as a keyboard, mouse, and/or the like, one or more processors and computer readable storage medium. Software resident on the console 126 allows an operator to control an operation of the imaging system 100.

FIGURE 2 schematically illustrates a side view of a sub-portion of the pSi interposer 118 for a pixel. In the below example, for sake of brevity and explanatory purpose, the electrically conductive material includes electrically conductive QD’s and the electrically insulative material includes electrically insulative QD’s. However, it is to be understood that in some embodiments other electrically conductive material and/or other electrically insulative material are utilized.

The example pSi interposer 118 includes bulk pSi 202 with a plurality of columns of Si 204 interlaced with a plurality of pores (columnar holes) 206, which extend entirely through the bulk pSi 202. The pores 206, except for at least one pore (e.g., a pore 206 at 208 in the illustrated example), are filled with electrically insulative (electrically non- conductive) QD’s (NC-QD’s) 210. The pore 206 at 208 is filled with electrically conductive QD’s (C-QD’s) 216. In a variation, more than one pore is filled with the C-QD’s.

A height 218 of the bulk pSi 202, and hence, heights of the plurality of columns of Si 204, and the plurality of pores 206 is on the order of tens to hundreds of microns. The plurality of columns of Si 204 have widths 220 on an order of sub-microns to microns, and the plurality of pores 206 have widths 222 on an order of sub-microns to microns. In one instance, the example pSi interposer 118 is fabricated with standard processes, which minimize cost, with feature sizes in the sub-micron to micron range, which can overcome density (pitch) issues, such as those associated with THV’s.

The example pSi interposer 118 further includes an insulating layer 224 with the NC-QD’s 208 and at least one hole 226, which is located above the pore 206 at 208 filled with the C-QD’s 216. Generally, there will be a same number of holes 226 as there are pores 206 filled with the C-QD’s 216, with a different hole 226 over each pore 206 filled with the C-QD’s 216. A combination of the C-QD’s 216 in the pore 206 at 208 and in the hole 226 provide an electrically conductive pathway entirely through the combination of the bulk pSi 202 and the insulating layer 224. A height 228 of the insulating layer 224 is on an order of tens to hundreds of microns.

The example pSi interposer 118 further includes a top contact 230, which includes an electrically conductive material 232. The electrically conductive material 232 is in electrical communication with the C-QD’s 216 in the hole 226. The illustrated example includes a gap 234 at an end of the electrically conductive material 232. The gap 234 includes an electrical insulator such as air or a filler such as an insulative material. The gap 234 insulates the electrically conductive material 232 for the pixel from a neighboring electrically conductive material of another pixel. In one instance, the gap 234 is located at least in part in the interstice between the pair of neighboring pixels.

For a configuration with a single detection layer 116 (e.g., detection layer 116i), each pixel of the detection layer 116 is electrically connected to a different electrically conductive material 232 of the pSi interposer 118. For a configuration with two or more stacked detection layers 116, the pSi interposer 118 includes similar electrical connections for the upper detection layer(s) 116 (e.g., the detection layer 116₂ - 116N). In one instance, the signals from an upper detection layer 116 are routed to the pSi interposer 118 through pixel borders of an intermediate detection layer(s) 116 disposed between the upper detection layer 116 and the pSi interposer 118.

An example of such a routing is shown in FIGURE 3, which shows an exploded view of a dual-layer configuration of the detector 114. An upper detection layer 1162 includes a pixel 302 with a trace 304 that routes electrical signals from a pixel contact 306 to an edge contact 308. The edge contact 308 electrically contacts an electrically conductive pathway 310 (e.g., a via) in a boundary of a pixel 314 in a lower detection layer 1161. The electrically conductive pathway 310 electrically connects the edge contact 308 to the pSi interposer 118.

In FIGURE 3, the electrically conductive pathway 310 is disposed in an outer wall of the pixel 314. In a variation, the electrically conductive pathway 310 is disposed in an inner wall 316 in the interstices between pixels 314 and 318, or another inner wall.

Routing through pixel walls as such is further described in patent application serial number 62/412,876, filed October 26, 2016, and entitled“Nano-Material Imaging Detector with an Imaging Detector with an Integral Pixel Border,” which is incorporated herein by reference in its entirety.

A variation of FIGURE 3 is shown in FIGURE 4. In this example, the pixel wall 312 of the pixel 314 of the lower detection layer 1161 includes a plurality of electrically insulating QD’s (shown in solid white) and at least one column 402 of electrically conducting QD’s (shown with a dotted pattern). In this example, the column 402 of electrically conducting QD’s provides an electrically conductive pathway that electrically connects the edge contact 308 (FIGURE 3) to the pSi interposer 118 (FIGURE 3).

In FIGURE 4, the column 402 of electrically conducting QD’s is disposed in an outer wall of the pixel 314. In a variation, the column 402 of electrically conducting QD’s is disposed in the inner wall 316 or another inner wall. A pixel wall with QD’s in its border is further described in patent application serial number 62/312,083, filed March 23, 2016, and entitled“Nano-Material Imaging Detector with an Integral Pixel Border,” which is incorporated herein by reference in its entirety.

In a variation, the configuration described in connection with FIGURE 1 includes at least one additional pSi interposer 118 disposed between at least one pair of the detection layers 116. In another variation, the configuration described in connection with FIGURE 1 includes at least one additional pSi interposer 118 below the electronics 120. In yet another variation, the configuration described in connection with FIGURE 1 includes both the at least one additional pSi interposer 118 between the at least one pair of the detection layers 116 and the at least one additional pSi interposer 118 below the electronics 120.

As discussed herein, the pSi interposer 118 can be used to route signals of multiple layers of electronic circuitry, including for the radiation sensitive detector array 112 and/or other applications including multiple layers of electronic circuitry. For example, another application of the pSi interposer (e.g., with QDs) is in stacked silicon or substrate electronic modules which commonly have processors on one layer and memory and interface modules on stacked layers. Memory density is achieved by stacking layers of memory module atop of each other requiring fine pitch interconnect between those layers. The physical size of those layers drives cost and performance (speed) of the stacked module. A QD pSi interposer can achieve pitches of tens of microns through both thinner and thicker Si substrates than TSVs in use today and much finer than printed circuit substrates or external flex circuitry connections aside the module. Thus, the module cost is reduced by introducing this standard Si process interposer and the signal paths between layers can be minimized yielding faster speeds and performance of the stacked module systems.

At 502, a pixel of a detection layer of the detector layers 116 absorbs X-ray radiation and produces an electrical signal indicative thereof.

At 504, the detection layer routes the electrical signal to the pSi interposer

118.

At 506, the pSi interposer 118 routes the electrical signal to the electronics

120.

At 508, the electronics 120 routes the electrical signal (and/or a processed electrical signal) off the detector 114.

At 510, the electrical signal is processed to generate an image or otherwise processed.

FIGURE 6 illustrates an example method in accordance with another embodiment(s) herein

At 602, a pixel of an upper detection layer of the detector layers 116 absorbs X-ray radiation and produces an electrical signal indicative thereof.

At 604, the upper detector layer routes the electrical signal to an electrical pathway in a wall(s) of a pixel(s) extending through a lower detector(s) to the pSi interposer At 606, the electrical pathway routes the electrical signal to the pSi interposer

118.

At 608, the pSi interposer 118 routes the electrical signal to the electronics

120.

At 610, the electronics 120 routes the electrical signal (and/or a processed electrical signal) off the detector 114.

At 612, the electrical signal is processed to generate an image or otherwise processed.

While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive; the invention is not limited to the disclosed embodiments. Other variations to the disclosed embodiments can be understood and affected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims.

In the claims, the word“comprising” does not exclude other elements or steps, and the indefinite article“a” or“an” does not exclude a plurality. A single processor or other unit may fulfill the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measured cannot be used to advantage.

A computer program may be stored/distributed on a suitable medium, such as an optical storage medium or a solid-state medium supplied together with or as part of other hardware, but may also be distributed in other forms, such as via the Internet or other wired or wireless telecommunication systems. Any reference signs in the claims should not be construed as limiting the scope.

Claims

CLAIMS:

1. A radiation detector (114) of an imaging system (100), comprising:

a first detection layer (116);

electronics (120); and

a porous silicon interposer (118) disposed between the first detection layer and the electronics,

wherein the porous silicon interposer is in electrical communication with the first detection layer and the electronics and provides an electrical pathway between a first pixel of the first detection layer and the electronics through the electrical communication.

2. The radiation detector of claim 1, wherein the porous silicon interposer comprises:

porous silicon bulk material (202) with columns of silicon (204) interlaced with pores (206), wherein at least one of the pores is filled with an electrically conductive material, and other pores are filled with an electrically insulative material.

3. The radiation detector of claim 2, wherein the electrically insulative material includes electrically insulative quantum dots, and the electrically conductive material includes electrically conductive quantum dots.

4. The radiation detector of any of claims 2 to 3, wherein the electrical pathway comprises the at least one of the pores filled with the electrically conductive material.

5. The radiation detector of any of claims 1 to 4, wherein first detection layer includes an indirect conversion detector.

6. The radiation detector of any of claims 1 to 4, wherein first detection layer includes a direct conversion detector.

7. The radiation detector of any of claims 1 to 6, wherein the first detection layer includes a pixel boundary with an electrically conductive pathway, and further comprising: a second detection layer, wherein the first detection layer is between the second detection layer and the porous silicon interposer,

wherein second detection layer is in electrical communication with the electrically conductive pathway and is in electrical communication with the porous silicon interposer through the electrically conductive pathway.

8. The radiation detector of claim 7, wherein the electrically conductive pathway is a through-hole via.

9. The radiation detector of claim 7, wherein the electrically conductive pathway includes a column of an electrically conductive material.

10. A computed tomography detector including at least one radiation detector described in claims 1-9.

11. An interposer (100), comprising :

porous silicon bulk material, including:

columns of silicon; and

columnar holes interlaced with the columns of silicon,

wherein a first set of the columnar holes includes an an electrically conductive material, and a second different set of the columnar holes include an electrically insulative material.

12. The interposer of claim 11, wherein the electrically conductive material includes electrically conductive quantum dots.

13. The interposer of any of claims 11 to 12, wherein the electrically insulative material includes electrically insulative quantum dots.

14. The interposer of any of claims 11 to 13, wherein a columnar hole with electrically conductive material and the electrically conductive material in the columnar hole extends entirely through the porous silicon bulk material.

15. The interposer of any of claims 11 to 14, wherein a columnar hole with the electrically conductive material has a width on an order of sub-microns to microns.

16. The interposer of any of claims 11 to 14, wherein the porous silicon bulk material has a height on an order of tens to hundreds of microns.

17. A method, comprising:

detecting first radiation with a first detection layer;

converting the detected first radiation to a first electrical signal; routing the first electrical signal to electronics through a porous silicon interposer disposed between the first detection layer and the electronics; and

routing the first electrical signal from the electronics to a processing device.

18. The method of claim 17, further comprising:

detecting second radiation with a second detection layer, wherein the first radiation detection layer is between the second detection layer and the porous silicon interposer;

converting the detected second radiation to a second electrical signal;

routing the second electrical signal to the porous silicon interposer through an electrical path in a boundary of a pixel of the first detection layer;

routing the second electrical signal to the electronics through the porous silicon interposer; and

routing the second electrical signal from the electronics to the processing device.

19. The method of any of claims 17 to 18, wherein the processing device generates images.

20. The method of any of claims 17 to 19, wherein the porous silicon interposer includes porous silicon bulk material with columns of silicon interlaced with pores, and a pore is filled with electrically conductive quantum dots, and further comprising routing signals from the porous silicon interposer to the electronics through the pore filled with electrically conductive quantum dots.