WO2019167620A1 - Optical arithmetic unit - Google Patents

Optical arithmetic unit Download PDF

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Publication number
WO2019167620A1
WO2019167620A1 PCT/JP2019/005021 JP2019005021W WO2019167620A1 WO 2019167620 A1 WO2019167620 A1 WO 2019167620A1 JP 2019005021 W JP2019005021 W JP 2019005021W WO 2019167620 A1 WO2019167620 A1 WO 2019167620A1
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Prior art keywords
optical
light
output
input
elements
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PCT/JP2019/005021
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French (fr)
Japanese (ja)
Inventor
翔太 北
新家 昭彦
納富 雅也
謙悟 野崎
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日本電信電話株式会社
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Priority claimed from JP2018156024A external-priority patent/JP6871206B2/en
Application filed by 日本電信電話株式会社 filed Critical 日本電信電話株式会社
Priority to US16/976,866 priority Critical patent/US20200408989A1/en
Publication of WO2019167620A1 publication Critical patent/WO2019167620A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122Basic optical elements, e.g. light-guiding paths
    • G02B6/125Bends, branchings or intersections
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F3/00Optical logic elements; Optical bistable devices
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F7/00Optical analogue/digital converters

Definitions

  • the present invention relates to an optical computing unit such as an optical digital-to-analog converter (DAC) using an optical circuit.
  • an optical computing unit such as an optical digital-to-analog converter (DAC) using an optical circuit.
  • DAC optical digital-to-analog converter
  • DACs digital-to-analog converters
  • performances such as sampling rate, resolution, power consumption, and size are different.
  • the current situation is that different types of DACs are used depending on the application target.
  • the sampling rate is about 1 GS / s
  • the resolution is 16 bits or more.
  • higher speed, higher resolution, lower power consumption, and smaller DACs are expected.
  • the latency (delay) required for a high-resolution DAC is expected to become a future bottleneck.
  • Non-Patent Document 1 As a DAC that can meet the above requirements, an optical DAC using an optical circuit has been proposed (see Non-Patent Document 1). However, since some conventional optical DACs are operated by an electric circuit, there is a problem that the speed is limited by the electric circuit, and there is a problem that an enormous element and circuit scale are required. It was.
  • the present invention has been made to solve the above-described problems, and an object thereof is to provide an optical computing unit that can be mounted at high speed and high density.
  • the optical computing unit of the present invention includes a 2-input 1-output first Y merging element that receives 1 to 2 signal lights as input, and a 2-input 2-output Y merging / Y that receives 1 to 2 signal lights as inputs.
  • At least one of the branch elements is cascade-connected (N is an integer equal to or greater than 2), and the first of the two optical input ports of each of the N elements connected in cascade has no input light.
  • the continuous light to the second optical input port different from the first optical input port to which the signal light from the optical input port or the optical output port of the previous stage element is input is a corresponding bit of the N-bit electric digital signal, respectively.
  • N optical modulators that individually modulate in response to the signal and generate the signal light to the second optical input port, and output light obtained from the last-stage element is used as a calculation result. To do.
  • one configuration example of the optical computing unit of the present invention includes N first Y merge elements, and the N first Y merge elements exclude the first Y merge element at the most upstream.
  • N-1 first Y confluence elements use the light output from the light output port of the upstream first Y confluence element as input light to the first light input port, and the most upstream N first Y merging elements including the first Y merging elements are cascaded so that the signal light modulated by the N optical modulators is input to the second optical input port.
  • the N optical modulators individually modulate the N light beams having the same wavelength according to the corresponding bits of the N-bit electric digital signal, respectively.
  • the signal light to the second optical input port is generated and the output light obtained from the first Y junction element at the final stage is N bits. Is characterized in that the result of digital-analog operation.
  • one configuration example of the optical computing unit of the present invention includes (N ⁇ 1) Y-merging / Y-branching elements and one first Y-merging element, and these (N ⁇ 1) elements.
  • the Y merge / Y branch element and one first Y merge element are the (N-2) Y merge / Y branch elements and one first Y merge element excluding the most upstream Y merge / Y branch element.
  • the Y merge element of the upstream is the light output from the first optical output port of the upstream Y merge / Y branch element as the input light to the first optical input port, and the most upstream Y merge / Y branch (N-1) Y combining / Y branching elements including one element and one first Y combining element receive the signal light modulated by the N optical modulators in the second optical input port.
  • the N optical modulators respectively connect N continuous lights of the same wavelength to N-bit electric digital signals.
  • the output light obtained from the optical output port and the output light obtained from the first Y-merging element at the final stage are used as the result of 1 to N-bit digital / analog computation.
  • one configuration example of the optical computing unit of the present invention includes N Y merging / Y branching elements, and these N Y merging / Y branching elements exclude the most upstream Y merging / Y branching element.
  • N-1 Y merging / Y branching elements use the light output from the first optical output port of the upstream Y merging / Y branching element as the input light to the first optical input port, and
  • the N Y merge / Y branch elements including the most upstream Y merge / Y branch element use the signal light modulated by the N optical modulators as input light to the second optical input port.
  • the N optical modulators individually modulate N continuous light beams having the same wavelength in accordance with corresponding bits of the N-bit electric digital signal, respectively. Generates signal light to the second optical input port of the Y-branch element, and the cascaded 2-input 1-output (N ⁇ ) Second Y-merging elements, and the first optical output port for outputting the signal light to the Y-merging / Y-branching element at the subsequent stage among the two optical output ports of the Y-merging / Y-branching element at the first stage.
  • the signal light obtained from the second optical output port different from the optical output port is input to the first optical input port of the second Y junction element at the first stage, and the (k ⁇ 1) -th stage (k is 2 to 2).
  • the signal light obtained from the optical output port of the second Y-merging element is input to the first optical input port of the k-th second Y-merging element, j + 1) signal light obtained from the second optical output port of the Y-combining / Y-branching element at the j-th stage (j is an integer from 1 to (N-1))
  • Output light obtained from the first optical output port of the Y-merging / Y-branching element at the final stage is input to the second optical input port of the N-bit digital - as a result of analog operation, an output light obtained from the second Y-combining device in the final stage is characterized in that the result of the N-bit counter operation.
  • one configuration example of the optical computing unit of the present invention includes N first Y merge elements, and the N first Y merge elements exclude the first Y merge element at the most upstream.
  • N-1 first Y confluence elements use the light output from the light output port of the upstream first Y confluence element as input light to the first light input port, and the most upstream N first Y merging elements including the first Y merging elements are cascaded so that the signal light modulated by the N optical modulators is input to the second optical input port.
  • each of the N Y branch elements except for the most upstream Y branch element that receives a single continuous light, is provided with N Y branch elements having one input and two outputs.
  • the light output from the first optical output port is connected in cascade to be input,
  • the output light obtained from the second optical output port of these N Y branch elements is used as the input light to the N optical modulators, and the output obtained from the first Y confluence element in the final stage.
  • the light is the result of N-bit digital / analog operation.
  • At least one of the first Y merging elements or at least one of the Y merging elements constituting the Y merging / Y branching element is:
  • a bias port to which a fixed intensity bias light is input is provided.
  • the output light obtained from the last stage element is used as the input light to the first optical input port, and the fixed intensity bias light is used as the second light.
  • a Y-merging element serving as input light to the input port is provided, and output light obtained from the Y-merging element is used as a result of N-bit digital / analog computation.
  • the optical modulator is a light intensity modulator.
  • the optical modulator is an optical phase modulator, and further includes a coherent detection unit that extracts an electric signal after digital-analog conversion, and the coherent detection unit includes: A phase shifter that can be adjusted so that a phase difference between the output light resulting from the N-bit digital / analog operation and the reference light having the same wavelength as that of the output light is ⁇ / 2, and the N-bit digital A coupler that combines the output light that is the result of the analog operation and the reference light and divides the output light into two equal parts, a first photodetector that converts one output light of the coupler into an electrical signal, A second photodetector for converting the other output light into an electrical signal, and a subtractor for obtaining a difference between the two electrical signals output from the first and second photodetectors. Is.
  • a 2-input 1-output first Y-merging element that receives 1 to 2 signal lights as an input and a 2-input 2-output Y-merging / Y-branch element that receives 1 to 2 signal lights as inputs.
  • a 2-input 1-output first Y-merging element that receives 1 to 2 signal lights as an input
  • a 2-input 2-output Y-merging / Y-branch element that receives 1 to 2 signal lights as inputs.
  • FIG. 1 is a block diagram showing a configuration of an N-bit optical DAC according to the first embodiment of the present invention.
  • FIG. 2 is a diagram showing input / output characteristics of the N-bit optical DAC according to the first embodiment of the present invention.
  • FIG. 3 is a block diagram showing a configuration of an N-bit optical DAC according to the second embodiment of the present invention.
  • FIG. 4 is a diagram showing input / output characteristics of the N-bit optical DAC according to the second embodiment of the present invention.
  • FIG. 5 is a block diagram showing a configuration of an N-bit optical DAC according to the third embodiment of the present invention.
  • FIG. 6 is a diagram showing input / output characteristics of an N-bit optical DAC according to the third embodiment of the present invention.
  • FIG. 1 is a block diagram showing a configuration of an N-bit optical DAC according to the first embodiment of the present invention.
  • FIG. 2 is a diagram showing input / output characteristics of the N-bit optical DAC according to the first embodiment of
  • FIG. 11 is a plan view showing another configuration of the Y-merging element with a bias port of the N-bit optical DAC according to the fourth embodiment of the present invention.
  • FIG. 12 is a diagram showing input / output characteristics of an N-bit optical DAC according to the fourth embodiment of the present invention.
  • FIG. 13 is a block diagram showing a configuration of an N-bit optical DAC according to the fifth embodiment of the present invention.
  • FIG. 14 is a block diagram showing a configuration of an N-bit optical DAC according to the sixth embodiment of the present invention.
  • FIG. 15 is a diagram illustrating the relationship between the number of bits and the operation loss of the optical DAC.
  • FIG. 16 is a diagram showing a specific configuration pattern for actually operating the optical DAC of FIG. FIG.
  • FIG. 17 is a block diagram showing a configuration of an optical DAC to be simulated in the sixth embodiment of the present invention.
  • FIG. 18 is a diagram illustrating a result of obtaining a temporal change in the optical signal intensity of each bit in the configuration of FIG. 17 by simulation.
  • FIG. 19 is a diagram illustrating a result of a temporal change in the intensity of the optical signal detected by the photodetector with respect to the configuration of FIG.
  • FIG. 20 is a block diagram showing a configuration of an N-bit optical DAC according to the seventh embodiment of the present invention.
  • FIG. 21 is a block diagram showing a configuration of an optical DAC to be simulated in the seventh embodiment of the present invention.
  • FIG. 22 is a diagram illustrating a result of obtaining a temporal change in the absolute phase of the optical signal of each bit in the configuration of FIG. 21 by simulation.
  • FIG. 23 is a diagram illustrating a result of a temporal change in the intensity of the optical signal detected by the photodetector with respect to the configuration of FIG.
  • FIG. 24 is a diagram illustrating a result of obtaining a temporal change in the absolute phase of the optical signal detected by the photodetector in the configuration of FIG. 21 by simulation.
  • FIG. 25 is a diagram showing a result of obtaining a temporal change in the strength of the electric signal output from the subtractor with the configuration of FIG. 21 by simulation.
  • FIG. 23 is a diagram illustrating a result of obtaining a temporal change in the intensity of the optical signal detected by the photodetector with respect to the configuration of FIG.
  • FIG. 24 is a diagram illustrating a result of obtaining a temporal change in the absolute phase of the optical signal detected by the photo
  • FIG. 26 is a block diagram showing a configuration when the phase modulation method is applied to the N-bit optical DAC according to the first and fifth embodiments of the present invention.
  • FIG. 27 is a block diagram showing a configuration when the phase modulation method is applied to the N-bit optical DAC according to the second embodiment of the present invention.
  • FIG. 28 is a block diagram showing a configuration when the phase modulation method is applied to the N-bit optical DAC according to the third embodiment of the present invention.
  • FIG. 29 is a block diagram showing a configuration of an N-bit optical DAC according to the eighth embodiment of the present invention.
  • FIG. 30 is a block diagram showing another configuration of the N-bit optical DAC according to the eighth embodiment of the present invention.
  • FIG. 31 is a diagram for explaining the effect of inputting bias light to the bias port of the Y junction element.
  • FIG. 32 is a block diagram showing a configuration when a Y junction element is added to the final stage of the N-bit optical DAC according to the first and fifth embodiments of the present invention.
  • FIG. 33 is a block diagram showing a configuration when a Y junction element is added to the final stage of the N-bit optical DAC according to the second embodiment of the present invention.
  • FIG. 34 is a block diagram showing a configuration when a Y junction element is added to the final stage of the N-bit optical DAC according to the third embodiment of the present invention.
  • FIG. 35 is a block diagram showing a configuration when a Y junction element is added to the final stage of the N-bit optical DAC according to the sixth embodiment of the present invention.
  • FIG. 1 is a block diagram showing the configuration of an N-bit optical DAC which is an optical computing unit according to the first embodiment of the present invention.
  • the N-bit optical DAC is one of the N Y-merging elements 1-1 to 1-N having two inputs and one output connected in cascade (N is an integer of 2 or more) and one of the Y-merging elements 1-1 in the first stage.
  • the optical waveguide 2-1 connected to the input port, the light output port of the (M-1) -th stage Y-merging element 1- (M-1), and one light of the M-th stage Y-merging element 1-M.
  • An optical waveguide 2-M that connects the input port and inputs the signal light output from the Y-merging element 1- (M-1) to the Y-merging element 1-M (M is an integer of 2 to N) ,
  • the optical waveguides 3-1 to 3-N connected to the other optical input ports of the Y junction elements 1-1 to 1-N, and the optical waveguide connected to the optical output port of the final Y junction element 1-N.
  • the waveguide 4 is composed of optical intensity modulators 5-1 to 5-N (optical modulators) provided in the optical waveguides 3-1 to 3-N.
  • Examples of the Y junction elements 1-1 to 1-N and the optical waveguides 2-1 to 2-N, 3-1 to 3-N, 4 include dielectric optical wiring such as PLC (Planar Lightwave Circuit), or Si thin wires Semiconductor optical wiring such as can be used.
  • dielectric optical wiring such as PLC (Planar Lightwave Circuit), or Si thin wires Semiconductor optical wiring such as can be used.
  • the optical waveguide 2-1 corresponds to zero input. That is, no light is input to the optical waveguide 2-1.
  • a VOA Very Optical Attenuator
  • the optical intensity modulators 5-1 to 5 -N block the continuous light propagating through the optical waveguides 3-1 to 3 -N when the bit input of the corresponding electric digital signal is “0”, and the bit input is In the case of “1”, continuous light is allowed to pass. Thereby, the continuous light propagating through the optical waveguides 3-1 to 3-N is individually turned on / off according to the corresponding bit of the N-bit electric digital signal. In this way, signal light to be input to the other optical input port of the Y junction elements 1-1 to 1-N is generated.
  • the Y merge element 1-i (i 1 to N) merges and propagates the light propagated through the optical waveguide 2-i and the optical waveguide 3-i at an equal ratio.
  • the transmittance T of the light input from each of the two optical input ports of the Y combining device 1-i to the optical output port of the Y combining device 1-i is both 0.25.
  • a fixed optical attenuator with a loss of 6 dB is provided in place of the first-stage Y junction element 1-1 so that light propagating through the optical waveguide 3-1 is attenuated by 6 dB and introduced into the optical waveguide 2-2. May be.
  • the input / output of the light intensity modulator 5-1 may be adjusted so that the relative intensity of the output light with respect to the input light is 0.25.
  • phase shifter may be provided in each of the optical waveguides 3-1 to 3 -N.
  • a phase shifter include a heater type phase shifter that controls the phase of guided light by changing the refractive index of the optical waveguide by the thermo-optic effect, and the refractive index of the optical waveguide by the electro-optic effect.
  • a phase shifter for controlling the phase of guided light includes a heater type phase shifter that controls the phase of guided light by changing the refractive index of the optical waveguide by the thermo-optic effect, and the refractive index of the optical waveguide by the electro-optic effect.
  • the horizontal axis of FIG. 2 is an electric digital signal, and the vertical axis is a value obtained by normalizing the amplitude of the optical output of the N-bit optical DAC, and the N-bit optical for all combinations (“00000000” to “11111111”) of the electric digital signal.
  • the amplitude value of the optical output of the DAC is plotted.
  • the amplitude value of the optical output increases linearly as the digital input increases, and the N-bit optical DAC operates normally.
  • the maximum optical output amplitude value is ((2 N ⁇ 1) / 2 N ) 1/2 to 1. Since the total value of the optical input is N, the loss L DAC due to the operation of the optical DAC is 10 log 10 (N / (2 N ⁇ 1) / 2 N )) to 10 log 10 (N) [dB].
  • FIG. 3 is a block diagram showing a configuration of an N-bit optical DAC which is an optical arithmetic unit according to the second embodiment of the present invention.
  • the N-bit optical DAC of this embodiment includes (N-1) Y-input / Y-branch elements 10-1 to 10- (N-1) having two inputs and two outputs connected in cascade, and the Y-junction at the final stage.
  • a Y-junction element 13 that uses one optical output of the Y-branch element 10- (N-1) as one input, and an optical fiber connected to one optical input port of the first-stage Y-junction / Y-branch element 10-1.
  • One optical output port of the waveguide 14-1, the (k-1) stage Y junction / Y branch element 10- (k-1) and one of the k stage Y junction / Y branch element 10-k An optical waveguide 14-k that connects the optical input port and inputs the signal light output from the Y combining / Y branching element 10- (k-1) to the Y combining / Y branching element 10-k (where k is 2 to (N ⁇ 1)), one optical output port of the final stage Y-merging / Y-branching element 10- (N-1) and one optical input of the Y-merging element 13
  • Each of the Y junction / Y branch elements 10-1 to 10- (N-1) includes a Y input element 11 having two inputs and one output, and a Y branch element 12 having the optical output of the Y junction element 11 as an input. It has a combined configuration.
  • the Y merge element 11 of each Y merge / Y branch element 10-j (j is an integer of 1 to (N-1)) merges the propagation light of the optical waveguide 14-j and the optical waveguide 15-j at an equal ratio. Output.
  • the transmittance T 11 of the light input to each of the two optical input ports of the Y junction element 11 to the optical output port of the Y junction element 11 is both 0.5.
  • the N light intensity modulators 18-1 to 18-N are respectively connected to the optical waveguides 15-1 to 15-N when the bit input of the corresponding electric digital signal is “0”.
  • the bit input is “1”
  • the continuous light is allowed to pass.
  • signal light to be input to the other optical input port of the Y combining / Y branching elements 10-1 to 10- (N-1) and the Y combining element 13 is generated.
  • the final optical output (DAC output) of the N-bit optical DAC can be obtained from the optical waveguide 17. Further, in this embodiment, since the Y junction / Y branch elements 10-1 to 10- (N-1) are respectively provided with the Y branch elements 12, (N-1) optical output ports are increased. That is, the optical output of the optical waveguides 16-1 to 16- (N-1) corresponds to a DAC output of 1 to (N-1) bits.
  • the loss L DAC due to the operation of the optical DAC is 3 dB.
  • the maximum light output amplitude value is ⁇ 2 as described above, it is possible to obtain a light output larger than that in the first embodiment.
  • the Y-junction / Y-branch element of T to 0.5 has a lower reflectivity and is easier to design.
  • (C) It is possible to simultaneously generate a DAC with a low bit number.
  • 1 to (N ⁇ 1) -bit DAC output can be taken out from the optical waveguides 16-1 to 16- (N ⁇ 1) as described above.
  • the low bit number DAC output can be used as a monitor port for operation calibration.
  • a resolution switching function can be obtained by combining the N-bit optical DAC of this embodiment with an optical switch that selects one of the outputs of the optical waveguides 16-1 to 16- (N-1) and 17. Can be realized.
  • FIG. 5 is a block diagram showing a configuration of an N-bit optical DAC which is an optical arithmetic unit according to the third embodiment of the present invention.
  • the N-bit optical DAC of the present embodiment is one of N cascaded 2-input 2-output Y merge / Y branch elements 10-1 to 10-N and the first stage Y merge / Y branch element 10-1.
  • the optical waveguide 14-1 connected to the optical input port of (Y), the Y junction of the (K-1) stage, and the optical output port of the Y branch element 10- (K-1) and the Y junction of the K stage.
  • An optical waveguide that connects the waveguide 20-1 with the optical output port of the (k-1) -th stage Y junction element 19- (k-1) and one optical input port of the k-th stage Y junction element 19-k.
  • Waveguides 20-k (where k is an integer from 2 to (N-1)), (j + 1) stage Y junction / Y branch element 10- (j + 1) other optical output port and j stage Y junction element
  • An optical waveguide 21-j for connecting the other optical input port of 19-j (where j is an integer from 1 to (N-1)), and an optical output port of the Y-merging element 19- (N-1) at the final stage
  • an optical waveguide 22 connected to the.
  • the N-bit optical DAC of this embodiment has almost the same configuration as that of the second embodiment, and the continuous light input method is the same as that of the second embodiment.
  • the difference from the second embodiment is that the Y junction / Y branch element 10-N is used in place of the Y junction element 13 so that the total number of Y junction / Y branch elements is one, which is N, and further cascade-connected ( N-1) Y junction elements 19-1 to 19- (N-1) are provided, and the output of the final stage Y junction element 19- (N-1) is used as the output of the bit counter (Bit ⁇ ⁇ ⁇ ⁇ counter output). Is a point. From the output of the bit counter, light having an amplitude value proportional to the number of input digital signals “1” is output.
  • the circuit of this embodiment is a circuit that can simultaneously execute an N-bit DAC operation and an N-bit counter operation.
  • the input light from the optical waveguide 20- (K-1) to the Y junction element 19- (K-1) and the optical waveguide 21- (K-1) to the Y junction element 19- (K-) is preferable to adjust so that the phase of the input light to 1) is in phase.
  • a phase shifter may be provided in at least one of the optical waveguides 20- (K-1) or 21- (K-1).
  • the bit rate of the signal generator is 10 Gbps
  • the amplitude value of the optical output (DAC (output) of the N-bit optical DAC is processed by a low-pass filter, and the high-frequency noise is cut off
  • the optical output (Bit This shows a waveform obtained by processing the amplitude value of (counter output) with a low-pass filter and cutting high-frequency noise.
  • the horizontal axis of FIG. 6 is time (ns).
  • an electrical signal can be obtained by photoelectrically converting the optical output of the optical waveguide 4 by the photodetector 6.
  • an electrical signal can be obtained by photoelectrically converting the optical outputs of the optical waveguides 16-1 to 16- (N-1) and 17 by the photodetectors 23-1 to 23-N.
  • an electrical signal can be obtained by photoelectrically converting the output of the optical waveguide 17 by the photodetector 24 and photoelectrically converting the output of the optical waveguide 22 by the photodetector 25.
  • the physical quantity to be detected by the optical output is the optical amplitude value.
  • the amplitude is squared and the output becomes a quadratic function. Therefore, it is necessary to perform the square root processing of the intensity value on the electric circuit side and linearize it.
  • there are the following two methods. (I) Control by bias port.
  • FIG. 7 is a block diagram showing the configuration of the N-bit optical DAC according to this embodiment.
  • the N-bit optical DAC of this embodiment includes N cascaded Y-elements 1a-1 to 1a-N with three inputs and one output and a Y-junction element 1a-1 with a bias port at the first stage.
  • the optical waveguide 2-1 connected to one optical input port, the optical output port of the Y junction element 1a- (M-1) with the (M-1) stage bias port, and the Y with the M stage bias port
  • An optical waveguide 2-M that connects one optical input port of the confluence element 1a-M (where M is an integer of 2 to N), and the other optical input of the Y confluence elements 1a-1 to 1a-N with bias ports
  • Optical waveguides 3-1 to 3-N connected to the ports, an optical waveguide 4 connected to the optical output port of the Y-junction element 1a-N with a bias port at the final stage, and optical waveguides 3-1 to 3-N
  • the light intensity modulators 5-1 to 5-N provided in .
  • FIG. 8 is a perspective view showing the configuration of the Y junction element 1a-1 with a bias port
  • FIG. 9 is a plan view showing the configuration of the Y junction element 1a-1 with a bias port.
  • the Y junction element 1a-1 with a bias port is formed on a substrate 101 made of a first dielectric material and on one surface 101a of the substrate 101. From the first dielectric material, An optical waveguide 102, an optical waveguide 103, an optical waveguide 104, and an optical waveguide 105 (bias port) made of a second dielectric material having a high refractive index are provided.
  • Examples of the first dielectric that forms the substrate 101 include silica (SiO 2 ) such as quartz.
  • the second dielectric constituting the optical waveguides 102 to 105 is, for example, silicon (Si).
  • the refractive index of silica is 1.4 in the communication wavelength band (for example, wavelength 1.5 ⁇ m), whereas the refractive index of silicon (Si) is 3.5. Therefore, when the optical waveguides 102 to 105 are made of silicon, the substrate and air act as a cladding, and light is confined in the optical waveguides 102 to 105. Further, by forming the optical waveguides 102 to 105 on one surface 101a of the substrate 101, the Y junction element 1a-1 with a bias port is configured on the planar optical waveguide.
  • the optical waveguide 102, the optical waveguide 103, and the optical waveguide 104 are connected to each other at their respective ends. It constitutes a confluence element.
  • Each of the optical waveguide 102 and the optical waveguide 103 is an optical waveguide for inputting signal light, and functions as a set of optical input ports.
  • the optical waveguide 104 is an optical waveguide for outputting signal light and functions as an optical output port.
  • the optical waveguide 102 and the optical waveguide 103 serving as an optical input port are disposed symmetrically with respect to an extension line of the optical waveguide 104 serving as an optical output port.
  • the optical waveguide 105 is an optical waveguide for bias light input and acts as a bias port.
  • the optical waveguide 105 serving as a bias port is disposed between the optical waveguide 102 and the optical waveguide 103. More specifically, the optical waveguide 105 is disposed on an extension line of the optical waveguide 104.
  • One end of the optical waveguide 105 closer to the Y junction element is formed in a taper shape in plan view.
  • One end of the tapered optical waveguide 105 is referred to as a “tapered portion 105a”.
  • the tapered portion 105a is disposed in close proximity to the optical waveguide 102 and the optical waveguide 103 of the Y junction element with a gap. As a result, the optical waveguide 102 and the optical waveguide 103 and the optical waveguide 105 are optically coupled to each other.
  • the output light is output from the optical waveguide 104 serving as an optical output port.
  • the Y junction element 1a-1 with a bias port can be manufactured by the following process. That is, a silicon-on-insulator (SOI) substrate having a low-loss single crystal silicon layer is prepared, and a photosensitive material applied to the surface of the single crystal silicon layer by a photolithography technique is applied to a predetermined pattern as shown in FIG. If the silicon layer is etched after patterning, an element as shown in FIG. 8 can be obtained.
  • SOI silicon-on-insulator
  • FIG. 10 is a perspective view showing another configuration of the Y junction element 1a-1 with bias port
  • FIG. 11 is a plan view showing another configuration of the Y junction element 1a-1 with bias port.
  • the Y junction element 1a-1 with a bias port is formed on a substrate 201 made of a first dielectric material such as silica (SiO 2 ) and one surface 201a of the substrate 201.
  • Optical waveguide 202, optical waveguide 203, optical waveguide 204, and optical waveguide 205 made of a second dielectric material having a higher refractive index than that of the first dielectric material, such as silicon (Si).
  • the optical waveguide 202 and the optical waveguide 203 act as optical input ports
  • the optical waveguide 204 acts as an optical output port
  • the optical waveguide 205 acts as a bias port.
  • an optical waveguide 205 acting as a bias port is disposed between the optical waveguide 202 acting as an optical input port and the optical waveguide 203.
  • the optical waveguide 202 and the optical waveguide 203 are arranged so as to be symmetric with respect to the optical waveguide 205 in plan view.
  • the optical waveguide 205 and the optical waveguide 204 acting as an optical output port are connected to each other at one end thereof.
  • the optical waveguide 202 and the optical waveguide 203 that are optical input ports have coupling portions 202a and 203a that are coupled to the optical waveguide 205 that is a bias port. That is, the coupling portions 202a and 203a are portions corresponding to the length L DC in the vicinity of the tip portions of the optical waveguide 202 and the optical waveguide 203, which are arranged in parallel with the optical waveguide 204 with a gap g DC therebetween. As described above, the optical waveguide 202 and the optical waveguide 203 are provided with the coupling portions 202a and 203a, respectively, so that the optical waveguide 202 and the optical waveguide 203 and the optical waveguide 205 are separated so as to be coupled to each other and are directionally coupled. A vessel is formed. The length L DC of the coupling portions 202a and 203a is preferably about 90% of the 3 dB coupling length.
  • the configuration of the Y junction element 1a-1 with the bias port has been described.
  • the configurations of the other Y junction elements 1a-2 to 1a-N with the bias port are the same as those of the Y junction element 1a-1 with the bias port. It is.
  • bias light having a fixed intensity P bias is input from a continuous laser light source (not shown) to the bias ports of all Y junction elements 1a-1 to 1a-N with bias ports.
  • the phases of the signal light input to the two optical input ports of the Y junction elements 1a-1 to 1a-N with the bias ports and the bias light input to the bias port are in phase.
  • FIG. 12A to FIG. 12C show input / output characteristics under different bias light intensities when both transmittances T are 0.25. 12A to 12C, the horizontal axis represents an electric digital signal, and the vertical axis represents a value obtained by normalizing the optical output intensity of the N-bit optical DAC.
  • FIG. 12A shows a case where the product T bias P bias of the transmittance T bias of bias light and the intensity P bias of the bias light is 0, and FIG. 12B shows a case where T bias P bias is 0.0625.
  • FIG. 12C shows a case where T bias P bias is 0.25.
  • a characteristic indicated by a broken line 301 in FIGS. 12A to 12C represents a characteristic obtained by linearly approximating an actual input / output characteristic indicated by a solid line 300.
  • R 2 is the mean square error between the actual input / output characteristics and the linear approximation. In the examples of FIGS. 12A to 12C, the mean square error R 2 is 0.9373, 0.9926, and 0.9973.
  • the relationship between the input digital signal and the output of the photodetector 6 can be made linear, and the output of the photodetector 6 can be square root on the electric circuit side. No need to process.
  • this embodiment can also be applied to the second and third embodiments.
  • the Y junction element 11 and the Y junction element 13 of each of the Y junction / Y branch elements 10-1 to 10-N are respectively used as Y junction elements with bias ports. Replace it.
  • FIG. 13 is a block diagram showing the configuration of an N-bit optical DAC that is an optical computing unit according to the present embodiment.
  • N 8
  • the optical DAC calculation unit 30 and the coherent detection unit 31 corresponding to FIG. 1 are integrated.
  • the continuous laser light from the continuous laser light source 32 is divided into two equal parts by the Y branch element 33.
  • One continuous light branched by the Y branch element 33 is input to the Y branch element 35 via the optical waveguide 34.
  • the Y branch element 35 divides the continuous light input from the optical waveguide 34 into two equal parts.
  • One continuous light branched by the Y branch element 35 is input to the Y branch element 38 via the optical waveguide 36, and the other continuous light branched is input to the Y branch element 39 via the optical waveguide 37.
  • the Y branch element 38 divides the continuous light input from the optical waveguide 36 into two equal parts
  • the Y branch element 39 divides the continuous light input from the optical waveguide 37 into two equal parts.
  • One continuous light branched by the Y branch element 38 is input to the Y branch element 44 via the optical waveguide 40, and the other continuous light branched is input to the Y branch element 45 via the optical waveguide 41.
  • the One continuous light branched by the Y branch element 39 is input to the Y branch element 46 via the optical waveguide 42, and the other continuous light branched is input to the Y branch element 47 via the optical waveguide 43.
  • the Y branch element 44 divides the continuous light input from the optical waveguide 40 into two equal parts, and the Y branch element 45 divides the continuous light input from the optical waveguide 41 into two equal parts.
  • the Y branch element 46 divides the continuous light input from the optical waveguide 42 into two equal parts, and the Y branch element 47 divides the continuous light input from the optical waveguide 43 into two equal parts.
  • One continuous light branched by the Y branch element 44 is input to the optical waveguide 3-8, and the other continuous light branched is input to the optical waveguide 3-5.
  • One continuous light branched by the Y branching element 45 is input to the optical waveguide 3-4, and the other continuous light branched is input to the optical waveguide 3-1.
  • One continuous light branched by the Y branch element 46 is input to the optical waveguide 3-2, and the other continuous light branched is input to the optical waveguide 3-3.
  • One continuous light branched by the Y branching element 47 is input to the optical waveguide 3-6, and the other continuous light branched is input to the optical waveguide 3-7. In this way, continuous light input to the optical waveguides 3-1 to 3-8 described in the first embodiment can be realized.
  • Reference numerals 48-1 to 48-8 in FIG. 13 denote the phase shifters described in the first embodiment.
  • the coherent detection unit 31 equalizes the optical waveguide 50 connected to the other optical output port of the Y-branch element 33, the phase shifter 51 provided in the optical waveguide 50, and the propagation light of the optical waveguide 4 and the optical waveguide 50.
  • a 3 dB coupler 52 (MMI coupler) that merges at a ratio and outputs the result by dividing into two, a photodetector 53 that converts one output light of the 3 dB coupler 52 into an electrical signal, and the other output light of the 3 dB coupler 52 are electrically It is comprised from the photodetector 54 converted into a signal.
  • the two outputs from the 3 dB coupler 52 are received by two different photodetectors 53 and 54, and the difference between the two electrical signals output from the photodetectors 53 and 54 is obtained by a subtracter (not shown). In this way, the optical amplitude value can be detected by using a so-called balanced detector configuration.
  • the phase of the local light different from the light source of the signal light is synchronized and used as the reference light.
  • This phase synchronization requires a large cost.
  • the optical computing unit since the transmitter and the receiver are integrated at a close distance, the optical DAC computation is performed only by preparing the coherent detection unit 31 for the reference light. The homodyne detection using the same continuous laser light source 32 as that of the unit 30 is possible.
  • the example in which homodyne detection is applied to the first embodiment has been described, but it may be applied to the second to fourth embodiments.
  • the optical waveguides 16-1 to 16- A coherent detector may be provided instead of the photodetectors 23-1 to 23-N so that the light from (N-1) and 17 is input to the other optical input port of the 3 dB coupler. .
  • light from the same continuous laser light source as the optical waveguides 15-1 to 15-N is input to one optical input port of the 3 dB coupler, and light from the optical waveguides 17 and 22 is input. May be provided in place of the photodetectors 24 and 25, respectively, so that is input to the other optical input port of the 3 dB coupler.
  • light from the same continuous laser light source as the optical waveguides 3-1 to 3 -N is input to one optical input port of the 3 dB coupler, and light from the optical waveguide 4 is 3 dB.
  • What is necessary is just to provide a coherent detection part instead of the photodetector 6 so that it may input into the other optical input port of a coupler.
  • the transmittance T of the input light to the optical output ports of the Y converging elements 1-i and 1a-i is 0.25.
  • the signals are input to the two optical input ports of the Y junction element 11 constituting the Y junction / Y branch element 10-j (j is an integer from 1 to (N-1)).
  • the transmitted light T 11 to the optical output port of the Y-merging element 11 is set to 0.5, and the light input to the optical input port of the Y-branching element 12 constituting the Y-merging / Y-branching element 10-j
  • the transmittance T 12 to the two optical output ports of the Y branch element 12 is 0.5.
  • (N ⁇ 1) light beams corresponding to the respective bits excluding the LSB of the N-bit electric digital signal are four times as large as the light beams corresponding to the adjacent lower bits.
  • a light intensity difference is given to the N lights so as to have a light intensity of (6 dB).
  • FIG. 14 is a block diagram illustrating a configuration of an N-bit optical DAC that is an optical arithmetic unit according to the present embodiment.
  • Optical waveguides 63-N to 63-1 connected to the other optical output ports of the Y branch elements 61-1 to 61-N, and light intensity modulators provided in the optical waveguides 63-1 to 63-N 64-1 to 64-N (optical modulator) and one optical input port are connected to the optical waveguides 63-1 to 63-N, and the other optical input
  • An optical waveguide 66-M that connects the other optical input port to input the light output from the Y combining element 65- (M-1) to the Y combining element 65-M, and the Y combining element 65 in the final stage.
  • the transmittance T of the light input to the optical input port of the Y branch element 61-i to the two optical output ports of the Y branch element 61-i is both 0.5.
  • each Y branch element 61-i is one of the two optical output ports of the upstream Y branch element except for the most upstream Y branch element that receives a single continuous light. Are connected in cascade so as to receive light output from the optical output port.
  • the continuous laser light from a single continuous laser light source (not shown) is branched into N continuous lights corresponding to the respective bits of the N-bit electric digital signal, and each of the N-bit electric digital signals excluding the LSB.
  • a difference in light intensity is applied to the N continuous lights so that (N ⁇ 1) continuous lights corresponding to the bits have twice (3 dB) light intensity as compared to the continuous lights corresponding to the adjacent lower bits. Can be granted.
  • the light corresponding to the i-th bit counted from the MSB of the N-bit electric digital signal is not connected to the subsequent Y-branch element of the two optical output ports of the i-th Y-branch element 61-i from the most upstream. Output from the optical output port.
  • the optical input to the optical waveguide 63-i corresponds to the input of the i-th bit counted from the LSB.
  • the light intensity modulators 64-1 to 64 -N provided for each bit of the N-bit electric digital signal each have a bit input of the corresponding electric digital signal “ When 0, the continuous light propagating through the optical waveguides 63-1 to 63-N is blocked, and when the bit input is 1, the continuous light is allowed to pass.
  • the optical waveguide 66-1 corresponds to zero input. That is, no light is input to the optical waveguide 66-1.
  • the Y merge element 65-i merges the light propagated through the optical waveguide 66-i and the optical waveguide 63-i at an equal ratio (merging ratio 1: 1) and outputs the merged light.
  • the transmittance T of the light input from each of the two optical input ports of the Y merge element 65-i to the optical output port of the Y merge element 65-i is both 0.5.
  • each Y merge element 65-i receives the signal light intensity-modulated by the light intensity modulator 64-i as one optical input, and each Y merge element excluding the most upstream Y merge element is located upstream. Cascade connection is performed so that the light output from the light output port of the Y junction element is used as the other light input.
  • the N signal lights intensity-modulated by the light intensity modulators 64-1 to 64-N are merged into one and correspond to each bit except the LSB of the N-bit electric digital signal (N ⁇ 1). It is possible to give a light intensity difference to the N signal lights so that each of the signal lights has a light intensity twice (3 dB) with respect to the continuous light corresponding to the adjacent lower bits.
  • the phase shifters 68-1 to 68-N are configured so that the light output intensities of the Y junction elements 65-1 to 65-N are maximized when the light intensity modulators 64-1 to 64-N are in the passing state.
  • the phase is adjusted in advance (so that the phases of the light combined by the Y combining elements 65-1 to 65-N are in phase).
  • the final optical output (output) of the N-bit optical DAC 60 can be obtained from the optical waveguide 67.
  • the calculation loss Loss in the present embodiment can be defined as follows:
  • T is the light intensity transmittance (ideally 0.5) of the Y junction elements 65-1 to 65-N.
  • Equation (5) The relationship between the number of bits N and the operation loss Loss of the N-bit optical DAC, which is obtained by substituting Equation (5) into Equation (1), is as shown in FIG.
  • 400 indicates the operation loss Loss of the N-bit optical DAC 60 of this embodiment
  • 401 indicates the operation loss Loss of the N-bit optical DAC of the second and third embodiments.
  • the operation loss Loss monotonously increases with respect to the number of bits N
  • the operation loss Loss monotonously decreases with respect to the number of bits N and the loss is zero.
  • the operation loss Loss decreases with respect to the number of bits N, a configuration suitable for high resolution can be realized.
  • FIG. 16A to FIG. 16D show specific configuration patterns when the N-bit optical DAC 60 of FIG. 14 is actually operated.
  • FIG. 16A shows the case of taking out light output as it is. In this case, continuous laser light from the continuous laser light source 70 is input to the N-bit light DAC 60.
  • FIG. 16B shows a case where the optical output of the N-bit optical DAC 60 is directly detected by a single photodetector 71.
  • an electrical signal can be obtained by photoelectrically converting the optical output of the N-bit optical DAC 60 by the photodetector 71.
  • FIG. 16C shows a case where continuous light having a specific amplitude and phase is added by the Y confluence element 74 and then directly detected by a single photodetector 75.
  • the continuous laser light from the continuous laser light source 70 is divided into two equal parts by the Y-branch element 72, one continuous light is input to the N-bit light DAC 60, and the other continuous light is combined into Y.
  • the element 74 combines with the output light of the N-bit optical DAC 60.
  • the phase shifter 73 is phase-adjusted in advance so that the light output intensity of the Y junction element 74 is maximized.
  • FIG. 16D shows the case of so-called coherent detection.
  • the continuous laser light from the continuous laser light source 70 is divided into two equal parts by the Y branching element 76, one continuous light is input to the N-bit light DAC 60, and the other continuous light is input to the 3 dB coupler.
  • (MMI coupler) 78 joins the output light of the N-bit optical DAC 60.
  • the phase difference between the output light input from the N-bit light DAC 60 to the 3 dB coupler 78 and the other continuous light (reference light) branched by the Y branch element 76 is ⁇ / 2. It may be adjusted in advance.
  • the 3 dB coupler 78 combines the output light of the N-bit light DAC 60 and the reference light phase-adjusted by the phase shifter 77 at an equal ratio, and divides the output light into two equal parts.
  • Each of the photodetectors 79.80 converts the two output lights of the 3 dB coupler 78 into electrical signals.
  • the subtractor 81 obtains the difference between the two electrical signals output from the photodetectors 79 and 80. In the case of direct detection in FIGS. 16B and 16C, a nonlinear output of a quadratic function is obtained, but in the case of coherent detection, a linear output is obtained.
  • the wavelength is 1550 nm
  • the light intensity is 1 mW
  • the line width is 10 MHz
  • the initial phase is ⁇ 90 °.
  • the optical intensity modulators 64-1 to 64-4 are assumed to have no loss
  • the LSB bit rate is 10 Gbps
  • the extinction ratio is infinite
  • the rise time and the fall time are 0.05 bits (8 ps).
  • Electric digital signals “0000” to “1111” are sequentially input to the light intensity modulators 64-1 to 64-4 of each bit.
  • the optical waveguide and coupler used in the configuration of FIG. 17 are assumed to have no loss, and further, no propagation delay difference and phase shift of the optical signal of each bit due to the optical path length difference.
  • FIG. 18 shows the results obtained by simulating the temporal change in the optical signal intensity of each bit in the configuration of FIG.
  • the vertical axis represents the optical signal intensity of each bit
  • the horizontal axis represents time. According to FIG. 18, it can be seen that the intensity difference is already doubled (3 dB) between the bits before joining by the Y joining elements 65-1 to 65-4.
  • FIG. 19 shows a result of obtaining a temporal change in the intensity Pout of the optical signal detected by the photodetector 71 by simulation.
  • P out is increased gradually.
  • the electric digital signal is “1111”
  • P out is 879 ⁇ W, so the operation loss is Loss to 0.56 dB.
  • the value of the optical signal intensity Pout matches the value obtained by the equation (5).
  • FIG. 20 is a block diagram showing a configuration of an N-bit optical DAC that is an optical computing unit according to the present embodiment. The same components as those in FIG. 14 are denoted by the same reference numerals.
  • N 4 in the example of FIG.
  • the optical phase modulators 69-1 to 69-N provided for each bit of the N-bit electric digital signal respectively pass the optical waveguides 63-1 to 63-N when the bit input of the corresponding electric digital signal is “0”.
  • the phase of the continuous light propagating is output without being changed (in phase), and the bit input of the corresponding electric digital signal is “1”
  • the phase of the continuous light propagating through the optical waveguides 63-1 to 63-N is ⁇ .
  • phase shifter in the N-bit optical DAC 60a is not necessary, and the number of components can be reduced.
  • coherent detection is indispensable in order to distinguish between positive and negative of the signal amplitude. That is, the specific configuration pattern when actually operating the N-bit optical DAC 60a of FIG. 20 is only FIG.
  • simulation result using the OptiSystem manufactured by Optiwave is shown in the same manner as the sixth embodiment for the configuration of the present embodiment.
  • the simulation conditions are the same as the above (I) to (IV) except that optical phase modulators 69-1 to 69-4 are used instead of the optical intensity modulators 64-1 to 64-4.
  • FIG. 22 shows a result obtained by simulating the temporal change of the absolute phase of the optical signal of each bit in the configuration of FIG. Since the present embodiment is a phase modulation system, the phase difference (relative phase) between each bit is modulated to 0 / ⁇ . Although there is a light intensity difference of 4 times (6 dB) between each bit, the light intensity of each bit is constant with respect to time. Since the line width of the laser beam is 10 MHz, the absolute phase fluctuates without maintaining the initial phase, but since all the bits share the same laser beam, the relative phase between the bits is kept at 0 or ⁇ . ing.
  • FIG. 23 shows a result obtained by simulating the temporal change of the optical signal intensity Pout obtained when 100% light is coupled to the photodetector 82 provided in the optical waveguide 67 of FIG.
  • FIG. 24 shows a result obtained by simulating the time change of the absolute phase of the detected optical signal. It was confirmed that the optical phase intensity P out is symmetric at the boundary between “0111” and “1000” of the input electric digital signal, whereas the absolute phase is inverted.
  • FIG. 25 shows the results obtained by simulating the temporal change in the electric signal intensity output from the subtracter 81 in FIG.
  • the positive and negative electric field amplitudes of the optical signal were detected by homodyne detection, and it was confirmed that the output increased linearly with increasing digital input.
  • FIG. 26 shows the configuration when the phase modulation method is applied to the first and fifth embodiments
  • FIG. 27 shows the configuration when the phase modulation method is applied to the second embodiment
  • FIG. FIG. 28 shows a configuration when the phase modulation method is applied to the.
  • coherent detection is indispensable in the phase modulation method, but in FIGS. 26 to 28, configurations related to homodyne detection (the coherent detection unit 31 and the Y branch element 33 in FIG. 13 and the Y branch element in FIG. 16D).
  • 76, the phase shifter 77, the 3 dB coupler 78, the photodetectors 79 and 80, and the subtractor 81) are omitted.
  • FIG. 29 shows a configuration in which the Y junction elements 65-1 to 65-N in the sixth embodiment are replaced with Y junction elements 65a-1 to 65a-N with bias ports.
  • the Y junction element 65 in the seventh embodiment is shown in FIG.
  • FIG. 30 shows a configuration in which ⁇ 1 to 65-N are replaced with Y junction elements 65a-1 to 65a-N with bias ports.
  • the Y junction elements 1-1 to 1-N and the Y junction element 11 and the Y junction element 13 of the Y junction / Y branch elements 10-1 to 10-N are biased. You may make it replace with the Y junction element with a port.
  • FIG. 31 is a diagram showing the relationship between the input digital signal and the intensity of the optical signal detected by the optical DAC detector 82, 310 indicates the operation region of the optical DAC when no bias light is input, and 311 The operation region of the optical DAC when bias light is input is shown.
  • any one of the Y merge elements in front of the photodetector may be replaced with a Y merge element with a bias port.
  • any one of the Y merge elements 1-1 to 1-N in FIGS. 1, 13, and 26 may be replaced with a Y merge element with a bias port, or FIGS. 27 and 28, any one of the Y merge element 11 and the Y merge element 13 of the Y merge / Y branch elements 10-1 to 10-N may be replaced with a Y merge element with a bias port.
  • One of the Y junction elements 65-1 to 65-N in FIG. 20 may be replaced with a Y junction element with a bias port.
  • FIG. 32 shows the configuration when the Y junction element 83 is added to the final stage of the optical DAC of the first and fifth embodiments, and the Y junction element 83 is added to the final stage of the optical DAC of the second embodiment.
  • FIG. 33 shows the configuration in this case
  • FIG. 34 shows the configuration when the Y junction element 83 is added to the final stage of the optical DAC of the third embodiment, and Y in the final stage of the optical DAC of the sixth embodiment.
  • FIG. 35 shows a configuration when the junction element 83 is added.
  • the light intensity modulators 5-1 to 5-N, 18-1 to 18-N, 64-1 to 64-N are used as the optical phase modulators. Replace it.
  • the present invention can be applied to, for example, a technique for converting an electrical digital signal into an analog signal using an optical circuit.
  • Y junction element 1a, 65a... Y junction element with bias port, 2 to 4, 14 to 17, 20 to 22, 34, 36, 37, 40 to 43 , 50, 62, 63, 66, 67, 102-105, 202-205 ... optical waveguide, 5, 18, 64 ... light intensity modulator, 6, 23-25, 53, 54, 71, 75, 79.80. , 82 ... photodetector, 10 ... Y converging / Y branching element, 12, 33, 35, 38, 39, 44 to 47, 61, 72, 76 ... Y branching element, 30 ... optical DAC arithmetic unit, 31 ... coherent Detection unit, 32, 70 ...
  • Continuous laser light source 48-1 to 48-8, 51, 68, 73, 77 ... Phase shifter, 52, 78 ... 3dB coupler, 60, 60a ... N-bit light DAC, 69 ... light Phase modulator, 81 ... subtractor, 101, 201 ... base .

Abstract

Provided is an optical arithmetic unit having high speed and a small circuit scale. The optical arithmetic unit is provided with N cascade-connected two-input-one-output Y-junction elements 1-1 through 1-N and N light intensity modulators 5-1 through 5-N. The N light intensity modulators 5-1 through 5-N each individually modulate the intensity of continuous light to a second optical input port different from a first optical input port to which no input light is inputted or to which a signal light from an optical output port of a prior-stage Y-junction element is inputted from among two optical input ports of the cascade-connected N Y-junction elements 1-1 through 1-N, in accordance with a bit corresponding to an N-bit electrical digital signal, and generates a signal light to the second optical input port. Output light obtained from the final-stage Y-junction element 1-N constitutes the result of an N-bit digital/analog operation.

Description

光演算器Optical computing unit
 本発明は、光回路を用いた光デジタル・アナログ変換器(DAC)等の光演算器に関するものである。 The present invention relates to an optical computing unit such as an optical digital-to-analog converter (DAC) using an optical circuit.
 電気回路を用いたデジタル・アナログ変換器(DAC:Digital to Analog converter)は、既に様々な方式のものが提案されており、サンプリングレート、分解能、消費電力、サイズといった性能がそれぞれ異なる。つまり、適用対象によって異なる方式のDACを使い分けているのが現状である。例えば現状の市販品でサンプリングレートは1GS/s程度が高速とされており、分解能は16ビット以上が高分解能とされている。今後の通信または映像技術等の発展により、さらに高速かつ高分解能、低消費電力、小型なDACが要求されると考えられる。また高分解能なDACに要するレイテンシ(遅延)も今後のボトルネックになっていくことが予想される。 A variety of digital-to-analog converters (DACs) that use electrical circuits have been proposed, and performances such as sampling rate, resolution, power consumption, and size are different. In other words, the current situation is that different types of DACs are used depending on the application target. For example, in a current commercial product, the sampling rate is about 1 GS / s, and the resolution is 16 bits or more. With future development of communication or video technology, higher speed, higher resolution, lower power consumption, and smaller DACs are expected. In addition, the latency (delay) required for a high-resolution DAC is expected to become a future bottleneck.
 以上のような要求に応え得るDACとして、光回路を用いた光DACが提案されている(非特許文献1参照)。
 しかしながら、従来の光DACは、一部が電気回路で動いているため、速度が電気回路に律速されてしまうという問題点があり、また膨大な素子や回路規模が必要になるという問題点があった。
As a DAC that can meet the above requirements, an optical DAC using an optical circuit has been proposed (see Non-Patent Document 1).
However, since some conventional optical DACs are operated by an electric circuit, there is a problem that the speed is limited by the electric circuit, and there is a problem that an enormous element and circuit scale are required. It was.
 本発明は、上記課題を解決するためになされたもので、高速かつ高密度に実装可能な光演算器を提供することを目的とする。 The present invention has been made to solve the above-described problems, and an object thereof is to provide an optical computing unit that can be mounted at high speed and high density.
 本発明の光演算器は、1乃至2の信号光を入力とする2入力1出力の第1のY合流素子と、1乃至2の信号光を入力とする2入力2出力のY合流・Y分岐素子とのうち少なくとも1種類の素子をN個(Nは2以上の整数)縦続接続し、この縦続接続されたN個の各素子の2つの光入力ポートのうち、入力光が無い第1の光入力ポート若しくは前段の素子の光出力ポートからの信号光が入力される第1の光入力ポートと異なる第2の光入力ポートへの連続光を、それぞれNビット電気デジタル信号の対応するビットに応じて個別に変調して前記第2の光入力ポートへの信号光を生成するN個の光変調器を備え、最終段の素子から得られた出力光を演算結果とすることを特徴とするものである。 The optical computing unit of the present invention includes a 2-input 1-output first Y merging element that receives 1 to 2 signal lights as input, and a 2-input 2-output Y merging / Y that receives 1 to 2 signal lights as inputs. At least one of the branch elements is cascade-connected (N is an integer equal to or greater than 2), and the first of the two optical input ports of each of the N elements connected in cascade has no input light. The continuous light to the second optical input port different from the first optical input port to which the signal light from the optical input port or the optical output port of the previous stage element is input is a corresponding bit of the N-bit electric digital signal, respectively. And N optical modulators that individually modulate in response to the signal and generate the signal light to the second optical input port, and output light obtained from the last-stage element is used as a calculation result. To do.
 また、本発明の光演算器の1構成例は、N個の前記第1のY合流素子を備え、これらN個の第1のY合流素子は、最上流の第1のY合流素子を除く(N-1)個の第1のY合流素子が、上流の第1のY合流素子の光出力ポートから出力された光を前記第1の光入力ポートへの入力光とし、かつ最上流の第1のY合流素子を含むN個の第1のY合流素子が、前記N個の光変調器によって変調された信号光を前記第2の光入力ポートへの入力光とするように縦続接続され、前記N個の光変調器は、N個の同一波長の前記連続光を、それぞれNビット電気デジタル信号の対応するビットに応じて個別に変調してN個の前記第1のY合流素子の第2の光入力ポートへの信号光を生成し、最終段の前記第1のY合流素子から得られた出力光をNビットデジタル・アナログ演算の結果とすることを特徴とするものである。 In addition, one configuration example of the optical computing unit of the present invention includes N first Y merge elements, and the N first Y merge elements exclude the first Y merge element at the most upstream. (N-1) first Y confluence elements use the light output from the light output port of the upstream first Y confluence element as input light to the first light input port, and the most upstream N first Y merging elements including the first Y merging elements are cascaded so that the signal light modulated by the N optical modulators is input to the second optical input port. The N optical modulators individually modulate the N light beams having the same wavelength according to the corresponding bits of the N-bit electric digital signal, respectively. The signal light to the second optical input port is generated and the output light obtained from the first Y junction element at the final stage is N bits. Is characterized in that the result of digital-analog operation.
 また、本発明の光演算器の1構成例は、(N-1)個の前記Y合流・Y分岐素子と1個の前記第1のY合流素子とを備え、これら(N-1)個のY合流・Y分岐素子と1個の第1のY合流素子とは、最上流のY合流・Y分岐素子を除く(N-2)個のY合流・Y分岐素子と1個の第1のY合流素子とが、上流のY合流・Y分岐素子の第1の光出力ポートから出力された光を前記第1の光入力ポートへの入力光とし、かつ最上流のY合流・Y分岐素子を含む(N-1)個のY合流・Y分岐素子と1個の第1のY合流素子とが、前記N個の光変調器によって変調された信号光を前記第2の光入力ポートへの入力光とするように縦続接続され、前記N個の光変調器は、N個の同一波長の前記連続光を、それぞれNビット電気デジタル信号の対応するビットに応じて個別に変調して(N-1)個の前記Y合流・Y分岐素子の第2の光入力ポートおよび1個の前記第1のY合流素子の第2の光入力ポートへの信号光を生成し、(N-1)個の各Y合流・Y分岐素子の2つの光出力ポートのうち、後段の素子への信号光を出力する第1の光出力ポートと異なる第2の光出力ポートから得られた出力光および最終段の前記第1のY合流素子から得られた出力光を、1~Nビットデジタル・アナログ演算の結果とすることを特徴とするものである。 Also, one configuration example of the optical computing unit of the present invention includes (N−1) Y-merging / Y-branching elements and one first Y-merging element, and these (N−1) elements. The Y merge / Y branch element and one first Y merge element are the (N-2) Y merge / Y branch elements and one first Y merge element excluding the most upstream Y merge / Y branch element. The Y merge element of the upstream is the light output from the first optical output port of the upstream Y merge / Y branch element as the input light to the first optical input port, and the most upstream Y merge / Y branch (N-1) Y combining / Y branching elements including one element and one first Y combining element receive the signal light modulated by the N optical modulators in the second optical input port. The N optical modulators respectively connect N continuous lights of the same wavelength to N-bit electric digital signals. Individually modulated according to the bit to the second optical input port of the (N-1) Y merging / Y branching elements and the second optical input port of the one first Y merging element A second optical output port that generates signal light and is different from the first optical output port that outputs the signal light to the subsequent element among the two optical output ports of the (N−1) Y merging / Y branching elements. The output light obtained from the optical output port and the output light obtained from the first Y-merging element at the final stage are used as the result of 1 to N-bit digital / analog computation.
 また、本発明の光演算器の1構成例は、N個の前記Y合流・Y分岐素子を備え、これらN個のY合流・Y分岐素子は、最上流のY合流・Y分岐素子を除く(N-1)個のY合流・Y分岐素子が、上流のY合流・Y分岐素子の第1の光出力ポートから出力された光を前記第1の光入力ポートへの入力光とし、かつ最上流のY合流・Y分岐素子を含むN個のY合流・Y分岐素子が、前記N個の光変調器によって変調された信号光を前記第2の光入力ポートへの入力光とするように縦続接続され、前記N個の光変調器は、N個の同一波長の前記連続光を、それぞれNビット電気デジタル信号の対応するビットに応じて個別に変調してN個の前記Y合流・Y分岐素子の第2の光入力ポートへの信号光を生成し、縦続接続された2入力1出力の(N-1)個の第2のY合流素子をさらに備え、初段の前記Y合流・Y分岐素子の2つの光出力ポートのうち、後段の前記Y合流・Y分岐素子への信号光を出力する第1の光出力ポートと異なる第2の光出力ポートから得られた信号光を初段の前記第2のY合流素子の第1の光入力ポートに入力し、(k-1)段目(kは2~(N-1)の整数)の前記第2のY合流素子の光出力ポートから得られた信号光をk段目の前記第2のY合流素子の第1の光入力ポートに入力し、(j+1)段目(jは1~(N-1)の整数)の前記Y合流・Y分岐素子の第2の光出力ポートから得られた信号光をj段目の前記第2のY合流素子の第2の光入力ポートに入力し、最終段の前記Y合流・Y分岐素子の第1の光出力ポートから得られた出力光をNビットデジタル・アナログ演算の結果とし、最終段の前記第2のY合流素子から得られた出力光をNビットカウンタ演算の結果とすることを特徴とするものである。 In addition, one configuration example of the optical computing unit of the present invention includes N Y merging / Y branching elements, and these N Y merging / Y branching elements exclude the most upstream Y merging / Y branching element. (N-1) Y merging / Y branching elements use the light output from the first optical output port of the upstream Y merging / Y branching element as the input light to the first optical input port, and The N Y merge / Y branch elements including the most upstream Y merge / Y branch element use the signal light modulated by the N optical modulators as input light to the second optical input port. The N optical modulators individually modulate N continuous light beams having the same wavelength in accordance with corresponding bits of the N-bit electric digital signal, respectively. Generates signal light to the second optical input port of the Y-branch element, and the cascaded 2-input 1-output (N− ) Second Y-merging elements, and the first optical output port for outputting the signal light to the Y-merging / Y-branching element at the subsequent stage among the two optical output ports of the Y-merging / Y-branching element at the first stage. The signal light obtained from the second optical output port different from the optical output port is input to the first optical input port of the second Y junction element at the first stage, and the (k−1) -th stage (k is 2 to 2). (The integer of (N-1)), the signal light obtained from the optical output port of the second Y-merging element is input to the first optical input port of the k-th second Y-merging element, j + 1) signal light obtained from the second optical output port of the Y-combining / Y-branching element at the j-th stage (j is an integer from 1 to (N-1)) Output light obtained from the first optical output port of the Y-merging / Y-branching element at the final stage is input to the second optical input port of the N-bit digital - as a result of analog operation, an output light obtained from the second Y-combining device in the final stage is characterized in that the result of the N-bit counter operation.
 また、本発明の光演算器の1構成例は、N個の前記第1のY合流素子を備え、これらN個の第1のY合流素子は、最上流の第1のY合流素子を除く(N-1)個の第1のY合流素子が、上流の第1のY合流素子の光出力ポートから出力された光を前記第1の光入力ポートへの入力光とし、かつ最上流の第1のY合流素子を含むN個の第1のY合流素子が、前記N個の光変調器によって変調された信号光を前記第2の光入力ポートへの入力光とするように縦続接続され、さらに、1入力2出力のN個のY分岐素子を備え、これらN個のY分岐素子は、単一の連続光を入力とする最上流のY分岐素子を除く各Y分岐素子が、上流のY分岐素子の2つの光出力ポートのうち第1の光出力ポートから出力される光を入力とするように縦続接続され、これらN個のY分岐素子の第2の光出力ポートから得られた出力光を前記N個の光変調器への入力光とし、最終段の前記第1のY合流素子から得られた出力光をNビットデジタル・アナログ演算の結果とすることを特徴とするものである。 In addition, one configuration example of the optical computing unit of the present invention includes N first Y merge elements, and the N first Y merge elements exclude the first Y merge element at the most upstream. (N-1) first Y confluence elements use the light output from the light output port of the upstream first Y confluence element as input light to the first light input port, and the most upstream N first Y merging elements including the first Y merging elements are cascaded so that the signal light modulated by the N optical modulators is input to the second optical input port. Furthermore, each of the N Y branch elements, except for the most upstream Y branch element that receives a single continuous light, is provided with N Y branch elements having one input and two outputs. Of the two optical output ports of the upstream Y branch element, the light output from the first optical output port is connected in cascade to be input, The output light obtained from the second optical output port of these N Y branch elements is used as the input light to the N optical modulators, and the output obtained from the first Y confluence element in the final stage. The light is the result of N-bit digital / analog operation.
 また、本発明の光演算器の1構成例において、前記第1のY合流素子のうちの少なくとも1つ、または前記Y合流・Y分岐素子を構成するY合流素子のうちの少なくとも1つは、第1、第2の2つの光入力ポートの他に、固定強度のバイアス光が入力されるバイアスポートを有することを特徴とするものである。
 また、本発明の光演算器の1構成例は、さらに、前記最終段の素子から得られた出力光を第1の光入力ポートへの入力光とし、固定強度のバイアス光を第2の光入力ポートへの入力光とするY合流素子を備え、このY合流素子から得られた出力光をNビットデジタル・アナログ演算の結果とすることを特徴とするものである。
 また、本発明の光演算器の1構成例において、前記光変調器は、光強度変調器である。
 また、本発明の光演算器の1構成例において、前記光変調器は、光位相変調器であり、さらに、デジタル・アナログ変換後の電気信号を取り出すコヒーレント検波部を備え、前記コヒーレント検波部は、前記Nビットデジタル・アナログ演算の結果となる出力光と、この出力光と同一波長の参照光との位相差がπ/2となるように調整可能な移相器と、前記Nビットデジタル・アナログ演算の結果となる出力光と前記参照光とを合流させ2等分して出力するカプラと、前記カプラの一方の出力光を電気信号に変換する第1の光検出器と、前記カプラの他方の出力光を電気信号に変換する第2の光検出器と、前記第1、第2の光検出器から出力された2つの電気信号の差分を求める減算器とを備えることを特徴とするものである。
In one configuration example of the optical computing unit of the present invention, at least one of the first Y merging elements or at least one of the Y merging elements constituting the Y merging / Y branching element is: In addition to the first and second light input ports, a bias port to which a fixed intensity bias light is input is provided.
Further, in one configuration example of the optical computing unit of the present invention, the output light obtained from the last stage element is used as the input light to the first optical input port, and the fixed intensity bias light is used as the second light. A Y-merging element serving as input light to the input port is provided, and output light obtained from the Y-merging element is used as a result of N-bit digital / analog computation.
In one configuration example of the optical computing unit of the present invention, the optical modulator is a light intensity modulator.
Further, in one configuration example of the optical computing unit of the present invention, the optical modulator is an optical phase modulator, and further includes a coherent detection unit that extracts an electric signal after digital-analog conversion, and the coherent detection unit includes: A phase shifter that can be adjusted so that a phase difference between the output light resulting from the N-bit digital / analog operation and the reference light having the same wavelength as that of the output light is π / 2, and the N-bit digital A coupler that combines the output light that is the result of the analog operation and the reference light and divides the output light into two equal parts, a first photodetector that converts one output light of the coupler into an electrical signal, A second photodetector for converting the other output light into an electrical signal, and a subtractor for obtaining a difference between the two electrical signals output from the first and second photodetectors. Is.
 本発明によれば、1乃至2の信号光を入力とする2入力1出力の第1のY合流素子と、1乃至2の信号光を入力とする2入力2出力のY合流・Y分岐素子とのうち少なくとも1種類の素子をN個縦続接続し、縦続接続されたN個の各素子の第2の光入力ポートへの連続光を、それぞれNビット電気デジタル信号の対応するビットに応じて個別に変調して第2の光入力ポートへの信号光を生成するN個の光変調器を設けることにより、高速かつ高密度に実装可能な光DAC等の光演算器を実現することができる。 According to the present invention, a 2-input 1-output first Y-merging element that receives 1 to 2 signal lights as an input and a 2-input 2-output Y-merging / Y-branch element that receives 1 to 2 signal lights as inputs. Are connected in cascade according to the corresponding bits of the N-bit electric digital signal, respectively, and the continuous light to the second optical input port of each of the N elements connected in cascade is connected in cascade. By providing N optical modulators that individually modulate and generate signal light to the second optical input port, an optical arithmetic unit such as an optical DAC that can be mounted at high speed and high density can be realized. .
図1は、本発明の第1の実施例に係るNビット光DACの構成を示すブロック図である。FIG. 1 is a block diagram showing a configuration of an N-bit optical DAC according to the first embodiment of the present invention. 図2は、本発明の第1の実施例に係るNビット光DACの入出力特性を示す図である。FIG. 2 is a diagram showing input / output characteristics of the N-bit optical DAC according to the first embodiment of the present invention. 図3は、本発明の第2の実施例に係るNビット光DACの構成を示すブロック図である。FIG. 3 is a block diagram showing a configuration of an N-bit optical DAC according to the second embodiment of the present invention. 図4は、本発明の第2の実施例に係るNビット光DACの入出力特性を示す図である。FIG. 4 is a diagram showing input / output characteristics of the N-bit optical DAC according to the second embodiment of the present invention. 図5は、本発明の第3の実施例に係るNビット光DACの構成を示すブロック図である。FIG. 5 is a block diagram showing a configuration of an N-bit optical DAC according to the third embodiment of the present invention. 図6は、本発明の第3の実施例に係るNビット光DACの入出力特性を示す図である。FIG. 6 is a diagram showing input / output characteristics of an N-bit optical DAC according to the third embodiment of the present invention. 図7は、本発明の第4の実施例に係るNビット光DACの構成を示すブロック図である。FIG. 7 is a block diagram showing a configuration of an N-bit optical DAC according to the fourth embodiment of the present invention. 図8は、本発明の第4の実施例に係るNビット光DACのバイアスポート付きY合流素子の構成を示す斜視図である。FIG. 8 is a perspective view showing a configuration of a Y junction element with a bias port of an N-bit optical DAC according to the fourth embodiment of the present invention. 図9は、本発明の第4の実施例に係るNビット光DACのバイアスポート付きY合流素子の構成を示す平面図である。FIG. 9 is a plan view showing a configuration of a Y junction device with a bias port of an N-bit optical DAC according to the fourth embodiment of the present invention. 図10は、本発明の第4の実施例に係るNビット光DACのバイアスポート付きY合流素子の別の構成を示す斜視図である。FIG. 10 is a perspective view showing another configuration of the Y-merging element with a bias port of the N-bit optical DAC according to the fourth embodiment of the present invention. 図11は、本発明の第4の実施例に係るNビット光DACのバイアスポート付きY合流素子の別の構成を示す平面図である。FIG. 11 is a plan view showing another configuration of the Y-merging element with a bias port of the N-bit optical DAC according to the fourth embodiment of the present invention. 図12は、本発明の第4の実施例に係るNビット光DACの入出力特性を示す図である。FIG. 12 is a diagram showing input / output characteristics of an N-bit optical DAC according to the fourth embodiment of the present invention. 図13は、本発明の第5の実施例に係るNビット光DACの構成を示すブロック図である。FIG. 13 is a block diagram showing a configuration of an N-bit optical DAC according to the fifth embodiment of the present invention. 図14は、本発明の第6の実施例に係るNビット光DACの構成を示すブロック図である。FIG. 14 is a block diagram showing a configuration of an N-bit optical DAC according to the sixth embodiment of the present invention. 図15は、ビット数と光DACの演算損失との関係を示す図である。FIG. 15 is a diagram illustrating the relationship between the number of bits and the operation loss of the optical DAC. 図16は、図14の光DACを実際に運用する具体的な構成のパターンを示す図である。FIG. 16 is a diagram showing a specific configuration pattern for actually operating the optical DAC of FIG. 図17は、本発明の第6の実施例においてシミュレーションの対象となる光DACの構成を示すブロック図である。FIG. 17 is a block diagram showing a configuration of an optical DAC to be simulated in the sixth embodiment of the present invention. 図18は、図17の構成について各ビットの光信号強度の時間変化をシミュレーションで求めた結果を示す図である。FIG. 18 is a diagram illustrating a result of obtaining a temporal change in the optical signal intensity of each bit in the configuration of FIG. 17 by simulation. 図19は、図17の構成について光検出器で検出される光信号の強度の時間変化をシミュレーションで求めた結果を示す図である。FIG. 19 is a diagram illustrating a result of a temporal change in the intensity of the optical signal detected by the photodetector with respect to the configuration of FIG. 図20は、本発明の第7の実施例に係るNビット光DACの構成を示すブロック図である。FIG. 20 is a block diagram showing a configuration of an N-bit optical DAC according to the seventh embodiment of the present invention. 図21は、本発明の第7の実施例においてシミュレーションの対象となる光DACの構成を示すブロック図である。FIG. 21 is a block diagram showing a configuration of an optical DAC to be simulated in the seventh embodiment of the present invention. 図22は、図21の構成について各ビットの光信号の絶対位相の時間変化をシミュレーションで求めた結果を示す図である。FIG. 22 is a diagram illustrating a result of obtaining a temporal change in the absolute phase of the optical signal of each bit in the configuration of FIG. 21 by simulation. 図23は、図21の構成について光検出器で検出される光信号の強度の時間変化をシミュレーションで求めた結果を示す図である。FIG. 23 is a diagram illustrating a result of a temporal change in the intensity of the optical signal detected by the photodetector with respect to the configuration of FIG. 図24は、図21の構成について光検出器で検出される光信号の絶対位相の時間変化をシミュレーションで求めた結果を示す図である。FIG. 24 is a diagram illustrating a result of obtaining a temporal change in the absolute phase of the optical signal detected by the photodetector in the configuration of FIG. 21 by simulation. 図25は、図21の構成について減算器から出力される電気信号の強度の時間変化をシミュレーションで求めた結果を示す図である。FIG. 25 is a diagram showing a result of obtaining a temporal change in the strength of the electric signal output from the subtractor with the configuration of FIG. 21 by simulation. 図26は、本発明の第1、第5の実施例に係るNビット光DACに位相変調方式を適用した場合の構成を示すブロック図である。FIG. 26 is a block diagram showing a configuration when the phase modulation method is applied to the N-bit optical DAC according to the first and fifth embodiments of the present invention. 図27は、本発明の第2の実施例に係るNビット光DACに位相変調方式を適用した場合の構成を示すブロック図である。FIG. 27 is a block diagram showing a configuration when the phase modulation method is applied to the N-bit optical DAC according to the second embodiment of the present invention. 図28は、本発明の第3の実施例に係るNビット光DACに位相変調方式を適用した場合の構成を示すブロック図である。FIG. 28 is a block diagram showing a configuration when the phase modulation method is applied to the N-bit optical DAC according to the third embodiment of the present invention. 図29は、本発明の第8の実施例に係るNビット光DACの構成を示すブロック図である。FIG. 29 is a block diagram showing a configuration of an N-bit optical DAC according to the eighth embodiment of the present invention. 図30は、本発明の第8の実施例に係るNビット光DACの他の構成を示すブロック図である。FIG. 30 is a block diagram showing another configuration of the N-bit optical DAC according to the eighth embodiment of the present invention. 図31は、Y合流素子のバイアスポートにバイアス光を入力する効果を説明する図である。FIG. 31 is a diagram for explaining the effect of inputting bias light to the bias port of the Y junction element. 図32は、本発明の第1、第5の実施例に係るNビット光DACの最終段にY合流素子を追加した場合の構成を示すブロック図である。FIG. 32 is a block diagram showing a configuration when a Y junction element is added to the final stage of the N-bit optical DAC according to the first and fifth embodiments of the present invention. 図33は、本発明の第2の実施例に係るNビット光DACの最終段にY合流素子を追加した場合の構成を示すブロック図である。FIG. 33 is a block diagram showing a configuration when a Y junction element is added to the final stage of the N-bit optical DAC according to the second embodiment of the present invention. 図34は、本発明の第3の実施例に係るNビット光DACの最終段にY合流素子を追加した場合の構成を示すブロック図である。FIG. 34 is a block diagram showing a configuration when a Y junction element is added to the final stage of the N-bit optical DAC according to the third embodiment of the present invention. 図35は、本発明の第6の実施例に係るNビット光DACの最終段にY合流素子を追加した場合の構成を示すブロック図である。FIG. 35 is a block diagram showing a configuration when a Y junction element is added to the final stage of the N-bit optical DAC according to the sixth embodiment of the present invention.
[第1の実施例]
 以下、本発明の実施例について図面を参照して説明する。図1は本発明の第1の実施例に係る光演算器であるNビット光DACの構成を示すブロック図である。Nビット光DACは、縦続接続された2入力1出力のN個のY合流素子1-1~1-Nと(Nは2以上の整数)、初段のY合流素子1-1の一方の光入力ポートに接続された光導波路2-1と、(M-1)段目のY合流素子1-(M-1)の光出力ポートとM段目のY合流素子1-Mの一方の光入力ポートとを接続して、Y合流素子1-(M-1)から出力された信号光をY合流素子1-Mに入力する光導波路2-Mと(Mは2以上N以下の整数)、Y合流素子1-1~1-Nの他方の光入力ポートに接続された光導波路3-1~3-Nと、最終段のY合流素子1-Nの光出力ポートに接続された光導波路4と、光導波路3-1~3-Nに設けられた光強度変調器5-1~5-N(光変調器)とから構成される。
[First embodiment]
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an N-bit optical DAC which is an optical computing unit according to the first embodiment of the present invention. The N-bit optical DAC is one of the N Y-merging elements 1-1 to 1-N having two inputs and one output connected in cascade (N is an integer of 2 or more) and one of the Y-merging elements 1-1 in the first stage. The optical waveguide 2-1 connected to the input port, the light output port of the (M-1) -th stage Y-merging element 1- (M-1), and one light of the M-th stage Y-merging element 1-M. An optical waveguide 2-M that connects the input port and inputs the signal light output from the Y-merging element 1- (M-1) to the Y-merging element 1-M (M is an integer of 2 to N) , The optical waveguides 3-1 to 3-N connected to the other optical input ports of the Y junction elements 1-1 to 1-N, and the optical waveguide connected to the optical output port of the final Y junction element 1-N. The waveguide 4 is composed of optical intensity modulators 5-1 to 5-N (optical modulators) provided in the optical waveguides 3-1 to 3-N.
 Y合流素子1-1~1-Nおよび光導波路2-1~2-N,3-1~3-N,4としては、例えばPLC(Planar Lightwave Circuit)などの誘電体光配線、またはSi細線などの半導体光配線を用いることができる。 Examples of the Y junction elements 1-1 to 1-N and the optical waveguides 2-1 to 2-N, 3-1 to 3-N, 4 include dielectric optical wiring such as PLC (Planar Lightwave Circuit), or Si thin wires Semiconductor optical wiring such as can be used.
 光導波路3-1~3-Nには、それぞれ同一波長かつ等しい強度の連続光が入力される。このような連続光の入力を行うためには、連続レーザ光源からの連続レーザ光を1:NスプリッタによってN等分して、光導波路3-1~3-Nのそれぞれに連続光を入力すればよい。 Continuous light having the same wavelength and the same intensity is input to the optical waveguides 3-1 to 3 -N. In order to input such continuous light, the continuous laser light from the continuous laser light source is divided into N equal parts by a 1: N splitter, and the continuous light is input to each of the optical waveguides 3-1 to 3 -N. That's fine.
 光導波路2-1は、ゼロ入力に対応する。すなわち、光導波路2-1には光を入力しない。光導波路3-i(iは1~Nの整数)への光入力は、i番目(i=1~Nの整数)のビットの入力に対応する。つまり、光導波路3-1への光入力は、最低位ビット(LSB:Least Significant Bit)に対応し、光導波路3-Nへの光入力は、最上位ビット(MSB:Most Significant Bit)に対応する。 The optical waveguide 2-1 corresponds to zero input. That is, no light is input to the optical waveguide 2-1. The optical input to the optical waveguide 3-i (i is an integer from 1 to N) corresponds to the input of the i-th bit (i = integer from 1 to N). That is, the optical input to the optical waveguide 3-1 corresponds to the least significant bit (LSB: Least Significant へ Bit), and the optical input to the optical waveguide 3-N corresponds to the most significant bit (MSB: Most Significant Bit). To do.
 Nビット電気デジタル信号のビット毎に設けられる光強度変調器5-1~5-Nとしては、VOA(Variable Optical Attenuator)を用いることができる。光強度変調器5-1~5-Nは、それぞれ対応する電気デジタル信号のビット入力が“0”の場合は光導波路3-1~3-Nを伝播する連続光を遮断し、ビット入力が“1”の場合は連続光を通過させる。これにより、光導波路3-1~3-Nを伝播する連続光が、それぞれNビット電気デジタル信号の対応するビットに応じて個別にオン/オフされる。こうして、Y合流素子1-1~1-Nの他方の光入力ポートに入力される信号光が生成される。 As the light intensity modulators 5-1 to 5-N provided for each bit of the N-bit electric digital signal, a VOA (Variable Optical Attenuator) can be used. The optical intensity modulators 5-1 to 5 -N block the continuous light propagating through the optical waveguides 3-1 to 3 -N when the bit input of the corresponding electric digital signal is “0”, and the bit input is In the case of “1”, continuous light is allowed to pass. Thereby, the continuous light propagating through the optical waveguides 3-1 to 3-N is individually turned on / off according to the corresponding bit of the N-bit electric digital signal. In this way, signal light to be input to the other optical input port of the Y junction elements 1-1 to 1-N is generated.
 Y合流素子1-i(i=1~N)は、光導波路2-iと光導波路3-iの伝播光を等しい比率で合流させて出力する。このとき、Y合流素子1-iの2つの光入力ポートそれぞれから入力された光の、Y合流素子1-iの光出力ポートへの透過率Tは共に0.25である。なお、初段のY合流素子1-1の代わりに6dBの損失の固定光減衰器を設け、光導波路3-1を伝播する光が6dBだけ減衰して光導波路2-2に導入されるようにしてもよい。または、入力光に対する出力光の相対強度が0.25になるように、光強度変調器5-1の入出力を調整してもよい。 The Y merge element 1-i (i = 1 to N) merges and propagates the light propagated through the optical waveguide 2-i and the optical waveguide 3-i at an equal ratio. At this time, the transmittance T of the light input from each of the two optical input ports of the Y combining device 1-i to the optical output port of the Y combining device 1-i is both 0.25. A fixed optical attenuator with a loss of 6 dB is provided in place of the first-stage Y junction element 1-1 so that light propagating through the optical waveguide 3-1 is attenuated by 6 dB and introduced into the optical waveguide 2-2. May be. Alternatively, the input / output of the light intensity modulator 5-1 may be adjusted so that the relative intensity of the output light with respect to the input light is 0.25.
 また、光導波路2-iからY合流素子1-iへの入力光と光導波路3-iからY合流素子1-iへの入力光の位相が同相になるように調節することが好ましい。このような調整を実現するためには、光導波路3-1~3-Nにそれぞれ移相器を設けるようにすればよい。このような移相器の例としては、例えば熱光学効果により光導波路の屈折率を変化させて導波光の位相を制御するヒーター型の移相器、電気光学効果により光導波路の屈折率を変化させて導波光の位相を制御する移相器などがある。 Further, it is preferable to adjust so that the phase of the input light from the optical waveguide 2-i to the Y merge element 1-i and the input light from the optical waveguide 3-i to the Y merge element 1-i are in phase. In order to realize such adjustment, a phase shifter may be provided in each of the optical waveguides 3-1 to 3 -N. Examples of such a phase shifter include a heater type phase shifter that controls the phase of guided light by changing the refractive index of the optical waveguide by the thermo-optic effect, and the refractive index of the optical waveguide by the electro-optic effect. And a phase shifter for controlling the phase of guided light.
 以上のような構成により、光導波路4からNビット光DACの最終的な光出力(DAC output)が得られる。
 図1の構成の入出力特性の数値計算例(N=8)を図2に示す。図2の横軸は電気デジタル信号、縦軸はNビット光DACの光出力の振幅を正規化した値であり、電気デジタル信号の全ての組み合わせ(“00000000”~“11111111”)に対するNビット光DACの光出力の振幅値がプロットされている。
With the above configuration, the final optical output (DAC output) of the N-bit optical DAC can be obtained from the optical waveguide 4.
FIG. 2 shows a numerical calculation example (N = 8) of the input / output characteristics of the configuration of FIG. The horizontal axis of FIG. 2 is an electric digital signal, and the vertical axis is a value obtained by normalizing the amplitude of the optical output of the N-bit optical DAC, and the N-bit optical for all combinations (“00000000” to “11111111”) of the electric digital signal. The amplitude value of the optical output of the DAC is plotted.
 図2によれば、デジタル入力の増大に対して光出力の振幅値が線形に上昇しており、Nビット光DACが正常に動作していることが分かる。全ての入力ビットが“1”の場合の最大光出力振幅値は((2N-1)/2N1/2~1となる。光入力の合計値はNなので、光DACの演算による損失LDACは10log10(N/(2N-1)/2N))~10log10(N)[dB]となる。 As can be seen from FIG. 2, the amplitude value of the optical output increases linearly as the digital input increases, and the N-bit optical DAC operates normally. When all input bits are “1”, the maximum optical output amplitude value is ((2 N −1) / 2 N ) 1/2 to 1. Since the total value of the optical input is N, the loss L DAC due to the operation of the optical DAC is 10 log 10 (N / (2 N −1) / 2 N )) to 10 log 10 (N) [dB].
[第2の実施例]
 次に、本発明の第2の実施例について説明する。図3は本発明の第2の実施例に係る光演算器であるNビット光DACの構成を示すブロック図である。本実施例のNビット光DACは、縦続接続された2入力2出力の(N-1)個のY合流・Y分岐素子10-1~10-(N-1)と、最終段のY合流・Y分岐素子10-(N-1)の一方の光出力を一方の入力とするY合流素子13と、初段のY合流・Y分岐素子10-1の一方の光入力ポートに接続された光導波路14-1と、(k-1)段目のY合流・Y分岐素子10-(k-1)の一方の光出力ポートとk段目のY合流・Y分岐素子10-kの一方の光入力ポートとを接続して、Y合流・Y分岐素子10-(k-1)から出力された信号光をY合流・Y分岐素子10-kに入力する光導波路14-kと(kは2~(N-1)の整数)、最終段のY合流・Y分岐素子10-(N-1)の一方の光出力ポートとY合流素子13の一方の光入力ポートとを接続する光導波路14-Nと、Y合流・Y分岐素子10-1~10-(N-1)およびY合流素子13の他方の光入力ポートに接続された光導波路15-1~15-Nと、Y合流・Y分岐素子10-1~10-(N-1)の他方の光出力ポートに接続された光導波路16-1~16-(N-1)と、最終段のY合流素子13の光出力ポートに接続された光導波路17と、光導波路15-1~15-Nに設けられた光強度変調器18-1~18-N(光変調器)とから構成される。
[Second Embodiment]
Next, a second embodiment of the present invention will be described. FIG. 3 is a block diagram showing a configuration of an N-bit optical DAC which is an optical arithmetic unit according to the second embodiment of the present invention. The N-bit optical DAC of this embodiment includes (N-1) Y-input / Y-branch elements 10-1 to 10- (N-1) having two inputs and two outputs connected in cascade, and the Y-junction at the final stage. A Y-junction element 13 that uses one optical output of the Y-branch element 10- (N-1) as one input, and an optical fiber connected to one optical input port of the first-stage Y-junction / Y-branch element 10-1. One optical output port of the waveguide 14-1, the (k-1) stage Y junction / Y branch element 10- (k-1) and one of the k stage Y junction / Y branch element 10-k An optical waveguide 14-k that connects the optical input port and inputs the signal light output from the Y combining / Y branching element 10- (k-1) to the Y combining / Y branching element 10-k (where k is 2 to (N−1)), one optical output port of the final stage Y-merging / Y-branching element 10- (N-1) and one optical input of the Y-merging element 13 Optical waveguide 14-N connecting the ports, and Y waveguide / Y branch elements 10-1 to 10- (N-1) and optical waveguides 15-1 to 15- connected to the other optical input port of Y junction element 13 15-N, optical waveguides 16-1 to 16- (N-1) connected to the other optical output ports of the Y-merging / Y-branching elements 10-1 to 10- (N-1), and the final stage An optical waveguide 17 connected to the optical output port of the Y junction element 13 and optical intensity modulators 18-1 to 18-N (optical modulators) provided in the optical waveguides 15-1 to 15-N. The
 各Y合流・Y分岐素子10-1~10-(N-1)は、それぞれ2入力1出力のY合流素子11と、このY合流素子11の光出力を入力とするY分岐素子12とを組み合わせた構成となっている。 Each of the Y junction / Y branch elements 10-1 to 10- (N-1) includes a Y input element 11 having two inputs and one output, and a Y branch element 12 having the optical output of the Y junction element 11 as an input. It has a combined configuration.
 各Y合流・Y分岐素子10-j(jは1~(N-1)の整数)のY合流素子11は、光導波路14-jと光導波路15-jの伝播光を等しい比率で合流させて出力する。このとき、Y合流素子11の2つの光入力ポートそれぞれに入力された光の、Y合流素子11の光出力ポートへの透過率T11は共に0.5である。 The Y merge element 11 of each Y merge / Y branch element 10-j (j is an integer of 1 to (N-1)) merges the propagation light of the optical waveguide 14-j and the optical waveguide 15-j at an equal ratio. Output. At this time, the transmittance T 11 of the light input to each of the two optical input ports of the Y junction element 11 to the optical output port of the Y junction element 11 is both 0.5.
 また、各Y合流・Y分岐素子10-j(j=1~(N-1))のY分岐素子12は、Y合流素子11からの入力光を2等分する。このとき、Y分岐素子12の光入力ポートに入力された光の、Y分岐素子12の2つの光出力ポートへの透過率T12は共に0.5である。 The Y branching element 12 of each Y joining / Y branching element 10-j (j = 1 to (N−1)) divides the input light from the Y joining element 11 into two equal parts. At this time, the transmittance T 12 of the light input to the optical input port of the Y branch element 12 to the two optical output ports of the Y branch element 12 is both 0.5.
 第1の実施例と同様に、光導波路15-1~15-Nには、それぞれ同一波長かつ等しい強度の連続光が入力される。光導波路15-i(i=1~N)への光入力は、i番目のビットの入力に対応する。 As in the first embodiment, continuous light having the same wavelength and the same intensity is input to the optical waveguides 15-1 to 15-N. The optical input to the optical waveguide 15-i (i = 1 to N) corresponds to the input of the i-th bit.
 第1の実施例と同様に、N個の光強度変調器18-1~18-Nは、それぞれ対応する電気デジタル信号のビット入力が“0”の場合は光導波路15-1~15-Nを伝播する連続光を遮断し、ビット入力が“1”の場合は連続光を通過させる。こうして、Y合流・Y分岐素子10-1~10-(N-1)およびY合流素子13の他方の光入力ポートに入力される信号光が生成される。 As in the first embodiment, the N light intensity modulators 18-1 to 18-N are respectively connected to the optical waveguides 15-1 to 15-N when the bit input of the corresponding electric digital signal is “0”. When the bit input is “1”, the continuous light is allowed to pass. In this way, signal light to be input to the other optical input port of the Y combining / Y branching elements 10-1 to 10- (N-1) and the Y combining element 13 is generated.
 第1の実施例と同様に、光導波路14-jからY合流・Y分岐素子10-jへの入力光と光導波路15-jからY合流・Y分岐素子10-jへの入力光の位相が同相になるように調節することが好ましく、また光導波路14-NからY合流素子13への入力光と光導波路15-NからY合流素子13への入力光の位相が同相になるように調節することが好ましい。このような調整を実現するためには、光導波路15-1~15-Nにそれぞれ移相器を設けるようにすればよい。 As in the first embodiment, the phase of the input light from the optical waveguide 14-j to the Y merge / Y branch element 10-j and the phase of the input light from the optical waveguide 15-j to the Y merge / Y branch element 10-j Is preferably adjusted to be in phase, and the phase of the input light from the optical waveguide 14-N to the Y junction element 13 and the input light from the optical waveguide 15-N to the Y junction element 13 are in phase. It is preferable to adjust. In order to realize such adjustment, a phase shifter may be provided in each of the optical waveguides 15-1 to 15-N.
 以上のような構成により、光導波路17からNビット光DACの最終的な光出力(DAC output)が得られる。
 また、本実施例では、Y合流・Y分岐素子10-1~10-(N-1)にそれぞれY分岐素子12を設けていることから、光出力ポートが(N-1)個増える。すなわち、光導波路16-1~16-(N-1)の光出力は、1~(N-1)ビットのDAC出力に対応している。
With the above configuration, the final optical output (DAC output) of the N-bit optical DAC can be obtained from the optical waveguide 17.
Further, in this embodiment, since the Y junction / Y branch elements 10-1 to 10- (N-1) are respectively provided with the Y branch elements 12, (N-1) optical output ports are increased. That is, the optical output of the optical waveguides 16-1 to 16- (N-1) corresponds to a DAC output of 1 to (N-1) bits.
 図3の構成の入出力特性の数値計算例(N=8)を図4に示す。図4によれば、第1の実施例と同様に、本実施例のNビット光DACが正常に動作していることが分かる。本実施例では、全ての入力ビットが“1”の場合の最大光出力振幅値は((2N-1)/2N-11/2~√2となる。 FIG. 4 shows a numerical calculation example (N = 8) of the input / output characteristics of the configuration of FIG. As can be seen from FIG. 4, the N-bit optical DAC of this embodiment is operating normally, as in the first embodiment. In this embodiment, the maximum optical output amplitude value when all input bits are “1” is ((2 N −1) / 2 N−1 ) 1/2 to √2.
 第1の実施例の構成と比較した場合の本実施例の利点は次のとおりである。
(A)ビット数Nによらず、光DACの演算による損失LDACは3dBである。本実施例では、上記のように最大光出力振幅値が~√2なので、第1の実施例よりも大きい光出力を得ることができる。
Advantages of the present embodiment when compared with the configuration of the first embodiment are as follows.
(A) Regardless of the number of bits N, the loss L DAC due to the operation of the optical DAC is 3 dB. In this embodiment, since the maximum light output amplitude value is ˜√2 as described above, it is possible to obtain a light output larger than that in the first embodiment.
(B)T~0.5のY合流・Y分岐素子の方が低反射率かつ設計が容易である。第1の実施例の構成で必要なT=0.25のY合流素子1-1~1-Nは一般的な素子ではなく、場合によっては光の反射率が増大する可能性がある。これに対して、本実施例で用いるT=0.5のY合流・Y分岐素子10-1~10-(N-1)およびY合流素子13の場合、低損失・低反射率かつ作製が容易な設計方法が既に知られている。 (B) The Y-junction / Y-branch element of T to 0.5 has a lower reflectivity and is easier to design. The Y junction elements 1-1 to 1-N having T = 0.25 required in the configuration of the first embodiment are not general elements, and in some cases, the light reflectance may increase. In contrast, the T = 0.5 Y merge / Y branch elements 10-1 to 10- (N-1) and the Y merge element 13 used in this example have low loss, low reflectivity, and can be manufactured. Easy design methods are already known.
(C)低ビット数のDACの同時生成が可能。本実施例では、上記のように1~(N-1)ビットのDAC出力を光導波路16-1~16-(N-1)から取り出すことができる。低ビット数のDAC出力は、動作キャリブレーションのためのモニターポートに活用できる。さらに、本実施例のNビット光DACと、光導波路16-1~16-(N-1),17の出力のうちいずれか1つを選択する光スイッチとを組み合わせることで、分解能の切替機能を実現することができる。 (C) It is possible to simultaneously generate a DAC with a low bit number. In the present embodiment, 1 to (N−1) -bit DAC output can be taken out from the optical waveguides 16-1 to 16- (N−1) as described above. The low bit number DAC output can be used as a monitor port for operation calibration. Further, a resolution switching function can be obtained by combining the N-bit optical DAC of this embodiment with an optical switch that selects one of the outputs of the optical waveguides 16-1 to 16- (N-1) and 17. Can be realized.
[第3の実施例]
 次に、本発明の第3の実施例について説明する。図5は本発明の第3の実施例に係る光演算器であるNビット光DACの構成を示すブロック図である。本実施例のNビット光DACは、縦続接続された2入力2出力のN個のY合流・Y分岐素子10-1~10-Nと、初段のY合流・Y分岐素子10-1の一方の光入力ポートに接続された光導波路14-1と、(K-1)段目のY合流・Y分岐素子10-(K-1)の一方の光出力ポートとK段目のY合流・Y分岐素子10-Kの一方の光入力ポートとを接続する光導波路14-Kと(Kは2~Nの整数)、Y合流・Y分岐素子10-1~10-Nの他方の光入力ポートに接続された光導波路15-1~15-Nと、最終段のY合流・Y分岐素子10-1~10-Nの一方の光出力ポートに接続された光導波路17と、光導波路15-1~15-Nに設けられた光強度変調器18-1~18-Nと、縦続接続された2入力1出力の(N-1)個のY合流素子19-1~19-(N-1)と、Y合流・Y分岐素子10-1の他方の光出力ポートとY合流素子19-1の一方の光入力ポートとを接続する光導波路20-1と、(k-1)段目のY合流素子19-(k-1)の光出力ポートとk段目のY合流素子19-kの一方の光入力ポートとを接続する光導波路20-kと(kは2~(N-1)の整数)、(j+1)段目のY合流・Y分岐素子10-(j+1)の他方の光出力ポートとj段目のY合流素子19-jの他方の光入力ポートとを接続する光導波路21-jと(jは1~(N-1)の整数)、最終段のY合流素子19-(N-1)の光出力ポートに接続された光導波路22とから構成される。
[Third embodiment]
Next, a third embodiment of the present invention will be described. FIG. 5 is a block diagram showing a configuration of an N-bit optical DAC which is an optical arithmetic unit according to the third embodiment of the present invention. The N-bit optical DAC of the present embodiment is one of N cascaded 2-input 2-output Y merge / Y branch elements 10-1 to 10-N and the first stage Y merge / Y branch element 10-1. And the optical waveguide 14-1 connected to the optical input port of (Y), the Y junction of the (K-1) stage, and the optical output port of the Y branch element 10- (K-1) and the Y junction of the K stage. An optical waveguide 14-K connecting one optical input port of the Y branch element 10-K (K is an integer of 2 to N), and the other optical input of the Y junction / Y branch elements 10-1 to 10-N Optical waveguides 15-1 to 15-N connected to the ports, an optical waveguide 17 connected to one optical output port of the Y-junction / Y-branch elements 10-1 to 10-N at the final stage, and an optical waveguide 15 -1 to 15-N provided with light intensity modulators 18-1 to 18-N and cascaded two-input one-output (N-1) Of the Y junction elements 19-1 to 19- (N-1), the other optical output port of the Y junction / Y branch element 10-1, and one optical input port of the Y junction element 19-1. An optical waveguide that connects the waveguide 20-1 with the optical output port of the (k-1) -th stage Y junction element 19- (k-1) and one optical input port of the k-th stage Y junction element 19-k. Waveguides 20-k (where k is an integer from 2 to (N-1)), (j + 1) stage Y junction / Y branch element 10- (j + 1) other optical output port and j stage Y junction element An optical waveguide 21-j for connecting the other optical input port of 19-j (where j is an integer from 1 to (N-1)), and an optical output port of the Y-merging element 19- (N-1) at the final stage And an optical waveguide 22 connected to the.
 本実施例のNビット光DACは、第2の実施例とほぼ同じ構成であり、連続光の入力方法は第2の実施例と同じである。第2の実施例と異なる点は、Y合流素子13の代わりにY合流・Y分岐素子10-Nを用いてY合流・Y分岐素子の総数を1個多いN個とし、さらに縦続接続した(N-1)個のY合流素子19-1~19-(N-1)を設け、最終段のY合流素子19-(N-1)の出力をビットカウンタの出力(Bit counter output)としている点である。このビットカウンタの出力からは、入力デジタル信号の“1”の個数に比例した振幅値の光が出力される。 The N-bit optical DAC of this embodiment has almost the same configuration as that of the second embodiment, and the continuous light input method is the same as that of the second embodiment. The difference from the second embodiment is that the Y junction / Y branch element 10-N is used in place of the Y junction element 13 so that the total number of Y junction / Y branch elements is one, which is N, and further cascade-connected ( N-1) Y junction elements 19-1 to 19- (N-1) are provided, and the output of the final stage Y junction element 19- (N-1) is used as the output of the bit counter (Bit カ ウ ン タ counter output). Is a point. From the output of the bit counter, light having an amplitude value proportional to the number of input digital signals “1” is output.
 つまり、本実施例の回路は、NビットDAC演算とNビットカウンタ演算とを同時に実行できる回路である。
 なお、本実施例では、光導波路20-(K-1)からY合流素子19-(K-1)への入力光と光導波路21-(K-1)からY合流素子19-(K-1)への入力光の位相が同相になるように調節することが好ましい。このような調整を実現するためには、光導波路20-(K-1)または21-(K-1)のうち少なくとも一方に移相器を設けるようにすればよい。
That is, the circuit of this embodiment is a circuit that can simultaneously execute an N-bit DAC operation and an N-bit counter operation.
In this embodiment, the input light from the optical waveguide 20- (K-1) to the Y junction element 19- (K-1) and the optical waveguide 21- (K-1) to the Y junction element 19- (K- It is preferable to adjust so that the phase of the input light to 1) is in phase. In order to realize such adjustment, a phase shifter may be provided in at least one of the optical waveguides 20- (K-1) or 21- (K-1).
 図5の構成の入出力特性(N=4)を、オプティウェーブ(Optiwave)社の光通信システムシミュレータであるOptiSystemを用いてシミュレーションした結果を図6に示す。ここでは、信号発生器のビットレートを10Gbpsとし、Nビット光DACの光出力(DAC output)の振幅値をローパスフィルタで処理して高周波ノイズをカットした波形と、Nビットカウンタの光出力(Bit counter output)の振幅値をローパスフィルタで処理して高周波ノイズをカットした波形とを示している。図6の横軸は時間(ns)である。 FIG. 6 shows the result of simulating the input / output characteristics (N = 4) of the configuration of FIG. 5 using OptiSystem, which is an optical communication system simulator of Optiwave. Here, the bit rate of the signal generator is 10 Gbps, the amplitude value of the optical output (DAC (output) of the N-bit optical DAC is processed by a low-pass filter, and the high-frequency noise is cut off, and the optical output (Bit This shows a waveform obtained by processing the amplitude value of (counter output) with a low-pass filter and cutting high-frequency noise. The horizontal axis of FIG. 6 is time (ns).
 図6によれば、電気デジタル信号の全ての組み合わせ(“0000”~“1111”)を順次入力したときに、Nビット光DACとNビットカウンタとが正常に動作していることが確認された。 According to FIG. 6, it was confirmed that the N-bit optical DAC and the N-bit counter are operating normally when all combinations (“0000” to “1111”) of the electrical digital signals are sequentially input. .
[第4の実施例]
 第1の実施例では、光導波路4の光出力を光検出器6で光電変換することにより電気信号を得ることができる。第2の実施例では、光導波路16-1~16-(N-1),17の光出力を光検出器23-1~23-Nで光電変換することにより電気信号を得ることができる。第3の実施例では、光導波路17の出力を光検出器24で光電変換し、光導波路22の出力を光検出器25で光電変換することにより電気信号を得ることができる。
[Fourth embodiment]
In the first embodiment, an electrical signal can be obtained by photoelectrically converting the optical output of the optical waveguide 4 by the photodetector 6. In the second embodiment, an electrical signal can be obtained by photoelectrically converting the optical outputs of the optical waveguides 16-1 to 16- (N-1) and 17 by the photodetectors 23-1 to 23-N. In the third embodiment, an electrical signal can be obtained by photoelectrically converting the output of the optical waveguide 17 by the photodetector 24 and photoelectrically converting the output of the optical waveguide 22 by the photodetector 25.
 ただし、これら第1~第3の実施例では、光出力で検出対象としている物理量は光振幅値である。光出力を光検出器6,23-1~23-N,24,25で光電変換して光強度値を得ると、振幅が2乗され、出力は2次関数になる。したがって、電気回路側で強度値の平方根処理をして線形化する必要がある。平方根処理での演算遅延の累積を避けるためには、次の2つの方法がある。
(I)バイアスポートによる制御。
(II)コヒーレント検波による光振幅値の検出。
However, in these first to third embodiments, the physical quantity to be detected by the optical output is the optical amplitude value. When the light output is photoelectrically converted by the light detectors 6, 23-1 to 23-N, 24, and 25 to obtain a light intensity value, the amplitude is squared and the output becomes a quadratic function. Therefore, it is necessary to perform the square root processing of the intensity value on the electric circuit side and linearize it. In order to avoid accumulation of calculation delay in the square root process, there are the following two methods.
(I) Control by bias port.
(II) Detection of optical amplitude value by coherent detection.
 本実施例は、上記の(I)の方法を採用したものである。図7は本実施例に係るNビット光DACの構成を示すブロック図であり、図1と同一の構成には同一の符号を付してある。本実施例のNビット光DACは、縦続接続された3入力1出力のN個の、バイアスポート付きY合流素子1a-1~1a-Nと、初段のバイアスポート付きY合流素子1a-1の一方の光入力ポートに接続された光導波路2-1と、(M-1)段目のバイアスポート付きY合流素子1a-(M-1)の光出力ポートとM段目のバイアスポート付きY合流素子1a-Mの一方の光入力ポートとを接続する光導波路2-Mと(Mは2以上N以下の整数)、バイアスポート付きY合流素子1a-1~1a-Nの他方の光入力ポートに接続された光導波路3-1~3-Nと、最終段のバイアスポート付きY合流素子1a-Nの光出力ポートに接続された光導波路4と、光導波路3-1~3-Nに設けられた光強度変調器5-1~5-Nとから構成される。 This example employs the above method (I). FIG. 7 is a block diagram showing the configuration of the N-bit optical DAC according to this embodiment. The same components as those in FIG. The N-bit optical DAC of this embodiment includes N cascaded Y-elements 1a-1 to 1a-N with three inputs and one output and a Y-junction element 1a-1 with a bias port at the first stage. The optical waveguide 2-1 connected to one optical input port, the optical output port of the Y junction element 1a- (M-1) with the (M-1) stage bias port, and the Y with the M stage bias port An optical waveguide 2-M that connects one optical input port of the confluence element 1a-M (where M is an integer of 2 to N), and the other optical input of the Y confluence elements 1a-1 to 1a-N with bias ports Optical waveguides 3-1 to 3-N connected to the ports, an optical waveguide 4 connected to the optical output port of the Y-junction element 1a-N with a bias port at the final stage, and optical waveguides 3-1 to 3-N The light intensity modulators 5-1 to 5-N provided in .
 第1の実施例と異なる点は、Y合流素子1-1~1-Nの代わりにバイアスポート付きY合流素子1a-1~1a-Nを用いる点である。図8はバイアスポート付きY合流素子1a-1の構成を示す斜視図、図9はバイアスポート付きY合流素子1a-1の構成を示す平面図である。 The difference from the first embodiment is that Y confluence elements 1a-1 to 1a-N with bias ports are used instead of Y confluence elements 1-1 to 1-N. FIG. 8 is a perspective view showing the configuration of the Y junction element 1a-1 with a bias port, and FIG. 9 is a plan view showing the configuration of the Y junction element 1a-1 with a bias port.
 バイアスポート付きY合流素子1a-1は、図8に示すように、第1の誘電体材料からなる基板101と、この基板101の一の面101a上に形成され、第1の誘電体材料より高い屈折率を有する第2の誘電体材料からなる光導波路102、光導波路103、光導波路104、光導波路105(バイアスポート)とを備える。 As shown in FIG. 8, the Y junction element 1a-1 with a bias port is formed on a substrate 101 made of a first dielectric material and on one surface 101a of the substrate 101. From the first dielectric material, An optical waveguide 102, an optical waveguide 103, an optical waveguide 104, and an optical waveguide 105 (bias port) made of a second dielectric material having a high refractive index are provided.
 基板101を構成する第1の誘電体としては、例えば、石英等のシリカ(SiO2)が挙げられる。
 また、光導波路102~105を構成する第2の誘電体は、例えば、シリコン(Si)である。シリカの屈折率は、通信波長帯(例えば波長1.5μm)で1.4であるのに対し、シリコン(Si)の屈折率は、3.5である。したがって、光導波路102~105をシリコンから構成した場合、基板および空気がクラッドとして作用して、光導波路102~105内に光が閉じ込められる。
 また、光導波路102~105を基板101の一の面101a上に形成することによって、バイアスポート付きY合流素子1a-1は平面光導波路上に構成されている。
Examples of the first dielectric that forms the substrate 101 include silica (SiO 2 ) such as quartz.
The second dielectric constituting the optical waveguides 102 to 105 is, for example, silicon (Si). The refractive index of silica is 1.4 in the communication wavelength band (for example, wavelength 1.5 μm), whereas the refractive index of silicon (Si) is 3.5. Therefore, when the optical waveguides 102 to 105 are made of silicon, the substrate and air act as a cladding, and light is confined in the optical waveguides 102 to 105.
Further, by forming the optical waveguides 102 to 105 on one surface 101a of the substrate 101, the Y junction element 1a-1 with a bias port is configured on the planar optical waveguide.
 図8、図9に示すように、本実施例に係るバイアスポート付きY合流素子1a-1において、光導波路102と光導波路103と光導波路104とは、それぞれの一端が互いに接続されて、Y合流素子を構成している。光導波路102および光導波路103は、それぞれ信号光入力用の光導波路であり、1組の光入力ポートとして作用する。また、光導波路104は、信号光出力用の光導波路であり、光出力ポートとして作用する。
 本実施例において、光入力ポートとなる光導波路102と光導波路103とは、光出力ポートとなる光導波路104の延長線に対して対称に配置されている。
As shown in FIGS. 8 and 9, in the Y junction device with bias port 1a-1 according to the present embodiment, the optical waveguide 102, the optical waveguide 103, and the optical waveguide 104 are connected to each other at their respective ends. It constitutes a confluence element. Each of the optical waveguide 102 and the optical waveguide 103 is an optical waveguide for inputting signal light, and functions as a set of optical input ports. The optical waveguide 104 is an optical waveguide for outputting signal light and functions as an optical output port.
In this embodiment, the optical waveguide 102 and the optical waveguide 103 serving as an optical input port are disposed symmetrically with respect to an extension line of the optical waveguide 104 serving as an optical output port.
 一方、光導波路105は、バイアス光入力用の光導波路であり、バイアスポートとして作用する。
 バイアスポートとなる光導波路105は、光導波路102と光導波路103との間に配置されている。より具体的には、光導波路105は、光導波路104の延長線上に配置されている。
On the other hand, the optical waveguide 105 is an optical waveguide for bias light input and acts as a bias port.
The optical waveguide 105 serving as a bias port is disposed between the optical waveguide 102 and the optical waveguide 103. More specifically, the optical waveguide 105 is disposed on an extension line of the optical waveguide 104.
 光導波路105のY合流素子に近い方の一端は、平面視でテーパー状に形成されている。このテーパー状に形成された光導波路105の一端を「テーパー部105a」とよぶ。このテーパー部105aは、Y合流素子の光導波路102と光導波路103とに空隙を隔てて近接して配置されている。その結果、光導波路102および光導波路103と光導波路105とが互いに光学的に結合する。 One end of the optical waveguide 105 closer to the Y junction element is formed in a taper shape in plan view. One end of the tapered optical waveguide 105 is referred to as a “tapered portion 105a”. The tapered portion 105a is disposed in close proximity to the optical waveguide 102 and the optical waveguide 103 of the Y junction element with a gap. As a result, the optical waveguide 102 and the optical waveguide 103 and the optical waveguide 105 are optically coupled to each other.
 このようなバイアスポート付きY合流素子1a-1においては、光入力ポートである光導波路102と光導波路103をそれぞれ伝播してきた入力信号光が、光導波路105を伝播してきたバイアス光と干渉して、光出力ポートとなる光導波路104から出力光が出力される。 In such a Y-junction element 1a-1 with a bias port, the input signal light propagated through the optical waveguide 102 and the optical waveguide 103, which are optical input ports, interferes with the bias light propagated through the optical waveguide 105, respectively. The output light is output from the optical waveguide 104 serving as an optical output port.
 バイアスポート付きY合流素子1a-1は、次のような工程によって製造することができる。すなわち、低損失な単結晶シリコン層をもつSilicon on insulator(SOI)基板を用意し、フォトリソグラフィ技術により、単結晶シリコン層の表面に塗布した感光材を、例えば図9に示すような所定のパターンにパターンニングした後、シリコン層をエッチングすれば、図8に示すような素子を得ることができる。 The Y junction element 1a-1 with a bias port can be manufactured by the following process. That is, a silicon-on-insulator (SOI) substrate having a low-loss single crystal silicon layer is prepared, and a photosensitive material applied to the surface of the single crystal silicon layer by a photolithography technique is applied to a predetermined pattern as shown in FIG. If the silicon layer is etched after patterning, an element as shown in FIG. 8 can be obtained.
 図10はバイアスポート付きY合流素子1a-1の別の構成を示す斜視図、図11はバイアスポート付きY合流素子1a-1の別の構成を示す平面図である。
 このバイアスポート付きY合流素子1a-1は、図10に示すように、シリカ(SiO2)等の第1の誘電体材料からなる基板201と、この基板201の一の面201a上に形成され、シリコン(Si)等、第1の誘電体材料より高い屈折率を有する第2の誘電体材料からなる光導波路202、光導波路203、光導波路204、光導波路205とを備える。ここで光導波路202および光導波路203は、光入力ポートとして作用し、光導波路204は光出力ポートとして作用し、光導波路205はバイアスポートとして作用する。
FIG. 10 is a perspective view showing another configuration of the Y junction element 1a-1 with bias port, and FIG. 11 is a plan view showing another configuration of the Y junction element 1a-1 with bias port.
As shown in FIG. 10, the Y junction element 1a-1 with a bias port is formed on a substrate 201 made of a first dielectric material such as silica (SiO 2 ) and one surface 201a of the substrate 201. , Optical waveguide 202, optical waveguide 203, optical waveguide 204, and optical waveguide 205 made of a second dielectric material having a higher refractive index than that of the first dielectric material, such as silicon (Si). Here, the optical waveguide 202 and the optical waveguide 203 act as optical input ports, the optical waveguide 204 acts as an optical output port, and the optical waveguide 205 acts as a bias port.
 図10、図11のバイアスポート付きY合流素子1a-1においては、光入力ポートとして作用する光導波路202と光導波路203との間に、バイアスポートとして作用する光導波路205が配置されている。また、光導波路202と光導波路203とは、平面視で光導波路205に対して互いに対称となるように配置されている。
 光導波路205と、光出力ポートとして作用する光導波路204とは、その一端において互いに接続されている。
In the Y merge element 1a-1 with bias port of FIGS. 10 and 11, an optical waveguide 205 acting as a bias port is disposed between the optical waveguide 202 acting as an optical input port and the optical waveguide 203. The optical waveguide 202 and the optical waveguide 203 are arranged so as to be symmetric with respect to the optical waveguide 205 in plan view.
The optical waveguide 205 and the optical waveguide 204 acting as an optical output port are connected to each other at one end thereof.
 光入力ポートである光導波路202および光導波路203は、それぞれバイアスポートである光導波路205と結合する結合部202a,203aを有する。すなわち、結合部202a,203aは、それぞれ光導波路204と間隔gDCを隔てて平行に配置された、光導波路202と光導波路203の先端部近傍の長さLDC分の部分である。このように光導波路202と光導波路203とがそれぞれ結合部202a,203aを備えることによって、光導波路202および光導波路203と光導波路205とは、互いに結合可能な程度に離間して、方向性結合器を形成している。結合部202a、203aの長さLDCは、3dB結合長の90%程度とすることが望ましい。 The optical waveguide 202 and the optical waveguide 203 that are optical input ports have coupling portions 202a and 203a that are coupled to the optical waveguide 205 that is a bias port. That is, the coupling portions 202a and 203a are portions corresponding to the length L DC in the vicinity of the tip portions of the optical waveguide 202 and the optical waveguide 203, which are arranged in parallel with the optical waveguide 204 with a gap g DC therebetween. As described above, the optical waveguide 202 and the optical waveguide 203 are provided with the coupling portions 202a and 203a, respectively, so that the optical waveguide 202 and the optical waveguide 203 and the optical waveguide 205 are separated so as to be coupled to each other and are directionally coupled. A vessel is formed. The length L DC of the coupling portions 202a and 203a is preferably about 90% of the 3 dB coupling length.
 以上のように、バイアスポート付きY合流素子1a-1の構成について説明したが、他のバイアスポート付きY合流素子1a-2~1a-Nの構成もバイアスポート付きY合流素子1a-1と同様である。 As described above, the configuration of the Y junction element 1a-1 with the bias port has been described. However, the configurations of the other Y junction elements 1a-2 to 1a-N with the bias port are the same as those of the Y junction element 1a-1 with the bias port. It is.
 本実施例では、図示しない連続レーザ光源から全てのバイアスポート付きY合流素子1a-1~1a-Nのバイアスポートに固定強度Pbiasのバイアス光を入力する。各バイアスポート付きY合流素子1a-1~1a-Nの2つの光入力ポートに入力される信号光とバイアスポートに入力されるバイアス光の位相は同相とする。 In the present embodiment, bias light having a fixed intensity P bias is input from a continuous laser light source (not shown) to the bias ports of all Y junction elements 1a-1 to 1a-N with bias ports. The phases of the signal light input to the two optical input ports of the Y junction elements 1a-1 to 1a-N with the bias ports and the bias light input to the bias port are in phase.
 第1の実施例と同様に、バイアスポート付きY合流素子1a-i(i=1~N)の2つの光入力ポートそれぞれから入力された光の、Y合流素子1a-iの光出力ポートへの透過率Tを共に0.25とした場合に、異なるバイアス光強度下での入出力特性を図12(A)~図12(C)に示す。図12(A)~図12(C)の横軸は電気デジタル信号、縦軸はNビット光DACの光出力強度を正規化した値である。 Similar to the first embodiment, the light input from each of the two optical input ports of the Y merge element 1a-i (i = 1 to N) with the bias port is output to the optical output port of the Y merge element 1a-i. FIG. 12A to FIG. 12C show input / output characteristics under different bias light intensities when both transmittances T are 0.25. 12A to 12C, the horizontal axis represents an electric digital signal, and the vertical axis represents a value obtained by normalizing the optical output intensity of the N-bit optical DAC.
 図12(A)はバイアス光の透過率Tbiasとバイアス光の強度Pbiasとの積Tbiasbiasが0の場合を示し、図12(B)はTbiasbiasが0.0625の場合を示し、図12(C)はTbiasbiasが0.25の場合を示している。図12(A)~図12(C)中に破線301で示した特性は、実線300で示す実際の入出力特性を線形近似した特性を表す。R2は実際の入出力特性と線形近似との平均2乗誤差である。図12(A)~図12(C)の例では、平均2乗誤差R2は0.9373、0.9926、0.9973である。このように、Tbiasbiasが増大するほど、Nビット光DACの入出力関係が2次関数から1次関数に漸近する。 12A shows a case where the product T bias P bias of the transmittance T bias of bias light and the intensity P bias of the bias light is 0, and FIG. 12B shows a case where T bias P bias is 0.0625. FIG. 12C shows a case where T bias P bias is 0.25. A characteristic indicated by a broken line 301 in FIGS. 12A to 12C represents a characteristic obtained by linearly approximating an actual input / output characteristic indicated by a solid line 300. R 2 is the mean square error between the actual input / output characteristics and the linear approximation. In the examples of FIGS. 12A to 12C, the mean square error R 2 is 0.9373, 0.9926, and 0.9973. Thus, as T bias P bias increases, the input / output relationship of the N-bit optical DAC gradually approaches a linear function from a quadratic function.
 したがって、バイアス光の強度Pbiasを適切に調整すれば、入力デジタル信号と光検出器6の出力との関係を線形な関係にすることができ、電気回路側で光検出器6の出力を平方根処理する必要がなくなる。 Therefore, if the intensity P bias of the bias light is appropriately adjusted, the relationship between the input digital signal and the output of the photodetector 6 can be made linear, and the output of the photodetector 6 can be square root on the electric circuit side. No need to process.
 ただし、図12(A)~図12(C)から明らかなように、Tbiasbiasが増大するほど、切片(全ての入力ビットが“0”のときの光出力強度)もゼロから徐々に増大する。したがって,光電変換後の平方根処理の代わりに、電気回路側で切片を除去する減算処理が必要になるが、この処理はしきい値処理器を用いて比較的簡単かつ高速に実現できる。 However, as is apparent from FIGS. 12A to 12C, the intercept (light output intensity when all input bits are “0”) gradually increases from zero as T bias P bias increases. Increase. Therefore, subtraction processing for removing the intercept on the electric circuit side is required instead of square root processing after photoelectric conversion, but this processing can be realized relatively easily and at high speed using a threshold processor.
 なお、本実施例は第2、第3の実施例に適用することもできる。第2、第3の実施例に適用する場合には、各Y合流・Y分岐素子10-1~10-NのY合流素子11と、Y合流素子13とをそれぞれバイアスポート付きY合流素子に置き換えるようにすればよい。 Note that this embodiment can also be applied to the second and third embodiments. When applied to the second and third embodiments, the Y junction element 11 and the Y junction element 13 of each of the Y junction / Y branch elements 10-1 to 10-N are respectively used as Y junction elements with bias ports. Replace it.
[第5の実施例]
 次に、本発明の第5の実施例について説明する。本実施例は、上記の(II)の方法を採用したものである。図13は本実施例に係る光演算器であるNビット光DACの構成を示すブロック図であり、図1と同様の構成には同一の符号を付してある。図13の例では、N=8とし、図1に相当する光DAC演算部30とコヒーレント検波部31とを集積化している。
[Fifth embodiment]
Next, a fifth embodiment of the present invention will be described. In this example, the above method (II) is adopted. FIG. 13 is a block diagram showing the configuration of an N-bit optical DAC that is an optical computing unit according to the present embodiment. The same components as those in FIG. 1 are denoted by the same reference numerals. In the example of FIG. 13, N = 8, and the optical DAC calculation unit 30 and the coherent detection unit 31 corresponding to FIG. 1 are integrated.
 連続レーザ光源32からの連続レーザ光は、Y分岐素子33によって2等分される。Y分岐素子33によって分岐された一方の連続光は、光導波路34を介してY分岐素子35に入力される。Y分岐素子35は、光導波路34から入力される連続光を2等分する。Y分岐素子35によって分岐された一方の連続光は、光導波路36を介してY分岐素子38に入力され、分岐された他方の連続光は、光導波路37を介してY分岐素子39に入力される。 The continuous laser light from the continuous laser light source 32 is divided into two equal parts by the Y branch element 33. One continuous light branched by the Y branch element 33 is input to the Y branch element 35 via the optical waveguide 34. The Y branch element 35 divides the continuous light input from the optical waveguide 34 into two equal parts. One continuous light branched by the Y branch element 35 is input to the Y branch element 38 via the optical waveguide 36, and the other continuous light branched is input to the Y branch element 39 via the optical waveguide 37. The
 Y分岐素子38は、光導波路36から入力される連続光を2等分し、Y分岐素子39は、光導波路37から入力される連続光を2等分する。Y分岐素子38によって分岐された一方の連続光は、光導波路40を介してY分岐素子44に入力され、分岐された他方の連続光は、光導波路41を介してY分岐素子45に入力される。Y分岐素子39によって分岐された一方の連続光は、光導波路42を介してY分岐素子46に入力され、分岐された他方の連続光は、光導波路43を介してY分岐素子47に入力される。 The Y branch element 38 divides the continuous light input from the optical waveguide 36 into two equal parts, and the Y branch element 39 divides the continuous light input from the optical waveguide 37 into two equal parts. One continuous light branched by the Y branch element 38 is input to the Y branch element 44 via the optical waveguide 40, and the other continuous light branched is input to the Y branch element 45 via the optical waveguide 41. The One continuous light branched by the Y branch element 39 is input to the Y branch element 46 via the optical waveguide 42, and the other continuous light branched is input to the Y branch element 47 via the optical waveguide 43. The
 Y分岐素子44は、光導波路40から入力される連続光を2等分し、Y分岐素子45は、光導波路41から入力される連続光を2等分する。Y分岐素子46は、光導波路42から入力される連続光を2等分し、Y分岐素子47は、光導波路43から入力される連続光を2等分する。 The Y branch element 44 divides the continuous light input from the optical waveguide 40 into two equal parts, and the Y branch element 45 divides the continuous light input from the optical waveguide 41 into two equal parts. The Y branch element 46 divides the continuous light input from the optical waveguide 42 into two equal parts, and the Y branch element 47 divides the continuous light input from the optical waveguide 43 into two equal parts.
 Y分岐素子44によって分岐された一方の連続光は、光導波路3-8に入力され、分岐された他方の連続光は、光導波路3-5に入力される。Y分岐素子45によって分岐された一方の連続光は、光導波路3-4に入力され、分岐された他方の連続光は、光導波路3-1に入力される。Y分岐素子46によって分岐された一方の連続光は、光導波路3-2に入力され、分岐された他方の連続光は、光導波路3-3に入力される。Y分岐素子47によって分岐された一方の連続光は、光導波路3-6に入力され、分岐された他方の連続光は、光導波路3-7に入力される。こうして、第1の実施例で説明した光導波路3-1~3-8への連続光の入力を実現することができる。
 図13の48-1~48-8は第1の実施例で説明した移相器である。
One continuous light branched by the Y branch element 44 is input to the optical waveguide 3-8, and the other continuous light branched is input to the optical waveguide 3-5. One continuous light branched by the Y branching element 45 is input to the optical waveguide 3-4, and the other continuous light branched is input to the optical waveguide 3-1. One continuous light branched by the Y branch element 46 is input to the optical waveguide 3-2, and the other continuous light branched is input to the optical waveguide 3-3. One continuous light branched by the Y branching element 47 is input to the optical waveguide 3-6, and the other continuous light branched is input to the optical waveguide 3-7. In this way, continuous light input to the optical waveguides 3-1 to 3-8 described in the first embodiment can be realized.
Reference numerals 48-1 to 48-8 in FIG. 13 denote the phase shifters described in the first embodiment.
 コヒーレント検波部31は、Y分岐素子33の他方の光出力ポートに接続された光導波路50と、光導波路50に設けられた移相器51と、光導波路4と光導波路50の伝播光を等しい比率で合流させ2等分して出力する3dBカプラ52(MMIカプラ)と、3dBカプラ52の一方の出力光を電気信号に変換する光検出器53と、3dBカプラ52の他方の出力光を電気信号に変換する光検出器54とから構成される。 The coherent detection unit 31 equalizes the optical waveguide 50 connected to the other optical output port of the Y-branch element 33, the phase shifter 51 provided in the optical waveguide 50, and the propagation light of the optical waveguide 4 and the optical waveguide 50. A 3 dB coupler 52 (MMI coupler) that merges at a ratio and outputs the result by dividing into two, a photodetector 53 that converts one output light of the 3 dB coupler 52 into an electrical signal, and the other output light of the 3 dB coupler 52 are electrically It is comprised from the photodetector 54 converted into a signal.
 移相器51については、図13の構成を8ビット光DACとして動作させる前に、光DAC演算部30から光導波路4を伝播して3dBカプラ52に入力される出力光と、光導波路50を伝播して3dBカプラ52に入力される参照光との位相差がπ/2となるように予め調整しておけばよい。 For the phase shifter 51, before operating the configuration of FIG. 13 as an 8-bit optical DAC, the output light propagating through the optical waveguide 4 from the optical DAC arithmetic unit 30 and input to the 3 dB coupler 52, and the optical waveguide 50 It may be adjusted in advance so that the phase difference from the reference light that is propagated and input to the 3 dB coupler 52 becomes π / 2.
 3dBカプラ52からの2つの出力を異なる2つの光検出器53,54で受け、光検出器53,54から出力された2つの電気信号の差分を減算器(不図示)によって求める。こうして、所謂バランスドディテクタの構成を用いることにより、光振幅値を検出することができる。 The two outputs from the 3 dB coupler 52 are received by two different photodetectors 53 and 54, and the difference between the two electrical signals output from the photodetectors 53 and 54 is obtained by a subtracter (not shown). In this way, the optical amplitude value can be detected by using a so-called balanced detector configuration.
 通常のコヒーレント光受信器では、信号光の光源と異なる局発光の位相を同期させて参照光とする。この位相同期に大きなコストを要する。一方、本実施例のような光演算器の場合は送信器と受信器が至近距離で一体化したような構成をとるため、参照光用にコヒーレント検波部31を用意するだけで、光DAC演算部30と同一の連続レーザ光源32によるホモダイン検波が可能である。 In a normal coherent optical receiver, the phase of the local light different from the light source of the signal light is synchronized and used as the reference light. This phase synchronization requires a large cost. On the other hand, in the case of the optical computing unit as in this embodiment, since the transmitter and the receiver are integrated at a close distance, the optical DAC computation is performed only by preparing the coherent detection unit 31 for the reference light. The homodyne detection using the same continuous laser light source 32 as that of the unit 30 is possible.
 本実施例では、ホモダイン検波を第1の実施例に適用した例を説明したが、第2~第4の実施例に適用してもよい。
 第2の実施例に適用する場合には、光導波路15-1~15-Nと同じ連続レーザ光源からの光が3dBカプラの一方の光入力ポートに入力され、光導波路16-1~16-(N-1),17からの光が3dBカプラの他方の光入力ポートに入力されるようにコヒーレント検波部を、それぞれ光検出器23-1~23-Nの代わりに設けるようにすればよい。
In this embodiment, the example in which homodyne detection is applied to the first embodiment has been described, but it may be applied to the second to fourth embodiments.
When applied to the second embodiment, light from the same continuous laser light source as the optical waveguides 15-1 to 15-N is input to one optical input port of the 3 dB coupler, and the optical waveguides 16-1 to 16- A coherent detector may be provided instead of the photodetectors 23-1 to 23-N so that the light from (N-1) and 17 is input to the other optical input port of the 3 dB coupler. .
 第3の実施例に適用する場合には、光導波路15-1~15-Nと同じ連続レーザ光源からの光が3dBカプラの一方の光入力ポートに入力され、光導波路17,22からの光が3dBカプラの他方の光入力ポートに入力されるようにコヒーレント検波部を、それぞれ光検出器24,25の代わりに設けるようにすればよい。 When applied to the third embodiment, light from the same continuous laser light source as the optical waveguides 15-1 to 15-N is input to one optical input port of the 3 dB coupler, and light from the optical waveguides 17 and 22 is input. May be provided in place of the photodetectors 24 and 25, respectively, so that is input to the other optical input port of the 3 dB coupler.
 第4の実施例に適用する場合には、光導波路3-1~3-Nと同じ連続レーザ光源からの光が3dBカプラの一方の光入力ポートに入力され、光導波路4からの光が3dBカプラの他方の光入力ポートに入力されるようにコヒーレント検波部を、光検出器6の代わりに設けるようにすればよい。 When applied to the fourth embodiment, light from the same continuous laser light source as the optical waveguides 3-1 to 3 -N is input to one optical input port of the 3 dB coupler, and light from the optical waveguide 4 is 3 dB. What is necessary is just to provide a coherent detection part instead of the photodetector 6 so that it may input into the other optical input port of a coupler.
[第6の実施例]
 次に、本発明の第6の実施例について説明する。第1、第4、第5の実施例では、Y合流素子1-i,1a-i(i=1~N)の2つの光入力ポート(第4の実施例のバイアスポートを除く)それぞれから入力された光の、Y合流素子1-i,1a-iの光出力ポートへの透過率Tを0.25としている。また、第2、第3の実施例では、Y合流・Y分岐素子10-j(jは1~(N-1)の整数)を構成するY合流素子11の2つの光入力ポートそれぞれに入力された光の、Y合流素子11の光出力ポートへの透過率T11を0.5とし、Y合流・Y分岐素子10-jを構成するY分岐素子12の光入力ポートに入力された光の、Y分岐素子12の2つの光出力ポートへの透過率T12を0.5としている。これにより、第1~第5の実施例では、Nビット電気デジタル信号のLSBを除く各ビットに対応する(N-1)個の光がそれぞれ隣接する下位ビットに対応する光に対して4倍(6dB)の光強度を有するように、N個の光に光強度差が付与される。
[Sixth embodiment]
Next, a sixth embodiment of the present invention will be described. In the first, fourth, and fifth embodiments, the two optical input ports (except the bias port of the fourth embodiment) of the Y junction elements 1-i and 1a-i (i = 1 to N) are respectively used. The transmittance T of the input light to the optical output ports of the Y converging elements 1-i and 1a-i is 0.25. In the second and third embodiments, the signals are input to the two optical input ports of the Y junction element 11 constituting the Y junction / Y branch element 10-j (j is an integer from 1 to (N-1)). The transmitted light T 11 to the optical output port of the Y-merging element 11 is set to 0.5, and the light input to the optical input port of the Y-branching element 12 constituting the Y-merging / Y-branching element 10-j The transmittance T 12 to the two optical output ports of the Y branch element 12 is 0.5. As a result, in the first to fifth embodiments, (N−1) light beams corresponding to the respective bits excluding the LSB of the N-bit electric digital signal are four times as large as the light beams corresponding to the adjacent lower bits. A light intensity difference is given to the N lights so as to have a light intensity of (6 dB).
 このように第1~第5の実施例では、変調器の出力側でNビット電気デジタル信号に対応するN個の光に光強度差を付与しているが、本実施例は、変調器の出力側だけでなく入力側においてもN個の光に光強度差を付与するようにしたものである。
 図14は本実施例に係る光演算器であるNビット光DACの構成を示すブロック図である。
As described above, in the first to fifth embodiments, the light intensity difference is given to the N lights corresponding to the N-bit electric digital signal on the output side of the modulator. A light intensity difference is given to N pieces of light not only on the output side but also on the input side.
FIG. 14 is a block diagram illustrating a configuration of an N-bit optical DAC that is an optical arithmetic unit according to the present embodiment.
 本実施例のNビット光DAC60は、縦続接続された1入力2出力のN個のY分岐素子61-1~61-N(本実施例ではN=4)と、初段のY分岐素子61-1の光入力ポートに接続された光導波路62-1と、(M-1)段目のY分岐素子61-(M-1)の一方の光出力ポートとM段目のY分岐素子61-Mの光入力ポートとを接続して、Y分岐素子61-(M-1)から出力された光をY分岐素子61-Mに入力する光導波路62-Mと(M=2~Nの整数)、Y分岐素子61-1~61-Nの他方の光出力ポートに接続された光導波路63-N~63-1と、光導波路63-1~63-Nに設けられた光強度変調器64-1~64-N(光変調器)と、一方の光入力ポートが光導波路63-1~63-Nに接続され、他方の光入力ポートが前段のY合流素子の光出力ポートに接続されるように縦続接続された2入力1出力のN個のY合流素子65-1~65-Nと、初段のY合流素子65-1の他方の光入力ポートに接続された光導波路66-1と、(M-1)段目のY合流素子65-(M-1)の光出力ポートとM段目のY合流素子65-Mの他方の光入力ポートとを接続して、Y合流素子65-(M-1)から出力された光をY合流素子65-Mに入力する光導波路66-Mと、最終段のY合流素子65-Nの光出力ポートに接続された光導波路67と、Y合流素子65-1~65-Nによって合流する光の位相が同相となるように調整可能な移相器68-1~68-Nとから構成される。上記のとおり、図14の例では、N=4としている。 The N-bit optical DAC 60 according to the present embodiment includes 1-input 2-output N Y branch elements 61-1 to 61-N (N = 4 in the present embodiment) cascaded and the first stage Y branch element 61- The optical waveguide 62-1 connected to one optical input port, one optical output port of the (M-1) -th stage Y branch element 61- (M-1), and the M-th stage Y branch element 61-. An optical waveguide 62-M for connecting the M optical input port and inputting the light output from the Y branch element 61- (M-1) to the Y branch element 61-M (an integer from M = 2 to N) ), Optical waveguides 63-N to 63-1 connected to the other optical output ports of the Y branch elements 61-1 to 61-N, and light intensity modulators provided in the optical waveguides 63-1 to 63-N 64-1 to 64-N (optical modulator) and one optical input port are connected to the optical waveguides 63-1 to 63-N, and the other optical input Two Y-input N-output elements 65-1 to 65-N cascaded so that the ports are connected to the optical output port of the Y-junction element at the previous stage, and the Y-junction element 65-1 at the first stage The optical waveguide 66-1 connected to the other optical input port, the optical output port of the (M-1) stage Y junction element 65- (M-1), and the M stage Y junction element 65-M. An optical waveguide 66-M that connects the other optical input port to input the light output from the Y combining element 65- (M-1) to the Y combining element 65-M, and the Y combining element 65 in the final stage. -Phase shifters 68-1 to 68-N that can be adjusted so that the phases of the light combined by the optical waveguide 67 connected to the -N optical output port and the Y combining elements 65-1 to 65-N are in phase. It consists of. As described above, N = 4 in the example of FIG.
 各Y分岐素子61-i(i=1~N)は、光導波路62-iの伝播光を2等分する(分岐比1:1)。このとき、Y分岐素子61-iの光入力ポートに入力された光の、Y分岐素子61-iの2つの光出力ポートへの透過率Tは共に0.5である。このように、各Y分岐素子61-iは、単一の連続光を入力とする最上流のY分岐素子を除く各Y分岐素子が、上流のY分岐素子の2つの光出力ポートのうち一方の光出力ポートから出力される光を入力とするように縦続接続されている。 Each Y branch element 61-i (i = 1 to N) divides the propagation light of the optical waveguide 62-i into two equal parts (branch ratio 1: 1). At this time, the transmittance T of the light input to the optical input port of the Y branch element 61-i to the two optical output ports of the Y branch element 61-i is both 0.5. Thus, each Y branch element 61-i is one of the two optical output ports of the upstream Y branch element except for the most upstream Y branch element that receives a single continuous light. Are connected in cascade so as to receive light output from the optical output port.
 これにより、単一の連続レーザ光源(不図示)からの連続レーザ光をNビット電気デジタル信号の各ビットに対応するN個の連続光に分岐させると共に、Nビット電気デジタル信号のLSBを除く各ビットに対応する(N-1)個の連続光がそれぞれ隣接する下位ビットに対応する連続光に対して2倍(3dB)の光強度を有するように、N個の連続光に光強度差を付与することができる。 Thereby, the continuous laser light from a single continuous laser light source (not shown) is branched into N continuous lights corresponding to the respective bits of the N-bit electric digital signal, and each of the N-bit electric digital signals excluding the LSB. A difference in light intensity is applied to the N continuous lights so that (N−1) continuous lights corresponding to the bits have twice (3 dB) light intensity as compared to the continuous lights corresponding to the adjacent lower bits. Can be granted.
 Nビット電気デジタル信号のMSBから数えてi番目のビットに対応する光は、最上流からi番目のY分岐素子61-iの2つの光出力ポートのうち後段のY分岐素子が接続されていない光出力ポートから出力される。光導波路63-iへの光入力は、LSBから数えてi番目のビットの入力に対応する。 The light corresponding to the i-th bit counted from the MSB of the N-bit electric digital signal is not connected to the subsequent Y-branch element of the two optical output ports of the i-th Y-branch element 61-i from the most upstream. Output from the optical output port. The optical input to the optical waveguide 63-i corresponds to the input of the i-th bit counted from the LSB.
 光強度変調器5-1~5-Nと同様に、Nビット電気デジタル信号のビット毎に設けられる光強度変調器64-1~64-Nは、それぞれ対応する電気デジタル信号のビット入力が“0”の場合は光導波路63-1~63-Nを伝播する連続光を遮断し、ビット入力が“1”の場合は連続光を通過させる。 Similar to the light intensity modulators 5-1 to 5 -N, the light intensity modulators 64-1 to 64 -N provided for each bit of the N-bit electric digital signal each have a bit input of the corresponding electric digital signal “ When 0, the continuous light propagating through the optical waveguides 63-1 to 63-N is blocked, and when the bit input is 1, the continuous light is allowed to pass.
 光導波路2-1と同様に、光導波路66-1は、ゼロ入力に対応する。すなわち、光導波路66-1には光を入力しない。Y合流素子65-iは、光導波路66-iと光導波路63-iの伝播光を等しい比率(合流比1:1)で合流させて出力する。このとき、Y合流素子65-iの2つの光入力ポートそれぞれから入力された光の、Y合流素子65-iの光出力ポートへの透過率Tは共に0.5である。このように、各Y合流素子65-iは、光強度変調器64-iによって強度変調された信号光を一方の光入力とし、最上流のY合流素子を除く各Y合流素子が、上流のY合流素子の光出力ポートから出力された光を他方の光入力とするように縦続接続されている。 Similar to the optical waveguide 2-1, the optical waveguide 66-1 corresponds to zero input. That is, no light is input to the optical waveguide 66-1. The Y merge element 65-i merges the light propagated through the optical waveguide 66-i and the optical waveguide 63-i at an equal ratio (merging ratio 1: 1) and outputs the merged light. At this time, the transmittance T of the light input from each of the two optical input ports of the Y merge element 65-i to the optical output port of the Y merge element 65-i is both 0.5. In this way, each Y merge element 65-i receives the signal light intensity-modulated by the light intensity modulator 64-i as one optical input, and each Y merge element excluding the most upstream Y merge element is located upstream. Cascade connection is performed so that the light output from the light output port of the Y junction element is used as the other light input.
 これにより、光強度変調器64-1~64-Nによって強度変調されたN個の信号光を1つに合流させると共に、Nビット電気デジタル信号のLSBを除く各ビットに対応する(N-1)個の信号光がそれぞれ隣接する下位ビットに対応する連続光に対して2倍(3dB)の光強度を有するように、N個の信号光に光強度差を付与することができる。 As a result, the N signal lights intensity-modulated by the light intensity modulators 64-1 to 64-N are merged into one and correspond to each bit except the LSB of the N-bit electric digital signal (N−1). It is possible to give a light intensity difference to the N signal lights so that each of the signal lights has a light intensity twice (3 dB) with respect to the continuous light corresponding to the adjacent lower bits.
 移相器68-1~68-Nは、光強度変調器64-1~64-Nが通過状態のときに、Y合流素子65-1~65-Nの光出力強度が最大となるように(各Y合流素子65-1~65-Nによって合流する光の位相が同相となるように)予め位相調整されている。 The phase shifters 68-1 to 68-N are configured so that the light output intensities of the Y junction elements 65-1 to 65-N are maximized when the light intensity modulators 64-1 to 64-N are in the passing state. The phase is adjusted in advance (so that the phases of the light combined by the Y combining elements 65-1 to 65-N are in phase).
 以上のような構成により、光導波路67からNビット光DAC60の最終的な光出力(output)が得られる。
 本実施例における演算損失Lossは次式のように定義することができる。
With the above configuration, the final optical output (output) of the N-bit optical DAC 60 can be obtained from the optical waveguide 67.
The calculation loss Loss in the present embodiment can be defined as follows:
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
 式(1)において、Pout_maxはNビット電気デジタル信号の入力が全て“1”であった場合の最大光出力強度、Pinは光入力強度(本実施例ではPin=1に固定)、Aout_maxは光出力振幅であり,Pout_maxの2乗根である。 Fixed in the formula (1), the maximum light output intensity when P out _ max were all input N-bit electric digital signal "1", the P in = 1 in P in the optical input intensity (in this embodiment ), a out _ max is the light output amplitude is the square root of the P out _ max.
 上記のとおりNビット光DAC60への入力光(input)の強度をPin=1としたとき、Nビット光DAC60の光出力(output)の振幅Aout_maxは次式のような漸化式で与えられる。 When the intensity of the input light (input The) to above as N bit optical DAC 60 and the P in = 1, the amplitude A out _ max of the light output of N bits light DAC 60 (output) is a recurrence formula as follows Given in.
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
 ここで、TはY合流素子65-1~65-Nの光強度透過率(理想的には0.5)である。式(2)の両辺を√(2n)で割ると、次式のようになる。 Here, T is the light intensity transmittance (ideally 0.5) of the Y junction elements 65-1 to 65-N. Dividing both sides of equation (2) by √ (2 n ) gives the following equation.
Figure JPOXMLDOC01-appb-M000003
Figure JPOXMLDOC01-appb-M000003
 したがって、an=pan-1+qになるので、式(3)を解くと次式が得られる。 Therefore, since the a n = pa n-1 + q, the following equation is obtained by solving Equation (3).
Figure JPOXMLDOC01-appb-M000004
Figure JPOXMLDOC01-appb-M000004
 式(4)にn=Nを代入すると次式のように整理できる。 When substituting n = N into equation (4), it can be arranged as the following equation.
Figure JPOXMLDOC01-appb-M000005
Figure JPOXMLDOC01-appb-M000005
 式(5)を式(1)に代入して求めた、ビット数NとNビット光DACの演算損失Lossとの関係は図15のようになる。図15の400は本実施例のNビット光DAC60の演算損失Lossを示し、401は第2、第3の実施例のNビット光DACの演算損失Lossを示している。第2、第3の実施例では、ビット数Nに対して演算損失Lossが単調増加であるのに対して、本実施例では、ビット数Nに対して演算損失Lossが単調減少し、損失ゼロに漸近することが分かる。
 本実施例では、ビット数Nに対して演算損失Lossが減少するため、高分解能化に適した構成を実現することができる。
The relationship between the number of bits N and the operation loss Loss of the N-bit optical DAC, which is obtained by substituting Equation (5) into Equation (1), is as shown in FIG. In FIG. 15, 400 indicates the operation loss Loss of the N-bit optical DAC 60 of this embodiment, and 401 indicates the operation loss Loss of the N-bit optical DAC of the second and third embodiments. In the second and third embodiments, the operation loss Loss monotonously increases with respect to the number of bits N, whereas in this embodiment, the operation loss Loss monotonously decreases with respect to the number of bits N and the loss is zero. Asymptotically,
In this embodiment, since the operation loss Loss decreases with respect to the number of bits N, a configuration suitable for high resolution can be realized.
 図14のNビット光DAC60を実際に運用する際の具体的な構成のパターンを図16(A)~図16(D)に示す。図16(A)は光出力のまま取り出す場合を示している。この場合、連続レーザ光源70からの連続レーザ光をNビット光DAC60に入力する。 FIG. 16A to FIG. 16D show specific configuration patterns when the N-bit optical DAC 60 of FIG. 14 is actually operated. FIG. 16A shows the case of taking out light output as it is. In this case, continuous laser light from the continuous laser light source 70 is input to the N-bit light DAC 60.
 図16(B)はNビット光DAC60の光出力を単一の光検出器71で直接検波する場合を示している。この場合、Nビット光DAC60の光出力を光検出器71で光電変換することにより電気信号を得ることができる。 FIG. 16B shows a case where the optical output of the N-bit optical DAC 60 is directly detected by a single photodetector 71. In this case, an electrical signal can be obtained by photoelectrically converting the optical output of the N-bit optical DAC 60 by the photodetector 71.
 図16(C)は特定振幅および位相の連続光をY合流素子74で足し合わせてから単一の光検出器75で直接検波する場合を示している。図16(C)の例では、連続レーザ光源70からの連続レーザ光をY分岐素子72によって2等分して、一方の連続光をNビット光DAC60に入力し、他方の連続光をY合流素子74によってNビット光DAC60の出力光と合波する。このとき、移相器73については、Y合流素子74の光出力強度が最大となるように予め位相調整されている。 FIG. 16C shows a case where continuous light having a specific amplitude and phase is added by the Y confluence element 74 and then directly detected by a single photodetector 75. In the example of FIG. 16C, the continuous laser light from the continuous laser light source 70 is divided into two equal parts by the Y-branch element 72, one continuous light is input to the N-bit light DAC 60, and the other continuous light is combined into Y. The element 74 combines with the output light of the N-bit optical DAC 60. At this time, the phase shifter 73 is phase-adjusted in advance so that the light output intensity of the Y junction element 74 is maximized.
 図16(D)はいわゆるコヒーレント検波をする場合を示している。図16(D)の例では、連続レーザ光源70からの連続レーザ光をY分岐素子76によって2等分して、一方の連続光をNビット光DAC60に入力し、他方の連続光を3dBカプラ(MMIカプラ)78によってNビット光DAC60の出力光と合流させる。移相器77については、Nビット光DAC60から3dBカプラ78に入力される出力光と、Y分岐素子76によって分岐された他方の連続光(参照光)との位相差がπ/2となるように予め調整しておけばよい。 FIG. 16D shows the case of so-called coherent detection. In the example of FIG. 16D, the continuous laser light from the continuous laser light source 70 is divided into two equal parts by the Y branching element 76, one continuous light is input to the N-bit light DAC 60, and the other continuous light is input to the 3 dB coupler. (MMI coupler) 78 joins the output light of the N-bit optical DAC 60. For the phase shifter 77, the phase difference between the output light input from the N-bit light DAC 60 to the 3 dB coupler 78 and the other continuous light (reference light) branched by the Y branch element 76 is π / 2. It may be adjusted in advance.
 3dBカプラ78は、Nビット光DAC60の出力光と移相器77によって位相調整された参照光とを等しい比率で合流させ2等分して出力する。光検出器79.80は、それぞれ3dBカプラ78の2つの出力光を電気信号に変換する。減算器81は、光検出器79,80から出力された2つの電気信号の差分を求める。
 図16(B)、図16(C)の直接検波の場合は二次関数の非線形な出力となるが、コヒーレント検波の場合は線形な出力となる。
The 3 dB coupler 78 combines the output light of the N-bit light DAC 60 and the reference light phase-adjusted by the phase shifter 77 at an equal ratio, and divides the output light into two equal parts. Each of the photodetectors 79.80 converts the two output lights of the 3 dB coupler 78 into electrical signals. The subtractor 81 obtains the difference between the two electrical signals output from the photodetectors 79 and 80.
In the case of direct detection in FIGS. 16B and 16C, a nonlinear output of a quadratic function is obtained, but in the case of coherent detection, a linear output is obtained.
 以下、本実施例の構成についてOptiwave社製のOptiSystemを用いたシミュレーション結果を示す。ここでは、図17の構成、すなわち図14と図16(B)を組み合わせた構成についてのシミュレーション結果を示す。シミュレーションの条件は以下のとおりである。 Hereinafter, simulation results using Optiwave manufactured by Optiwave are shown for the configuration of this example. Here, simulation results for the configuration of FIG. 17, that is, the configuration combining FIG. 14 and FIG. 16B are shown. The simulation conditions are as follows.
(I)レーザ光源70については、波長を1550nm、光強度を1mW、線幅を10MHz、初期位相を-90°とする。
(II)光強度変調器64-1~64-4については、損失無しとし、LSBのビットレートを10Gbps、消光比無限大、立ち上がり時間および立ち下がり時間を0.05ビット(8ps)とする。各ビットの光強度変調器64-1~64-4に電気デジタル信号“0000”から“1111”までを順次入力する。
(III)図17の構成で用いる光導波路およびカプラについては、損失無しとし、さらに光路長差による各ビットの光信号の伝搬遅延差および位相ずれも無しとする。したがって、常に同相で光が合流するため、図17の構成では、調整用の移相器68-1~68-Nを省いている。
(IV)光検出器71については、変換効率を1A/Wとし、ノイズ無し、帯域無制限とする。
(I) For the laser light source 70, the wavelength is 1550 nm, the light intensity is 1 mW, the line width is 10 MHz, and the initial phase is −90 °.
(II) The optical intensity modulators 64-1 to 64-4 are assumed to have no loss, the LSB bit rate is 10 Gbps, the extinction ratio is infinite, the rise time and the fall time are 0.05 bits (8 ps). Electric digital signals “0000” to “1111” are sequentially input to the light intensity modulators 64-1 to 64-4 of each bit.
(III) The optical waveguide and coupler used in the configuration of FIG. 17 are assumed to have no loss, and further, no propagation delay difference and phase shift of the optical signal of each bit due to the optical path length difference. Therefore, since the light always merges in the same phase, the phase shifters 68-1 to 68-N for adjustment are omitted in the configuration of FIG.
(IV) For the photodetector 71, the conversion efficiency is 1 A / W, no noise, and unlimited bandwidth.
 図17の構成について、各ビットの光信号強度の時間変化をシミュレーションで求めた結果を図18に示す。図18の縦軸は各ビットの光信号強度、横軸は時間である。図18によれば、Y合流素子65-1~65-4による合流の前に各ビット間で既に2倍(3dB)ずつ強度差がついていることが分かる。 FIG. 18 shows the results obtained by simulating the temporal change in the optical signal intensity of each bit in the configuration of FIG. In FIG. 18, the vertical axis represents the optical signal intensity of each bit, and the horizontal axis represents time. According to FIG. 18, it can be seen that the intensity difference is already doubled (3 dB) between the bits before joining by the Y joining elements 65-1 to 65-4.
 光検出器71で検出される光信号の強度Poutの時間変化をシミュレーションで求めた結果を図19に示す。図19によれば、光強度変調器64-1~64-4に電気デジタル信号“0000”から“1111”までを順次入力することにより、Poutが徐々に増大することが分かる。電気デジタル信号が“1111”のとき,Pout~879μWなので演算損失Loss~0.56dBであった。この光信号強度Poutの値は、式(5)で得られる値と一致している。 FIG. 19 shows a result of obtaining a temporal change in the intensity Pout of the optical signal detected by the photodetector 71 by simulation. According to FIG. 19, by sequentially input from the electric digital signal "0000" to "1111" to the light intensity modulators 64-1 to 64-4, it can be seen that P out is increased gradually. When the electric digital signal is “1111”, P out is 879 μW, so the operation loss is Loss to 0.56 dB. The value of the optical signal intensity Pout matches the value obtained by the equation (5).
 また、図19によると、ビット遷移、特に“0111”から“1000”間で見られる信号のスパイクが生じている。このスパイクは、光変調信号の立ち上がり時間および立ち下がり時間が有限であるため、瞬間的に意図しない信号同士が重なり合うことで生じているが、適切なローパスフィルタを用いることで除去できる。 Further, according to FIG. 19, there is a bit transition, particularly a signal spike seen between “0111” and “1000”. This spike is caused by the fact that signals that are not intended instantaneously overlap each other because the rise time and fall time of the light modulation signal are finite, but they can be removed by using an appropriate low-pass filter.
[第7の実施例]
 次に、本発明の第7の実施例について説明する。本実施例は、第6の実施例において光強度変調器の代わりに、光位相変調器を用いる例である。図20は本実施例に係る光演算器であるNビット光DACの構成を示すブロック図であり、図14と同一の構成には同一の符号を付してある。
[Seventh embodiment]
Next, a seventh embodiment of the present invention will be described. This embodiment is an example in which an optical phase modulator is used instead of the optical intensity modulator in the sixth embodiment. FIG. 20 is a block diagram showing a configuration of an N-bit optical DAC that is an optical computing unit according to the present embodiment. The same components as those in FIG. 14 are denoted by the same reference numerals.
 本実施例のNビット光DAC60aは、Y分岐素子61-1~61-N(本実施例ではN=4)と、光導波路62-1~62-N,63-1~63-N,66-1~66-N,67と、Y合流素子65-1~65-Nと、光導波路63-1~63-Nに設けられた光位相変調器69-1~69-N(光変調器)とから構成される。上記のとおり、図20の例では、N=4としている。 The N-bit optical DAC 60a of this embodiment includes Y branch elements 61-1 to 61-N (N = 4 in this embodiment), optical waveguides 62-1 to 62-N, 63-1 to 63-N, 66. -1 to 66-N, 67, Y junction elements 65-1 to 65-N, and optical phase modulators 69-1 to 69-N (optical modulators) provided in the optical waveguides 63-1 to 63-N. ). As described above, N = 4 in the example of FIG.
 Nビット電気デジタル信号のビット毎に設けられる光位相変調器69-1~69-Nは、それぞれ対応する電気デジタル信号のビット入力が“0”の場合は光導波路63-1~63-Nを伝播する連続光の位相を変化させずに出力し(同相)、対応する電気デジタル信号のビット入力が“1”の場合は光導波路63-1~63-Nを伝播する連続光の位相をπだけずらして出力する(逆相)。こうして、光導波路63-1~63-Nを伝播する連続光に、それぞれNビット電気デジタル信号の対応するビットに応じて同相(0)または逆相(π)の位相が個別に割り当てられる。 The optical phase modulators 69-1 to 69-N provided for each bit of the N-bit electric digital signal respectively pass the optical waveguides 63-1 to 63-N when the bit input of the corresponding electric digital signal is “0”. When the phase of the continuous light propagating is output without being changed (in phase), and the bit input of the corresponding electric digital signal is “1”, the phase of the continuous light propagating through the optical waveguides 63-1 to 63-N is π. Output by shifting only (reverse phase). In this way, in-phase (0) or anti-phase (π) phases are individually assigned to the continuous light propagating through the optical waveguides 63-1 to 63-N according to the corresponding bits of the N-bit electric digital signal.
 その他の構成は第6の実施例で説明したとおりである。本実施例では、Nビット光DAC60a内の移相器が不要となり、構成要素を減らすことができる。
 ただし、本実施例では、信号の振幅の正負を区別するためにコヒーレント検波が必須となる。すなわち、図20のNビット光DAC60aを実際に運用する際の具体的な構成のパターンは図16(D)のみとなる。
Other configurations are as described in the sixth embodiment. In this embodiment, the phase shifter in the N-bit optical DAC 60a is not necessary, and the number of components can be reduced.
However, in this embodiment, coherent detection is indispensable in order to distinguish between positive and negative of the signal amplitude. That is, the specific configuration pattern when actually operating the N-bit optical DAC 60a of FIG. 20 is only FIG.
 次に、本実施例の構成について第6の実施例と同様にOptiwave社製のOptiSystemを用いたシミュレーション結果を示す。ここでは、図21の構成、すなわち図20と図16(D)を組み合わせた構成についてのシミュレーション結果を示す。光強度変調器64-1~64-4の代わりに光位相変調器69-1~69-4を用いる点を除いて、シミュレーションの条件は上記の(I)~(IV)と同じである。 Next, the simulation result using the OptiSystem manufactured by Optiwave is shown in the same manner as the sixth embodiment for the configuration of the present embodiment. Here, simulation results for the configuration of FIG. 21, that is, the configuration combining FIG. 20 and FIG. The simulation conditions are the same as the above (I) to (IV) except that optical phase modulators 69-1 to 69-4 are used instead of the optical intensity modulators 64-1 to 64-4.
 図21の構成について、各ビットの光信号の絶対位相の時間変化をシミュレーションで求めた結果を図22に示す。本実施例は位相変調方式なので、各ビット間の位相差(相対位相)を0/πに変調している。各ビット間で4倍(6dB)ずつの光強度差がついているが、各ビットの光強度は時間に対して一定である。レーザ光の線幅が10MHzなので、絶対位相は初期位相を保つことなく変動しているが、全てのビットで同じレーザ光を共有しているので、ビット間の相対位相は0またはπに保たれている。 FIG. 22 shows a result obtained by simulating the temporal change of the absolute phase of the optical signal of each bit in the configuration of FIG. Since the present embodiment is a phase modulation system, the phase difference (relative phase) between each bit is modulated to 0 / π. Although there is a light intensity difference of 4 times (6 dB) between each bit, the light intensity of each bit is constant with respect to time. Since the line width of the laser beam is 10 MHz, the absolute phase fluctuates without maintaining the initial phase, but since all the bits share the same laser beam, the relative phase between the bits is kept at 0 or π. ing.
 図21の光導波路67に設けた光検出器82に100%の光を結合した場合に得られる光信号強度Poutの時間変化をシミュレーションで求めた結果を図23に示し、光検出器82で検出される光信号の絶対位相の時間変化をシミュレーションで求めた結果を図24に示す。光信号強度Poutが入力の電気デジタル信号の“0111”と“1000”の境で対称になっているのに対し、絶対位相は反転していることが確認された。 FIG. 23 shows a result obtained by simulating the temporal change of the optical signal intensity Pout obtained when 100% light is coupled to the photodetector 82 provided in the optical waveguide 67 of FIG. FIG. 24 shows a result obtained by simulating the time change of the absolute phase of the detected optical signal. It was confirmed that the optical phase intensity P out is symmetric at the boundary between “0111” and “1000” of the input electric digital signal, whereas the absolute phase is inverted.
 図21の減算器81から出力される電気信号強度の時間変化をシミュレーションで求めた結果を図25に示す。ホモダイン検波によって光信号の正負の電界振幅が検出され、デジタル入力の増大に対して出力が線形に増大していることを確認できた。 FIG. 25 shows the results obtained by simulating the temporal change in the electric signal intensity output from the subtracter 81 in FIG. The positive and negative electric field amplitudes of the optical signal were detected by homodyne detection, and it was confirmed that the output increased linearly with increasing digital input.
 本実施例では、位相変調方式を第6の実施例に適用した場合について説明しているが、位相変調方式を第1~第5の実施例に適用することが可能である。
 第1、第5の実施例に位相変調方式を適用した場合の構成を図26に示し、第2の実施例に位相変調方式を適用した場合の構成を図27に示し、第3の実施例に位相変調方式を適用した場合の構成を図28に示す。上記のとおり、位相変調方式ではコヒーレント検波が必須となるが、図26~図28ではホモダイン検波に関わる構成(図13のコヒーレント検波部31とY分岐素子33、図16(D)のY分岐素子76と移相器77と3dBカプラ78と光検出器79,80と減算器81)を省略している。
In this embodiment, the case where the phase modulation method is applied to the sixth embodiment has been described. However, the phase modulation method can be applied to the first to fifth embodiments.
FIG. 26 shows the configuration when the phase modulation method is applied to the first and fifth embodiments, FIG. 27 shows the configuration when the phase modulation method is applied to the second embodiment, and FIG. FIG. 28 shows a configuration when the phase modulation method is applied to the. As described above, coherent detection is indispensable in the phase modulation method, but in FIGS. 26 to 28, configurations related to homodyne detection (the coherent detection unit 31 and the Y branch element 33 in FIG. 13 and the Y branch element in FIG. 16D). 76, the phase shifter 77, the 3 dB coupler 78, the photodetectors 79 and 80, and the subtractor 81) are omitted.
[第8の実施例]
 第4の実施例では、第1、第5の実施例の全てのY合流素子1-1~1-Nをバイアスポート付きY合流素子に置き換え、また第2、第3の実施例の全てのY合流・Y分岐素子10-1~10-NのY合流素子11とY合流素子13とをバイアスポート付きY合流素子に置き換えているが、同様に、第6、第7の実施例の全てのY合流素子65-1~65-Nをバイアスポート付きY合流素子に置き換えるようにしてもよい。
[Eighth embodiment]
In the fourth embodiment, all Y junction elements 1-1 to 1-N of the first and fifth embodiments are replaced with Y junction elements with bias ports, and all of the second and third embodiments are replaced. The Y merge element 11 and the Y merge element 13 of the Y merge / Y branch elements 10-1 to 10-N are replaced with Y merge elements with bias ports. Similarly, all of the sixth and seventh embodiments are used. The Y junction elements 65-1 to 65-N may be replaced with Y junction elements with bias ports.
 第6の実施例のY合流素子65-1~65-Nをバイアスポート付きY合流素子65a-1~65a-Nに置き換えた構成を図29に示し、第7の実施例のY合流素子65-1~65-Nをバイアスポート付きY合流素子65a-1~65a-Nに置き換えた構成を図30に示す。同様に、図26~図28に示した構成においてY合流素子1-1~1-NとY合流・Y分岐素子10-1~10-NのY合流素子11とY合流素子13とをバイアスポート付きY合流素子に置き換えるようにしてもよい。 FIG. 29 shows a configuration in which the Y junction elements 65-1 to 65-N in the sixth embodiment are replaced with Y junction elements 65a-1 to 65a-N with bias ports. The Y junction element 65 in the seventh embodiment is shown in FIG. FIG. 30 shows a configuration in which −1 to 65-N are replaced with Y junction elements 65a-1 to 65a-N with bias ports. Similarly, in the configuration shown in FIGS. 26 to 28, the Y junction elements 1-1 to 1-N and the Y junction element 11 and the Y junction element 13 of the Y junction / Y branch elements 10-1 to 10-N are biased. You may make it replace with the Y junction element with a port.
 Y合流素子のバイアスポートにバイアス光を入力する本質的な意味は、光強度にオフセットを与えることで、入力デジタル信号と光DACの出力との線形性を向上させることにある。図31は入力デジタル信号と光DACの光検出器82で検出される光信号の強度との関係を示す図であり、310はバイアス光を入力しない場合の光DACの動作領域を示し、311はバイアス光を入力した場合の光DACの動作領域を示している。 The essential meaning of inputting the bias light to the bias port of the Y junction element is to improve the linearity between the input digital signal and the output of the optical DAC by giving an offset to the light intensity. FIG. 31 is a diagram showing the relationship between the input digital signal and the intensity of the optical signal detected by the optical DAC detector 82, 310 indicates the operation region of the optical DAC when no bias light is input, and 311 The operation region of the optical DAC when bias light is input is shown.
 したがって、光検出器の前にあるY合流素子のうちいずれか1つをバイアスポート付きY合流素子に置き換えるようにしてもよい。具体的には、図1、図13、図26のY合流素子1-1~1-Nのうちいずれか1つをバイアスポート付きY合流素子に置き換えてもよいし、図3、図5、図27、図28のY合流・Y分岐素子10-1~10-NのY合流素子11とY合流素子13のうちいずれか1つをバイアスポート付きY合流素子に置き換えてもよいし、図14、図20のY合流素子65-1~65-Nのうちいずれか1つをバイアスポート付きY合流素子に置き換えるようにしてもよい。 Therefore, any one of the Y merge elements in front of the photodetector may be replaced with a Y merge element with a bias port. Specifically, any one of the Y merge elements 1-1 to 1-N in FIGS. 1, 13, and 26 may be replaced with a Y merge element with a bias port, or FIGS. 27 and 28, any one of the Y merge element 11 and the Y merge element 13 of the Y merge / Y branch elements 10-1 to 10-N may be replaced with a Y merge element with a bias port. 14. One of the Y junction elements 65-1 to 65-N in FIG. 20 may be replaced with a Y junction element with a bias port.
 さらに、最終段にY合流素子を1つ追加して、このY合流素子にバイアス光を入力してもよい。第1、第5の実施例の光DACの最終段にY合流素子83を追加した場合の構成を図32に示し、第2の実施例の光DACの最終段にY合流素子83を追加した場合の構成を図33に示し、第3の実施例の光DACの最終段にY合流素子83を追加した場合の構成を図34に示し、第6の実施例の光DACの最終段にY合流素子83を追加した場合の構成を図35に示す。これら図32~図35の構成を位相変調方式にするには、光強度変調器5-1~5-N,18-1~18-N,64-1~64-Nを光位相変調器に置き換えるようにすればよい。 Furthermore, one Y junction element may be added to the final stage, and bias light may be input to this Y junction element. FIG. 32 shows the configuration when the Y junction element 83 is added to the final stage of the optical DAC of the first and fifth embodiments, and the Y junction element 83 is added to the final stage of the optical DAC of the second embodiment. FIG. 33 shows the configuration in this case, FIG. 34 shows the configuration when the Y junction element 83 is added to the final stage of the optical DAC of the third embodiment, and Y in the final stage of the optical DAC of the sixth embodiment. FIG. 35 shows a configuration when the junction element 83 is added. In order to make the configurations of FIGS. 32 to 35 into the phase modulation system, the light intensity modulators 5-1 to 5-N, 18-1 to 18-N, 64-1 to 64-N are used as the optical phase modulators. Replace it.
 本発明は、例えば電気デジタル信号を光回路を用いてアナログ信号に変換する技術に適用することができる。 The present invention can be applied to, for example, a technique for converting an electrical digital signal into an analog signal using an optical circuit.
 1,11,13,19,65,74,83…Y合流素子、1a,65a…バイアスポート付きY合流素子、2~4,14~17,20~22,34,36,37,40~43,50,62,63,66,67,102~105,202~205…光導波路、5,18,64…光強度変調器、6,23~25,53,54,71,75,79.80,82…光検出器、10…Y合流・Y分岐素子、12,33,35,38,39,44~47,61,72,76…Y分岐素子、30…光DAC演算部、31…コヒーレント検波部、32,70…連続レーザ光源、48-1~48-8,51,68,73,77…移相器、52,78…3dBカプラ、60,60a…Nビット光DAC、69…光位相変調器、81…減算器、101,201…基板。 1, 11, 13, 19, 65, 74, 83... Y junction element, 1a, 65a... Y junction element with bias port, 2 to 4, 14 to 17, 20 to 22, 34, 36, 37, 40 to 43 , 50, 62, 63, 66, 67, 102-105, 202-205 ... optical waveguide, 5, 18, 64 ... light intensity modulator, 6, 23-25, 53, 54, 71, 75, 79.80. , 82 ... photodetector, 10 ... Y converging / Y branching element, 12, 33, 35, 38, 39, 44 to 47, 61, 72, 76 ... Y branching element, 30 ... optical DAC arithmetic unit, 31 ... coherent Detection unit, 32, 70 ... Continuous laser light source, 48-1 to 48-8, 51, 68, 73, 77 ... Phase shifter, 52, 78 ... 3dB coupler, 60, 60a ... N-bit light DAC, 69 ... light Phase modulator, 81 ... subtractor, 101, 201 ... base .

Claims (9)

  1.  1乃至2の信号光を入力とする2入力1出力の第1のY合流素子と、1乃至2の信号光を入力とする2入力2出力のY合流・Y分岐素子とのうち少なくとも1種類の素子をN個(Nは2以上の整数)縦続接続し、
     この縦続接続されたN個の各素子の2つの光入力ポートのうち、入力光が無い第1の光入力ポート若しくは前段の素子の光出力ポートからの信号光が入力される第1の光入力ポートと異なる第2の光入力ポートへの連続光を、それぞれNビット電気デジタル信号の対応するビットに応じて個別に変調して前記第2の光入力ポートへの信号光を生成するN個の光変調器を備え、
     最終段の素子から得られた出力光を演算結果とすることを特徴とする光演算器。
    At least one of a 2-input 1-output first Y combining element that receives 1 to 2 signal lights and a 2-input 2-output Y combining / Y-branching element that receives 1 to 2 signal lights N elements (N is an integer of 2 or more) cascaded,
    Of the two optical input ports of each of the N elements connected in cascade, the first optical input to which signal light is input from the first optical input port without input light or the optical output port of the preceding element. The continuous light to the second optical input port different from the port is individually modulated according to the corresponding bit of the N-bit electric digital signal to generate the signal light to the second optical input port. With a light modulator,
    An optical computing unit characterized in that an output light obtained from an element at the final stage is used as a computation result.
  2.  請求項1記載の光演算器において、
     N個の前記第1のY合流素子を備え、
     これらN個の第1のY合流素子は、最上流の第1のY合流素子を除く(N-1)個の第1のY合流素子が、上流の第1のY合流素子の光出力ポートから出力された光を前記第1の光入力ポートへの入力光とし、かつ最上流の第1のY合流素子を含むN個の第1のY合流素子が、前記N個の光変調器によって変調された信号光を前記第2の光入力ポートへの入力光とするように縦続接続され、
     前記N個の光変調器は、N個の同一波長の前記連続光を、それぞれNビット電気デジタル信号の対応するビットに応じて個別に変調してN個の前記第1のY合流素子の第2の光入力ポートへの信号光を生成し、
     最終段の前記第1のY合流素子から得られた出力光をNビットデジタル・アナログ演算の結果とすることを特徴とする光演算器。
    The optical computing unit according to claim 1,
    N first Y confluence elements,
    These N first Y merge elements are the optical output ports of the upstream first Y merge elements except for the most upstream first Y merge element (N−1) first Y merge elements. The light output from the first optical input port is used as input light to the first optical input port, and N first Y combining elements including the most upstream first Y combining element are formed by the N optical modulators. The modulated signal light is cascaded so as to be input light to the second optical input port,
    The N optical modulators individually modulate the N continuous lights of the same wavelength according to the corresponding bits of the N-bit electric digital signal, and the N optical modulators of the first Y confluence elements. 2 to generate signal light to the optical input port
    An optical computing unit characterized in that the output light obtained from the first Y-merging element in the final stage is the result of N-bit digital / analog computation.
  3.  請求項1記載の光演算器において、
     (N-1)個の前記Y合流・Y分岐素子と1個の前記第1のY合流素子とを備え、
     これら(N-1)個のY合流・Y分岐素子と1個の第1のY合流素子とは、最上流のY合流・Y分岐素子を除く(N-2)個のY合流・Y分岐素子と1個の第1のY合流素子とが、上流のY合流・Y分岐素子の第1の光出力ポートから出力された光を前記第1の光入力ポートへの入力光とし、かつ最上流のY合流・Y分岐素子を含む(N-1)個のY合流・Y分岐素子と1個の第1のY合流素子とが、前記N個の光変調器によって変調された信号光を前記第2の光入力ポートへの入力光とするように縦続接続され、
     前記N個の光変調器は、N個の同一波長の前記連続光を、それぞれNビット電気デジタル信号の対応するビットに応じて個別に変調して(N-1)個の前記Y合流・Y分岐素子の第2の光入力ポートおよび1個の前記第1のY合流素子の第2の光入力ポートへの信号光を生成し、
     (N-1)個の各Y合流・Y分岐素子の2つの光出力ポートのうち、後段の素子への信号光を出力する第1の光出力ポートと異なる第2の光出力ポートから得られた出力光および最終段の前記第1のY合流素子から得られた出力光を、1~Nビットデジタル・アナログ演算の結果とすることを特徴とする光演算器。
    The optical computing unit according to claim 1,
    (N-1) comprising the Y merge / Y branch elements and the first Y merge element.
    These (N-1) Y merge / Y branch elements and one first Y merge element exclude (N-2) Y merge / Y branches except the most upstream Y merge / Y branch elements. The light output from the first optical output port of the upstream Y-merging / Y-branching element is input to the first optical input port, and the first Y-merging element and the first Y-merging element (N−1) Y merge / Y branch elements including one upstream Y merge / Y branch element and one first Y merge element receive the signal light modulated by the N optical modulators. Cascaded to provide input light to the second optical input port;
    The N optical modulators individually modulate the N continuous lights of the same wavelength according to the corresponding bits of the N-bit electric digital signal, respectively, and (N−1) Y combined / Y Generating signal light to the second optical input port of the branch element and the second optical input port of the one first Y-merging element;
    Of the two optical output ports of each of the (N-1) Y merging / Y branching elements, it is obtained from a second optical output port different from the first optical output port that outputs the signal light to the subsequent element. An optical computing unit characterized in that the output light and the output light obtained from the first Y-merging element at the final stage are obtained as a result of 1 to N-bit digital / analog computation.
  4.  請求項1記載の光演算器において、
     N個の前記Y合流・Y分岐素子を備え、
     これらN個のY合流・Y分岐素子は、最上流のY合流・Y分岐素子を除く(N-1)個のY合流・Y分岐素子が、上流のY合流・Y分岐素子の第1の光出力ポートから出力された光を前記第1の光入力ポートへの入力光とし、かつ最上流のY合流・Y分岐素子を含むN個のY合流・Y分岐素子が、前記N個の光変調器によって変調された信号光を前記第2の光入力ポートへの入力光とするように縦続接続され、
     前記N個の光変調器は、N個の同一波長の前記連続光を、それぞれNビット電気デジタル信号の対応するビットに応じて個別に変調してN個の前記Y合流・Y分岐素子の第2の光入力ポートへの信号光を生成し、
     縦続接続された2入力1出力の(N-1)個の第2のY合流素子をさらに備え、
     初段の前記Y合流・Y分岐素子の2つの光出力ポートのうち、後段の前記Y合流・Y分岐素子への信号光を出力する第1の光出力ポートと異なる第2の光出力ポートから得られた信号光を初段の前記第2のY合流素子の第1の光入力ポートに入力し、(k-1)段目(kは2~(N-1)の整数)の前記第2のY合流素子の光出力ポートから得られた信号光をk段目の前記第2のY合流素子の第1の光入力ポートに入力し、(j+1)段目(jは1~(N-1)の整数)の前記Y合流・Y分岐素子の第2の光出力ポートから得られた信号光をj段目の前記第2のY合流素子の第2の光入力ポートに入力し、
     最終段の前記Y合流・Y分岐素子の第1の光出力ポートから得られた出力光をNビットデジタル・アナログ演算の結果とし、
     最終段の前記第2のY合流素子から得られた出力光をNビットカウンタ演算の結果とすることを特徴とする光演算器。
    The optical computing unit according to claim 1,
    N pieces of the Y merge / Y branch element are provided,
    These N Y merging / Y branching elements exclude the most upstream Y merging / Y branching element (N−1) Y merging / Y branching elements are the first of the upstream Y merging / Y branching elements. The light output from the optical output port is used as the input light to the first optical input port, and the N Y merging / Y branching elements including the most upstream Y merging / Y branching element are the N light beams. The signal light modulated by the modulator is cascaded to be input light to the second optical input port;
    The N optical modulators individually modulate the N continuous lights of the same wavelength according to the corresponding bits of the N-bit electric digital signal, respectively. 2 to generate signal light to the optical input port
    (N-1) second Y merging elements having two inputs and one output connected in cascade are further provided,
    Obtained from a second optical output port different from the first optical output port that outputs the signal light to the Y merging / Y branching element in the subsequent stage, out of the two optical output ports of the Y merging / Y branching element in the first stage The received signal light is input to the first optical input port of the second Y junction element at the first stage, and the second light at the (k−1) th stage (k is an integer of 2 to (N−1)). The signal light obtained from the optical output port of the Y-merging element is input to the first optical input port of the second Y-merging element of the k-th stage, and the (j + 1) -th stage (j is 1 to (N−1) )), The signal light obtained from the second optical output port of the Y-combining / Y-branching element is input to the second optical input port of the j-th second Y-merging element,
    The output light obtained from the first optical output port of the Y-junction / Y-branch element at the final stage is the result of N-bit digital / analog operation,
    An optical computing unit characterized in that the output light obtained from the second Y-merging element at the final stage is the result of N-bit counter computation.
  5.  請求項1記載の光演算器において、
     N個の前記第1のY合流素子を備え、
     これらN個の第1のY合流素子は、最上流の第1のY合流素子を除く(N-1)個の第1のY合流素子が、上流の第1のY合流素子の光出力ポートから出力された光を前記第1の光入力ポートへの入力光とし、かつ最上流の第1のY合流素子を含むN個の第1のY合流素子が、前記N個の光変調器によって変調された信号光を前記第2の光入力ポートへの入力光とするように縦続接続され、
     さらに、1入力2出力のN個のY分岐素子を備え、
     これらN個のY分岐素子は、単一の連続光を入力とする最上流のY分岐素子を除く各Y分岐素子が、上流のY分岐素子の2つの光出力ポートのうち第1の光出力ポートから出力される光を入力とするように縦続接続され、
     これらN個のY分岐素子の第2の光出力ポートから得られた出力光を前記N個の光変調器への入力光とし、
     最終段の前記第1のY合流素子から得られた出力光をNビットデジタル・アナログ演算の結果とすることを特徴とする光演算器。
    The optical computing unit according to claim 1,
    N first Y confluence elements,
    These N first Y merge elements are the optical output ports of the upstream first Y merge elements except for the most upstream first Y merge element (N−1) first Y merge elements. The light output from the first optical input port is used as input light to the first optical input port, and N first Y combining elements including the most upstream first Y combining element are formed by the N optical modulators. The modulated signal light is cascaded so as to be input light to the second optical input port,
    Furthermore, it has N Y branch elements with 1 input and 2 outputs,
    Among these N Y branch elements, each Y branch element other than the most upstream Y branch element that receives a single continuous light is the first optical output of the two optical output ports of the upstream Y branch element. Cascade connection so that the light output from the port is the input,
    The output light obtained from the second optical output port of these N Y branch elements is used as input light to the N optical modulators,
    An optical computing unit characterized in that the output light obtained from the first Y-merging element in the final stage is the result of N-bit digital / analog computation.
  6.  請求項1乃至5のいずれか1項に記載の光演算器において、
     前記第1のY合流素子のうちの少なくとも1つ、または前記Y合流・Y分岐素子を構成するY合流素子のうちの少なくとも1つは、第1、第2の2つの光入力ポートの他に、固定強度のバイアス光が入力されるバイアスポートを有することを特徴とする光演算器。
    In the optical arithmetic unit according to any one of claims 1 to 5,
    At least one of the first Y-merging elements or at least one of the Y-merging elements constituting the Y-merging / Y-branching element is in addition to the first and second optical input ports. An optical computing unit comprising a bias port to which a fixed intensity bias light is input.
  7.  請求項1乃至5のいずれか1項に記載の光演算器において、
     さらに、前記最終段の素子から得られた出力光を第1の光入力ポートへの入力光とし、固定強度のバイアス光を第2の光入力ポートへの入力光とするY合流素子を備え、
     このY合流素子から得られた出力光をNビットデジタル・アナログ演算の結果とすることを特徴とする光演算器。
    In the optical arithmetic unit according to any one of claims 1 to 5,
    Furthermore, the output light obtained from the element at the last stage is used as input light to the first optical input port, and a Y-merging element is used that uses bias light having a fixed intensity as input light to the second optical input port,
    An optical computing unit characterized in that the output light obtained from the Y junction element is the result of N-bit digital / analog computation.
  8.  請求項1乃至7のいずれか1項に記載の光演算器において、
     前記光変調器は、光強度変調器であることを特徴とする光演算器。
    The optical computing unit according to any one of claims 1 to 7,
    The optical calculator is an optical intensity modulator.
  9.  請求項1乃至7のいずれか1項に記載の光演算器において、
     前記光変調器は、光位相変調器であり、
     さらに、デジタル・アナログ変換後の電気信号を取り出すコヒーレント検波部を備え、
     前記コヒーレント検波部は、
     前記Nビットデジタル・アナログ演算の結果となる出力光と、この出力光と同一波長の参照光との位相差がπ/2となるように調整可能な移相器と、
     前記Nビットデジタル・アナログ演算の結果となる出力光と前記参照光とを合流させ2等分して出力するカプラと、
     前記カプラの一方の出力光を電気信号に変換する第1の光検出器と、
     前記カプラの他方の出力光を電気信号に変換する第2の光検出器と、
     前記第1、第2の光検出器から出力された2つの電気信号の差分を求める減算器とを備えることを特徴とする光演算器。
    The optical computing unit according to any one of claims 1 to 7,
    The optical modulator is an optical phase modulator;
    In addition, it has a coherent detector that extracts the electrical signal after digital-analog conversion.
    The coherent detection unit is
    A phase shifter that can be adjusted so that the phase difference between the output light resulting from the N-bit digital / analog operation and the reference light having the same wavelength as that of the output light is π / 2;
    A coupler that combines the output light resulting from the N-bit digital / analog operation and the reference light, and bisects the output light;
    A first photodetector for converting one output light of the coupler into an electrical signal;
    A second photodetector for converting the other output light of the coupler into an electrical signal;
    An optical computing unit comprising: a subtractor for obtaining a difference between two electrical signals output from the first and second photodetectors.
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