WO2019157795A1 - 一种通信方法、装置及系统 - Google Patents

一种通信方法、装置及系统 Download PDF

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Publication number
WO2019157795A1
WO2019157795A1 PCT/CN2018/096913 CN2018096913W WO2019157795A1 WO 2019157795 A1 WO2019157795 A1 WO 2019157795A1 CN 2018096913 W CN2018096913 W CN 2018096913W WO 2019157795 A1 WO2019157795 A1 WO 2019157795A1
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WIPO (PCT)
Prior art keywords
analog signal
sub
dpu
signal stream
stream
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PCT/CN2018/096913
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English (en)
French (fr)
Inventor
方李明
涂建平
张晓风
李泽彬
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华为技术有限公司
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Publication of WO2019157795A1 publication Critical patent/WO2019157795A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/2854—Wide area networks, e.g. public data networks
    • H04L12/2856—Access arrangements, e.g. Internet access
    • H04L12/2869—Operational details of access network equipments
    • H04L12/2878—Access multiplexer, e.g. DSLAM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478—Provisions for broadband connections

Definitions

  • the embodiments of the present application relate to the field of communications technologies, and in particular, to a communication method, apparatus, and system.
  • Fiber access technologies include Fiber To The Curb (FTTC), Fiber To The Manhole (FTTM), and Fiber To The Building (FTTB).
  • FTTC Fiber To The Curb
  • FTTM Fiber To The Manhole
  • FTTB Fiber To The Building
  • FIG. 1 shows a communication system having this structure, in which a DPU is connected to at least one Customer Premises Equipment (CPE), and a copper wire is used for data transmission between the DPU and each CPE.
  • CPE Customer Premises Equipment
  • the DSLAM converts the data stream acquired from the network server into a multi-channel low-bandwidth sub-analog signal stream, and transmits the multi-channel low-bandwidth sub-analog signal stream to the DPU; the DPU receives the data stream.
  • the multi-channel low-bandwidth sub-analog signal stream needs to be parsed, analog-to-digital converted, modulated, etc. to generate a high-bandwidth data stream, and then sent to the CPE connected to the DPU. This high bandwidth data stream.
  • the DPU requires a large number of digital signal processing (DSP) units, resulting in high power consumption, large volume, and high cost of the DPU.
  • DSP digital signal processing
  • the embodiment of the present application provides a communication method, device, and system, which can solve the problem of high power consumption and high cost and large volume of the existing DPU.
  • a communication method receives an n-channel sub-analog signal stream sent by a DSLAM through a digital subscriber line DSL, and the n-channel sub-analog signal stream converts the first data stream into an n(n ⁇ 2) path sub-analog signal for the DSLAM. And obtaining, by the DPU, the n-channel sub-analog signal stream is combined into a first analog signal stream, and transmitting the first analog signal stream to the at least one CPE through the DSL, so that each CPE receives the first analog signal. The stream is converted to the first data stream.
  • each sub-analog signal stream in the n-channel sub-analog signal stream is smaller than the bandwidth of the first analog signal stream, and the DPU combines the sub-analog signal streams of the smaller bandwidth into a higher bandwidth.
  • An analog signal stream is sent to the CPE.
  • the DPU in the embodiment of the present application no longer has a digital signal processing function, and only the processing module of the analog signal is retained, thereby reducing the power consumption of the DPU and reducing the volume and cost of the DPU.
  • the DPU since the DPU only retains the processing module of the analog signal, the delay of data processing also decreases.
  • the DPU further receives a first configuration signal that is sent by the DSLAM to indicate a combination parameter of the DPU configuration and the shunt parameter, where the shunt parameter is a DSLAM.
  • the parameter used in the process of converting the first data stream into the n-channel sub-analog signal stream after receiving the first configuration signal, the DPU configures the combining parameter according to the first configuration signal.
  • the method of “the DPU combines the n-channel sub-analog signal streams into the first analog signal stream” is: the DPU combines the n-channel sub-analog signal streams into the first analog signal stream according to the combining parameters.
  • the first configuration signal may include the foregoing branching parameter, or may be only an indication signal that serves as an indication. This embodiment of the present application does not specifically limit this.
  • the DPU configures the combining parameters according to the first configuration signal, and can ensure that the manner adopted by the DPU for the n-channel sub-analog signal flow is corresponding to the manner in which the DSLAM converts the first data stream into the n-channel sub-analog signal stream.
  • the method that “the DPU combines the n-channel sub-analog signal streams into the first analog signal stream” is: DPU-to-n-channel sub-analog signal streams.
  • the sub-analog signal stream is oversampled and all oversampled sub-analog signal streams are combined to generate a first analog signal stream.
  • the foregoing “DPU oversampling each sub-analog signal stream in the n-channel sub-analog signal stream” is: DPU-to-n-channel sub-analog signal stream Each of the sub-analog signal streams is orthogonally sampled to obtain n sub-analog signal streams after orthogonal sampling.
  • the above method “the DPU combines all the oversampled sub-analog signal streams to generate the first analog signal stream” is: the DPU combines the n-channel orthogonally sampled sub-analog signal streams to generate the first An analog signal stream.
  • the method for “the DPU combines the n-channel sub-analog signal streams into the first analog signal stream” is: the DPU performs orthogonal modulation on the n-channel sub-analog signal streams. To generate a first analog signal stream.
  • the foregoing “DPU combines the n-channel sub-analog signal streams into the first analog signal stream”
  • the DPU uses n-1 orthogonal modulators to perform K-level quadrature modulation on the n-channel sub-analog signal streams to generate a first analog signal stream.
  • the DPU uses 2 Ki orthogonal modulators to orthogonally modulate the 2 K-i+1 channel to be modulated signal stream to obtain 2 Ki channel modulation.
  • Signal stream, i ⁇ 1,...,K ⁇ The signal to be modulated of the first-order quadrature modulation is a sub-analog signal stream, and the modulated signal stream obtained by the K-th quadrature modulation is a first analog signal stream.
  • the foregoing “DPU combines n-channel sub-analog signals.
  • the way the road is the first analog signal stream is: DPU adoption
  • the quadrature modulator performs M-level quadrature modulation on the n-channel sub-analog signal stream to obtain a 2p+1-channel modulated signal, and combines the 2p+1-channel modulated signals to generate a first analog signal stream.
  • the DPU uses (2p+1) ⁇ 2 Mj orthogonal modulators, and (2p+1) ⁇ 2 M-j+1 path to be modulated.
  • the signal stream is quadrature modulated to obtain a (2p+1) ⁇ 2 Mj- channel modulated signal stream, j ⁇ 1,...,M ⁇ , and the first-order quadrature-modulated signal stream to be modulated is sub-simulated Signal flow.
  • the foregoing “DPU combines n analog signals.
  • the method of the first analog signal stream is as follows: The DPU uses 2 M-1 ⁇ (2p+2) quadrature modulators to orthogonally modulate the n sub-analog signal streams to obtain 2 M-1 ⁇ (2p+ 2) Modulating the signal and combining the 2 M-1 ⁇ (2p + 2) modulated signals to generate a first analog signal stream.
  • the manner in which the DPU combines the n-channel sub-analog signal streams into the first analog signal stream may be multiple, which is not specifically limited in this embodiment of the present application.
  • a sum of bandwidths of the n-channel sub-analog signal streams is less than or equal to a bandwidth of the first analog signal stream; and each sub-analog signal stream in the n-channel sub-analog signal stream The bandwidth is less than the bandwidth of the first data stream.
  • a DPU in a second aspect, includes a receiving unit, a combining unit, and a sending unit.
  • the receiving unit is configured to receive an n-channel sub-analog signal stream sent by the access multiplexer DSLAM through the digital subscriber line DSL, and the n-channel sub-analog signal stream is obtained by the DSLAM converting the first data stream into the n-channel sub-analog signal stream, n ⁇ 2.
  • the combining unit is configured to combine the n-channel sub-analog signal streams received by the receiving unit into a first analog signal stream.
  • the sending unit is configured to send, by using the DSL, the first analog signal stream generated by the combining unit to the at least one user front end device CPE, so that each CPE converts the received first analog signal stream into the first data stream.
  • the receiving unit is further configured to receive a first configuration signal sent by the DSLAM, where the first configuration signal is used to indicate a combination parameter of the DPU configuration and the shunt parameter.
  • the shunt parameter is a parameter used by the DSLAM in converting the first data stream into an n-way sub-analog signal stream.
  • the DPU provided by the embodiment of the present application further includes a configuration unit, configured to configure a combination parameter according to the first configuration signal.
  • the combining unit is specifically configured to combine the n-channel sub-analog signal streams into the first analog signal stream according to the combining parameters configured by the configuration unit.
  • the DPU provided by the embodiment of the present application further includes a sampling unit, where the sampling unit is configured to receive each of the n sub-analog signal streams received by the receiving unit.
  • the sub-analog signal stream is oversampled.
  • the combining unit is specifically configured to combine the sub-analog signal streams that are oversampled by all the sampling units to generate a first analog signal stream.
  • the sampling unit is specifically configured to perform orthogonal sampling on each sub-analog signal stream in the n-channel sub-analog signal stream to obtain n-channel orthogonal sampling.
  • the combining unit is specifically configured to combine the sub-analog signal streams orthogonally sampled by the n-channel sampling units to generate a first analog signal stream.
  • the combining unit specifically performs orthogonal modulation on the n-channel sub-analog signal stream to generate a first analog signal stream.
  • the combining unit is specifically configured to: adopt n-1 orthogonal modulators, and use n
  • the sub-analog signal stream performs K-level quadrature modulation to generate a first analog signal stream.
  • the DPU uses 2 Ki orthogonal modulators to orthogonally modulate the 2 K-i+1 channel to be modulated signal stream to obtain 2 Ki channel modulation.
  • Signal flow i ⁇ 1,...,K ⁇ ;
  • the signal to be modulated of the first-order quadrature modulation is a sub-analog signal stream, and the modulated signal stream obtained by the K-th quadrature modulation is a first analog signal stream.
  • the foregoing combining unit is specifically configured to: adopt The quadrature modulator performs M-level quadrature modulation on the n-channel sub-analog signal stream to obtain a 2p+1-channel modulated signal; and combines the 2p+1-channel modulated signals to generate a first analog signal stream.
  • the DPU uses (2p+1) ⁇ 2 Mj orthogonal modulators, and (2p+1) ⁇ 2 M-j+1 path to be modulated.
  • the signal stream is quadrature modulated to obtain a (2p+1) ⁇ 2 Mj- channel modulated signal stream, j ⁇ 1,...,M ⁇ , and the first-order quadrature-modulated signal stream to be modulated is sub-simulated Signal flow.
  • the foregoing combining unit is specifically configured to: adopt 2 M-1 ⁇ (2p+2) quadrature modulators, quadrature modulation of n sub-analog signal streams to obtain 2 M-1 ⁇ (2p+2) modulated signals; 2 M-1 ⁇ (2p+ 2)
  • the road modulation signal is combined to generate a first analog signal stream.
  • a sum of bandwidths of the n-channel sub-analog signal streams is less than or equal to a bandwidth of the first analog signal stream; and each sub-analog signal stream in the n-channel sub-analog signal stream The bandwidth is less than the bandwidth of the first data stream.
  • a DPU comprising: one or more processors, a memory, a communication interface.
  • the memory and communication interface are coupled to one or more processors; the DPU communicates with other devices through a communication interface, the memory is used to store computer program code, and the computer program code includes instructions, when one or more processors execute instructions, DPU A communication method as described in the first aspect above and its various possible implementations is performed.
  • a computer readable storage medium is provided, the instructions being stored in the computer readable storage medium; when executed on the DPU, causing the DPU to perform the first aspect as described above and various possible implementations thereof Communication method.
  • a computer program product comprising instructions which, when run on the DPU, cause the DPU to perform a communication method as in the first aspect above and its various possible implementations.
  • the name of the above DPU is not limited to the device or the function module itself. In actual implementation, these devices or function modules may appear under other names. As long as the functions of the respective devices or functional modules are similar to the present application, they are within the scope of the claims and their equivalents.
  • a communication method After acquiring the first data stream, the DSLAM converts the first data stream into an n(n ⁇ 2) way sub-analog signal stream, and transmits the digital subscriber line DSL to the distributed node unit.
  • the DPU sends n sub-analog signal streams, so that the DPU combines the n-channel sub-analog signal streams into the first analog signal stream.
  • the DSLAM converts the first data stream into a low-bandwidth n-channel analog signal stream, so that it can better adapt to the bandwidth of the DSL during transmission to the DPU.
  • the foregoing method for “the DSLAM converts the first data stream into the n-channel sub-analog signal stream” is: the DSLAM performs constellation mapping on the first data stream to obtain the first a digital frequency domain signal stream; then, the DSLAM serially converts the first digital frequency domain signal stream to obtain n first first digital frequency domain signal streams; and finally, the DSLAM pairs n first digital frequency domain signals
  • the stream performs precoding processing, modulation processing, and digital-to-analog conversion to obtain n-channel sub-analog signal streams.
  • the foregoing method for “DSLAM converting the first data stream into the n-channel sub-analog signal stream” is: the DSLAM performs constellation mapping and pre-coding processing on the first data stream. Obtaining a second digital frequency domain signal stream; then, the DSLAM performs serial-to-parallel conversion on the second digital frequency domain signal stream to obtain an n-channel second sub-digital frequency domain signal stream; and finally, the DSLAM pair n-channel second.
  • the sub-digital frequency domain signal stream is subjected to modulation processing and digital-to-analog conversion to obtain n-channel sub-analog signal streams.
  • the foregoing method for “the DSLAM converts the first data stream into the n-channel sub-analog signal stream” is: the DSLAM performs constellation mapping and pre-coding processing on the first data stream. And modulating processing to obtain a first digital time domain signal stream; then, the DSLAM serially converts the first digital time domain signal stream to obtain n first first digital time domain signal streams; and finally, the DSLAM pair n The first sub-digital time domain signal stream is digital-to-analog converted to obtain an n-channel sub-analog signal stream.
  • the foregoing method for “the DSLAM converts the first data stream into the n-channel sub-analog signal stream” is: the DSLAM performs constellation mapping and pre-coding processing on the first data stream. And modulating processing and digital-to-analog conversion to obtain a second analog signal stream, and performing serial-to-parallel conversion on the second analog signal stream to obtain an n-channel sub-analog signal stream.
  • the DSLAM can perform serial-to-parallel conversion at different locations.
  • the DSLAM further sends a first configuration signal to the DPU, where the first configuration signal is used to indicate a combination parameter of the DPU configuration and the shunt parameter, and the shunt parameter is The parameters used by the DSLAM in converting the first data stream into n-way sub-analog signal streams.
  • the DSLAM further sends a second configuration signal to the CPE by using the DPU, where the second configuration signal is used to indicate a processing parameter corresponding to the CPE configuration and the shunt parameter, and the shunt parameter The parameter used by the DSLAM in converting the first data stream to the n-way sub-analog signal stream.
  • the DSLAM sends the first configuration signal to the DPU, which can ensure that the manner in which the DPU combines the n-channel sub-analog signal streams is corresponding to the manner in which the DSLAM converts the first data stream into the n-way sub-analog signal stream.
  • the DSLAM sends the second configuration signal to the CPE, and can also ensure that the CPE converts the first data stream into the n-channel sub-analog signal by using the shunting method used in the process of converting the first analog signal stream into the first data stream and the DSLAM.
  • the shunting method used in the flow process corresponds.
  • a DSLAM in a seventh aspect, includes an obtaining unit, a converting unit, and a sending unit.
  • the obtaining unit is configured to acquire the first data stream.
  • the conversion unit is configured to convert the first data stream acquired by the acquiring unit into an n-way sub-analog signal stream, where n ⁇ 2.
  • the sending unit is configured to send, by using the digital subscriber line DSL, the n-channel sub-analog signal stream obtained by the converting unit to the distributed node unit DPU, so that the DPU combines the n-channel sub-analog signal streams into the first analog signal stream.
  • the converting unit is specifically configured to: perform constellation mapping on the first data stream to obtain a first digital frequency domain signal stream; and perform a first digital frequency domain signal stream. Performing serial-to-parallel conversion to obtain n-channel first sub-digital frequency domain signal streams; performing pre-coding processing, modulation processing, and digital-to-analog conversion on the n-channel first sub-digital frequency-domain signal streams to obtain n-channel sub-analog signal streams.
  • the converting unit is specifically configured to: perform constellation mapping and precoding processing on the first data stream to obtain a second digital frequency domain signal stream;
  • the digital frequency domain signal stream is serial-to-parallel converted to obtain n second second digital frequency domain signal streams;
  • the n-channel second sub-digital frequency domain signal stream is modulated and digital-to-analog converted to obtain n-channel sub-analog signal streams.
  • the converting unit is specifically configured to: perform constellation mapping, pre-coding processing, and modulation processing on the first data stream to obtain a first digital time domain signal stream;
  • the first digital time domain signal stream is serial-to-parallel converted to obtain an n-channel first sub-digital time domain signal stream; and the n-channel first sub-digital time domain signal stream is digital-to-analog converted to obtain an n-channel sub-analog signal stream.
  • the converting unit is specifically configured to perform constellation mapping, pre-coding processing, modulation processing, and digital-to-analog conversion on the first data stream to obtain the second analog signal. Streaming; performing a serial-to-parallel conversion on the second analog signal stream to obtain an n-channel sub-analog signal stream.
  • the sending unit is further configured to send a first configuration signal to the DPU, where the first configuration signal is used to indicate a combination parameter of the DPU configuration and the shunt parameter.
  • the shunt parameter is a parameter used by the DSLAM in converting the first data stream into an n-way sub-analog signal stream.
  • the sending unit further sends a second configuration signal to the CPE by using the DPU, where the second configuration signal is used to indicate a processing parameter corresponding to the CPE configuration and the shunt parameter.
  • the shunt parameter is a parameter used by the DSLAM in converting the first data stream into an n-way sub-analog signal stream.
  • a DSLAM comprising: one or more processors, a memory, and a communication interface.
  • the memory and communication interface are coupled to one or more processors; the DSLAM communicates with other devices through a communication interface, the memory is used to store computer program code, and the computer program code includes instructions, when one or more processors execute instructions, the DSLAM A communication method as described in the sixth aspect above and its various possible implementations is performed.
  • a ninth aspect further provides a computer readable storage medium having instructions stored therein; when operating on a DSLAM, causing the DSLAM to perform the sixth aspect as described above and various possible implementations thereof Communication method.
  • a computer program product comprising instructions which, when run on the DSLAM described above, cause the DSLAM to perform a communication method as in the sixth aspect above and its various possible implementations.
  • the name of the above DSLAM is not limited to the device or the function module itself. In actual implementation, these devices or function modules may appear under other names. As long as the functions of the respective devices or functional modules are similar to the present application, they are within the scope of the claims and their equivalents.
  • a communication system comprising: the DPU according to the second aspect and any one of the possible implementation manners, the seventh aspect, and any possible implementation manner thereof
  • the DSLAM and the at least one CPE wherein the CPU and the DSLAM are connected by n(n ⁇ 2) DSLs, and each CPE of the at least one CPE is connected to the DPU through a DSL.
  • FIG. 1 is a schematic structural diagram of a communication system composed of FTTC/FTTM and CuTTB in the embodiment of the present application;
  • FIG. 2 is a schematic structural diagram of an xDSL system according to an embodiment of the present application.
  • FIG. 3 is a schematic flowchart of a communication method according to an embodiment of the present application.
  • FIG. 4 is a schematic flowchart of processing a data flow by a DSLAM in an embodiment of the present application
  • FIG. 5 is a schematic flowchart 1 of a process for generating a first analog signal stream by a DPU according to an embodiment of the present application
  • FIG. 6 is a schematic diagram of a working principle of a signal multiplexer in an embodiment of the present application.
  • FIG. 7 is a second schematic diagram of a process for generating a first analog signal stream by a DPU according to an embodiment of the present application
  • FIG. 8 is a schematic flowchart 3 of generating a first analog signal stream by a DPU according to an embodiment of the present application
  • FIG. 9 is a schematic flowchart 4 of generating a first analog signal stream by a DPU according to an embodiment of the present application.
  • FIG. 10 is a schematic flowchart 5 of generating a first analog signal stream by a DPU according to an embodiment of the present application
  • FIG. 11 is a schematic flowchart 1 of a process for generating a first data stream by a CPE according to an embodiment of the present application
  • FIG. 12 is a second schematic diagram of a flow of generating a first data stream by a CPE according to an embodiment of the present application.
  • FIG. 13 is a schematic flowchart of data transmission in the communication system shown in FIG. 1 according to an embodiment of the present application; FIG.
  • FIG. 14 is a schematic flowchart 1 of a DPU generating an n-channel sub-analog signal flow according to an embodiment of the present application;
  • 15 is a schematic diagram of a working principle of a signal demultiplexer in an embodiment of the present application.
  • FIG. 16 is a schematic structural diagram of a DPU according to an embodiment of the present application.
  • FIG. 17 is a schematic structural diagram of a DSLAM according to an embodiment of the present application.
  • the words “exemplary” or “such as” are used to mean an example, illustration, or illustration. Any embodiment or design described as “exemplary” or “for example” in the embodiments of the present application should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of the words “exemplary” or “such as” is intended to present the concepts in a particular manner.
  • first and second are used for descriptive purposes only, and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, features defining “first” and “second” may include one or more of the features either explicitly or implicitly. In the description of the embodiments of the present application, “multiple” means two or more unless otherwise stated.
  • Digital Subscriber Line (DSL) technology is a high-speed data transmission technology for data transmission over telephone twisted pair, Unshielded Twist Pair (UTP), including asymmetric digital subscriber line (Asymmetrical Digital Subscriber Line, ADSL), Very High-bit-rate Digital Subscriber Line (VDSL), Integrated Services Digital Network (ISDN)-based digital subscriber line (ISDN Digital Subscriber Line, IDSL) and Single-pair High-bit-rate Digital Subscriber Line (SHDSL).
  • ADSL Asymmetrical Digital Subscriber Line
  • VDSL Very High-bit-rate Digital Subscriber Line
  • ISDN Integrated Services Digital Network
  • IDSL Integrated Services Digital Network
  • SHDSL Single-pair High-bit-rate Digital Subscriber Line
  • DSL using passband transmission uses frequency division multiplexing technology to enable DSL to coexist with Plain Old Telephone Service (POTS).
  • POTS Plain Old Telephone Service
  • DMT Discrete Multi-Tone Modulation
  • the xDSL system includes a DSLAM 20, a CPE 21, a network management system 22, a telephone terminal 23, a computer 24, and a public switched telephone network 25.
  • the CPE 21 includes a client transceiver unit 211 and a split/integrator 212.
  • the client transceiver unit 211 receives a signal from the computer 24 and performs code modulation processing on the received signal, and transmits the processed DSL signal to the Separation/integrator 212; separation/integrator 212 integrates the DSL signal from the client transceiver unit 211 and the POTS signal of the telephone terminal 23; the integrated signal is transmitted by the multi-channel UTP 26, by the DSLAM 20
  • the separation/integrator 201 receives; the separation/consolidator 201 separates the received signals, transmits the POTS signals therein to a Public Switched Telephone Network (PSTN) 25, and transmits the DSL signals to the DSLAM 20
  • PSTN Public Switched Telephone Network
  • the central office transceiver unit 202 transmits the received signal to the metropolitan area network after demodulating and decoding the received signal.
  • the network management system (NMS) 22 is used to manage the entire system and the network. In the downstream direction of the signal, the signals are transmitted in the reverse order of the above.
  • NMS network management system
  • FTTC/FTTM technology In order to further tap the bandwidth potential of existing copper wires, it is now considering the combined use of FTTC/FTTM technology and CuTTB technology, that is, copper wire between FTTC/FTTM side and DPU located at CuTTB position for data backhaul.
  • the DSLAM 20 of Figure 2 accesses the network management system 22 via fiber optics.
  • a DPU is also connected between the DSLAM 20 and the CPE 21, and both are copper wire connections.
  • the DSLAM converts the data stream obtained from the network server into multiple low-bandwidth sub-analog signal streams, and sends the multiple low-bandwidth sub-analog signal streams to the DPU; the DPU receives multiple low-bandwidth sub-bands.
  • the multi-channel low-bandwidth sub-analog signal stream needs to be parsed, analog-to-digital converted, modulated, etc. to generate a high-bandwidth data stream, thereby transmitting the high-bandwidth data stream to the CPE connected to the DPU.
  • the DPU requires a large number of DSP units to parse and modulate the signal stream.
  • the presence of a large number of DSP units will increase the power consumption of the DPU, make the DPU larger, and costly, and it is very difficult to supply and install.
  • an embodiment of the present application provides a communication method.
  • the attenuation of the low frequency signal is small and the attenuation of the high frequency signal is large under long distance transmission, since there are multiple lines between the DSLAM and the DPU, the distance is far from high frequency attenuation.
  • the low frequency can be used to transmit data, and there is only one line between the DPU and the CPE, and the short-term high-frequency attenuation is small.
  • the available frequency bandwidth of the line is very large.
  • the idea of the communication method provided by the embodiment of the present application is:
  • the DSLAM's large bandwidth signal stream is split into multiple low-frequency and small-bandwidth sub-signal streams and transmitted to the DPU through multiple lines.
  • the DPU combines multiple low-frequency and small-bandwidth signal streams into one high-frequency and large-bandwidth signal.
  • the signal stream is sent to the CPE through a short home line, thereby realizing the need for FTTC/FTTM to transmit large gigabit bandwidth to users over long distances.
  • the communication method moves the function implemented by the DSP unit in the DPU to the DSLAM, so that the DPU only retains the processing module of the analog signal, thereby reducing the power consumption of the DPU and reducing the volume and cost of the DPU.
  • the delay of data processing also decreases.
  • the DSLAM converts the first data stream into an n(n ⁇ 2) way sub-analog signal stream, and sends the n-channel sub-analog signal stream to the DPU; correspondingly, the DPU receives the data stream.
  • the n-channel sub-analog signal stream is combined into a first analog signal stream, and the first analog signal stream is sent to at least one CPE through a DSL.
  • the communication method provided by the embodiment of the present application is applicable to a communication system, and the architecture of the communication system is as shown in FIG. 1 or FIG. 2.
  • the processing module that moves the functions implemented by the DSP unit in the DPU to the DSLAM so that the DPU only retains the analog signal it can be seen that in the communication system to which the embodiment of the present application is applied, the DPU does not have a DSP, and only the analog is retained.
  • the DSLAM has the functionality of a DSP unit of the DPU in the prior art.
  • the communication method provided by the embodiment of the present application is also applicable to a wireless communication system in which a bandwidth or a frequency band changes, for example, a Global System of Mobile communication (GSM) system, and a code division multiple access (Code Division) Multiple Access, CDMA) system, Wideband Code Division Multiple Access (WCDMA) system, General Packet Radio Service (GPRS), Long Term Evolution (LTE) system, LTE frequency division Duplex (Frequency Division Duplex (FDD) system, LTE Time Division Duplex (TDD), Universal Mobile Telecommunication System (UMTS), or Worldwide Interoperability for Microwave Access (WiMAX) ) Communication systems, etc.
  • GSM Global System of Mobile communication
  • CDMA Code Division Multiple Access
  • WCDMA Wideband Code Division Multiple Access
  • GPRS General Packet Radio Service
  • LTE Long Term Evolution
  • FDD Frequency Division Duplex
  • TDD Time Division Duplex
  • UMTS Universal Mobile Telecommunication System
  • WiMAX Worldwide Interoperability for Microwave Access
  • an evolved Node Base Station (eNB) in the LTE system corresponds to the DSLAM
  • a relay node corresponds to the DPU
  • a terminal corresponds to the CPE.
  • the LTE system eNB and the relay node are in wireless communication, and the relay node and the terminal are also in wireless communication.
  • wired communication is performed between the DSLAM and the DPU, and wired communication is also performed between the DPU and the CPE.
  • FIG. 3 is a schematic flowchart of a communication method according to an embodiment of the present application.
  • the communication method includes:
  • the S300 and the DSLAM acquire the first data stream.
  • the DSLAM acquires the first data stream from the network server.
  • the DSLAM converts the first data stream into an n-channel sub-analog signal stream.
  • the DSLAM After acquiring the first data stream, the DSLAM converts the first data stream into an n-channel sub-analog signal stream, so as to better adapt to the bandwidth of the DSL during the process of transmitting to the DPU.
  • each sub-analog signal stream is smaller than the bandwidth of the first data stream.
  • the bandwidth of each sub-analog signal stream in the n-channel sub-analog signal stream is the same, or the bandwidth of part of the sub-analog signal streams in the n-channel sub-analog signal stream is the same, or all the sub-sub-analog signal streams in the n-channel sub-analog signal stream.
  • the bandwidth of the analog signal stream is different, which is not specifically limited in this embodiment of the present application.
  • the DSLAM can convert the first data stream into an n-channel sub-analog signal stream by any of the following methods:
  • Manner 1 The DSLAM performs constellation mapping on the first data stream to obtain a first digital frequency domain signal stream; then, the DSLAM performs serial-to-parallel conversion on the first digital frequency domain signal stream to obtain an n-channel first sub-digital frequency domain. Signal stream; Finally, the DSLAM performs precoding processing, modulation processing, and digital-to-analog conversion on the n-channel first sub-digital frequency domain signal stream to obtain an n-channel sub-analog signal stream.
  • Manner 2 The DSLAM performs constellation mapping and precoding processing on the first data stream to obtain a second digital frequency domain signal stream. Then, the DSLAM performs serial-to-parallel conversion on the second digital frequency domain signal stream to obtain an n-channel second. The sub-digital frequency domain signal stream; finally, the DSLAM performs modulation processing and digital-to-analog conversion on the n-channel second sub-digital frequency domain signal stream to obtain an n-channel sub-analog signal stream.
  • Manner 3 The DSLAM performs constellation mapping, precoding processing, and modulation processing on the first data stream to obtain a first digital time domain signal stream; then, the DSLAM performs serial-to-parallel conversion on the first digital time domain signal stream to obtain n. The first sub-digital time domain signal stream of the road; finally, the DSLAM performs digital-to-analog conversion on the n-th first sub-digital time domain signal stream to obtain an n-channel sub-analog signal stream.
  • Method 4 The DSLAM performs constellation mapping, precoding processing, modulation processing, and digital-to-analog conversion on the first data stream to obtain a second analog signal stream. Then, the DSLAM performs serial-to-parallel conversion on the second analog signal stream to obtain n. The road simulates the signal flow.
  • the DSLAM performs constellation mapping, precoding processing, modulation processing, and digital-to-analog conversion on the first data stream.
  • the difference between the first mode and the fourth mode is that the DSLAM performs the serial-to-parallel conversion.
  • the first data stream is converted into an n-channel sub-analog signal stream by using the DSLAM in the above manner.
  • the bandwidth of the first data stream is 424 megahertz (MHz), and the number of subcarriers using the resource in the first data stream is 8192, each The bandwidth of the path analog signal stream is 106 MHz, and the number of subcarriers using the resource in the sub analog signal stream is 2048.
  • the DSLAM converts the first data stream into an n-channel sub-analog signal stream.
  • the first digital frequency domain signal stream is obtained, and the first digital frequency domain signal stream occupies 8192 carriers; the DSLAM will occupy the first number of 8192 carriers.
  • the frequency domain signal stream, serial-to-parallel conversion (here, taking equal interval sampling as an example), generates 4 first sub-digital frequency domain signal streams, for example: 1:4:8189 (starting from the first carrier, sampling at intervals of 4) Until the 8189th carrier) carrier data is the first "first sub-digital frequency domain signal stream", 2:4:8190 (sampling from the 2nd carrier, sampling at 4 intervals until the 8190th carrier)
  • the data of the carrier is the second "first sub-digital frequency domain signal stream", and the data of the carrier is the third channel of 3:4:8191 (sampling from the third carrier, sampling at intervals of 4 until the 8191 carrier) "First sub-digital frequency domain signal stream", 4:4:8192 (sampling from
  • the DSLAM can continuously sample the first digital frequency domain signal stream occupying 8192 carriers to generate four first sub-digital frequency domain signal streams.
  • the data of the first carrier to the 2048th carrier is The first "first sub-digital frequency domain signal stream”
  • the data of the 2049th carrier to the 4096th carrier is the second "first sub-digital frequency domain signal stream”
  • the 4097th carrier to the 6144th carrier The data is the third "first sub-digital frequency domain signal stream”
  • the data of the 6145th carrier to the 8192th carrier is the fourth "first sub-digital frequency domain signal stream”.
  • the process of serial-to-parallel conversion of the DSLAM can refer to the process of performing serial-to-parallel conversion in the first mode of the DSLAM, which is not described herein.
  • the DSLAM sends an n-channel sub-analog signal stream to the DPU through the DSL.
  • the DSLAM sends a first configuration signal to the DPU, and sends a second configuration signal to the CPE.
  • the first configuration signal is used to indicate a combination parameter of the DPU configuration and a shunt parameter used by the DSLAM in converting the first data stream into the n-channel sub-analog signal stream.
  • the shunt parameter is a parameter used by the DSLAM in converting the first data stream into an n-way sub-analog signal stream. For example: the method of serial-to-parallel conversion, the interval length of equally spaced samples, or the sampling length of consecutive samples.
  • the first configuration signal may include the foregoing splitting parameter, so that after acquiring the first configuration signal, the DPU configures a combining parameter corresponding to the shunt parameter.
  • the first configuration signal may also be only an indication signal.
  • the communication system is pre-configured with a combination parameter and a shunt parameter, and the DSLAM converts the first data stream into an n-channel sub-analog signal stream according to the pre-configured shunt parameter.
  • the first configuration signal is sent to the DPU, and after acquiring the first configuration signal, the DPU configures its internal module according to the pre-configured combination parameter.
  • the second configuration signal is used to indicate a processing parameter corresponding to the CPE configuration and the shunt parameter used by the DSLAM in converting the first data stream into the n-channel sub-analog signal stream.
  • the second configuration signal may include the foregoing splitting parameter, so that after acquiring the second configuration signal, the CPE configures a processing parameter corresponding to the splitting parameter.
  • the second configuration signal may also be just an indication signal.
  • the processing system is pre-configured with processing parameters and shunt parameters, and the DSLAM converts the first data stream into n sub-analog signal streams according to the pre-configured shunt parameters, and then Sending a second configuration signal to the CPE, after acquiring the second configuration signal, the CPE configures its internal module according to the pre-configured processing parameter.
  • the DSLAM also sends a clock synchronization signal to the DPU and the CPE to facilitate sampling/modulation/demodulation synchronization of the DPU and the CPE.
  • the DPU configures a combination parameter according to the first configuration signal.
  • the combination parameter can be a modulation parameter, a serial-to-parallel conversion method, or the like.
  • the DPU combines the n-channel sub-analog signal streams into a first analog signal stream.
  • the DPU After receiving the n low-bandwidth sub-analog signal streams, the DPU combines the n-channel analog signal streams into a high-bandwidth first analog signal stream.
  • the sum of the bandwidths of the n-channel sub-analog signal streams is less than or equal to the bandwidth of the first analog signal stream due to factors such as noise.
  • the DPU may combine the n-channel sub-analog signal streams into the first analog signal stream in any of the following manners:
  • Mode a The DPU oversamples each sub-analog signal stream in the n-channel sub-analog signal stream, and combines all the over-sampled sub-analog signal streams to generate a first analog signal stream.
  • oversampling may be orthogonal sampling or interpolation sampling, which is not specifically limited in the embodiment of the present application.
  • the DPU orthogonally samples each sub-analog signal in the n-channel sub-analog signal stream to obtain n-channel orthogonally sampled sub-analog signal streams; and then, the DPU sub-simulates the n-channel orthogonal samples.
  • the signal streams are combined to generate a first analog signal stream.
  • the bandwidth of the sub-analog signal stream after each orthogonal sampling is the same as the bandwidth of the first analog signal stream. For example, the bandwidth of each sub-analog signal stream is 106 MHz, and the bandwidth of the first analog signal stream is 424 MHz, and the bandwidth of each sub-analog signal stream after orthogonal sampling is also 424 MHz.
  • the DPU can perform the processing of the mode a using a combiner or a multiplexer (MUX).
  • MUX multiplexer
  • the DPU after receiving the 4-channel sub-analog signal stream, the DPU combines the 4-way sub-analog signal stream into the first analog signal stream by using the signal multiplexer 50 in the combiner S, and Different time slots are turned on for different time slots 51 to transmit the first analog signal stream to different CPEs.
  • Figure 6 illustrates the operation of signal multiplexer 50.
  • the signal multiplexer 50 after receiving four sub-analog signal streams, the signal multiplexer 50 performs sampling by a multi-channel orthogonal code division multiple access (CDMA) multiplier 500, and then uses an adder 501.
  • the first analog signal stream is generated by combining four orthogonally sampled sub-analog signal streams.
  • CDMA orthogonal code division multiple access
  • Mode b The DPU performs quadrature modulation on the n-channel sub-analog signal stream to generate a first analog signal stream.
  • the DPU may perform multi-level orthogonal modulation on the n-channel sub-analog signal stream by using multiple orthogonal modulators to generate a first analog signal stream; or may use multiple orthogonal modulators to perform n-channel sub-analog signal streams.
  • the embodiment of the present application does not specifically limit this.
  • the first-order orthogonally modulated signal stream to be modulated is a sub-analog signal stream
  • the modulated signal stream obtained by the K-th quadrature modulation is a first analog Signal flow.
  • a quadrature modulator is a quadrature modulation of two streams of signals to be modulated. Therefore, in the above-mentioned "i-th quadrature modulation process of K-level orthogonal modulation, the DPU uses 2K-i orthogonal modulators to perform quadrature modulation on the 2 K-i+1- channel modulated signal stream" means Each of the two orthogonal modulators of the Ki orthogonal modulator modulates the two streams of the signal to be modulated, and the signals to be modulated modulated by any two orthogonal modulators are different.
  • the DPU uses two orthogonal modulators to perform 2-level quadrature modulation on the four sub-analog signals to generate a first analog signal stream.
  • the DPU uses two orthogonal modulators to modulate the four sub-analog signal streams.
  • the DPU uses one quadrature modulator to modulate the two channels of the signal to be modulated to generate a first analog signal stream.
  • the DPU divides the received 4-channel sub-analog signal stream into two groups, and the sub-analog signal stream 1 and the sub-analog signal stream 2 are the first group signal stream, and the sub-analog signal stream 3 and the sub-analog signal stream 4 are the second group.
  • the quadrature modulator 70 modulates the first group of signal streams with a modulation frequency of 106 MHz, and the frequency range of the modulated first group of signal streams is 0 to 212 MHz; the quadrature modulator 71 uses a modulation frequency of 356 MHz for the second.
  • the group signal stream is modulated, and the modulated second group of signal streams has a frequency range of 250 to 462 MHz; the quadrature modulator 72 quadrature modulates the output signals of the quadrature modulator 70 and the quadrature modulator 71 to obtain a first simulation. Signal flow.
  • all quadrature modulators of the Kth stage in the mode b1 can be replaced by a combiner, so that the combiner can directly combine the output signals of all the orthogonal modulators of the K-1 stage.
  • the combiner can directly combine the output signals of all the orthogonal modulators of the K-1 stage.
  • the quadrature modulator 72 of FIG. 7 can be replaced with a combiner 80.
  • the quadrature modulator in mode b2 is similar to the quadrature modulator in mode b1 above, and will not be described in detail herein.
  • the DPU uses 9 orthogonal modulators to perform 2-level quadrature modulation on 12 sub-analog signals to obtain three-way modulated signals. Then, the DPU combines the three modulated signals to generate a first analog signal stream. In the process of the first-order quadrature modulation, the DPU uses six orthogonal modulators to modulate the 12-channel sub-analog signal stream. In the process of the second-order quadrature modulation, the DPU uses three orthogonal modulators to modulate the six channels of the signal to be modulated to obtain three modulated signals. The DPU uses a combiner to combine the three modulated signals to generate a first analog signal stream.
  • the DPU divides the received 12-channel sub-analog signal streams into a group, and divides them into six groups of signal streams, for example, the sub-analog signal stream 1 and the sub-analog signal stream 2 are the first group signal stream, and the sub-analog signal Stream 3 and sub-analog signal stream 4 are the second group of signal streams, ....
  • a quadrature modulator 90, a quadrature modulator 91, a quadrature modulator 92, a quadrature modulator 93, a quadrature modulator 94, and a quadrature modulator 95 respectively quadrature modulate a set of signal streams to generate a 6-channel modulation a signal
  • the 6-channel modulated signal is a signal to be modulated for the quadrature modulator 96, the quadrature modulator 97, and the quadrature modulator 98
  • the 6 channels of the signal to be modulated are divided into two groups, a total of Divided into three sets of signal streams, quadrature modulator 96, quadrature modulator 97 and quadrature modulator 98 respectively quadrature modulate a set of signal streams to generate three modulated signals; combiner 99 pairs of quadrature modulators 96.
  • the three modulator signals output by the quadrature modulator 97 and the quadrature modulator 98 are combined to generate a first analog signal stream.
  • the combiner in mode b2 can be replaced with p+1 orthogonal modulators.
  • quadrature modulator 100 orthogonally modulates the output signals of quadrature modulator 96 and quadrature modulator 97, and quadrature modulator 101 pairs quadrature modulator 100.
  • the output signal of quadrature modulator 98 is quadrature modulated to generate a first analog signal stream. It can be seen that the combiner 99 of FIG. 9 can be replaced with the quadrature modulator 100 and the quadrature modulator 101 of FIG.
  • the DPU in the embodiment of the present application may also use m (2 ⁇ m ⁇ n) combiners to combine n analog signal streams to obtain m analog signal streams, and then adopt at least one orthogonal modulator.
  • the m analog signal streams are quadrature modulated to generate a first analog signal stream.
  • the DPU combines the n-channel sub-analog signal streams into the first analog signal stream.
  • the DPU may also use other methods to combine the n-channel sub-analog signals. Is the first analog signal stream. No more examples are given here.
  • the DPU may further amplify each sub-analog signal stream by using an amplifier, so that the DPU combines all the amplified sub-analog signal streams into the first analog signal stream.
  • the DPU sends the first analog signal stream to the at least one CPE through the DSL.
  • the DPU may send the first analog signal stream to different CPEs at different times according to the requirements of the CPE, or may simultaneously send the first analog signal stream to a part of the CPEs in the at least one CPE through the router/power splitter.
  • the CPU sends the first analog signal to the corresponding line according to the instruction of the pre-configured switch 51, and sends the LD through the line to the CPE.
  • the process of processing the first analog signal stream is the same for each CPE that receives the first analog signal stream.
  • the embodiment of the present application uses a CPE as an example to describe a process in which a CPE processes a first analog signal stream.
  • the CPE configures processing parameters according to the second configuration signal.
  • the processing parameters may be demodulation parameters, shunt parameters, and the like.
  • the CPE can configure the processing parameter, that is, after S302', execute S306.
  • the CPE converts the first analog signal stream into the first data stream.
  • the CPE After receiving the first analog signal stream, the CPE converts the first analog signal stream into a first data stream to facilitate servicing a terminal connected to the CPE.
  • the CPE may convert the first analog signal stream into the first data stream in any of the following manners:
  • Method I The CPE performs serial-to-parallel conversion on the first analog signal stream to obtain an n-channel sub-analog signal stream; then, the CPE performs analog-to-digital conversion and demodulation processing on the n-channel sub-analog signal stream to obtain a third sub-number of the n-channel.
  • Method II The CPE performs analog-to-digital conversion on the first analog signal stream to obtain a second digital time domain signal stream; then, the CPE performs serial-to-parallel conversion on the second digital time domain signal stream to obtain an n-channel second sub-number a time domain signal stream, and further, the CPE demodulates the n second sub-digital time domain signal stream to obtain an n-channel fourth sub-digital frequency domain signal stream; finally, the CPE will n-channel fourth sub-digital frequency
  • the domain signal flows together and performs constellation demapping to obtain a first data stream.
  • Method III The CPE performs analog-to-digital conversion and demodulation processing on the first analog signal stream to obtain a third digital frequency domain signal stream; then, the CPE performs serial-to-parallel conversion on the third digital frequency domain signal stream to obtain n.
  • the first analog signal streams of the CPE are subjected to analog-to-digital conversion, demodulation processing, and constellation demapping.
  • the difference between the above modes I to III is that the CPE performs the serial-to-parallel conversion.
  • the CPE can implement serial-to-parallel conversion by using a splitter, or can perform serial-to-parallel conversion by using one or more stages of quadrature demodulator, and can also implement a string by using a splitter and a multi-stage quadrature demodulator.
  • the embodiment of the present application does not specifically limit this.
  • the CPE converts the first analog signal stream into the first data stream. the process of.
  • the CPE after receiving the first analog signal stream, splits the first analog signal stream into a first signal stream having a frequency range of 0 to 212 MHz and a frequency range of A second signal stream of 250 to 462 MHz.
  • the quadrature demodulator 111 demodulates the first signal stream to generate a sub-analog signal stream 1 and a sub-analog signal stream 2.
  • the quadrature demodulator 112 demodulates the second signal stream to generate a sub-analog signal stream 3 and a sub-analog signal stream 4.
  • an analog to digital (A/D) converter 113 and a modulator 114 respectively perform analog-to-digital conversion and demodulation processing on each sub-analog signal stream to obtain a 4-channel third sub-digital frequency domain signal stream;
  • the combiner 115 combines the four channels of the third sub-digital frequency domain signal into one digital frequency domain signal stream, so that the constellation demapping of the digital frequency domain signal stream generated by the combiner 115 can be obtained.
  • the first data stream is a digital to digital (A/D) converter 113 and a modulator 114 respectively perform analog-to-digital conversion and demodulation processing on each sub-analog signal stream to obtain a 4-channel third sub-digital frequency domain signal stream;
  • the combiner 115 combines the four channels of the third sub-digital frequency domain signal into one digital frequency domain signal stream, so that the constellation demapping of the digital frequency domain signal stream generated by the combiner 115 can be obtained.
  • the first data stream is
  • the sub-analog signal stream 1 may correspond to the data of the 1:4:8189 carrier in the embodiment shown in FIG. 4.
  • the sub-analog signal stream 2 may be 2:4:8190 in the embodiment shown in FIG.
  • the sub-analog signal stream 3 may correspond to the data of the 3:4:8191 carrier in the embodiment shown in FIG. 4, and the sub-analog signal stream 4 may be 4:4 in the embodiment shown in FIG. : 8192 carrier data correspondence.
  • the splitter 110 of FIG. 11 can be replaced with a quadrature demodulator 120.
  • the process of serial-to-parallel conversion of the CPE may refer to the process of serial-to-parallel conversion of the CPE in the mode I, which will not be described one by one.
  • the DSLAM 130 includes a constellation mapping module 1300, a serial to parallel conversion module 1301, a precoder 1302, a modulator 1303, a D/A converter 1304, an LD 1305, and a Hybrid circuit 1306.
  • the DPU 131 includes a first Hybrid circuit 1310, a Low Noise Amplifier (LNA) 1311, a combiner/multiplexer 1312, an LD 1313, and a second Hybrid circuit 1314;
  • the CPE 132 includes a splitter/demultiplexer
  • LD is used to drive data transmission
  • Hybrid circuit is used to distinguish between uplink data and downlink data.
  • the constellation mapping module 1300 performs constellation mapping on the first data stream to obtain a first digital frequency domain signal stream; and the serial-to-parallel conversion module 1301 performs serial-to-parallel conversion on the first digital frequency domain signal stream to obtain a 4-channel first.
  • the sub-digital frequency domain signal stream (refer to FIG.
  • the 4-channel first sub-digital frequency domain signal streams are: 1:4:8189 carrier data, 2:4:8190 carrier data, 3 : 4: 8191 carrier data, 4: 4: 8192 carrier data; precoder 1302, modulator 1303, and D/A converter 1304 respectively process each sub-digital frequency domain signal stream sequentially to obtain 4-channel sub-simulation Signal stream; each of the four sub-analog signal streams is transmitted to the DPU 131 via the LD 1305 and the Hybrid circuit 1306.
  • the first Hybrid circuit 1310 in the DPU 131 After receiving the 4-channel sub-analog signal stream, the first Hybrid circuit 1310 in the DPU 131 sends the received 4-channel sub-analog signal to the LNA 1311 to facilitate the LNA 1311 to remove the noise of the sub-analog signal stream; the de-noised 4-way signal
  • the analog signal stream is combined by the combiner/multiplexer 1312 into a first analog signal stream (this process can be referred to FIG. 5, FIG. 7, or FIG. 8 above), and the combiner/multiplexer 1312 can be via a different LD. 1313 and second Hybrid circuit 1314 send a first analog signal stream to a different CPE 132.
  • the splitter/demultiplexer 1320 in the CPE 132 performs serial-to-parallel conversion on the first analog signal stream received by the device to obtain an n-channel sub-analog signal stream (refer to FIG. 11 or FIG. 12 above for this process);
  • the /D converter 1321 and the demodulator 1322 respectively process each of the sub-analog signal streams sequentially to obtain n channels of the third sub-digital frequency domain signal stream;
  • the combiner 1323 combines the n-channel third sub-digital frequency domain signals.
  • the path, the solution constellation mapping module 1324 performs constellation demapping on the output signal of the combiner 1323 to obtain a first data stream.
  • the combiner/multiplexer 1312 in FIG. 13 may include the combiner S and the switch 51 in FIG. 5, and may also include the orthogonal modulator 70 in FIG.
  • the intermodulator 71 and the orthogonal modulator 72 may further include the combiner 80 of FIG. 8, and may further include the orthogonal modulator 90 to the orthogonal modulator 98 of FIG. 9, and the combiner 99, and may also The quadrature modulator 90 to the quadrature modulator 98 and the quadrature modulator 100 to the quadrature modulator 101 in FIG. 10 are included.
  • the 13 may include the splitter 110, the quadrature demodulator 111, and the quadrature demodulator 112 in FIG. 11, and may also include a quadrature demodulator 120, orthogonal Demodulator 111 and quadrature demodulator 112. This embodiment of the present application does not specifically limit this.
  • FIGS. 3 to 13 are used to indicate the transmission process of downlink data. It is easy to understand that for the uplink data, the processing of each device is opposite to the processing of the downlink data. Regardless of the device, if there is a combiner in the downlink data transmission process, there is a splitter in the uplink data transmission process, wherein the combiner and the splitter may be different devices or the same device. Similarly, if there is a multiplexer in the downlink data transmission process, there is a demultiplexer in the uplink data transmission process, wherein the multiplexer and the demultiplexer may be different devices or the same device.
  • the modulator and the demodulator may be different devices or the same device.
  • the modulator and the demodulator may be different devices or the same device.
  • there is an A/D converter in the downlink data transmission process there is a D/A converter in the uplink data transmission process, wherein the A/D converter and the D/A converter may be different devices, or The same device.
  • the DPU uses the combiner S to combine the n analog sub-signal streams into a first analog signal stream, and the combiner S includes a signal multiplexer 50 and a switch. 51.
  • the operation of the signal multiplexer 50 is as shown in FIG. 6.
  • the DPU includes a splitter S', which includes a signal demultiplexer 140 and a switch 141. After receiving the first analog signal stream sent by the switch 141 that has been turned on, the signal demultiplexer 140 decomposes the first analog signal stream into n sub-analog signal streams.
  • FIG. 15 shows the operation of the signal demultiplexer 140.
  • the signal demultiplexer 140 After receiving the first analog signal stream sent by the switch 141 that has been turned on, the signal demultiplexer 140 performs inverse sampling by the multiplexed orthogonal CDMA multiplier 140, and then extracts the valid signal. To complete the serial and conversion.
  • the splitter S' in FIG. 14 and the combiner S in FIG. 5 may be integrated in the same device, or may be independently set.
  • the DPU only retains the processing module of the analog signal, which effectively reduces the power consumption of the DPU and reduces the volume and cost of the DPU compared with the prior art.
  • the DPU since the DPU only retains the processing module of the analog signal, the delay of data processing also decreases.
  • the embodiment of the present application provides a DPU 160 for performing the steps performed by the DPU in the above communication method.
  • the DPU 160 provided by the embodiment of the present application may include a module corresponding to the corresponding step.
  • the embodiment of the present application may divide the function module into the DPU 160 according to the foregoing method example.
  • each function module may be divided according to each function, or two or more functions may be integrated into one processing module.
  • the above integrated modules can be implemented in the form of hardware or in the form of software functional modules.
  • the division of modules in the embodiments of the present application is schematic, and is only a logical function division, and may be further divided in actual implementation.
  • FIG. 16 shows a possible structural diagram of the DPU 160.
  • the DPU 160 includes a receiving unit 1600, a combining unit 1601, a transmitting unit 1602, a configuration unit 1603, and a sampling unit 1604.
  • the receiving unit 1600 is configured to support the DPU 160 to perform S302, S302' in the above embodiments, and/or other processes for the techniques described herein;
  • the combining unit 1601 is configured to support the DPU 160 to perform the above embodiments.
  • the DPU 160 provided by the embodiment of the present application includes but is not limited to the above modules, for example, the DPU 160 may further include a storage unit.
  • the storage unit can be used to store the program code of the DPU 160. All the related content of the steps involved in the foregoing method embodiments may be referred to the functional descriptions of the corresponding functional modules, and details are not described herein again.
  • the DPU 160 When the DPU 160 is running, the DPU 160 performs the steps of the DPU in the communication method of the embodiment shown in FIG.
  • Another embodiment of the present application further provides a computer readable storage medium having instructions stored therein, wherein the DPU executes the communication method of the embodiment shown in FIG. 3 when the instruction is run on the DPU The steps of the DPU.
  • a computer program product comprising computer executable instructions stored in a computer readable storage medium; at least one processor of the DPU may be Reading the storage medium reads the computer execution instructions, and the at least one processor executing the computer execution instructions causes the DPU to perform the steps of executing the DPU in the communication method illustrated in FIG.
  • the embodiment of the present application provides a DSLAM 170 for performing the steps performed by the DSLAM in the above communication method.
  • the DSLAM 170 provided by the embodiment of the present application may include a module corresponding to the corresponding step.
  • the embodiment of the present application may divide the function module of the DSLAM 170 according to the foregoing method example.
  • each function module may be divided according to each function, or two or more functions may be integrated into one processing module.
  • the above integrated modules can be implemented in the form of hardware or in the form of software functional modules.
  • the division of modules in the embodiments of the present application is schematic, and is only a logical function division, and may be further divided in actual implementation.
  • FIG. 17 shows a possible structural diagram of the DSLAM 170 in the case where the respective functional modules are divided by corresponding functions.
  • the DSLAM 170 includes an acquisition unit 1700, a conversion unit 1701, and a transmission unit 1702.
  • the obtaining unit 1700 is for supporting the DSLAM 170 to perform S300 in the above embodiment, and/or other processes for the techniques described herein;
  • the converting unit 1701 is configured to support the DSLAM 170 to perform S301 in the above embodiment, and/or Or other processes for the techniques described herein;
  • the transmitting unit 1702 is configured to support the DSLAM 170 to perform S302, S302', and/or other processes for the techniques described herein.
  • the DSLAM 170 provided by the embodiment of the present application includes, but is not limited to, the foregoing modules.
  • the DSLAM 170 may further include a storage unit.
  • the storage unit can be used to store the program code of the DSLAM 170. All the related content of the steps involved in the foregoing method embodiments may be referred to the functional descriptions of the corresponding functional modules, and details are not described herein again.
  • the DSLAM 170 When the DSLAM 170 is running, the DSLAM 170 performs the steps of the DSLAM in the communication method of the embodiment shown in FIG.
  • Another embodiment of the present application further provides a computer readable storage medium having instructions stored therein.
  • the DSLAM executes the communication method of the embodiment shown in FIG. 3. The steps of the DSLAM.
  • a computer program product comprising computer executable instructions stored in a computer readable storage medium; at least one processor of the DSLAM may be Reading the storage medium reads the computer execution instructions, and the at least one processor executing the computer execution instructions causes the DSLAM to perform the steps of performing the DSLAM in the communication method shown in FIG.
  • the computer program product includes one or more computer instructions.
  • the computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable device.
  • the computer instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be from a website site, computer, server or data center Transfer to another website site, computer, server, or data center by wire (eg, coaxial cable, fiber optic, digital subscriber line (DSL), or wireless (eg, infrared, wireless, microwave, etc.).
  • the computer readable storage medium can be any available media that can be accessed by a computer or a data storage device such as a server, data center, or the like that includes one or more available media.
  • the usable medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (such as a solid state disk (SSD)).
  • the disclosed apparatus and method may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the modules or units is only a logical function division.
  • there may be another division manner for example, multiple units or components may be used.
  • the combination may be integrated into another device, or some features may be ignored or not performed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may be one physical unit or multiple physical units, that is, may be located in one place, or may be distributed to multiple different places. . Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.
  • the integrated unit if implemented in the form of a software functional unit and sold or used as a standalone product, may be stored in a readable storage medium.
  • the technical solution of the embodiments of the present application may be embodied in the form of a software product in the form of a software product in essence or in the form of a contribution to the prior art, and the software product is stored in a storage medium.
  • a number of instructions are included to cause a device (which may be a microcontroller, chip, etc.) or a processor to perform all or part of the steps of the methods described in various embodiments of the present application.
  • the foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and the like, which can store program codes. .

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Abstract

本申请实施例公开一种通信方法、装置及系统，涉及通信技术领域，能够解决现有分布式节点单元DPU功耗和成本较高、体积较大的问题。该方法包括：DPU接收接入复用器DSLAM通过数字用户线DSL发送的n路子模拟信号流，n路子模拟信号流为DSLAM将第一数据流转换为n路子模拟信号流得到的，n≥2；DPU将n路子模拟信号流合路为第一模拟信号流；DPU通过DSL向至少一个用户前端装置CPE发送第一模拟信号流，以便于每个CPE将接收到的第一模拟信号流转换为第一数据流。

Description

一种通信方法、装置及系统
本申请要求于2018年02月13日提交中国专利局、申请号为201810150830.0、发明名称为“一种通信方法、装置及系统”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及通信技术领域，尤其涉及一种通信方法、装置及系统。
背景技术
光纤接入技术包括光纤到路边(Fiber To The Curb，FTTC)、光纤到人井(Fiber To The Manhole，FTTM)以及光纤到楼(Fiber To The Building，FTTB)等。
为了进一步地挖掘现有铜线的带宽潜力，现在开始考虑利用FTTC/FTTM技术以及铜线到楼(Copper to The Building，CuTTB)技术的综合使用，即FTTC/FTTM侧的数字用户线(Digital Subscriber Line，DSL)接入复用器(DSL Access Multiplexer，DSLAM)与位于CuTTB位置的分布点单元(Distribution Point Unit，DPU)之间采用铜线进行数据回传。图1示出了具备这一结构的通信系统，其中，DPU与至少一个用户前端装置(Customer Premises Equipment，CPE)连接，DPU与每个CPE之间均采用铜线进行数据传输。
在图1示出的通信系统中，DSLAM将从网络服务器获取到的数据流转换为多路低带宽子模拟信号流，并向DPU发送所述多路低带宽子模拟信号流；DPU在接收到多路低带宽子模拟信号流后，需要对所述多路低带宽子模拟信号流进行解析、模数转换、调制等处理，以生成一路高带宽数据流，从而向与该DPU连接的CPE发送该高带宽数据流。
上述方法中，DPU需要大量的数字信号处理(Digital Signal Processing，DSP)单元，导致DPU的功耗较高、体积较大、成本较高。
发明内容
本申请实施例提供一种通信方法、装置及系统，能够解决现有DPU功耗和成本较高、体积较大的问题。
为达到上述目的，本申请采用如下技术方案：
第一方面，提供一种通信方法，DPU接收DSLAM通过数字用户线DSL发送的n路子模拟信号流，该n路子模拟信号流为DSLAM将第一数据流转换为n(n≥2)路子模拟信号流得到的；然后，该DPU将n路子模拟信号流合路为第一模拟信号流，并通过DSL向至少一个CPE发送第一模拟信号流，以便于每个CPE将接收到的第一模拟信号流转换为第一数据流。
上述n路子模拟信号流中的每路子模拟信号流的带宽小于第一模拟信号流的带宽，DPU在接收到n路较小带宽的子模拟信号流后，将其合路为较高带宽的第一模拟信号流，并向CPE发送该第一模拟信号流。本申请实施例中的DPU不再具备数字信号处理功能，仅保留了模拟信号的处理模块，从而降低DPU的功耗、减小DPU的体积和 成本。此外，由于DPU仅保留了模拟信号的处理模块，因此，数据处理的延时也会下降。
可选的，在本申请的一种可能的实现方式中，DPU还接收DSLAM发送的用于指示DPU配置与分路参数对应的合路参数的第一配置信号，该分路参数为DSLAM在将第一数据流转换为n路子模拟信号流的过程中所使用的参数，在接收到第一配置信号后，DPU根据第一配置信号，配置合路参数。相应的，上述“DPU将n路子模拟信号流合路为第一模拟信号流”的方法为：DPU根据合路参数，将n路子模拟信号流合路为第一模拟信号流。
第一配置信号可以包括上述分路参数，也可以仅仅是一个起指示作用的指示信号，本申请实施例对此不作具体限定。DPU根据第一配置信号，配置合路参数，能够保证DPU对n路子模拟信号流合路时采用的方式与DSLAM将第一数据流转换为n路子模拟信号流的过程分路采用的方式对应。
可选的，在本申请的另一种可能的实现方式中，上述“DPU将n路子模拟信号流合路为第一模拟信号流”的方法为：DPU对n路子模拟信号流中的每一路子模拟信号流进行过采样，并将所有过采样后的子模拟信号流合路，以生成第一模拟信号流。
可选的，在本申请的另一种可能的实现方式中，上述“DPU对n路子模拟信号流中的每一路子模拟信号流进行过采样”的方法为：DPU对n路子模拟信号流中的每一路子模拟信号流进行正交采样，以获取n路正交采样后的子模拟信号流。相应的，上述“DPU将所有过采样后的子模拟信号流合路，以生成第一模拟信号流”的方法为：DPU将n路正交采样后的子模拟信号流合路，以生成第一模拟信号流。
可选的，在本申请的另一种可能的实现方式中，上述“DPU将n路子模拟信号流合路为第一模拟信号流”的方法为：DPU对n路子模拟信号流进行正交调制，以生成第一模拟信号流。
可选的，在本申请的另一种可能的实现方式中，在n＝2 K，K≥1的情况下，上述“DPU将n路子模拟信号流合路为第一模拟信号流”的方法为：DPU采用n-1个正交调制器，对n路子模拟信号流进行K级正交调制，以生成第一模拟信号流。其中，在K级正交调制的第i级正交调制过程中，DPU采用2 K-i个正交调制器，对2 K-i+1路待调制信号流进行正交调制，得到2 K-i路调制信号流，i∈{1，......，K}。第1级正交调制的待调制信号流为子模拟信号流，第K级正交调制得到的调制信号流为第一模拟信号流。
可选的，在本申请的另一种可能的实现方式中，在n＝2 M·(2p+1)，M≥1，p≥0的情况下，上述“DPU将n路子模拟信号流合路为第一模拟信号流”的方法为：DPU采用
Figure PCTCN2018096913-appb-000001
个正交调制器，对n路子模拟信号流进行M级正交调制，得到2p+1路调制信号，并将2p+1路调制信号合路，以生成第一模拟信号流。其中，在M级正交调制的第j级正交调制过程中，DPU采用(2p+1)·2 M-j个正交调制器，对(2p+1)·2 M-j+1路待调制信号流进行正交调制，得到(2p+1)·2 M-j路调制信号流，j∈{1，......，M}，第1级正交调制的待调制信号流为子模拟信号流。
可选的，在本申请的另一种可能的实现方式中，在n＝2 M·(2p+2)，M≥1，p≥0的情况下，上述“DPU将n路子模拟信号流合路为第一模拟信号流”的方法为： DPU采用2 M-1·(2p+2)个正交调制器，对n路子模拟信号流进行正交调制，得到2 M-1·(2p+2)路调制信号，并将2 M-1·(2p+2)路调制信号合路，以生成第一模拟信号流。
本申请实施例中，DPU将n路子模拟信号流合路为第一模拟信号流的方式可以为多种，本申请实施例对此不作具体限定。
可选的，在本申请的另一种可能的实现方式中，n路子模拟信号流的带宽之和小于或等于第一模拟信号流的带宽；n路子模拟信号流中的每一路子模拟信号流的带宽小于第一数据流的带宽。
第二方面，提供一种DPU。具体的，该DPU包括接收单元、合路单元以及发送单元。
本申请提供的各个单元模块所实现的功能具体如下：
上述接收单元，用于接收接入复用器DSLAM通过数字用户线DSL发送的n路子模拟信号流，n路子模拟信号流为DSLAM将第一数据流转换为n路子模拟信号流得到的，n≥2。上述合路单元，用于将上述接收单元接收到的n路子模拟信号流合路为第一模拟信号流。上述发送单元，用于通过DSL向至少一个用户前端装置CPE发送上述合路单元生成的第一模拟信号流，以便于每个CPE将接收到的第一模拟信号流转换为第一数据流。
可选的，在本申请的一种可能的实现方式中，上述接收单元，还用于接收DSLAM发送的第一配置信号，第一配置信号用于指示DPU配置与分路参数对应的合路参数，分路参数为DSLAM在将第一数据流转换为n路子模拟信号流的过程中所使用的参数。本申请实施例提供的DPU还包括配置单元，该配置单元，用于根据第一配置信号，配置合路参数。上述合路单元，具体用于根据上述配置单元配置的合路参数，将n路子模拟信号流合路为第一模拟信号流。
可选的，在本申请的另一种可能的实现方式中，本申请实施例提供的DPU还包括采样单元，该采样单元用于对上述接收单元接收到的n路子模拟信号流中的每一路子模拟信号流进行过采样。上述合路单元，具体用于将所有上述采样单元过采样后的子模拟信号流合路，以生成第一模拟信号流。
可选的，在本申请的另一种可能的实现方式中，上述采样单元，具体用于对n路子模拟信号流中的每一路子模拟信号流进行正交采样，以获取n路正交采样后的子模拟信号流。上述合路单元，具体用于将n路上述采样单元正交采样后的子模拟信号流合路，以生成第一模拟信号流。
可选的，在本申请的另一种可能的实现方式中，上述合路单元，具体对n路子模拟信号流进行正交调制，以生成第一模拟信号流。
可选的，在本申请的另一种可能的实现方式中，在n＝2 K，K≥1的情况下，上述合路单元具体用于：采用n-1个正交调制器，对n路子模拟信号流进行K级正交调制，以生成第一模拟信号流。其中，在K级正交调制的第i级正交调制过程中，DPU采用2 K-i个正交调制器，对2 K-i+1路待调制信号流进行正交调制，得到2 K-i路调制信号流，i∈{1，......，K}；
第1级正交调制的待调制信号流为子模拟信号流，第K级正交调制得到的调制信 号流为第一模拟信号流。
可选的，在本申请的另一种可能的实现方式中，在n＝2 M·(2p+1)，M≥1，p≥0的情况下，上述合路单元具体用于：采用
Figure PCTCN2018096913-appb-000002
个正交调制器，对n路子模拟信号流进行M级正交调制，得到2p+1路调制信号；将2p+1路调制信号合路，以生成第一模拟信号流。其中，在M级正交调制的第j级正交调制过程中，DPU采用(2p+1)·2 M-j个正交调制器，对(2p+1)·2 M-j+1路待调制信号流进行正交调制，得到(2p+1)·2 M-j路调制信号流，j∈{1，......，M}，第1级正交调制的待调制信号流为子模拟信号流。
可选的，在本申请的另一种可能的实现方式中，在n＝2 M·(2p+2)，M≥1，p≥0的情况下，上述合路单元具体用于：采用2 M-1·(2p+2)个正交调制器，对n路子模拟信号流进行正交调制，得到2 M-1·(2p+2)路调制信号；将2 M-1·(2p+2)路调制信号合路，以生成第一模拟信号流。
可选的，在本申请的另一种可能的实现方式中，n路子模拟信号流的带宽之和小于或等于第一模拟信号流的带宽；n路子模拟信号流中的每一路子模拟信号流的带宽小于第一数据流的带宽。
第三方面，提供一种DPU，该DPU包括：一个或多个处理器、存储器、通信接口。其中，存储器、通信接口与一个或多个处理器耦合；DPU通过通信接口与其他设备通信，存储器用于存储计算机程序代码，计算机程序代码包括指令，当一个或多个处理器执行指令时，DPU执行如上述第一方面及其各种可能的实现方式所述的通信方法。
第四方面，还提供一种计算机可读存储介质，该计算机可读存储介质中存储有指令；当其在DPU上运行时，使得该DPU执行如上述第一方面及其各种可能的实现方式的通信方法。
第五方面，还提供一种包含指令的计算机程序产品，当其在上述DPU上运行时，使得该DPU执行如上述第一方面及其各种可能的实现方式的通信方法。
本申请中第二方面、第三方面、第四方面、第五方面及其各种实现方式的具体描述，可以参考第一方面及其各种实现方式中的详细描述；并且，第二方面、第三方面、第四方面、第五方面及其各种实现方式的有益效果，可以参考第一方面及其各种实现方式中的有益效果分析，此处不再赘述。
在本申请中，上述DPU的名字对设备或功能模块本身不构成限定，在实际实现中，这些设备或功能模块可以以其他名称出现。只要各个设备或功能模块的功能和本申请类似，属于本申请权利要求及其等同技术的范围之内。
第六方面，提供一种通信方法，DSLAM在获取到第一数据流后，将该第一数据流转换为n(n≥2)路子模拟信号流，并通过数字用户线DSL向分布式节点单元DPU发送n路子模拟信号流，以便于DPU将n路子模拟信号流合路为第一模拟信号流。
DSLAM将第一数据流转换为低带宽的n路子模拟信号流，这样，在向DPU发送的过程中，能够较好的适应DSL的带宽。
可选的，在本申请的一种可能的实现方式中，上述“DSLAM将第一数据流转换为n路子模拟信号流”的方法为：DSLAM对第一数据流进行星座映射，以获得第一 数字频域信号流；然后，该DSLAM对第一数字频域信号流进行串并转换，以获得n路第一子数字频域信号流；最后，该DSLAM对n路第一子数字频域信号流进行预编码处理、调制处理以及数模转换，以获得n路子模拟信号流。
可选的，在本申请的另一种可能的实现方式中，上述“DSLAM将第一数据流转换为n路子模拟信号流”的方法为：DSLAM对第一数据流进行星座映射以及预编码处理，以获得第二数字频域信号流；然后，该DSLAM对第二数字频域信号流进行串并转换，以获得n路第二子数字频域信号流；最后，该DSLAM对n路第二子数字频域信号流进行调制处理以及数模转换，以获得n路子模拟信号流。
可选的，在本申请的另一种可能的实现方式中，上述“DSLAM将第一数据流转换为n路子模拟信号流”的方法为：DSLAM对第一数据流进行星座映射、预编码处理以及调制处理，以获得第一数字时域信号流；然后，该DSLAM对第一数字时域信号流进行串并转换，以获得n路第一子数字时域信号流；最后，该DSLAM对n路第一子数字时域信号流进行数模转换，以获得n路子模拟信号流。
可选的，在本申请的另一种可能的实现方式中，上述“DSLAM将第一数据流转换为n路子模拟信号流”的方法为：DSLAM对第一数据流进行星座映射、预编码处理、调制处理以及数模转换，以获得第二模拟信号流，并对第二模拟信号流进行串并转换，以获得n路子模拟信号流。
可以看出，DSLAM可以在不同位置进行串并转换。
可选的，在本申请的另一种可能的实现方式中，DSLAM还向DPU发送第一配置信号，第一配置信号用于指示DPU配置与分路参数对应的合路参数，分路参数为DSLAM在将第一数据流转换为n路子模拟信号流的过程中所使用的参数。
可选的，在本申请的另一种可能的实现方式中，DSLAM还通过DPU向CPE发送第二配置信号，第二配置信号用于指示CPE配置与分路参数对应的处理参数，分路参数为DSLAM在将第一数据流转换为n路子模拟信号流的过程中所使用的参数。
DSLAM向DPU发送第一配置信号，能够保证DPU对n路子模拟信号流合路时采用的方式与DSLAM将第一数据流转换为n路子模拟信号流的过程分路采用的方式对应。同理，DSLAM向CPE发送第二配置信号，也能够保证CPE对将第一模拟信号流转换为第一数据流的过程中采用的分路方式与DSLAM将第一数据流转换为n路子模拟信号流的过程中采用的分路方式对应。
第七方面，提供一种DSLAM。具体的，该DSLAM包括获取单元、转换单元以及发送单元。
本申请提供的各个单元模块所实现的功能具体如下：
上述获取单元，用于获取第一数据流。上述转换单元，用于将上述获取单元获取到的第一数据流转换为n路子模拟信号流，n≥2。上述发送单元，用于通过数字用户线DSL向分布式节点单元DPU发送上述转换单元得到的n路子模拟信号流，以便于DPU将n路子模拟信号流合路为第一模拟信号流。
可选的，在本申请的一种可能的实现方式中，上述转换单元具体用于：对第一数据流进行星座映射，以获得第一数字频域信号流；对第一数字频域信号流进行串并转换，以获得n路第一子数字频域信号流；对n路第一子数字频域信号流进行预编码处 理、调制处理以及数模转换，以获得n路子模拟信号流。
可选的，在本申请的另一种可能的实现方式中，上述转换单元具体用于：对第一数据流进行星座映射以及预编码处理，以获得第二数字频域信号流；对第二数字频域信号流进行串并转换，以获得n路第二子数字频域信号流；对n路第二子数字频域信号流进行调制处理以及数模转换，以获得n路子模拟信号流。
可选的，在本申请的另一种可能的实现方式中，上述转换单元具体用于：对第一数据流进行星座映射、预编码处理以及调制处理，以获得第一数字时域信号流；对第一数字时域信号流进行串并转换，以获得n路第一子数字时域信号流；对n路第一子数字时域信号流进行数模转换，以获得n路子模拟信号流。
可选的，在本申请的另一种可能的实现方式中，上述转换单元具体用于：对第一数据流进行星座映射、预编码处理、调制处理以及数模转换，以获得第二模拟信号流；对第二模拟信号流进行串并转换，以获得n路子模拟信号流。
可选的，在本申请的另一种可能的实现方式中，上述发送单元，还用于向DPU发送第一配置信号，第一配置信号用于指示DPU配置与分路参数对应的合路参数，分路参数为DSLAM在将第一数据流转换为n路子模拟信号流的过程中所使用的参数。
可选的，在本申请的另一种可能的实现方式中，上述发送单元，还通过DPU向CPE发送第二配置信号，第二配置信号用于指示CPE配置与分路参数对应的处理参数，分路参数为DSLAM在将第一数据流转换为n路子模拟信号流的过程中所使用的参数。
第八方面，提供一种DSLAM，该DSLAM包括：一个或多个处理器、存储器、通信接口。其中，存储器、通信接口与一个或多个处理器耦合；DSLAM通过通信接口与其他设备通信，存储器用于存储计算机程序代码，计算机程序代码包括指令，当一个或多个处理器执行指令时，DSLAM执行如上述第六方面及其各种可能的实现方式所述的通信方法。
第九方面，还提供一种计算机可读存储介质，该计算机可读存储介质中存储有指令；当其在DSLAM上运行时，使得该DSLAM执行如上述第六方面及其各种可能的实现方式的通信方法。
第十方面，还提供一种包含指令的计算机程序产品，当其在上述DSLAM上运行时，使得该DSLAM执行如上述第六方面及其各种可能的实现方式的通信方法。
本申请中第七方面、第八方面、第九方面、第十方面及其各种实现方式的具体描述，可以参考第六方面及其各种实现方式中的详细描述；并且，第七方面、第八方面、第九方面、第十方面及其各种实现方式的有益效果，可以参考第六方面及其各种实现方式中的有益效果分析，此处不再赘述。
在本申请中，上述DSLAM的名字对设备或功能模块本身不构成限定，在实际实现中，这些设备或功能模块可以以其他名称出现。只要各个设备或功能模块的功能和本申请类似，属于本申请权利要求及其等同技术的范围之内。
第十一方面，提供一种通信系统，其特征在于，包括如上述第二方面及其任意一种可能的实现方式所述的DPU、如上述第七方面及其任意一种可能的实现方式所述的DSLAM以及至少一个CPE；其中，所述CPU与所述DSLAM之间通过n(n≥2)条DSL连接，所述至少一个CPE中的每个CPE均通过DSL与所述DPU连接。
第十一方面及其各种实现方式的有益效果，可以参考上述第二方面、第七方面及其各种实现方式中的有益效果分析，此处不再赘述。
本申请的这些方面或其他方面在以下的描述中会更加简明易懂。
附图说明
图1为本申请实施例中由FTTC/FTTM以及CuTTB组成的通信系统的结构示意图；
图2为本申请实施例中xDSL系统的结构示意图；
图3为本申请实施例提供的通信方法的流程示意图；
图4为本申请实施例中DSLAM处理数据流的流程示意图；
图5为本申请实施例中DPU生成第一模拟信号流的流程示意图一；
图6为本申请实施例中信号复用器的工作原理示意图；
图7为本申请实施例DPU生成第一模拟信号流的流程示意图二；
图8为本申请实施例DPU生成第一模拟信号流的流程示意图三；
图9为本申请实施例DPU生成第一模拟信号流的流程示意图四；
图10为本申请实施例DPU生成第一模拟信号流的流程示意图五；
图11为本申请实施例CPE生成第一数据流的流程示意图一；
图12为本申请实施例CPE生成第一数据流的流程示意图二；
图13为本申请实施例中在图1示出的通信系统中数据传输的流程示意图；
图14为本申请实施例中DPU生成n路子模拟信号流的流程示意图一；
图15为本申请实施例中信号解复用器的工作原理示意图；
图16为本申请实施例中DPU的结构示意图；
图17为本申请实施例中DSLAM的结构示意图。
具体实施方式
在本申请实施例中，“示例性的”或者“例如”等词用于表示作例子、例证或说明。本申请实施例中被描述为“示例性的”或者“例如”的任何实施例或设计方案不应被解释为比其它实施例或设计方案更优选或更具优势。确切而言，使用“示例性的”或者“例如”等词旨在以具体方式呈现相关概念。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
数字用户线(Digital Subscriber Line，DSL)技术是一种通过电话双绞线，即无屏蔽双绞线(Unshielded Twist Pair，UTP)进行数据传输的高速数据传输技术，包括非对称数字用户线(Asymmetrical Digital Subscriber Line，ADSL)、甚高速数字用户线(Very-high-bit-rate Digital Subscriber Line，VDSL)、基于综合业务数字网(Integrated Services Digital Network，ISDN)的数字用户线(ISDN Digital Subscriber Line，IDSL)和单线对高速数字用户线(Single-pair High-bit-rate Digital Subscriber Line，SHDSL)等。
在各种数字用户线技术(xDSL)中，除了IDSL和SHDSL等基带传输的DSL外，采用通带传输的DSL利用频分复用技术使得DSL与传统电话业务(Plain Old Telephone  Service，POTS)共存于同一对双绞线上，其中，DSL占据高频段，POTS占用4千赫兹(KHz)以下基带部分，POTS信号与DSL信号通过分离器/整合器(Splitter)进行分离或合并。通带传输的xDSL采用离散多音频调制(Discrete Multi-Tone Modulation，DMT)技术进行调制和解调。提供多路DSL接入的系统叫做DSL接入复用器(DSL Access Multiplexer，DSLAM)，其系统连接关系示意图如图2所示。
如图2所示，xDSL系统包括DSLAM 20、CPE 21、网络管理系统22、电话终端23、计算机24、公用电话交换网25。CPE 21包括用户端收发单元211和分离/整合器212，在上行方法，用户端收发单元211接收来自计算机24的信号并对所收到的信号进行编码调制处理，将处理后的DSL信号发送至分离/整合器212；分离/整合器212将来自用户端收发单元211的DSL信号和电话终端23的POTS信号进行整合处理；整合后的信号通过多路的UTP 26的传输，由DSLAM 20中的分离/整合器201接收；分离/整合器201将所接收的信号进行分离，将其中的POTS信号发送至公用电话交换网(Public Switched Telephone Network，PSTN)25，并将其中的DSL信号发送至DSLAM20的局端收发单元202；局端收发单元202将收到的信号进行解调解码处理后发送城域网；网络管理系统(Network Management System，NMS)22用于对整个系统和网络进行管理。在信号的下行方向，则信号按照与上述相反的顺序进行传输。
为了进一步地挖掘现有铜线的带宽潜力，现在开始考虑利用FTTC/FTTM技术以及CuTTB技术的综合使用，即FTTC/FTTM侧的DSLAM与位于CuTTB位置的DPU之间采用铜线进行数据回传。这样的话，图2中的DSLAM 20通过光纤接入网络管理系统22。DSLAM 20与CPE 21之间还连接有DPU，且均为铜线连接。
现有技术中，DSLAM将从网络服务器获取到的数据流转换为多路低带宽子模拟信号流，并向DPU发送所述多路低带宽子模拟信号流；DPU在接收到多路低带宽子模拟信号流后，需要对所述多路低带宽子模拟信号流进行解析、模数转换、调制等处理，以生成一路高带宽数据流，从而向与该DPU连接的CPE发送该高带宽数据流。DPU需要大量的DSP单元才能解析以及调制信号流。但是，大量的DSP单元的存在会提高DPU的功耗、使得DPU的体积较大、成本较高，供电和安装都非常困难。
针对上述问题，本申请实施例提供一种通信方法。根据图1示出的网络的拓扑结构以及DSL在长距离传输下低频信号的衰减小、高频信号的衰减大的规律，由于DSLAM到DPU之间存在多条线路，但距离较远高频衰减较大，只有低频可以用来传输数据，而DPU到CPE之间只有一条线路，距离短高频衰减小，这段线路可用频率带宽非常大，本申请实施例提供的通信方法的思想为：将DSLAM的大带宽信号流分割成多个低频小带宽的子信号流，并通过多条线路传输到DPU，然后，DPU将接收到多个低频小带宽的信号流合路成一条高频大带宽的信号流，并通过较短的入户线路发送给CPE，从而实现FTTC/FTTM到用户远距离传输吉比特大带宽的需求。具体的，该通信方法，将DPU中DSP单元所实现的功能移至DSLAM中，使得DPU仅保留模拟信号的处理模块，从而降低DPU的功耗、减小DPU的体积和成本。此外，由于DPU仅保留了模拟信号的处理模块，因此，数据处理的延时也会下降。这样，DSLAM在获取到第一数据流后，将该第一数据流转换为n(n≥2)路子模拟信号流，并向DPU发送所述n路子模拟信号流；相应的，DPU在接收到所述n路子模拟信号流后，将所 述n路子模拟信号流合路为第一模拟信号流，并通过DSL向至少一个CPE发送所述第一模拟信号流。
本申请实施例提供的通信方法适用于通信系统，该通信系统的架构如图1或图2所示。结合上面描述“将DPU中DSP单元所实现的功能移至DSLAM中，使得DPU仅保留模拟信号的处理模块”可知，本申请实施例所适用的通信系统中，DPU不存在DSP，仅保留有模拟信号的处理模块。DSLAM具备现有技术中DPU的DSP单元的功能。
需要说明的是，本申请实施例提供的通信方法还适用于存在带宽或者频带发生变化的无线通信系统，例如：全球移动通讯(Global System of Mobile communication，GSM)系统、码分多址(Code Division Multiple Access，CDMA)系统、宽带码分多址(Wideband Code Division Multiple Access，WCDMA)系统、通用分组无线业务(General Packet Radio Service，GPRS)、长期演进(Long Term Evolution，LTE)系统、LTE频分双工(Frequency Division Duplex，FDD)系统、LTE时分双工(Time Division Duplex，TDD)、通用移动通信系统(Universal Mobile Telecommunication System，UMTS)、或全球互联微波接入(Worldwide Interoperability for Microwave Access，WiMAX)通信系统等。
以LTE系统为例，LTE系统中的演进式基站(evolved Node Base Station，eNB)相当于上述DSLAM，中继节点相当于上述DPU，终端相当于上述CPE。
与上述图1或上述图2示出的通信系统不同的是，LTE系统eNB与中继节点之间为无线通信，中继节点与终端之间也为无线通信。而上述图1或图2示出的通信系统中，DSLAM与DPU之间为有线通信，DPU与CPE之间也为有线通信。
为了便于描述，本申请实施例后续内容均以图1示出的通信系统为例进行说明。
具体的，请参见图3，图3为本申请实施例提供的通信方法的流程示意图。
如图3所示，该通信方法包括：
S300、DSLAM获取第一数据流。
具体的，DSLAM从网络服务器获取第一数据流。
S301、DSLAM将第一数据流转换为n路子模拟信号流。
DSLAM在获取到第一数据流后，将该第一数据流转换为n路子模拟信号流，以便于在向DPU发送的过程中，能够较好的适应DSL的带宽。
容易理解的是，每一路子模拟信号流的带宽小于第一数据流的带宽。可选的，n路子模拟信号流中每一路子模拟信号流的带宽均相同，或者，n路子模拟信号流中的部分子模拟信号流的带宽相同，或者，n路子模拟信号流中的所有子模拟信号流的带宽均不同，本申请实施例对此不作具体限定。
具体的，DSLAM可以采用下述任一方式将第一数据流转换为n路子模拟信号流：
方式一：DSLAM对第一数据流进行星座映射，以获得第一数字频域信号流；然后，该DSLAM对第一数字频域信号流进行串并转换，以获得n路第一子数字频域信号流；最后，该DSLAM对n路第一子数字频域信号流进行预编码处理、调制处理以及数模转换，以获得n路子模拟信号流。
方式二：DSLAM对第一数据流进行星座映射以及预编码处理，以获得第二数字 频域信号流；然后，该DSLAM对第二数字频域信号流进行串并转换，以获得n路第二子数字频域信号流；最后，该DSLAM对n路第二子数字频域信号流进行调制处理以及数模转换，以获得n路子模拟信号流。
方式三：DSLAM对第一数据流进行星座映射、预编码处理以及调制处理，以获得第一数字时域信号流；然后，该DSLAM对第一数字时域信号流进行串并转换，以获得n路第一子数字时域信号流；最后，DSLAM对n路第一子数字时域信号流进行数模转换，以获得n路子模拟信号流。
方式四：DSLAM对第一数据流进行星座映射、预编码处理、调制处理以及数模转换，以获得第二模拟信号流；然后，该DSLAM对第二模拟信号流进行串并转换，以获得n路子模拟信号流。
可以看出，上述方式一～方式四中，DSLAM对第一数据流均进行星座映射、预编码处理、调制处理以及数模转换。上述方式一～方式四的区别在于：DSLAM进行串并转换的位置。
现以DSLAM采用上述方式一将第一数据流转换为n路子模拟信号流，第一数据流的带宽为424兆赫兹(MHz)，且第一数据流使用资源的子载波数为8192，每一路子模拟信号流的带宽均为106MHz，且子模拟信号流使用资源的子载波数为2048，第一数据流使用资源的子载波间隔与子模拟信号流使用资源的子载波间隔相同，n＝4为例说明DSLAM将第一数据流转换为n路子模拟信号流的过程。
如图4所示，DSLAM将第一数据流进行星座映射之后，获得第一数字频域信号流，该第一数字频域信号流占用8192个载波；该DSLAM将占用8192个载波的第一数字频域信号流，串并转换(这里以等间隔采样为例)，生成4路第一子数字频域信号流，例如：1:4:8189(从第1个载波开始，以4为间隔采样，直到第8189个载波)载波的数据为第一路“第一子数字频域信号流”，2:4:8190(从第2个载波开始，以4为间隔采样，直到第8190个载波)载波的数据为第二路“第一子数字频域信号流”，3:4:8191(从第3个载波开始，以4为间隔采样，直到第8191个载波)载波的数据为第三路“第一子数字频域信号流”，4:4:8192(从第4个载波开始，以4为间隔采样，直到第8192个载波)载波的数据为第四路“第一子数字频域信号流”；该DSLAM对4路第一子数字频域信号流进行预编码处理、调制处理以及数模(Digital to Analog，D/A)转换，以获得4路子模拟信号流。这样，该DSLAM即可通过线路驱动(Line Driver，LD)、Hybrid电路将所述4路子模拟信号流发送到DSL上。
可选的，DSLAM也可以将占用8192个载波的第一数字频域信号流，连续采样，生成4路第一子数字频域信号流，例如：第1个载波～第2048个载波的数据为第一路“第一子数字频域信号流”，第2049个载波～第4096个载波的数据为第二路“第一子数字频域信号流”，第4097个载波～第6144个载波的数据为第三路“第一子数字频域信号流”，第6145个载波～第8192个载波的数据为第四路“第一子数字频域信号流”。
上述方式二、方式三以及方式四中，DSLAM进行串并转换的过程可以参考上述DSLAM在方式一中进行串并转换的过程，此处不再一一进行描述。
S302、DSLAM通过DSL向DPU发送n路子模拟信号流。
S302＇、DSLAM向DPU发送第一配置信号，向CPE发送第二配置信号。
该第一配置信号用于指示DPU配置与DSLAM在将第一数据流转换为n路子模拟信号流的过程中使用的分路参数对应的合路参数。这里，分路参数为DSLAM在将第一数据流转换为n路子模拟信号流的过程中所使用的参数。例如：串并转换的方式、等间隔采样的间隔长度或连续采样的采样长度等。
可选的，第一配置信号可以包括上述分路参数，这样，DPU在获取到第一配置信号后，配置与该分路参数对应的合路参数。第一配置信号也可以仅仅是一个指示信号，例如：通信系统中预先配置了合路参数以及分路参数，DSLAM在根据预先配置的分路参数将第一数据流转换为n路子模拟信号流，然后向DPU发送第一配置信号，DPU在获取到该第一配置信号后，根据预先配置的合路参数配置其内部模块。
该第二配置信号用于指示CPE配置与DSLAM在将第一数据流转换为n路子模拟信号流的过程中使用的分路参数对应的处理参数。
可选的，第二配置信号可以包括上述分路参数，这样，CPE在获取到第二配置信号后，配置与该分路参数对应的处理参数。第二配置信号也可以仅仅是一个指示信号，例如：通信系统中预先配置了处理参数以及分路参数，DSLAM在根据预先配置的分路参数将第一数据流转换为n路子模拟信号流，然后向CPE发送第二配置信号，CPE在获取到该第二配置信号后，根据预先配置的处理参数配置其内部模块。
容易理解的是，DSLAM还向DPU以及CPE发送时钟同步信号，以便于DPU以及CPE进行采样/调制/解调同步。
S303、DPU根据第一配置信号，配置合路参数。
该合路参数可以为调制参数、串并转换方式等。
S304、DPU将n路子模拟信号流合路为第一模拟信号流。
由于CPE对高带宽的需求，DPU在接收到n路低带宽的子模拟信号流后，将所述n路模拟信号流合路为高带宽的第一模拟信号流。
其中，由于噪声等因素的影响，n路子模拟信号流的带宽之和小于或等于第一模拟信号流的带宽。
具体的，DPU可以采用下述任一方式将n路子模拟信号流合路为第一模拟信号流：
方式a：DPU对n路子模拟信号流中的每一路子模拟信号流进行过采样，并将所有过采样后的子模拟信号流合路，以生成第一模拟信号流。
这里，上述“过采样”可以为正交采样，也可以为插值采样，本申请实施例对此不作具体限定。
为了便于理解，本申请实施例以“过采样”为正交采样为例进行说明。
具体的，DPU对n路子模拟信号流中的每一路子模拟信号进行正交采样，以获取n路正交采样后的子模拟信号流；然后，该DPU将n路正交采样后的子模拟信号流合路，以生成第一模拟信号流。其中，每一路正交采样后的子模拟信号流的带宽与第一模拟信号流的带宽相同。例如：每一路子模拟信号流的带宽为106MHz，第一模拟信号流的带宽为424MHz，则每一路正交采样后的子模拟信号流的带宽也为424MHz。
这里，DPU可以采用合路器或复用器(MUX)完成方式a的处理。
示例性的，如图5所示，DPU在接收到4路子模拟信号流后，采用合路器S中的信号复用器50将4路子模拟信号流合路为第一模拟信号流，并在不同时隙接通不同的 开关51，以向不同CPE发送所述第一模拟信号流。
结合图5，图6示出了信号复用器50的工作原理。如图6所示，信号复用器50在接收到4路子模拟信号流后，通过多路正交的码分多址(Code Division Multiple Access，CDMA)乘法器500进行采样，然后利用加法器501对4路正交采样后的子模拟信号流合路，生成第一模拟信号流。
方式b：DPU对n路子模拟信号流进行正交调制，以生成第一模拟信号流。
可选的，DPU可以采用多个正交调制器对n路子模拟信号流进行多级正交调制，以生成第一模拟信号流；也可以采用多个正交调制器对n路子模拟信号流进行一级正交调制，并采用合路器将所有调制后的信号流合路；还可以采用多个正交调制器对n路子模拟信号流进行多级正交调制，并采用多个合路器对信号流合路，本申请实施例对此不作具体限定。
现在以下面几种具体实现方式为例进行说明。
方式b1：在n＝2 K，K≥1的情况下，DPU采用n-1个正交调制器，对n路子模拟信号流进行K级正交调制，以生成第一模拟信号流；其中，在K级正交调制的第i级正交调制过程中，DPU采用2 K-i个正交调制器，对2 K-i+1路待调制信号流进行正交调制，得到2 K-i路调制信号流，i∈{1，......，K}；其中，第1级正交调制的待调制信号流为子模拟信号流，第K级正交调制得到的调制信号流为第一模拟信号流。
一般的，正交调制器是对两路待调制信号流进行正交调制。因此，上述“在K级正交调制的第i级正交调制过程中，DPU采用2K-i个正交调制器，对2 K-i+1路待调制信号流进行正交调制”是指2 K-i个正交调制器中的每个正交调制器对两路待调制信号流进行正交调制，任意两个正交调制器调制的待调制信号均不同。
本申请实施例中，上述2 K-i个正交调制器中的所有正交调制器采用的调制频率不同。
示例性的，如图7所示，若n＝2 2＝4，DPU采用3个正交调制器，对4路子模拟信号进行2级正交调制，以生成第一模拟信号流。在第1级正交调制的过程中，DPU采用2个正交调制器，对4路子模拟信号流进行调制。在第2级正交调制的过程中，DPU采用1个正交调制器，对2路待调制信号流进行调制，以生成第一模拟信号流。
具体的，DPU将接收到的4路子模拟信号流划分为两组，以子模拟信号流1和子模拟信号流2为第一组信号流，子模拟信号流3和子模拟信号流4为第二组信号流为例，正交调制器70采用调制频率106MHz对第一组信号流进行调制，调制后的第一组信号流的频率范围0～212MHz；正交调制器71采用调制频率356MHz对第二组信号流进行调制，调制后的第二组信号流的频率范围250～462MHz；正交调制器72对正交调制器70和正交调制器71的输出信号进行正交调制，获得第一模拟信号流。
可选的，方式b1中第K级的所有正交调制器可以采用合路器替换，这样的话，合路器可直接将第K-1级的所有正交调制器的输出信号进行合路，以生成第一模拟信号流。
结合上述图7，如图8所示，图7中的正交调制器72可以替换为合路器80。
方式b2：在n＝2 M·(2p+1)，M≥1，p≥0的情况下，DPU采用
Figure PCTCN2018096913-appb-000003
Figure PCTCN2018096913-appb-000004
个正交调制器，对n路子模拟信号流进行M级正交调制，得到2p+1路调制 信号；将2p+1路调制信号合路，以生成第一模拟信号流；其中，在M级正交调制的第j级正交调制过程中，DPU采用(2p+1)·2 M-j个正交调制器，对(2p+1)·2 M-j+1路待调制信号流进行正交调制，得到(2p+1)·2 M-j路调制信号流，j∈{1，......，M}，第1级正交调制的待调制信号流为子模拟信号流。
方式b2中的正交调制器与上述方式b1中的正交调制器的作用类似，此处不再进行详细赘述。
示例性的，如图9所示，若n＝2 2·(2+1)＝12，DPU采用9个正交调制器，对12路子模拟信号进行2级正交调制，得到3路调制信号；然后，该DPU将3路调制信号合路，以生成第一模拟信号流。在第1级正交调制的过程中，DPU采用6个正交调制器，对12路子模拟信号流进行调制。在第2级正交调制的过程中，DPU采用3个正交调制器，对6路待调制信号流进行调制，以得到3路调制信号。DPU采用合路器，将所述3路调制信号进行合路，以生成第一模拟信号流。
具体的，DPU将接收到的12路子模拟信号流两两划分为一组，共划分为六组信号流，例如：子模拟信号流1和子模拟信号流2为第一组信号流，子模拟信号流3和子模拟信号流4为第二组信号流，……。正交调制器90、正交调制器91、正交调制器92、正交调制器93、正交调制器94以及正交调制器95分别对一组信号流进行正交调制，生成6路调制信号，所述6路调制信号对于正交调制器96、正交调制器97以及正交调制器98而言，均为待调制信号；将6路待调制信号流两两划分为一组，共划分为三组信号流，正交调制器96、正交调制器97以及正交调制器98分别对一组信号流进行正交调制，生成3路调制信号；合路器99对正交调制器96、正交调制器97以及正交调制器98输出的3路调制信号进行合路，以生成第一模拟信号流。
可选的，方式b2中的合路器可以采用p+1个正交调制器替换。示例性的，结合图9，如图10所示，正交调制器100对正交调制器96以及正交调制器97的输出信号进行正交调制，正交调制器101对正交调制器100以及正交调制器98的输出信号进行正交调制，以生成第一模拟信号流。可以看出，图9中的合路器99可以用图10中的正交调制器100以及正交调制器101替换。
此外，本申请实施例中的DPU还可以采用m(2≤m＜n)个合路器将n路子模拟信号流进行合路，以获取m个模拟信号流，然后采用至少一个正交调制器对所述m个模拟信号流进行正交调制，以生成第一模拟信号流。
方式b3：在n＝2 M·(2p+2)，M≥1，p≥0的情况下，DPU采用2 M-1·(2p+2)个正交调制器，对n路子模拟信号流进行正交调制，得到2 M-1·(2p+2)路调制信号；将2 M-1·(2p+2)路调制信号合路，以生成第一模拟信号流。
其中，2 M-1·(2p+2)个正交调制器中的所有正交调制器采用的调制频率不同。
需要说明的是，上述示例仅仅是对“DPU将n路子模拟信号流合路为第一模拟信号流”的举例说明，本申请实施例中DPU还可以采用其他方式将n路子模拟信号流合路为第一模拟信号流。这里不再一一举例说明。
可选的，DPU在接收到n路子模拟信号流后，还可以通过放大器将每一路子模拟信号流放大，这样，该DPU将所有放大后的子模拟信号流合路为第一模拟信号流。
S305、DPU通过DSL向至少一个CPE发送第一模拟信号流。
实际应用中，DPU根据CPE的需求，可以在不同时刻向不同CPE发送第一模拟信号流，也可以通过选路器/功分器向至少一个CPE中的部分CPE同时发送第一模拟信号流。
具体的，结合上述图5或图6，CPU根据预先配置的开关51的指示，将第一模拟信号发送到对应的线路上，通过该线路的LD发送给CPE。
DPU向至少一个CPE发送第一模拟信号流后，对于接收到第一模拟信号流的每个CPE而言，其处理第一模拟信号流的过程均相同。
为了便于描述，本申请实施例以一个CPE为例说明CPE处理第一模拟信号流的过程。
S306、CPE根据第二配置信号，配置处理参数。
该处理参数可以为解调参数、分路参数等。
可选的，CPE在接收到第二配置信号后，即可配置处理参数，即在S302＇后，执行S306。
S307、CPE将第一模拟信号流转换为第一数据流。
CPE在接收到第一模拟信号流后，将该第一模拟信号流转换为第一数据流，以便于为与该CPE连接的终端提供服务。
具体的，CPE可采用下述任一方式将第一模拟信号流转换为第一数据流：
方式I：CPE对第一模拟信号流进行串并转换，以获得n路子模拟信号流；然后，该CPE对n路子模拟信号流进行模数转换和解调处理，以获得n路第三子数字频域信号流；最后，该CPE将n路第三子数字频域信号流合路，并进行星座解映射，得到第一数据流。
方式II：CPE对第一模拟信号流进行模数转换，以获得第二数字时域信号流；然后，该CPE对第二数字时域信号流进行串并转换，以获得n路第二子数字时域信号流，进而，该CPE对n路第二子数字时域信号流进行解调处理，以获得n路第四子数字频域信号流；最后，该CPE将n路第四子数字频域信号流合路，并进行星座解映射，得到第一数据流。
方式III：CPE对第一模拟信号流进行模数转换和解调处理，以获得第三数字频域信号流；然后，该CPE对第第三数字频域信号流进行串并转换，以获得n路第五子数字频域信号流；最后，该CPE将n路第五子数字频域信号流合路，并进行星座解映射，得到第一数据流。
可以看出，上述方式I～方式III中，CPE均第一模拟信号流均进行模数转换、解调处理以及星座解映射。上述方式I～方式III的区别在于：CPE进行串并转换的位置。
综上所述，“CPE将第一模拟信号流转换为第一数据流”的处理过程可以简单的视为与“DSLAM将第一数据流转换为n路子模拟信号流”的处理过程是相反的。
可选的，CPE可以采用分路器实现串并转换，也可以采用一级或多级正交解调器实现串并转换，还可以采用分路器以及多级正交解调器共同实现串并转换，本申请实施例对此不作具体限定。
现以CPE采用上述方式I将第一模拟信号流转换为第一数据流，n＝4，第一模拟信号流为双频段信号流为例说明CPE将第一模拟信号流转换为第一数据流的过程。
在一个示例中，如图11所示，CPE在接收到第一模拟信号流后，分路器110将第一模拟信号流分路为频率范围为0～212MHz的第一信号流以及频率范围为250～462MHz的第二信号流。正交解调器111对第一信号流进行解调，生成子模拟信号流1和子模拟信号流2。正交解调器112对第二信号流进行解调，生成子模拟信号流3和子模拟信号流4。后续，模数(Analog to Digital，A/D)转换器113和调制器114分别对每一子模拟信号流进行模数转换和解调处理，以获得4路第三子数字频域信号流；合路器115将所述4路第三子数字频域信号流合路为一路数字频域信号流，这样，在对合路器115生成的数字频域信号流进行星座解映射，即可得到第一数据流。
上述子模拟信号流1可以与图4所示实施例中的1:4:8189载波的数据对应，同理，上述子模拟信号流2可以与图4所示实施例中的2:4:8190载波的数据对应，上述子模拟信号流3可以与图4所示实施例中的3:4:8191载波的数据对应，上述子模拟信号流4可以与图4所示实施例中的4:4:8192载波的数据对应。
在另一个示例中，结合图11，如图12所示，图11中的分路器110可以替换为正交解调器120。
上述方式II以及方式III中，CPE进行串并转换的过程可以参考上述CPE在方式I中进行串并转换的过程，此处不再一一进行描述。
为了更加充分的理解本申请提供的通信方法，现在结合DSLAM、DPU以及CPE的内部模块/器件，对本申请中下行数据的传输方法进行描述。具体的，以n＝4，上述方式一、方式I为例进行说明。
结合上述图4以及图5，如图13所示，DSLAM 130包括星座映射模块1300、串并转换模块1301、预编码器1302、调制器1303、D/A转换器1304、LD 1305以及Hybrid电路1306；DPU 131包括第一Hybrid电路1310、低噪声放大器(Low Noise Amplifier，LNA)1311、合路器/复用器1312、LD 1313以及第二Hybrid电路1314；CPE 132包括分路器/解复用器1320、A/D转换器1321、解调器1322、合路器1323以及解星座映射模块1324。其中，LD用于驱动数据的传输，Hybrid电路用于区分上行数据和下行数据。
具体的，星座映射模块1300对第一数据流进行星座映射，以获得第一数字频域信号流；串并转换模块1301对第一数字频域信号流进行串并转换，以获得4路第一子数字频域信号流(这一过程可参考上述图4)，该4路第一子数字频域信号流分别为：1:4:8189载波的数据、2:4:8190载波的数据、3:4:8191载波的数据、4:4:8192载波的数据；预编码器1302、调制器1303以及D/A转换器1304分别对每一路子数字频域信号流依次处理，以获得4路子模拟信号流；这4路子模拟信号流中的每一路子模拟信号流均经过LD 1305以及Hybrid电路1306向DPU 131发送。DPU 131中的第一Hybrid电路1310在接收到4路子模拟信号流后，将其接收到的4路子模拟信号流向LNA 1311发送，便于LNA 1311去除子模拟信号流的噪声；去噪后的4路子模拟信号流由合路器/复用器1312合路为第一模拟信号流(这一过程可参考上述图5、图7或图8)，合路器/复用器1312可经由不同的LD 1313以及第二Hybrid电路1314向不同的CPE 132发送第一模拟信号流。CPE 132中的分路器/解复用器1320对器接收到的第一模拟信号流进行串并转换，以获得n路子模拟信号流(这一过程可参考上述图11或图12)； A/D转换器1321以及解调器1322分别对每一路子模拟信号流依次处理，以获得n路第三子数字频域信号流；合路器1323将n路第三子数字频域信号流合路，解星座映射模块1324对合路器1323的输出信号进行星座解映射，得到第一数据流。
在n的数值没有限定的情况下，图13中的合路器/复用器1312可以包括图5中的合路器S和开关51，也可以包括图7中的正交调制器70、正交调制器71以及正交调制器72，还可以包括图8中的合路器80，还可以包括图9中的正交调制器90～正交调制器98，以及合路器99，还可以包括图10中的正交调制器90～正交调制器98、以及正交调制器100～正交调制器101。图13中的分路器/解复用器1320可以包括图11中的分路器110、正交解调器111以及正交解调器112，也可以包括正交解调器120、正交解调器111以及正交解调器112。本申请实施例对此不作具体限定。
上述图3～图13中的每个附图均用于表示下行数据的传输过程。容易理解的是，对于上行数据而言，每一设备的处理过程与下行数据的处理是相反的。不论在哪一设备，若下行数据传输过程中存在合路器，则在上行数据传输过程中存在分路器，其中，合路器和分路器可以为不同的设备，也可以为同一设备。同理，若下行数据传输过程中存在复用器，则在上行数据传输过程中存在解复用器，其中，复用器和解复用器可以为不同的设备，也可以为同一设备。若下行数据传输过程中存在调制器，则在上行数据传输过程中存在解调器，其中，调制器和解调器可以为不同的设备，也可以为同一设备。若在下行数据传输过程中存在A/D转换器，则在上行数据传输过程中存在D/A转换器，其中，A/D转换器和D/A转换器可以为不同的设备，也可以为同一设备。
示例性的，结合上述图5，下行数据传输过程中，DPU采用合路器S将n路模拟子信号流合路为第一模拟信号流，该合路器S包括信号复用器50和开关51，该信号复用器50的工作原理如上图6所示。对应的，如图14所示，在上行数据传输过程中，DPU包括分路器S＇，该分路器S＇包括信号解复用器140和开关141。信号解复用器140在接收到已接通的开关141发送的第一模拟信号流后，将该第一模拟信号流分解为n路子模拟信号流。图15示出了信号解复用器140的工作原理。如图14所示，信号解复用器140在接收到已接通的开关141发送的第一模拟信号流后，通过多路正交的CDMA乘法器140进行逆采样，然后，抽取有效信号，以完成串并转换。图14中的分路器S＇与图5中的合路器S可以集成于同一设备，也可以为独立设置。
综上所述，本申请实施例提供的通信方法中，DPU仅保留了模拟信号的处理模块，与现有技术相比，有效的降低了DPU的功耗、减小了DPU的体积和成本。此外，由于DPU仅保留了模拟信号的处理模块，因此，数据处理的延时也会下降。
本申请实施例提供一种DPU 160，该DPU 160用于执行以上通信方法中的DPU所执行的步骤。本申请实施例提供的DPU 160可以包括相应步骤所对应的模块。
本申请实施例可以根据上述方法示例对DPU 160进行功能模块的划分，例如，可以对应各个功能划分各个功能模块，也可以将两个或两个以上的功能集成在一个处理模块中。上述集成的模块既可以采用硬件的形式实现，也可以采用软件功能模块的形式实现。本申请实施例中对模块的划分是示意性的，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式。
在采用对应各个功能划分各个功能模块的情况下，图16示出DPU 160的一种可 能的结构示意图。如图16所示，DPU 160包括接收单元1600、合路单元1601、发送单元1602、配置单元1603以及采样单元1604。接收单元1600用于支持该DPU 160执行上述实施例中的S302、S302＇，和/或用于本文所描述的技术的其它过程；合路单元1601用于支持该DPU 160执行上述实施例中的S304，和/或用于本文所描述的技术的其它过程；发送单元1602用于支持该DPU 160执行S305，和/或用于本文所描述的技术的其它过程；配置单元1603用于支持该DPU 160执行S303，和/或用于本文所描述的技术的其它过程；采样单元1604用于支持该DPU 160执行“对n路子模拟信号流中的每一路子模拟信号流进行正交采样”，和/或用于本文所描述的技术的其它过程。当然，本申请实施例提供的DPU 160包括但不限于上述模块，例如DPU 160还可以包括存储单元。存储单元可以用于存储该DPU 160的程序代码。其中，上述方法实施例涉及的各步骤的所有相关内容均可以援引到对应功能模块的功能描述，在此不再赘述。
当DPU 160运行时，该DPU 160执行如图3所示的实施例的通信方法中DPU的步骤。
本申请另一实施例还提供一种计算机可读存储介质，该计算机可读存储介质中存储有指令，当指令在DPU上运行时，该DPU执行如图3所示的实施例的通信方法中DPU的步骤。
在本申请的另一实施例中，还提供一种计算机程序产品，该计算机程序产品包括计算机执行指令，该计算机执行指令存储在计算机可读存储介质中；DPU的至少一个处理器可以从计算机可读存储介质读取该计算机执行指令，至少一个处理器执行该计算机执行指令使得DPU实施执行图3所示的通信方法中的DPU的步骤。
本申请实施例提供一种DSLAM 170，该DSLAM 170用于执行以上通信方法中的DSLAM所执行的步骤。本申请实施例提供的DSLAM 170可以包括相应步骤所对应的模块。
本申请实施例可以根据上述方法示例对DSLAM 170进行功能模块的划分，例如，可以对应各个功能划分各个功能模块，也可以将两个或两个以上的功能集成在一个处理模块中。上述集成的模块既可以采用硬件的形式实现，也可以采用软件功能模块的形式实现。本申请实施例中对模块的划分是示意性的，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式。
在采用对应各个功能划分各个功能模块的情况下，图17示出DSLAM 170的一种可能的结构示意图。如图17所示，DSLAM 170包括获取单元1700、转换单元1701以及发送单元1702。获取单元1700用于支持该DSLAM 170执行上述实施例中的S300，和/或用于本文所描述的技术的其它过程；转换单元1701用于支持该DSLAM 170执行上述实施例中的S301，和/或用于本文所描述的技术的其它过程；发送单元1702用于支持该DSLAM 170执行S302、S302＇，和/或用于本文所描述的技术的其它过程。当然，本申请实施例提供的DSLAM 170包括但不限于上述模块，例如DSLAM 170还可以包括存储单元。存储单元可以用于存储该DSLAM 170的程序代码。其中，上述方法实施例涉及的各步骤的所有相关内容均可以援引到对应功能模块的功能描述，在此不再赘述。
当DSLAM 170运行时，该DSLAM 170执行如图3所示的实施例的通信方法中DSLAM的步骤。
本申请另一实施例还提供一种计算机可读存储介质，该计算机可读存储介质中存储有指令，当指令在DSLAM上运行时，该DSLAM执行如图3所示的实施例的通信方法中DSLAM的步骤。
在本申请的另一实施例中，还提供一种计算机程序产品，该计算机程序产品包括计算机执行指令，该计算机执行指令存储在计算机可读存储介质中；DSLAM的至少一个处理器可以从计算机可读存储介质读取该计算机执行指令，至少一个处理器执行该计算机执行指令使得DSLAM实施执行图3所示的通信方法中的DSLAM的步骤。
在上述实施例中，可以全部或部分的通过软件，硬件，固件或者其任意组合来实现。当使用软件程序实现时，可以全部或部分地以计算机程序产品的形式出现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。该可用介质可以是磁性介质，(例如，软盘，硬盘、磁带)、光介质(例如，DVD)或者半导体介质(例如固态硬盘Solid State Disk(SSD))等。
通过以上的实施方式的描述，所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成，即将装置的内部结构划分成不同的功能模块，以完成以上描述的全部或者部分功能。
在本申请所提供的几个实施例中，应该理解到，所揭露的装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述模块或单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个装置，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是一个物理单元或多个物理单元，即可以位于一个地方，或者也可以分布到多个不同地方。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
所述集成的单元如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个可读取存储介质中。基于这样的理解，本申请实施例的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的全部或部分可以以软件产品的形式体现出来，该软件产品存储在一个存储介质中，包括若干指令用以使得一个设备(可以是单片机，芯片等)或处理器(processor)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何在本申请揭露的技术范围内的变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (27)

  1. 一种通信方法，其特征在于，包括：
    分布式节点单元DPU接收接入复用器DSLAM通过数字用户线DSL发送的n路子模拟信号流，所述n路子模拟信号流为所述DSLAM将第一数据流转换为所述n路子模拟信号流得到的，n≥2；
    所述DPU将所述n路子模拟信号流合路为第一模拟信号流；
    所述DPU通过DSL向至少一个用户前端装置CPE发送所述第一模拟信号流，以便于每个CPE将接收到的所述第一模拟信号流转换为所述第一数据流。
  2. 根据权利要求1所述的通信方法，其特征在于，所述通信方法还包括：
    所述DPU接收所述DSLAM发送的第一配置信号，所述第一配置信号用于指示所述DPU配置与分路参数对应的合路参数，所述分路参数为所述DSLAM在将所述第一数据流转换为所述n路子模拟信号流的过程中所使用的参数；
    所述DPU根据所述第一配置信号，配置所述合路参数；
    所述DPU将所述n路子模拟信号流合路为第一模拟信号流，具体包括：
    所述DPU根据所述合路参数，将所述n路子模拟信号流合路为所述第一模拟信号流。
  3. 根据权利要求1或2所述的通信方法，其特征在于，所述DPU将所述n路子模拟信号流合路为第一模拟信号流，具体包括：
    所述DPU对所述n路子模拟信号流中的每一路子模拟信号流进行过采样；
    所述DPU将所有过采样后的子模拟信号流合路，以生成所述第一模拟信号流。
  4. 根据权利要求3所述的通信方法，其特征在于，所述DPU对所述n路子模拟信号流中的每一路子模拟信号流进行过采样，具体包括：
    所述DPU对所述n路子模拟信号流中的每一路子模拟信号流进行正交采样，以获取n路正交采样后的子模拟信号流；
    所述DPU将所有过采样后的子模拟信号流合路，以生成所述第一模拟信号流，具体包括：
    所述DPU将所述n路正交采样后的子模拟信号流合路，以生成所述第一模拟信号流。
  5. 根据权利要求1或2所述的通信方法，其特征在于，所述DPU将所述n路子模拟信号流合路为第一模拟信号流，具体包括：
    所述DPU对所述n路子模拟信号流进行正交调制，以生成所述第一模拟信号流。
  6. 根据权利要求5所述的通信方法，其特征在于，在n＝2 K，K≥1的情况下，所述DPU将所述n路子模拟信号流合路为第一模拟信号流，具体包括：
    所述DPU采用n-1个正交调制器，对所述n路子模拟信号流进行K级正交调制，以生成第一模拟信号流；其中，
    在所述K级正交调制的第i级正交调制过程中，所述DPU采用2 K-i个正交调制器，对2 K-i+1路待调制信号流进行正交调制，得到2 K-i路调制信号流，i∈{1，......，K}；
    其中，第1级正交调制的待调制信号流为所述子模拟信号流，第K级正交调制得到的调制信号流为所述第一模拟信号流。
  7. 根据权利要求5所述的通信方法，其特征在于，在n＝2 M·(2p+1)，M≥1，p≥0的情况下，所述DPU将所述n路子模拟信号流合路为第一模拟信号流，具体包括：
    所述DPU采用
    Figure PCTCN2018096913-appb-100001
    个正交调制器，对所述n路子模拟信号流进行M级正交调制，得到2p+1路调制信号；
    将所述2p+1路调制信号合路，以生成所述第一模拟信号流；
    其中，在所述M级正交调制的第j级正交调制过程中，所述DPU采用(2p+1)·2 M-j个正交调制器，对(2p+1)·2 M-j+1路待调制信号流进行正交调制，得到(2p+1)·2 M-j路调制信号流，j∈{1，......，M}，第1级正交调制的待调制信号流为所述子模拟信号流。
  8. 根据权利要求5所述的通信方法，其特征在于，在n＝2 M·(2p+2)，M≥1，p≥0的情况下，所述DPU将所述n路子模拟信号流合路为第一模拟信号流，具体包括：
    所述DPU采用2 M-1·(2p+2)个正交调制器，对所述n路子模拟信号流进行正交调制，得到2 M-1·(2p+2)路调制信号；
    将所述2 M-1·(2p+2)路调制信号合路，以生成所述第一模拟信号流。
  9. 根据权利要求1-8中任意一项所述的通信方法，其特征在于，
    所述n路子模拟信号流的带宽之和小于或等于所述第一模拟信号流的带宽；
    所述n路子模拟信号流中的每一路子模拟信号流的带宽小于所述第一数据流的带宽。
  10. 一种通信方法，其特征在于，包括：
    接入复用器DSLAM获取第一数据流；
    所述DSLAM将所述第一数据流转换为n路子模拟信号流，n≥2；
    所述DSLAM通过数字用户线DSL向分布式节点单元DPU发送所述n路子模拟信号流，以便于所述DPU将所述n路子模拟信号流合路为第一模拟信号流。
  11. 根据权利要求10所述的通信方法，其特征在于，所述DSLAM将所述第一数据流转换为n路子模拟信号流，具体包括：
    所述DSLAM对所述第一数据流进行星座映射，以获得第一数字频域信号流；
    所述DSLAM对所述第一数字频域信号流进行串并转换，以获得n路第一子数字频域信号流；
    所述DSLAM对所述n路第一子数字频域信号流进行预编码处理、调制处理以及数模转换，以获得所述n路子模拟信号流。
  12. 根据权利要求10所述的通信方法，其特征在于，所述DSLAM将所述第一数据流转换为n路子模拟信号流，具体包括：
    所述DSLAM对所述第一数据流进行星座映射、预编码处理、调制处理以及数模转换，以获得第二模拟信号流；
    所述DSLAM对所述第二模拟信号流进行串并转换，以获得所述n路子模拟信号流。
  13. 根据权利要求10-12中任意一项所述的通信方法，其特征在于，所述通信方 法还包括：
    所述DSLAM向所述DPU发送第一配置信号，所述第一配置信号用于指示所述DPU配置与分路参数对应的合路参数，所述分路参数为所述DSLAM在将所述第一数据流转换为所述n路子模拟信号流的过程中所使用的参数。
  14. 一种分布式节点单元DPU，其特征在于，包括：
    接收单元，用于接收接入复用器DSLAM通过数字用户线DSL发送的n路子模拟信号流，所述n路子模拟信号流为所述DSLAM将第一数据流转换为所述n路子模拟信号流得到的，n≥2；
    合路单元，用于将所述接收单元接收到的所述n路子模拟信号流合路为第一模拟信号流；
    发送单元，用于通过DSL向至少一个用户前端装置CPE发送所述合路单元生成的所述第一模拟信号流，以便于每个CPE将接收到的所述第一模拟信号流转换为所述第一数据流。
  15. 根据权利要求14所述的DPU，其特征在于，
    所述接收单元，还用于接收所述DSLAM发送的第一配置信号，所述第一配置信号用于指示所述DPU配置与分路参数对应的合路参数，所述分路参数为所述DSLAM在将所述第一数据流转换为所述n路子模拟信号流的过程中所使用的参数；
    所述DPU还包括配置单元；
    所述配置单元，用于根据所述第一配置信号，配置所述合路参数；
    所述合路单元，具体用于根据所述配置单元配置的所述合路参数，将所述n路子模拟信号流合路为所述第一模拟信号流。
  16. 根据权利要求14或15所述的DPU，其特征在于，
    所述DPU还包括采样单元；
    所述采样单元，用于对所述接收单元接收到的所述n路子模拟信号流中的每一路子模拟信号流进行过采样；
    所述合路单元，具体用于将所有所述采样单元过采样后的子模拟信号流合路，以生成所述第一模拟信号流。
  17. 根据权利要求16所述的DPU，其特征在于，
    所述采样单元，具体用于对所述n路子模拟信号流中的每一路子模拟信号流进行正交采样，以获取n路正交采样后的子模拟信号流；
    所述合路单元，具体用于将所述n路所述采样单元正交采样后的子模拟信号流合路，以生成所述第一模拟信号流。
  18. 根据权利要求14或15所述的DPU，其特征在于，
    所述合路单元，具体对所述n路子模拟信号流进行正交调制，以生成所述第一模拟信号流。
  19. 根据权利要求18所述的DPU，其特征在于，在n＝2 K，K≥1的情况下，所述合路单元具体用于：
    采用n-1个正交调制器，对所述n路子模拟信号流进行K级正交调制，以生成第一模拟信号流；其中，
    在所述K级正交调制的第i级正交调制过程中，所述DPU采用2 K-i个正交调制器，对2 K-i+1路待调制信号流进行正交调制，得到2 K-i路调制信号流，i∈{1，......，K}；
    其中，第1级正交调制的待调制信号流为所述子模拟信号流，第K级正交调制得到的调制信号流为所述第一模拟信号流。
  20. 根据权利要求18所述的DPU，其特征在于，在n＝2 M·(2p+1)，M≥1，p≥0的情况下，所述合路单元具体用于：
    采用
    Figure PCTCN2018096913-appb-100002
    个正交调制器，对所述n路子模拟信号流进行M级正交调制，得到2p+1路调制信号；
    将所述2p+1路调制信号合路，以生成所述第一模拟信号流；
    其中，在所述M级正交调制的第j级正交调制过程中，所述DPU采用(2p+1)·2 M-j个正交调制器，对(2p+1)·2 M-j+1路待调制信号流进行正交调制，得到(2p+1)·2 M-j路调制信号流，j∈{1，......，M}，第1级正交调制的待调制信号流为所述子模拟信号流。
  21. 根据权利要求18所述的DPU，其特征在于，在n＝2 M·(2p+2)，M≥1，p≥0的情况下，所述合路单元具体用于：
    采用2 M-1·(2p+2)个正交调制器，对所述n路子模拟信号流进行正交调制，得到2 M-1·(2p+2)路调制信号；
    将所述2 M-1·(2p+2)路调制信号合路，以生成所述第一模拟信号流。
  22. 根据权利要求14-21中任意一项所述的DPU，其特征在于，
    所述n路子模拟信号流的带宽之和小于或等于所述第一模拟信号流的带宽；
    所述n路子模拟信号流中的每一路子模拟信号流的带宽小于所述第一数据流的带宽。
  23. 一种接入复用器DSLAM，其特征在于，包括：
    获取单元，用于获取第一数据流；
    转换单元，用于将所述获取单元获取到的所述第一数据流转换为n路子模拟信号流，n≥2；
    发送单元，用于通过数字用户线DSL向分布式节点单元DPU发送所述转换单元得到的所述n路子模拟信号流，以便于所述DPU将所述n路子模拟信号流合路为第一模拟信号流。
  24. 根据权利要求23所述的DSLAM，其特征在于，所述转换单元具体用于：
    对所述第一数据流进行星座映射，以获得第一数字频域信号流；
    对所述第一数字频域信号流进行串并转换，以获得n路第一子数字频域信号流；
    对所述n路第一子数字频域信号流进行预编码处理、调制处理以及数模转换，以获得所述n路子模拟信号流。
  25. 根据权利要求23所述的DSLAM，其特征在于，所述转换单元具体用于：
    对所述第一数据流进行星座映射、预编码处理、调制处理以及数模转换，以获得第二模拟信号流；
    对所述第二模拟信号流进行串并转换，以获得所述n路子模拟信号流。
  26. 根据权利要求23-25中任意一项所述的DSLAM，其特征在于，
    所述发送单元，还用于向所述DPU发送第一配置信号，所述第一配置信号用于指示所述DPU配置与分路参数对应的合路参数，所述分路参数为所述DSLAM在将所述第一数据流转换为所述n路子模拟信号流的过程中所使用的参数。
  27. 一种通信系统，其特征在于，包括如上述权利要求14-22中任意一项所述的分布式节点单元DPU、如权利要求23-26中任意一项所述的接入复用器DSLAM以及至少一个用户前端装置CPE；其中，所述CPU与所述DSLAM之间通过n条DSL连接，所述至少一个CPE中的每个CPE均通过DSL与所述DPU连接，n≥2。
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