WO2019150731A1 - Image processing device and image processing method and program - Google Patents

Image processing device and image processing method and program Download PDF

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Publication number
WO2019150731A1
WO2019150731A1 PCT/JP2018/043717 JP2018043717W WO2019150731A1 WO 2019150731 A1 WO2019150731 A1 WO 2019150731A1 JP 2018043717 W JP2018043717 W JP 2018043717W WO 2019150731 A1 WO2019150731 A1 WO 2019150731A1
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WIPO (PCT)
Prior art keywords
pixel
correction target
radiation
image
pixels
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PCT/JP2018/043717
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French (fr)
Japanese (ja)
Inventor
竹中 克郎
尚志郎 猿田
聡太 鳥居
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キヤノン株式会社
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Publication of WO2019150731A1 publication Critical patent/WO2019150731A1/en

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    • AHUMAN NECESSITIES
    • A61MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61BDIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B6/00Apparatus for radiation diagnosis, e.g. combined with radiation therapy equipment
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01TMEASUREMENT OF NUCLEAR OR X-RADIATION
    • G01T1/00Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
    • G01T1/16Measuring radiation intensity
    • G01T1/20Measuring radiation intensity with scintillation detectors
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01TMEASUREMENT OF NUCLEAR OR X-RADIATION
    • G01T7/00Details of radiation-measuring instruments
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/68Noise processing, e.g. detecting, correcting, reducing or removing noise applied to defects
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/30Transforming light or analogous information into electric information
    • H04N5/32Transforming X-rays

Definitions

  • the present invention relates to an image processing apparatus, an image processing method, and a program.
  • an imaging apparatus used for medical image diagnosis and nondestructive inspection there is a radiation imaging apparatus including an imaging panel in which pixels in which a combination of a conversion element that converts radiation into electric charge and a switching element such as a thin film transistor (TFT) are arranged in an array It's being used.
  • a radiation imaging apparatus there is a defective pixel that does not output a normal signal due to an abnormality of the conversion element or the switch element.
  • an optical black pixel is also formed by providing a light shielding layer on the conversion element.
  • Patent Document 1 describes a technique for correcting such defective pixels and optical black pixels by image processing.
  • curvature information is used to determine a pixel direction to be prioritized when correcting a target pixel.
  • the curvature information is calculated using information on a pixel that is one pixel away from the correction target pixel. For this reason, the correction direction may not be correctly calculated for an image with many high-frequency components.
  • One aspect of the present invention provides a technique for accurately correcting a target pixel.
  • an image processing apparatus an acquisition unit that acquires a radiation image including a correction target pixel, and a calculation unit that calculates the respective priorities of two directions intersecting each other with respect to the correction target pixel; Assigning a large weight to the pixel value of the pixel in the higher priority direction for the correction target pixel, and assigning the small weight to the pixel value of the pixel in the lower priority direction to the correction target pixel And determining means for determining a pixel value of the correction target pixel, wherein the calculation means sets the direction of the calculation target among the two directions in calculating the priority of each of the two directions.
  • Image processing using pixel values of a plurality of pixels including the first pixel or a third pixel on the opposite side of the second pixel with respect to a straight line passing through the correction target pixel in the second direction An apparatus is provided.
  • the accompanying drawings are included in the specification, constitute a part thereof, show an embodiment of the present invention, and are used to explain the principle of the present invention together with the description.
  • the timing chart which shows operation
  • the radiation includes ⁇ -rays, ⁇ -rays, ⁇ -rays, and the like, which are beams generated by particles (including photons) emitted by radiation decay, such as X-rays, It can also include particle beams, cosmic rays, and the like.
  • FIG. 1 is a diagram illustrating a configuration example of a radiation imaging system 200 using the radiation imaging apparatus 210 in the first embodiment.
  • the radiation imaging system 200 is configured to electrically capture an optical image converted from radiation and obtain an electrical signal (radiation image data) for generating a radiation image.
  • the radiation imaging system 200 includes, for example, a radiation imaging apparatus 210, a radiation source 230, an exposure control unit 220, and a computer 240.
  • the radiation source 230 starts radiation emission according to an exposure command (radiation command) from the exposure control unit 220.
  • the radiation emitted from the radiation source 230 passes through a subject (not shown) and is irradiated on the radiation imaging apparatus 210.
  • the radiation source 230 also stops radiation emission according to a stop command from the exposure control unit 220.
  • the radiation imaging apparatus 210 includes an imaging panel 212 and a control unit 214 that controls the imaging panel 212.
  • the control unit 214 generates a stop signal for stopping radiation emission from the radiation source 230 based on a signal obtained from the imaging panel 212.
  • the stop signal is supplied to the exposure control unit 220.
  • the exposure control unit 220 sends a stop command to the radiation source 230 in response to the stop signal.
  • the controller 214 is, for example, a PLD (Programmable Logic Device) such as an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), a general-purpose computer in which a program is incorporated, or all or one of them. It can be configured by a combination of parts.
  • the computer 240 controls the radiation imaging apparatus 210 and the exposure control unit 220. In addition, the computer 240 receives the radiation image data output from the radiation imaging apparatus 210 and processes the radiation image data to generate a radiation image. Therefore, the computer 240 functions as an image processing device.
  • the computer 240 includes a processor 241 and a memory 242.
  • the processor 241 functions as a CPU that controls the overall operation of the computer 240.
  • the processor 241 controls the radiation imaging apparatus 210 and the exposure control unit 220 described above and generates a radiation image.
  • the memory 242 holds a program. When the processor 241 executes the program held in the memory 242, processing by the computer 240 is performed.
  • the exposure control unit 220 has an exposure switch (not shown) as an example. When the exposure switch is turned on by the user, the exposure control unit 220 sends an exposure command to the radiation source 230 and starts indicating the start of radiation emission. A notification is sent to the computer 240. Upon receiving the start notification, the computer 240 notifies the control unit 214 of the radiation imaging apparatus 210 of the start of radiation emission in response to the start notification.
  • FIG. 2 shows a configuration example of the imaging panel 212.
  • the imaging panel 212 includes a pixel array 112.
  • the pixel array 112 includes conversion elements S11 to S44 (hereinafter collectively referred to as conversion elements S) and switch elements T11 to T44 (hereinafter collectively referred to as switch elements T) arranged in a two-dimensional array for detecting radiation. ) Including a plurality of pixels PIX.
  • the pixel array 112 includes a plurality of column signal lines Sig1 to Sig4 along the column direction (vertical direction in FIG. 2) for outputting the signal generated by the conversion element S.
  • the imaging panel 212 includes a drive circuit (row selection circuit) 114 that drives the pixel array 112 and a readout circuit 113 for detecting a signal that appears on the column signal line Sig of the pixel array 112.
  • the pixel array 112 is configured by 4 rows ⁇ 4 columns of pixels PIX, but in reality, more pixels PIX can be arranged.
  • the imaging panel 212 may have dimensions of 17 inches and may have approximately 3000 rows by approximately 3000 columns of pixels PIX.
  • Each pixel PIX includes a conversion element S for detecting radiation, and a switch element T that connects the conversion element S and a column signal line Sig (a signal line Sig corresponding to the conversion element S among the plurality of signal lines Sig). Including.
  • Each conversion element S outputs a signal corresponding to the amount of incident radiation to the column signal line Sig.
  • the conversion element S may be, for example, a MIS photodiode that is disposed on an insulating substrate such as a glass substrate and uses amorphous silicon as a main material. Further, the conversion element S may be a PIN photodiode.
  • the conversion element S can be configured as an indirect element that detects light after the radiation is converted into light by the scintillator layer. In the indirect element, the scintillator layer can be shared by a plurality of pixels PIX (a plurality of conversion elements S).
  • the switch element T can be constituted by a transistor such as a thin film transistor (TFT) having a control terminal (gate) and two main terminals (source, drain), for example.
  • the conversion element S has two main electrodes, one main electrode of the conversion element S is connected to one of the two main terminals of the switch element T, and the other main electrode of the conversion element S is common.
  • the bias power supply supplies a bias voltage.
  • the control terminal of the switch element T of each pixel PIX arranged in the first row is connected to the gate line Vg1 arranged along the row direction (lateral direction in FIG. 2).
  • the control terminals of the switches S of the pixels PIX arranged in the second to fourth rows are connected to the gate lines Vg2 to Vg4, respectively.
  • a gate signal is supplied to the gate lines Vg1 to Vg4 by the drive circuit 114.
  • each pixel PIX arranged in the first column the main terminal of the switch element T that is not connected to the conversion element S is connected to the column signal line Sig1 in the first column.
  • the main terminal on the side not connected to the conversion element S of the switch element T is connected to the column signal lines Sig2 to Sig4 in the second to fourth columns, respectively.
  • the read circuit 113 has a plurality of column amplifiers CA so that one column amplifier CA corresponds to one column signal line Sig.
  • Each column amplifier CA may include an integrating amplifier 105, a variable amplifier 104, a sample hold circuit 107, and a buffer circuit 106.
  • the integrating amplifier 105 amplifies the signal appearing on the column signal line Sig.
  • the integrating amplifier 105 can include an operational amplifier and an integrating capacitor and a reset switch connected in parallel between the inverting input terminal and the output terminal of the operational amplifier.
  • a reference potential Vref is supplied to the non-inverting input terminal of the operational amplifier.
  • the integration capacitor is reset by turning on the reset switch, and the potential of the column signal line Sig is reset to the reference potential Vref.
  • the reset switch can be controlled by a reset pulse RC supplied from the control unit 214.
  • the variable amplifier 104 amplifies the signal output from the integrating amplifier 105 with a set amplification factor.
  • the sample hold circuit 107 samples and holds the signal output from the variable amplifier 104.
  • the sample hold circuit 107 can be configured by a sampling switch and a sampling capacitor.
  • the buffer circuit 106 buffers the signal output from the sample hold circuit 107 (impedance conversion) and outputs the result.
  • the sampling switch can be controlled by a sampling pulse SH supplied from the control unit 214.
  • the readout circuit 113 includes a multiplexer 108 that selects and outputs signals from a plurality of column amplifiers CA provided in correspondence with each column signal line Sig in a predetermined order.
  • the multiplexer 108 includes, for example, a shift register.
  • the shift register performs a shift operation in accordance with the clock signal CLK supplied from the control unit 214, and one signal from the plurality of column amplification units CA is selected by the shift register.
  • Read circuit 113 further includes a buffer 109 for buffering (impedance conversion) the signal output from multiplexer 108 and an AD converter 110 for converting an analog signal output from buffer 109 into a digital signal. sell.
  • the output of the AD converter 110 that is, radiation image data is transferred to the computer 240.
  • FIG. 3 schematically shows an example of a cross-sectional structure of the pixel PIX having the conversion element S.
  • a configuration in which radiation is incident from the upper side of the drawing will be described, but radiation may be incident from the lower side of the drawing.
  • each pixel PIX is disposed on an insulating substrate 310 such as a glass substrate.
  • Each pixel PIX includes a conductive layer 311, an insulating layer 312, a semiconductor layer 313, an impurity semiconductor layer 314, and a conductive layer 315 in order from the side closer to the substrate 310 on the substrate 310.
  • the conductive layer 311 constitutes a gate electrode of a transistor (for example, TFT) constituting the switch element T.
  • the insulating layer 312 is disposed so as to cover the conductive layer 311, and the semiconductor layer 313 is disposed on a portion of the conductive layer 311 that constitutes the gate electrode with the insulating layer 312 interposed therebetween.
  • the impurity semiconductor layer 314 is disposed on the semiconductor layer 313 so as to constitute two main terminals (source and drain) of the transistor constituting the switch element T.
  • the conductive layer 315 constitutes a wiring pattern connected to each of two main terminals (source and drain) of the transistor constituting the switch element T.
  • a part of the conductive layer 315 constitutes the column signal line Sig, and the other part constitutes a wiring pattern for connecting the conversion element S and the switch element T.
  • Each pixel PIX further includes an interlayer insulating film 316 that covers the insulating layer 312 and the conductive layer 315.
  • the interlayer insulating film 316 is provided with a contact plug 317 for connecting to a portion of the conductive layer 315 constituting the switch element T.
  • Each pixel PIX includes a conversion element S disposed on the interlayer insulating film 316.
  • the conversion element S is configured as an indirect conversion element that converts light converted from radiation in the scintillator layer 904 into an electrical signal.
  • the conversion element S includes a conductive layer 318, an insulating layer 319, a semiconductor layer 320, an impurity semiconductor layer 321, a conductive layer 322, and an electrode layer 325 stacked on the interlayer insulating film 316.
  • a protective layer 323 and an adhesive layer 324 are disposed on the conversion element S.
  • the scintillator layer 904 is disposed on the adhesive layer 324 so as to cover the incident surface side of the substrate 310.
  • the conductive layer 318 constitutes the lower electrode of the individual conversion element S.
  • the conductive layer 322 and the electrode layer 325 constitute an upper electrode of the individual conversion element S.
  • the conductive layer 318, the insulating layer 319, the semiconductor layer 320, the impurity semiconductor layer 321, and the conductive layer 322 constitute a MIS type sensor as the conversion element S.
  • the impurity semiconductor layer 321 is formed of an n-type impurity semiconductor layer.
  • the scintillator layer 904 can be formed using a material such as GOS (gadolinium oxysulfide) or CsI (cesium iodide). These materials can be formed by bonding, printing, vapor deposition, or the like.
  • GOS gallium oxysulfide
  • CsI cesium iodide
  • the conversion element S is an example using a MIS type sensor, but is not limited thereto.
  • the conversion element S may be, for example, a pn type or PIN type photodiode.
  • the operation of the radiation imaging apparatus 210 is controlled by the computer 240.
  • the operation of the radiation imaging apparatus 210 is controlled by the control unit 214 under the control of the computer 240.
  • the control unit 214 causes the drive circuit 114 and the readout circuit 113 to perform a reset operation until radiation of radiation from the radiation source 230, in other words, irradiation of radiation to the radiation imaging apparatus 210 is started.
  • the reset operation is an operation in which the driving circuit 114 sequentially drives the gate signals supplied to the gate lines Vg1 to Vg4 in the respective rows of the pixel array 112 to the active level to reset the dark charges accumulated in the conversion elements S. That is.
  • the reset pulse RC of the active level is supplied to the reset switch of the integrating amplifier 105, and the column signal line Sig is reset to the reference potential.
  • the dark charge is a charge that is generated even though no radiation is incident on the conversion element S.
  • the control unit 214 can recognize the start of radiation emission from the radiation source 230 based on, for example, a start notification supplied from the exposure control unit 220 via the computer 240. Further, the radiation imaging apparatus 210 may be provided with a detection circuit that detects a current flowing through the bias line Bs or the column signal line Sig of the pixel array 112. The controller 214 can recognize the start of radiation irradiation from the radiation source 230 based on the output of the detection circuit.
  • control unit 214 controls the switch element T to be in an open state (off state). As a result, charges generated in the conversion element S due to radiation irradiation are accumulated. The control unit 214 stands by in this state until radiation irradiation is completed.
  • the control unit 214 causes the drive circuit 114 and the read circuit 113 to perform a read operation.
  • the read operation is an operation in which the drive circuit 114 drives the gate signals supplied to the gate lines Vg1 to Vg4 in each row of the pixel array 112 to the active level.
  • the readout circuit 113 reads out the electric charge accumulated in the conversion element S via the column signal line Sig, and outputs it as radiation image data to the computer 240 through the multiplexer 108, the buffer 109, and the AD converter 110.
  • the conversion element S continues to accumulate dark charges even in a state where no radiation is irradiated. For this reason, the control part 214 acquires offset image data by performing the same operation
  • step S910 after performing the above-described reset operation, the control unit 214 performs control so as to accumulate charges generated by the conversion element S during radiation irradiation in order to acquire radiation image data.
  • step S911 the control unit 214 causes the drive circuit 114 and the readout circuit 113 to perform a readout operation, and reads out radiation image data.
  • step S911 radiation image data is output to the computer 240.
  • the control unit 214 performs an accumulation operation for acquiring offset image data in step S912.
  • step 913 the control unit 214 causes the drive circuit 114 and the readout circuit 113 to read the offset image data, and causes the computer 240 to output the offset image data.
  • step S914 the processor 241 of the computer 240 performs offset correction by subtracting the offset image data acquired in step S913 from the radiation image data acquired in step S911.
  • step S915 the processor 241 performs gain correction by dividing the image data after the offset correction by the gain correction image data acquired in advance. In this way, the processor 241 acquires a radiation image.
  • this radiation image includes correction target pixels.
  • the correction target pixel is a significant pixel such as a defective pixel that outputs an abnormal pixel value generated when the pixel array 112 or the scintillator layer 904 is manufactured, or an optical black pixel that is intentionally arranged. A pixel that does not have a value.
  • the processor 241 may acquire a radiation image by reading out a radiation image generated by the radiation imaging apparatus 210 and then stored in an external storage device.
  • step S916 the processor 241 corrects the correction target pixel included in the radiation image. Specifically, in step S917, the processor 241 calculates the priorities of the two directions that intersect each other for the correction target pixel. Thereafter, in step S918, the processor 241 determines the pixel value of the correction target pixel based on the calculated priority.
  • FIG. 6 is a diagram focusing on a portion including the correction target pixel in the radiation image.
  • pixels a to m and reference numerals are attached.
  • the pixel values of the pixels a to m are also represented by a to m, respectively.
  • the pixel to be corrected is only the pixel e, and the other pixels have significant pixel values.
  • the processor 241 calculates the priorities of the horizontal direction indicated by the arrow 601 and the vertical direction indicated by the arrow 602 for the pixel e. Specifically, the processor 241 calculates the horizontal priority X using the difference absolute value as follows.
  • S2
  • S1 is the sum of the absolute values of the differences between the pixel values of the three pixels a, b, and c and their average value ave1. That is, S1 indicates the degree of variation in pixel values of the three pixels a, b, and c arranged in the horizontal direction.
  • S is the variation in the pixel values of the three pixels a, b, c arranged horizontally in the upper side of the pixel e, and the pixels of the three pixels g, h, i arranged horizontally in the lower side of the pixel e. It is an average with the degree of dispersion of values. That is, S indicates the degree of variation in the horizontal direction of the pixel values of the pixels around the pixel e.
  • the processor 241 calculates the priority Y in the horizontal direction using the difference absolute value as follows.
  • T indicates the degree of variation in the vertical direction of the pixel values of the pixels around the pixel e.
  • the priorities X and Y are the reciprocals of S and T, respectively. Taking the reciprocal is one method for giving negative correlation to the priorities X, Y and S, T, and other methods may be used.
  • the processor 241 assigns a large weight to the pixel value of the pixel in the higher priority direction with respect to the correction target pixel, and decreases the pixel value of the pixel in the lower priority direction with respect to the correction target pixel. By assigning a weight, the pixel value of the correction target pixel is determined.
  • the processor 241 calculates the pixel value of the pixel e by the following formula.
  • X / (X + Y)
  • Y / (X + Y)
  • the processor 241 uses pixel values of a plurality of pixels including the following pixels.
  • the pixels g, h, i used for calculating S2 also satisfy this property. Since the pixels used for calculating the priority include the pixels adjacent to the correction coping pixels, it becomes easy to consider the influence of the high frequency component.
  • the influence of a stripe pattern can be included by including two or more pixels continuous in the horizontal direction. Furthermore, by including two pixels on the opposite side of the pixel a with respect to a straight line extending in the vertical direction through the pixel e, the influence of the continuity of the high-frequency component including the correction target pixel can be taken into consideration. Similarly, when calculating T1 indicating the degree of variation in the vertical direction, the processor 241 uses pixel values of a plurality of pixels including the following pixels.
  • FIG. 7A shows a radiation image that does not include a correction target pixel.
  • the pixel value of one pixel (the black pixel at the center of the frame portion) is corrected from the pixel values of surrounding pixels by determining the priority in each direction by various methods.
  • FIG. 7B shows a radiographic image obtained by determining priority using a plurality of pixels (hatched pixels) that are one or more pixels away from the correction target pixel.
  • FIG. 7C shows a radiographic image obtained by determining priority using a plurality of pixels (hatched pixels) on only one side of the correction target pixel.
  • FIG. 7D shows a radiographic image obtained by determining priorities according to this embodiment. It can be seen that the radiographic image shown in FIG. 7D is closer to the original radiographic image (FIG. 7A) than the radiographic images shown in FIGS. 7B and 7C.
  • the processor 241 may use the standard deviation, variance, and curvature of the pixel values of surrounding pixels in addition to the above-described absolute difference value.
  • the processor 241 may calculate the priorities X and Y by combining at least one of these. For example, the processor 241 uses the following expression when calculating the priorities X and Y using the curvature.
  • the processor 241 may calculate the horizontal priority X and the vertical priority Y for the pixel e as follows.
  • ave5 (k + d + f + l) / 4
  • S
  • X 1 / S
  • Y 1 / T
  • the processor 241 uses pixel values of a plurality of pixels including the following.
  • a pixel d adjacent to the pixel e in the horizontal direction which is the direction to be calculated, a pixel k adjacent to the pixel d in the horizontal direction, and a pixel l on the opposite side of the pixel k with respect to a straight line passing through the pixel e and extending in the vertical direction.
  • the processor 241 calculates the pixel b adjacent to the pixel e in the vertical direction, which is the calculation target direction, the pixel j adjacent to the pixel b in the vertical direction, and the pixel e.
  • the pixel values of a plurality of pixels including a pixel m on the opposite side of the pixel j with respect to a straight line passing through and extending in the horizontal direction are used.
  • the priority in the two directions of the vertical direction and the horizontal direction is calculated.
  • the priority in the diagonal direction is calculated, and the pixel of the correction target pixel is calculated using the pixel located in the diagonal direction of the correction handling pixel. The value may be determined.
  • FIG. 9A and 9B show a configuration example of the imaging panel 212.
  • FIG. Differences between the imaging panel 212 of the first embodiment and the imaging panel 212 of the second embodiment will be described below.
  • a scintillator layer that converts radiation into visible light covers both the incident surface side on which radiation is incident and the back surface opposite to the incident surface so as to cover the respective surfaces.
  • the conversion element S included in each pixel PIX includes two types of conversion elements S. In the configuration shown in FIG. 8, the conversion elements S11, S12, S13, S22, S23, S24, S31, S32, S34, S41, S42, S43, and S44 receive light from scintillator layers disposed on both sides of the substrate. Arranged.
  • a conversion element that receives light from the scintillator layers on both sides of the conversion element S it is referred to as a conversion element 901.
  • a light shielding layer 903 is disposed between one scintillator layer and each of the conversion elements S. Accordingly, the conversion elements S13, S21, and S33 are arranged so that light from one scintillator layer is blocked and light from the other scintillator layer is received.
  • these conversion elements S are referred to as conversion elements 902 when a conversion element that blocks light from one scintillator layer of the conversion elements S is specified.
  • the light-shielding layer 903 is a layer that shields light emitted from the scintillator layer, and it is only necessary to shield between the conversion element 902 and any one of the scintillator layers covering the incident surface side or the back surface side of the substrate.
  • the light shielding layer 903 is disposed between the scintillator layer disposed on the incident surface side of the substrate and the conversion element 902.
  • the low energy component is absorbed by the scintillator layer covering the incident surface side of the substrate, converted into visible light, and incident on each pixel PIX.
  • the conversion element 902 is shielded from the incident surface side of the substrate, light emitted from the scintillator layer on the incident surface side of the substrate does not enter. Therefore, light converted from a component having low radiation energy does not enter the conversion element 902.
  • the light shielding layer 903 is not disposed in the conversion element 901, light converted from a component having low radiation energy is incident.
  • the conversion element 901 can acquire a signal due to a high energy component and a low energy component of radiation, and the conversion element 902 can acquire a signal due to a high energy component of radiation. That is, the information of different radiation energy can be held in the pixels PIX adjacent to each other. By holding information acquired from radiation of different energy components in adjacent pixels PIX in this way, energy subtraction can be performed using a method described later.
  • FIG. 9A and 9B schematically show examples of cross-sectional structures of the pixel PIXA having the conversion element 901, the pixel PIXB having the conversion element 902, and the pixel PIXC.
  • the radiation is described as being incident from the upper side of the drawing, but the radiation may be incident from the lower side of the drawing.
  • the conversion element 901 and the conversion element 902 are arranged between the substrate 310 and the scintillator layer 904 that covers the incident surface side of the substrate 310, and in the pixel PIXB, the light shielding layer 903 includes the conversion element 902 and the scintillator layer 904. The case where it is arranged between is shown.
  • 9B is the same as FIG.
  • the pixel PIXC shows a case where the light shielding layer 903 is disposed between the conversion element 902 and the scintillator layer 905 covering the back surface opposite to the incident surface of the substrate 310.
  • the conversion element S of each pixel PIX is disposed on an insulating substrate 310 such as a glass substrate that transmits light emitted from the scintillator layers 904 and 905.
  • the scintillator layer 904 is disposed on the adhesive layer 324 so as to cover the incident surface side of the substrate 310.
  • the scintillator layer 905 is disposed so as to cover the back surface side of the substrate 310.
  • the scintillator layers 904 and 905 can be formed using a material such as GOS (gadolinium oxysulfide) or CsI (cesium iodide).
  • the scintillator layer 904 and the scintillator layer 905 may use the same material, or may use different materials depending on the energy of radiation to be acquired.
  • the scintillator layer 904 and the scintillator layer 905 are arranged so as to sandwich the substrate 310.
  • the conversion element 902 of the pixel PIXB includes a conductive layer 318 that forms a lower electrode from the incident surface side of the substrate 310 toward the scintillator layer 904, a semiconductor layer 320, and a conductive layer 322 that forms an upper electrode. And in this order.
  • the conductive layer 322 constituting this upper electrode functions as the light shielding layer 903.
  • the conductive layer 322 functions as the light shielding layer 903 by forming the conductive layer 322 using a material that is opaque to light emitted from the scintillator layer 904, such as Al, Mo, Cr, or Cu.
  • the conversion element 902 of the pixel PIXC includes a conductive layer 318 that forms the lower electrode from the incident surface side of the substrate 310 toward the scintillator layer 904, a conductive layer that forms the upper electrode and the semiconductor layer 320.
  • the layer 322 and the electrode layer 325 are included in this order.
  • the conductive layer 318 constituting this lower electrode functions as the light shielding layer 903.
  • the conductive layer 318 functions as the light shielding layer 903 by forming the conductive layer 318 using a material that is opaque to light emitted from the scintillator layer 905 such as Al, Mo, Cr, or Cu.
  • a material transparent to light emitted from the scintillator layer 904 such as ITO (indium tin oxide) is used for the conductive layer 318 and the electrode layer 325. Accordingly, signals having different energy components can be acquired between the adjacent pixel PIXA and the pixel PIXB or the pixel PIXC.
  • the present invention is not limited to this.
  • a transparent material and an opaque material may be stacked in the conductive layer 322 of the pixel PIXB and the conductive layer 318 of the pixel PIXC.
  • the light shielding amount is determined by the area of the opaque material.
  • the conductive layer 322 of the pixel PIXB and the conductive layer 318 of the pixel PIXC function as the light shielding layer 903.
  • the arrangement of the light shielding layer 903 is not limited thereto.
  • a dedicated light shielding layer 903 using Al, Mo, Cr, Cu, or the like may be disposed in the protective layer 323 for light incident from the scintillator layer 904.
  • the light shielding layer 903 may be fixed at a constant potential.
  • Steps S910 to S915 are the same as in the first embodiment.
  • step S921 the processor 241 converts the gain-corrected radiation image into a double-sided incident image based on signals obtained by the plurality of conversion elements 901 and a single-sided incidence image based on signals obtained by the plurality of conversion elements 902. To separate.
  • the image on the left side of FIG. 11 is a radiation image obtained from the radiation imaging apparatus 210, that is, an image based on both the signal from the conversion element 901 and the signal from the conversion element 902.
  • pixels without hatching correspond to the conversion element 901
  • pixels with hatching correspond to the conversion element 902.
  • the processor 241 uses the radiation image based on the double-sided incident image (upper side) based on the signals obtained by the plurality of conversion elements 901 and the signals obtained by the plurality of conversion elements 902, as shown on the right side of FIG. Separated into a single-sided incident image (lower side).
  • the both-side incident image is an image including high energy and low energy information among the radiation incident on the radiation imaging apparatus 210.
  • the one-side incident image is an image including low energy information and not including high energy information.
  • the one-side incident image may be an image that includes high energy information and does not include low energy information.
  • the pixel corresponding to the conversion element 902 is the correction target pixel
  • the pixel corresponding to the conversion element 901 is the correction target pixel.
  • the number of correction target pixels included in the both-side incident image is smaller than the number of correction target pixels included in the one-side incident image.
  • the processor 241 corrects the correction target pixels of the double-side incident image with a small number of correction target pixels, and thereafter corrects the correction target pixels of the one-side incident image.
  • the processor 241 corrects the correction target pixels of the both-side incident image in the same manner as steps S916 to S918 in FIG.
  • step S925 the processor 241 corrects the correction target pixel of the one-side incident image.
  • the processor 241 calculates the priority in each direction using the both-side incident images.
  • step S926 the processor 241 uses the pixel values of the pixels around the pixel f of the double-side incident image for each pixel f of the double-side incident image at the same position as the pixel q of the single-side incident image.
  • the priority of is calculated.
  • the calculation of the priority may be performed in the same manner as in the first embodiment, for example, according to the following formula.
  • step S927 the processor 241 determines the pixel value of the correction target pixel using the calculated priority.
  • the pixel value may be determined in the same manner as in the second embodiment, for example, according to the following formula.
  • the processor 241 performs energy subtraction processing using the corrected double-side incident image and single-side incident image in S928.
  • the present invention supplies a program that realizes one or more functions of the above-described embodiments to a system or apparatus via a network or a storage medium, and one or more processors in a computer of the system or apparatus read and execute the program This process can be realized. It can also be realized by a circuit (for example, ASIC) that realizes one or more functions.
  • a circuit for example, ASIC

Abstract

The image processing device is provided with: an acquisition unit for acquiring a radiographic image including a pixel to be corrected; a calculation unit for calculating the respective priorities of two directions intersecting with each other at the pixel to be corrected; and a determination unit for determining a pixel value of the pixel to be corrected by applying greater weighting to the pixel values of pixels along the direction of higher priority with respect to the pixel to be corrected and applying lesser weighting to the pixel values of pixels along the direction of lower priority with respect to the pixel to be corrected. When, for the calculation of the respective priorities of the two directions, the direction of calculation out of the two directions is defined as a first direction and the other direction as a second direction, the calculation unit uses the pixel values of multiple pixels including first pixels adjacent to the pixel to be corrected, second pixels adjacent to the first pixels in the first direction, and third pixels located on the opposite side from the first pixels or the second pixels with respect to a straight line extending in the second direction through the pixel to be corrected.

Description

画像処理装置、画像処理方法及びプログラムImage processing apparatus, image processing method, and program
 本発明は、画像処理装置、画像処理方法及びプログラムに関する。 The present invention relates to an image processing apparatus, an image processing method, and a program.
 医療画像診断や非破壊検査に用いる撮像装置として、放射線を電荷に変換する変換素子と薄膜トランジスタ(TFT)などのスイッチ素子とを組み合わせた画素がアレイ状に配された撮像パネルを含む放射線撮像装置が利用されている。このような放射線撮像装置では、変換素子やスイッチ素子の異常により、正常な信号を出力しない欠陥画素が存在する。また、変換素子の上部に遮光層を設けてオプティカルブラック画素を作ることも行われている。特許文献1には、このような欠陥画素やオプティカルブラック画素を画像処理によって補正する技術が記載されている。 As an imaging apparatus used for medical image diagnosis and nondestructive inspection, there is a radiation imaging apparatus including an imaging panel in which pixels in which a combination of a conversion element that converts radiation into electric charge and a switching element such as a thin film transistor (TFT) are arranged in an array It's being used. In such a radiation imaging apparatus, there is a defective pixel that does not output a normal signal due to an abnormality of the conversion element or the switch element. In addition, an optical black pixel is also formed by providing a light shielding layer on the conversion element. Patent Document 1 describes a technique for correcting such defective pixels and optical black pixels by image processing.
特開2002-33964号公報JP 2002-33964 A
 特許文献1では、対象画素の補正を行う際に優先する画素の方向を決定するために曲率情報を用いる。曲率情報は、補正対象画素から1画素離れた画素の情報を使用して算出される。そのため、高周波成分が多い画像に対して補正方向の算出を正しく行えないことがある。本発明の1つの側面は、対象画素の補正を精度良く行うための技術を提供する。 In Patent Document 1, curvature information is used to determine a pixel direction to be prioritized when correcting a target pixel. The curvature information is calculated using information on a pixel that is one pixel away from the correction target pixel. For this reason, the correction direction may not be correctly calculated for an image with many high-frequency components. One aspect of the present invention provides a technique for accurately correcting a target pixel.
 上記課題に鑑みて、画像処理装置であって、補正対象画素を含む放射線画像を取得する取得手段と、前記補正対象画素について、互いに交差する2つの方向のそれぞれの優先度を算出する算出手段と、前記補正対象画素に対して前記優先度が高い方向にある画素の画素値に大きい重みを割り当て、前記補正対象画素に対して前記優先度が低い方向にある画素の画素値に小さい重みを割り当てることによって、前記補正対象画素の画素値を決定する決定手段とを備え、前記算出手段は、前記2つの方向のそれぞれの前記優先度の算出において、前記2つの方向のうち算出対象の方向を第1方向とし、他方の方向を第2方向とした場合に、前記補正対象画素に隣接した第1画素と、前記第1方向において前記第1画素に隣接した第2画素と、前記補正対象画素を通り前記第2方向に延びる直線に対して前記第1画素又は前記第2画素の反対側にある第3画素とを含む複数の画素の画素値を用いることを特徴とする画像処理装置が提供される。 In view of the above problems, an image processing apparatus, an acquisition unit that acquires a radiation image including a correction target pixel, and a calculation unit that calculates the respective priorities of two directions intersecting each other with respect to the correction target pixel; Assigning a large weight to the pixel value of the pixel in the higher priority direction for the correction target pixel, and assigning the small weight to the pixel value of the pixel in the lower priority direction to the correction target pixel And determining means for determining a pixel value of the correction target pixel, wherein the calculation means sets the direction of the calculation target among the two directions in calculating the priority of each of the two directions. A first pixel adjacent to the correction target pixel, a second pixel adjacent to the first pixel in the first direction, and a front direction when the first direction is a second direction and the other direction is a second direction. Image processing using pixel values of a plurality of pixels including the first pixel or a third pixel on the opposite side of the second pixel with respect to a straight line passing through the correction target pixel in the second direction An apparatus is provided.
 上記手段により、対象画素の補正を精度良く行うための技術が提供される。 By the above means, a technique for accurately correcting the target pixel is provided.
 本発明のその他の特徴及び利点は、添付図面を参照とした以下の説明により明らかになるであろう。なお、添付図面においては、同じ若しくは同様の構成には、同じ参照番号を付す。 Other features and advantages of the present invention will become apparent from the following description with reference to the accompanying drawings. In the accompanying drawings, the same or similar components are denoted by the same reference numerals.
 添付図面は明細書に含まれ、その一部を構成し、本発明の実施の形態を示し、その記述と共に本発明の原理を説明するために用いられる。
第1実施形態に係る放射線撮像システムの構成例を示す図。 第1実施形態に係る放射線撮像装置の撮像パネルの構成例を示す図。 第1実施形態に係る放射線撮像装置の画素の断面の構造例を示す図。 第1実施形態に係る放射線撮像装置の動作を示すタイミングチャート。 第1実施形態に係る放射線撮像装置の動作フローを示す図。 第1実施形態に係る放射線撮像装置の補正方法を説明する図。 第1実施形態に係る放射線撮像装置の補正の効果を説明する図。 第1実施形態に係る放射線撮像装置の補正の効果を説明する図。 第1実施形態に係る放射線撮像装置の補正の効果を説明する図。 第1実施形態に係る放射線撮像装置の補正の効果を説明する図。 第2実施形態に係る放射線撮像装置の撮像パネルの構成例を示す図。 第2実施形態に係る放射線撮像装置の画素の断面の構造例を示す図。 第2実施形態に係る放射線撮像装置の画素の断面の構造例を示す図。 第2実施形態に係る放射線撮像装置の動作フローを示す図。 第2実施形態に係る放射線撮像装置の補正方法を説明する図。
The accompanying drawings are included in the specification, constitute a part thereof, show an embodiment of the present invention, and are used to explain the principle of the present invention together with the description.
The figure which shows the structural example of the radiation imaging system which concerns on 1st Embodiment. The figure which shows the structural example of the imaging panel of the radiation imaging device which concerns on 1st Embodiment. The figure which shows the structural example of the cross section of the pixel of the radiation imaging device which concerns on 1st Embodiment. The timing chart which shows operation | movement of the radiation imaging device which concerns on 1st Embodiment. The figure which shows the operation | movement flow of the radiation imaging device which concerns on 1st Embodiment. The figure explaining the correction method of the radiation imaging device concerning a 1st embodiment. The figure explaining the effect of correction of the radiation imaging device concerning a 1st embodiment. The figure explaining the effect of correction of the radiation imaging device concerning a 1st embodiment. The figure explaining the effect of correction of the radiation imaging device concerning a 1st embodiment. The figure explaining the effect of correction of the radiation imaging device concerning a 1st embodiment. The figure which shows the structural example of the imaging panel of the radiation imaging device which concerns on 2nd Embodiment. The figure which shows the structural example of the cross section of the pixel of the radiation imaging device which concerns on 2nd Embodiment. The figure which shows the structural example of the cross section of the pixel of the radiation imaging device which concerns on 2nd Embodiment. The figure which shows the operation | movement flow of the radiation imaging device which concerns on 2nd Embodiment. The figure explaining the correction method of the radiation imaging device concerning a 2nd embodiment.
 <第1実施形態>
 以下、本発明に係る放射線撮像装置の具体的な実施形態を、添付図面を参照して説明する。以下の説明及び図面において、複数の図面にわたって共通の構成については共通の符号を付している。そのため、複数の図面を相互に参照して共通する構成を説明し、共通の符号を付した構成については適宜説明を省略する。本明細書における放射線は、放射線崩壊によって放出される粒子(光子を含む)の作るビームであるα線、β線、γ線などの他に、同程度以上のエネルギーを有するビーム、例えばX線や粒子線、宇宙線なども含みうる。
<First Embodiment>
Hereinafter, specific embodiments of a radiation imaging apparatus according to the present invention will be described with reference to the accompanying drawings. In the following description and drawings, common reference numerals are given to common configurations throughout the drawings. Therefore, a common configuration is described with reference to a plurality of drawings, and a description of a configuration with a common reference numeral is omitted as appropriate. In this specification, the radiation includes α-rays, β-rays, γ-rays, and the like, which are beams generated by particles (including photons) emitted by radiation decay, such as X-rays, It can also include particle beams, cosmic rays, and the like.
 図1~7を参照して、第1実施形態による放射線撮像装置の構成および動作について説明する。図1は、第1実施形態における放射線撮像装置210を用いた放射線撮像システム200の構成例を示す図である。放射線撮像システム200は、放射線から変換される光学像を電気的に撮像し、放射線画像を生成するための電気的な信号(放射線画像データ)を得るように構成される。放射線撮像システム200は、例えば、放射線撮像装置210、放射線源230、曝射制御部220およびコンピュータ240を含む。 The configuration and operation of the radiation imaging apparatus according to the first embodiment will be described with reference to FIGS. FIG. 1 is a diagram illustrating a configuration example of a radiation imaging system 200 using the radiation imaging apparatus 210 in the first embodiment. The radiation imaging system 200 is configured to electrically capture an optical image converted from radiation and obtain an electrical signal (radiation image data) for generating a radiation image. The radiation imaging system 200 includes, for example, a radiation imaging apparatus 210, a radiation source 230, an exposure control unit 220, and a computer 240.
 放射線源230は、曝射制御部220からの曝射指令(放射指令)に従って放射線の放射を開始する。放射線源230から放射された放射線は、不図示の被検体を通って放射線撮像装置210に照射される。放射線源230はまた、曝射制御部220からの停止指令に従って放射線の放射を停止する。 The radiation source 230 starts radiation emission according to an exposure command (radiation command) from the exposure control unit 220. The radiation emitted from the radiation source 230 passes through a subject (not shown) and is irradiated on the radiation imaging apparatus 210. The radiation source 230 also stops radiation emission according to a stop command from the exposure control unit 220.
 放射線撮像装置210は、撮像パネル212と、撮像パネル212を制御する制御部214とを含む。制御部214は、撮像パネル212から得られる信号に基づいて、放射線源230からの放射線の放射を停止させるための停止信号を発生する。停止信号は、曝射制御部220に供給される。曝射制御部220は、停止信号に応答して、放射線源230に対して停止指令を送る。制御部214は、例えば、FPGA(Field Programmable Gate Array)などのPLD(Programmable Logic Device)、又は、ASIC(Application Specific Integrated Circuit)、又は、プログラムが組み込まれた汎用コンピュータ、又は、これらの全部または一部の組み合わせによって構成されうる。 The radiation imaging apparatus 210 includes an imaging panel 212 and a control unit 214 that controls the imaging panel 212. The control unit 214 generates a stop signal for stopping radiation emission from the radiation source 230 based on a signal obtained from the imaging panel 212. The stop signal is supplied to the exposure control unit 220. The exposure control unit 220 sends a stop command to the radiation source 230 in response to the stop signal. The controller 214 is, for example, a PLD (Programmable Logic Device) such as an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), a general-purpose computer in which a program is incorporated, or all or one of them. It can be configured by a combination of parts.
 コンピュータ240は、放射線撮像装置210および曝射制御部220を制御する。また、コンピュータ240は、放射線撮像装置210から出力される放射線画像データを受信し、放射線画像データを処理することによって、放射線画像を生成する。そのため、コンピュータ240は、画像処理装置として機能する。コンピュータ240は、プロセッサ241とメモリ242とを備える。プロセッサ241は、コンピュータ240の全体の動作を制御するCPUとして機能する。プロセッサ241は上述の放射線撮像装置210および曝射制御部220の制御や、放射線画像の生成を行う。メモリ242は、プログラムを保持する。メモリ242に保持されたプログラムをプロセッサ241が実行することによって、コンピュータ240による処理が行われる。 The computer 240 controls the radiation imaging apparatus 210 and the exposure control unit 220. In addition, the computer 240 receives the radiation image data output from the radiation imaging apparatus 210 and processes the radiation image data to generate a radiation image. Therefore, the computer 240 functions as an image processing device. The computer 240 includes a processor 241 and a memory 242. The processor 241 functions as a CPU that controls the overall operation of the computer 240. The processor 241 controls the radiation imaging apparatus 210 and the exposure control unit 220 described above and generates a radiation image. The memory 242 holds a program. When the processor 241 executes the program held in the memory 242, processing by the computer 240 is performed.
 曝射制御部220は、一例として曝射スイッチ(不図示)を有し、ユーザによって曝射スイッチがオンされると、曝射指令を放射線源230に送るほか、放射線の放射の開始を示す開始通知をコンピュータ240に送る。該開始通知を受けたコンピュータ240は、該開始通知に応答して、放射線の放射の開始を放射線撮像装置210の制御部214に通知する。 The exposure control unit 220 has an exposure switch (not shown) as an example. When the exposure switch is turned on by the user, the exposure control unit 220 sends an exposure command to the radiation source 230 and starts indicating the start of radiation emission. A notification is sent to the computer 240. Upon receiving the start notification, the computer 240 notifies the control unit 214 of the radiation imaging apparatus 210 of the start of radiation emission in response to the start notification.
 図2に、撮像パネル212の構成例が示される。撮像パネル212は、画素アレイ112を備える。画素アレイ112は、放射線を検出するための2次元アレイ状に配された変換素子S11~S44(以下、変換素子Sと総称する)と、スイッチ素子T11~T44(以下、スイッチ素子Tと総称する)とを含む複数の画素PIXを備える。また、画素アレイ112は、変換素子Sで生成された信号を出力するための列方向(図2の縦方向)に沿った複数の列信号線Sig1~Sig4を有する。さらに、撮像パネル212は、画素アレイ112を駆動する駆動回路(行選択回路)114、および、画素アレイ112の列信号線Sigに現れる信号を検出するための読出回路113を備える。図2に示す構成では、記載の簡単化のために、画素アレイ112は、4行×4列の画素PIXで構成されているが、実際には、より多くの画素PIXが配列されうる。一例において、撮像パネル212は、17インチの寸法を有し、約3000行×約3000列の画素PIXを有しうる。 FIG. 2 shows a configuration example of the imaging panel 212. The imaging panel 212 includes a pixel array 112. The pixel array 112 includes conversion elements S11 to S44 (hereinafter collectively referred to as conversion elements S) and switch elements T11 to T44 (hereinafter collectively referred to as switch elements T) arranged in a two-dimensional array for detecting radiation. ) Including a plurality of pixels PIX. The pixel array 112 includes a plurality of column signal lines Sig1 to Sig4 along the column direction (vertical direction in FIG. 2) for outputting the signal generated by the conversion element S. Further, the imaging panel 212 includes a drive circuit (row selection circuit) 114 that drives the pixel array 112 and a readout circuit 113 for detecting a signal that appears on the column signal line Sig of the pixel array 112. In the configuration shown in FIG. 2, for simplification of description, the pixel array 112 is configured by 4 rows × 4 columns of pixels PIX, but in reality, more pixels PIX can be arranged. In one example, the imaging panel 212 may have dimensions of 17 inches and may have approximately 3000 rows by approximately 3000 columns of pixels PIX.
 それぞれの画素PIXは、放射線を検出するための変換素子Sと、変換素子Sと列信号線Sig(複数の信号線Sigのうち変換素子Sに対応する信号線Sig)とを接続するスイッチ素子Tとを含む。それぞれの変換素子Sは、入射した放射線の量に対応する信号を列信号線Sigに出力する。変換素子Sは、例えば、ガラス基板等の絶縁性基板上に配置されアモルファスシリコンを主材料とするMIS型フォトダイオードであってもよい。また、変換素子Sは、PIN型フォトダイオードであってもよい。本実施形態において、変換素子Sは、放射線をシンチレータ層で光に変換した後に、光を検出する間接型の素子として構成されうる。間接型の素子において、シンチレータ層は、複数の画素PIX(複数の変換素子S)によって共有されうる。 Each pixel PIX includes a conversion element S for detecting radiation, and a switch element T that connects the conversion element S and a column signal line Sig (a signal line Sig corresponding to the conversion element S among the plurality of signal lines Sig). Including. Each conversion element S outputs a signal corresponding to the amount of incident radiation to the column signal line Sig. The conversion element S may be, for example, a MIS photodiode that is disposed on an insulating substrate such as a glass substrate and uses amorphous silicon as a main material. Further, the conversion element S may be a PIN photodiode. In the present embodiment, the conversion element S can be configured as an indirect element that detects light after the radiation is converted into light by the scintillator layer. In the indirect element, the scintillator layer can be shared by a plurality of pixels PIX (a plurality of conversion elements S).
 スイッチ素子Tは、例えば、制御端子(ゲート)と2つの主端子(ソース、ドレイン)とを有する薄膜トランジスタ(TFT)などのトランジスタによって構成されうる。変換素子Sは、2つの主電極を有し、変換素子Sの一方の主電極は、スイッチ素子Tの2つの主端子のうちの一方に接続され、変換素子Sの他方の主電極は、共通のバイアス線Bsを介してバイアス電源に接続されている。バイアス電源は、バイアス電圧を供給する。第1行に配されるそれぞれの画素PIXのスイッチ素子Tの制御端子は、行方向(図2の横方向)に沿って配されたゲート線Vg1に接続される。同様に、第2~4行に配されるそれぞれの画素PIXのスイッチSの制御端子は、それぞれゲート線Vg2~Vg4に接続される。ゲート線Vg1~Vg4には、駆動回路114によってゲート信号が供給される。 The switch element T can be constituted by a transistor such as a thin film transistor (TFT) having a control terminal (gate) and two main terminals (source, drain), for example. The conversion element S has two main electrodes, one main electrode of the conversion element S is connected to one of the two main terminals of the switch element T, and the other main electrode of the conversion element S is common. Are connected to a bias power source via a bias line Bs. The bias power supply supplies a bias voltage. The control terminal of the switch element T of each pixel PIX arranged in the first row is connected to the gate line Vg1 arranged along the row direction (lateral direction in FIG. 2). Similarly, the control terminals of the switches S of the pixels PIX arranged in the second to fourth rows are connected to the gate lines Vg2 to Vg4, respectively. A gate signal is supplied to the gate lines Vg1 to Vg4 by the drive circuit 114.
 第1列に配されるそれぞれの画素PIXは、スイッチ素子Tの変換素子Sと接続されない側の主端子が、第1列の列信号線Sig1に接続さる。同様に、第2~4列に配されるそれぞれの画素PIXは、スイッチ素子Tの変換素子Sと接続されない側の主端子が、それぞれ第2~4列の列信号線Sig2~Sig4に接続される。 In each pixel PIX arranged in the first column, the main terminal of the switch element T that is not connected to the conversion element S is connected to the column signal line Sig1 in the first column. Similarly, in each pixel PIX arranged in the second to fourth columns, the main terminal on the side not connected to the conversion element S of the switch element T is connected to the column signal lines Sig2 to Sig4 in the second to fourth columns, respectively. The
 読出回路113は、1つの列信号線Sigに1つの列増幅部CAが対応するように複数の列増幅部CAを有する。それぞれの列増幅部CAは、積分増幅器105、可変増幅器104、サンプルホールド回路107、バッファ回路106を含みうる。積分増幅器105は、列信号線Sigに現れた信号を増幅する。積分増幅器105は、演算増幅器と、演算増幅器の反転入力端子と出力端子との間に並列に接続された積分容量およびリセットスイッチとを含みうる。演算増幅器の非反転入力端子には、基準電位Vrefが供給される。リセットスイッチをオンさせることによって積分容量がリセットされるとともに、列信号線Sigの電位が基準電位Vrefにリセットされる。リセットスイッチは、制御部214から供給されるリセットパルスRCによって制御されうる。 The read circuit 113 has a plurality of column amplifiers CA so that one column amplifier CA corresponds to one column signal line Sig. Each column amplifier CA may include an integrating amplifier 105, a variable amplifier 104, a sample hold circuit 107, and a buffer circuit 106. The integrating amplifier 105 amplifies the signal appearing on the column signal line Sig. The integrating amplifier 105 can include an operational amplifier and an integrating capacitor and a reset switch connected in parallel between the inverting input terminal and the output terminal of the operational amplifier. A reference potential Vref is supplied to the non-inverting input terminal of the operational amplifier. The integration capacitor is reset by turning on the reset switch, and the potential of the column signal line Sig is reset to the reference potential Vref. The reset switch can be controlled by a reset pulse RC supplied from the control unit 214.
 可変増幅器104は、積分増幅器105から出力された信号を設定された増幅率で増幅する。サンプルホールド回路107は、可変増幅器104から出力された信号をサンプルホールドする。サンプルホールド回路107は、サンプリングスイッチとサンプリング容量とによって構成されうる。バッファ回路106は、サンプルホールド回路107から出力された信号をバッファリング(インピーダンス変換)して出力する。サンプリングスイッチは、制御部214から供給されるサンプリングパルスSHによって制御されうる。 The variable amplifier 104 amplifies the signal output from the integrating amplifier 105 with a set amplification factor. The sample hold circuit 107 samples and holds the signal output from the variable amplifier 104. The sample hold circuit 107 can be configured by a sampling switch and a sampling capacitor. The buffer circuit 106 buffers the signal output from the sample hold circuit 107 (impedance conversion) and outputs the result. The sampling switch can be controlled by a sampling pulse SH supplied from the control unit 214.
 また、読出回路113は、それぞれの列信号線Sigに対応するように設けられた複数の列増幅部CAからの信号を所定の順序で選択して出力するマルチプレクサ108を含む。マルチプレクサ108は、例えば、シフトレジスタを含む。シフトレジスタは、制御部214から供給されるクロック信号CLKに従ってシフト動作を行い、シフトレジスタによって複数の列増幅部CAからの1つの信号が選択される。読出回路113は、さらに、マルチプレクサ108から出力される信号をバッファリング(インピーダンス変換)するバッファ109、および、バッファ109から出力される信号であるアナログ信号をデジタル信号に変換するAD変換器110を含みうる。AD変換器110の出力、即ち、放射線画像データは、コンピュータ240に転送される。 Further, the readout circuit 113 includes a multiplexer 108 that selects and outputs signals from a plurality of column amplifiers CA provided in correspondence with each column signal line Sig in a predetermined order. The multiplexer 108 includes, for example, a shift register. The shift register performs a shift operation in accordance with the clock signal CLK supplied from the control unit 214, and one signal from the plurality of column amplification units CA is selected by the shift register. Read circuit 113 further includes a buffer 109 for buffering (impedance conversion) the signal output from multiplexer 108 and an AD converter 110 for converting an analog signal output from buffer 109 into a digital signal. sell. The output of the AD converter 110, that is, radiation image data is transferred to the computer 240.
 図3に、変換素子Sを有する画素PIXの断面構造の一例が模式的に示される。ここでは、図面の上側から放射線を入射させる構成について説明するが、図面の下側から放射線を入射させてもよい。 FIG. 3 schematically shows an example of a cross-sectional structure of the pixel PIX having the conversion element S. Here, a configuration in which radiation is incident from the upper side of the drawing will be described, but radiation may be incident from the lower side of the drawing.
 それぞれの画素PIXの変換素子Sは、ガラス基板などの絶縁性を有する基板310の上に配される。それぞれ画素PIXは、基板310の上に、導電層311、絶縁層312、半導体層313、不純物半導体層314および導電層315を、基板310に近い方から順番に含む。導電層311は、スイッチ素子Tを構成するトランジスタ(例えばTFT)のゲート電極を構成する。絶縁層312は、導電層311を覆うように配置され、半導体層313は、絶縁層312を介して導電層311のうちゲート電極を構成する部分の上に配されている。不純物半導体層314は、スイッチ素子Tを構成するトランジスタの2つの主端子(ソース、ドレイン)を構成するように半導体層313の上に配されている。導電層315は、スイッチ素子Tを構成するトランジスタの2つの主端子(ソース、ドレイン)にそれぞれ接続された配線パターンを構成している。導電層315の一部は、列信号線Sigを構成し、他の一部は、変換素子Sとスイッチ素子Tとを接続するための配線パターンを構成する。 The conversion element S of each pixel PIX is disposed on an insulating substrate 310 such as a glass substrate. Each pixel PIX includes a conductive layer 311, an insulating layer 312, a semiconductor layer 313, an impurity semiconductor layer 314, and a conductive layer 315 in order from the side closer to the substrate 310 on the substrate 310. The conductive layer 311 constitutes a gate electrode of a transistor (for example, TFT) constituting the switch element T. The insulating layer 312 is disposed so as to cover the conductive layer 311, and the semiconductor layer 313 is disposed on a portion of the conductive layer 311 that constitutes the gate electrode with the insulating layer 312 interposed therebetween. The impurity semiconductor layer 314 is disposed on the semiconductor layer 313 so as to constitute two main terminals (source and drain) of the transistor constituting the switch element T. The conductive layer 315 constitutes a wiring pattern connected to each of two main terminals (source and drain) of the transistor constituting the switch element T. A part of the conductive layer 315 constitutes the column signal line Sig, and the other part constitutes a wiring pattern for connecting the conversion element S and the switch element T.
 それぞれの画素PIXは、さらに、絶縁層312および導電層315を覆う層間絶縁膜316を含む。層間絶縁膜316には、導電層315のうちスイッチ素子Tを構成する部分と接続するためのコンタクトプラグ317が設けられている。また、それぞれの画素PIXは、層間絶縁膜316の上に配された変換素子Sを含む。図3に示される例では、変換素子Sは、シンチレータ層904で放射線から変換された光を電気信号に変換する間接型の変換素子として構成されている。変換素子Sは、層間絶縁膜316の上に積層された導電層318、絶縁層319、半導体層320、不純物半導体層321、導電層322、電極層325を含む。変換素子Sの上には、保護層323および接着層324が配される。シンチレータ層904は、接着層324の上に、基板310の入射面の側を覆うように配される。 Each pixel PIX further includes an interlayer insulating film 316 that covers the insulating layer 312 and the conductive layer 315. The interlayer insulating film 316 is provided with a contact plug 317 for connecting to a portion of the conductive layer 315 constituting the switch element T. Each pixel PIX includes a conversion element S disposed on the interlayer insulating film 316. In the example illustrated in FIG. 3, the conversion element S is configured as an indirect conversion element that converts light converted from radiation in the scintillator layer 904 into an electrical signal. The conversion element S includes a conductive layer 318, an insulating layer 319, a semiconductor layer 320, an impurity semiconductor layer 321, a conductive layer 322, and an electrode layer 325 stacked on the interlayer insulating film 316. A protective layer 323 and an adhesive layer 324 are disposed on the conversion element S. The scintillator layer 904 is disposed on the adhesive layer 324 so as to cover the incident surface side of the substrate 310.
 導電層318は、個別の変換素子Sの下部電極を構成する。また、導電層322および電極層325は、個別の変換素子Sの上部電極を構成する。導電層318、絶縁層319、半導体層320、不純物半導体層321、および、導電層322は、変換素子SとしてMIS型センサを構成している。例えば、不純物半導体層321は、n型の不純物半導体層で形成される。 The conductive layer 318 constitutes the lower electrode of the individual conversion element S. In addition, the conductive layer 322 and the electrode layer 325 constitute an upper electrode of the individual conversion element S. The conductive layer 318, the insulating layer 319, the semiconductor layer 320, the impurity semiconductor layer 321, and the conductive layer 322 constitute a MIS type sensor as the conversion element S. For example, the impurity semiconductor layer 321 is formed of an n-type impurity semiconductor layer.
 シンチレータ層904は、GOS(酸硫化ガドリニウム)やCsI(ヨウ化セシウム)などの材料を用いて構成されうる。これらの材料は、貼り合わせや印刷、蒸着などによって形成されうる。 The scintillator layer 904 can be formed using a material such as GOS (gadolinium oxysulfide) or CsI (cesium iodide). These materials can be formed by bonding, printing, vapor deposition, or the like.
 本実施形態において、変換素子Sは、MIS型のセンサを用いる例を示しているが、これに限定されることはない。変換素子Sは、例えば、pn型やPIN型のフォトダイオードであってもよい。 In the present embodiment, the conversion element S is an example using a MIS type sensor, but is not limited thereto. The conversion element S may be, for example, a pn type or PIN type photodiode.
 次いで、図4を参照しながら放射線撮像装置210および放射線撮像システム200の動作を説明する。ここでは、図2に示される、それぞれ変換素子Sを備える4行4列の画素PIXを含む撮像パネル212を有する放射線撮像装置210の動作を例に説明する。放射線撮像システム200の動作は、コンピュータ240によって制御される。放射線撮像装置210の動作は、コンピュータ240による制御の下で、制御部214によって制御される。 Next, operations of the radiation imaging apparatus 210 and the radiation imaging system 200 will be described with reference to FIG. Here, the operation of the radiation imaging apparatus 210 having the imaging panel 212 including the pixel PIX of 4 rows and 4 columns each including the conversion element S illustrated in FIG. 2 will be described as an example. The operation of the radiation imaging system 200 is controlled by the computer 240. The operation of the radiation imaging apparatus 210 is controlled by the control unit 214 under the control of the computer 240.
 まず、放射線源230からの放射線の放射、換言すると、放射線撮像装置210への放射線の照射が開始されるまで、制御部214は、駆動回路114および読出回路113にリセット動作を実施させる。リセット動作とは、駆動回路114が画素アレイ112のそれぞれの行のゲート線Vg1~Vg4に供給されるゲート信号を順にアクティブレベルに駆動し、変換素子Sに蓄積されているダーク電荷をリセットする動作のことである。ここで、リセット動作の際、積分増幅器105のリセットスイッチには、アクティブレベルのリセットパルスRCが供給され、列信号線Sigが基準電位にリセットされる。ダーク電荷とは、変換素子Sに放射線が入射しないにも関わらず発生する電荷のことである。 First, the control unit 214 causes the drive circuit 114 and the readout circuit 113 to perform a reset operation until radiation of radiation from the radiation source 230, in other words, irradiation of radiation to the radiation imaging apparatus 210 is started. The reset operation is an operation in which the driving circuit 114 sequentially drives the gate signals supplied to the gate lines Vg1 to Vg4 in the respective rows of the pixel array 112 to the active level to reset the dark charges accumulated in the conversion elements S. That is. Here, during the reset operation, the reset pulse RC of the active level is supplied to the reset switch of the integrating amplifier 105, and the column signal line Sig is reset to the reference potential. The dark charge is a charge that is generated even though no radiation is incident on the conversion element S.
 制御部214は、例えば、曝射制御部220からコンピュータ240を介して供給される開始通知に基づいて、放射線源230からの放射線の放射の開始を認識することができる。また、放射線撮像装置210に画素アレイ112のバイアス線Bsまたは列信号線Sigなどを流れる電流を検出する検出回路が設けられてもよい。制御部214は、検出回路の出力に基づいて放射線源230からの放射線の照射の開始を認識することができる。 The control unit 214 can recognize the start of radiation emission from the radiation source 230 based on, for example, a start notification supplied from the exposure control unit 220 via the computer 240. Further, the radiation imaging apparatus 210 may be provided with a detection circuit that detects a current flowing through the bias line Bs or the column signal line Sig of the pixel array 112. The controller 214 can recognize the start of radiation irradiation from the radiation source 230 based on the output of the detection circuit.
 放射線が照射されると、制御部214は、スイッチ素子Tを開かれた状態(オフ状態)に制御する。これによって、放射線の照射によって変換素子Sに発生した電荷が蓄積される。放射線の照射が終了まで、制御部214は、この状態で待機する。 When irradiated with radiation, the control unit 214 controls the switch element T to be in an open state (off state). As a result, charges generated in the conversion element S due to radiation irradiation are accumulated. The control unit 214 stands by in this state until radiation irradiation is completed.
 次に、制御部214は、駆動回路114および読出回路113に読出し動作を実行させる。読出し動作とは、駆動回路114が、画素アレイ112のそれぞれの行のゲート線Vg1~Vg4に供給されるゲート信号をアクティブレベルに駆動する動作のことである。そして、読出回路113は、列信号線Sigを介して変換素子Sに蓄積されている電荷を読み出し、マルチプレクサ108、バッファ109およびAD変換器110を通して放射線画像データとしてコンピュータ240に出力する。 Next, the control unit 214 causes the drive circuit 114 and the read circuit 113 to perform a read operation. The read operation is an operation in which the drive circuit 114 drives the gate signals supplied to the gate lines Vg1 to Vg4 in each row of the pixel array 112 to the active level. Then, the readout circuit 113 reads out the electric charge accumulated in the conversion element S via the column signal line Sig, and outputs it as radiation image data to the computer 240 through the multiplexer 108, the buffer 109, and the AD converter 110.
 次にオフセット画像データの取得について説明する。変換素子Sは、放射線を照射しない状態においても、ダーク電荷が溜まり続ける。このため、制御部214は、放射線を照射せずに放射線画像データを取得する際と同様の動作を行うことによって、オフセット画像データを取得する。放射線画像データからオフセット画像データを引き算することで、ダーク電荷によるオフセット成分を除去できる。 Next, the acquisition of offset image data will be described. The conversion element S continues to accumulate dark charges even in a state where no radiation is irradiated. For this reason, the control part 214 acquires offset image data by performing the same operation | movement as acquiring radiation image data, without irradiating a radiation. By subtracting the offset image data from the radiation image data, the offset component due to the dark charge can be removed.
 次に、本実施形態における画像処理フローについて、図5を用いて説明する。まず、ステップS910において、制御部214は、上述のリセット動作を行った後、放射線画像データを取得するために、放射線の照射中に変換素子Sで生成される電荷を蓄積するように制御する。次いで、制御部214は、ステップS911において、駆動回路114および読出回路113に読出し動作を実行させ、放射線画像データを読み出す。このステップS911で、放射線画像データがコンピュータ240に出力される。次いで、制御部214は、ステップS912においてオフセット画像データを取得するための蓄積動作を行い、ステップ913において、オフセット画像データを駆動回路114および読出回路113に読み出させ、コンピュータ240に出力させる。 Next, the image processing flow in this embodiment will be described with reference to FIG. First, in step S910, after performing the above-described reset operation, the control unit 214 performs control so as to accumulate charges generated by the conversion element S during radiation irradiation in order to acquire radiation image data. Next, in step S911, the control unit 214 causes the drive circuit 114 and the readout circuit 113 to perform a readout operation, and reads out radiation image data. In step S911, radiation image data is output to the computer 240. Next, the control unit 214 performs an accumulation operation for acquiring offset image data in step S912. In step 913, the control unit 214 causes the drive circuit 114 and the readout circuit 113 to read the offset image data, and causes the computer 240 to output the offset image data.
 次いで、コンピュータ240のプロセッサ241は、ステップS914において、ステップS911で取得した放射線画像データから、ステップS913で取得したオフセット画像データを減算することによってオフセット補正を行う。プロセッサ241は、ステップS915において、オフセット補正後の画像データを、あらかじめ取得しておいたゲイン補正画像データで除算することによりゲイン補正を実施する。このようにして、プロセッサ241は、放射線画像を取得する。後述するように、この放射線画像は補正対象画素を含む。補正対象画素とは、画素アレイ112やシンチレータ層904を製造する際にできてしまった異常な画素値を出力をする欠陥画素や、意図的に配置されたオプティカルブラック画素のように、有意な画素値を有していない画素のことである。プロセッサ241は、放射線撮像装置210で生成され、その後に外部の記憶装置に格納された放射線画像を読み出すことによって、放射線画像を取得してもよい。 Next, in step S914, the processor 241 of the computer 240 performs offset correction by subtracting the offset image data acquired in step S913 from the radiation image data acquired in step S911. In step S915, the processor 241 performs gain correction by dividing the image data after the offset correction by the gain correction image data acquired in advance. In this way, the processor 241 acquires a radiation image. As will be described later, this radiation image includes correction target pixels. The correction target pixel is a significant pixel such as a defective pixel that outputs an abnormal pixel value generated when the pixel array 112 or the scintillator layer 904 is manufactured, or an optical black pixel that is intentionally arranged. A pixel that does not have a value. The processor 241 may acquire a radiation image by reading out a radiation image generated by the radiation imaging apparatus 210 and then stored in an external storage device.
 続いて、プロセッサ241は、ステップS916で、放射線画像に含まれる補正対象画素の補正を行う。具体的に、プロセッサ241は、ステップS917で、補正対象画素について、互いに交差する2つの方向のそれぞれの優先度を算出する。その後、プロセッサ241は、ステップS918は、算出された優先度に基づいて補正対象画素の画素値を決定する。 Subsequently, in step S916, the processor 241 corrects the correction target pixel included in the radiation image. Specifically, in step S917, the processor 241 calculates the priorities of the two directions that intersect each other for the correction target pixel. Thereafter, in step S918, the processor 241 determines the pixel value of the correction target pixel based on the calculated priority.
 まず、図6を参照して優先度の算出方法について詳細に説明する。図6は、放射線画像のうち補正対象画素を含む部分に着目した図である。図6に示すように、画素a~画素mと参照符号を付す。また、画素a~画素mの画素値もそれぞれa~mで表す。説明のために、図6に示す部分において、補正対象画素は画素eのみであり、その他の画素は有意の画素値を有するとする。 First, the priority calculation method will be described in detail with reference to FIG. FIG. 6 is a diagram focusing on a portion including the correction target pixel in the radiation image. As shown in FIG. 6, pixels a to m and reference numerals are attached. The pixel values of the pixels a to m are also represented by a to m, respectively. For the sake of explanation, in the part shown in FIG. 6, it is assumed that the pixel to be corrected is only the pixel e, and the other pixels have significant pixel values.
 プロセッサ241は、画素eについて、矢印601で示す横方向と、矢印602で示す縦方向とのそれぞれの優先度を算出する。具体的に、プロセッサ241は、横方向の優先度Xを以下のように差分絶対値を用いて算出する。 The processor 241 calculates the priorities of the horizontal direction indicated by the arrow 601 and the vertical direction indicated by the arrow 602 for the pixel e. Specifically, the processor 241 calculates the horizontal priority X using the difference absolute value as follows.
  ave1=(a+b+c)/3
  ave2=(g+h+i)/3
  S1=|a-ave1|+|b-ave1|+|c-ave1|
  S2=|g-ave2|+|h-ave2|+|i-ave2|
  S=(S1+S2)/2
  X=1/S
この式において、S1は、3つの画素a、b、cの画素値と、これらの平均値ave1との差分絶対値の和である。すなわち、S1は、横方向に並んだ3つの画素a、b、cの画素値のばらつき具合を示す。S1が小さいほど3つの画素a、b、cの画素値のばらつきが小さく、S1が大きいほど3つの画素a、b、cの画素値のばらつきが大きい。Sは、画素eの上側で横方向に並んだ3つの画素a、b、cの画素値のばらつき具合と、画素eの下側で横方向に並んだ3つの画素g、h、iの画素値のばらつき具合との平均である。すなわち、Sは、画素eの周囲の画素の画素値の横方向におけるばらつき具合を示す。
ave1 = (a + b + c) / 3
ave2 = (g + h + i) / 3
S1 = | a-ave1 | + | b-ave1 | + | c-ave1 |
S2 = | g-ave2 | + | h-ave2 | + | i-ave2 |
S = (S1 + S2) / 2
X = 1 / S
In this equation, S1 is the sum of the absolute values of the differences between the pixel values of the three pixels a, b, and c and their average value ave1. That is, S1 indicates the degree of variation in pixel values of the three pixels a, b, and c arranged in the horizontal direction. The smaller the S1, the smaller the variation in the pixel values of the three pixels a, b, c. The larger the S1, the larger the variation in the pixel values of the three pixels a, b, c. S is the variation in the pixel values of the three pixels a, b, c arranged horizontally in the upper side of the pixel e, and the pixels of the three pixels g, h, i arranged horizontally in the lower side of the pixel e. It is an average with the degree of dispersion of values. That is, S indicates the degree of variation in the horizontal direction of the pixel values of the pixels around the pixel e.
 プロセッサ241は、横方向の優先度Yも同様に、以下のように差分絶対値を用いて算出する。 Similarly, the processor 241 calculates the priority Y in the horizontal direction using the difference absolute value as follows.
  ave3=(a+d+g)/3
  ave4=(c+f+i)/3
  T1=|a-ave3|+|d-ave3|+|g-ave3|
  T2=|c-ave4|+|f-ave4|+|i-ave4|
  T=(T1+T2)/2
  Y=1/T
Sについての説明と同様に、Tは画素eの周囲の画素の画素値の縦方向におけるばらつき具合を示す。
ave3 = (a + d + g) / 3
ave4 = (c + f + i) / 3
T1 = | a-ave3 | + | d-ave3 | + | g-ave3 |
T2 = | c-ave4 | + | f-ave4 | + | i-ave4 |
T = (T1 + T2) / 2
Y = 1 / T
Similar to the description of S, T indicates the degree of variation in the vertical direction of the pixel values of the pixels around the pixel e.
 画素eの周囲の画素の画素値に基づいて画素eの画素値を決定する場合に、ばらつき具合の少ない方向に位置する画素の画素値を優先的に使用することによって、画素値を精度よく補正できる。そこで、優先度X、YをそれぞれS、Tの逆数とする。逆数を取ることは、優先度X、YとS、Tとに負の相関関係を持たせるための1つの方法であり、他の方法が用いられてもよい。 When determining the pixel value of the pixel e based on the pixel values of the pixels around the pixel e, the pixel value of the pixel located in the direction with less variation is preferentially used to correct the pixel value with high accuracy. it can. Therefore, the priorities X and Y are the reciprocals of S and T, respectively. Taking the reciprocal is one method for giving negative correlation to the priorities X, Y and S, T, and other methods may be used.
 続いて、算出された優先度に基づいて補正対象画素の画素値を決定する方法について説明する。具体的に、プロセッサ241は、補正対象画素に対して優先度が高い方向にある画素の画素値に大きい重みを割り当て、補正対象画素に対して優先度が低い方向にある画素の画素値に小さい重みを割り当てることによって、補正対象画素の画素値を決定する。 Subsequently, a method for determining the pixel value of the correction target pixel based on the calculated priority will be described. Specifically, the processor 241 assigns a large weight to the pixel value of the pixel in the higher priority direction with respect to the correction target pixel, and decreases the pixel value of the pixel in the lower priority direction with respect to the correction target pixel. By assigning a weight, the pixel value of the correction target pixel is determined.
 例えば、プロセッサ241は、画素eの画素値を以下の式で算出する。 For example, the processor 241 calculates the pixel value of the pixel e by the following formula.
 e=α×(d+f)/2+β×(b+h)/2
ただし、重みα、βは、α+β=1を満たし、優先度X、Yの大小関係と一致する値である。
e = α × (d + f) / 2 + β × (b + h) / 2
However, the weights α and β are values that satisfy α + β = 1 and coincide with the magnitude relationship between the priorities X and Y.
 例えば、一例では、X>Y(すなわち、横方向の優先度が高い)場合に、α=1、β=0(すなわち、画素eの横方向に位置する画素d、fの画素値のみを用いる)とする。X<Y(すなわち、縦方向の優先度が高い)場合に、α=0、β=1(すなわち、画素eの縦方向に位置する画素b、hの画素値のみを用いる)とする。X=Yのとき、α=β=0.5とする。 For example, in one example, when X> Y (that is, the priority in the horizontal direction is high), α = 1 and β = 0 (that is, only the pixel values of the pixels d and f positioned in the horizontal direction of the pixel e are used). ). When X <Y (that is, the priority in the vertical direction is high), α = 0 and β = 1 (that is, only the pixel values of the pixels b and h positioned in the vertical direction of the pixel e are used). When X = Y, α = β = 0.5.
 別の例で、
  α=X/(X+Y)
  β=Y/(X+Y)
としてする。この方法では、各方向の優先度合いに応じて重みα、βが定まる。
In another example
α = X / (X + Y)
β = Y / (X + Y)
To do. In this method, the weights α and β are determined according to the priority in each direction.
 横方向のばらつき具合を示すS1を算出するために、プロセッサ241は、以下の画素を含む複数の画素の画素値を用いる。算出対象とは異なる方向である縦方向において画素eに隣接した画素b、横方向において画素bに隣接した画素a、画素eを通り縦方向に延びる直線に対して画素aの反対側にある画素cとを含む複数の画素。S2の算出に用いられる画素g、h、iもこの性質を満たす。優先度を算出するために使用する画素が補正対処画素に隣接した画素を含むことによって、高周波成分の影響を加味しやすくなる。また、横方向に連続した2つ以上の画素を含むことによって、縞々模様の影響を含めることができる。さらに、画素eを通り縦方向に延びる直線に対して画素aの反対側にある2つの画素を含むことによって、補正対象画素を含んだ高周波成分の連続性の影響も加味できる。縦方向のばらつき具合を示すT1を算出する場合も同様に、プロセッサ241は、以下の画素を含む複数の画素の画素値を用いる。算出対象とは異なる方向である横方向において画素eに隣接した画素d、縦方向において画素dに隣接した画素a、画素eを通り横方向に延びる直線に対して画素aの反対側にある画素g。 In order to calculate S1 indicating the degree of variation in the horizontal direction, the processor 241 uses pixel values of a plurality of pixels including the following pixels. A pixel b adjacent to the pixel e in the vertical direction, which is a direction different from the calculation target, a pixel a adjacent to the pixel b in the horizontal direction, and a pixel on the opposite side of the pixel a with respect to a straight line passing through the pixel e and extending in the vertical direction a plurality of pixels including c. The pixels g, h, i used for calculating S2 also satisfy this property. Since the pixels used for calculating the priority include the pixels adjacent to the correction coping pixels, it becomes easy to consider the influence of the high frequency component. Moreover, the influence of a stripe pattern can be included by including two or more pixels continuous in the horizontal direction. Furthermore, by including two pixels on the opposite side of the pixel a with respect to a straight line extending in the vertical direction through the pixel e, the influence of the continuity of the high-frequency component including the correction target pixel can be taken into consideration. Similarly, when calculating T1 indicating the degree of variation in the vertical direction, the processor 241 uses pixel values of a plurality of pixels including the following pixels. A pixel d adjacent to the pixel e in the horizontal direction, which is different from the calculation target, a pixel a adjacent to the pixel d in the vertical direction, and a pixel on the opposite side of the pixel a with respect to a straight line passing through the pixel e and extending in the horizontal direction g.
 図7A~図7Dを参照して、本実施形態による補正の効果について説明する。図7Aは、補正対象画素を含まない放射線画像を示す。この放射線画像のうち、1つの画素(枠線部分の中央にある黒塗りの画素)の画素値を、様々な方法で各方向の優先度を決定することによって周囲の画素の画素値から補正する。図7Bは、補正対象画素から1画素以上離れた複数の画素(ハッチングされた画素)を用いて優先度を決定することによって得られる放射線画像を示す。図7Cは、補正対象画素の一方の側だけにある複数の画素(ハッチングされた画素)を用いて優先度を決定することによって得られる放射線画像を示す。図7Dは、本実施形態に従って優先度を決定することによって得られる放射線画像を示す。図7Dに示す放射線画像は図7B、7Cに示す放射線画像と比較して元の放射線画像(図7A)に近いことがわかる。 The effect of the correction according to the present embodiment will be described with reference to FIGS. 7A to 7D. FIG. 7A shows a radiation image that does not include a correction target pixel. Of this radiation image, the pixel value of one pixel (the black pixel at the center of the frame portion) is corrected from the pixel values of surrounding pixels by determining the priority in each direction by various methods. . FIG. 7B shows a radiographic image obtained by determining priority using a plurality of pixels (hatched pixels) that are one or more pixels away from the correction target pixel. FIG. 7C shows a radiographic image obtained by determining priority using a plurality of pixels (hatched pixels) on only one side of the correction target pixel. FIG. 7D shows a radiographic image obtained by determining priorities according to this embodiment. It can be seen that the radiographic image shown in FIG. 7D is closer to the original radiographic image (FIG. 7A) than the radiographic images shown in FIGS. 7B and 7C.
 プロセッサ241は、優先度X、Yを算出するために、上述の差分絶対値の他に、周囲の画素の画素値の標準偏差や分散、曲率を用いてもよい。プロセッサ241は、これらの少なくとも何れかを組み合わせて優先度X、Yを算出してもよい。例えば、プロセッサ241は、曲率を用いて優先度X、Yを算出する場合に、以下の式を用いる。 In order to calculate the priorities X and Y, the processor 241 may use the standard deviation, variance, and curvature of the pixel values of surrounding pixels in addition to the above-described absolute difference value. The processor 241 may calculate the priorities X and Y by combining at least one of these. For example, the processor 241 uses the following expression when calculating the priorities X and Y using the curvature.
  X=|a-2×b+c|+|g-2×h+i|
  Y=|a-2×d+g|+|c-2×f+i|
曲率が小さいほど周囲の画素の画素値が高い線形性を有するので、周囲の画素を用いて精度よく補正対象画素の画素値を補正できるようになる。
X = | a−2 × b + c | + | g−2 × h + i |
Y = | a−2 × d + g | + | c−2 × f + i |
Since the pixel value of surrounding pixels has higher linearity as the curvature is smaller, the pixel value of the correction target pixel can be accurately corrected using the surrounding pixels.
 プロセッサ241は、画素eについて、横方向の優先度Xと縦方向の優先度Yとを以下のように算出してもよい。 The processor 241 may calculate the horizontal priority X and the vertical priority Y for the pixel e as follows.
  ave5=(k+d+f+l)/4
  S=|k-ave5|+|d-ave5|+|f-ave5|+|l-ave5|
  X=1/S
  ave6=(j+b+h+m)/4
  T=|j-ave6|+|b-ave6|+|h-ave6|+|m-ave6|
  Y=1/T
この式で、横方向のばらつき具合を示すSを算出するために、プロセッサ241は、以下を含む複数の画素の画素値を用いる。算出対象の方向である横方向において画素eに隣接した画素d、横方向において画素dに隣接した画素k、画素eを通り縦方向に延びる直線に対して画素kの反対側にある画素l。縦方向のばらつき具合を示すTを算出するために、プロセッサ241は、算出対象の方向である縦方向において画素eに隣接した画素bと、縦方向において画素bに隣接した画素jと、画素eを通り横方向に延びる直線に対して画素jの反対側にある画素mとを含む複数の画素の画素値を用いる。
ave5 = (k + d + f + l) / 4
S = | k-ave5 | + | d-ave5 | + | f-ave5 | + | l-ave5 |
X = 1 / S
ave6 = (j + b + h + m) / 4
T = | j-ave6 | + | b-ave6 | + | h-ave6 | + | m-ave6 |
Y = 1 / T
In this equation, in order to calculate S indicating the degree of variation in the horizontal direction, the processor 241 uses pixel values of a plurality of pixels including the following. A pixel d adjacent to the pixel e in the horizontal direction, which is the direction to be calculated, a pixel k adjacent to the pixel d in the horizontal direction, and a pixel l on the opposite side of the pixel k with respect to a straight line passing through the pixel e and extending in the vertical direction. In order to calculate T indicating the degree of variation in the vertical direction, the processor 241 calculates the pixel b adjacent to the pixel e in the vertical direction, which is the calculation target direction, the pixel j adjacent to the pixel b in the vertical direction, and the pixel e. The pixel values of a plurality of pixels including a pixel m on the opposite side of the pixel j with respect to a straight line passing through and extending in the horizontal direction are used.
 第1実施形態では、縦方向と横方向との2方向の優先度を算出したが、斜め方向の優先度を算出し、補正対処画素の斜め方向に位置する画素を用いて補正対象画素の画素値を決定してもよい。 In the first embodiment, the priority in the two directions of the vertical direction and the horizontal direction is calculated. However, the priority in the diagonal direction is calculated, and the pixel of the correction target pixel is calculated using the pixel located in the diagonal direction of the correction handling pixel. The value may be determined.
 <第2実施形態>
 図8~11を参照して、第2実施形態による放射線撮像装置の構成および動作について説明する。第1実施形態と重複する箇所については説明を省略する。放射線撮像システムの構成例は図1と同様である。
<Second Embodiment>
The configuration and operation of the radiation imaging apparatus according to the second embodiment will be described with reference to FIGS. A description of the same parts as those in the first embodiment is omitted. A configuration example of the radiation imaging system is the same as that shown in FIG.
 図9A、図9Bに、撮像パネル212の構成例が示される。第1実施形態の撮像パネル212と、第2実施形態の撮像パネル212との相違点を以下に説明する。撮像パネル212には、放射線を入射させるための入射面の側と、入射面とは反対側の裏面と、の両方に、放射線を可視光に変換するシンチレータ層が、それぞれの面を覆うように配される。また、それぞれの画素PIXに含まれる変換素子Sは、2種類の変換素子Sを含む。図8に示す構成において、変換素子S11、S12、S13、S22、S23、S24、S31、S32、S34、S41、S42、S43、S44は、基板の両側に配されたシンチレータ層からの光を受けるように配される。以下において、変換素子Sのうち両側のシンチレータ層からの光を受ける変換素子を特定する場合、変換素子901と呼ぶ。また、変換素子S14、S21、S33には、一方のシンチレータ層と当該変換素子Sのそれぞれとの間に遮光層903が配される。これによって、変換素子S13、S21、S33は、一方のシンチレータ層からの光が遮断され、他方のシンチレータ層からの光を受けるように配される。これらの変換素子Sを、以下において、変換素子Sのうち片側のシンチレータ層からの光が遮断される変換素子を特定する場合、変換素子902と呼ぶ。遮光層903は、シンチレータ層で発光した光を遮る層であり、基板の入射面の側または裏面の側を覆うシンチレータ層の何れか一方と、変換素子902との間を遮光すればよい。 9A and 9B show a configuration example of the imaging panel 212. FIG. Differences between the imaging panel 212 of the first embodiment and the imaging panel 212 of the second embodiment will be described below. On the imaging panel 212, a scintillator layer that converts radiation into visible light covers both the incident surface side on which radiation is incident and the back surface opposite to the incident surface so as to cover the respective surfaces. Arranged. The conversion element S included in each pixel PIX includes two types of conversion elements S. In the configuration shown in FIG. 8, the conversion elements S11, S12, S13, S22, S23, S24, S31, S32, S34, S41, S42, S43, and S44 receive light from scintillator layers disposed on both sides of the substrate. Arranged. Hereinafter, when a conversion element that receives light from the scintillator layers on both sides of the conversion element S is specified, it is referred to as a conversion element 901. In the conversion elements S14, S21, and S33, a light shielding layer 903 is disposed between one scintillator layer and each of the conversion elements S. Accordingly, the conversion elements S13, S21, and S33 are arranged so that light from one scintillator layer is blocked and light from the other scintillator layer is received. In the following, these conversion elements S are referred to as conversion elements 902 when a conversion element that blocks light from one scintillator layer of the conversion elements S is specified. The light-shielding layer 903 is a layer that shields light emitted from the scintillator layer, and it is only necessary to shield between the conversion element 902 and any one of the scintillator layers covering the incident surface side or the back surface side of the substrate.
 本実施形態では、基板の入射面の側に配されたシンチレータ層と変換素子902との間に遮光層903が配されるとする。基板の入射面の側から入射した放射線のうち、エネルギーの低い成分は、基板の入射面の側を覆うシンチレータ層で吸収され、可視光に変換されて、それぞれの画素PIXに入射する。変換素子902は、基板の入射面の側が遮光されているため、基板の入射面の側のシンチレータ層で発光した光が入射しない。そのため、放射線のエネルギーの低い成分から変換された光は、変換素子902に入射しない。一方、変換素子901は、遮光層903が配されないため、放射線のエネルギーの低い成分から変換された光が入射する。 In this embodiment, it is assumed that the light shielding layer 903 is disposed between the scintillator layer disposed on the incident surface side of the substrate and the conversion element 902. Of the radiation incident from the incident surface side of the substrate, the low energy component is absorbed by the scintillator layer covering the incident surface side of the substrate, converted into visible light, and incident on each pixel PIX. Since the conversion element 902 is shielded from the incident surface side of the substrate, light emitted from the scintillator layer on the incident surface side of the substrate does not enter. Therefore, light converted from a component having low radiation energy does not enter the conversion element 902. On the other hand, since the light shielding layer 903 is not disposed in the conversion element 901, light converted from a component having low radiation energy is incident.
 また、放射線のうち、基板の入射面の側に配されたシンチレータ層で吸収されなかったエネルギーの高い成分は、基板の裏面の側を覆うシンチレータ層で吸収され、可視光に変換される。変換素子901および変換素子902において、基板の裏面の側は遮光されていないため、放射線のうちエネルギーが高い成分から変換された光は、変換素子901および変換素子902の両方に入射する。 Also, of the radiation, high energy components that are not absorbed by the scintillator layer disposed on the incident surface side of the substrate are absorbed by the scintillator layer covering the back surface side of the substrate and converted into visible light. In the conversion element 901 and the conversion element 902, since the back side of the substrate is not shielded, light converted from a component having high energy in the radiation enters both the conversion element 901 and the conversion element 902.
 このように、変換素子901は、放射線のうちエネルギーの高い成分およびエネルギーの低い成分に起因する信号を取得でき、変換素子902は、放射線のうちエネルギーの高い成分に起因する信号を取得できる。つまり、互いに隣接する画素PIXで、異なる放射線エネルギーの情報を保持することができる。このように隣接する画素PIXで、異なるエネルギー成分の放射線から取得される情報を保持することによって、後述する方法を用いてエネルギーサブトラクションを行うことができる。 Thus, the conversion element 901 can acquire a signal due to a high energy component and a low energy component of radiation, and the conversion element 902 can acquire a signal due to a high energy component of radiation. That is, the information of different radiation energy can be held in the pixels PIX adjacent to each other. By holding information acquired from radiation of different energy components in adjacent pixels PIX in this way, energy subtraction can be performed using a method described later.
 図9A、図9Bは、変換素子901を有する画素PIXAと変換素子902を有する画素PIXBおよび画素PIXCとの断面構造の一例が模式的に示される。ここでは、図面の上側から放射線を入射させるとして説明するが、図面の下側から放射線を入射させてもよい。図9Aは、変換素子901および変換素子902が基板310と基板310の入射面の側を覆うシンチレータ層904との間に配され、画素PIXBにおいて、遮光層903が、変換素子902とシンチレータ層904との間に配される場合を示す。また、図9Bは、変換素子901および変換素子902が基板310と基板310の入射面の側を覆うシンチレータ層904との間に配されることは図9Aと同じである。一方、図9Bの構成において、画素PIXCにおいて、遮光層903が、変換素子902と基板310の入射面とは反対側の裏面を覆うシンチレータ層905との間に配される場合を示す。 9A and 9B schematically show examples of cross-sectional structures of the pixel PIXA having the conversion element 901, the pixel PIXB having the conversion element 902, and the pixel PIXC. Here, the radiation is described as being incident from the upper side of the drawing, but the radiation may be incident from the lower side of the drawing. In FIG. 9A, the conversion element 901 and the conversion element 902 are arranged between the substrate 310 and the scintillator layer 904 that covers the incident surface side of the substrate 310, and in the pixel PIXB, the light shielding layer 903 includes the conversion element 902 and the scintillator layer 904. The case where it is arranged between is shown. 9B is the same as FIG. 9A in that the conversion element 901 and the conversion element 902 are arranged between the substrate 310 and the scintillator layer 904 that covers the incident surface side of the substrate 310. On the other hand, in the configuration of FIG. 9B, the pixel PIXC shows a case where the light shielding layer 903 is disposed between the conversion element 902 and the scintillator layer 905 covering the back surface opposite to the incident surface of the substrate 310.
 それぞれの画素PIXの変換素子Sは、シンチレータ層904、905で発光した光を透過するガラス基板などの絶縁性を有する基板310の上に配される。シンチレータ層904は、接着層324の上に、基板310の入射面の側を覆うように配される。また、シンチレータ層905は、基板310の裏面の側を覆うように配される。シンチレータ層904、905は、GOS(酸硫化ガドリニウム)やCsI(ヨウ化セシウム)などの材料を用いて構成されうる。シンチレータ層904とシンチレータ層905とは、同じ材料を用いてもよいし、取得する放射線のエネルギーに応じて異なる材料を用いてもよい。シンチレータ層904とシンチレータ層905とは基板310を挟むように配されている。 The conversion element S of each pixel PIX is disposed on an insulating substrate 310 such as a glass substrate that transmits light emitted from the scintillator layers 904 and 905. The scintillator layer 904 is disposed on the adhesive layer 324 so as to cover the incident surface side of the substrate 310. The scintillator layer 905 is disposed so as to cover the back surface side of the substrate 310. The scintillator layers 904 and 905 can be formed using a material such as GOS (gadolinium oxysulfide) or CsI (cesium iodide). The scintillator layer 904 and the scintillator layer 905 may use the same material, or may use different materials depending on the energy of radiation to be acquired. The scintillator layer 904 and the scintillator layer 905 are arranged so as to sandwich the substrate 310.
 次いで、シンチレータ層904またはシンチレータ層905から入射する光を遮断するために変換素子902に配される遮光層903の配置について説明する。図9Aに示す構成において、画素PIXBの変換素子902は、基板310の入射面の側からシンチレータ層904に向かって下部電極を構成する導電層318と半導体層320と上部電極を構成する導電層322とをこの順番で含む。この上部電極を構成する導電層322が、遮光層903として機能する。具体的には、導電層322をAl、Mo、Cr、Cuなど、シンチレータ層904で発せられる光に対して不透明な材料で形成することによって、導電層322が遮光層903として機能する。また、図9Bに示す構成において、画素PIXCの変換素子902は、基板310の入射面の側からシンチレータ層904に向かって下部電極を構成する導電層318と半導体層320と上部電極を構成する導電層322、電極層325とをこの順番で含む。この下部電極を構成する導電層318が、遮光層903として機能する。具体的には、導電層318をAl、Mo、Cr、Cuなど、シンチレータ層905で発せられる光に対して不透明な材料で形成することによって、導電層322が遮光層903として機能する。 Next, the arrangement of the light shielding layer 903 disposed on the conversion element 902 in order to block light incident from the scintillator layer 904 or the scintillator layer 905 will be described. 9A, the conversion element 902 of the pixel PIXB includes a conductive layer 318 that forms a lower electrode from the incident surface side of the substrate 310 toward the scintillator layer 904, a semiconductor layer 320, and a conductive layer 322 that forms an upper electrode. And in this order. The conductive layer 322 constituting this upper electrode functions as the light shielding layer 903. Specifically, the conductive layer 322 functions as the light shielding layer 903 by forming the conductive layer 322 using a material that is opaque to light emitted from the scintillator layer 904, such as Al, Mo, Cr, or Cu. In the configuration shown in FIG. 9B, the conversion element 902 of the pixel PIXC includes a conductive layer 318 that forms the lower electrode from the incident surface side of the substrate 310 toward the scintillator layer 904, a conductive layer that forms the upper electrode and the semiconductor layer 320. The layer 322 and the electrode layer 325 are included in this order. The conductive layer 318 constituting this lower electrode functions as the light shielding layer 903. Specifically, the conductive layer 318 functions as the light shielding layer 903 by forming the conductive layer 318 using a material that is opaque to light emitted from the scintillator layer 905 such as Al, Mo, Cr, or Cu.
 一方、画素PIXAの変換素子901において、導電層318および電極層325には、ITO(酸化インジウムスズ)など、シンチレータ層904で発せられる光に対して透明な材料が用いられる。これによって、隣接する画素PIXAと画素PIXBまたは画素PIXCとの間でエネルギー成分の異なる信号を取得することができる。 On the other hand, in the conversion element 901 of the pixel PIXA, a material transparent to light emitted from the scintillator layer 904 such as ITO (indium tin oxide) is used for the conductive layer 318 and the electrode layer 325. Accordingly, signals having different energy components can be acquired between the adjacent pixel PIXA and the pixel PIXB or the pixel PIXC.
 また、本実施形態において、画素PIXBの導電層322および画素PIXCの導電層318を単層構造とする例を示したが、これに限られることはない。例えば、画素PIXBの導電層322および画素PIXCの導電層318において、透明な材料と不透明な材料とを積層させてもよく、その場合、不透明な材料の面積で遮光量が決定する。また、本実施形態において、画素PIXBの導電層322および画素PIXCの導電層318を遮光層903として機能させたが、遮光層903の配置はこれに限られることはない。例えば、画素PIXBにおいて、保護層323の中にシンチレータ層904から入射する光に対し、Al、Mo、Cr、Cuなどを用いた専用の遮光層903を配してもよい。この場合、遮光層903の電位を一定の電位に固定して用いてもよい。 In the present embodiment, an example in which the conductive layer 322 of the pixel PIXB and the conductive layer 318 of the pixel PIXC have a single-layer structure is shown, but the present invention is not limited to this. For example, in the conductive layer 322 of the pixel PIXB and the conductive layer 318 of the pixel PIXC, a transparent material and an opaque material may be stacked. In that case, the light shielding amount is determined by the area of the opaque material. In this embodiment, the conductive layer 322 of the pixel PIXB and the conductive layer 318 of the pixel PIXC function as the light shielding layer 903. However, the arrangement of the light shielding layer 903 is not limited thereto. For example, in the pixel PIXB, a dedicated light shielding layer 903 using Al, Mo, Cr, Cu, or the like may be disposed in the protective layer 323 for light incident from the scintillator layer 904. In this case, the light shielding layer 903 may be fixed at a constant potential.
 次に、本実施形態における画像処理フローについて、図10及び図11を用いて説明する。ステップS910~S915は第1実施形態同様である。 Next, the image processing flow in this embodiment will be described with reference to FIGS. Steps S910 to S915 are the same as in the first embodiment.
 プロセッサ241は、ステップS921において、ゲイン補正後の放射線画像を、複数の変換素子901で得られた信号に基づく両面入射画像と、複数の変換素子902で得られた信号に基づく片面入射画像とに分離する。 In step S921, the processor 241 converts the gain-corrected radiation image into a double-sided incident image based on signals obtained by the plurality of conversion elements 901 and a single-sided incidence image based on signals obtained by the plurality of conversion elements 902. To separate.
 図11を参照して、これらの2つの放射線画像について説明する。図11の左側の画像は、放射線撮像装置210から得られた放射線画像、すなわち変換素子901からの信号と変換素子902からの信号との両方に基づく画像である。この画像において、ハッチングなしの画素が変換素子901に対応し、ハッチングありの画素が変換素子902に対応する。プロセッサ241は、この放射線画像を、図11の右側に示すように、複数の変換素子901で得られた信号に基づく両面入射画像(上側)と、複数の変換素子902で得られた信号に基づく片面入射画像(下側)とに分離する。両側入射画像は、放射線撮像装置210に入射した放射線のうち高エネルギー及び低エネルギーの情報を含む画像である。片側入射画像は、低エネルギーの情報を含み高エネルギーの情報を含まない画像である。これに代えて、片側入射画像は、高エネルギーの情報を含み低エネルギーの情報を含まない画像であってもよい。両側入射画像では変換素子902に対応する画素が補正対象画素となり、片側入射画像では変換素子901に対応する画素が補正対象画素となる。両側入射画像に含まれる補正対象画素の個数は、片側入射画像に含まれる補正対象画素の個数よりも少ない。 These two radiation images will be described with reference to FIG. The image on the left side of FIG. 11 is a radiation image obtained from the radiation imaging apparatus 210, that is, an image based on both the signal from the conversion element 901 and the signal from the conversion element 902. In this image, pixels without hatching correspond to the conversion element 901, and pixels with hatching correspond to the conversion element 902. The processor 241 uses the radiation image based on the double-sided incident image (upper side) based on the signals obtained by the plurality of conversion elements 901 and the signals obtained by the plurality of conversion elements 902, as shown on the right side of FIG. Separated into a single-sided incident image (lower side). The both-side incident image is an image including high energy and low energy information among the radiation incident on the radiation imaging apparatus 210. The one-side incident image is an image including low energy information and not including high energy information. Alternatively, the one-side incident image may be an image that includes high energy information and does not include low energy information. In the both-side incident image, the pixel corresponding to the conversion element 902 is the correction target pixel, and in the one-side incident image, the pixel corresponding to the conversion element 901 is the correction target pixel. The number of correction target pixels included in the both-side incident image is smaller than the number of correction target pixels included in the one-side incident image.
 続いて、プロセッサ241は、補正対象画素の個数が少ない両側入射画像の補正対象画素の補正を行い、その後に、片側入射画像の補正対象画素の補正を行う。プロセッサ241は、ステップS922~S924で、図5のステップS916~S918と同様にして、両側入射画像の補正対象画素の補正を行う。 Subsequently, the processor 241 corrects the correction target pixels of the double-side incident image with a small number of correction target pixels, and thereafter corrects the correction target pixels of the one-side incident image. In steps S922 to S924, the processor 241 corrects the correction target pixels of the both-side incident image in the same manner as steps S916 to S918 in FIG.
 続いて、プロセッサ241は、ステップS925で、片側入射画像の補正対象画素の補正を行う。図11の片側入射画像の補正対象画素である画素qの画素値を決定する場合について説明する。片側入射画像において、画素qの周囲には有意な画素値を有する画素が少ないので、各方向の優先度を精度よく算出することが困難である。そのため、プロセッサ241は、両側入射画像を用いて各方向の優先度を算出する。 Subsequently, in step S925, the processor 241 corrects the correction target pixel of the one-side incident image. A case where the pixel value of the pixel q that is the correction target pixel of the one-side incident image of FIG. 11 is determined will be described. In the one-side incident image, since there are few pixels having a significant pixel value around the pixel q, it is difficult to accurately calculate the priority in each direction. Therefore, the processor 241 calculates the priority in each direction using the both-side incident images.
 具体的に、プロセッサ241は、ステップS926で、片側入射画像の画素qと同じ位置にある両側入射画像の画素fについて、両側入射画像の画素fの周囲にある画素の画素値を用いて各方向の優先度を算出する。優先度の算出は第1実施形態と同様に行われてもよく、例えば以下の式に従って行われる。 Specifically, in step S926, the processor 241 uses the pixel values of the pixels around the pixel f of the double-side incident image for each pixel f of the double-side incident image at the same position as the pixel q of the single-side incident image. The priority of is calculated. The calculation of the priority may be performed in the same manner as in the first embodiment, for example, according to the following formula.
  X=|a-2×b+c|+|e-2×f+g|+|i-2×j+k|
  Y=|a-2×e+i|+|b-2×f+j|+|c-2×g+k|
ここで、画素eの画素値はステップS924で決定された値である。
X = | a−2 × b + c | + | e−2 × f + g | + | i−2 × j + k |
Y = | a−2 × e + i | + | b−2 × f + j | + | c−2 × g + k |
Here, the pixel value of the pixel e is the value determined in step S924.
 続いて、プロセッサ241は、ステップS927で、算出された優先度を用いて補正対象画素の画素値を決定する。画素値の決定は第2実施形態と同様に行われてもよく、例えば以下の式に従って行われる。 Subsequently, in step S927, the processor 241 determines the pixel value of the correction target pixel using the calculated priority. The pixel value may be determined in the same manner as in the second embodiment, for example, according to the following formula.
 q=α×(t+u)/2+β×(r+s)/2
上述の通り、重みα、βは、α+β=1を満たし、優先度X、Yの大小関係と一致する値である。
q = α × (t + u) / 2 + β × (r + s) / 2
As described above, the weights α and β are values that satisfy α + β = 1 and coincide with the magnitude relationship between the priorities X and Y.
 その後、プロセッサ241は、S928で、補正後の両側入射画像及び片側入射画像を用いてエネルギーサブトラクション処理を行う。 After that, the processor 241 performs energy subtraction processing using the corrected double-side incident image and single-side incident image in S928.
 以上、本発明に係る実施形態を示したが、本発明はこれらの実施形態に限定されないことはいうまでもなく、本発明の要旨を逸脱しない範囲で、上述した実施形態は適宜変更、組み合わせが可能である。 As mentioned above, although embodiment which concerns on this invention was shown, it cannot be overemphasized that this invention is not limited to these embodiment, In the range which does not deviate from the summary of this invention, embodiment mentioned above can be changed and combined suitably. Is possible.
(その他の実施例)
 本発明は、上述の実施形態の1以上の機能を実現するプログラムを、ネットワーク又は記憶媒体を介してシステム又は装置に供給し、そのシステム又は装置のコンピュータにおける1つ以上のプロセッサーがプログラムを読出し実行する処理でも実現可能である。また、1以上の機能を実現する回路(例えば、ASIC)によっても実現可能である。
(Other examples)
The present invention supplies a program that realizes one or more functions of the above-described embodiments to a system or apparatus via a network or a storage medium, and one or more processors in a computer of the system or apparatus read and execute the program This process can be realized. It can also be realized by a circuit (for example, ASIC) that realizes one or more functions.
 本発明は上記実施の形態に制限されるものではなく、本発明の精神及び範囲から離脱することなく、様々な変更及び変形が可能である。従って、本発明の範囲を公にするために、以下の請求項を添付する。 The present invention is not limited to the above embodiment, and various changes and modifications can be made without departing from the spirit and scope of the present invention. Therefore, in order to make the scope of the present invention public, the following claims are attached.
 本願は、2018年2月2日提出の日本国特許出願特願2018-017576を基礎として優先権を主張するものであり、その記載内容の全てを、ここに援用する。 This application claims priority on the basis of Japanese Patent Application No. 2018-017576 filed on Feb. 2, 2018, the entire contents of which are incorporated herein by reference.

Claims (10)

  1.  画像処理装置であって、
     補正対象画素を含む放射線画像を取得する取得手段と、
     前記補正対象画素について、互いに交差する2つの方向のそれぞれの優先度を算出する算出手段と、
     前記補正対象画素に対して前記優先度が高い方向にある画素の画素値に大きい重みを割り当て、前記補正対象画素に対して前記優先度が低い方向にある画素の画素値に小さい重みを割り当てることによって、前記補正対象画素の画素値を決定する決定手段とを備え、
     前記算出手段は、前記2つの方向のそれぞれの前記優先度の算出において、前記2つの方向のうち算出対象の方向を第1方向とし、他方の方向を第2方向とした場合に、前記補正対象画素に隣接した第1画素と、前記第1方向において前記第1画素に隣接した第2画素と、前記補正対象画素を通り前記第2方向に延びる直線に対して前記第1画素又は前記第2画素の反対側にある第3画素とを含む複数の画素の画素値を用いることを特徴とする画像処理装置。
    An image processing apparatus,
    An acquisition means for acquiring a radiographic image including a correction target pixel;
    Calculation means for calculating the priority of each of the two directions intersecting each other with respect to the correction target pixel;
    A large weight is assigned to the pixel value of the pixel in the higher priority direction for the correction target pixel, and a small weight is assigned to the pixel value of the pixel in the lower priority direction for the correction target pixel. Determining means for determining a pixel value of the correction target pixel,
    In the calculation of the priority in each of the two directions, the calculation unit is configured to correct the correction target when the direction of the calculation target is the first direction and the other direction is the second direction. A first pixel adjacent to the pixel; a second pixel adjacent to the first pixel in the first direction; and the first pixel or the second with respect to a straight line passing through the correction target pixel and extending in the second direction. An image processing apparatus using pixel values of a plurality of pixels including a third pixel on the opposite side of the pixel.
  2.  前記第1画素は、前記第1方向において前記補正対象画素に隣接することを特徴とする請求項1に記載の画像処理装置。 The image processing apparatus according to claim 1, wherein the first pixel is adjacent to the correction target pixel in the first direction.
  3.  前記第1画素は、前記第2方向において前記補正対象画素に隣接することを特徴とする請求項1に記載の画像処理装置。 The image processing apparatus according to claim 1, wherein the first pixel is adjacent to the correction target pixel in the second direction.
  4.  前記算出手段は、前記複数の画素の画素値の標準偏差と、差分絶対値と、曲率との少なくとも何れかに基づいて前記優先度を算出することを特徴とする請求項1乃至3の何れか1項に記載の画像処理装置。 4. The calculation unit according to claim 1, wherein the calculation unit calculates the priority based on at least one of a standard deviation, a difference absolute value, and a curvature of pixel values of the plurality of pixels. The image processing apparatus according to item 1.
  5.  前記取得手段は、第1放射線画像及び第2放射線画像を取得し、
     前記算出手段は、前記第2放射線画像について、前記第1放射線画像を用いて前記優先度を算出し、
     前記決定手段は、前記第1放射線画像を用いて算出された前記優先度を用いて前記第2放射線画像の補正対象画素の画素値を決定することを特徴とする請求項1乃至4の何れか1項に記載の画像処理装置。
    The acquisition means acquires a first radiation image and a second radiation image,
    The calculation means calculates the priority for the second radiographic image using the first radiographic image,
    5. The determination unit according to claim 1, wherein the determination unit determines a pixel value of a correction target pixel of the second radiographic image using the priority calculated using the first radiographic image. The image processing apparatus according to item 1.
  6.  前記第1放射線画像に含まれる補正対象画素の個数は、前記第2放射線画像に含まれる補正対象画素の個数よりも少ないことを特徴とする請求項5に記載の画像処理装置。 6. The image processing apparatus according to claim 5, wherein the number of correction target pixels included in the first radiation image is smaller than the number of correction target pixels included in the second radiation image.
  7.  前記第1放射線画像は、放射線撮像装置に入射した放射線のうち第1エネルギー及び第2エネルギーの情報を含む画像であり、
     前記第2放射線画像は、前記第1エネルギーの情報を含み前記第2エネルギーの情報を含まない画像であることを特徴とする請求項5又は6に記載の画像処理装置。
    The first radiation image is an image including information on the first energy and the second energy among the radiation incident on the radiation imaging apparatus,
    The image processing apparatus according to claim 5, wherein the second radiation image is an image that includes the information of the first energy and does not include the information of the second energy.
  8.  前記放射線撮像装置は、
      複数の第1変換素子及び複数の第2変換素子を有する基板と、
      前記基板を挟むように配された第1シンチレータ層及び第2シンチレータ層と、
      前記複数の第2変換素子のそれぞれと前記第1シンチレータ層との間に配された遮光層とを備え、
     前記複数の第1変換素子は、前記第1シンチレータ層で発生した光と前記第2シンチレータ層で発生した光とを受け、
     前記複数の第2変換素子は、前記第2シンチレータ層で発生した光を受け、
     前記第1放射線画像は前記複数の第1変換素子で得られた信号に基づいて生成され、
     前記第2放射線画像は前記複数の第2変換素子で得られた信号に基づいて生成されることを特徴とする請求項7に記載の画像処理装置。
    The radiation imaging apparatus includes:
    A substrate having a plurality of first conversion elements and a plurality of second conversion elements;
    A first scintillator layer and a second scintillator layer arranged to sandwich the substrate;
    A light shielding layer disposed between each of the plurality of second conversion elements and the first scintillator layer,
    The plurality of first conversion elements receive light generated in the first scintillator layer and light generated in the second scintillator layer,
    The plurality of second conversion elements receive light generated in the second scintillator layer,
    The first radiation image is generated based on signals obtained by the plurality of first conversion elements,
    The image processing apparatus according to claim 7, wherein the second radiation image is generated based on signals obtained by the plurality of second conversion elements.
  9.  画像処理方法であって、
     取得手段が、補正対象画素を含む放射線画像を取得する取得工程と、
     算出手段が、前記補正対象画素について、互いに交差する2つの方向のそれぞれの優先度を算出する算出工程と、
     決定手段が、前記補正対象画素に対して前記優先度が高い方向にある画素の画素値に大きい重みを割り当て、前記補正対象画素に対して前記優先度が低い方向にある画素の画素値に小さい重みを割り当てることによって、前記補正対象画素の画素値を決定する決定工程とを有し、
     前記2つの方向のそれぞれの前記優先度の算出において、前記2つの方向のうち算出対象の方向を第1方向とし、他方の方向を第2方向とした場合に、前記補正対象画素に隣接した第1画素と、前記第1方向において前記第1画素に隣接した第2画素と、前記補正対象画素を通り前記第2方向に延びる直線に対して前記第1画素又は前記第2画素の反対側にある第3画素とを含む複数の画素の画素値を用いることを特徴とする画像処理方法。
    An image processing method comprising:
    An acquisition step in which an acquisition unit acquires a radiation image including a correction target pixel;
    A calculating step in which the calculation means calculates the priority of each of the two directions intersecting each other with respect to the correction target pixel;
    The determination unit assigns a large weight to the pixel value of the pixel in the higher priority direction with respect to the correction target pixel, and decreases the pixel value of the pixel in the lower priority direction of the correction target pixel. Determining a pixel value of the correction target pixel by assigning a weight; and
    In the calculation of the priority in each of the two directions, when the direction to be calculated is the first direction and the other direction is the second direction, the second direction adjacent to the correction target pixel. One pixel, a second pixel adjacent to the first pixel in the first direction, and a line extending through the correction target pixel in the second direction on the opposite side of the first pixel or the second pixel An image processing method using pixel values of a plurality of pixels including a third pixel.
  10.  コンピュータを、請求項1乃至8の何れか1項に記載の画像処理装置の各手段として機能させるためのプログラム。 A program for causing a computer to function as each unit of the image processing apparatus according to any one of claims 1 to 8.
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Citations (3)

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JP2003116060A (en) * 2001-10-03 2003-04-18 Olympus Optical Co Ltd Correcting device for defective picture element
JP2008022520A (en) * 2006-03-16 2008-01-31 Canon Inc Imaging apparatus, its processing method and program

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002033964A (en) * 2000-05-24 2002-01-31 Hewlett Packard Co <Hp> Defective pixel correction method of digital image
JP2003116060A (en) * 2001-10-03 2003-04-18 Olympus Optical Co Ltd Correcting device for defective picture element
JP2008022520A (en) * 2006-03-16 2008-01-31 Canon Inc Imaging apparatus, its processing method and program

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