WO2019149031A1

WO2019149031A1 - Data processing method and apparatus applied to node system

Info

Publication number: WO2019149031A1
Application number: PCT/CN2019/070388
Authority: WO
Inventors: 程永波; 贺成洪; 兰可嘉
Original assignee: 华为技术有限公司
Priority date: 2018-01-30
Filing date: 2019-01-04
Publication date: 2019-08-08
Also published as: CN110098945A; CN110098945B

Abstract

Embodiments of the present application provide a data processing method and apparatus applied to a node system. The method comprises: a first node controller receives a data access request sent by a first node, and determines that first data is not managed by the first node controller; the first node controller sends a listening request to processors of all the nodes connected to a second node; the first node controller receives a listening response, with regard to the first data, sent by a first target processor, the first target processor being the processor, in the processors of all the nodes connected to the second node, caching the first data; and the first node controller obtains, according to the state of the first data in the listening response, the first data and sends the first data to the first node. According to the present solution, when a fault occurs to a second node controller, by transferring a service to a first node controller on another NC plane for processing, and carrying out broadcast listening, the system can still process data normally without going down.

Description

Data processing method and device applied to node system

Technical field

The present application relates to the field of electronic technologies, and in particular, to a data processing method and apparatus applied to a node system.

Background technique

In the Cache Coherence Non-Uniform Memory Access (CC-NUMA) system, which includes a plurality of nodes, since the expansion capability of the processor itself is limited, each of them needs to be The processor in the node is divided into multiples, and then the multi-processor is extended by the node controller (NC) to increase the number of processors processed in parallel and improve system performance. All the processors on each node can have consistent access to the memory of all the processors in the system. Because of the different delays of accessing the memory in the node and other remote nodes, it is called CC-NUMA system.

In a CC-NUMA system, a node consists of several processors interconnected by node controllers. However, a node controller has limited processing power and limited bandwidth. Therefore, in order to alleviate the bandwidth pressure, the two-node controller is often used for cross-node expansion, that is, two node controllers of one node are respectively connected with two node controllers of another node to form two NC planes, two The NC plane shares the load. However, the load sharing of the two planes here refers only to the performance load sharing. In fact, the two planes respectively process the services of their respective management scopes, and record the corresponding directory information, and there is no business intersection between them.

The problem with this scheme is that the two planes do not have each other's directory information. Therefore, if any one of the node controllers fails and the corresponding plane fails to work, the other plane cannot correctly handle the related services of the fault plane, which may result in The entire system is down.

Summary of the invention

The embodiment of the present application provides a data processing method and device applied to a node system, so as to solve the system downtime problem when any node controller fails.

In a first aspect, an embodiment of the present application provides a data processing method applied to a node system, where a node system includes multiple nodes, each of which includes two node controllers and at least one processor, where multiple nodes include a first node and a second node, the second node comprising a first node controller, comprising:

The first node controller receives a data access request sent by the first node, where the data access request is used to request to acquire the first data;

The first node controller determines that the first data is not managed by the first node controller;

The first node controller sends a interception request to a processor in all nodes connected to the second node, the interception request is used to indicate that the processor in all the nodes connected to the second node determines the first according to the type of the interception request The state of the data;

The first node controller receives a listening response sent by the first target processor for the first data, and the first target processor is a processor that caches the first data in a processor among all the nodes connected to the second node, The listening response for the first data includes a state of the first data;

The first node controller acquires the first data according to the state of the first data in the listening response;

The first node controller sends the first data to the first node.

In the technical solution, when the second node controller fails, the service processed by the NC plane where the second node controller is located is transferred to another NC plane where the first node controller is located, and broadcast listening is performed. This allows the system to still perform normal data processing without downtime.

In a first possible implementation manner of the first aspect, the state of the first data is an invalid state, and the listening response for the first data further includes the first data; The invalid state of the data gets the first data from the listening response.

In the technical solution, the state of the first data is an invalid state, and the first data is included in the listening response, indicating that the first node has been changed in the other nodes in the system, and then the first node controller needs to be updated. The first data is returned to the requesting party of the data access request, that is, the first node.

In a second possible implementation manner of the first aspect, the state of the first data is a shared state, and the first node controller obtains the first memory from the second node according to the shared state of the first data in the listening response. One data.

In the technical solution, the state of the first data is a shared state, and the listening response does not include the first data, indicating that the first data is not changed in other nodes in the system, so the first node controller only needs to be from the inside. The first node that retrieves the first data in the memory and returns it to the data access request is the first node.

In combination with the first aspect or the first to second possible implementation manners of the first aspect, in a third possible implementation manner of the first aspect, the type of the interception request includes a shared listening request or an exclusive listening request .

In a second aspect, an embodiment of the present application provides a data processing method applied to a node system, where a node system includes multiple nodes, each of which includes two node controllers and at least one processor, wherein multiple nodes include a second node, the second node comprising a second node controller, comprising:

The second node controller sends an exclusive listening request to the processor in all the nodes connected to the second node, the exclusive listening request is used to indicate the type of the processor in all the nodes connected to the second node according to the exclusive listening request Determining that the state of the second data is an invalid state;

The second node controller receives the exclusive listening response sent by the second target processor for the second data, and the processor of the second target processor and the second node connected to the second node is buffered with the second data. The listening response for the second data includes the state of the second data being an invalid state;

The second node controller determines that the data cache directory of the second data managed by the second node controller is in an invalid state, and the data cache directory of the second data is in an invalid state indicating the number of processors in all nodes connected to the second node The status of the two data is invalid.

In the technical solution, after the second node controller resumes working, sending the exclusive listening broadcast, the second data cached in all other nodes can be invalidated, and only the second data in the internal memory is Effective, thereby restoring control of the second data.

In a first possible implementation manner of the second aspect, the exclusive listening response further includes the second data; the second node controller further sends the second data to the internal memory of the second node, where the second data is used in the replacement The second data in the memory.

In the technical solution, the exclusive listening response includes the second data, indicating that the other node in the system has changed the second data, then the second node controller needs to replace the latest second data in the internal memory. Second data so that the latest second data is saved in the internal memory

With reference to the second aspect or the first possible implementation manner of the second aspect, in a second possible implementation manner of the second aspect, the multiple nodes further include a third node;

The second node controller receives a data access request sent by the third node, where the data access request is used to request to acquire the second data;

The second node controller sends a interception request to a processor in all nodes connected to the second node, the interception request is used to indicate that the processor in all the nodes connected to the second node determines the second according to the type of the interception request The state of the data;

The second node controller receives a listening response for the second data sent by the third target processor, and the processor of the second target processor and the second node connected to the second node is buffered with the second data, The listening response of the second data includes the state of the second data;

The second node controller acquires the second data according to the state of the second data in the listening response and sends the second data to the third node;

The second node controller records the state of the second data in a data cache directory of the second data.

In the technical solution, while the data cache directory is invalidated, the second node controller can also synchronously use the broadcast interception method to process the data access request, so that the system can also run normally before the directory invalidation is completed. .

In conjunction with the second possible implementation of the second aspect, in a third possible implementation of the second aspect, the second node controller sends a snoop request to the processor in all nodes connected to the second node The second node controller further receives an exclusive access request for the second data sent by the memory access controller; and then the second node controller sends the second data request to the second processor before the second node controller It is also determined that the memory scan end notification sent by the memory access controller is not received, and the memory scan end notification is used to indicate that the data cache directory of all data managed by the second node controller in the node memory of the second node controller is in an invalid state.

In this technical solution, the memory scan end notification is used to indicate that the data cache directory of all data managed by the second node controller in the node memory of the node to which the second node controller belongs is in an invalid state. That is, before the invalidation of the data cache directory is completed, the data access request needs to be processed in the manner of broadcast snooping. After the data cache directory is invalidated, the second node controller can be restored to the normal working state before the failure, and only needs to perform data processing according to the data cache directory recorded therein, without performing broadcast listening.

A third aspect of the present application provides a data processing apparatus applied to a node system. Includes cache coherency protocol processor, memory, and communication interface. The cache coherency protocol processor is coupled to the memory and communication interface, such as a cache coherency protocol processor that can be coupled to the memory and communication interface via a bus. The communication interface is used to communicate with other devices. The memory is used to store program code, directory data, and the like. The cache coherency protocol processor is operative to perform any of the possible implementations described in the above aspects or aspects.

The fourth aspect of the present application provides another data processing apparatus applied to a node system, including a processing module, a receiving module, and a sending module. The foregoing processing module is configured to implement the cache coherency protocol processor in the third aspect, where the receiving module and the sending module are used together to implement the communication interface in the third aspect. The data processing apparatus implements any of the possible implementations described in the above aspects or aspects by the above modules.

In a fifth aspect, the present application provides a computer program product comprising: computer program code, which, when run on a computer, causes the computer to perform the method of any of the above-described various aspects.

In a sixth aspect, the present application provides a computer readable medium storing program code that, when executed on a computer, causes the computer to perform the methods in the implementations of the various aspects described above.

DRAWINGS

In order to more clearly illustrate the technical solutions in the embodiments of the present application or the background art, the drawings to be used in the embodiments of the present application or the background art will be described below.

1 is a schematic structural diagram of a data processing system applied to a node system according to an embodiment of the present application;

2 is a schematic flowchart of a data processing method applied to a node system according to an embodiment of the present application;

3 is a schematic flowchart of another data processing method applied to a node system according to an embodiment of the present application;

4 is a system structural diagram of a data processing system applied to a node system according to an embodiment of the present application;

FIG. 5 is a schematic structural diagram of a data processing apparatus applied to a node system according to an embodiment of the present application; FIG.

6 is a schematic structural diagram of another data processing apparatus applied to a node system according to an embodiment of the present application;

FIG. 7 is a schematic structural diagram of another data processing apparatus applied to a node system according to an embodiment of the present disclosure;

FIG. 8 is a schematic structural diagram of another data processing apparatus applied to a node system according to an embodiment of the present application.

Detailed ways

The embodiments of the present application are described below in conjunction with the accompanying drawings in the embodiments of the present application.

Referring to FIG. 1 , FIG. 1 is a schematic structural diagram of a data processing system applied to a node system according to an embodiment of the present disclosure. The nodes in the embodiments of the present application may include a server, a personal computer, an access network device, and a core network device. Such as various types of terminal equipment or communication equipment, the node system is an interconnected system composed of multiple nodes connected to each other. The data processing system includes a plurality of nodes (FIG. 1 shows node 10 and node 20), wherein each node includes a plurality of processors (FIG. 1 shows that node 10 includes processor 101 and processor 102, node 20 A processor 201 and a processor 202) and two node controllers are included (FIG. 1 shows that node 10 includes node controller 103 and node controller 104, and node 20 includes node controller 203 and node controller 204). Further, each processor of the node has a corresponding extended internal memory (for example, the internal memory 105 corresponding to the processor 101, the internal memory 106 corresponding to the processor 102, the internal memory 205 corresponding to the processor 201, and the corresponding to the processor 202. Internal memory 206). Among them, each processor also includes its own cache cache. The two node controllers of each node jointly manage multiple processors in the node and share the load.

In the data processing system of the embodiment of the present application, two node controllers of each node are respectively connected to two node controllers of another node to form two NC planes, and the two NC planes share the load. For example, the node controller 103 in the node 10 in FIG. 1 is connected to the node controller 203 in the node 20 to form an NC plane 00; the node controller 104 in the node 10 is connected to the node controller 204 in the node 20. Form another NC plane 01.

Taking the two NC planes 00 and 01 between the node 10 and the node 20 as an example, the plane 00 may be responsible for routing and processing a part of the services on the plurality of processors included in the node 10, and the plane 01 may be responsible for routing and processing the nodes 10 included. Another portion of the traffic on the plurality of processors; accordingly, plane 00 may also be responsible for routing and processing a portion of the traffic on the plurality of processors included in node 20, and plane 01 may also be responsible for routing and processing multiple processors included in node 20 Another part of the business.

In the data processing system of the embodiment of the present application, all processors on each node can perform consistent access to the internal memory of all processors in the system. In order to ensure the consistency of data access across nodes, a data cache directory (Directory) is stored in each node, and the data in the node is recorded by the processor of other nodes, including the state of the recorded data. And location. The data cache directory can be stored in a separate entity, in a node controller, or in other entities mentioned above.

For example, if the processor 101 of the node 10 caches data in the internal memory 205 corresponding to the processor 201 of the node 20, the node 20 records the data in the data cache directory by the processor 101 in the node 10 or the node 10. Cache and mark the state of the data as shared or exclusive. The shared state means that the data is in a readable state and is not modified by the node 20, and other nodes can share the data; the exclusive state means that the data can only be exclusively occupied by the node 20, and data modification may occur when monopolized. In order to ensure data consistency, other nodes cannot share the data at the same time.

It should be noted that the data processing system in the embodiment of the present application belongs to a dual NC plane processing system, and each of the two NC planes in each node processes a part of the services it is responsible for and records in the corresponding data cache directory, that is, two. The services between the NC planes are independent and do not produce an intersection. Therefore, the corresponding node controller on one NC plane does not have a data cache directory of the service processed by another NC plane.

The embodiment of the present application is applicable to a scenario in which a node controller in a certain node fails but the system is not down, and the method for processing the data of the node controller that has not failed in the scenario and the faulty node are described. The method of processing data after the controller is re-worked and the method of rebuilding the directory.

Referring to FIG. 2, FIG. 2 is a schematic flowchart diagram of a data processing method applied to a node system according to an embodiment of the present application. The method includes but is not limited to the following steps:

With reference to the system structure diagram of FIG. 4, in the scenario of the embodiment of the present application, first, the second node controller in the second node fails, the administrator starts the hot removal process, and the system enters silence (ie, all processes are suspended. In the state, all services that should be processed by the NC plane 01 where the second node controller is located are configured to be processed by the NC plane 00 where the first node controller is located, thereby executing S201-S206.

S201. The first node sends a data access request to the first node controller of the second node.

The first data is stored in the internal memory of the second node, and when the first processor of the first node wishes to cache the first data, thereby performing a read/write operation on the first data, a data access request for the first data is sent. The data access request is used to request to acquire the first data. The address information of the first data may be carried to indicate that the first data corresponding to the address information is desired to be obtained.

The data access request sent by the first node may be transparently transmitted by the first processor in the first node to the first node controller through the third node controller, that is, the third node controller does not parse the data for the first data. The access request; the data access request sent by the first node may also be sent by the first processor to the third node controller, and the third node controller performs the operation of changing the destination address after the parsing, and the first data is managed. A node controller sent.

In the embodiment of the present application, the service of the first data is originally performed by the NC plane 01, and the first processor should send a data access request for the first data to the fourth node controller and route to the second through the NC plane 01. The second node controller of the node is processed by the second node controller according to the data cache directory. However, due to the failure of the second node controller, all services on the NC plane 01 are configured to be processed by the NC plane 00. Therefore, the first processor sends a data access request for the first data to the third node controller. And routing to the first node controller of the second node through the NC plane 00, and processing by the first node controller. For example, the original NC plane 00 handles the data service with the last bit of all routing addresses being 0, and the NC plane 01 handles the data service with the last bit of all routing addresses being 1; however, because the second node controller fails, the routing The data service whose last bit of the address is 0 is also configured to be processed by NC plane 01. S202. The first node controller determines that the first data is not managed by the first node controller.

Since in the dual NC system, the two node controllers of each node share the load, the first node controller stores the address information of the part of the data that is responsible for management, and the corresponding data cache directory exists.

After receiving the data access request, the first node controller may determine, according to the address information of the first data, whether the first data is managed by itself. If it is managed by itself, the first node controller processes the data access request according to the data cache directory corresponding to the first data; if not managed by itself, the first node controller needs to adopt broadcast listening The method is processed, that is, S203 is executed.

S203. The first node controller sends a interception request to a processor in all nodes connected to the second node.

In the embodiment of the present application, the processors in all the nodes connected to the second node are all the processors in all other nodes except the second node in the system. That is, the first node controller initiates a broadcast snoop in the system. The interception request is for indicating that the processor in all nodes connected to the second node determines the state of the first data according to the type of the interception request.

Different data access requests correspond to different listening requests. For example, when the data access request indicates that it is desired to share the first data, that is, the first data is not modified, the type of the interception request issued by the first node controller is a shared listening request; when the data access request is for the first data Indicates that it is possible to monopolize the first data, that is, it is possible to modify the first data, and then the type of the interception request issued by the first node controller is an exclusive listening request.

S204. The processor in all nodes connected to the second node determines the state of the first data according to the type of the interception request.

After receiving the snooping request, the processor in the node connected to the second node may first query whether the first data is cached by itself. If the first data is not cached, the listening response that the first data does not exist may be fed back. If the first data is cached, the current state of the first data may be acquired, and then the state of the first data is determined in conjunction with the type of the interception request.

If the type of the interception request is a shared listening request, the processor in all the nodes connected to the second node determines that the state of the first data is the shared state according to the listening request and the current state of the first data. That is, if the interception request is a shared listening request, it may indicate that there is currently another processor that wishes to share the first data, and the first data cached in the processor in all nodes connected to the second node at this time is currently If the state is a shared state, then the user does not need to change and continues to be in the shared state; at this time, if the current state of the first data cached in the processor in all the nodes connected to the second node is exclusive, then the exclusive state needs to be monopolized. The state is changed to the shared state to support other processors to share the first data. After changing to the shared state, the processor in all nodes connected to the second node cannot modify the first data.

If the type of the interception request is an exclusive listening request, the processor in all nodes connected to the second node determines that the state of the first data is an invalid state according to the listening request and the current state of the first data. That is to say, if the interception request is an exclusive listening request, it may indicate that there are other processors currently wishing to monopolize the first data, and the first data cached in the processor in all the nodes connected to the second node is currently current. The state, whether it is a shared state or an exclusive state, needs to be modified to an invalid state, that is, the processor in all the nodes connected to the second node is no longer able to read/write the first data, and if it is necessary to read/write the first data, Then you need to request again from the first node controller.

S205. The first target processor sends a listening response for the first data to the first node controller.

The first target processor is a processor in which a first data is cached in a processor among all nodes connected to the second node. The first target processor, after determining the state of the first data, transmits a listening response for the first data to the first node controller. Wherein, the listening response for the first data includes the status of the first data.

It should be noted that, among the processors in all the nodes connected to the second node, the processor that caches the first data may also send a listening response to the first node controller, but the listening response is used to indicate The first data does not exist.

Optionally, if the current state of the first data in the first target processor is an exclusive state, determining that the state of the first data is an invalid state, the listening response for the first data further includes: buffering in the first target processor The first data. That is, it is possible for the first target processor to modify the first data, and then the first target processor needs to return its latest first data to the first node controller.

S206. The first node controller acquires the first data according to the state of the first data in the listening response.

If the state of the first data in the listening response for the first data is an invalid state, and further includes the first data, that is, the latest data in the listening response, the first node controller directly responds from the interception Get the first data.

If the state of the first data in the listening response for the first data is a shared state, not including the first data, that is, the first target processor is sharing the first data, and the first data is not modified, then the first node controller The first data can be obtained from the internal memory of the second node.

Optionally, the first node controller may not record the data cache directory of the first data because the part of the service of the second node controller is temporarily processed.

S207. The first node controller sends the first data to the first node.

According to the two implementation scenarios described in S206, the first node controller may acquire the first data from the listening response sent by the first target processor or the internal memory of the second node, and then send the first data to the first node. In response to a data access request. Corresponding to S201, sending the first data to the first node may be transparently transmitted to the first processor by the third node controller, or may be sent to the third node controller first, and the third node controller parses the target data. An operation such as a change in address, sent to the first processor.

In this way, when the second node controller of the second node fails, the service processed by the NC plane where the second node controller is located is transferred to another NC plane for processing and broadcast listening, so that the system can still perform normally. Data processing without downtime.

FIG. 3 is a schematic flowchart diagram of another data processing method applied to a node system according to an embodiment of the present application. The method includes but is not limited to the following steps:

In combination with the system structure diagram of FIG. 4, after the second node replaces the new second node controller, the administrator initiates the hot add process, and the system enters a silent state, which should be processed by the NC plane 01 where the second node controller is located. All service recovery configurations are still processed by NC plane 01, thereby executing S301-S314.

S301. The second node controller sends an exclusive listening request to a processor in all nodes connected to the second node.

In the embodiment of the present application, the processors in all the nodes connected to the second node are all the processors in all other nodes except the second node in the system. That is to say, after the new second node controller is replaced, the second node controller initiates broadcast exclusive listening in the system. The exclusive listening request is for indicating that the processor in all the nodes connected to the second node determines that the state of the second data is an invalid state according to the type of the exclusive listening request.

Optionally, S300 can also be included before S301:

S300. The memory access controller sends an exclusive access request for the second data to the second node controller.

After the hot add process is started, the DMA (Direct Memory Access) controller may start to traverse all the address information managed by the second node controller, and respectively send each address information for the management of the second node controller. An exclusive access request for the data to trigger the second node controller to broadcast an exclusive listening request for data corresponding to each address information it manages. Here, taking the second data as an example, when the memory access controller acquires the address information of the second data, the exclusive access request for the second data is sent to the second node controller to trigger the second node controller to execute S301. After the broadcast exclusive listening for the second data ends, the memory access controller can then read the next data and trigger a broadcast exclusive listening process for the data until the memory access controller manages the second node controller. All address information traversal ends.

S302. The processor in all nodes connected to the second node determines that the state of the second data is an invalid state according to the type of the exclusive listening request.

The purpose of the exclusive listening request is to enable the first data cached in the processors in all the nodes connected to the second node to be in an invalid state, that is, all connected to the second node. The processor in the node is no longer able to read/write the first data.

S303. The second target processor sends an exclusive listening response for the second data to the second node controller.

The second target processor is a processor in which a second data is cached in a processor among all nodes connected to the second node. The second target processor, after determining the state of the second data, transmits an exclusive listening response for the second data to the second node controller. The listening response for the second data includes the state of the second data being an invalid state.

It should be noted that, among the processors in all the nodes connected to the second node, the processor that caches the second data may also send an exclusive listening response to the second node controller, but the exclusive listening response is used in the exclusive listening response. Indicates that the second data does not exist.

S304. The second node controller determines that the data cache directory of the second data managed by the second node controller is in an invalid state.

The data cache directory of the second data is in an invalid state indicating that the state of the second data in the second processor is an invalid state. That is, the second node controller invalidates the second data cached in all other nodes, and only the second data stored in its own internal memory is valid, thereby restoring the control of the second data.

Optionally, if the current state of the second data in the second target processor is an exclusive state, the exclusive listening response for the second data further includes the second data cached in the second target processor, and the S303 further includes :

S305. The second node controller sends the second data to the internal memory of the second node.

The second data in the exclusive listening response is used to replace the second data in the internal memory, that is, to store the latest second data in the internal memory of the second node.

Further, while the data cache directory of the second data is in an invalid state, if the processor of the other node (for example, the third node shown in FIG. 3) receives the data access request for the second data, the second node The controller executes S306-S313.

S306. The third node sends a data access request to the second node controller of the second node.

A data access request is used to request acquisition of the second data.

For the specific implementation method of S306, refer to S201, and details are not described herein again.

S308. The second node controller sends a interception request to a processor in all nodes connected to the second node.

For the specific implementation method of S308, refer to S203, and details are not described herein again.

Optionally, if the second node controller receives the exclusive access request for the second data sent by the memory access controller, that is, executing S300, the S308 may further include S307:

S307. The second node controller determines that the memory scan end notification sent by the memory access controller is not received.

The memory scan end notification is used to notify the second node controller that the data corresponding to each address information managed by the second node controller has been traversed and broadcast exclusive operation, that is, the memory of the node to which the second node controller belongs is indicated. The data cache directory of all data managed by the two-node controller is invalid.

After the second node controller receives the memory scan end notification sent by the memory access controller, the data processing is performed according to the data cache directory, and no broadcast snooping is performed. Therefore, before performing broadcast snooping in S308, it is necessary to confirm The memory scan end notification was not received.

S309. The processor in all nodes connected to the second node determines the state of the second data according to the type of the interception request.

S310. The third target processor sends a listening response for the second data to the second node controller.

A processor of the second data is cached in a processor of all nodes connected to the second node by the third target processor. For the specific implementation method of S309-S310, refer to S204-S205, and details are not described herein again.

S311. The second node controller acquires the second data according to the state of the second data in the listening response.

S312. The second node controller sends the second data to the third node.

For specific implementation methods of S311-S312, refer to S206-S207, and details are not described herein again.

S313. The second node controller records the state of the second data in a data cache directory of the second data.

After processing the data access request for the second data, the second node controller records the state of the second data in the data cache directory of the second data. That is, the second node controller records the states of the nodes in which the second data is cached based on the feedback response of the feedback, and the state of the second data in the processors. For example, if the listening response returned by the processor 123 of a certain node A includes the state in which the second data is intercepted as the shared state, then the second node controller records "node A" in the data cache directory of the second data. Processor 123, shared state."

In this way, while the data cache directory is invalidated, the second node controller can also synchronously use the broadcast interception method to process the data access request, so that the system can also run normally before the directory invalidation is completed.

It should be noted that S301-S305 and S306-S313 can be executed at the same time without prioritization.

S314. When it is determined that the data cache directory invalid state of all data managed by the second node controller is completed, the second node controller performs data processing according to the data cache directory.

The data cache directory of all the data managed by the second node controller is in an invalid state, that is, the data cache directory of all the data managed by the second node controller is invalid, and then the second node controller performs data according to the data cache directory. The data processing method for performing broadcast snooping is not performed again in S306-S313.

Optionally, if the second node controller receives the exclusive access request for the second data sent by the memory access controller, that is, executing S300, the second node controller determines that the data cache directory of all data managed by the node is invalid. The method may be: receiving a memory scan end notification sent by the memory access controller, indicating that the data cache directory of all data managed by the second node controller in the node memory of the second node controller is in an invalid state.

Thus, after the data cache directory is invalidated, the second node controller can be restored to the normal working state before the failure, and only needs to perform data processing according to the data cache directory recorded therein, without performing broadcast listening.

The solution provided by the embodiment of the present application is mainly introduced from the perspective of interaction between different network elements. It can be understood that the data processing device applied to the node system includes hardware structures and/or software modules corresponding to the execution of the respective functions in order to implement the above functions. The embodiments of the present application can be implemented in a combination of hardware or hardware and computer software in combination with the elements of the examples and algorithm steps described in the embodiments disclosed in the application. Whether a function is implemented in hardware or computer software to drive hardware depends on the specific application and design constraints of the solution. A person skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the technical solutions of the embodiments of the present application.

The embodiment of the present application may perform the division of the function module or the function unit corresponding to the data processing device for the node system according to the above method example. For example, each function module or function unit may be divided according to each function, or two or more may be divided. The functionality is integrated in a processing module or processing unit. The above integrated modules or units can be implemented in the form of hardware or in the form of software functional modules. It should be noted that the division of modules or units in the embodiments of the present application is schematic, and is only a logical function division. In actual implementation, there may be another division manner. Please see the specifics below.

Please refer to FIG. 5. FIG. 5 is a schematic structural diagram of a data processing apparatus applied to a node system according to an embodiment of the present application. The apparatus can be used to implement the first node controller of the embodiment shown in Figure 2 above. As shown in Figure 5, the device includes:

The receiving module 501 is configured to receive a data access request sent by the first node, where the data access request is used to request to acquire the first data;

The processing module 502 determines that the first data is not managed by the first node controller;

a sending module 503, configured to send a listening request to a processor in all nodes connected to the second node, where the listening request is used to indicate a processor in all nodes connected to the second node Determining a state of the first data according to a type of the interception request;

The receiving module 501 is further configured to: receive a listening response sent by the first target processor for the first data, where the first target processor is a processor in all nodes connected to the second node a processor that caches the first data, the listening response for the first data includes a state of the first data;

The processing module 502 is further configured to: acquire the first data according to a state of the first data in the listening response;

The sending module 503 is further configured to: send the first data to the first node.

Optionally, the state of the first data is an invalid state, and the listening response for the first data further includes the first data;

The processing module 502 is configured to: acquire the first data from the listening response according to the invalid state of the first data in the listening response.

Optionally, the state of the first data is a shared state, and the processing module 502 is configured to:

Obtaining the first data from an internal memory of the second node according to the shared state of the first data in the listening response.

Optionally, the type of the listening request includes a shared listening request or an exclusive listening request.

The data processing apparatus applied to the node system in the above-described embodiment shown in Fig. 5 can be realized by the data processing apparatus 600 applied to the node system shown in Fig. 6. FIG. 6 is a schematic structural diagram of another data processing apparatus applied to a node system according to an embodiment of the present application. The data processing apparatus 600 applied to the node system shown in FIG. 6 includes: a cache coherency protocol processor. 601 and communication interface 603, the cache coherency protocol processor 601 is configured to support information transmission between the data processing device 600 and other devices. The cache coherency protocol processor 601 and the communication interface 603 are communicatively coupled, such as by a bus. The data processing device 600 applied to the node system may also include a memory 602. The memory 602 is configured to store program code and directory data for execution by the data processing apparatus 600, and the cache coherency protocol processor 601 is configured to execute the application code stored in the memory 602 to implement the first node provided by the embodiment shown in FIG. The action of the controller.

The memory 602 may include a volatile memory such as a random access memory (RAM); the memory 602 may also include a non-volatile memory such as a read-only memory (read- Only memory, ROM), flash memory, hard disk drive (HDD) or solid-state drive (SSD); the memory 602 may also include a combination of the above types of memories.

Also provided in the embodiment of the present application is a computer storage medium, which can be used to store computer software instructions used by the first node controller in the embodiment shown in FIG. 2, and is configured to execute the first node in the foregoing embodiment. The program designed by the controller. The storage medium includes, but is not limited to, a flash memory, a hard disk, a solid state disk.

In the embodiment of the present application, a computer program product is also provided. When the computer product is run by the computing device, the data processing method applied to the node system designed for the first node controller in the foregoing embodiment of FIG. 2 may be executed.

Please refer to FIG. 7. FIG. 7 is a schematic structural diagram of another data processing apparatus applied to a node system according to an embodiment of the present application. The apparatus can be used to implement the second node controller of the embodiment shown in Figure 3 above. As shown in Figure 7, the device includes:

The sending module 701 is configured to send, to the processor in all the nodes connected to the second node, an exclusive listening request, where the exclusive listening request is used to indicate that all the nodes connected to the second node are The processor determines, according to the type of the exclusive listening request, that the state of the second data is an invalid state;

The receiving module 702 is configured to receive, by the second target processor, an exclusive listening response for the second data, where the second target processor is cached in a processor in all nodes connected to the second node. The processor of the second data, the listening response for the second data includes a state in which the second data is in an invalid state;

The processing module 703 is configured to determine that the data cache directory of the second data managed by the second node controller is in an invalid state, and the data cache directory of the second data is in an invalid state to indicate the second node The state of the second data in the processors in all of the connected nodes is in an invalid state.

Optionally, the exclusive listening response further includes the second data;

The sending module 701 is further configured to:

Transmitting the second data to an internal memory of the second node, the second data being used to replace the original second data in the internal memory.

Optionally, the multiple nodes further include a third node;

The receiving module 702 is further configured to: receive a data access request sent by the third node, where the data access request is used to request to acquire the second data;

The sending module 701 is further configured to: send a listening request to a processor in all nodes connected to the second node, where the listening request is used to indicate all nodes connected to the second node The processor determines a state of the second data according to a type of the interception request;

The receiving module 702 is further configured to: receive a listening response sent by the third target processor for the second data, where the third target processor is in a processor among all nodes connected to the second node a processor that caches the second data, the listening response for the second data including a state of the second data;

The processing module 703 is further configured to: acquire the second data according to a state of the second data in the listening response, and send the second data to the third node; in the second data The state of the second data is recorded in a data cache directory.

Optionally, the receiving module 702 is further configured to: receive, by the second node controller, the exclusive access request for the second data that is sent by the memory access controller;

The processing module 703 is further configured to: the second node controller determines that the memory scan end notification sent by the memory access controller is not received, and the memory scan end notification is used to indicate that the second node controller belongs to The data cache directory of all data managed by the second node controller in the node memory is in an invalid state.

The data processing apparatus applied to the node system in the above-described embodiment shown in FIG. 7 can be implemented by the data processing apparatus 800 applied to the node system shown in FIG. FIG. 8 is a schematic structural diagram of another data processing apparatus applied to a node system according to an embodiment of the present application. The data processing apparatus 800 applied to the node system shown in FIG. 8 includes: a cache coherency protocol processor. 801 and communication interface 803, the cache coherency protocol processor 801 is configured to support information transmission between the data processing device 800 and other devices. The cache coherency protocol processor 801 and the communication interface 803 are communicatively coupled, such as by a bus. The data processing device 800 applied to the node system may also include a memory 802. The memory 802 is configured to store program code and directory data for execution by the data processing apparatus 800, and the cache coherency protocol processor 801 is configured to execute the application code stored in the memory 802 to implement the second node provided by the embodiment shown in FIG. The action of the controller.

The memory 802 may include a volatile memory such as a random access memory (RAM); the memory 802 may also include a non-volatile memory such as a read-only memory (read- Only memory, ROM), flash memory, hard disk drive (HDD) or solid-state drive (SSD); the memory 802 may also include a combination of the above types of memory.

In the embodiment of the present application, a computer storage medium is provided, which can be used to store computer software instructions used by the second node controller in the embodiment shown in FIG. 3, and is configured to execute the second node in the foregoing embodiment. The program designed by the controller. The storage medium includes, but is not limited to, a flash memory, a hard disk, a solid state disk.

In the embodiment of the present application, a computer program product is also provided. When the computer product is executed by the computing device, the data processing method applied to the node system designed for the second node controller in the foregoing embodiment of FIG. 3 may be executed.

Claims

A data processing method applied to a node system, wherein the node system includes a plurality of nodes, each of which includes two node controllers and at least one processor, wherein the plurality of nodes includes the first a node and a second node, the second node includes a first node controller, and the method includes:

Receiving, by the first node controller, a data access request sent by the first node, where the data access request is used to request to acquire first data;

The first node controller determines that the first data is not managed by the first node controller;

The first node controller sends a interception request to a processor of all nodes connected to the second node, the interception request is used to indicate processing in all nodes connected to the second node Determining a state of the first data according to a type of the interception request;

The first node controller receives a listening response sent by the first target processor for the first data, and the first target processor is a cache in a processor among all nodes connected to the second node a processor having the first data, the listening response for the first data including a state of the first data;

The first node controller acquires the first data according to the state of the first data in the listening response;

The first node controller sends the first data to the first node.
The method of claim 1, wherein the state of the first data is an invalid state, and the listening response for the first data further comprises the first data;

The acquiring, by the first node controller, the first data according to the state of the first data in the listening response includes:

The first node controller acquires the first data from the listening response according to the invalid state of the first data in the listening response.
The method of claim 1, wherein the state of the first data is a shared state,

The acquiring, by the first node controller, the first data according to the state of the first data in the listening response includes:

The first node controller acquires the first data from an internal memory of the second node according to the shared state of the first data in the listening response.
The method according to any one of claims 1 to 3, wherein the type of the interception request comprises a shared listening request or an exclusive listening request.
A data processing method applied to a node system, wherein the node system includes a plurality of nodes, each of which includes two node controllers and at least one processor, wherein the plurality of nodes includes a second a node, the second node includes a second node controller, and the method includes:

The second node controller sends an exclusive listening request to a processor in all nodes connected to the second node, where the exclusive listening request is used to indicate all nodes connected to the second node The processor determines, according to the type of the exclusive listening request, that the state of the second data is an invalid state;

The second node controller receives an exclusive listening response sent by the second target processor for the second data, and the second target processor caches in a processor among all nodes connected to the second node a processor having the second data, the listening response for the second data including a state of the second data being an invalid state;

The second node controller determines that the data cache directory of the second data managed by the second node controller is in an invalid state, and the data cache directory of the second data is in an invalid state indicating the second and the second The state of the second data in the processor in all of the nodes connected by the node is in an invalid state.
The method of claim 5, wherein the exclusive listening response further comprises the second data;

The method further includes:

The second node controller sends the second data to an internal memory of the second node, where the second data is used to replace the original second data in the internal memory.
The method according to claim 5 or 6, wherein the plurality of nodes further comprise a third node;

The method further includes:

Receiving, by the second node controller, a data access request sent by the third node, where the data access request is used to request to acquire the second data;

The second node controller sends a interception request to a processor of all nodes connected to the second node, the interception request is used to indicate processing in all nodes connected to the second node Determining a state of the second data according to a type of the interception request;

The second node controller receives a listening response sent by the third target processor for the second data, and the third target processor caches the processor in all nodes connected to the second node. a processor of the second data, the listening response for the second data includes a state of the second data;

The second node controller acquires the second data according to the state of the second data in the listening response and sends the second data to the third node;

The second node controller records a state of the second data in a data cache directory of the second data.
The method of claim 7, wherein before the second node controller sends a listening request to the processor in all the nodes connected to the second node, the method further includes:

The second node controller receives the exclusive access request for the second data sent by a memory access controller;

Before the second node controller sends a listening request to the processor in all the nodes connected to the second node, the method further includes:

The second node controller determines that the memory scan end notification sent by the memory access controller is not received, and the memory scan end notification is used to indicate that the second node control is in the memory of the node to which the second node controller belongs The data cache directory of all data managed by the device is invalid.
A data processing apparatus applied to a node system, wherein the node system includes a plurality of nodes, each of which includes two node controllers and at least one processor, wherein the plurality of nodes includes the first a node and a second node, the second node includes a first node controller, and the data processing device is a first node controller, including:

a receiving module, configured to receive a data access request sent by the first node, where the data access request is used to request to acquire first data;

Processing the module, determining that the first data is not managed by the first node controller;

a sending module, configured to send a listening request to a processor in all nodes connected to the second node, where the listening request is used to indicate that the processor in all nodes connected to the second node is configured according to The type of the interception request determines a state of the first data;

The receiving module is further configured to: receive a listening response sent by the first target processor for the first data, where the first target processor is a processor in all nodes connected to the second node a processor that caches the first data, the listening response for the first data including a state of the first data;

The processing module is further configured to: acquire the first data according to a state of the first data in the listening response;

The sending module is further configured to: send the first data to the first node.
The apparatus according to claim 9, wherein the state of the first data is an invalid state, and the listening response for the first data further comprises the first data;

The processing module is configured to: acquire the first data from the listening response according to the invalid state of the first data in the listening response.
The device according to claim 9, wherein the state of the first data is a shared state,

The processing module is used to:

Obtaining the first data from an internal memory of the second node according to the shared state of the first data in the listening response.
The apparatus according to any one of claims 9-11, wherein the type of the interception request comprises a shared listening request or an exclusive listening request.
A data processing apparatus applied to a node system, wherein the node system includes a plurality of nodes, each of which includes two node controllers and at least one processor, wherein the plurality of nodes includes a second a node, the second node includes a second node controller, and the data processing device is a second node controller, including:

a sending module, configured to send, to a processor in all nodes connected to the second node, an exclusive listening request, where the exclusive listening request is used to indicate processing in all nodes connected to the second node Determining, according to the type of the exclusive listening request, that the state of the second data is an invalid state;

a receiving module, configured to receive an exclusive listening response sent by the second target processor for the second data, where the second target processor caches the processor in all nodes connected to the second node a processor of the second data, wherein the listening response for the second data includes a state in which the second data is in an invalid state;

a processing module, configured to determine that a data cache directory of the second data managed by the second node controller is in an invalid state, and a data cache directory of the second data is in an invalid state, indicating that the second node is connected to the second node The state of the second data in the processor in all of the nodes is in an invalid state.
The apparatus according to claim 13, wherein the exclusive listening response further comprises the second data; the sending module is further configured to:

Transmitting the second data to an internal memory of the second node, the second data being used to replace the original second data in the internal memory.
The apparatus according to claim 13 or 14, wherein said plurality of nodes further comprise a third node;

The receiving module is further configured to: receive a data access request sent by the third node, where the data access request is used to request to acquire the second data;

The sending module is further configured to: send a listening request to a processor in all nodes connected to the second node, where the listening request is used to indicate that all the nodes connected to the second node are Determining, by the processor, a state of the second data according to a type of the interception request;

The receiving module is further configured to: receive a listening response sent by the third target processor for the second data, where the third target processor caches in a processor among all nodes connected to the second node a processor having the second data, the listening response for the second data including a state of the second data;

The processing module is further configured to: acquire the second data according to a state of the second data in the listening response, and send the second data to the third node; and data in the second data The state of the second data is recorded in the cache directory.
The device of claim 15 wherein:

The receiving module is further configured to: receive the exclusive access request for the second data sent by a memory access controller;

The processing module is further configured to: determine that the memory scan end notification sent by the memory access controller is not received, where the memory scan end notification is used to indicate the second node in the memory of the node to which the second node controller belongs The data cache directory of all data managed by the controller is invalid.