WO2019139175A1

WO2019139175A1 - Organic light-emitting field-effect transistor

Info

Publication number: WO2019139175A1
Application number: PCT/JP2019/001162
Authority: WO
Inventors: Fatima BENCHEIKH; Masashi MAMADA; Chihaya Adachi; Jean-Charles RIBIERRE; Ebinazar Benjamin Namdas; Shih-Chun Lo; Jan Ernest SOBUS; Viqar AHMAD
Original assignee: Kyushu University, National University Corporation; The University Of Queensland
Priority date: 2018-01-09
Filing date: 2019-01-09
Publication date: 2019-07-18

Abstract

In an organic light-emitting field-effect transistor containing a delayed fluorescent material, excitons can be efficiently used for light emission to remarkably enhance the emission efficiency of the transistor and high mobility along with high on/off ratios can be achieved.

Description

DESCRIPTION

TITLE OF INVENTION: Organic light-emitting field-effect transistor

FIELD OF THE INVENTION

The present invention relates to novel organic light-emitting field-effect transistors.

BACKGROUND

Light-emitting field-effect transistors (LEFETs) are a new class of devices with potential applications ranging from being the base for display matrix, through various communication devices up to the suitable platform for future electrically pumped lasers. These devices work as a hybrid of an organic light-emitting diode (OLED) and a field-effect transistor (FET), combining the emissive and switching properties in a single entity. Most reported organic light-emitting field-effect transistors have been based on fluorescent materials (see Non-patent Documents 1 6).

Non-Patent Document V- F. Cicoira, C. Santato, M. Melucci, L. Favaretto, M. Gazzano, M. Muccini, G. Barbarella, Adv. Mater. 2006, 18, 169-174.

Non-Patent Document 2· J. Zaumseil, R. H. Friend, H. Sirringhaus, Nat. Mater. 2006, 5, 69-74.

Non-Patent Document 3: J. H. Seo, E. B. Namdas, A. Gutacker, A. J. Heeger, G. C. Bazan, Adv. Funct. Mater. 2011, 19, 3667-3672.

Non-Patent Document 4- M. Ullah, K. Tandy, S. D. Yambem, M. Aljada, P. L. Burn, P. Meredith, E. B. Namdas, Adv. Mater. 2013, 25, 6213-6218.

Non-Patent Document 5: K. Muhieddine, M. Ullah, B. N. Pal, P. L. Burn, E. B. Namdas, Adv. Mater. 2014, 26, 6410-6415.

Non-Patent Document 6· M. Ullah, K. Tandy, J. Li, Z. Shi, P. L. Burn, P. Meredith, E. B. Namdas, ACS Photonics 2014, 1, 954-959.

SUMMARY OF THE INVENTION However, organic LEFETs using conventional fluorescent materials are problematic in that excitons could not be efficiently used for light emission. Accordingly, an object of the present invention is to provide a novel organic LEFET capable of efficiently using excitons for light emission and capable of expecting exponential increase in emission efficiency.

The present inventors have assiduously studied and, as a result, have succeeded in producing an organic LEFET using a delayed fluorescent material that emit light for the first time. High mobility along with high on/off ratios exceeding 10^G was observed. In addition, the present inventors have found that, by improving an organic LEFET using a delayed fluorescent material, emission efficiency can be improved and emission area can be controlled. The present invention has been provided on the basis of these findings, and includes at least the following subject matters.

[1] An organic light-emitting field-effect transistor containing a delayed fluorescent material.

[2] The organic light-emitting field-effect transistor of [l], having a gate electrode, and a dielectric layer in contact with the gate electrode, and further having in contact with the dielectric layer, a structure containing at least an emissive layer, a source electrode and a drain electrode.

[3] The organic light-emitting field-effect transistor of [2], having a structure wherein a charge transport layer is in contact with the dielectric layer, and the emissive layer is in contact with the charge transport layer.

[4] The organic light-emitting field-effect transistor of [2], having a structure wherein an interfacial layer is in contact with the dielectric layer, and the emissive layer is in contact with the interfacial layer.

[5] The organic light-emitting field-effect transistor of [2], having a structure wherein a charge transport layer is in contact with the dielectric layer, an interfacial layer is in contact with the charge transport layer, and the emissive layer is in contact with the interfacial layer.

[6] The organic light-emitting field-effect transistor of any one of [2] to [5], wherein the emissive layer is superposed on at least one of the source electrode and the drain electrode, or the emissive layer is superposed on at least one layer superposed on at least one of the source electrode and the drain electrode.

[7] The organic light-emitting field-effect transistor of any one of [2] to [5], wherein at least one of the source electrode and the drain electrode is formed on the emissive layer, or at least one of the source electrode and the drain electrode is formed on at least one layer superposed on the emissive layer.

[8] The organic light-emitting field-effect transistor of [7], having a structure wherein an interfacial layer is in contact with the emissive layer, and the at least one of the source electrode and the drain electrode is in contact with the interfacial layer.

[9] The organic light-emitting field-effect transistor of [7] or [8], wherein the at least one of the source electrode and the drain electrode is a transparent or semi-transparent electrode.

[10] The organic light-emitting field-effect transistor of [9], wherein the transparent or semi-transparent electrode is a gold electrode.

[11] The organic light-emitting field-effect transistor of any one of [2] to [6], wherein the emissive layer is superposed on the source electrode and the drain electrode, or the emissive layer is superposed on at least one layer superposed on the source electrode or the drain electrode.

[12] The organic light-emitting field-effect transistor of any one of [2] to [11], wherein the source electrode and the drain electrode are formed on the same layer.

[13] The organic light-emitting field-effect transistor of [ll] or [12], wherein the source electrode and the drain electrode have the same work function.

[14] The organic light-emitting field-effect transistor of any one of [ll] to [13], wherein the source electrode and the drain electrode have the same shape and the same layer configuration.

[15] The organic light-emitting field-effect transistor of any one of [2] to [10], wherein the source electrode and the drain electrode each are formed on a different layer.

[16] The organic light-emitting field-effect transistor of [15], wherein the source electrode and the drain electrode each have a different work function.

[17] The organic light-emitting field-effect transistor of [15] or [16], wherein the emissive layer is superposed on one electrode selected from the source electrode and the drain electrode, or the emissive layer is superposed on at least one layer superposed on the one electrode, and the other electrode of the source electrode and the drain electrode is formed on the emissive layer, or the other electrode is formed on at least one layer superposed on the emissive layer.

[18] The organic light-emitting field-effect transistor of [17], further having a charge transport layer in contact with the one electrode selected from the source electrode and the drain electrode.

[19] The organic light-emitting field-effect transistor of any one of [l] to [18], which is a p-type transistor.

[20] The organic light-emitting field-effect transistor of any one of [l] to [18], which is an n-type transistor.

[21] The organic light-emitting field-effect transistor of any one of [l] to [18], which is a bipolar transistor.

[22] The organic light-emitting field-effect transistor of any one of [l] to [21], wherein the emissive layer contains the delayed fluorescent material.

[23] The organic light-emitting field-effect transistor of any one of [l] to [22], wherein the ON/OFF ratio is more than 10⁵, preferably more than 10^G. .

[24] The organic light-emitting field-effect transistor of any one of [l] to [23], wherein the mobility is more than 0.1 cm^'s ¹, preferably more than 0.5 cm^V^s ¹.

[25] A method for adjusting the recombination zone of an organic light-emitting field-effect transistor having a gate electrode, and a dielectric layer in contact with the gate electrode, and further having in contact with the dielectric layer, a structure containing at least an emissive layer containing a delayed fluorescent material and a source electrode, and still further having a drain electrode on the structure, wherein the method includes forming an interfacial layer between the emissive layer and the drain electrode.

[26] A method for adjusting the recombination zone of an organic light-emitting field-effect transistor having a gate electrode, and a dielectric layer in contact with the gate electrode, and further having in contact with the dielectric layer, a structure containing an emissive layer containing a delayed fluorescent material and a source electrode, and still further having a drain electrode on the structure, wherein the method incudes forming an interfacial layer between the charge transport layer and the emissive layer.

[27] The method of [25] or [26], which is for expanding the recombination zone of the organic light-emitting field-effect transistor.

[28] The method of any one of [25] to [27], which is for expanding the emission area of the organic light-emitting field-effect transistor.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 shows device architectures used for LEFETs having source electrode and drain electrode formed on the same plane.

Figure 2 shows device architectures and chemical structures with their energy levels used for n-type and p-type LEFETs.

Figure 3 shows optical and electrical transfer curves, output characteristics and EQE versus brightness plots for n-type and p-type LEFETs.

Figure 4 shows principle of operation and charge pathways of p-type and n-type LTFETs.

Figure 5 shows electroluminescence spectra and photoluminescence characteristics of p-type and n-type LTFETs.

Figure 6 shows optical microscope images of the n-type LEFETs equipped with Ag or Au based top contact and transmittance spectra of n-type top electrodes and p-type top electrodes with Ag or Au.

Figure 7 shows device architecture of OLED and performance comparisons with LEFET.

Figure 8 shows device architectures of p-type LEFETs, optical and electrical transfer curves, output characteristics and EQE versus brightness plots.

Figure 9 shows electrical transfer curves for LEFETs having source electrode and drain electrode formed on the same plane.

Figure 10 shows electrical transfer curves for LEFETs with different gate voltages.

Figure 11 shows device architecture of solution processed n-type LEFET, energy levels, chemical structure, output and transfer characteristics, optical electrical transfer curves, and electroluminescence spectra and photoluminescence characteristics.

Figure 12 shows recombination rate spatial distribution for n-type and p-type LEFETs.

Figure 13 shows spatial distribution of electron density, hole density and recombination rate for PPT-top LEFETs and PPT-bottom LEFETs.

DETAILED DESCRIPTION OF THE INVENTION

The present invention is described in detail hereinafter. The constitutional elements may be described below with reference to representative embodiments and specific examples of the invention, but the invention is not limited to the embodiments and the examples. In the description, a numerical range expressed with reference to the expressions, an upper limit or less and/or a lower limit or more, means a range that includes the upper limit and/or the lower limit. The term "organic LEFET" means LEFET containing an organic compound in the emissive layer therein. Accordingly, any one that contains an organic compound in the emissive layer therein is an organic LEFET even though having an inorganic channel layer of ZTO or the like.

(Delayed Fluorescent Material)

The organic light-emitting field-effect transistor of the present invention includes a delayed fluorescent material. The delayed fluorescent material for use in the present invention is an organic compound of such that the energy different AE_st between the energy at a lowest excited singlet state and the energy at the lowest excited triplet state at 77 K is 0.3 eV or less. AE_st is more preferably 0.2 eV or less, even more preferably 0.1 eV or less, still more preferably 0.05 eV or less.

The energy difference AE_st can be determined by measuring a lowest excited singlet state (Esi) and a lowest excited triplet state at 77 K (ETI) according to the following procedures and calculating the difference between Es_l and E_TF

(l) Procedure for Measuring Lowest Excited Singlet Energy Level (Esi) The compound to be measured is vapor-deposited on a Si substrate to produce a specimen, and the specimen is measured for a fluorescent spectrum at ordinary temperature (300 K). In the fluorescent spectrum, the ordinate is the light emission, and the abscissa is the wavelength. A tangent line is drawn for the downfalling part of the light emission spectrum on the short wavelength side, and the wavelength edge (nm) of the intersection point of the tangent line and the abscissa is obtained. The wavelength value is converted to an energy value according to the following conversion expression to provide the singlet energy Esi.

Conversion Expression

Esi (eV) = 1239.85/ edge

The light emission spectrum is measured with a nitrogen laser (MNL200, produced by Lasertechnik Berlin GmbH) as an excitation light source and Streak Camera (C4334, produced by Hamamatsu Photonics K.K.) as a detector. (2) Procedure for Measuring Lowest Excited Triplet Energy Level (ETI)

The same specimen as used for the singlet energy Esi is cooled to 77 [K], the specimen for measuring phosphorescent light is irradiated with excitation light (337 nm), and the phosphorescence intensity is measured with a streak camera. A tangent line is drawn for the upstanding part of the phosphorescent spectrum on the short wavelength side, and the wavelength edge (nm) of the intersection point of the tangent line and the abscissa is obtained. The wavelength value is converted to an energy value according to the following conversion expression to provide the triplet energy Eth

Conversion Expression

ETI (eV) = 1239.85/ edge

The tangent line for the upstanding part of the phosphorescent spectrum on the short wavelength side is drawn in the following manner. Over the range in the phosphorescent spectrum curve of from the short wavelength end to the maximum peak value closest to the short wavelength end among the maximum peak values of the spectrum, a tangent line is assumed while moving within the range toward the long wavelength side. The gradient of the tangent line is increased while the curve was standing up (i.e., the value of the ordinate was increased). The tangent line that is drawn at the point where the gradient thereof became maximum is designated as the tangent line for the upstanding part of the phosphorescent spectrum on the short wavelength side.

A maximum peak having a peak intensity that is 10% or less of the maximum peak point intensity of the spectrum was not included in the maximum peak values and thus is not designated as the maximum peak value closest to the short wavelength end, and the tangent line that is drawn at the point where the gradient became maximum that is closest to the maximum peak value closest to the short wavelength end is designated as the tangent line for the upstanding part of the phosphorescent spectrum on the short wavelength side.

The delayed fluorescent material having a small energy difference AE_st may relatively readily undergo reverse intersystem crossing from excited triplet state to excited single state, and can efficiently utilize the excited triplet energy for light emission. The fluorescent material used in a conventional LEFET can utilize only 1/4 of electrically excited excitons, but according to the present invention, in principle, all excitons can be utilized for light emission. The delayed fluorescent material for use in the present invention is especially preferably a thermally-activated delayed fluorescent material capable of undergoing reverse intersystem crossing from excited singlet state to excited triplet state through thermal energy absorption.

The thermally-activated delayed fluorescent material relatively readily undergoes reverse intersystem crossing from excited triplet state to excited singlet state through absorption of heat from device, and can markedly efficiently utilize the excited triplet energy for light emission. The thermally-activated delayed fluorescent material could not provide or could hardly provide delayed fluorescence emission at a low temperature (for example, at 10 K), but could provide delayed fluorescence emission at a high temperature (for example, at 300 K). Delayed fluorescence has a longer lifetime (for example, XX ns or more) than ordinary fluorescence (prompt fluorescence).

The delayed fluorescent material for use in the present invention is not specifically limited in point of the kind and the structure thereof so far as the material is an organic compound having an energy difference AE_st of 0.3 eV or less. For example, a compound having a structure where a donor group (typically a group having a negative Hammett sr value) and an acceptor group (typically a group having a positive Hammett sr value) bond to a linker (typically a conjugated linking group such as an aromatic group or the like), or a compound having a structure where a donor group and an acceptor group bond directly can be employed. Above all, a compound having a diarylamino group as the donor group (where the two aryl groups may be heteroaryl groups, or the two aryl groups may bond to each other to form a structure of a carbazolyl group or the like), and a compound having a cyano group or a heteroaryl ring-containing group as the acceptor group are preferably employed. The compound having a donor group and an acceptor group has charge transportability and shows bipolarity, and therefore, according to the present invention, there can be provided an ambipolar LEFET. Consequently, the present invention opens the way to logic circuits with an organic semiconductor device.

Preferred delayed fluorescent materials are compounds included in the general formulae described in WO2013/154064, paragraphs 0008 to 0048 and 0095 to 0133, W02013/011954, paragraphs 0007 to 0047 and 0073 to 0085, W02013/011955, paragraphs 0007 to 0033 and 0059 to 0066, W02013/081088, paragraphs 0008 to 0071 and 0118 to 0133, JP-2013-256490A, paragraphs 0009 to 0046 and 0093 to 0134, JP-2013- 116975, paragraphs 0008 to 0020 and 0038 to 0040, WO2013/133359, paragraphs 0007 to 0032 and 0079 to 0084, WO2013/161437, paragraphs 0008 to 0054 and 0101 to 0121, JP-2014-9352A, paragraphs 0007 to 0041 and 0060-0069, and JP-2014-9224A, paragraphs 0008 to 0048 and 0067 to 0076, especially exemplary compounds therein that emit delayed fluorescence. In addition, light-emitting materials described in

JP-2013-253121A, WO2013/133359, WO2014/034535, WO2014/115743,

WO2014/122895, W02014/126200, WO2014/136758, WO2014/133121,

WO2014/136860, WO2014/196585, WO2014/189122, W02014/168101,

W02015/008580, W02014/203840, W02015/002213, W02015/016200,

WO2015/019725, W02015/072470, W02015/108049, W02015/080182,

WO2015/072537, W02015/080183, JP-2015-129240A, WO2015/129714,

WO2015/129715, W02015/133501, WO2015/136880, WO2015/137244,

WO2015/137202, WO2015/137136, WO2015/146541, and WO2015/159541, and having an energy difference AE_st of 0.3 eV or less are also preferably employed. The above-mentioned patent publications described in this paragraph are hereby incorporated herein by reference as a part of this description.

When a compound is identified by the structural formula thereof, an approximate value of the energy difference AE_st of the compound can be estimated through calculation with Gaussian or the like quantum-chemistry computational software based on the structural formula. Compounds having a small estimated approximate value are actually synthesized and AE_st thereof is actually measured, whereby organic compounds having an energy difference AE_st of 0.3 eV or less can be known. Accordingly, the delayed fluorescent material for use in the present invention may be an unknown organic compound having an energy difference AE_st of 0.3 eV or less.

Structural formulae of delayed fluorescent materials that are preferably usable in the present invention are shown below.

(Device Architecture)

The organic LEFET of the present invention has at least a source electrode, a drain electrode, a gate electrode, and a layer containing a delayed fluorescent material.

The layer containing a delayed fluorescent material is preferably an emissive layer. The layer containing a delayed fluorescent material may be in contact with both the source electrode and the drain electrode, or may be in contact with only one of them. An example of the embodiment where the layer is in contact with one of the electrodes is an n-type LEFET where the layer is in contact with the gate electrode via a charge transport layer (electron injection layer) and is in direct contact with the drain electrode. The emissive layer may be a layer formed of a delayed fluorescent material alone, or may be a layer containing any other material than a delayed fluorescent material. The other material than the delayed fluorescent material is preferably one having a higher LUMO than the LUMO of the delayed fluorescent material and has a lower HOMO than the HOMO of the delayed fluorescent material. In the case where the emissive layer contains any other material than the delayed fluorescent material, the concentration of the delayed fluorescent material in the emissive layer may be, for example 50% by weight or less, or 25% by weight or less.

The organic LEFET of the present invention is preferably one having a gate electrode, a dielectric layer superposed on the gate electrode, and having further thereon a structure that contains at least an emissive layer, a source electrode and a drain electrode. The structure may contains a buffer layer, a charge transport layer and an interfacial layer in addition to the emissive layer, the source electrode and the drain electrode. Preferred embodiments of the structure employable for the organic LEFET of the present invention include a configuration where a charge transport layer is in contact with the dielectric layer, and the emissive layer is in contact with the charge transport layer; a configuration where an interfacial layer is in contact with the dielectric layer, and the emissive layer is in contact with the interfacial layer; a configuration where a charge transport layer is in contact with the dielectric layer, an interfacial layer is in contact with the charge transport layer, and the emissive layer is in contact with the interfacial layer! a configuration where the emissive layer is superposed on the source or drain electrode, or the emissive layer is superposed on at least one layer superposed on the source or drain electrode; a configuration where the source or drain electrode is superposed on the emissive layer, or the source or drain electrode is superposed on at least one layer superposed on the emissive layer! a configuration where an interfacial layer is superposed on the emissive layer, and the source or drain electrode is superposed on the interfacial layer.

As the dielectric layer, a layer of a dielectric material generally formed on the gate electrode of a transistor may be appropriately selected and employed here. The charge transport layer is a layer having a function of transporting holes or electrons, and any one employable for transistor channels is usable. The interfacial layer is a layer having a function of promoting or blocking charge injection. For example, in an n-type LEFET, such an interfacial layer may be formed between the charge transport layer (n-type channel) and the emissive layer therein to promote electron injection into the emissive layer. For example, in a P-type LEFET, an interfacial layer may be formed between the source electrode and the emissive layer, or between the emissive layer or the drain electrode to block hole transfer to control the recombination region. Accordingly, the emission region of the transistor may be controlled, or may be enlarged.

The materials that compose the electrodes may be optimized in function of the type of charge that should be injected. In case of electrodes for the injection of electrons, it is preferred to use calcium, magnesium, aluminum and gold that may be coated with zinc oxide. In case of electrodes for injecting holes, it is preferred to use of gold, silver, platinum and copper. It is also possible to use the same material for realizing both electrodes, in this case only the operating conditions determine the type of injected charge carriers. In this case, suitable materials adapted to the realization of electrodes are for example gold, aluminum. In the LEFET of the present invention, the electrode to be formed on the emissive layer is preferably a transparent or semi-transparent electrode. In the transparent or semi-transparent electrode, the minimum value of light transmittance of wavelengths of 400 to 800 nm is preferably 50% or more, more preferably 70% or more, still more preferably 90% or more. Examples of preferred transparent or semi-transparent electrodes include a gold electrode. Using such a transparent or semi-transparent electrode can enhance light takeoff efficiency.

In the LEFET of the present invention, the source electrode and the drain electrode may be formed on the same plane (on the same layer), or the source electrode and the drain electrode may not be formed on the same plane (on the same layer).

The former is a typical traditional configuration, and examples thereof are shown in Figure 1. Here are shown a bottom-contact configuration where a dielectric layer is laminated on a gate electrode, then a source electrode and a drain electrode are formed on the dielectric layer, and thereafter an emissive layer is further laminated thereon (Figure 1A), and a top-contact configuration where a dielectric layer and an emissive layer are laminated in that order, and a source electrode and a drain electrode are formed on the emissive layer (Figures IB to ID). A buffer layer maybe formed between the dielectric layer and the emissive layer (Figure ID). When the source electrode and the drain electrode are formed on the same layer, the source electrode and the drain electrode may have the same work function, or may have the same shape and the same layer configuration.

An embodiment where the source electrode and the drain electrode are not formed on the same plane (on the same layer) is one produced by the present inventors by reforming a conventional configuration, and this is preferred as the emission efficiency thereof is high. The source electrode and the drain electrode may have a different work function, and may have a different shape and a different layer configuration. Specific examples of the preferred case include a configuration where an emissive layer is superposed on one of a source electrode and a drain electrode, or is superposed on at least one layer superposed on the one electrode, and the other electrode of the source electrode and the drain electrode is further superposed on the emissive layer, or is superposed on at least one layer superposed on the emissive layer. In these embodiments, charge carrier mobility can be remarkably improved by forming a charge transport layer in contact with the source or drain electrode formed between the emissive layer and the gate electrode. The charge transport layer may be in contact with the emissive layer and may be in contact with a dielectric layer superposed on the gate electrode. The charge transport layer contains a charge transport material which preferably has a molecular weight of 1000 or less. The charge transport material may be an organic compound such as C8-BTBT-C8 or an inorganic compound such as ZTO. ZTO is a preferable charge transport material as it is robust in a long term.

The embodiments where the source electrode and the drain electrode are not formed on the same plane are described in detail hereinunder with reference to figures.

Figures 2A and 2B show the schematic structure of the n-type and p-type devices together with the thicknesses of each layer and their corresponding energy levels. The chemical structures of the compounds 4CzIPN, TPBi, CBP and C8-BTBT-C8 used in the n-type and p-type LEFETs are shown in Figures 2C to 2F. In these embodiments, Zinc-tin oxide (ZTO) and C8-BTBT-C8 (2,7-dioctyl[l]benzothieno[3,2-b][l]benzothiophene) are employed as the charge transporting materials in the channel for n-type and p-type LEFETs, respectively. The emissive layer contains 4CzIPN TADF material as a guest in a CBP (4,4-bis( carbazolyl)- 1,1-biphenyl) matrix, which may be thermally deposited under vacuum (10 ⁵ mbar). ZTO is chosen as a channel material in n-type devices based on its ease of processing (spin-coating), robustness and high electron mobility. Similarly, C8-BTBT-C8 is chosen as a p-type channel material for its high hole mobility. All devices are fabricated on Si++ substrates (also acting as a gate electrode) with a silicon nitride (SiNx) dielectric layer (400 nm) on top. An additional 250 nm layer of PMMA [poly(methyl methacrylate)] is used as a buffer for p-type devices. In the n-type devices, a sol-gel zinc-tin oxide (ZTO) solution may be prepared and spin-coated on top of the substrate. This may be followed by a thermally evaporated A1 layer (35 nm) through a patterned shadow mask. For the p-type devices, the channel may be formed by thermal deposition of a C8-BTBT-C8 layer (25 nm), followed by the deposition of the hole injecting stack of MoOx/Au (5/35 nm, respectively). Due to the large energy mismatch between the work function of ZTO (4.9 eV) and the LUMO level of the TADF compound (3.9 eV) in the n-type devices, an additional electron injecting layer (20 nm) of TPBi (LUMO = 2.7 eV) is deposited on top of the ZTO layer. The top (drain, minority carrier) electrode may be deposited through the shadow mask complementary to the one used for the bottom contact. For the n-type devices, the top contact consists of a CBP/MoOx/Ag stack (50/5/35 nm, respectively), whereas in the p-type devices, it consists of TPBi/Cs2C03/Ag (40/5/35 nm, respectively). Silver is used in both cases in order to be able to directly compare device performance. Alternatively, gold can be used, which changes the optical parameters of the electrodes as described below.

(Optical and Electrical Characterization)

Optical and electrical transfer characteristics of the n- and p-type LEFETs are shown in Figures 3A and 3B, respectively. The charge carrier mobility is calculated in the saturation regime from the slope of the square root of the transfer characteristics to give 3.2 cm² V^-1 s^-1 and 0.85 cm² V^-1 s^_1 for the best of the n- and p-type devices, respectively. High mobility along with high on/off ratios exceeding 10⁶ in both cases is observed. Electrical and optical output curves are presented as well - Figures 3C and 3D for p- and n-type devices, respectively. Gate voltages ranges from 0 to ±100 V in ±10 V increments (polarity depends on device type; positive for the n-type and negative for the p-type devices). At a gate voltage of ±100 V, the brightness reaches 850 cd m^-2 and 185 cd m^-2 for the n- and p-type LEFETs, respectively. It is worth noting that the emission zone is located around the drain (top) electrode (insets of Figures 3A and 3B). This is expected from proposed operation mechanism, which can be found in Figure 4.

Photoluminescence and electroluminescence spectra of both device types are shown in Figure 5. The external quantum efficiency (EQE) plotted against brightness is depicted in Figures 3E and 3F for the n- and p-type devices, respectively. The hysteresis occurring in the p-type graph is the effect of the presence of traps in the organic channel layer, which changes the performance between forward and reverse sweep directions. The performance drop in the high brightness end of the n-type graph is caused by the device saturating the system’s compliance current (20 mA), leading to drop in device performance. Very good electrical characteristics and brightness comparable with the reported phosphorescent LEFETs are shown.

(Effect of Electrodes)

The ability to transmit generated light is discussed here. It can make the difference between edge emission of the light around the top contact and area emission across the whole contact, provides that transmittance is sufficient within in the spectral range of the emissive material. This is observed when the top silver layer (35 nm thick) in the n-type devices is replaced by 15 nm of gold, resulting in area emission as shown in Figure 6A. Figure 6B shows the optical transmittance of the potential top electrode configuration for n-type devices with MoOx (5 nm) and Ag (35 nm) or Au (15 nm). Using the electroluminescence spectrum of the TADF material (Figure 6B, dashed) and Equation 1, one can calculate the total percentage of light transmitted through the given contact.

Switching the standard 35 nm thick silver contact to gold of the same thickness improved the total transmittance from 12% to 28%, by further reducing the contact layer thickness to 15 nm even higher transmission of 52% and 61% for Ag and Au, respectively, is achieved. Similar transmission gains are obtained for p-type electrodes where a 5 nm-thick C_S2CO3 layer is combined with a 35 nm- or 15 nm-thick layer of gold or silver. As can be seen in Figure 6C, switching from silver to gold, the total transmittance increased from 9% to 34%, and reduction of metal thickness to 15 nm also further improves these values to 48% and 71% for silver and gold, respectively. The transmittance of TPBi and CBP top contact stack is not analyzed here since their absorbance in the emission region of 4CzIPN is negligible. These results show that changing the top metal electrode and decreasing its thickness is a viable strategy in achieving area emission in the devices. Using gold gives better results in general and enables wavelength tuning to a certain extent, as can be seen in Figure 6B, where changing the Au thickness shifts the peak of the transmittance curve behavior- a result of surface plasmon resonance within the gold film.

(Comparison with OLEDs)

Since the charge injection has not found being the cause for low EQEs, it is investigated whether the restrictions arose from the LEFET’s architecture. Thus, OLEDs with the same materials as in LEFET devices are studied (Figure 7A). A p-type architecture is chosen for this study due to easier patterning of the electrodes compared to ZTO. Silicon substrates with a silicon nitride layer are used as before, followed by the inverted hole contact and a channel layer (Au/MoOx/C8-BTBT-C8). The upper part of the stack comprises of a TADFUBP blend and TPBi/Cs2C03/Ag top contact. The size of the pixel is set to 0.1 mm², similar to the emission area of the LEFET (ranging from 0.1 to 1 mm²). Representative electrical and optical characteristics can be seen in Figure 7B with a clear light turn-on voltage of 2.5 V and a maximum brightness of 17,000 cd m^-2 at 25 V. The threshold voltage is in a good agreement with the energy gap of 4CzIPN (2.4 eV). A comparison between EQEs of OLED and LEFET is presented in Figure 7C. The EQEs of OLEDs at maximum brightness are comparable with EQEs of LEFETs. This renders the inherent device architecture not responsible for the low EQEs in LEFETs. It is noteworthy that although EQE exceeding 0.1% at high brightness, the EQEs of OLEDs vary with brightness over several orders of magnitude. Such behavior suggests large charge imbalance in the device, leading to poor recombination of excitons. On the other hand, EQEs in LEFETs remains constant with brightness range spanning from 1 cd m^-2 to the maximum value of over 120 cd m^-2.

(Introduction of Interfacial Layer)

Since the charge injection efficiency and problems arising from the device architecture have been ruled out as possible reasons for the low EQE, additional measures are studied to confine holes in the emission layer in attempt to further increase device efficiency. A 10 nm interfacial layer (hole blocking layer) of 2,8 bis(diphenylphosphoryl)dibenzo[b,d]thiophene (PPT) is introduced to the p type LEFETs in two configurations as shown in Figures 8A and 8E for its deep HOMO level (-6.6 eV). In the“top” configuration (Figure 8A), it is placed between the emission layer and the top electrode, while in the "bottom" configuration (Figure 8E), it is inserted between the channel and emissive layer. The resulting transfer and output characteristics for the "top" PPT device are presented in Figures 8B and 5C, respectively. This configuration gives brightness of more than 500 cd m ² without significant changes in the electrical characteristics when compared to those without PPT (except for a minor drop in hole mobility from 0.85 to 0.65 cm² V^-1 s^-1). Moreover, the EQE at high brightness reaches 0.1% (Figure 8D), exceeding devices without a PPT layer by an order of magnitude at equivalent brightness (Figure 3F). A narrow emission area around the top electrode is observed as illustrated in the inset of Figure 8B. Remarkably, in the "bottom" PPT architecture, area emission is obtained, which can be attributed to dipole interactions and higher uniformity of the electric field at the interface between PTT and C8-BTBT-C8. This phenomenon is also known for PEIE. Introduction of the PPT layer may affect the light out-coupling properties of the device as well. Transfer, output and EQE curves for "bottom" architecture device can be seen in Figures 8F, 8G and 8H, respectively. The reduction in hole mobility is even less pronounced than in the "top" architecture, reaching a value of 0.7 cm² V^-1 s^_1. A maximum brightness of up to 370 cd m ² is achieved with an EQE of 0.06%. Taken into account that the top electrode in this device is only transmitting 12% of all generated light, a more transparent oxide-metal-oxide stack would potentially result in EQEs of «0.4%, which would be directly competing with established phosphorescent LEFETs.

EXAMPLES

The features of the invention will be described more specifically with reference to Synthesis Examples and Examples below. The materials, processes, procedures and the like shown below may be appropriately modified unless they deviate from the substance of the invention. Accordingly, the scope of the invention is not construed as being limited to the specific examples shown below. The light emission characteristics

<1> Examples of LEFET having source electrode and drain electrode formed on the same plane

(Example l)

A LEFET shown in Figure 1A was produced according to the following process.

(l) Substrate Cleaning

As an insulating film-having gate electrode, an n⁺⁺-Si substrate having a 30Onm thermal oxide film was used (15 mm x 15 mm). This was immersed in a Petri dish filled with a solution of aqueous hydrogen peroxide/sulfuric acid = 1/4 (by volume), and heated at 70°C for 10 minutes therein to remove the contaminants from the surface of the substrate. Subsequently, this was washed a few times with ion-exchanged water, and then ultrasonically washed with ion-exchanged water for 5 minutes. Subsequently, this was ultrasonically washed twice with acetone for 10 minutes and once with isopropanol for 10 minutes, then boiled with isopropanol to be dried with the vapor, and thereafter subjected to UV/O3 cleaning for 15 minutes using a UV-ozone cleaner (manufactured by Nippon Laser and Electronics Lab.).

(2) Production of Gold Electrode by Photolithography

For surface treatment, hexamethyldisilazane was deposited at 1000 rpm for 30 seconds. This was dried on a hot plate at 110°C for 5 minutes, and then for complete resist removal, LOL 1000 (lift of layer) manufactured by Rohm & Haas Company was deposited at 4000 rpm for 30 seconds, and dried on a hot plate at 150°C for 5 minutes. Subsequently, this was spin-coated with a positive resist (TSMR-8900) by Tokyo Ohka Kogyo Co., Ltd. at 3000 rpm for 30 seconds, and then heated and dried on a hot plate at 110°C for 5 minutes.

Via a photomask set thereon, the resist-coated substrate was exposed to light. After thus exposed, this was transferred to a Petri dish, then a developer (NMD) was added thereto in such that the substrate could be submerged therein, and while stirred at whiles, the substrate was thus kept submerged for about 30 seconds to be developed. Subsequently, this was washed with ion-exchanged water as a stopper.

Next, an electrode was formed according to a vacuum vapor deposition method. The vacuum degree in deposition was 1 to 5 x 10^~4 Pa or less, and chromium was deposited in 3 nm and then gold was layered thereon in 50 nm. Chromium was used for bettering the adhesion of gold to the silicon substrate. Subsequently, the silicon wafer was cut. The substrate was set in a Petri dish, and a remover solution (Micro Posit Remover 1165) was added thereto in such that the substrate could be submerged therein. This was heated on a hot plate set at 90°C, and swung at whiles together with the Petri dish to remove unnecessary metals. The substrate was taken out, rinsed well with acetone, then ultrasonically washed twice with acetone and isopropanol for 5 minutes, and boiled and dried with isopropanol. Then, this was UVwashed for 15 minutes.

(3) S₁O₂ Surface Treatment (SAM-treatment)

The substrate was immersed overnight (12 hours) in hexamethyldisilazane in a brown bottle, then the substrate was ultrasonically washed with acetone and isopropanol each twice for 5 minutes, and boiled and dried with isopropanol.

(4) Surface Treatment of Gold

An isopropanol solution of pentafluorobenzenethiol (30 mM) was prepared in a Petri dish, and the substrate was immersed therein for 5 minutes. After thus surface-treated, the substrate was washed with isopropanol and dried using an air gum.

(5) Organic Semiconductor Vapor Deposition

Next, using an organic vapor deposition machine, an organic semiconductor layer of 4CzIPN was vapor-deposited to a thickness of 50 nm on the substrate in vacuum at 10 ³ Pa or less at a rate of 0.2 A/sec with spinning the substrate.

(Example 2)

After the steps (l), (3) and (5) in Example 1, the substrate was transferred into a glove box having a nitrogen atmosphere and having a low humidity and a low oxygen concentration, a metal mask for electrode patterning was put on the substrate, fixed with a metal claw and a screw, then transferred into a metal vapor deposition chamber, and gold was vapor-deposited thereon to a thickness of 50 nm at a rate of 1 A/sec to form a gold electrode. Subsequently, according to (4) in Example 1, an LEFET shown in Figure IB was produced.

(Example 3)

An LEFET shown in Figure 1C was produced according to the process of Example 2, except that an asymmetric Au-Ca electrode was formed according to the step mentioned below in place of the gold electrode in Example 2.

In a glove box having a nitrogen atmosphere and having a low humidity and a low oxygen concentration, a metal mask for electrode patterning was put on the substrate. At this time, two metal masks were used and set to cover a half of the pattern. These were fixed each with a metal claw and a screw, then the substrate was transferred to a metal vapor deposition chamber, and gold was vapor-deposited thereon to a thickness of 50 nm at a rate of 1 A/sec. Subsequently, this was transferred to the glove box, the upper mask was removed, and again the substrate was transferred to the metal vapor deposition chamber, and deposited with calcium (l A/sec, 50 nm) and then continuously with gold (l A/sec, 30 nm).

(Example 4)

After the step (l) in Example 2, the substrate was dip-coated with a toluene solution of polymethyl methacrylate (PMMA) (10 mg/ml) at a rate of 0.5 mm/sec. Subsequently, in a glove box at 80°C, this was baked for 8 hours to form a PMMA layer. Afterwards, an organic semiconductor crystal produced in a physical vapor transport system was arranged on the PMMA layer, and according to Example 2, a gold electrode was formed thereon and the gold was surface -treated to give an LEFET shown in Figure ID.

(Measurement)

Each LEFET produced in Examples 1 to 4 was, not exposed to air, evaluated for the properties thereof in a glove box. Each LEFET gave weak light emission. The charge transportability was evaluated using a semiconductor device analyzer (B1500, by Agilent Technologies). The LEFETs were all p-type LEFETs. Electrical transfer characteristics of each LEFET are shown in Figures 9A-D. Charge carrier mobilities and threshold voltages are shown in the following Table.

Table 1

Figure 10 shows a relationship between the drain voltage and the drain current of LEFET of Example 1. The gate voltage in measurement was -100 to 0 V. At a low gate voltage, the drain current increased when the drain voltage was changed from -80 V to Ί00 V. This confirms the bipolarity of LEFET.

<2> Examples of LEFET having source electrode and drain electrode formed on different plane

(Examples 5 to 8)

N-type LEFET of Example 5 shown in Figure 2A, p type LEFET of Example 6 shown in Figure 2B, p-type LEFET of Example 7 shown in Figure 8A, and p type LEFET of Example 8 shown in Figure 8E were produced according to the following process.

N doped silicon wafer (acting as a gate in case of LEFETs) covered with 400 nm silicon nitride (SiN_x) layer (obtained from Silicon Quest, International) was used as a substrate for all devices. Substrates were cleaned by sequential ultra-sonication in acetone and 2-propanol (20 minutes each). In case of p type devices, substrates were further passivated by deposition of 250 nm thick poly(methylmethacrylate) (PMMA, with

= 150,000 from Sigma- Aldrich) using spin-coating (2,000 rpm for 30 s) from 30 mg mL^-1 solution in 99.9% anhydrous toluene. Deposition was followed by annealing on a hotplate for 20 min at 150 °C in a N₂ glovebox and cooled to room temperature inside afterwards. Layers forming conductive channel were deposited next. In case of p-type devices, C8-BTBT-C8 was deposited (25 nm) using thermal evaporation process in pressure under 10 ⁵ mbar. For the n-type devices, the substrates were first cleaned with a UV cleaning process for 30 minutes. A ZTO layer (30 nm) was spin-coated (5,000 rpm for 30 s in air) from a 7^3 ratio mixture of 150 mmol ZnCl₂ solution in 2-methoxyethanol (3.5 mL) and 150 mmol SnCl₂ solution in 2- methoxy ethanol (1.5 mL) that was pre-stirred overnight. Instantly after the deposition, substrates were transferred on top of a 150 °C hotplate and resided in air at that temperature for 5 minutes, followed by annealing in an oven at 500 °C for 60 minutes and cooled overnight. A non-planar source-drain contact geometry using complementary shadow masks was implemented for the LEFET devices in order to minimize parasitic contact resistance problems. First, the bottom source, contacts of A1 (35 nm) or MoOx (5 nm) followed by Au (35 nm) for n- and p-type devices, respectively, were deposited using thermal evaporation. For n-type devices, an additional electron injecting layer of TPBi (20 nm) were deposited using thermal evaporation. The next step for both types of devices was the deposition of TADFUBP emissive layer using thermal co-evaporation with varying doping content (5%, 10%, 20%, & 70% by weight) with thickness of 25 nm. Finally, for both types of LEFET devices, a top (drain) contact was deposited by thermal evaporation through a mask complementary with the source. For n-type devices, the combinations of CBP (50 nm)/MoOx (5 nm)/Ag (35 nm), MoOx (5 nm)/Ag (35 nm), and C8-BTBT-C8 (20 nm)/MoOx (5 nm)/Ag (35 nm) were used, while for p-type devices TPBi (40 nm)/Cs₂C0₃(5 nm)/Ag (35 nm), Ca (10 nm)/Al (35 nm) or LiF («2 nm)/Ca (10 nm)/Al (35 nm) were deposited. For the OLED device, same fabrication was employed as those in the p-type LEFETs.

Finally, for the devices with a 10 nm PPT hole blocking layer, it was achieved by thermal evaporation. For all the devices, the channel width (W) was approximately 15 mm and channel length (L) varied from 50 to 120 mih, depending on the shadow mask used. Thicknesses of the obtained layers were verified using a Dektak XT profilometer.

(Measurements)

The characteristics of the devices were evaluated.

Electrical transfer and output characteristics of the devices were measured using Agilent B1500A Semiconductor Device Analyzer coupled with a SA6 Semiautomatic Probe station equipped with 4 electric channels and a calibrated photomultiplier tube (PMT) placed over the device. The PMT photocurrent was collected in order to determine the luminance of the light emitting area. Its value was obtained by comparison of the obtained photocurrent with the one recorded for a light emitting diode of know emission area and luminance, taking into account given PMT gain. Emission area was calculated based on the images of the working device, collected by the digital camera connected to the optical microscope, which was positioned over the sample. Using the known dimensions of the electrodes as a scaling reference, emission area was obtained with the use of ImageJ software. The EQE was obtained from the calculations based on source-drain currents, emission spectra and luminance (assuming Lambertian profile of emission) using literature method described elsewhereJ²⁶! Threshold voltages and mobilities of the charge carriers were estimated from the transfer characteristics in the saturation regime ( VDS - ±100 V) using the Equation 2-

where Ids is the source drain current, W and L are the channel width and length, respectively, fi is the field effect mobility, C is the capacitance of the dielectric layer and V_g with V_t are gate and threshold voltages, respectively The total capacitance of the combined SiN_x/PMMA layer (p-type devices) was calculated by adding capacitances of both layers in series.

Transmission measurements were performed using Agilent Cary 5000 UV-Vis spectrometer with the analyzed layers deposited on the glass substrates in the same manner as the fabrication process, using a clean glass substrate as a reference.

The results are shown in Figures 2, 5, 6 and 8.

Figures 3A and 3B show optical and electrical transfer curves for the n-type and p-type LEFETs of Figures 2A and 2B (Examples 5 and 6). Figures 3C and 3D show output characteristics and Figures 3E and 3F show EQE versus brightness plots for the n-type and p-type LEFETs. Insets of Figures 3A and 3B show optical microscope images of the light emission from the n-type and p-type LEFETs, respectively. Figure 5A and 5C show electroluminescence spectra and photoluminescence characteristics of p-type LTFETs of Figure 2B. Figure 5B and 5D show electroluminescence spectra and photoluminescence characteristics of n-type LTFETs of Figure 2A.

Figure 6A shows optical microscope images of the n-type LEFETs equipped with Ag based top contact (Example 5, edge emission) and Au based top contact (modified Example 5, area emission). Figures 6B and 6C show transmittance spectra of n-type top electrodes and p-type top electrodes, respectively with the use of silver and gold of 35 nm and 15 nm thickness. Normalized electroluminescence spectra of 4CzIPN in respective LEFETs included as dashed lines.

Table 2 shows ON/OFF ratios and mobilities of n-type and p-type LTFETs of Figures 2A and 2B (Examples 5 and 6) and n-type and p-type LTFETs modified with different top contacts (modified Example 5 and 6).

Table 2

Figures 8B to 8D show optical and electrical transfer curves, output characteristics and EQE versus brightness plots for the p-type LEFETs of top PPT configuration of Figure 8A (Example 7). Figures 8F to 8H show optical and electrical transfer curves, output characteristics and EQE versus brightness plots for the p-type LEFETs of bottom PPT configuration of Figure 8E (Example 8).

(Example 9)

N-type solution processed LEFET of Example 9 shown in Figure 11A was produced according to the following process. All injection and emissive layers were formed by solution processing. Any solution processed LEFET containing a delayed fluorescent material has not been reported to date.

N doped silicon wafer covered with 400 nm silicon nitride (SiN_x) layer

(obtained from Silicon Quest, International) was used as a substrate. The substrate was cleaned by sequential ultra-sonication in acetone and 2-propanol (20 minutes each) and UV cleaning for 30 minutes. A ZTO precursor solution was prepared by mixing zinc chloride and tin chloride in 2-methoxyethanol (7:3) and stirring the mixture overnight. The solution was spin coated in air on the UV cleaned SiNx/Si substrate at 5000 rpm/ 30 s with 5 min annealing at 150 °C. The annealed substrate was cured in oven at 500 °C for 1 hour to form a ZTO layer (30 nm). A1 (40 nm) was deposited by thermal evaporation to form a source. An ethoxylated polyethylenimine (PEIE) solution in 2-methoxyethanol (0.4 wt%) was spin coated at 5000 rpm for 50 sec followed by 100 °C annealing for 10 min. An ACRXTN solution in DCE (10 mg/ml) was spin coated at 1500 rpm for 1 min to form a 100 nm layer. MoOx (5nm) and Au (35nm) were deposited by thermal evaporation to form a drain.

The characteristics of the device were evaluated in the same manner as Examples 5 to 8.

Figure 11B shows energy level diagram of the device. The addition of PEIE lifts the energy level to 4.2 eV from 4.9 eV (of ZTO) assisting more efficient electron injection to TADF. Figure 11B shows electron and hole injection mechanism and recombination region in the device. As ZTO possesses very high mobility (~4 cm² /Vs), recombination occurs close to the drain electrode. Figure 11C shows output characteristics of the device. Optical signal is captured via photomultiplier tube and converted to brightness with the help of a pre-calculated conversion factor. Drain voltage is swept from 0 to 100 V while gate voltage is varied from 0 to 100 V in steps of 10 V. Figure 11D shows transfer characteristics of the device. Drain voltage is fixed at 100 V while gate voltage is swept from -40 to 100 V. The device shows close to 10⁶ current on/off ratio. Figure 11E shows EQE and brightness of the device as a function of gate voltage. The device shows a peak EQE of 2.26% at 12 cd/m² with peak brightness reaching 1024 cd/m² at 0.1% EQE. The fall in device brightness after 60 V is primarily due to very high current causing device degradation. The FET mobility of the TADF was calculated to be 5.3 x 10⁴ cm²/Vs. Figure 11F shows EL and PL spectrum of the device. The inset is optical image of the LEFET showing area emission from the device . <3> Device Simulation

(Electrical Simulation)

In order to compare the different device configuration and estimate the shape and the position of recombination zone, two dimensional electrical simulations were performed using the Technology Computer Aided Design ATLAS software from Silvaco. The charge transport through the transistor was described using the two-dimensional time -independent drift-diffusion equation coupled to the Poisson equation and the continuity equation for charge carriers. The electron and hole densities, n and p, respectively, were expressed using parabolic density of states (DOS) and MaxwelLBoltzmann statistics. The DOS was taken to be 10¹⁸ cm ³. In this model, the energetic disorder was not taken into account, so we assumed the validity of Einstein’s relation to calculate the charge carrier diffusion constant from the charge carrier mobility. The recombination rate, R is calculated using the Langevin model. The values of the charge carrier mobilities were fixed for all devices and are presented in Table 3. The spatial dimensions were fixed for all the simulated devices with W = 15 mm and L = 50 pm. The simulation was qualitative since the charge carrier mobilities are taken to be constant and the contacts are considered to be ohmic.

Figures 12A to 12D show the simulated spatial distribution of the recombination rate, (R in decimal logarithm, Log_l0) for the n-type device at V_g = 40 V (Figure 12A) and V = 100 V (Figure 12B) and for the p-type device at V = -40 V (Figure 12C) and V = -100 V (Figure 12D). By increasing the | V_g | , the lengths of the electron accumulation region in the n-type device and the hole accumulation region in the p-type device expand leading to the broadening of the recombination zone underneath the drain electrode. This finding is in good agreement with the experimental observations - evolution from edge to area emission with increased gate voltage.

Figures 13Ato 13C and Figures 13D to 13F show the spatial distribution of electron density, n, hole density, h and R in the PPT-top device and PPT-bottom device, respectively. In the PPT top device, by applying a high negative gate and drain biases (V_g = -100 V and Vd = -100 V), the electrons are injected from the TPBi/Cs2C03/A drain electrode into the PPT layer and then into the EML where they accumulate (Figure 13A) due to the high electron barrier between the EML and the C8-BTBT-C8 (l eV). Holes are efficiently injected from the Au/MoOx source electrode into the C8-BTBT-C8 HOMO level since the hole injection barrier is relatively small (0.3 eV). The holes accumulate near to the interface C8-BTBT-C8/oxide (Figure 13B) and then move along the channel toward the drain. Due to the low barrier between the C8-BTBT-C8 layer and the EML layer (0.2 eV) the holes are drifted into the EML by the electric field generated by electron accumulation in the EML and hole accumulation in the C8-BTBT-C8. The electrons and holes meet in the EML and recombine underneath the drain electrode, near to the interface EML/PPT with a maximum located along the edge (Figure 13C).

By placing the PPT layer under the EML and keeping the same bias values (PPT-bottom device), the holes accumulate not only at the interface C8-BTBT C8/oxide but also at the interface C8-BTBT-C8/PPT (Figure 13E) due to the hole high barrier (1.1 eV) between C8-BTBT-C8 and PPT layers. Electrons accumulate at the interface EML/PPT due to the presence an electron barrier of 0.4 eV (Figure 13D). Due to the accumulation of electron and hole on either side of PPT layer, a vertical electric field is generated which helps the holes to overcome the energy barrier and reach the EML. Electrons and holes meet at the EML/PPT layer where they recombine, leading to a recombination zone extended along this interface, with a tail exceeding the zone covered by the drain electrode.

Table 3

(Optical Simulation)

Optical simulations were performed using SETFOS 4.5 software in order to calculate the light out-coupling as well as the optical channel losses in the OLED, the PPT-top and PPT-bottom devices. In the optical model used for this simulation, the excitons were modelled as isotropic radiative dipoles driven by the multiple reflections inside the device. The power radiated from a dipole at a certain wavelength is weighed by the photoluminescence spectrum of the emitting layer. Using the same approach cited above, the dissipated power can be calculated. The contribution of the modes is obtained by integrating the dissipated power.

The percentage of the optical power coupled to the different optical channels in the OLED and PPT-bottom and PPT-top devices are presented in Table 4. The outcoupled light from the OLED was 2% and from the PPT-bottom and PPT-top devices was 1.2 %, respectively. In the case of the OLED, 75.8% of the generated light was lost due to metal absorption and 22.2 % was coupled to the surface plasmon polariton (SPP) mode. The light generated in the PPT-bottom and top devices under the drain electrode ( i.e ., with TPBi/Ag) was mainly absorbed by the metal (98.7%) and only a small amount was outcoupled (1.2%). The light coupled to the SPP mode was very low (0.1%). However, the light generated in the region free of drain electrode {i.e., without TPBi/Ag) for both devices (PPT-bottom and top) suffered a little bit less from the metal absorption and the outcoupled light was around 14%. The position of the PPT layer did not affect the light outcoupling and trapping. In general, the optical modelling data supported the results obtained from electrode absorption measurements - the main factor limiting the EQE was the ability to efficiently out-couple the generated light. The experimentally measured “static” transmission of TBPi/Ag electrodes («10%) nicely corresponded to the calculated approximate 10-fold difference in outcoupling efficiency between modelled devices with (1.2% efficiency) and without (14% efficiency) the top electrode. By taking the outcoupling efficiency of 1.2% and the EQE of 0.1% into account, internal quantum efficiency (IQE) was estimated to be around 8%. Table 4

Claims

1. An organic light-emitting field-effect transistor containing a delayed fluorescent material.

2. The organic light-emitting field-effect transistor according to claim 1, having a gate electrode, and a dielectric layer in contact with the gate electrode, and further having in contact with the dielectric layer, a structure containing at least an emissive layer, a source electrode and a drain electrode.

3. The organic light-emitting field-effect transistor according to claim 2, having a structure wherein a charge transport layer is in contact with the dielectric layer, and the emissive layer is in contact with the charge transport layer.

4. The organic light-emitting field-effect transistor according to claim 2, having a structure wherein an interfacial layer is in contact with the dielectric layer, and the emissive layer is in contact with the interfacial layer.

5. The organic light-emitting field-effect transistor according to claim 2, having a structure wherein a charge transport layer is in contact with the dielectric layer, an interfacial layer is in contact with the charge transport layer, and the emissive layer is in contact with the interfacial layer.

6. The organic light-emitting field-effect transistor according to any one of claims 2 to 5, wherein the emissive layer is superposed on at least one of the source electrode and the drain electrode, or the emissive layer is superposed on at least one layer superposed on at least one of the source electrode and the drain electrode.

7. The organic light-emitting field-effect transistor according to any one of claims 2 to 5, wherein at least one of the source electrode and the drain electrode is formed on the emissive layer, or at least one of the source electrode and the drain electrode is formed on at least one layer superposed on the emissive layer.

8. The organic light-emitting field-effect transistor according to claim 7, having a structure wherein an interfacial layer is in contact with the emissive layer, and the at least one of the source electrode and the drain electrode is in contact with the interfacial layer.

9. The organic light-emitting field-effect transistor according to claim 7 or 8, wherein the at least one of the source electrode and the drain electrode is a transparent or semi-transparent electrode.

10. The organic light-emitting field-effect transistor according to claim 9, wherein the transparent or semi-transparent electrode is a gold electrode.

11. The organic light-emitting field-effect transistor according to any one of claims 2 to 6, wherein the emissive layer is superposed on the source electrode and the drain electrode, or the emissive layer is superposed on at least one layer superposed on the source electrode or the drain electrode.

12. The organic light-emitting field-effect transistor according to any one of claims 2 to 11, wherein the source electrode and the drain electrode are formed on the same layer.

13. The organic light-emitting field-effect transistor according to claim 11 or 12, wherein the source electrode and the drain electrode have the same work function.

14. The organic light-emitting field-effect transistor according to any one of claims 11 to 13, wherein the source electrode and the drain electrode have the same shape and the same layer configuration.

15. The organic light-emitting field-effect transistor according to any one of claims 2 to 10, wherein the source electrode and the drain electrode each are formed on a different layer.

16. The organic light-emitting field-effect transistor according to claim 15, wherein the source electrode and the drain electrode each have a different work function.

17. The organic light-emitting field-effect transistor according to claim 15 or 16, wherein the emissive layer is superposed on one electrode selected from the source electrode and the drain electrode, or the emissive layer is superposed on at least one layer superposed on the one electrode, and

the other electrode of the source electrode and the drain electrode is formed on the emissive layer, or the other electrode is formed on at least one layer superposed on the emissive layer.

18. The organic light-emitting field-effect transistor according to claim 17, further having a charge transport layer in contact with the one electrode selected from the source electrode and the drain electrode.

19. The organic light-emitting field-effect transistor according to any one of claims 1 to 18, which is a p-type transistor.

20. The organic light-emitting field-effect transistor according to any one of claims 1 to 18, which is an n-type transistor.

21. The organic light-emitting field-effect transistor according to any one of claims 1 to 18, which is a bipolar transistor.

22. The organic light-emitting field-effect transistor according to any one of claims 1 to 21, wherein the emissive layer contains the delayed fluorescent material.

23. The organic light-emitting field-effect transistor according to any one of claims 1 to 22, wherein the ON/OFF ratio is more than 10⁵.

24. The organic light-emitting field-effect transistor according to any one of claims 1 to 23, wherein the mobility is more than 0.1 cn^V ¹.

25. A method for adjusting the recombination zone of an organic light-emitting field-effect transistor having a gate electrode, and a dielectric layer in contact with the gate electrode, and further having in contact with the dielectric layer, a structure containing at least an emissive layer containing a delayed fluorescent material and a source electrode, and still further having a drain electrode on the structure, wherein the method includes forming an interfacial layer between the emissive layer and the drain electrode.

26. A method for adjusting the recombination zone of an organic light-emitting field-effect transistor having a gate electrode, and a dielectric layer in contact with the gate electrode, and further having in contact with the dielectric layer, a structure containing an emissive layer containing a delayed fluorescent material and a source electrode, and still further having a drain electrode on the structure, wherein the method includes forming an interfacial layer between the charge transport layer and the emissive layer.

27. The method according to claim 25 or 26, which is for expanding the recombination zone of the organic light-emitting field-effect transistor.

28. The method according to any one of claims 25 to 27, which is for expanding the emission area of the organic light-emitting field-effect transistor.