WO2019127003A1 - 图像编码方法、装置以及电子设备 - Google Patents

图像编码方法、装置以及电子设备 Download PDF

Info

Publication number
WO2019127003A1
WO2019127003A1 PCT/CN2017/118583 CN2017118583W WO2019127003A1 WO 2019127003 A1 WO2019127003 A1 WO 2019127003A1 CN 2017118583 W CN2017118583 W CN 2017118583W WO 2019127003 A1 WO2019127003 A1 WO 2019127003A1
Authority
WO
WIPO (PCT)
Prior art keywords
block
frequency domain
blocks
sub
residual coefficient
Prior art date
Application number
PCT/CN2017/118583
Other languages
English (en)
French (fr)
Inventor
朱建清
姚杰
蔡文婷
Original Assignee
富士通株式会社
朱建清
姚杰
蔡文婷
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社, 朱建清, 姚杰, 蔡文婷 filed Critical 富士通株式会社
Priority to CN201780091732.8A priority Critical patent/CN110731081B/zh
Priority to PCT/CN2017/118583 priority patent/WO2019127003A1/zh
Publication of WO2019127003A1 publication Critical patent/WO2019127003A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals

Definitions

  • Embodiments of the present invention relate to the field of video image technologies, and in particular, to an image encoding method, apparatus, and electronic device.
  • a video coding (also referred to as image coding) standard eg, MPEG 2, H.264/AVC, H.265/HEVC, etc.
  • image coding for an image region to be encoded
  • a coding unit e.g., a coding unit (CU)
  • CU coding unit
  • CB coding block
  • the corresponding information for example, prediction information, residual coefficients, etc.
  • the bit cost of the coding may be reduced.
  • the CB may be further divided and transformed to form one or more transform units (TUs) or may also be referred to as transform blocks (TBs).
  • TUs transform units
  • TBs transform blocks
  • the CB may be divided into one or more TBs having the same size, and such a structure may be referred to as a Uniform Transform Unit (UTU) structure.
  • UTU Uniform Transform Unit
  • each TB may be the same; that is, the TB may be a square, and the size of the TB may be, for example, 2N ⁇ 2N, N ⁇ N, 1/2N ⁇ 1/2N (the unit is, for example, a pixel) ⁇ pixel, or sample point ⁇ sample point), and so on.
  • CBs can be divided differently using different UTU modes.
  • the residual coefficient of the TB may be mapped to form a residual coefficient of the frequency domain block (FB, Frequency-domain Block) (also referred to as TB to FB for short). Mapping); then the bit stream encoding can be performed on the mapped residual coefficients.
  • FB Frequency-domain Block
  • the inventor has found that in HEVC, in order to save the number of bits of the residual coefficient, for each basic unit of the residual coefficient in the CB (for example, a 4 ⁇ 4 sub-block, the unit is a sampling point ⁇ sampling point), the hidden can be used. Sign bit (SBH, Sign Bit Hidden). However, if the UTU structure is mapped to TB to FB, the residual coefficients of a certain original sub-block will be mapped into different sub-blocks, which causes the SBH to be no longer valid, resulting in loss of compression efficiency.
  • SBH Sign Bit Hidden
  • Embodiments of the present invention provide an image encoding method, apparatus, and electronic device. Mapping the residual coefficients of the plurality of TBs in the CB to the residual coefficients of the plurality of FBs in units of basic units (for example, 4 ⁇ 4 sub-blocks) corresponding to the hidden sign bits; that is, each basic unit is treated as a whole Map so that the corresponding SBH will continue to be valid without loss of compression efficiency.
  • basic units for example, 4 ⁇ 4 sub-blocks
  • an image encoding method including:
  • the mapped residual coefficients are encoded into the bitstream.
  • an image encoding apparatus including:
  • dividing portion that divides the encoded block of the image into a plurality of transform blocks having a uniform transform unit structure; wherein each of the basic units of the residual coefficients of the encoded block is provided with a hidden sign bit;
  • a transforming unit that maps residual coefficients of the plurality of transform blocks to residual coefficients of a plurality of frequency domain blocks in units of the basic unit
  • An encoding unit that encodes the mapped residual coefficients into a bitstream.
  • an electronic device including:
  • An encoder comprising the image encoding device of the second aspect
  • a decoder that receives a bitstream of an image and decodes the image.
  • An advantageous effect of the embodiments of the present invention is that the residual coefficients of the plurality of TBs in the CB are mapped to the residual coefficients of the plurality of FBs in units of basic units (for example, 4 ⁇ 4 sub-blocks) corresponding to the hidden symbol bits.
  • basic units for example, 4 ⁇ 4 sub-blocks
  • 1 is an exemplary diagram in which a square CB is divided into one or more TBs under a UTU structure
  • FIG. 2 is an exemplary diagram of a non-square CB divided into one or more TBs in a UTU structure
  • 3 is another example diagram in which a non-square CB under the UTU structure is divided into one or more TBs;
  • FIG. 4 is a schematic diagram of an image encoding method according to an embodiment of the present invention.
  • FIG. 5 is a diagram showing an example of TB to FB mapping according to an embodiment of the present invention.
  • FIG. 6 is a diagram showing an example in which a CB is divided into a plurality of FBGs according to an embodiment of the present invention
  • FIG. 7 is a diagram showing an example of how FBG is divided according to an embodiment of the present invention.
  • FIG. 8 is a schematic diagram of an image encoding apparatus according to an embodiment of the present invention.
  • FIG. 9 is a schematic diagram of an electronic device in accordance with an embodiment of the present invention.
  • the terms “first”, “second”, etc. are used to distinguish different elements from the title, but do not indicate the spatial arrangement or chronological order of the elements, and these elements should not be used by these terms. Limited.
  • the term “and/or” includes any and all combinations of one or more of the associated listed terms.
  • the terms “comprising,” “comprising,” “having,” or “an” are used to distinguish different elements from the title, but do not indicate the spatial arrangement or chronological order of the elements, and these elements should not be used by these terms. Limited.
  • the term “and/or” includes any and all combinations of one or more of the associated listed terms.
  • one CB can be divided into one or more TBs, and all TBs can have the same size.
  • the residual coefficients of the TB may be encoded one by one; for example, in a certain TB, a two-dimensional (2D) residual coefficient array may be mapped into one-dimensional information in a certain scanning manner before being encoded, and then the one is Dimension information is encoded into the bitstream.
  • FIG. 1 is an exemplary diagram in which a square CB is divided into one or more TBs in a UTU structure.
  • the CB has a size of 2N ⁇ 2N, and can be directly divided into a 2N ⁇ 2N TB, or Divided into four N ⁇ N TB, or can also be divided into 16 1/2N ⁇ 1/2N TB, or can also be divided into 64 1/4N ⁇ 1/4N TB, and so on; until allowed The smallest TB size (for example, 4 x 4 sub-blocks in HEVC).
  • FIG. 2 is an exemplary diagram of a non-square CB divided into one or more TBs in a UTU structure.
  • the size of the CB is 2 m ⁇ 2 n (m>n), which can be directly divided into one.
  • 2 m ⁇ 2 n TB or can be divided into 2 mn 2N ⁇ 2N TB, or can be divided into 4 ⁇ 2 mn N ⁇ N TB, or can be divided into 16 ⁇ 2 mn 1 / 2N x 1/2N TB, etc.; until the minimum allowed TB size (eg 4x4 sub-blocks in HEVC).
  • FIG. 3 is another example diagram in which a non-square CB in the UTU structure is divided into one or more TBs.
  • the size of the CB is 2 n ⁇ 2 m (m>n), which can be directly divided into A 2 n ⁇ 2 m TB, or it can be divided into 2 mn 2N ⁇ 2N TB, or can be divided into 4 ⁇ 2 mn N ⁇ N TB, or can be divided into 16 ⁇ 2 mn 1 /2N x 1/2N TB, etc.; until the minimum allowed TB size (eg 4x4 sub-blocks in HEVC).
  • Embodiments of the present invention provide an image encoding method.
  • Fig. 4 is a diagram showing an image encoding method according to an embodiment of the present invention, and a CB is explained from the encoding side. As shown in FIG. 4, the image encoding method includes:
  • Step 401 Divide a coding block of an image into a plurality of transform blocks having a uniform transform unit structure; wherein a hidden symbol bit is set for each basic unit of the residual coefficient of the coding block;
  • Step 402 mapping residual coefficients of the plurality of transform blocks into residual coefficients of a plurality of frequency domain blocks in units of the basic unit;
  • Step 403 encoding the mapped residual coefficients into the bitstream.
  • the basic unit is a sub-block of L ⁇ L (unit is, for example, a sampling point ⁇ sampling point), and L is a natural number.
  • L is a natural number.
  • the sub-block having the basic unit of 4 ⁇ 4 will be described as an example, but the present invention is not limited thereto.
  • each 4 ⁇ 4 sub-block may be mapped as a whole, whereby the residual coefficients of a certain original sub-block are still mapped to the same sub-block. In this way, SBH continues to be effective.
  • operations such as prediction, transform, and quantization may be performed on each TB having a UTU structure to obtain corresponding residual coefficients; wherein each basic unit of the residual coefficients in the CB (for example, a 4 ⁇ 4 sub-block) Set with SBH.
  • CB for example, a 4 ⁇ 4 sub-block
  • bit stream encoding of the image information such as the prediction information and the residual coefficient, in the image region to be encoded may be implemented by any of the related technologies, and the present invention does not limit this.
  • the UTU structure and specific contents such as CB, TB, and FB, reference may be made to related technologies, and details are not described herein again.
  • the coding block has M ⁇ N transform blocks before mapping, each transform block has S ⁇ S basic units (for example, 4 ⁇ 4 sub-blocks); the coding block has S ⁇ S frequency domains after mapping Block, each frequency domain block has M ⁇ N of the basic units; wherein M, N, and S are natural numbers, and the basic unit is L ⁇ L sub-blocks.
  • FB[] represents the position of the sample point after the mapping
  • TB[] represents the position of the sample point before the mapping
  • p and q are natural numbers from 0 to S-1
  • m is 0 to The natural number of M-1
  • n is a natural number from 0 to N-1
  • x and y are natural numbers from 0 to L-1.
  • FIG. 4 is only illustrative of an embodiment of the invention, but the invention is not limited thereto.
  • the order of execution between the various steps can be appropriately adjusted, and other steps can be added or some of the steps can be reduced.
  • Those skilled in the art can appropriately modify the above based on the above contents, and are not limited to the above description of FIG.
  • FIG. 5 is a diagram showing an example of TB to FB mapping according to an embodiment of the present invention.
  • a TB to FB mapping is performed in units of 4 ⁇ 4 sub-blocks, and the residual coefficient of a certain original sub-block is still It is mapped to the same sub-block, so that the SBH continues to be valid, so that there is no loss in compression efficiency.
  • UT to FB mapping can be performed on the UTU structure, which can concentrate the energy of the symbols and reduce the bit cost of the encoding.
  • the coding bit can be further used to further improve the coding efficiency.
  • the coding block may be encoded as a whole (ie, as a unit); for each of the frequency domain blocks, a first identity bit (hereinafter referred to as CFBF) may be used to indicate whether there is an all-zero residual Difference coefficient.
  • CFBF first identity bit
  • the first value of the first identifier bit indicates that at least one sub-block in the frequency domain block has a non-zero residual coefficient
  • the second value of the first identifier bit indicates the frequency domain block. All sub-blocks in the block do not have a non-zero residual coefficient.
  • a certain FB includes 4 ⁇ 4 sub-blocks (each sub-block is 4 ⁇ 4); wherein one sub-block has a non-zero residual coefficient, the CFBF corresponding to the FB is 1. If none of the 16 sub-blocks of the FB have a non-zero residual coefficient, the CFBF corresponding to the FB is zero.
  • the first identifier bit when the first identifier bit is the first value, encoding a residual coefficient of the corresponding frequency domain block; where the first identifier bit is the first In the case of two values, the residual coefficients of the corresponding frequency domain block are not encoded.
  • the bit coefficient of the residual coefficient of the FB needs to be bit-coded; if the CFBF corresponding to the FB is 0, the residual of the FB may not be used.
  • the coefficients are bitstream encoded. Thereby, the bit cost of the bit stream can be reduced as much as possible.
  • the present invention is not limited thereto; for example, the first value may be 0 and the second value may be 1.
  • the flag may also use two or more bits, which is not limited by the present invention.
  • a plurality of frequency domain blocks in the coded block are scanned in the same manner as a plurality of sample points in the basic unit.
  • the scanning method of a plurality of sub-blocks in a certain FB may be the same as or different from the above two scanning methods.
  • the scan mode can be represented by scanIdx.
  • the coding block may be divided into a plurality of frequency domain block groups (FBG, FBGroup) for encoding.
  • FBG frequency domain block groups
  • FBGroup frequency domain block groups
  • each FBG in a certain CB may have the same size; how to specifically divide the FBG may be determined according to the size of the FB and the number of FBs in the CB, for example, the number of FBGs may be determined according to M, N, and S. .
  • FIG. 7 is a diagram showing an example of how the FBG is divided in the embodiment of the present invention. As shown in FIG. 7, for example, in the case where S is 2 or M ⁇ N is less than 16, CB can be divided into 2 ⁇ 2 FBGs; in the case where M ⁇ N is greater than or equal to 16, CB can be divided into 4 x 4 FBGs.
  • the present invention is not limited thereto, and the FBG may be divided according to actual needs.
  • a second flag (hereinafter referred to as CFBGF) may be used to indicate whether there is a residual coefficient of all zeros.
  • the first value of the second identifier bit indicates that at least one sub-block in the frequency domain block group has a non-zero residual coefficient, and the second value of the second identifier bit indicates the frequency domain. All sub-blocks in a block group do not have a non-zero residual coefficient.
  • a certain FBG includes 2 ⁇ 2 FBs, and each FB includes 2 ⁇ 2 sub-blocks (each sub-block is 4 ⁇ 4); wherein there is one FB having a non-zero residual coefficient, then the CFBGF corresponding to the FBG Is 1. If none of the four FBs of the FB have a non-zero residual coefficient, the CFBGF corresponding to the FB is zero.
  • the second identifier bit is the first value
  • encoding a residual coefficient of the corresponding frequency domain block group where the second identifier bit is In the case of the second value, the residual coefficients of the corresponding frequency domain block group are not encoded.
  • the bit coefficient of the residual coefficient of the FBG needs to be bitstream; if the CFBGF corresponding to the FBG is 0, the residual of the FBG may not be used.
  • the coefficients are bitstream encoded. Thereby, the bit cost of the bit stream can be reduced as much as possible.
  • the first value of CFBGF is 1 and the second value is 0.
  • the present invention is not limited thereto; for example, the first value may be 0 and the second value is 1.
  • the flag may also use two or more bits, which is not limited by the present invention.
  • the first embodiment described above may also be adopted, that is, the first identifier CFBF may be adopted.
  • a scanning manner of a plurality of frequency domain block groups in the coding block and a scanning manner of a plurality of frequency domain blocks in the frequency domain block group and the Multiple sample points in the base unit are scanned in the same way.
  • the scanning manner of a plurality of sub-blocks in a certain FB may be the same as or different from the above three scanning methods.
  • the scan mode can be represented by scanIdx.
  • each CB may correspond to only one scanning mode (indicated by scanIdx), that is, a scanning mode of a plurality of FBs or BFGs in the CB.
  • the scanIdx may be included in the information of the intra prediction mode, such as intra prediction mode in HEVC; or the scanIdx may also be encoded as a syntax element of the coding block, ie the scanIdx may be explicitly indicated using a syntax element.
  • the present invention is schematically illustrated by taking only one CB as an example.
  • the above steps may be separately used for encoding.
  • the above has only described various steps or processes related to the present invention, but the present invention is not limited thereto.
  • the image encoding method may also include other steps or processes, and the specific content of these steps or processes may refer to the prior art.
  • the bit stream can be received correspondingly at the decoding end and decoded accordingly, and details are not described herein again.
  • the residual coefficients of the plurality of TBs in the CB are mapped to the residual coefficients of the plurality of FBs in units of basic units (for example, 4 ⁇ 4 sub-blocks) corresponding to the hidden sign bits.
  • Embodiments of the present invention provide an image encoding apparatus.
  • the device may be, for example, an electronic device for image processing or video processing, or may be some or some component or component of the electronic device.
  • the same contents of the second embodiment as those of the first embodiment will not be described again.
  • FIG. 8 is a schematic diagram of an image encoding apparatus according to an embodiment of the present invention. As shown in FIG. 8, the image encoding apparatus 800 includes:
  • a dividing section 801 that divides a coding block of an image into a plurality of transform blocks having a uniform transform unit structure; wherein each base unit of the residual coefficient of the coded block is provided with a hidden sign bit;
  • a transforming unit 802 that maps residual coefficients of the plurality of transform blocks to residual coefficients of a plurality of frequency domain blocks in units of the basic unit;
  • the coding unit 803 encodes the mapped residual coefficients into the bitstream.
  • the basic unit is a 4 ⁇ 4 sub-block; however, the invention is not limited thereto.
  • the coding block is encoded as a whole; for each of the frequency domain blocks, a first identification bit is used to indicate whether there is a residual coefficient of all zeros.
  • the first value of the first identifier bit indicates that at least one sub-block in the frequency domain block has a non-zero residual coefficient
  • the second value of the first identifier bit indicates the frequency domain block. All sub-blocks in the block do not have a non-zero residual coefficient.
  • the coding block is divided into a plurality of frequency domain block groups for encoding; for each frequency domain block group, a second flag is used to indicate whether there is a residual coefficient of all zeros.
  • the first value of the second identifier bit indicates that at least one sub-block in the frequency domain block group has a non-zero residual coefficient
  • the second value of the second identifier bit indicates the frequency domain. All sub-blocks in a block group do not have a non-zero residual coefficient.
  • connection relationship or signal direction between the various components or modules is exemplarily shown in FIG. 8, but it should be clear to those skilled in the art that various related technologies such as a bus connection can be employed.
  • the above various components or modules may be implemented by hardware facilities such as a processor, a memory, etc.; the implementation of the present invention is not limited thereto.
  • the image encoding device 800 may also include other components or modules, and for the specific content of these components or modules, reference may be made to related art.
  • the residual coefficients of the plurality of TBs in the CB are mapped to the residual coefficients of the plurality of FBs in units of basic units (for example, 4 ⁇ 4 sub-blocks) corresponding to the hidden sign bits.
  • An embodiment of the present invention further provides an electronic device that performs image processing or video processing, including an encoder and a decoder.
  • the encoder comprises the image encoding device as described in Embodiment 2.
  • electronic device 900 can include a processor 901 and a memory 902; memory 902 is coupled to processor 901.
  • the memory 902 can store various data; in addition, a program 903 for information processing is stored, and the program 903 is executed under the control of the processor 901.
  • the electronic device 900 can be used as an encoder, and the functions of the image encoding device 800 can be integrated into the processor 901.
  • the processor 901 can be configured to implement the image encoding method as described in Embodiment 1.
  • the processor 901 may be configured to perform control of dividing a coded block of an image into a plurality of transform blocks having a uniform transform unit structure; wherein each base unit of the residual coefficient of the coded block is hidden a symbol bit; mapping the residual coefficients of the plurality of transform blocks to residual coefficients of the plurality of frequency domain blocks in units of the basic unit; and encoding the mapped residual coefficients into the bitstream.
  • the base unit is a sub-block of 4 sample points x 4 sample points.
  • the coding block has M ⁇ N transform blocks before the mapping, each transform block has S ⁇ S basic units; the coding block has S ⁇ S after the mapping
  • Each of the frequency domain blocks has M ⁇ N of the basic units; wherein M, N, and S are natural numbers, and the basic unit is a sub-block of L sampling points ⁇ L sampling points.
  • FB[] represents the position of the sample point after the mapping
  • TB[] represents the position of the sample point before the mapping
  • p and q are natural numbers from 0 to S-1
  • m is 0 to The natural number of M-1
  • n is a natural number from 0 to N-1
  • x and y are natural numbers from 0 to L-1.
  • the coding block is encoded as a whole; for each of the frequency domain blocks, a first identification bit is used to indicate whether there is a residual coefficient of all zeros.
  • the first value of the first identifier bit indicates that at least one sub-block in the frequency domain block has a non-zero residual coefficient
  • the second value of the first identifier bit represents All sub-blocks in the frequency domain block do not have a non-zero residual coefficient
  • the processor 901 may be further configured to: perform control on a residual coefficient of the corresponding frequency domain block if the first identifier bit is the first value Encoding; in a case where the first identifier bit is the second value, the residual coefficient of the corresponding frequency domain block is not encoded.
  • the processor 901 may be further configured to perform control: when encoding the coded block, a plurality of frequency domain blocks in the coded block are scanned in a manner different from the basic unit The sampling points are scanned in the same way.
  • the coding block is divided into a plurality of frequency domain block groups for encoding; for each frequency domain block group, a second flag is used to indicate whether there is a residual coefficient of all zeros.
  • the first value of the second identifier bit indicates that at least one sub-block in the frequency domain block group has a non-zero residual coefficient
  • the second value of the second identifier bit represents All sub-blocks in the frequency domain block group do not have non-zero residual coefficients.
  • the processor 901 may be further configured to perform control on: a residual coefficient of the corresponding frequency domain block group if the second identifier bit is the first value Performing coding; if the second identifier bit is the second value, the residual coefficient of the corresponding frequency domain block group is not encoded.
  • the processor 901 may be further configured to perform control of: scanning the plurality of frequency domain block groups in the coding block and the frequency domain block when encoding the coding block
  • the scanning manner of the plurality of frequency domain blocks in the group and the scanning manner of the plurality of sampling points in the basic unit are the same.
  • the scanning mode of the plurality of frequency blocks or frequency block groups in the coding block is included in the information of the intra prediction mode or is encoded as a syntax element of the coding block.
  • the electronic device 900 may further include: an input/output (I/O) device 904, a display 905, and the like; wherein the functions of the above components are similar to those of the prior art, and are not described herein again. It should be noted that the electronic device 900 does not have to include all the components shown in FIG. 9; in addition, the electronic device 900 may further include components not shown in FIG. 9, and reference may be made to related art.
  • I/O input/output
  • An embodiment of the present invention provides a computer readable program, wherein the program causes the encoder or electronic device to perform the image encoding method as described in Embodiment 1 when the program is executed in an encoder or an electronic device.
  • An embodiment of the present invention provides a storage medium storing a computer readable program, wherein the computer readable program causes an encoder or an electronic device to execute the image encoding method as described in Embodiment 1.
  • the above apparatus and method of the present invention may be implemented by hardware or by hardware in combination with software.
  • the present invention relates to a computer readable program that, when executed by a logic component, enables the logic component to implement the apparatus or components described above, or to cause the logic component to implement the various methods described above Or steps.
  • the present invention also relates to a storage medium for storing the above program, such as a hard disk, a magnetic disk, an optical disk, a DVD, a flash memory, or the like.
  • the method/apparatus described in connection with the embodiments of the invention may be embodied directly in hardware, a software module executed by a processor, or a combination of both.
  • one or more of the functional blocks shown in the figures and/or one or more combinations of the functional blocks may correspond to the various software modules of the computer program flow or to the various hardware modules.
  • These software modules may correspond to the respective steps shown in the figures.
  • These hardware modules can be implemented, for example, by curing these software modules using a Field Programmable Gate Array (FPGA).
  • FPGA Field Programmable Gate Array
  • the software module can reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
  • a storage medium can be coupled to the processor to enable the processor to read information from, and write information to, the storage medium; or the storage medium can be an integral part of the processor.
  • the processor and the storage medium can be located in an ASIC.
  • the software module can be stored in the memory of the mobile terminal or in a memory card that can be inserted into the mobile terminal.
  • the software module can be stored in the MEGA-SIM card or a large-capacity flash memory device.
  • One or more of the functional blocks described in the figures and/or one or more combinations of functional blocks may be implemented as a general purpose processor, digital signal processor (DSP) for performing the functions described herein.
  • DSP digital signal processor
  • ASIC application specific integrated circuit
  • FPGA field programmable gate array
  • One or more of the functional blocks described with respect to the figures and/or one or more combinations of functional blocks may also be implemented as a combination of computing devices, eg, a combination of a DSP and a microprocessor, multiple microprocessors One or more microprocessors in conjunction with DSP communication or any other such configuration.

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

一种图像编码方法、装置以及电子设备。所述图像编码方法包括：将图像的编码块划分为具有均匀变换单元结构的多个变换块；其中对于所述编码块的残差系数的每个基本单元设置有隐藏符号位；以所述基本单元为单位将所述多个变换块的残差系数映射为多个频率域块的残差系数；以及将映射后的所述残差系数编码到比特流中。由此，不仅能够对UTU结构进行TB到FB的映射，可以集中符号的能量并且降低编码的比特代价；而且每个基本单元作为一个整体被映射，从而对应的SBH将继续有效，不会带来压缩效率上的损失。

Description

图像编码方法、装置以及电子设备 技术领域
本发明实施例涉及视频图像技术领域，特别涉及一种图像编码方法、装置以及电子设备。
背景技术
在视频编码(也可称为图像编码)标准(例如MPEG 2，H.264/AVC，H.265/HEVC，等等)中，对于待编码图像区域，例如一个编码单元(CU，coding Unit)或者也可称为编码块(CB，Coding Block)，可以将相应的信息(例如预测信息、残差系数等)进行比特流编码，可以减少编码的比特代价(bit cost)。
目前为了进一步降低比特代价，可以将CB进行进一步划分并变换，形成一个或多个变换单元(TU，Transform Unit)或者也可称为变换块(TB，Transform Block)。例如，可以将CB划分为一个或多个具有相同大小的TB，这种结构可以被称为均匀变换单元(UTU，Uniform Transform Unit)结构。
对于UTU结构，每个TB的高度和宽度可以相同；即TB可以呈正方形，TB的大小(size)例如可以为：2N×2N、N×N、1/2N×1/2N(单位例如为像素×像素，或者采样点×采样点)，等等。此外，可以采用不同的UTU模式对CB进行不同的划分。
另一方面，为了集中符号的能量，还可以将TB的残差系数(residual coefficient)进行映射而形成频率域块(FB，Frequency-domain Block)的残差系数(也可以简称为TB到FB的映射)；然后可以对映射后的残差系数进行比特流编码。
应该注意，上面对技术背景的介绍只是为了方便对本发明的技术方案进行清楚、完整的说明，并方便本领域技术人员的理解而阐述的。不能仅仅因为这些方案在本发明的背景技术部分进行了阐述而认为上述技术方案为本领域技术人员所公知。
发明内容
发明人发现：目前在HEVC中，为了节省残差系数的比特数，针对CB中残差系数的每个基本单元(例如4×4的子块，单位为采样点×采样点)，可以使用隐藏符号位(SBH，Sign Bit Hidden)。但是，如果对UTU结构进行TB到FB的映射，则某个原 始子块的各残差系数将被映射到不同的子块中，这样导致SBH不再有效，从而带来压缩效率上的损失。
本发明实施例提供一种图像编码方法、装置以及电子设备。以对应隐藏符号位的基本单元(例如4×4的子块)为单位，将CB中的多个TB的残差系数映射为多个FB的残差系数；即每个基本单元作为一个整体被映射，从而对应的SBH将继续有效，不会带来压缩效率上的损失。
根据本发明实施例的第一个方面，提供一种图像编码方法，包括：
将图像的编码块划分为具有均匀变换单元结构的多个变换块；其中对于所述编码块的残差系数的每个基本单元设置有隐藏符号位；
以所述基本单元为单位将所述多个变换块的残差系数映射为多个频率域块的残差系数；以及
将映射后的所述残差系数编码到比特流中。
根据本发明实施例的第二个方面，提供一种图像编码装置，包括：
划分部，其将图像的编码块划分为具有均匀变换单元结构的多个变换块；其中对于所述编码块的残差系数的每个基本单元设置有隐藏符号位；
变换部，其以所述基本单元为单位将所述多个变换块的残差系数映射为多个频率域块的残差系数；以及
编码部，其将映射后的所述残差系数编码到比特流中。
根据本发明实施例的第三个方面，提供一种电子设备，包括：
编码器，其包括如第二方面所述的图像编码装置；以及
解码器，其接收图像的比特流并且对所述图像进行解码。
本发明实施例的有益效果在于：以对应隐藏符号位的基本单元(例如4×4的子块)为单位，将CB中的多个TB的残差系数映射为多个FB的残差系数。由此，不仅能够对UTU结构进行TB到FB的映射，可以集中符号的能量并且降低编码的比特代价；而且每个基本单元作为一个整体被映射，从而对应的SBH将继续有效，不会带来压缩效率上的损失。
参照后文的说明和附图，详细公开了本发明的特定实施方式，指明了本发明的原理可以被采用的方式。应该理解，本发明的实施方式在范围上并不因而受到限制。在所附权利要求的精神和条款的范围内，本发明的实施方式包括许多改变、修改和等同。
针对一种实施方式描述和/或示出的特征可以以相同或类似的方式在一个或更多个其它实施方式中使用，与其它实施方式中的特征相组合，或替代其它实施方式中的特征。
应该强调，术语“包括/包含”在本文使用时指特征、整件、步骤或组件的存在，但并不排除一个或更多个其它特征、整件、步骤或组件的存在或附加。
附图说明
在本发明实施例的一个附图或一种实施方式中描述的元素和特征可以与一个或更多个其它附图或实施方式中示出的元素和特征相结合。此外，在附图中，类似的标号表示几个附图中对应的部件，并可用于指示多于一种实施方式中使用的对应部件。
图1是UTU结构下正方形的CB被划分为一个或多个TB的示例图；
图2是UTU结构下非正方形的CB被划分为一个或多个TB的一个示例图；
图3是UTU结构下非正方形的CB被划分为一个或多个TB的另一个示例图；
图4是本发明实施例的图像编码方法的示意图；
图5是本发明实施例的TB到FB映射的示例图；
图6是本发明实施例的CB被划分为多个FBG的示例图；
图7是本发明实施例的FBG如何划分的示例图；
图8是本发明实施例的图像编码装置的示意图；
图9是本发明实施例的电子设备的示意图。
具体实施方式
参照附图，通过下面的说明书，本发明的前述以及其它特征将变得明显。在说明书和附图中，具体公开了本发明的特定实施方式，其表明了其中可以采用本发明的原则的部分实施方式，应了解的是，本发明不限于所描述的实施方式，相反，本发明包括落入所附权利要求的范围内的全部修改、变型以及等同物。
在本发明实施例中，术语“第一”、“第二”等用于对不同元素从称谓上进行区分，但并不表示这些元素的空间排列或时间顺序等，这些元素不应被这些术语所限制。术语“和/或”包括相关联列出的术语的一种或多个中的任何一个和所有组合。术语“包含”、“包括”、“具有”等是指所陈述的特征、元素、元件或组件的存在，但并 不排除存在或添加一个或多个其他特征、元素、元件或组件。
在本发明实施例中，单数形式“一”、“该”等包括复数形式，应广义地理解为“一种”或“一类”而并不是限定为“一个”的含义；此外术语“所述”应理解为既包括单数形式也包括复数形式，除非上下文另外明确指出。此外术语“根据”应理解为“至少部分根据……”，术语“基于”应理解为“至少部分基于……”，除非上下文另外明确指出。
在UTU结构中，一个CB能够被划分成一个或多个TB，所有的TB可以具有相同的大小。可以逐个地对TB的残差系数进行编码；例如在某个TB中，在被编码之前可以将二维(2D)的残差系数阵列以某种扫描方式映射为一维信息，然后将该一维信息编码到比特流中。
图1是UTU结构下正方形的CB被划分为一个或多个TB的示例图，如图1所示，该CB的大小为2N×2N，可以直接划分为一个2N×2N的TB，或者也可以划分为四个N×N的TB，或者还可以划分为16个1/2N×1/2N的TB，或者还可以划分为64个1/4N×1/4N的TB，等等；直到被允许的最小的TB大小(例如HEVC中的4×4的子块)。
图2是UTU结构下非正方形的CB被划分为一个或多个TB的一个示例图，如图2所示，该CB的大小为2 m×2 n(m>n)，可以直接划分为一个2 m×2 n的TB，或者也可以划分为2 m-n个2N×2N的TB，或者还可以划分为4×2 m-n个N×N的TB，或者还可以划分为16×2 m-n个1/2N×1/2N的TB，等等；直到被允许的最小的TB大小(例如HEVC中的4×4的子块)。
图3是UTU结构下非正方形的CB被划分为一个或多个TB的另一个示例图，如图3所示，该CB的大小为2 n×2 m(m>n)，可以直接划分为一个2 n×2 m的TB，或者也可以划分为2 m-n个2N×2N的TB，或者还可以划分为4×2 m-n个N×N的TB，或者还可以划分为16×2 m-n个1/2N×1/2N的TB，等等；直到被允许的最小的TB大小(例如HEVC中的4×4的子块)。
以上对UTU结构进行了示例性说明，以下对于本发明进行说明。
实施例1
本发明实施例提供一种图像编码方法。图4是本发明实施例的图像编码方法的示 意图，从编码端对一个CB进行说明。如图4所示，该图像编码方法包括：
步骤401，将图像的编码块划分为具有均匀变换单元结构的多个变换块；其中对于所述编码块的残差系数的每个基本单元设置有隐藏符号位；
步骤402，以所述基本单元为单位将所述多个变换块的残差系数映射为多个频率域块的残差系数；以及
步骤403，将映射后的所述残差系数编码到比特流中。
在本实施例中，所述基本单元为L×L(单位例如为采样点×采样点)的子块，L为自然数。以下将以所述基本单元为4×4的子块为例进行说明，但本发明不限于此。在本实施例中，在进行TB到FB的映射时，可以将每个4×4的子块作为一个整体进行映射，由此某个原始子块的残差系数仍然被映射到相同的子块中，这样SBH继续有效。
在本实施例中，可以对具有UTU结构的各TB进行预测、变换和量化等运算，得到相应的残差系数；其中CB中残差系数的每个基本单元(例如4×4的子块)设置有SBH。关于残差系数的获得和映射，以及SBH的设置等内容，还可以参考相关技术。
值得注意的是，对于待编码图像区域中的预测信息、残差系数等图像信息的比特流编码，可以采用相关技术中的任意方案实现，本发明并不对此进行限制。此外，关于UTU结构以及CB、TB和FB等具体内容，可以参考相关技术，此处不再赘述。
例如，编码块在映射前具有M×N个变换块，每个变换块具有S×S个基本单元(例如4×4的子块)；所述编码块在映射后具有S×S个频率域块，每个频率域块具有M×N个所述基本单元；其中M、N、S为自然数，所述基本单元为L×L的子块。对于某个采样点[x][y]，满足如下公式：
FB[p][q][m][n][x][y]＝TB[m][n][p][q][x][y]；
其中，FB[]表示所述采样点在所述映射后的位置，TB[]表示所述采样点在所述映射前的位置；p和q为0至S-1的自然数；m为0至M-1的自然数；n为0至N-1的自然数；x和y为0至L-1的自然数。
值得注意的是，附图4仅示意性地对本发明实施例进行了说明，但本发明不限于此。例如可以适当地调整各个步骤之间的执行顺序，此外还可以增加其他的一些步骤或者减少其中的某些步骤。本领域的技术人员可以根据上述内容进行适当地变型，而 不仅限于上述附图4的记载。
图5是本发明实施例的TB到FB映射的示例图，如图5所示，例如以4×4的子块为单位进行TB到FB的映射，则某个原始子块的残差系数仍然被映射到相同的子块中，这样SBH继续有效，从而不会带来压缩效率上的损失。此外，能够对UTU结构进行TB到FB的映射，可以集中符号的能量并且降低编码的比特代价。
在本实施例中，在进行TB到FB的映射后，还可以使用标识位进一步提高编码效率。
在一个实施方式中，所述编码块可以作为整体(即作为一个单元)被编码；对于每一个所述频率域块，可以使用第一标识位(以下以CFBF表示)指示是否存在全零的残差系数。其中，所述第一标识位的第一取值表示所述频率域块中至少存在一个子块具有非零的残差系数，所述第一标识位的第二取值表示所述频率域块中所有的子块均不具有非零的残差系数。
例如，某个FB中包括4×4个子块(每个子块为4×4)；其中存在一个子块具有非零的残差系数，则该FB对应的CFBF为1。如果该FB的16个子块均不具有非零的残差系数，则该FB对应的CFBF为0。
在本实施方式中，在所述第一标识位为所述第一取值的情况下，将对应的所述频率域块的残差系数进行编码；在所述第一标识位为所述第二取值的情况下，不将对应的所述频率域块的残差系数进行编码。
例如，在进行比特流编码时，如果某个FB对应的CFBF为1，则需要对该FB的残差系数进行比特流编码；如果该FB对应的CFBF为0，则可以不对该FB的残差系数进行比特流编码。由此，可以尽量降低比特流的比特代价。
值得注意的是，以上以CFBF的第一取值为1而第二取值为0为例进行了说明，但本发明不限于此；例如第一取值也可以为0而第二取值为1，此外该标识位还可以使用两个或以上的比特，本发明不对此进行限制。
在本实施方式中，在对所述编码块进行编码时，所述编码块中的多个频率域块的扫描方式与所述基本单元中多个采样点的扫描方式相同。而对于某个FB中的多个子块的扫描方式，可以与上述两种扫描方式相同，也可以不同。
例如，该扫描方式可以用scanIdx表示。如图5所示，scanIdx＝0可以表示上右(up-right)扫描；scanIdx＝1可以表示水平(horizontal)扫描；scanIdx＝2可以表示 垂直(vertical)扫描。
例如，如果4×4的子块中各采样点的扫描方式为scanIdx＝0，则CB中的多个FB的扫描方式也为scanIdx＝0；即可以为FB[0][0]、FB[0][1]、FB[1][0]、FB[0][2]、FB[1][1]、FB[2][0]，……。
在另一个实施方式中，所述编码块可以被划分为多个频率域块组(FBG，FBGroup)进行编码。图6是本发明实施例的CB被划分为多个FBG的示例图；例如，如图6所示，可以将该CB划分为4个FBG，即FBG 0，FBG 1，FBG 2和FBG 3。
在本实施方式中，某一个CB中的各FBG可以具有相同的大小；FBG具体如何划分可以根据FB的大小以及该CB中FB的个数确定，例如FBG的数量可以根据M、N和S确定。
图7是本发明实施例的FBG如何划分的示例图。如图7所示，例如在S为2、或者M×N小于16的情况下，可以将CB划分为2×2个FBG；在M×N大于或等于16的情况下，可以将CB划分为4×4个FBG。但本发明不限于此，还可以根据实际需要划分FBG。
在本实施方式中，对于每一个频率域块组，可以使用第二标识位(以下以CFBGF表示)指示是否存在全零的残差系数。其中，所述第二标识位的第一取值表示所述频率域块组中至少存在一个子块具有非零的残差系数，所述第二标识位的第二取值表示所述频率域块组中所有的子块均不具有非零的残差系数。
例如，某个FBG中包括2×2个FB，每个FB包括2×2个子块(每个子块为4×4)；其中存在一个FB具有非零的残差系数，则该FBG对应的CFBGF为1。如果该FB的4个FB均不具有非零的残差系数，则该FB对应的CFBGF为0。
在本实施方式中，在所述第二标识位为所述第一取值的情况下，将对应的所述频率域块组的残差系数进行编码；在所述第二标识位为所述第二取值的情况下，不将对应的所述频率域块组的残差系数进行编码。
例如，在进行比特流编码时，如果某个FBG对应的CFBGF为1，则需要对该FBG的残差系数进行比特流编码；如果该FBG对应的CFBGF为0，则可以不对该FBG的残差系数进行比特流编码。由此，可以尽量降低比特流的比特代价。
值得注意的是，以上以CFBGF的第一取值为1而第二取值为0为例进行了说明，但本发明不限于此；例如第一取值也可以为0而第二取值为1，此外该标识位还可以 使用两个或以上的比特，本发明不对此进行限制。此外，对于某个FBG中的某个FB，还可以采用上述的第一种实施方式，即可以采用第一标识位CFBF。
在本实施方式中，在对所述编码块进行编码时，所述编码块中的多个频率域块组的扫描方式与所述频率域块组中多个频率域块的扫描方式以及所述基本单元中多个采样点的扫描方式相同。而对于某个FB中的多个子块的扫描方式，可以与上述三种扫描方式相同，也可以不同。
例如，该扫描方式可以用scanIdx表示。如图5所示，scanIdx＝0可以表示上右(up-right)扫描；scanIdx＝1可以表示水平(horizontal)扫描；scanIdx＝2可以表示垂直(vertical)扫描。
例如，如果4×4的子块中各采样点的扫描方式为scanIdx＝0，则CB中的多个FBG的扫描方式也为scanIdx＝0，而每个BFG中多个FB的扫描方式也可以为scanIdx＝0。
在本实施例中，每个CB可以仅对应一个扫描方式(用scanIdx表示)，即CB中的多个FB或者BFG的扫描方式。该scanIdx可以被包含在帧内预测模式的信息中，例如HEVC中的intra prediction mode；或者该scanIdx也可以作为所述编码块的语法元素被编码，即可以显式地使用语法元素指示该scanIdx。
值得注意的是，以上仅以一个CB为例对本发明进行了示意性说明，对于多个CB可以分别使用上述步骤进行编码。以上仅对与本发明相关的各步骤或过程进行了说明，但本发明不限于此。图像编码方法还可以包括其他步骤或者过程，关于这些步骤或者过程的具体内容，可以参考现有技术。此外，在解码端可以相应地接收比特流并且相应地进行解码，在此不再赘述。
由上述实施例可知，以对应隐藏符号位的基本单元(例如4×4的子块)为单位，将CB中的多个TB的残差系数映射为多个FB的残差系数。由此，不仅能够对UTU结构进行TB到FB的映射，可以集中符号的能量并且降低编码的比特代价；而且每个基本单元作为一个整体被映射，从而对应的SBH将继续有效，不会带来压缩效率上的损失。
实施例2
本发明实施例提供一种图像编码装置。该装置例如可以是用于图像处理或视频处理的电子设备，也可以是配置于电子设备的某个或某些部件或者组件。本实施例2与 实施例1相同的内容不再赘述。
图8是本发明实施例的图像编码装置的示意图，如图8所示，图像编码装置800包括：
划分部801，其将图像的编码块划分为具有均匀变换单元结构的多个变换块；其中对于所述编码块的残差系数的每个基本单元设置有隐藏符号位；
变换部802，其以所述基本单元为单位将所述多个变换块的残差系数映射为多个频率域块的残差系数；以及
编码部803，其将映射后的所述残差系数编码到比特流中。
例如，所述基本单元为4×4的子块；但本发明不限于此。
在一个实施方式中，所述编码块作为整体被编码；对于每一个所述频率域块，使用第一标识位指示是否存在全零的残差系数。例如，所述第一标识位的第一取值表示所述频率域块中至少存在一个子块具有非零的残差系数，所述第一标识位的第二取值表示所述频率域块中所有的子块均不具有非零的残差系数。
在另一个实施方式中，所述编码块被划分为多个频率域块组进行编码；对于每一个频率域块组，使用第二标识位指示是否存在全零的残差系数。例如，所述第二标识位的第一取值表示所述频率域块组中至少存在一个子块具有非零的残差系数，所述第二标识位的第二取值表示所述频率域块组中所有的子块均不具有非零的残差系数。
此外，为了简单起见，图8中仅示例性示出了各个部件或模块之间的连接关系或信号走向，但是本领域技术人员应该清楚的是，例如可以采用总线连接等各种相关技术。上述各个部件或模块可以通过例如处理器、存储器等硬件设施来实现；本发明实施并不对此进行限制。
值得注意的是，以上仅对与本发明相关的各部件或模块进行了说明，但本发明不限于此。图像编码装置800还可以包括其他部件或者模块，关于这些部件或者模块的具体内容，可以参考相关技术。
由上述实施例可知，以对应隐藏符号位的基本单元(例如4×4的子块)为单位，将CB中的多个TB的残差系数映射为多个FB的残差系数。由此，不仅能够对UTU结构进行TB到FB的映射，可以集中符号的能量并且降低编码的比特代价；而且每个基本单元作为一个整体被映射，从而对应的SBH将继续有效，不会带来压缩效率上的损失。
实施例3
本发明实施例还提供一种电子设备，该电子设备进行图像处理或视频处理，包括编码器以及解码器。其中编码器包括如实施例2所述的图像编码装置。
图9是本发明实施例的电子设备的示意图。如图9所示，电子设备900可以包括：处理器901和存储器902；存储器902耦合到处理器901。其中该存储器902可存储各种数据；此外还存储信息处理的程序903，并且在处理器901的控制下执行该程序903。
在一个实施方式中，电子设备900可以作为编码器使用，图像编码装置800的功能可以被集成到处理器901中。其中，处理器901可以被配置为实现如实施例1所述的图像编码方法。
例如，处理器901可以被配置为进行如下的控制：将图像的编码块划分为多个具有均匀变换单元结构的变换块；其中对于所述编码块的残差系数的每个基本单元设置有隐藏符号位；以所述基本单元为单位将所述多个变换块的残差系数映射为多个频率域块的残差系数；以及将映射后的所述残差系数编码到比特流中。
在一个实施方式中，所述基本单元为4采样点×4采样点的子块。
在一个实施方式中，所述编码块在所述映射前具有M×N个变换块，每个变换块具有S×S个所述基本单元；所述编码块在所述映射后具有S×S个频率域块，每个频率域块具有M×N个所述基本单元；其中M、N、S为自然数，所述基本单元为L采样点×L采样点的子块。
在一个实施方式中，对于某个采样点[x][y]，满足如下公式：
FB[p][q][m][n][x][y]＝TB[m][n][p][q][x][y]；
其中，FB[]表示所述采样点在所述映射后的位置，TB[]表示所述采样点在所述映射前的位置；p和q为0至S-1的自然数；m为0至M-1的自然数；n为0至N-1的自然数；x和y为0至L-1的自然数。
在一个实施方式中，所述编码块作为整体被编码；对于每一个所述频率域块，使用第一标识位指示是否存在全零的残差系数。
在一个实施方式中，所述第一标识位的第一取值表示所述频率域块中至少存在一个子块具有非零的残差系数，所述第一标识位的第二取值表示所述频率域块中所有的 子块均不具有非零的残差系数。
在一个实施方式中，处理器901还可以被配置为进行如下的控制：在所述第一标识位为所述第一取值的情况下，将对应的所述频率域块的残差系数进行编码；在所述第一标识位为所述第二取值的情况下，不将对应的所述频率域块的残差系数进行编码。
在一个实施方式中，处理器901还可以被配置为进行如下的控制：在对所述编码块进行编码时，所述编码块中的多个频率域块的扫描方式与所述基本单元中多个采样点的扫描方式相同。
在一个实施方式中，所述编码块被划分为多个频率域块组进行编码；对于每一个频率域块组，使用第二标识位指示是否存在全零的残差系数。
在一个实施方式中，所述第二标识位的第一取值表示所述频率域块组中至少存在一个子块具有非零的残差系数，所述第二标识位的第二取值表示所述频率域块组中所有的子块均不具有非零的残差系数。
在一个实施方式中，处理器901还可以被配置为进行如下的控制：在所述第二标识位为所述第一取值的情况下，将对应的所述频率域块组的残差系数进行编码；在所述第二标识位为所述第二取值的情况下，不将对应的所述频率域块组的残差系数进行编码。
在一个实施方式中，处理器901还可以被配置为进行如下的控制：在对所述编码块进行编码时，所述编码块中的多个频率域块组的扫描方式与所述频率域块组中多个频率域块的扫描方式以及所述基本单元中多个采样点的扫描方式相同。
在一个实施方式中，所述编码块中的多个频率块或者频率块组的扫描方式被包含在帧内预测模式的信息中，或者作为所述编码块的语法元素被编码。
此外，如图9所示，电子设备900还可以包括：输入输出(I/O)设备904和显示器905等；其中，上述部件的功能与现有技术类似，此处不再赘述。值得注意的是，电子设备900也并不是必须要包括图9中所示的所有部件；此外，电子设备900还可以包括图9中没有示出的部件，可以参考相关技术。
本发明实施例提供一种计算机可读程序，其中当在编码器或电子设备中执行所述程序时，所述程序使得所述编码器或电子设备执行如实施例1所述的图像编码方法。
本发明实施例提供一种存储有计算机可读程序的存储介质，其中所述计算机可读 程序使得编码器或电子设备执行如实施例1所述的图像编码方法。
本发明以上的装置和方法可以由硬件实现，也可以由硬件结合软件实现。本发明涉及这样的计算机可读程序，当该程序被逻辑部件所执行时，能够使该逻辑部件实现上文所述的装置或构成部件，或使该逻辑部件实现上文所述的各种方法或步骤。本发明还涉及用于存储以上程序的存储介质，如硬盘、磁盘、光盘、DVD、flash存储器等。
结合本发明实施例描述的方法/装置可直接体现为硬件、由处理器执行的软件模块或二者组合。例如，图中所示的功能框图中的一个或多个和/或功能框图的一个或多个组合，既可以对应于计算机程序流程的各个软件模块，亦可以对应于各个硬件模块。这些软件模块，可以分别对应于图中所示的各个步骤。这些硬件模块例如可利用现场可编程门阵列(FPGA)将这些软件模块固化而实现。
软件模块可以位于RAM存储器、闪存、ROM存储器、EPROM存储器、EEPROM存储器、寄存器、硬盘、移动磁盘、CD-ROM或者本领域已知的任何其它形式的存储介质。可以将一种存储介质耦接至处理器，从而使处理器能够从该存储介质读取信息，且可向该存储介质写入信息；或者该存储介质可以是处理器的组成部分。处理器和存储介质可以位于ASIC中。该软件模块可以存储在移动终端的存储器中，也可以存储在可插入移动终端的存储卡中。例如，若设备(如移动终端)采用的是较大容量的MEGA-SIM卡或者大容量的闪存装置，则该软件模块可存储在该MEGA-SIM卡或者大容量的闪存装置中。
针对附图中描述的功能方框中的一个或多个和/或功能方框的一个或多个组合，可以实现为用于执行本发明所描述功能的通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC)、现场可编程门阵列(FPGA)或者其它可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件或者其任意适当组合。针对附图描述的功能方框中的一个或多个和/或功能方框的一个或多个组合，还可以实现为计算设备的组合，例如，DSP和微处理器的组合、多个微处理器、与DSP通信结合的一个或多个微处理器或者任何其它这种配置。
以上结合具体的实施方式对本发明进行了描述，但本领域技术人员应该清楚，这些描述都是示例性的，并不是对本发明保护范围的限制。本领域技术人员可以根据本发明的精神和原理对本发明做出各种变型和修改，这些变型和修改也在本发明的范围内。

Claims (20)

  1. 一种图像编码方法，包括：
    将图像的编码块划分为具有均匀变换单元结构的多个变换块；其中对于所述编码块的残差系数的每个基本单元设置有隐藏符号位；
    以所述基本单元为单位将所述多个变换块的残差系数映射为多个频率域块的残差系数；以及
    将映射后的所述残差系数编码到比特流中。
  2. 根据权利要求1所述的方法，其中，所述编码块在所述映射前具有M×N个变换块，每个变换块具有S×S个所述基本单元；
    所述编码块在所述映射后具有S×S个频率域块，每个频率域块具有M×N个所述基本单元；其中M、N、S为自然数，所述基本单元为L采样点×L采样点的子块。
  3. 根据权利要求2所述的方法，其中，所述L为4。
  4. 根据权利要求2所述的方法，其中，对于某个采样点[x][y]，满足如下公式：
    FB[p][q][m][n][x][y]＝TB[m][n][p][q][x][y]；
    其中，FB[]表示所述采样点在所述映射后的位置，TB[]表示所述采样点在所述映射前的位置；p和q为0至S-1的自然数；m为0至M-1的自然数；n为0至N-1的自然数；x和y为0至L-1的自然数。
  5. 根据权利要求1所述的方法，其中，所述编码块作为整体被编码；对于每一个所述频率域块，使用第一标识位指示是否存在全零的残差系数。
  6. 根据权利要求5所述的方法，其中，所述第一标识位的第一取值表示所述频率域块中至少存在一个子块具有非零的残差系数，所述第一标识位的第二取值表示所述频率域块中所有的子块均不具有非零的残差系数。
  7. 根据权利要求5所述的方法，其中，所述方法还包括：
    在所述第一标识位为所述第一取值的情况下，将对应的所述频率域块的残差系数进行编码；在所述第一标识位为所述第二取值的情况下，不将对应的所述频率域块的残差系数进行编码。
  8. 根据权利要求5所述的方法，其中，所述方法还包括：
    在对所述编码块进行编码时，所述编码块中的多个频率域块的扫描方式与所述基 本单元中多个采样点的扫描方式相同。
  9. 根据权利要求1所述的方法，其中，所述编码块被划分为多个频率域块组进行编码；对于每一个频率域块组，使用第二标识位指示是否存在全零的残差系数。
  10. 根据权利要求9所述的方法，其中，所述第二标识位的第一取值表示所述频率域块组中至少存在一个子块具有非零的残差系数，所述第二标识位的第二取值表示所述频率域块组中所有的子块均不具有非零的残差系数。
  11. 根据权利要求9所述的方法，其中，所述方法还包括：
    在所述第二标识位为所述第一取值的情况下，将对应的所述频率域块组的残差系数进行编码；在所述第二标识位为所述第二取值的情况下，不将对应的所述频率域块组的残差系数进行编码。
  12. 根据权利要求9所述的方法，其中，所述方法还包括：
    在对所述编码块进行编码时，所述编码块中的多个频率域块组的扫描方式与所述频率域块组中多个频率域块的扫描方式以及所述基本单元中多个采样点的扫描方式相同。
  13. 根据权利要求1所述的方法，其中，所述编码块中的多个频率块或者频率块组的扫描方式被包含在帧内预测模式的信息中，或者作为所述编码块的语法元素被编码。
  14. 一种图像编码装置，包括：
    划分部，其将图像的编码块划分为具有均匀变换单元结构的多个变换块；其中对于所述编码块的残差系数的每个基本单元设置有隐藏符号位；
    变换部，其以所述基本单元为单位将所述多个变换块的残差系数块映射为多个频率域块的残差系数；以及
    编码部，其将映射后的所述残差系数编码到比特流中。
  15. 根据权利要求14所述的装置，其中，所述基本单元为4采样点×4采样点的子块。
  16. 根据权利要求14所述的装置，其中，所述编码块作为整体被编码；对于每一个所述频率域块，使用第一标识位指示是否存在全零的残差系数。
  17. 根据权利要求16所述的装置，其中，所述第一标识位的第一取值表示所述频率域块中至少存在一个子块具有非零的残差系数，所述第一标识位的第二取值表示 所述频率域块中所有的子块均不具有非零的残差系数。
  18. 根据权利要求14所述的装置，其中，所述编码块被划分为多个频率域块组进行编码；对于每一个频率域块组，使用第二标识位指示是否存在全零的残差系数。
  19. 根据权利要求18所述的装置，其中，所述第二标识位的第一取值表示所述频率域块组中至少存在一个子块具有非零的残差系数，所述第二标识位的第二取值表示所述频率域块组中所有的子块均不具有非零的残差系数。
  20. 一种电子设备，其中，所述电子设备包括：
    编码器，其包括如权利要求14所述的图像编码装置；以及
    解码器，其接收图像的比特流并且对所述图像进行解码。
PCT/CN2017/118583 2017-12-26 2017-12-26 图像编码方法、装置以及电子设备 WO2019127003A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201780091732.8A CN110731081B (zh) 2017-12-26 2017-12-26 图像编码方法、装置以及电子设备
PCT/CN2017/118583 WO2019127003A1 (zh) 2017-12-26 2017-12-26 图像编码方法、装置以及电子设备

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2017/118583 WO2019127003A1 (zh) 2017-12-26 2017-12-26 图像编码方法、装置以及电子设备

Publications (1)

Publication Number Publication Date
WO2019127003A1 true WO2019127003A1 (zh) 2019-07-04

Family

ID=67064302

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/118583 WO2019127003A1 (zh) 2017-12-26 2017-12-26 图像编码方法、装置以及电子设备

Country Status (2)

Country Link
CN (1) CN110731081B (zh)
WO (1) WO2019127003A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113873252A (zh) * 2021-09-27 2021-12-31 上海哔哩哔哩科技有限公司 图像处理方法及装置、电子设备和存储介质

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101267553A (zh) * 2007-03-12 2008-09-17 华为技术有限公司 一种实现编、解码的方法和装置
US20110090955A1 (en) * 2009-10-16 2011-04-21 Futurewei Technologies, Inc. Predictive Adaptive Scan Ordering for Video Coding
CN102281435A (zh) * 2010-06-11 2011-12-14 华为技术有限公司 编码方法、解码方法、编码装置、解码装置及编解码系统
CN103220515A (zh) * 2012-01-20 2013-07-24 捷讯研究有限公司 变换单元内的多符号位隐藏

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9313498B2 (en) * 2012-04-16 2016-04-12 Qualcomm Incorporated Sign hiding techniques for quantized transform coefficients in video coding
CN104380737B (zh) * 2012-06-22 2018-10-26 夏普株式会社 算术解码装置
US9088769B2 (en) * 2012-06-28 2015-07-21 Blackberry Limited Reduced worst-case context-coded bins in video compression with parity hiding
CN103826128B (zh) * 2014-02-25 2017-01-25 宁波工程学院 一种加密域h.264/avc视频可逆数据隐藏方法
CN104038767B (zh) * 2014-06-05 2017-06-27 宁波工程学院 一种兼容cabac的加密域h.264/avc视频数据隐藏方法
US20170310999A1 (en) * 2016-04-25 2017-10-26 Magnum Semiconductor, Inc. Method and apparatus for rate-distortion optimized coefficient quantization including sign data hiding
CN105898300B (zh) * 2016-05-06 2019-03-26 西安电子科技大学 一种基于恢复变换系数的改进变换系数符号位隐藏方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101267553A (zh) * 2007-03-12 2008-09-17 华为技术有限公司 一种实现编、解码的方法和装置
US20110090955A1 (en) * 2009-10-16 2011-04-21 Futurewei Technologies, Inc. Predictive Adaptive Scan Ordering for Video Coding
CN102281435A (zh) * 2010-06-11 2011-12-14 华为技术有限公司 编码方法、解码方法、编码装置、解码装置及编解码系统
CN103220515A (zh) * 2012-01-20 2013-07-24 捷讯研究有限公司 变换单元内的多符号位隐藏

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113873252A (zh) * 2021-09-27 2021-12-31 上海哔哩哔哩科技有限公司 图像处理方法及装置、电子设备和存储介质
CN113873252B (zh) * 2021-09-27 2023-12-19 上海哔哩哔哩科技有限公司 图像处理方法及装置、电子设备和存储介质

Also Published As

Publication number Publication date
CN110731081B (zh) 2022-03-15
CN110731081A (zh) 2020-01-24

Similar Documents

Publication Publication Date Title
JP7227283B2 (ja) 変換係数符号化
KR101625548B1 (ko) 변환 계수 레벨 코딩을 위한 컨텍스트 모델링 기술들
CN108259901B (zh) 用于对游长编码变换系数进行熵编码的上下文确定
JP2019515561A5 (zh)
KR101688452B1 (ko) 변환 계수 인코딩 및 디코딩 방법 및 장치
EP3229473A1 (en) Methods and devices for coding and decoding the position of the last significant coefficient
JP5843225B2 (ja) Ｈｅｖｃにおける係数符号化の調和
KR20070028951A (ko) 멀티 코덱용 변환 장치 및 방법과 멀티 코덱용 역변환 장치및 방법
CN103813167A (zh) 一种量化转换参数处理方法及装置
WO2019127003A1 (zh) 图像编码方法、装置以及电子设备
US9271009B2 (en) Image processing apparatus and image processing method
WO2020062125A1 (zh) 图像编码方法、装置以及电子设备
JP6981540B2 (ja) モード情報のコーディングとデコーディング方法、装置及び電子機器
KR101037624B1 (ko) 메모리를 사용하지 않고 구현되는 이미지 회전 방법 및 장치
WO2020087324A1 (zh) 图像编码方法、装置以及电子设备
CN110545437A (zh) 系数编码、解码方法、电子设备及介质
WO2018068263A1 (zh) 图像编码方法、装置以及图像处理设备
WO2014106377A1 (zh) 一种图像的编码、解码方法及装置
JP2008118533A (ja) 復号化器、方法およびプログラム

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17936357

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17936357

Country of ref document: EP

Kind code of ref document: A1