WO2019125383A1 - Perpendicular spin orbit coupling based memory with composite free layer - Google Patents

Perpendicular spin orbit coupling based memory with composite free layer Download PDF

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Publication number
WO2019125383A1
WO2019125383A1 PCT/US2017/067086 US2017067086W WO2019125383A1 WO 2019125383 A1 WO2019125383 A1 WO 2019125383A1 US 2017067086 W US2017067086 W US 2017067086W WO 2019125383 A1 WO2019125383 A1 WO 2019125383A1
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magnetic
layer
region
spin
adjacent
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PCT/US2017/067086
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French (fr)
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Tanay GOSAVI
Ian A. Young
Sasikanth Manipatruni
Dmitri E. Nikonov
Kaan OGUZ
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Intel Corporation
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/80—Constructional details
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/80—Constructional details
    • H10N50/85—Magnetic active materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/20—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
    • H10B61/22—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type

Abstract

An apparatus is provided which comprises: a magnetic junction including: a structure comprising a super lattice including a first material and a second material, wherein the structure has perpendicular magnetic anisotropy (PMA), wherein the structure has an anisotropy axis perpendicular to a plane of a device; and an interconnect adjacent to the magnetic junction, wherein the interconnect comprises a spin orbit material.

Description

PERPENDICULAR SPIN ORBIT COUPLING BASED MEMORY WITH COMPOSITE
FREE LAYER
BACKGROUND
[0001] Embedded memory with state retention can enable energy and computational efficiency. However, leading spintronic memory options, for example, spin transfer torque based magnetic random access memory (STT-MRAM), suffer from the problem of high voltage and high write current during the programming (e.g., writing) of a bit-cell. For instance, large write current (e.g., greater than 100 mA) and voltage (e.g., greater than 0.7 V) are required to write a tunnel junction based magnetic tunnel junction (MTJ). Limited write current also leads to high write error rates or slow switching times (e.g., exceeding 20 ns) in MTJ based MRAM. The presence of a large current flowing through a tunnel barrier leads to reliability issues in magnetic tunnel junctions.
BRIEF DESCRIPTION OF THE DRAWINGS
[0002] The embodiments of the disclosure will be understood more fully from the detailed description given below and from the accompanying drawings of various embodiments of the disclosure, which, however, should not be taken to limit the disclosure to the specific embodiments, but are for explanation and understanding only.
[0003] Fig. 1 illustrates a device having an out-of-plane magnetic tunnel junction
(MTJ) stack coupled to a spin orbit coupling interconnect.
[0004] Fig. 2A illustrates a cross-section of the spin orbit coupling interconnect with electrons having their spins polarized in-plane and deflected up and down resulting from a flow of charge current.
[0005] Fig. 2B illustrates a plot showing write energy-delay conditions for one transistor and one magnetic tunnel junction (MTJ) with spin Hall effect (SHE) material compared to traditional MTJs.
[0006] Fig. 2C illustrates a plot comparing reliable write times for spin Hall MRAM and spin torque MRAM.
[0007] Fig. 3A illustrates a three-dimensional (3D) view of a device having an MTJ stack with a composite magnet, according to some embodiments of the disclosure.
[0008] Fig. 3B illustrates a top view of the device of Fig. 3A, according to some embodiments of the disclosure. [0009] Fig. 4 illustrates a cross-section of the composite magnet with interface region for coupling to a dielectric or metal of a magnetic junction, according to some embodiments of the disclosure.
[0010] Fig. 5 illustrates a cross-section of part of the magnetic junction having the composite magnet with interface region for coupling to a dielectric or metal of a magnetic junction, spin orbit coupling layer, and dipole coupling layer, according to some
embodiments of the disclosure.
[0011] Fig. 6 illustrates a cross-section of part of the magnetic junction having the composite magnet with interface region for coupling to a dielectric or metal of a magnetic junction, spin orbit coupling layer, dipole coupling layer, and associated anti-ferromagnet, according to some embodiments of the disclosure.
[0012] Fig. 7 illustrates a cross-section of part of the magnetic junction having the composite free and fixed magnets, according to some embodiments of the disclosure.
[0013] Fig. 8 illustrates a cross-section of part of a dual-magnetic junction with composite magnets on either side of a spin orbit coupling interconnect.
[0014] Fig. 9A illustrates a plot showing spin polarization capturing switching of the composite magnet, according to some embodiments of the disclosure.
[0015] Fig. 9B illustrates a magnetization plot associated with Fig. 9A, according to some embodiments of the disclosure.
[0016] Fig. 9C illustrates a plot showing spin polarization capturing switching of a composite magnet using traditional spin orbit material, according to some embodiments of the disclosure.
[0017] Fig. 9D illustrates a magnetization plot associated with Fig. 9C, according to some embodiments of the disclosure.
[0018] Fig. 10 illustrates a cross-section of a die layout having the device of Fig. 3A formed in metal 3 (M3) and metal 2 (M2) layer regions, according to some embodiments of the disclosure.
[0019] Fig. 11 illustrates a cross-section of a die layout having the device of Fig. 3A formed in metal 2 (M2) and metal 1 (Ml) layer regions, according to some embodiments of the disclosure.
[0020] Fig. 12 illustrates a plot showing improvement in energy-delay product using the device of Fig. 3A compared to the device of Fig. 2, in accordance with some
embodiments of the disclosure. [0021] Fig. 13 illustrates a flowchart of a method of forming a magnetic junction having a composite magnet, according to some embodiments of the disclosure.
[0022] Fig. 14 illustrates a smart device or a computer system or a SoC (System-on-
Chip) with a magnetic junction having one or more composite magnets, according to some embodiments of the disclosure.
DETAILED DESCRIPTION
[0023] Some embodiments describe a perpendicular magnet switch which can be applied in logic and memory. In some embodiments, an apparatus is provided which comprises: a magnetic junction including: a layer (or structure) comprising a super lattice (e.g., a composite stack) including a first material and a second material, wherein the layer has perpendicular magnetic anisotropy (PMA), wherein the layer has an anisotropy axis perpendicular to a plane of a device; and an interconnect adjacent to the magnetic junction, wherein the interconnect comprises a material exhibiting spin orbit coupling. In some embodiments, the interconnect is a spin orbit coupling write electrode which is in direct contact with the layer comprising the super lattice. This layer forms the main free magnet layer, in accordance with some embodiments. In some embodiments, the magnetic junction comprises a fixed magnet layer (or structure) separated from the main free magnet layer (or free magnet structure) by a dielectric (e.g., MgO) or non-magnetic metal or its oxide (e.g., Al or AI2O3). As such, the magnetic junction is a three terminal SOC material based magnetic junction device. In some embodiments, the first material of the super lattice includes one of: Co, Ni, Fe, or Heusler alloy. In some embodiments, the second material of the super lattice includes one of: Pt, Pd, Ir, Ru, or Ni. In some embodiments, the first material has a thickness in a range of 0.6 nm to 2 nm, and the second material has a thickness in a range of 0.1 nm to 3 nm.
[0024] The term“free” or“unfixed” here with reference to a magnet refers to a magnet whose magnetization direction can change along its easy axis upon application of an external field or force (e.g., Oersted field, spin torque, etc.). Conversely, the term“fixed” or “pinned” here with reference to a magnet refers to a magnet whose magnetization direction is pinned or fixed along an axis and which may not change due to application of an external field (e.g., electrical field, Oersted field, spin torque,).
[0025] Here, perpendicularly magnetized magnet (or perpendicular magnet, or magnet with perpendicular magnetic anisotropy (PMA)) refers to a magnet having a magnetization which is substantially perpendicular to a plane of the magnet or a device. For example, a magnet with a magnetization which is in a z-direction in a range of 90 (or 270) degrees +/- 20 degrees relative to an x-y plane of a device.
[0026] Here, an in-plane magnet refers to a magnet that has magnetization in a direction substantially along the plane of the magnet. For example, a magnet with a magnetization which is in an x or y direction and is in a range of 0 (or 180 degrees) +/- 20 degrees relative to an x-y plane of a device.
[0027] The term“device” may generally refer to an apparatus according to the context of the usage of that term. For example, a device may refer to a stack of layers or structures, a single structure or layer, a connection of various structures having active and/or passive elements, etc. Generally a device is a three dimensional structure with a plane along the x-y direction and a height along the z direction of an x-y-z Cartesian coordinate system. The plane of the device may also be the plane of an apparatus which comprises the device.
[0028] In some embodiments, the main free layer (e.g., a perpendicular magnet) is in contact with the SOC write electrode and dipole/exchange bias coupled to multiple magnetic layers. In some embodiments, the perpendicular magnet includes a composite stack (e.g., alternate layers of Co and Pt) that can be optimized to decrease damping and coercivity of the primary free layer, which is switched by the SOC write electrode while having high stability from the dipole/exchange coupling from the other magnets in the composite free layer. In some embodiments, the fixed magnet or fixed layer of the magnetic junction is a
perpendicular magnet and comprises a composite stack (e.g., alternate layers of Co and Pt).
[0029] In some embodiments, the SOC write electrode writes a low damping low coercivity free with dipole/exchange coupling to the higher coercivity free magnetic layers one formed in a via below the three terminal SOC material based magnetic junction device and another one above a main free layer. In some embodiments, an anti-aligned synthetic anti-ferromagnet (SAF) is built into the via underneath the three terminal SOC material based magnetic junction device. The low damping, low coercivity free magnetic layer below the SOC electrode is dipole coupled to the free magnetic layer above the SOC electrode which is exchange biased coupled to the free magnetic layer below the dielectric layer (e.g., MgO layer), in accordance with some embodiments. In some embodiments, the anti-aligned SAF increases the overall switching efficiency of the SOC base magnetic junction.
[0030] There are many technical effects of the various embodiments. For example, in some embodiments, the out-of-plane magnetization switching enables perpendicular magnet anisotropy (PMA) based magnetic devices (e.g., MRAM and logic) comprising spin orbit effects that generate perpendicular spin currents. The perpendicular magnet switch of some embodiments enables low programming voltages (or higher current for identical voltages) enabled by giant spin orbit effects (GSOE) for perpendicular magnetic memory and logic.
The perpendicular magnet switch, of some embodiments, results in lower write error rates which enable faster MRAM (e.g., write time of less than 10 ns). The perpendicular magnet switch of some embodiments decouple write and read paths to enable faster read latencies. The perpendicular magnet switch of some embodiments uses significantly smaller read current through the MTJ and provides improved reliability of the tunneling oxide and MTJs. For example, less than 10 mA compared to 100 mA for nominal write is used by the perpendicular magnet switch of some embodiments.
[0031] In the following description, numerous details are discussed to provide a more thorough explanation of embodiments of the present disclosure. It will be apparent, however, to one skilled in the art, that embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring embodiments of the present disclosure.
[0032] Note that in the corresponding drawings of the embodiments, signals are represented with lines. Some lines may be thicker, to indicate more constituent signal paths, and/or have arrows at one or more ends, to indicate primary information flow direction. Such indications are not intended to be limiting. Rather, the lines are used in connection with one or more exemplary embodiments to facilitate easier understanding of a circuit or a logical unit. Any represented signal, as dictated by design needs or preferences, may actually comprise one or more signals that may travel in either direction and may be implemented with any suitable type of signal scheme.
[0033] Throughout the specification, and in the claims, the term "connected" means a direct connection, such as electrical, mechanical, or magnetic connection between the things that are connected, without any intermediary devices.
[0034] The term "coupled" means a direct or indirect connection, such as a direct electrical, mechanical, or magnetic connection between the things that are connected or an indirect connection, through one or more passive or active intermediary devices.
[0035] The term "circuit" or“module” may refer to one or more passive and/or active components that are arranged to cooperate with one another to provide a desired function.
[0036] The term "signal" may refer to at least one current signal, voltage signal, magnetic signal, or data/clock signal. The meaning of "a," "an," and "the" include plural references. The meaning of "in" includes "in" and "on." [0037] The term“scaling” generally refers to converting a design (schematic and layout) from one process technology to another process technology and subsequently being reduced in layout area. The term“scaling” generally also refers to downsizing layout and devices within the same technology node. The term“scaling” may also refer to adjusting (e.g., slowing down or speeding up - i.e. scaling down, or scaling up respectively) of a signal frequency relative to another parameter, for example, power supply level. The terms “substantially,”“close,”“approximately,”“near,” and“about,” generally refer to being within +/- 10% of a target value.
[0038] Unless otherwise specified the use of the ordinal adjectives“first,”“second,” and“third,” etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking or in any other manner.
[0039] For the purposes of the present disclosure, phrases“A and/or B” and“A or B” mean (A), (B), or (A and B). For the purposes of the present disclosure, the phrase“A, B, and/or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).
[0040] The terms“left,”“right,”“front,”“back,”“top,”“bottom,”“over,”“under,” and the like in the description and in the claims, if any, are used for descriptive purposes and not necessarily for describing permanent relative positions.
[0041] The term“adjacent” here generally refers to a position of a thing being next to
(e.g., immediately next to or close to with one or more things between them) or adjoining another thing (e.g., abutting it).
[0042] For the purposes of present disclosure, the terms“spin” and“magnetic moment” are used equivalently. More rigorously, the direction of the spin is opposite to that of the magnetic moment, and the charge of the particle is negative (such as in the case of electron).
[0043] It is pointed out that those elements of the figures having the same reference numbers (or names) as the elements of any other figure can operate or function in any manner similar to that described, but are not limited to such.
[0044] Fig. 1 illustrates device 100 having an out-of-plane magnetic tunnel junction
(MTJ) stack coupled to a spin orbit coupling interconnect. Here, the stack of layers having MTJ 121 is coupled to an electrode 122 formed of spin Hall effect (SHE) or SOC material, where the SHE material converts charge current Iw (or write current) to spin polarized current Is. Device 100 forms a three terminal memory cell with SHE induced write mechanism and MTJ based read-out. Device 100 comprises MTJ 121, SHE Interconnect or electrode 122, and non- magnetic metal(s) l23a/b. In one example, MTJ 121 comprises layers (or structures) l2la, l2lb, and l2lc. In some embodiments, layers l2la and l2lc are ferromagnetic layers. In some embodiments, layer l2lb is a metal (or a metal oxide) or a tunneling dielectric (e.g., MgO).
[0045] For example, when the junction is a spin valve, layer l2lb is metal or its oxide
(e.g., Al or AI2O3) and when the junction is a tunneling junction, then layer l2lb is a dielectric. One or both ends along the horizontal direction of SHE Interconnect 122 is formed of non-magnetic metals l23a/b. Additional layers l2ld, l2le, l2lf, and l2lg can also be stacked on top of layer 12 lc. In some embodiments, layer 12 lg is non-magnetic metal electrode.
[0046] A wide combination of materials can be used for material stacking of MTJ
121. For example, the stack of layers l2la, l2lb, l2lc, l2ld, l2le, l2lf, and l2lg are formed of materials which include: CoxFeyBz, MgO, CoxFeyBz, Ru, CoxFeyBz, IrMn, and Ru, respectively, where‘x,’‘y,’ and‘z’ are fractions of elements in the alloys. Other materials may also be used to form MTJ 121. MTJ 121 stack comprises free magnetic layer l2la,
MgO tunneling oxide l2lb, a fixed magnetic layer l2lc/d/e which is a combination of CoFe, Ru, and CoFe layers, respectively, referred to as Synthetic Anti-Ferromagnet (SAF), and an Anti-Ferromagnet (AFM) layer 12 lf. In some embodiments, AFM layer 12 lf comprises a material which is a quasi-two-dimensional triangular AFM including Ni(i-X)MxGa2S4, where ‘M’ includes one of: Mn, Fe, Co or Zn. The SAF layer has the property, that the
magnetizations in the two CoFe layers are opposite, and allows for cancelling the dipole fields around the free magnetic layer such that a stray dipole field will not control the free magnetic layer.
[0047] In some embodiments, the free and fixed magnetic layers (l2la and l2lc, respectively) are formed of CFGG (i.e., Cobalt (Co), Iron (Fe), Germanium (Ge), or Gallium (Ga) or a combination of them). In some embodiments, magnets 121 a/c are formed from Heusler alloys. Heusler alloys are ferromagnetic metal alloys based on a Heusler phase. Heusler phases are intermetallic with certain composition and face-centered cubic crystal structure. The ferromagnetic property of the Heusler alloys are a result of a double-exchange mechanism between neighboring magnetic ions. In some embodiments, the Heusler alloy includes one of: Cu2MnAl, Cu2MnIn, Cu2MnSn, Ni2MnAl, Ni2MnIn, Ni2MnSn, Ni2MnSb, NFMnGa Co2MnAl, Co2MnSi, Co2MnGa, Co2MnGe, Pd2MnAl, Pd2MnIn, Pd2MnSn, Pd2MnSb, Co2FeSi, Co2FeAl, Fe2VAl, Mn2VGa, Co2FeGe, MnGa, or MnGaRu. [0048] In some embodiments, fixed magnet layer 12 lc is magnet with PMA. Here, the device is along the x-y plane, and the magnets l2la/c have magnetizations along the z- direction which is perpendicular to the plane of the device. In some embodiments, the magnet with PMA comprises a stack of materials, wherein the materials for the stack are selected from a group consisting of: Co and Pt; Co and Pd; Co and Ni; MgO, CoFeB, Ta, CoFeB, and MgO; MgO, CoFeB, W, CoFeB, and MgO; MgO, CoFeB, V, CoFeB, and MgO; MgO, CoFeB, Mo, CoFeB, and MgO; MnxGay; Materials with Llo symmetry; and materials with tetragonal crystal structure. In some embodiments, the magnet with PMA is formed of a single layer of one or more materials. In some embodiments, the single layer is formed of MnGa.
[0049] Llo is a crystallographic derivative structure of a FCC (face centered cubic lattice) structure and has two of the faces occupied by one type of atom and the comer and the other face occupied with the second type of atom. When phases with the Ll0 structure are ferromagnetic the magnetization vector usually is along the [0 0 1] axis of the crystal.
Examples of materials with Ll0 symmetry include CoPt and FePt. Examples of materials with tetragonal crystal structure and magnetic moment are Heusler alloys such as CoFeAl, MnGe, MnGeGa, and MnGa.
[0050] SHE Interconnect 122 (or the write electrode) includes 3D materials such as one or more of b-Tantalum (b-Ta), Ta, b-Tungsten (b-W), W, Pt, Copper (Cu) doped with elements such as Iridium, Bismuth and any of the elements of 3d, 4d, 5d and 4f, 5f periodic groups in the Periodic Table which may exhibit high spin orbit coupling. SHE Interconnect 122 transitions into high conductivity non-magnetic metal(s) l23a/b to reduce the resistance of SHE Interconnect 122. In some embodiments, SHE interconnect 122 comprises a spin orbit 2D material which includes one or more of: graphene, BiSe2, B1S2, BiSexTe2-x, T1S2, WS2, M0S2, TiSe2, WSe2, MoSe2, B2S3, Sb2S3, Ta2S, Re2S7, LaCPS2, LaOAsS2, ScOBiS2, GaOBiS2, AIOB1S2, LaOSbS2, BiOBiS2, YOB1S2, InOBiS2, LaOBiSe2, TiOBiS2, CeOBiS2, PrOBiS2, NdOBiS2, LaOBiS2, or SrFBiS2- In some embodiments, the SHE interconnect 122 comprises spin orbit material which includes one of a 2D material or a 3D material, wherein the 3D material is thinner than the 2D material. In some embodiments, the SHE interconnect 122 comprises a spin orbit material which includes materials that exhibit Rashba-Bychkov effect. In some embodiments, material which includes materials that exhibit Rashba- Bychkov effect comprises materials ROCI12, where‘R’ includes one or more of: La, Ce, Pr, Nd, Sr, Sc, Ga, Al, or In, and where“Ch” is a chalcogenide which includes one or more of: S, Se, or Te. [0051] In some embodiments, SHE Interconnect 222 transitions into high
conductivity non-magnetic metal(s) 223a/b to reduce the resistance of SHE Interconnect 222. The non-magnetic metal(s) 223a/b include one or more of: Cu, Co, a-Ta, Al, CuSi, or NiSi.
[0052] In one case, the magnetization direction of fixed magnetic layer l2lc is perpendicular relative to the magnetization direction of free magnetic layer l2la (e.g., magnetization directions of the free and fixed magnetic layers are not parallel, rather they are orthogonal). For example, magnetization direction of free magnetic layer 121 a is in-plane while the magnetization direction of fixed magnetic layer 12 lc is perpendicular to the in plane. In another case, magnetization direction of fixed magnetic layer l2la is in-plane while the magnetization direction of free magnetic layer l2lc is perpendicular to the in-plane.
[0053] The thickness of a ferromagnetic layer (e.g., fixed or free magnetic layer) may determine its equilibrium magnetization direction. For example, when the thickness of the ferromagnetic layer l2la/c is above a certain threshold (depending on the material of the magnet, e.g. approximately 1.5 nm for CoFe), then the ferromagnetic layer exhibits magnetization direction which is in-plane. Likewise, when the thickness of the ferromagnetic layer l2la/c is below a certain threshold (depending on the material of the magnet), then the ferromagnetic layer l2la/c exhibits magnetization direction which is perpendicular to the plane of the magnetic layer.
[0054] Other factors may also determine the direction of magnetization. For example, factors such as surface anisotropy (depending on the adjacent layers or a multi-layer composition of the ferromagnetic layer) and/or crystalline anisotropy (depending on stress and the crystal lattice structure modification such as FCC (face centered cubic lattice), BCC (body centered cubic lattice), or Llo-type of crystals, where Llo is a type of crystal class which exhibits perpendicular magnetizations), can also determine the direction of magnetization.
[0055] In this example, the applied current Iw is converted into spin current Is by SHE
Interconnect 122. This spin current switches the direction of magnetization of the free layer and thus changes the resistance of MTJ 121. However, to read out the state of MTJ 121, a sensing mechanism is needed to sense the resistance change.
[0056] The magnetic cell is written by applying a charge current via SHE
Interconnect 122. The direction of the magnetic writing in free magnet layer l2la is decided by the direction of the applied charge current. Positive currents (e.g., currents flowing in the -i-y direction) produce a spin injection current with transport direction (along the +z direction) and spins pointing to the +X direction. The injected spin current in turn produces spin torque to align the free magnet l2la (coupled to the SHE layer 122 of SHE material) in the +x direction. Negative currents (e.g., currents flowing in the -y direction) produce a spin injection current with transport direction (along the +z direction) and spins pointing to the -x direction. The injected spin current in turn produces spin torque to align the free magnet l2la (coupled to the SHE material of layer 122) in the -x direction. In some embodiments, in materials with the opposite sign of the SHE/SOC effect, the directions of spin polarization and thus of the free layer magnetization alignment are reversed compared to the above.
[0057] Fig. 2A illustrates a cross-section 200 of the spin orbit coupling interconnect with electrons having their spins polarized in-plane and deflected up and down resulting from a flow of charge current. In this example, positive charge current represented by J, produces spin-front (e.g., in the +X direction) polarized current 201 and spin-back (e.g., in the -x direction) polarized current 202. The injected spin current Is generated by a charge current Ic in the write electrode 122 is given by:
Figure imgf000012_0001
where, the vector of spin current Is = If— /j, points in the direction of transferred magnetic moment and has the magnitude of the difference of currents with spin along and opposite to the spin polarization direction, z is the unit vector perpendicular to the interface, PSHE is the spin Hall injection efficiency which is the ratio of magnitude of transverse spin current to lateral charge current, w is the width of the magnet, t is the thickness of the SHE
Interconnect (or write electrode) 122, Sf is the spin flip length in SHE Interconnect 122,
6SHE is the spin Hall angle for SHE Interconnect 122 to free ferromagnetic layer interface. The injected spin angular momentum responsible for the spin torque given by:
S = h Ts/2e . . . (2)
[0058] The generated spin up and down currents 201/202 (e.g., ]s) are described as a vector cross-product given by:
Figure imgf000012_0002
[0059] This spin to charge conversion is based on Tunnel Magneto Resistance (TMR) which is highly limited in the signal strength generated. The TMR based spin to charge conversion has low efficiency (e.g., less than one).
[0060] Fig. 2B illustrates plot 220 showing write energy-delay conditions for one transistor and one magnetic tunnel junction (MTJ) with spin Hall effect (SHE) material compared to traditional MTJs. Here, the x-axis is energy per write operation in femto-Joules (fj) while the y-axis is delay in nano-seconds (ns). [0061] Here, the energy-delay trajectory of SHE and MTJ devices are compared for in-plane magnet switching as the applied write voltage is varied. The energy-delay relationship (for in-plane switching) can be written as:
Figure imgf000013_0001
where Rwr e is the write resistance of the device (resistance of SHE electrode or resistance of MTJ-P or MTJ-AP, where MTJ-P is a MTJ with parallel magnetizations while MTJ-AP is an MTJ with anti-parallel magnetizations, m0 is vacuum permeability, e is the electron charge. The equation shows that the energy at a given delay is directly proportional to the square of
MJJe
the Gilbert damping a. Here the characteristic time, t0 7, varies as the spin
Figure imgf000013_0002
polarization varies for various SHE metal electrodes (e.g., 223, 224, 225). Plot 220 shows five curves 221, 222, 223, 224, and 225. Curves 221 and 222 show write energy-delay conditions using traditional MTJ devices without SHE material.
[0062] For example, curve 221 shows the write energy-delay condition caused by switching a magnet from anti-parallel (AP) to parallel (P) state, while curve 222 shows the write energy-delay condition caused by switching a magnet from P to AP state. Curves 222, 223, and 224 show write energy-delay conditions of an MTJ with SHE material. Clearly, write energy-delay conditions of an MTJ with SHE material is much lower than write energy- delay conditions of an MTJ without SHE material. While write energy-delay of an MTJ with SHE material improves over a traditional MTJ without SHE material, further improvement in write energy-delay is desired.
[0063] Fig. 2C illustrates plot 230 comparing reliable write times for spin Hall
MRAM and spin torque MRAM. There are three cases considered in plot 230. Waveform 231 is the write time for an in-plane MTJ, waveform 232 is the write time for a PMA MTJ, and waveform 234 is the write time for a spin Hall MTJ. All the cases considered in Fig. 2C assume a 30 X 60 nm magnet with 40 kT energy barrier and 3.5 nm SHE electrode thicknesses. The energy-delay trajectories of the devices are obtained assuming a voltage sweep from 0 V to 0.7 V in accordance to voltage restrictions of scaled CMOS. The energy- delay trajectory of the SHE-MTJ devices exhibits broadly two operating regions A) Region 1 where the energy-delay product is approximately constant (ta < Region 2
Figure imgf000013_0003
MsVe
where the energy is proportional to the delay tά > The two regions are
PeRmB MsVe
separated by energy minima at torί = / 1 RmB w^ere minimum switching energy is obtained for the spin torque devices.
[0064] The energy-delay trajectory of the spin transfer torque (STT) MTJ devices is limited with a minimum delay of 1 ns for in-plane devices at 0.7 V maximum applied voltage, the switching energy for P-AP and AP-P are in the range of 1 pj/write. In contrast, the energy-delay trajectory of SHE-MTJ (in-plane anisotropy) devices can enable switching times as low as 20 ps (b-W with 0.7 V, 20 fj/bit) or switching energy as small as 2 fj (b-W with 0.1 V, 1.5 ns switching time).
[0065] In some embodiments, the free and/or fixed magnets l2la/b are paramagnets.
A paramagnet, as opposed to a ferromagnet, exhibits magnetization when a magnetic field is applied to it. Paramagnets generally have magnetic permeability greater or equal to one and hence are attracted to magnetic fields. In some embodiments, paramagnet comprises a material which includes one or more of: Platinum(Pt), Palladium (Pd), Tungsten (W), Cerium (Ce), Aluminum (Al), Lithium (Li), Magnesium (Mg), Sodium (Na), CnCT (chromium oxide), CoO (cobalt oxide), Dysprosium (Dy), Dy20 (dysprosium oxide), Erbium (Er), EnCh (Erbium oxide), Europium (Eu), E¾(¾ (Europium oxide), Gadolinium (Gd), Gadolinium oxide (Gd203), FeO and Fe203 (Iron oxide), Neodymium (Nd), Nd203 (Neodymium oxide), K02 (potassium superoxide), praseodymium (Pr), Samarium (Sm), Sm203 (samarium oxide), Terbium (Tb), Tb203 (Terbium oxide), Thulium (Tm), Tm203 (Thulium oxide), or V203 (Vanadium oxide). In some embodiments, paramagnet comprises dopants which include one or more of: Ce, Cr, Mn, Nb, Mo, Tc, Re, Nd, Gd, Tb, Dy, Ho, Er, Tm, or Yb. In various embodiments, the magnets can be either a FM or a paramagnet.
[0066] Fig. 3A illustrates a three-dimensional (3D) view 300 of a device having an
MTJ stack with a composite magnet, according to some embodiments of the disclosure. To improve stability (e.g., dielectric layer reliability) and performance (e.g., faster switching time, lower write error rate, faster read time, lower power etc.) of device 100, a multilayer free magnet 32la is used for dipole/exchange coupling multiple perpendicular magnets, in accordance with some embodiments. This multilayer free magnet 32la replaces the single layer free magnet l2la of Fig. 1, in accordance with some embodiments. This multilayer free magnet 32la is also referred to as a composite magnet or super lattice formed of composite stack of materials.
[0067] The composite stack can be optimized to decrease the damping and coercivity of the primary free layer (layer 121 a which is now 32 la), which is switched by the SHE write electrode 122 while having high stability from the dipole/exchange coupling from the other magnets in the composite free layer. In some embodiments, the composite stack 32la comprises alternating layers of a first material and a second material. In some embodiments, the first material includes one of: Co, Ni, Fe, or Heusler alloy. In some embodiments, the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
[0068] In some embodiments, the composite stack 32 la is formed with a sufficiently high anisotropy (indicated by an effective anisotropy magnetic field Hk) and sufficiently low saturated magnetization (Ms) to increase injection of spin currents. Saturated magnetization Ms is generally the state reached when an increase in applied external magnetic field H cannot increase the magnetization of the material. Here, sufficiently low Ms refers to Ms less than 200 kA/m (kilo- Amperes per meter). Anisotropy Hk generally refers to the material property which is directionally dependent. Materials with high Hk are materials with material properties that are highly directionally dependent. Here, sufficiently high Hk in context of Heusler alloys is considered to be greater than 2000 Oe (Oersted).
[0069] In some embodiments, an interface layer 32lb is provided between the last layer of the multilayer free magnet 32 la and dielectric l23b. Here, the last layer or the top most layer is the layer closest to the dielectric l23b. In some embodiments, the interface layer 32 lb is also a stack of materials. For example, the stack of materials includes a layer of Ta or W adjacent to the top most layer of the multilayer free magnet 32la; and another layer comprising Co, Fe, or B or their alloys, where the other layer is adjacent to the dielectric l23b. Fig. 3B illustrates a top view 320 of the device of Fig. 3A along cross-section AA’, according to some embodiments of the disclosure.
[0070] In some embodiments, the free layer 32la is split and a coupler (not shown) is formed between them along the y-axis. In some embodiments, the coupler comprises Ru, Os, Hs, Fe, or other transition metals from the Platinum Group of the periodic table. In some embodiments, a coupler (e.g., Ru. Os, Hs, Fe, etc.) is added between free layer 32la and dielectric layer l23b such that the coupler is adjacent to both free layer 32la and dielectric layer l23b. In one such embodiment, the interface layer 32 lb is not used.
[0071] Fig. 4 illustrates a cross-section 400 of the composite magnet with interface region for coupling to a dielectric or metal of a magnetic junction, according to some embodiments of the disclosure. Cross-section 400 shows the composite stack of multi-layer 32la/40l which includes‘n’ layers of first material 403 and second material 404. For example, the composite stack comprises layers 403 i-n and 404i-n stacked in an alternating manner, where‘n’ has a range of 1 to 10. [0072] In some embodiments, the first material includes one of: Co, Ni, Fe, or
Heusler alloy. In some embodiments, the second material includes one of: Pt, Pd, Ir, Ru, or Ni. In some embodiments, the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V. In some embodiments, the Heusler alloy includes one of: Cu2MnAl, Cu2MnIn, Cu2MnSn, Ni2MnAl, Ni2MnIn, Ni2MnSn, Ni2MnSb, Ni2MnGa Co2MnAl, Co2MnSi, Co2MnGa, Co2MnGe, Pd2MnAl, Pd2MnIn, Pd2MnSn, Pd2MnSb, Co2FeSi, Co2FeAl, Fe2VAl, Mn2VGa, Co2FeGe, MnGa, or MnGaRu. In some embodiments, the first material has a thickness tl in a range of 0.1 nm to 2 nm. In some embodiments, the second material has a thickness t2 in a range of 0.1 nm to 2 nm. While the embodiments here show first material being at the bottom followed by the second material, the order can be reversed without changing the technical effect.
[0073] In some embodiments, interface layer 32 lb/402 comprises a first layer 405 and a second layer 406. In some embodiments, first layer 405 is adjacent to the last layer 404n of composite stack 32la/40l. In some embodiments, first layer 405 includes one of: Ta, W, Mo, Ru, Cu. In some embodiments, the thickness of first layer 405 is between O.lnm and 2nm. In some embodiments, second layer 406 includes one or more of: Co, Fe, B, or their alloys. In some embodiments, the thickness of second layer 406 is between 0.3 and 3nm.
[0074] Fig. 5 illustrates a cross-section 500 of part of the magnetic junction having the composite magnet with interface region for coupling to a dielectric or metal of a magnetic junction, spin orbit coupling layer, and dipole coupling layer, according to some
embodiments of the disclosure. Cross-section 500 is similar to cross-section 400 but for the illustration of the SOC write electrode 122 and dipole coupled free layer 501. In some embodiments, a dipole coupled free layer 501 is formed under the SOC write electrode 122 such that composite layer 401 is on the opposite surface of SOC write electrode 122. In some embodiments, the dipole coupled free layer 501 forms a via which connects to SOC write electrode 122. For example, a hole is etched and filled with material for free magnet to form free layer 501. In some embodiments, the dipole coupled free layer 501 includes one or more of: Co, Fe, Ni, MnGa, MnGeGa, or Bct-Ru. In some embodiments, the thickness of layer 501 is between 0.3 nm and 3 nm. In some embodiments, the dipole coupled free layer 501 provides a field assist to assist with the switching of the magnetization of the composite free layer 401. As such, write time is reduced. In some embodiments, the field is an Oersted field which is an assist field which supports in switching of magnetization of composite layer 32la which is already under stress by spin torque, in accordance with some embodiments. The switching allows for changing the memory state of the device having MTJ 321, in accordance with some embodiments.
[0075] Fig. 6 illustrates a cross-section 600 of part of the magnetic junction having the composite magnet with interface region for coupling to a dielectric or metal of a magnetic junction, spin orbit coupling layer, dipole coupling layer, and associated anti-ferromagnet, according to some embodiments of the disclosure. Cross-section 600 is similar to cross- section 500 but for the addition of an AFM layer 502 adjacent to the dipole coupled free layer 501.
[0076] For example, a hole in a metal is etched and then material for AFM is deposited filled by material for a free magnet. As such, a magnetic via is formed. In various embodiments, AFM 501 stabilizes the dipole coupled free layer 501. As such, shape anisotropy does not become a limiting factor in determining the magnetization axis of the dipole coupled free layer 501. In some embodiments, AFM 502 comprises IrMn, PtMn, or other triangular anti-ferromagnets. In some embodiments, the AFM 501 includes one of: Ir, Pt, Mn, Pd, or Fe. In some embodiments, AFM 501 is a quasi-two-dimensional triangular AFM including Ni(i-X)MxGa2S4, where‘M’ includes one of: Mn, Fe, Co or Zn. In some embodiments, dipole coupling layer 501 and AFM 502 together form a via (e.g., a magnetic via).
[0077] Fig. 7 illustrates a cross-section 700 of part of the magnetic junction having the composite free and fixed magnets, according to some embodiments of the disclosure. Cross-section 700 is similar to cross-section 600 but for illustration of dielectric l23b and fixed magnet 12 lb/701. In some embodiments, fixed magnet 12 lb/701 is a composite layer (or multilayer fixed magnet) comprising alternating layers of 702 and 703. This multilayer fixed (or pinned) magnet 701 replaces the single layer free magnet l2lb of Fig. 1, in accordance with some embodiments. This multilayer fixed magnet 701 is also referred to as a composite magnet formed of composite stack of material. For example, the composite stack comprises layers 702i-n and 703i-n stacked in an alternating manner, where‘n’ has a range of 1 to 10. In some embodiments, the composite stack 701 comprises alternating layers of a first material and a second material. In some embodiments, the first material includes one of: Co, Ni, Fe, or Heusler alloy. In some embodiments, the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
[0078] In some embodiments, the first material includes one of: Co, Ni, Fe, or
Heusler alloy. In some embodiments, the second material includes one of: Pt, Pd, Ir, Ru, or Ni. In some embodiments, the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V. In some embodiments, the Heusler alloy includes one of: Cu2MnAl, Cu2MnIn, Cu2MnSn, Ni2MnAl, Ni2MnIn, Ni2MnSn, Ni2MnSb, Ni2MnGa Co2MnAl, Co2MnSi, Co2MnGa, Co2MnGe, Pd2MnAl, Pd2MnIn, Pd2MnSn, Pd2MnSb,
Co2FeSi, Co2FeAl, Fe2VAl, Mn2VGa, Co2FeGe, MnGa, or MnGaRu. In some embodiments, the first material has a thickness t3 in a range of 0.6 nm to 2 nm. In some embodiments, the second material has a thickness t4 in a range of 0.1 nm to 3 nm. While the embodiments here show first material being at the bottom followed by the second material, the order can be reversed without changing the technical effect.
[0079] Fig. 8 illustrates a cross-section 800 of part of a dual-magnetic junction with composite magnets on either side of a spin orbit coupling interconnect. Cross-section 800 is similar to cross-section 700 where dipole coupling layer 501 and AFM 502 are replaced with another magnetic junction which is formed on the other side of SOC write electrode 122. In some embodiments, the other magnetic junction comprises a mirror image of magnetic junction discussed with reference to Fig. 4 and Fig. 7.
[0080] Referring back to Fig. 8, in some embodiments, the other magnetic junction comprises a composite stack of multi-layer free magnet 801, interface layer or region 802, fixed magnet 823b (which can be composite like fixed magnet 701 or a single layer like l2lb) and SAF or AFM 807. In some embodiments, composite stack of multi-layer free magnet 801 includes‘n’ layers of first material 803 and second material 804.
[0081] For example, the composite stack comprises layers 803i-n and 804i-n stacked in an alternating manner, where‘n’ has a range of 1 to 10. In some embodiments, the first material includes one of: Co, Ni, Fe, or Heusler alloy. In some embodiments, the second material includes one of: Pt, Pd, Ir, Ru, or Ni. In some embodiments, the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V. In some embodiments, the Heusler alloy includes one of: Cu2MnAl, Cu2MnIn, Cu2MnSn, NFMnAl, NFMnln, NFMnSn, NFMnSb, NFMnGa Co2MnAl, Co2MnSi, Co2MnGa, Co2MnGe, Pd2MnAl, Pd2MnIn, Pd2MnSn, Pd2MnSb, Co2FeSi, Co2FeAl, Fe2VAl, Mn2VGa, Co2FeGe, MnGa, or MnGaRu. In some embodiments, the first material has a thickness t5 in a range of 0.6 nm to 2 nm. In some embodiments, the second material has a thickness t6 in a range of 0.1 nm to 3 nm. While the embodiments here show first material being at the bottom followed by the second material, the order can be reversed without changing the technical effect.
[0082] In some embodiments, interface layer 802 comprises a first layer 805 and a second layer 806. In some embodiments, first layer 805 is adjacent to the last layer 804n of composite stack 801. In some embodiments, first layer 805 includes one of: Ta, W, Mo, Ru, Cu. In some embodiments, the thickness of first layer 805 is between 0.1 nm and 2 nm. In some embodiments, second layer 806 includes one or more of: Co, Fe, B, or their alloys. In some embodiments, the thickness of second layer 806 is between 0.3 and 3nm.
[0083] In some embodiments, fixed magnet 823b comprises the same material as discussed with reference to fixed magnet l23b. In some embodiments, fixed magnet 823b is formed of the same material and structure as fixed magnet 701. In some embodiments, a SAF layer or AFM layer 807 is formed adjacent to fixed magnet 823b. In some
embodiments, fixed magnet 823b is a first layer of the SAF which comprises fixed magnet 823b, a coupler (e.g., Ru. Os, Hs, Fe, etc.) and another fixed magnet adjacent to the coupler such that the coupler is between fixed magnet 823b and the other fixed magnet.
[0084] Fig. 9A illustrates a plot 900 showing spin polarization capturing switching of the composite magnet 401, according to some embodiments of the disclosure. Fig. 9B illustrates a magnetization plot 920 associated with Fig. 9A, according to some embodiments of the disclosure. Plot 900 shows the switching of a spin orbit torque device with PMA.
Here, waveforms 901, 902, and 902 represent the magnetization projections on the x, y, and z axes, respectively. The magnet starts with z- magnetization of -1. Positive spin orbit torque (SOT) is applied from 5 to 50 ns (nanoseconds). It leads to switching z-magnetization to 1. Then negative spin orbit torque is applied between 120 ns and 160 ns. It leads to switching z- magnetization to 1. This illustrates change of magnetization in response to write charge current of certain polarity.
[0085] Fig. 9C illustrates a plot 930 showing spin polarization capturing switching of a composite magnet 401 using traditional spin orbit material, according to some embodiments of the disclosure. Fig. 9D illustrates a magnetization plot 940 associated with Fig. 9C, according to some embodiments of the disclosure. Here, waveforms 931, 932, and 932 represent the magnetization projections on the x, y, and z axes, respectively. The difference from the case of Fig. 9C is that negative spin orbit torque SOT is applied from 5 ns to 50 ns. As a result, z-magnetization remains close to -1. This illustrates persistence of magnetization in response to write charge current of opposite polarity.
[0086] Fig. 10 illustrates a cross-section 1000 of a die layout having the device of
Fig. 3A formed in metal 3 (M3) and metal 2 (M2) layer regions, according to some embodiments of the disclosure. Cross-section 1000 illustrates an active region having a transistor MN comprising diffusion region 1001, a gate terminal 1002, drain terminal 1004, and source terminal 1003. The source terminal 1003 is coupled to SL (source line) via poly or via, where the SL is formed on Metal 0 (MO). In some embodiments, the drain terminal 504 is coupled to MOa (also metal 0) through via 1005. The drain terminal 1004 is coupled to spin Hall angle electrode 1022 (e.g., electrode 122) through Via 0-1 (e.g., via connecting metal 0 to metal 1 layers), metal 1 (Ml), Via 1-2 (e.g., via connecting metal 1 to metal 2 layers), and Metal 2 (M2). In some embodiments, magnetic via 1023 is provided which is formed of layers 501 and/or 502 as discussed with reference to Fig. 5.
[0087] Referring back to Fig. 10, in some embodiments, the magnetic junction (e.g.,
MTJ 1021 or spin valve) is formed in the metal 3 (M3) region. Here, MTJ 1021 (or spin valve) can be according to any one of MTJs described with reference to Figs. 4-8. Referring back to Fig. 10, in some embodiments, the perpendicular free composite magnet layer of the magnetic junction (MTJ 1021 or spin valve) couples to spin Hall electrode 1022. In some embodiments, the fixed magnet layer of magnetic junction couples to the bit-line (BL) via spin Hall electrode 1022 with through Via 3-4 (e.g., via connecting metal 4 region to metal 4 (M4)). In this example, bit- line is formed on M4.
[0088] In some embodiments, n-type transistor MN is formed in the frontend of the die while the spin Hall electrode 1022 is located in the backend of the die. Here, the term “backend” generally refers to a section of a die which is opposite of a“frontend” and where an IC (integrated circuit) package couples to IC die bumps. For example, high level metal layers (e.g., metal layer 6 and above in a ten metal stack die) and corresponding vias that are closer to a die package are considered part of the backend of the die. Conversely, the term “frontend” generally refers to a section of the die that includes the active region (e.g., where transistors are fabricated) and low level metal layers and corresponding vias that are closer to the active region (e.g., metal layer 5 and below in the ten metal stack die example). In some embodiments, the spin Hall electrode 1022 is located in the backend metal layers or via layers for example in Via 3. In some embodiments, the electrical connectivity to the device is obtained in layers M0 and M4 or Ml and M5 or any set of two parallel interconnects.
[0089] Fig. 11 illustrates a cross-section of a die layout having the device of Fig. 3A formed in metal 2 (M2) and metal 1 (Ml) layer regions, according to some embodiments of the disclosure. Compared to Fig. 10, here the magnetic junction (e.g., MTJ 1021 or spin valve) is formed in the metal 2 region and/or Via 1-2 region. In some embodiments, the spin Hall angle electrode 1022 is formed in the metal 1 region.
[0090] Fig. 12 illustrates a plot 1200 showing improvement in energy-delay product using the device of Fig. 3A compared to the device of Fig. 2, in accordance with some embodiments of the disclosure. Here, x-axis is Write Energy (in fj) and y-axis is Delay (in ns). Here, two the energy-delay trajectories are compared as write voltage is varied— 1201 which is the energy-delay trajectory of device 100 and 1202 is the energy delay trajectory of device 300. Plot 1200 illustrates that device 300 provides a shorter (i.e., improved) energy- delay product than device 100.
[0091] Fig. 13 illustrates a flowchart 1300 of a method of forming a magnetic junction having a composite magnet, according to some embodiments of the disclosure.
While various blocks (operations or processes) are illustrated in an order, the order can be changed. For example, in some embodiments, some blocks can be performed in parallel.
[0092] At block 1301, a first region is formed comprising a super lattice including a first material and a second material, wherein the first region has perpendicular magnetic anisotropy (PMA), wherein the first region has an anisotropy axis perpendicular to a plane of a device. At block 1302, a second region is formed comprising a dielectric or metal. At block 1303, a third region is formed adjacent to the first and second regions, wherein the third region is to provide dipole exchange coupling to the second region. At block 1304, a fourth region is formed adjacent to the second region, wherein the fourth region comprises a magnet with fixed PMA. In some embodiments, the first material includes one of: Co, Ni, Fe, or Heusler alloy. In some embodiments, the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V. In some embodiments, the second material includes one of: Pt, Pd, Ir, Ru, or Ni. In some embodiments, the first material has a thickness in a range of 0.6 nm to 2 nm. In some embodiments, the second material has a thickness in a range of 0.1 nm to 3 nm. In some embodiments, the dielectric includes one or more of: Mg and O. In some embodiments, the method of forming the third region comprises: forming a first layer which includes one of: Ta or W; or forming a second layer adjacent to the first layer, wherein the second layer includes Co, Fe, B, or their alloys.
[0093] Fig. 14 illustrates a smart device or a computer system or a SoC (System-on-
Chip) with a magnetic junction having composite magnet, according to some embodiments of the disclosure.
[0094] For purposes of the embodiments, the transistors in various circuits and logic blocks described here are metal oxide semiconductor (MOS) transistors or their derivatives, where the MOS transistors include drain, source, gate, and bulk terminals. The transistors and/or the MOS transistor derivatives also include Tri-Gate and FinFET transistors, Gate All Around Cylindrical Transistors, Tunneling FET (TFET), Square Wire, or Rectangular Ribbon Transistors, ferroelectric FET (FeFETs), or other devices implementing transistor functionality like carbon nanotubes or spintronic devices. MOSFET symmetrical source and drain terminals i.e., are identical terminals and are interchangeably used here. A TFET device, on the other hand, has asymmetric Source and Drain terminals. Those skilled in the art will appreciate that other transistors, for example, Bi-polar junction transistors (BJT PNP/NPN), BiCMOS, CMOS, etc., may be used without departing from the scope of the disclosure.
[0095] Fig. 14 illustrates a block diagram of an embodiment of a mobile device in which flat surface interface connectors could be used. In some embodiments, computing device 1600 represents a mobile computing device, such as a computing tablet, a mobile phone or smart-phone, a wireless-enabled e-reader, or other wireless mobile device. It will be understood that certain components are shown generally, and not all components of such a device are shown in computing device 1600.
[0096] In some embodiments, computing device 1600 includes first processor 1610 with any one or more of devices of Figs. 3-8, according to some embodiments discussed. Other blocks of the computing device 1600 may also include any one or more of devices of Figs. 3-8, according to some embodiments. The various embodiments of the present disclosure may also comprise a network interface within 1670 such as a wireless interface so that a system embodiment may be incorporated into a wireless device, for example, cell phone or personal digital assistant.
[0097] In some embodiments, processor 1610 (and/or processor 1690) can include one or more physical devices, such as microprocessors, application processors,
microcontrollers, programmable logic devices, or other processing means. The processing operations performed by processor 1610 include the execution of an operating platform or operating system on which applications and/or device functions are executed. The processing operations include operations related to I/O (input/output) with a human user or with other devices, operations related to power management, and/or operations related to connecting the computing device 1600 to another device. The processing operations may also include operations related to audio I/O and/or display I/O.
[0098] In some embodiments, computing device 1600 includes audio subsystem
1620, which represents hardware (e.g., audio hardware and audio circuits) and software (e.g., drivers, codecs) components associated with providing audio functions to the computing device. Audio functions can include speaker and/or headphone output, as well as microphone input. Devices for such functions can be integrated into computing device 1600, or connected to the computing device 1600. In one embodiment, a user interacts with the computing device 1600 by providing audio commands that are received and processed by processor 1610.
[0099] In some embodiments, computing device 1600 comprises display subsystem
1630. Display subsystem 1630 represents hardware (e.g., display devices) and software (e.g., drivers) components that provide a visual and/or tactile display for a user to interact with the computing device 1600. Display subsystem 1630 includes display interface 1632, which includes the particular screen or hardware device used to provide a display to a user. In one embodiment, display interface 1632 includes logic separate from processor 1610 to perform at least some processing related to the display. In one embodiment, display subsystem 1630 includes a touch screen (or touch pad) device that provides both output and input to a user.
[00100] In some embodiments, computing device 1600 comprises I/O controller 1640. I/O controller 1640 represents hardware devices and software components related to interaction with a user. I/O controller 1640 is operable to manage hardware that is part of audio subsystem 1620 and/or display subsystem 1630. Additionally, I/O controller 1640 illustrates a connection point for additional devices that connect to computing device 1600 through which a user might interact with the system. For example, devices that can be attached to the computing device 1600 might include microphone devices, speaker or stereo systems, video systems or other display devices, keyboard or keypad devices, or other FO devices for use with specific applications such as card readers or other devices.
[00101] As mentioned above, I/O controller 1640 can interact with audio subsystem 1620 and/or display subsystem 1630. For example, input through a microphone or other audio device can provide input or commands for one or more applications or functions of the computing device 1600. Additionally, audio output can be provided instead of, or in addition to display output. In another example, if display subsystem 1630 includes a touch screen, the display device also acts as an input device, which can be at least partially managed by I/O controller 1640. There can also be additional buttons or switches on the computing device 1600 to provide I/O functions managed by I/O controller 1640.
[00102] In some embodiments, I/O controller 1640 manages devices such as accelerometers, cameras, light sensors or other environmental sensors, or other hardware that can be included in the computing device 1600. The input can be part of direct user interaction, as well as providing environmental input to the system to influence its operations (such as filtering for noise, adjusting displays for brightness detection, applying a flash for a camera, or other features). [00103] In some embodiments, computing device 1600 includes power management 1650 that manages battery power usage, charging of the battery, and features related to power saving operation. Memory subsystem 1660 includes memory devices for storing information in computing device 1600. Memory can include nonvolatile (state does not change if power to the memory device is interrupted) and/or volatile (state is indeterminate if power to the memory device is interrupted) memory devices. Memory subsystem 1660 can store application data, user data, music, photos, documents, or other data, as well as system data (whether long-term or temporary) related to the execution of the applications and functions of the computing device 1600.
[00104] Elements of embodiments are also provided as a machine-readable medium (e.g., memory 1660) for storing the computer-executable instructions (e.g., instructions to implement any other processes discussed herein). The machine-readable medium (e.g., memory 1660) may include, but is not limited to, flash memory, optical disks, CD-ROMs, DVD ROMs, RAMs, EPROMs, EEPROMs, magnetic or optical cards, phase change memory (PCM), or other types of machine-readable media suitable for storing electronic or computer- executable instructions. For example, embodiments of the disclosure may be downloaded as a computer program (e.g., BIOS) which may be transferred from a remote computer (e.g., a server) to a requesting computer (e.g., a client) by way of data signals via a communication link (e.g., a modem or network connection).
[00105] In some embodiments, computing device 1600 comprises connectivity 1670. Connectivity 1670 includes hardware devices (e.g., wireless and/or wired connectors and communication hardware) and software components (e.g., drivers, protocol stacks) to enable the computing device 1600 to communicate with external devices. The computing device 1600 could be separate devices, such as other computing devices, wireless access points or base stations, as well as peripherals such as headsets, printers, or other devices.
[00106] Connectivity 1670 can include multiple different types of connectivity. To generalize, the computing device 1600 is illustrated with cellular connectivity 1672 and wireless connectivity 1674. Cellular connectivity 1672 refers generally to cellular network connectivity provided by wireless carriers, such as provided via GSM (global system for mobile communications) or variations or derivatives, CDMA (code division multiple access) or variations or derivatives, TDM (time division multiplexing) or variations or derivatives, or other cellular service standards. Wireless connectivity (or wireless interface) 1674 refers to wireless connectivity that is not cellular, and can include personal area networks (such as Bluetooth, Near Field, etc.), local area networks (such as Wi-Fi), and/or wide area networks (such as WiMax), or other wireless communication.
[00107] In some embodiments, computing device 1600 comprises peripheral connections 1680. Peripheral connections 1680 include hardware interfaces and connectors, as well as software components (e.g., drivers, protocol stacks) to make peripheral connections. It will be understood that the computing device 1600 could both be a peripheral device ("to" 1682) to other computing devices, as well as have peripheral devices ("from" 1684) connected to it. The computing device 1600 commonly has a "docking" connector to connect to other computing devices for purposes such as managing (e.g., downloading and/or uploading, changing, synchronizing) content on computing device 1600. Additionally, a docking connector can allow computing device 1600 to connect to certain peripherals that allow the computing device 1600 to control content output, for example, to audiovisual or other systems.
[00108] In addition to a proprietary docking connector or other proprietary connection hardware, the computing device 1600 can make peripheral connections 1680 via common or standards-based connectors. Common types can include a Universal Serial Bus (USB) connector (which can include any of a number of different hardware interfaces), DisplayPort including MiniDisplayPort (MDP), High Definition Multimedia Interface (HDMI), Firewire, or other types.
[00109] Reference in the specification to "an embodiment," "one embodiment," "some embodiments," or "other embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiments is included in at least some embodiments, but not necessarily all embodiments. The various appearances of "an embodiment," "one embodiment," or "some embodiments" are not necessarily all referring to the same embodiments. If the specification states a component, feature, structure, or characteristic "may," "might," or "could" be included, that particular component, feature, structure, or characteristic is not required to be included. If the specification or claim refers to "a" or "an" element, that does not mean there is only one of the elements. If the specification or claims refer to "an additional" element, that does not preclude there being more than one of the additional element.
[00110] Furthermore, the particular features, structures, functions, or characteristics may be combined in any suitable manner in one or more embodiments. For example, a first embodiment may be combined with a second embodiment anywhere the particular features, structures, functions, or characteristics associated with the two embodiments are not mutually exclusive.
[00111] While the disclosure has been described in conjunction with specific embodiments thereof, many alternatives, modifications and variations of such embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description. The embodiments of the disclosure are intended to embrace all such alternatives, modifications, and variations as to fall within the broad scope of the appended claims.
[00112] In addition, well known power/ground connections to integrated circuit (IC) chips and other components may or may not be shown within the presented figures, for simplicity of illustration and discussion, and so as not to obscure the disclosure. Further, arrangements may be shown in block diagram form in order to avoid obscuring the disclosure, and also in view of the fact that specifics with respect to implementation of such block diagram arrangements are highly dependent upon the platform within which the present disclosure is to be implemented (i.e., such specifics should be well within purview of one skilled in the art). Where specific details (e.g., circuits) are set forth in order to describe example embodiments of the disclosure, it should be apparent to one skilled in the art that the disclosure can be practiced without, or with variation of, these specific details. The description is thus to be regarded as illustrative instead of limiting.
[00113] The following examples pertain to further embodiments. Specifics in the examples may be used anywhere in one or more embodiments. All optional features of the apparatus described herein may also be implemented with respect to a method or process.
[00114] Example 1. An apparatus comprising: a magnetic junction including: a super lattice structure comprising a first material and a second material, wherein the super lattice structure has perpendicular magnetic anisotropy (PM A), and wherein the super lattice structure has an anisotropy axis perpendicular to a plane of a device; and an interconnect adjacent to the magnetic junction, wherein the interconnect comprises a spin orbit material.
[00115] Example 2. The apparatus of example 1, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy.
[00116] Example 3. The apparatus of example 2, wherein the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
[00117] Example 4. The apparatus of claim 1, wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
[00118] Example 5. The apparatus of example 1, wherein the first material has a thickness in a range of 0.6 nm to 2 nm. [00119] Example 6. The apparatus of example 1, wherein the second material has a thickness in a range of 0.1 nm to 3 nm.
[00120] Example 7. The apparatus of example 1, wherein the magnetic junction comprises: a second structure adjacent to the structure, wherein the second structure includes one of: Ta or W; and a third structure adjacent to the second structure, wherein the third structure includes one or more of: Co, Fe, B, or their alloys.
[00121] Example 8. The apparatus of example 7 comprises a fourth structure adjacent to the third structure, wherein the fourth structure includes one of: dielectric material or metal.
[00122] Example 9. The apparatus of example 8, wherein the dielectric material comprises: Mg and O.
[00123] Example 10. The apparatus of example 8 comprises a fifth structure adjacent to the fourth structure, wherein the fifth structure includes a magnet with fixed PMA.
[00124] Example 11. The apparatus of example 10, wherein the fifth structure comprises a super lattice including the first material and the second material, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy, and wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
[00125] Example 12. The apparatus according to any one of the preceding examples comprises a sixth structure adjacent to the interconnect such that the magnetic junction in adjacent to a first surface of the interconnect, wherein the structure is adjacent to a second surface of the interconnect, wherein the second surface is opposite to the first surface, and wherein the sixth structure is to provide an additional magnetic field to the structure comprising the super lattice.
[00126] Example 13. The apparatus of example 12, comprises a seventh structure adjacent to the sixth structure, wherein the seventh structure comprises an antiferromagnetic (AFM) material.
[00127] Example 14. The apparatus of example 13, wherein the AFM material includes one of: Ir, Pt, Mn, Pd, or Fe.
[00128] Example 15. The apparatus of example 13, wherein the AFM material is a quasi-two-dimensional triangular AFM including Ni(i-X)MxGa2S4, where‘M’ includes one of: Mn, Fe, Co or Zn.
[00129] Example 16. The apparatus according to any one of preceding examples, wherein the interconnect is to generate spin Hall effect (SHE). [00130] Example 17. The apparatus according to any one of preceding examples, wherein the interconnect includes one or more or: b-Tantalum (b-Ta), Ta, b-Tungsten (b-W), W, Platinum (Pt), Copper (Cu) doped with elements including on of Iridium, Bismuth, elements of 3d, 4d, 5d and 4f, 5f periodic groups, Ti, S, W, Mo, Se, Sb, Re, La, C, P, Bi, Al, Y, Fa, In, Ce, Pr, Nd, or Sr.
[00131] Example 18. The apparatus of example 1, wherein the spin orbit material includes one of a 2D material or a 3D material, wherein the 3D material is thinner than the 2D material.
[00132] Example 19. The apparatus of example 1, wherein the spin orbit material includes a material which is to exhibit Rashba-Bychkov effect.
[00133] Example 20. The apparatus according to any one of preceding examples, wherein the magnetic junction is one of a spin valve or a magnetic tunneling junction (MTJ).
[00134] Example 21. A system comprising: a memory; a processor coupled to the memory, the processor having a spin wave switch, which comprises an apparatus according to any one of apparatus examples 1 to 20; and a wireless interface to allow the processor to communicate with another device.
[00135] Example 22. A magnetic junction comprising: a first region comprising a super lattice including a first material and a second material, wherein the first region has perpendicular magnetic anisotropy (PMA), wherein the first region has an anisotropy axis perpendicular to a plane of a device; a second region comprising a dielectric or metal; a third region adjacent to the first and second regions, the third region to provide dipole exchange coupling to the second region; and a fourth region adjacent to the second region, the fourth region comprising a magnet with fixed PMA.
[00136] Example 23. The magnetic junction of example 22, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy.
[00137] Example 24. The magnetic junction of example 23, wherein the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
[00138] Example 25. The magnetic junction of example 22 wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
[00139] Example 26. The magnetic junction of example 22, wherein the first material has a thickness in a range of 0.6 nm to 2 nm.
[00140] Example 27. The magnetic junction of example 22, wherein the second material has a thickness in a range of 0.1 nm to 3 nm. [00141] Example 28. The magnetic junction of example 22, wherein the dielectric includes one or more of: Mg and O.
[00142] Example 29. The magnetic junction of example 24, wherein the fourth region includes one of: Cu, Mn, Al, In, Sn, Ni, Sb, Ga, Ge, Pd, Fe, Si, Co, V, or Ru.
[00143] Example 30. The magnetic junction of example 24, comprises a fifth region adjacent to the fourth region, wherein the fifth region includes an antiferromagnetic (AFM) material.
[00144] Example 31. The magnetic junction of example 30 wherein the AFM material includes one of: Ir, Pt, Mn, Pd, or Fe.
[00145] Example 32. The magnetic junction of example 30, wherein the AFM material is a quasi-two-dimensional triangular AFM including Ni(i-X)MxGa2S4, where‘M’ includes one of: Mn, Fe, Co or Zn.
[00146] Example 33. The magnetic junction of example 22, wherein the fourth region comprises a super lattice including the first material and the second material, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy, and wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
[00147] Example 34. The magnetic junction of example 33, wherein the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
[00148] Example 35. The magnetic junction of claim 22, wherein the first material has a thickness in a range of 0.6 nm to 2 nm, and wherein the second material has a thickness in a range of 0.1 nm to 3 nm.
[00149] Example 36. A system comprising: a memory; a processor coupled to the memory, the processor having a spin wave switch, which comprises an apparatus according to any one of apparatus examples 22 to 35; and a wireless interface to allow the processor to communicate with another device.
[00150] Example 37. A method comprising: forming a magnetic junction including: forming a structure comprising a super lattice including a first material and a second material, wherein the structure has perpendicular magnetic anisotropy (PMA), wherein the structure has an anisotropy axis perpendicular to a plane of a device; and forming an interconnect adjacent to the magnetic junction, wherein the interconnect comprises a spin orbit material.
[00151] Example 38. The method of example 37, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy.
[00152] Example 39. The method of example 38, wherein the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V. [00153] Example 40. The method of example 37, wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
[00154] Example 41. The method of example 37, wherein the first material has a thickness in a range of 0.6 nm to 2 nm.
[00155] Example 42. The method of example 37, wherein the second material has a thickness in a range of 0.1 nm to 3 nm.
[00156] Example 43. The method of example 37, wherein forming the magnetic junction comprises: forming a second structure adjacent to the structure, wherein the second structure includes one of: Ta or W; and forming a third structure adjacent to the second structure, wherein the third structure includes one or more of: Co, Fe, B, or their alloys.
[00157] Example 44. The method of example 43 comprises forming a fourth structure adjacent to the third structure, wherein the fourth structure includes one of: dielectric material or metal.
[00158] Example 45. The method of example 44, wherein the dielectric material comprises: Mg and O.
[00159] Example 46. The method of example 44 comprises forming a fifth structure adjacent to the fourth structure, wherein the fifth structure includes a magnet with fixed PMA.
[00160] Example 47. The method of example 46, wherein forming the fifth structure comprises forming a super lattice including the first material and the second material, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy, and wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
[00161] Example 48. The method according to any one of the preceding method examples comprises forming a sixth structure adjacent to the interconnect such that the magnetic junction in adjacent to a first surface of the interconnect, wherein the structure is adjacent to a second surface of the interconnect, wherein the second surface is opposite to the first surface, and wherein the sixth structure is to provide an additional magnetic field to the structure comprising the super lattice.
[00162] Example 49. The method of example 48, comprises forming a seventh structure adjacent to the sixth structure, wherein the seventh structure comprises
antiferromagnetic (AFM) material.
[00163] Example 50. The method of example 49, wherein the AFM material includes one of: Ir, Pt, Mn, Pd, or Fe. [00164] Example 51. The method of example 49, wherein the AFM material is a quasi-two-dimensional triangular AFM including Ni(i-X)MxGa2S4, where‘M’ includes one of: Mn, Fe, Co or Zn.
[00165] Example 52. The method according to any one of preceding method examples, wherein the interconnect is to generate spin Hall effect (SHE).
[00166] Example 53. The method according to any one of preceding method examples, wherein the interconnect includes one or more or: b-Tantalum (b-Ta), Ta, b- Tungsten (b-W), W, Platinum (Pt), Copper (Cu) doped with elements including on of Iridium, Bismuth, elements of 3d, 4d, 5d and 4f, 5f periodic groups, Ti, S, W, Mo, Se, B, Sb, Re, La, C, P, As, Sc, O, Bi, Ga, Al, Y, In, La, Ce, Pr, Nd, Sr, or F.
[00167] Example 54. The method of example 37, wherein the spin orbit material includes one of a 2D material or a 3D material, wherein the 3D material is thinner than the 2D material.
[00168] Example 55. The method of example 37, wherein the spin orbit material includes a material which is to exhibit Rashba-Bychkov effect.
[00169] Example 56. The method according to any one of preceding method examples, wherein the magnetic junction is one of a spin valve or a magnetic tunneling junction (MTJ).
[00170] Example 57. A method for forming a magnetic junction, the method comprising: forming a first region comprising a super lattice including a first material and a second material, wherein the first region has perpendicular magnetic anisotropy (PMA), wherein the first region has an anisotropy axis perpendicular to a plane of a device; forming a second region comprising a dielectric or metal; forming a third region adjacent to the first and second regions, the third region to provide dipole exchange coupling to the second region; and forming a fourth region adjacent to the second region, the fourth region comprising a magnet with fixed PMA.
[00171] Example 58. The method of example 57, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy.
[00172] Example 59. The method of example 58, wherein the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
[00173] Example 60. The method of claim 57, wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
[00174] Example 61. The method of example 57, wherein the first material has a thickness in a range of 0.6 nm to 2 nm. [00175] Example 62. The method of example 57, wherein the second material has a thickness in a range of 0.1 nm to 3 nm.
[00176] Example 63. The method of example 57, wherein the dielectric includes one or more of: Mg and O.
[00177] Example 64. The method of example 57, wherein forming the third region comprises: forming a first structure which includes one of: Ta or W; or forming a second structure adjacent to the first structure, wherein the second structure includes Co, Fe, B, or their alloys.
[00178] An abstract is provided that will allow the reader to ascertain the nature and gist of the technical disclosure. The abstract is submitted with the understanding that it will not be used to limit the scope or meaning of the claims. The following claims are hereby incorporated into the detailed description, with each claim standing on its own as a separate embodiment.

Claims

CLAIMS We claim:
1. An apparatus comprising:
a magnetic junction including:
a super lattice structure comprising a first material and a second material, wherein the super lattice structure has perpendicular magnetic anisotropy (PMA) relative to an x-y plane of a device; and
an interconnect adjacent to the magnetic junction, wherein the interconnect comprises a spin orbit material.
2. The apparatus of claim 1, wherein the first material includes one of: Co, Ni, Fe, or
Heusler alloy.
3. The apparatus of claim 2, wherein the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
4. The apparatus of claim 1, wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
5. The apparatus of claim 1, wherein the first material has a thickness in a range of 0.6 nm to 2 nm.
6. The apparatus of claim 1, wherein the second material has a thickness in a range of 0.1 nm to 3 nm.
7. The apparatus of claim 1, wherein the magnetic junction comprises:
a second structure adjacent to the structure, wherein the second structure includes one of: Ta or W; and
a third structure adjacent to the second structure, wherein the third structure includes one or more of: Co, Fe, B, or their alloys.
8. The apparatus of claim 7 comprises a fourth structure adjacent to the third structure, wherein the fourth structure includes one of: dielectric material or metal.
9. The apparatus of claim 8, wherein the dielectric material comprises: Mg and O.
10. The apparatus of claim 8 comprises a fifth structure adjacent to the fourth structure, wherein the fifth structure includes a magnet with fixed PMA.
11. The apparatus of claim 10, wherein the fifth structure comprises a super lattice including the first material and the second material, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy, and wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni.
12. The apparatus according to any one of the preceding claims comprises a sixth structure adjacent to the interconnect such that the magnetic junction in adjacent to a first surface of the interconnect, wherein the structure is adjacent to a second surface of the interconnect, wherein the second surface is opposite to the first surface, and wherein the sixth structure is to provide an additional magnetic field to the structure comprising the super lattice.
13. The apparatus of claim 12, comprises a seventh structure adjacent to the sixth structure, wherein the seventh structure comprises an antiferromagnetic (AFM) material.
14. The apparatus of claim 13, wherein the AFM material includes one of: Ir, Pt, Mn, Pd, or Fe.
15. The apparatus of claim 13, wherein the AFM material is a quasi-two-dimensional
triangular AFM including Ni(i-X)MxGa2S4, where‘M’ includes one of: Mn, Fe, Co or Zn.
16. The apparatus according to any one of preceding claims, wherein the interconnect is to generate spin Hall effect (SHE).
17. The apparatus according to any one of preceding claims, wherein the interconnect
includes one or more or: b-Tantalum (b-Ta), Ta, b-Tungsten (b-W), W, Platinum (Pt), Copper (Cu) doped with elements including on of Iridium, Bismuth, elements of 3d, 4d, 5d and 4f, 5f periodic groups, Ti, S, W, Mo, Se, Sb, Re, La, C, P, Bi, Al, Y, Fa, In, Ce, Pr, Nd, or Sr.
18. The apparatus of claim 1, wherein the spin orbit material includes one of a 2D material or a 3D material, wherein the 3D material is thinner than the 2D material.
19. The apparatus of claim 1, wherein the spin orbit material includes a material which is to exhibit Rashba-Bychkov effect.
20. The apparatus according to any one of preceding claims, wherein the magnetic junction is one of a spin valve or a magnetic tunneling junction (MTJ).
21. A system comprising: a memory; a processor coupled to the memory, the processor
having a spin wave switch, which comprises an apparatus according to any one of apparatus claims 1 to 20; and a wireless interface to allow the processor to communicate with another device.
22. A magnetic junction comprising:
a first region comprising a super lattice including a first material and a second material, wherein the first region has perpendicular magnetic anisotropy (PMA) relative to an x-y plane of a device;
a second region comprising a dielectric or metal;
a third region adjacent to the first and second regions, the third region to provide dipole exchange coupling to the second region; and
a fourth region adjacent to the second region, the fourth region comprising a magnet with fixed PMA.
23. The magnetic junction of claim 22, wherein the first material includes one of: Co, Ni, Fe, or Heusler alloy.
24. The magnetic junction of claim 23, wherein the Heusler alloy includes one or more of Co, Cu, Fe, Ga, Ge, In, Mn, Al, In, Sb, Si, Sn, Ni, Pd, Ru, or V.
25. The magnetic junction of claim 22 wherein the second material includes one of: Pt, Pd, Ir, Ru, or Ni, wherein the first material has a thickness in a range of 0.6 nm to 2 nm, and wherein the second material has a thickness in a range of 0.1 nm to 3 nm.
PCT/US2017/067086 2017-12-18 2017-12-18 Perpendicular spin orbit coupling based memory with composite free layer WO2019125383A1 (en)

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