WO2019116785A1 - Power conversion device - Google Patents

Abstract

The present invention achieves a low-cost power conversion device that performs PWM synchronization. This power conversion device is provided with power conversion cells 101-104 that supply the voltage of a power supply 300 to a load 400, and a central control unit 200 that controls these power conversion cells. The power conversion cells 101-104 respectively comprise first converters 141-144 and first control circuits 211-214 for respectively controlling these first converters, second converters 151-154 and second control circuits 221-224 for respectively controlling these second converters by pulse width modulation, and transformers 131-134 respectively connected between the first converters 141-144 and the second converters 151-154. The central control unit 200 transmits a first control signal and a synchronization signal to the first control circuits 211-214 of the power conversion cells 101-104, the first control circuits 211-214 transmit a second control signal to the second control circuits 221-224 of the power conversion cells 101-104 upon receipt of the synchronization signal, and the second control circuits 221-224 reset a carrier signal for the pulse width modulation upon receipt of the second control signal.

Description

Power converter

The present invention relates to a power converter.

In high-voltage or large-capacity power conversion, a power conversion device in which a plurality of power conversion cells (hereinafter referred to as cells) are connected in series or in parallel is used. As such a power converter, there is a multiple power converter described in Patent Document 1. In this multiplex power converter, outputs of a plurality of inverter units (corresponding to cells) are respectively connected in series to obtain a high voltage output.

Patent Document 1 describes PWM (Pulse Width Modulation) of a plurality of inverter units.

Specifically, the on / off state of the semiconductor element (switching element) included in each inverter unit is controlled by using a plurality of carrier waves according to the number of inverter units. Thus, multistage (multilevel) output voltages can be obtained.

As described in Patent Document 1, a plurality of carrier signals are in phase with one another. Synchronizing the phases of a plurality of carrier signals is considered to be effective in suppressing harmonic components included in the output voltage. Moreover, it is considered effective also in suppressing that the output voltage changes a plurality of levels at once and adversely affecting the load such as a motor.

Such a configuration of the power conversion device is effective when directly driving a high voltage motor.

In addition, although the introduction of natural energy generation such as solar power generation and wind power generation is expanding worldwide, PCS (power conditioning system) is used as a power conversion device to convert electric power obtained from natural energy and output it to the electric power system. ). A configuration using a plurality of cells is considered to be effective also in increasing the voltage and increasing the capacity of the PCS.

JP 2002-58257 A

Here, in the following description, synchronization of phases of a plurality of carrier signals used for PWM of a plurality of cells is defined as PWM synchronization.

The realization of PWM synchronization is considered to have the following problems.

When a central control unit is provided to integrally control a plurality of cells, a configuration is conceivable in which the central control unit performs PWM processing of all the cells and transmits the generated gate signal of the switching element to the control circuit of each cell.

However, since a cell often includes a plurality of switching elements instead of one, a plurality of gate signal lines are provided according to the number of switching elements, which causes a problem of the complexity and cost increase of the power conversion device. It becomes.

An object of the present invention is to realize a low cost power converter that performs PWM synchronization.

In order to achieve the above object, the present invention is configured as follows.

The power converter includes: a plurality of power conversion cells for converting a power supply voltage into a voltage for supplying a load; and a central control unit for controlling the plurality of power conversion cells, each of the plurality of power conversion cells being A first converter for converting the power supply voltage, a first control circuit for controlling the first converter, a second converter for converting the voltage converted by the first converter, and a second converter A second control circuit for controlling the pulse width modulation by pulse width modulation, and a transformer connected between the first converter and the second converter,
The central control device includes a control signal transmission unit that transmits a first control signal to the first control circuit included in each of the plurality of power conversion cells, and based on the first control signal, the plurality of powers A first control circuit included in each of the conversion cells controls the first converter, and the second control circuit controls the second converter to reset the carrier signal of the pulse width modulation.

According to the present invention, a low cost power converter that performs PWM synchronization can be realized.

FIG. 1 is a schematic configuration diagram of a power conversion device in a first embodiment. It is a figure which shows the circuit structural example of a cell. It is a figure which shows the PWM operation | movement waveform of the cell in the case of controlling output voltage to a positive value. It is a figure which shows the PWM operation | movement waveform of the cell in the case of controlling an output voltage to a negative value. It is a figure which shows an example of a synthetic | combination output voltage waveform. 5 is a timing chart showing the principle of PWM synchronization of the first embodiment. It is a figure which shows the specific data structural example of a 1st control signal. It is a figure which shows the specific data structural example of a 2nd control signal. It is a figure which shows the structural example of the 1st control circuit of a cell. It is a figure which shows the structural example of the 2nd control circuit of a cell. 7 is a timing chart showing another example of PWM synchronization according to the first embodiment. 7 is a timing chart showing the principle of PWM synchronization in the second embodiment. 15 is a timing chart showing the principle of PWM synchronization in the third embodiment. FIG. 10 is a schematic configuration diagram of a power conversion device in a fourth embodiment. 15 is a timing chart showing the principle of PWM synchronization in the fourth embodiment. FIG. 13 is a schematic configuration diagram of a power conversion device in a fifth embodiment. FIG. 16 is a schematic configuration diagram of a power conversion device 4 in a sixth embodiment.

Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

Example 1
FIG. 1 is a schematic configuration diagram of a power conversion device according to a first embodiment of the present invention.

In FIG. 1, the power conversion device 1 converts power input from an external power supply 300 and outputs the converted power to an external load 400. Further, the power conversion device 1 includes a plurality of cells 101 to 104 and a central control device 200 that controls them. Although FIG. 1 shows an example in which four cells are used, the number is arbitrary.

The cells 101 to 104 include first converters 141 to 144 and first control circuits 211 to 214 for controlling them, second converters 151 to 154, second control circuits 221 to 224 for controlling them, and Transformers 131 to 134 connected respectively between the converters 141 to 144 and the second converters 151 to 154 are provided.

Hereinafter, the first converters 141 to 144 and the first control circuits 211 to 214 are collectively defined as primary circuits 111 to 114, respectively. The second converters 151 to 154 and the second control circuits 221 to 224 are collectively defined as secondary circuits 121 to 124, respectively. The transformers 131 to 134 electrically insulate the primary side circuits 111 to 114 and the secondary side circuits 121 to 124, respectively. A more detailed configuration of the cell will be described later.

The input terminals (input sides) of the cells 101 to 104 are connected in parallel to the power supply 300. Therefore, the input voltages of the cells 101 to 104 are all equal. The cells 101 to 104 convert the voltage of the power supply 300 to generate output voltages V _O1 to V _O4 , respectively.

The manner in which the cell 101 generates the output voltage V _O1 will be described.

First, the first converter 141 of the primary side circuit 111 converts the voltage of the power supply 300 into an alternating voltage and applies it to the primary winding of the transformer 131. The first control circuit 211 of the primary side circuit 111 performs calculation and processing related to this operation to drive the first converter 141.

Next, the second converter 151 of the secondary side circuit 121 converts the voltage generated in the secondary winding of the transformer 131 to generate the voltage V _O1 . The second control circuit 221 of the secondary side circuit 121 performs operation and processing related to this operation to drive the second converter 151. Also for cells 102 to 104, voltages V _O2 to V _O4 are respectively generated in the same manner.

The output terminals (output side) of the cells 101 to 104 are connected in series with one another. The output voltage of the power conversion device 1 is a voltage obtained by combining the voltages V _O1 to V _O4 . Hereinafter, this is defined as a combined output voltage V _OS (= V _O1 + V _O2 + V _O3 + V _O4 ). With the above configuration, the power conversion device 1 can output a voltage higher than the rated output voltage of each cell.

Here, the secondary side circuits 121 to 124 respectively control the output voltages V _O1 to V _O4 using PWM (Pulse Width Modulation) as described later. The second control circuit 221 performs PWM processing using a carrier signal generated internally and a duty ratio (hereinafter abbreviated as duty) transmitted from the outside, and drives the second converter 151 according to the result. The duty is a numerical value for setting the on period ratio of the switching element in PWM. The duty is generated by central controller 200 to control voltage V _O1 to a desired value.

The second control circuits 222 to 224 similarly perform PWM processing to drive the second converters 152 to 154, respectively. Although carrier signal generation by the second control circuits 221 to 224 is independent, PWM synchronization is realized by the method described later.

Here, although this is an example different from the present invention, in the PWM of the secondary side circuits 121 to 124, the central control unit 200 performs all the PWM processing of the secondary side circuits 121 to 124, and A configuration in which the gate signal is transmitted to the secondary side circuits 121 to 124 is also conceivable.

However, as described later, since there are a plurality of switching elements of the second converter, a plurality of gate signal lines are required accordingly, and the power converter becomes complicated and expensive.

On the other hand, as in the first embodiment of the present invention, if the central control unit 200 transmits the duty to the second control circuits 221 to 224 and the second control circuits 221 to 224 independently perform the PWM processing. It is possible to suppress the increase in complexity and cost of wiring relating to the control signal from central controller 200 to each cell.

The central control unit 200 controls the output voltages V _O1 to V _O4 of the cells 101 to 104 in order to control the combined output voltage V _OS to a desired value.

When applying the power conversion device 1 to a PCS of solar power generation, it is required to control the output current of the power conversion device 1 to a desired value. In FIG. 1, assuming such a case, the current detector 230 is disposed on the path of the output current.

The control calculation unit 201 included in the central control unit 200 performs calculation of feedback control using the detected value of the output current detected from the current detector 230, and calculates the target value of the output voltage V _OS and thus each output cell 101 to 104. Target values of voltages V _O1 to V _O4 are generated.

Furthermore, the control calculation unit 201 performs calculation and processing for setting the voltages V _O1 to V _O4 as target values, and the first control circuits 211 to 214 and the second control circuits 221 to 224 of the respective cells 101 to 104 Generate control commands. The control command is a target value (command value) of control or a state command such as start or stop, and the above-described duty is also included in the control command.

The control operation unit 201 outputs the generated control command to the control signal transmission unit 202. In FIG. 1, four arrows are shown as control commands in order to indicate that individual control commands are output for each of the four cells 101 to 104. The control signal transmission unit 202 generates a first control signal for each of the cells 101 to 104 based on the control command, and transmits the first control signal to the first control circuit 211 to 214 of each of the cells 1101 to 104.

The first control signal transmitted by the control signal transmission unit 202 includes a control instruction to the second control circuits 221 to 224 like a duty. As described above, even the control command directed to the second control circuits 221 to 224 is temporarily transmitted to the first control circuits 211 to 214 of the cells 101 to 104 to which the second control circuits 221 to 224 belong.

That is, relay is performed using the first control circuits 211 to 214, and a control command is transmitted to the second control circuits 221 to 224.

The primary side circuits 111 to 114 of the cells 101 to 104 are connected in parallel to the external power supply 300. Therefore, the ground potentials of the first control circuits 211 to 214 (reference potentials at which the circuits operate) are all common. Further, the ground potentials of the central control unit 200 and the first control circuits 211 to 214 can be shared. Therefore, for communication from the central control unit 200 to the first control circuits 211 to 214, insulation is not necessary, and communication using electric wires can be applied.

In the first embodiment, serial communication is assumed as a communication method from the control signal transmission unit 202 of the central control device 200 to the first control circuits 211 to 214. Therefore, the first control signal is a serial communication signal of several bytes.

Further, in the first embodiment, a communication bus is shared between the control signal transmission unit 202 of the central control device 200 and all the first control circuits 211 to 214, and all of the control signal transmission unit 202 is shared by this communication bus. And the first control circuits 211 to 214 are connected. Therefore, FIG. 1 shows one arrow as the first control signal output from the control signal transmission unit 202, and shows a configuration in which it is input in parallel to the first control circuits 211 to 214 of each cell. As described later, the first control signal includes an address for identifying the cells 101 to 104. For this reason, the control signal transmission unit 202 encodes the control command and further adds an address to generate a serial communication signal.

In central control unit 200, control signal transmission unit 202 outputs a synchronization instruction to synchronization signal transmission unit 203. The synchronization signal transmission unit 203 generates a synchronization signal based on the synchronization command output from the synchronization signal transmission unit 202, and outputs the synchronization signal to the first control circuits 211 to 214. The synchronization signals output to the first control circuits 211 to 214 are digital signals used for PWM synchronization, and the details will be described later.

Also in transmission of synchronization signals from the synchronization signal transmission unit 203 of the central control unit 200 to the first control circuits 211 to 214, since the ground potential can be shared, insulation is not necessary, and signal transmission using electric wires can be applied. .

In the first embodiment, the synchronization signal transmission unit 203 of the central control device 200 outputs a common synchronization signal to all of the first control circuits 211 to 214. In FIG. 1, one arrow is shown as the synchronization signal output from the synchronization signal transmission unit 203, and the configuration to input it in parallel to the first control circuits 211 to 214 is shown.

This is an example different from the first embodiment of the present invention, and when the signal transmission from the central control unit 200 to each of the cells 101 to 104 requires insulation, a method using an expensive optical fiber can be considered. In that case, since the wiring from the central control unit 200 to each cell can be a long distance, the total length of optical fibers to be used becomes long, and the cost of the power converter becomes high.

On the other hand, in the first embodiment, since the ground potential can be made common, insulation is not necessary for all signal transmission from the central control unit 200 to each of the cells 101 to 104, which is not expensive optical fiber but inexpensive. Since electric wires can be used, a low cost power converter can be realized.

Furthermore, as shown in FIG. 1, if the communication buses are shared among all the cells 101 to 104, the number of output ports of central control apparatus 200 can be reduced, and a lower cost power converter can be realized. There is also an advantage in terms of suppressing the complexity of the wiring.

The first control circuit 211 extracts a control command related to the first converter 141 from the received first control signal, and drives the first converter 141 accordingly. Further, the first control circuit 211 extracts a control command (such as a duty) for the second converter 151 from the first control signal, generates a second control signal based on the extracted control command, and generates a second control generated. A signal is sent to the second control circuit 221. Communication from the first control circuit 211 to the second control circuit 221 is triggered by the rise (or fall) of the synchronization signal transmitted from the synchronization signal transmission unit 203 of the central control device 200.

The first control circuits 212 to 214 also drive the first converters 142 to 144 in the same manner as the above-described first control circuit 211, and transmit the second control signals to the second control circuits 222 to 224, respectively. .

Here, in order to output a common synchronization signal from the synchronization signal transmission unit 203 of the central control unit 200 to the first control circuits 211 to 214 of all the cells 101 to 104, the first control circuits 211 to 214 perform second control. Communication to circuits 221-224 is simultaneously performed in all cells 101-104. As described later, the second control circuits 221 to 224 of each of the cells 101 to 104 use the reception of the second control signal as a trigger to reset the carrier signal. Thus, PWM synchronization can be realized.

In the first embodiment, serial communication is used as communication means from the first control circuits 211 to 214 of the cells 101 to 104 to the second control circuits 221 to 224. Therefore, the second control signal is a serial communication signal of several bytes.

Since the secondary side circuits 121 to 124 of the cells 101 to 104 are connected in series with each other, the ground potentials of the second control circuits 221 to 224 are different from each other. In addition, the ground potentials of the first control circuits 211 to 214 and the second control circuits 221 to 224 are also different. Therefore, the communication from the first control circuits 211 to 214 of the cells 101 to 104 to the second control circuits 221 to 224 requires insulation. Therefore, for example, communication using an optical fiber can be considered. However, since the communication is performed inside the cells 101 to 104, the total length of the optical fibers becomes relatively short, and the cost of the optical fibers can be reduced.

Further, since communication from the first control circuits 211 to 214 to the second control circuits 221 to 224 in each of the cells 101 to 104 is a relatively short distance, in addition to the optical fiber, it may be similar to IrDA (Infrared Data Association). Infrared communication, ultrasonic waves, etc. may be used. In the case of infrared communication or ultrasonic communication, even if the ground potentials of the first control circuits 211 to 214 and the second control circuits 221 to 224 are largely different, the distance between the transceivers of infrared communication or ultrasonic communication can be set. It is possible to communicate while securing the insulation by structural means such as keeping appropriate.

Here, supplementary matters will be described in the example shown in FIG. The external power source 300 may be either a DC power source or an AC power source. As an example, when applying the power conversion device 1 to a PCS of solar power generation, the external power supply 300 is a solar cell. Also, as an example of the external load 400, there is a high voltage motor and other power devices.

The external load 400 may be a power system as in the case of applying the power conversion device 1 to a PCS of solar power generation. Power converter 1 may be provided with elements, such as components for protection (relays, fuses, etc.) and components for filters (reactors, capacitors), in addition to the configuration described above.

FIG. 2 is a diagram showing an example of the circuit configuration of the cell 101. As shown in FIG. In the example shown in FIG. 2, it is assumed that the external power supply 300 is a DC power supply, and the power conversion apparatus outputs AC power to the external load 400. The same configuration as that of the cell 101 shown in FIG. 2 can be applied to the other cells 102 to 104.

In FIG. 2, the first converter 141 comprises a first inverter consisting of four switching elements (MOSFETs in the example of FIG. 2) 11-14. The direct current input terminal of the first inverter serves as the input terminal of the first converter 141. Further, a filter capacitor 10 is connected between the DC input terminals of the first inverter. And between the alternating current output terminals of the first inverter, a series resonance circuit in which the primary winding of the coil 15, the capacitor 16 and the transformer 131 is connected in series is connected.

The second converter 151 includes a diode bridge consisting of diodes 21 to 24. The secondary winding of the transformer 131 is connected between the AC input terminals of the diode bridge. The first inverter, the series resonant circuit, and the diode bridge described above constitute a resonant converter which is a type of isolated DC-DC converter.

A smoothing capacitor 20 is connected between the DC output terminals of the diode bridge in the second converter 151. In addition, the second converter 151 includes a second inverter including four switching elements (MOSFETs in FIG. 2) 31 to 34. The AC output terminal of the second inverter serves as the output terminal of the second converter 151 of the cell 101.

From the above configuration, it can be said that each of the cells 101 to 104 is composed of a resonant converter (hereinafter, converter) and a second inverter (hereinafter, inverter).

The converter converts the voltage input to the cell 101 to generate a DC link voltage _Vdc1 . Although details will be omitted, the DC link voltage V _dc1 can be controlled to a desired value by the on / off operation of the switching element. In order for the converter to control the DC link voltage particle V _dc1 , a voltage detector 25 for detecting the voltage V _dc1 is arranged in FIG. Further, although not shown in FIG. 1, the detected voltage V _dc1 is once taken into the second control circuit 221, and then transmitted from the second control circuit 221 to the first control circuit 211. The first control circuit 211 performs feedback control of the voltage V _dc1 and drives the converter based on the result.

Similarly to the converter shown in FIG. 2, the cells 102 to 104 also include a converter, and generate DC link voltages V _dc2 to V _dc4 , respectively.

Here, the DC link voltages V _dc1 to V _dc4 may all be controlled to the same value, or may be controlled to different values. However, in the following, it is assumed that the DC link voltages V _dc1 to V _dc4 are all controlled to the same value V _dc .

Although the resonant converter is shown in FIG. 2, any specific circuit system can be applied as long as it is an isolated DC-DC converter.

When the external power supply 300 is an AC power supply, a rectifier circuit (AC-DC converter) may be added to the front stage of the converter of FIG.

The inverter converts the voltage V _dc1 to generate the output voltage V ₀₁ of the cell 101. Similarly, the cells 102 to 104 also include inverters, and convert the voltages V _dc2 to V _dc4 to generate voltages V ₀₂ to V ₀₄ , respectively.

The inverters of the secondary side circuits 121 to 124 of the cells 101 to 104 control the output voltages V ₀₁ to V ₀₄ to desired values by PWM.

FIGS. 3 and 4 are diagrams showing examples of PWM operation waveforms of the secondary side circuit 121 in the cell 101. FIG. FIG. 3 shows a PWM operation waveform when the voltage V ₀₁ is controlled to a positive value. Specifically, as the PWM operation waveform, the carrier signal, the duty D ₁ , the gate signal of the switching elements 31 to 34 and the V ₀₁ waveform are shown. In addition, in FIG. 3, the dead time of the switching element is omitted for simplification of the drawings and the description.

In the example shown in FIG. 3, a triangular wave signal is shown as a carrier signal of PWM. The instantaneous value of the carrier signal changes in the range of 0 (0%) to 1 (100%). FIG. 3 shows PWM operation waveforms for three cycles of the carrier signal. In FIG. 3, the reset of the carrier signal described later is omitted.

Duty D ₁ is a control command for controlling the voltage V ₀₁ to a desired value, is transmitted to the second control circuit 221 from the control signal transmitting unit 202 of the central controller 200 via the first control circuit 211 It is included in the control signal. Duty _{D 1} is a value from -1 (-100%) to +1 (+ 100%). When the voltage V ₀₁ is controlled to a positive value, the duty D ₁ has a value from 0 to +1. In Figure 3, between each period of the carrier signal, it was assumed that the duty D ₁ is constant. Also, the case is shown where the duty D ₁ gradually increases over three cycles of the carrier signal.

When voltage V ₀₁ is controlled to a positive value, switching elements 33 and 34 shown in FIG. 2 are controlled to be off and on, respectively. Switching elements 31 and 32 are on-off controlled according to the comparison result of the duty D ₁ and the carrier signal. During the period the duty _{D 1} is greater than the carrier signal, the switching element 31 and 32 are controlled to turn on and off, (instantaneous value of) the voltage _{V 01} becomes _{+ V dc.} In duty D ₁ is smaller period than the carrier signal, the switching element 31 and 32 are controlled to off and on, _{(instantaneous} value of) V ₀₁ becomes zero.

The average value of the voltage V ₀₁ in the carrier period is (D ₁ V _dc ). If the duty D ₁ is changed in the range of 0 to +1, the inverter can output a desired voltage in the range of 0 ≦ V ₀₁ ≦ + V _dc as an average value in the carrier period. As in the example shown in FIG. 3, as the duty D ₁ increases, the voltage V ₀₁ (average value in the carrier period) also increases.

FIG. 4 is a PWM operation waveform diagram in the case of controlling the voltage V ₀₁ to a negative value. In the case of the example shown in FIG. 4, the duty D ₁ takes a value from −1 (−100%) to 0. In Figure 4, the absolute value of the duty _{D 1} instead of the duty _{D 1} shown in FIG. 3 | showed | _{D 1.} Also, it is shown that the absolute value | D ₁ | gradually increases over three periods of the carrier signal, that is, the duty D ₁ gradually decreases.

When the voltage V ₀₁ is controlled to a negative value, the switching elements 31 and 32 are controlled to be off and on, respectively. The switching elements 33 and 34 are on / off controlled according to the comparison result of the absolute value | D ₁ | of the duty D ₁ and the carrier signal. In a period in which | D ₁ | is larger than the carrier signal, the switching elements 33 and 34 are controlled to be on and off, respectively, and the voltage V ₀₁ (the instantaneous value thereof) becomes −V _dc . In a period in which | D ₁ | is smaller than the carrier signal, the switching elements 33 and 34 are controlled to be off and on, respectively, and the voltage V ₀₁ (the instantaneous value thereof) becomes zero.

The average value of the voltage V ₀₁ in the carrier period is (D ₁ V _dc ). Note that the utility D ₁ is a negative value. If the duty D ₁ is changed in the range of −1 to 0, the inverter can output a desired voltage in the range of −V _dc ≦ V ₀₁ ≦ 0 as an average value in the carrier period. As in the example shown in FIG. 4, as | D ₁ | increases, that is, as the duty D ₁ decreases, the voltage V ₀₁ (average value in the carrier period) decreases.

When central control device 200 controls voltage V ₀₁ to a certain target value V _a , the duty may be set to (V _a / V _dc ) with respect to the target value V _dc of the DC link voltage. Here, −V _dc ≦ V _a ≦ + V _dc . In central control unit 200, control operation unit 201 generates target value V _dc and duty (V _a / V _dc ) as control commands, and control signal transmission unit 202 generates a first control signal based on these control commands. Do. Here, it is assumed that _Vdc is a fixed value and is recorded in both the central control unit 200 and the first control circuit 211.

In this case, instead of the target value V _dc , the control operation unit 201 of the central control device 200 may also generate data (symbol) representing start or operation continuation of the converter as a control command. Also in the cells 102 to 104 (secondary circuits 122 to 124), the PWM processing is performed in the same manner.

FIG. 5 is a diagram showing an example of the combined output voltage V _OS waveform. 5, the sine wave indicated by a broken line is a basic wave component contained in the combined output voltage V _OS, may be considered as a target value of the combined output voltage V _OS.

The instantaneous value of the combined output voltage _{V OS is, -4V dc, -3V dc, ···} , 0, ···, + 3V dc, made with any of the + _{4V dc.} Given the PMW synchronization, power converter 1 as an average value in the carrier period, to output a desired voltage in the range of _{-4V dc ≦ V OS ≦ + 4V} dc. As shown in FIG. 5, when the target value of the combined output voltage V _OS is changed in a sinusoidal manner, a multi-level pseudo-sinusoidal combined output voltage V _OS is generated.

Next, the above-mentioned PWM synchronization method will be specifically described.

FIG. 6 is a timing chart showing the principle of PWM synchronization. Specifically, in FIG. 6, the synchronization signal waveform, the first control signal directed from the control signal transmission unit 202 of the central control unit 200 to the first control circuit 211 to 214 of each of the cells 101 to 104, each of the cells 101 to 104. Shows second control signals respectively transmitted from the first control circuits 211 to 214 to the second control circuits 221 to 224, and PWM operation waveforms performed in the second control circuits 221 to 224 of the respective cells 101 to 104. .

Here, the first control signal directed from the control signal transmission unit 202 of the central control device 200 to the first control circuit 211 is the first control circuit 211 among the first control signals transmitted from the control signal transmission unit 202. Means an address given.

Further, carrier signals generated by the second control circuits 221 to 224 and duties D ₁ to D ₄ are shown as PWM operation waveforms of the cells 101 to 104.

Duty D ₂ to D ₄ is a control command for controlling V ₀₂ to V ₀₄ to a desired value, and from the control signal transmitting unit 202 of the central control unit 200 via the first control circuits 212 to 214, respectively. 2 included in the control signal transmitted to each of the control circuits 222 to 224.

The specific values of the duties D ₁ to D ₄ in FIG. 6 are not values that are assumed to obtain the waveform of FIG. 5. Moreover, illustration is abbreviate | omitted about the gate signal of the switching element obtained by PWM process, and an output voltage waveform.

In FIG. 6, T _S represents a control cycle of central control unit 200. Specifically, it is a cycle in which the control operation unit 201 performs control operation and transmits the first control signal from the control signal transmission unit 202 to each of the cells 101 to 104. In FIG. 6, a time point such as t = kT _S is shown in FIG. 6 with the point in time when the transmission of the first control signal is started as the starting point of each control cycle. Here, k is an integer representing a discrete time step.

The PWM synchronization will be described by taking a control cycle starting from time t = kT _S as an example.

At time t = kT _S shown in FIG. 6, the control signal transmission unit 202 of the central control device 200 starts transmitting the first control signal to the first control circuits 211 to 214 of the cells 101 to 104.

Here, as described above, since the central control unit 200 and the first control circuits 211 to 214 of all the cells 101 to 104 share the communication bus, the control signal transmission unit 202 of the central control unit 200 The first control signal 1014 directed to the control circuit 214 is first transmitted. Hereinafter, the first control signal 1013 directed to the first control circuit 213, the first control signal 1012 directed to the first control circuit 212, and the first control signal 1011 directed to the first control circuit 211 are sequentially transmitted. The first control signals 1011 to 1014 respectively include information on the duties D ₁ (k) to D ₄ (k) generated by the control calculation unit 201 immediately before time t = kT _S.

After transmitting the first control signal 1011 directed to the first control circuit 211, the control signal transmission unit 202 of the central control device 200 outputs a synchronization command to the synchronization signal transmission unit 203. The synchronization signal transmission unit 203 sets the synchronization signal, which is a digital signal, to H level in response to the reception of the synchronization command from the control signal transmission unit 202, and generates a rising edge of the synchronization signal. However, in FIG. 6, it is assumed that the rising of the synchronization signal occurs simultaneously with the completion of the transmission of the first control signal 1011, disregarding the processing delay during this period. The rising edge of the synchronization signal is output to the first control circuits 211 to 214 of all the cells 101 to 104.

The first control circuits 211 to 214 of the cells 101 to 104 respectively transmit the second control signals 1021 to 1024 to the second control circuits 221 to 224 using the rising edge of the synchronization signal as a trigger. As mentioned above, these communications are simultaneously performed in all the cells 101 to 104. The second control signals 1021 to 1024 include information on the duties D ₁ (k) to D ₄ (k), respectively.

The second control circuits 221 to 224 of each of the cells 101 to 104 use the reception of the second control signal as a trigger to reset the carrier signal. As shown in FIG. 6, the value of the carrier signal generated by the second control circuit of each cell is initialized to 0 simultaneously with the completion of reception of the second control signal at time points t1, t2 and t3, and thereafter increases to 1 Begin (horizontal dashed line in FIG. 6 indicates "1").

As shown in FIG. 6, since the completion of the reception of the second control signal is simultaneous for all the cells 101 to 104, the reset of the carrier signal is also performed simultaneously for all the cells 101 to 104. The received D ₁ (k) to D ₄ (k) are reflected in the duty of each of the cells 101 to 104 after the reset.

Time t = (k + 1) T S, t = (k + 2) for also controlling period starting T _S, similarly to the above, the reset of the first control signal and the communication and the carrier signal using the same of the second control signal line It will be. The cycle in which the rising of the synchronization signal occurs is T _S as in the control cycle.

Carrier period of each cell 101-104 is set to the same time as the control period _{T S} of the central control unit 200. However, in practice, the carrier periods of the cells 101 to 104 do not have exactly the same time. Also, the rising period T _S of the synchronization signal does not have exactly the same value.

Here, for example, it is assumed that the central control unit 200 and the second control circuits 221 to 224 perform computation, communication, PWM processing and the like by a digital control unit (microcomputer, digital signal processor, etc.).

In this case, a slight error existing in the clock cycle of each digital control device causes the above-mentioned cycle error. In FIG. 6, the carrier cycle of the second control circuit 221 is slightly shorter than T _S , and the carrier cycle of the second control circuit 222 is slightly longer than T _S of the central control unit 200.

Even in such a case, the carrier signals of the cells 101 to 104 can be substantially synchronized by simultaneously resetting the carrier signals of all the cells 101 to 104 as in the first embodiment. That is, as shown in FIG. 6, immediately before time t1, the carrier signals of the second control circuits 221 to 224 are gradually delayed as going from the second control circuits 221 to 224. For this reason, the carrier signals of the cells 101 to 104 can be substantially synchronized by simultaneously resetting the carrier signals of the second control circuits 221 to 224 at time t1.

Also, as the process proceeds from time t1 to time t2, a cyclic error of the carrier signals of the second control circuits 221 to 224 occurs, but at time t2 by simultaneously resetting the carrier signals of the second control circuits 221 to 224. The carrier signals of the cells 101 to 104 can be approximately synchronized. The timing t3 is also similar to the timings t1 and t2.

FIG. 7 is a diagram showing a specific data configuration example of the first control signal 1011 shown in FIG. As described above, the first control signal 1011 is a serial communication signal of several bytes. Specifically, it comprises a start bit, an address portion, a duty portion, another data portion (Other data), and an end bit (stop bit).

The address portion following the start bit is configured as digital data for identifying the first control circuit 211 of the cell 101. The duty part (PWM duty) is configured as digital data for indicating the value of the duty D ₁ (k) shown in FIG. The other data portion (Other data) is constituted by digital data, parity bits or the like for indicating the contents of control commands other than duty. The existence and contents of other data parts can be set arbitrarily.

FIG. 8 is a diagram showing a specific data configuration example of the second control signal 1021 shown in FIG. As described above, the second control signal 1021 is a serial communication signal of several bytes. Specifically, it comprises a start bit, a duty part (PWM duty), another data part, and an end bit (stop bit). Since the communication is performed inside the cell, the address part is unnecessary.

The duty part is configured as digital data for indicating the value of the duty D ₁ (k) shown in FIG. 6, and may have the same content as the duty part of the first control signal 1011 shown in FIG. The other data portion is composed of digital data for indicating the contents of control commands other than duty, or parity bits. The existence and contents of other data parts can be set arbitrarily.

FIG. 9 is a view showing a configuration example of the first control circuit 211 of the cell 101. As shown in FIG. The same configuration can be applied to the first control circuits 212 to 214 of the other cells 102 to 104.

In FIG. 9, the first control circuit 211 includes a control signal reception unit 2111, a synchronization signal reception unit 2112, a control signal transmission unit 2113, and a drive control unit 2114.

The control signal reception unit 2111 receives the first control signal transmitted from the control signal transmission unit 202 of the central control device 200, and confirms the address of the first control signal. When it is determined that the first control signal is directed to the first control circuit 211, the control command contained in the first control signal is extracted and the following processing is performed.

First, a control command to the second control circuit 221 is output to the control signal transmission unit 2113 like a duty. Next, a control command for the first converter 141 of the primary side circuit 111 is output to the drive control unit 2114.

The synchronization signal reception unit 2112 detects the rising edge of the synchronization signal transmitted from the synchronization signal transmission unit 203 of the central control device 200, and outputs a transmission command to the control signal transmission unit 2113.

The control signal transmission unit 2113 generates a second control signal based on the control command to the second control circuit 221 output by the control signal reception unit 2111. After that, it transmits to the second control circuit 221 according to the transmission command output from the synchronization signal reception unit 2112.

The drive control unit 2114 drives and controls the first converter 141 in accordance with the control command on the first converter 141 output from the control signal receiving unit 2111.

FIG. 10 is a diagram showing a configuration example of the second control circuit 221 of the cell 101. As shown in FIG. The same configuration as that of the second control circuit 221 can be applied to the second control circuits 222 to 224 of the other cells 102 to 104.

In FIG. 10, the second control circuit 221 includes a control signal reception unit 2211, a carrier signal generation unit 2212, and a drive control unit 2213.

The control signal receiving unit 2211 receives the second control signal transmitted from the first control circuit 211, extracts a duty that is a control command, and outputs the extracted duty to the drive control unit 2213. Further, the control signal receiving unit 2211 outputs a reset command to the carrier signal generating unit 2212 simultaneously with the completion of the reception of the second control signal.

The carrier signal generation unit 2212 generates a carrier signal at a set carrier cycle, and outputs the carrier signal to the drive control unit 2213. Also, at the same time as receiving a reset command from the control signal receiving unit 2211, the carrier signal is reset.

The drive control unit 2213 compares the duty from the signal reception unit 2211 with the carrier signal from the carrier signal generation unit 2212, and drives and controls the second converter 151 based on the result.

FIG. 11 is a timing chart showing another example of PWM synchronization. Only the difference from the PWM synchronization described in FIG. 6 will be described below.

The PWM synchronization shown in FIG. 11 will be described by taking a control cycle starting from time t = kT _S as an example. After receiving the second control signals 1021 to 1024, the second control circuits 221 to 224 respectively reset the carrier signals after a predetermined time _TW has elapsed. The other points are the same as the PWM synchronization described in FIG.

The configuration shown in FIG. 11 for resetting the carrier signal after a predetermined time T _{W has} passed since the second control circuits 221 to 224 have received the second control signal is different from all the embodiments described below. It can be applied as

As described above, according to the first embodiment, since the duty is transmitted from the central control unit 200 to the second control circuits 221 to 224 and the second control circuits 221 to 224 independently perform the PWM processing. There is no need to transmit a control signal from the central control unit 200 to the switching elements of the secondary circuits 121 to 124, and the complication of wiring relating to the control signal from the central control unit 200 to each cell and the cost increase are suppressed. And cost can be reduced.

Furthermore, according to the first embodiment, the primary side circuits 111 to 114 of the cells 101 to 104 are connected in parallel to the external power supply 300, and the ground potentials of the first control circuits 211 to 214 are all common. The ground potentials of the central control unit 200 and the first control circuits 211 to 214 can also be shared. Therefore, for communication from the central control unit 200 to the first control circuits 211 to 214, insulation is not necessary, communication using an electric wire can be applied, and the cost for insulation processing can be omitted.

In particular, when the power conversion apparatus is used for an inverter for driving a high voltage motor or PCS for a high voltage distribution system, a withstand voltage exceeding 5 kV is required unless the first embodiment of the present invention is applied. It is expensive.

According to the first embodiment of the present invention, a low cost power converter that performs PWM synchronization can be realized.

(Example 2)
Next, a second embodiment of the present invention will be described.

FIG. 12 is a timing chart showing the principle of PWM synchronization in the second embodiment. The configuration of the power conversion device in the second embodiment is the same as the configuration of the first embodiment shown in FIG. 1, and therefore the illustration and the detailed description will be omitted.

Hereinafter, only the difference from the PWM synchronization in the first embodiment described with reference to FIG. 6 will be described.

First control signals directed from the control signal transmission unit 202 of the central control unit 200 to the first control circuits 211 to 214 of the respective cells 101 to 104, and in the respective cells 101 to 104, from the first control circuits 211 to 214 The second control signal transmitted to each of the control circuits 221 to 224 includes information of a reset command in addition to the duty as a control command. The reset command is a 1-bit control command which is information indicating whether the second control circuits 221 to 224 reset the carrier signal after receiving the control signal (on or off).

In the example shown in FIG. 12, "on" related to the reset command is described for some control signals (for example, the first control signal 1311). This means that the reset command is on, that is, a control command for resetting the carrier signal to the second control circuits 221 to 224 after receiving the second control signal.

In FIG. 12, in a control cycle (a cycle for transmitting the first control command, a synchronization signal cycle) Ts starting from time t = kT _S, the first control circuit 211 directed from the control signal transmission unit 202 of the central control unit 200 to the first control circuit 211 Although one control signal 1311 is transmitted, the reset command of the first control signal 1311 is turned on as described above.

After receiving the first control signal 1311, the first control circuit 211 of the cell 101 transmits a second control signal 1321 to the second control circuit 221 using the rising edge of the synchronization signal as a trigger. At this time, in response to the reset command of the first control signal 1311 being on, the reset command of the second control signal 1321 is also turned on.

The second control circuit 221 resets the carrier signal using the reception of the second control signal 1321 as a trigger in response to the reset command of the second control signal 1321 being on.

On the other hand, in the control cycle starting at time _{t = (k + 1) T} S, the first control signal 1411 directed from the control signal transmitting unit 202 of the central controller 200 to the first control circuit 211 does not turn on the reset command (Although illustration is omitted, the reset command is set to off). Therefore, the reset command is also set to OFF for the second control signal 1421 from the first control circuit 211 to the second control circuit 221.

In response to the reset instruction of the second control signal 1421 being off, the second control circuit 221 does not reset the carrier signal even if the second control signal 1421 is received.

In the control cycle starting from time t = (k + 2) T _S , as in the control cycle starting from t = kT _S , the reset command of the control signal is set to ON, so the second control circuit 221 resets the carrier signal. .

In the above description, the operation has been described focusing on the cell 101 (the first control circuit 211 and the second control circuit 221), but the other cells 102 to 104 (the first control circuits 212 to 214 and the second control circuit 222) 224) operates similarly.

The second embodiment is slightly different from the first embodiment in the configuration and operation of the first control circuits 211 to 214 and the second control circuits 221 to 224. However, since the operation has been described above, FIG. The illustration of a block diagram such as 10 is omitted.

In the first embodiment, the carrier signal is reset in every control cycle, but as in the second embodiment, the carrier cycle of each of the cells 101 to 104 and the control cycle T _S of the central control unit 200 Is sufficiently small, the carrier signals of each cell can be substantially synchronized even if the carrier signals are not reset in all control cycles.

For this reason, the second embodiment is applicable to one in which the operation level of the control unit such as a microcomputer is lower than that of the first embodiment. However, it is necessary to be able to appropriately manage clock oscillation.

Also in the second embodiment, the same effect as the first embodiment can be obtained.

(Example 3)
Next, a third embodiment of the present invention will be described.

FIG. 13 is a timing chart showing the principle of PWM synchronization in the third embodiment. The configuration of the power conversion device according to the third embodiment is the same as the configuration of the first embodiment shown in FIG. 1 and thus the illustration and the detailed description will be omitted.

Hereinafter, only the difference from the PWM synchronization in the first embodiment described with reference to FIG. 6 will be described.

Consider a control cycle starting at time t = kT _S. As shown in FIG. 13, in the second control circuit 223 of the cell 103 and the second control circuit 224 of the cell 104, the duty does not change from the control cycle one step earlier. That is, D ₃ (k) = D ₃ (k−1) and D ₄ (k) = D ₄ (k−1). Therefore, the control signal transmission unit 202 of the central control device 200 transmits only the first control signal 1012 directed to the first control circuit 212 and the first control signal 1011 directed to the first control circuit 211 in order.

After receiving the first control signal, the first control circuits 211 and 212 transmit the second control signals 1021 and 1022 to the second control circuits 221 and 222, respectively, using the rising edge of the synchronization signal as a trigger. Therefore, in the control cycle starting from time t = kT _S , the carrier signal is reset only by the cell 101 (second control circuit 221) and the cell 102 (second control circuit 222).

In the control period starting next time _{t = (k + 1) T} S, the duty does not change from the control period of one step before for the second control circuit 221 and 222. That is, D ₁ (k + 1) = D ₁ (k) and D ₂ (k + 1) = D ₂ (k). Therefore, the control signal transmission unit 202 of the central control device 200 transmits only the first control signal 1114 directed to the first control circuit 214 and the first control signal 1113 directed to the first control circuit 213 in order.

After receiving the first control signal, the first control circuit 213 of the cell 103 and the first control circuit 214 of the cell 104 use the rising edge of the synchronization signal as a trigger to the second control circuits 223 and 224 and the second control signal 1123. Send 1124 respectively. Therefore, in the control cycle starting at time _{t = (k + 1) T} S, the reset of the carrier signal is performed in only the second control circuit 224 of the second control circuit 223 and the cell 104 of the cell 103.

When it is known that at most two cells whose duty is to be changed in each control cycle, the central control device 200 completes the calculation of the duty by communicating the control signal and resetting the carrier signal as shown in FIG. The time until the duty is reflected in the second control circuit, that is, the delay time by communication can be shortened.

Also in the third embodiment, the same effects as those of the first embodiment can be obtained, and the above-described effects can also be obtained.

(Example 4)
Next, a fourth embodiment of the present invention will be described.

FIG. 14 is a schematic configuration diagram of a power conversion device in a fourth embodiment. Hereinafter, only differences from the power conversion device 1 in the first embodiment described with reference to FIG. 1 will be described.

The power conversion device 2 shown in FIG. 14 includes a central control unit 204 instead of the central control unit 200 of FIG. The central control unit 204 of FIG. 14 does not include the synchronization signal transmission unit 203 as compared with the central control unit 200 of the first embodiment, and the synchronization control signal is sent to the first control circuits 211 to 214 of 101 to 104 of each cell. It is configured not to output.

FIG. 15 is a timing chart showing the principle of PWM synchronization in the fourth embodiment. In the fourth embodiment, as in the second embodiment described with reference to FIG. 12, the control signal includes a reset command. Hereinafter, only the difference from the PWM synchronization in the second embodiment described with reference to FIG. 12 will be described.

In FIG. 15, the control signal transmission unit 202 of the central control unit 204 transmits the first control signal directed to the first control circuits 211 to 214 at each control cycle. The control signal transmission unit 202 performs the output of the first control signal four times (for four frames) per control cycle, but the first control signal of the fourth in time (the first control signals 1311, 1412 and 1513 in FIG. 15) Set the reset command to on for.

In addition, the address in the fourth first control signal is rotated among the first control circuits 211 to 214 of the cells 101 to 104. In the example shown in FIG. 15, the address in the fourth control signal changes to the cell 101 (first control circuit 211), the cell 102 (first control circuit 212), and the cell 103 (first control circuit 213). . Although not shown in FIG. 15, in the control cycle starting at time _{t = (k + 3) T} S, it is sufficient to address the 4 th first control signal to the cell 104 (first control circuit 214).

The first control circuits 211 to 214 of each of the cells 101 to 104 receive the first control signal transmitted by the control signal transmission unit 202 of the central control device 200, and immediately receive the second control signal to the second control circuits 221 to 224. Send After receiving the second control signal, the second control circuits 221 to 224 of each of the cells 101 to 104 reset the carrier signal if the reset command is on.

With the above configuration, the time from the starting point of the control cycle (the time when communication of the first control signal by the control signal transmission unit 202 starts) to the reset of the carrier signal can be kept constant, as shown in FIG. realizable.

In the fourth embodiment, the configuration of the central control unit 204 and the wiring from the central control unit 204 to each of the cells 101 to 104 can be simplified as much as the synchronization signal is not used.

Also in the fourth embodiment, the same effects as those of the first embodiment can be obtained, and the above-mentioned effects can also be obtained.

(Example 5)
Next, a fifth embodiment of the present invention will be described.

FIG. 16 is a schematic configuration diagram of a power conversion device in a fifth embodiment of the present invention.

The power conversion device 3 of FIG. 16 includes four cells 105 to 108. The difference between the first embodiment and the fifth embodiment shown in FIG. 1 is that the input terminals (input sides) of the cells 105 to 108 are connected in series, and the combined input terminal is connected to the external power supply 301. On the other hand, the output terminals (output side) of the cells 105 to 108 are connected in parallel to the load 401.

The cells 105 to 108 include primary circuits 115 to 118, secondary circuits 125 to 128, and transformers 135 to 138, respectively.

Here, the primary side circuits 115 to 118 include second converters 155 to 158 and second control circuits 225 to 228 for controlling them, and the secondary side circuits 125 to 128 include first converters 145 to 148 and The first control circuits 215 to 218 that control these are provided, respectively, and the internal configuration of the cells 105 to 108 is the same as that of the cells 101 to 104 of the first embodiment, so The PWM synchronization can be applied to the fifth embodiment as it is.

The configuration of the fifth embodiment can be applied to a power converter that converts the primary side to a high voltage of, for example, 66 kv and converts the secondary side to a low voltage of, for example, 100 v.

Also in the fifth embodiment of the present invention, the same effects as those of the first embodiment can be obtained, and the above-described effects can also be obtained.

(Example 6)
A sixth embodiment of the present invention will now be described.

Sixth Embodiment A sixth embodiment of the present invention is an example in which three power conversion devices 1 described in the first embodiment are used to configure a three-phase AC power conversion device.

FIG. 17 is a schematic configuration diagram of the power conversion device 4 in the sixth embodiment. The power conversion device 4 shown in FIG. 17 includes three power conversion devices 1 described in the first embodiment.

As shown in FIG. 17, one of the output terminals provided in the three power electronics devices 1 constitutes a three-phase output terminal, and is connected to the three-phase load 401. The other (one other) of the output terminals provided in the three power electronics devices 1 are connected to one another to form a neutral point in the Y-connected three-phase AC circuit.

The input terminals of the three power electronics devices 1 are connected in parallel to each other and connected to the power supply 300.

As described in the first embodiment, the power conversion device 1 includes the central control device 200 therein. Therefore, although the power conversion device 4 of FIG. 17 is provided with three central control devices 200, the three central control devices 200 may be integrated into one.

With the above-described configuration, the sixth embodiment of the present invention can be applied to, for example, an inverter for driving a three-phase high voltage motor or a three-phase AC power system PCS, and is also an embodiment of a power converter outputting three-phase AC. An effect similar to 1 can be obtained.

In the first to fourth embodiments described above, the plurality of cells 101 to 104 are connected in parallel to the external power supply 300 and connected in series to the external load 400, and the fifth embodiment includes the plurality of cells 105. Although 108 to 108 are connected in series to the external power supply 301 and in parallel to the load 401, a plurality of cells are connected in series to the external power supply and are also connected in series to the load. Even if there are, the present invention is applicable.

1, 2, 3, 4 ... power converter, 10, 16, 20 ... capacitor, 11, 12, 13, 14, 31, 32, 33, 34 ... switching element, 15 ... coil , 21, 22, 23, 24 ... diodes, 25 ... voltage detectors, 101, 102, 103, 104, 105, 106, 107, 108 ... power conversion cells, 111, 112, 113, 114 ... Primary side circuit 121, 122, 123, 124 ... Secondary side circuit 131, 132, 133, 134 ... Transformer, 141, 142, 142, 144 ... First converter, 151, 152, 152, 154 ... second converter, 200, 204 ... central control unit 211, 212, 213, 214 ... first control circuit 221, 222, 223, 224 ... Second system Circuit, 230 ... current detector, 300, 301 ... power supply, 400, 401 ... Load

Claims (12)

1. A plurality of power conversion cells for converting a power supply voltage into a voltage to be supplied to a load;
   A central control unit that controls the plurality of power conversion cells;
   Each of the plurality of power conversion cells includes a first converter that converts the power supply voltage, a first control circuit that controls the first converter, and a voltage that is converted by the first converter. A second control circuit for controlling the second converter by pulse width modulation; and a transformer connected between the first converter and the second converter,
   The central control device includes a control signal transmission unit that transmits a first control signal to the first control circuit included in each of the plurality of power conversion cells,
   A first control circuit included in each of the plurality of power conversion cells controls the first converter based on the first control signal, and the second control circuit controls the second converter, and the pulse A power converter characterized in that a carrier signal of width modulation is reset.
2. In the power converter according to claim 1,
   The central control device includes a synchronization signal transmission unit that transmits a synchronization signal to the first control circuit included in each of the plurality of power conversion cells, and the first control circuit receives the synchronization signal, and A power conversion apparatus, comprising: transmitting a second control signal to a second control circuit, and resetting the carrier signal of the pulse width modulation when the second control circuit receives the second control signal.
3. In the power converter according to claim 2,
   A power converter characterized in that the first control signal and the second control signal include information of a duty ratio of the pulse width modulation.
4. The power converter according to any one of claims 1 to 3.
   The central control device is connected to the first control circuit included in the plurality of power conversion cells by a communication bus performing wired serial communication, and performs wired serial communication with the first control circuit included in the plurality of power conversion cells. And transmitting the first control signal, wherein the first control signal includes address information for identifying the plurality of power conversion cells.
5. The power converter according to any one of claims 1 to 4.
   An input side of a plurality of power conversion cells is connected in parallel to an external power supply, and an output side of the plurality of power conversion cells is connected in series to each other.
6. The power converter according to any one of claims 1 to 4.
   An output side of the plurality of power conversion cells is connected in parallel to an external load, and an input side of the plurality of power conversion cells is connected in series.
7. The power converter according to any one of claims 2 to 6,
   A power conversion device, wherein the first control circuit included in the plurality of power conversion cells transmits the second control signal to the second control circuit by wireless communication with the second control circuit.
8. In the power conversion device according to claim 7,
   A power converter characterized in that the wireless communication is infrared communication.
9. In the power converter according to claim 1,
   The first control signal includes information on a reset command whether to reset the carrier signal, and the first control circuit transmits a second control signal including information on the reset command to the second control circuit. And the second control circuit is characterized in that, when the second control signal is received and the reset command is information for resetting the carrier signal, the carrier signal of the pulse width modulation is reset. Power converter.
10. In the power conversion device according to claim 9,
    The central control device includes a synchronization signal transmission unit that transmits a synchronization signal to the first control circuit included in each of the plurality of power conversion cells, and the first control circuit receives the synchronization signal, and the first control circuit receives the synchronization signal. A power converter characterized by transmitting the second control signal to a second control circuit.
11. The power converter according to claim 9 or 10
    The second control circuit of any one of the plurality of power conversion cells includes the information for resetting the carrier signal from the start of the control period of the central control device that transmits the first control command. A power converter characterized in that a time until a reset command is received is substantially constant.
12. The power converter according to any one of claims 1 to 11.
    Three power conversion devices, one of the output terminals of the three power conversion devices constitutes a three-phase output terminal, and is connected to a three-phase load, and the three power conversion devices The other one of the output terminals is connected to each other to form a neutral point of Y connection, and the input terminals of the three power conversion devices are connected in parallel to each other and are connected to the power supply. Converter.

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