WO2019082253A1 - Filtre polyphasé - Google Patents

Filtre polyphasé

Info

Publication number
WO2019082253A1
WO2019082253A1 PCT/JP2017/038238 JP2017038238W WO2019082253A1 WO 2019082253 A1 WO2019082253 A1 WO 2019082253A1 JP 2017038238 W JP2017038238 W JP 2017038238W WO 2019082253 A1 WO2019082253 A1 WO 2019082253A1
Authority
WO
WIPO (PCT)
Prior art keywords
input terminal
input
differential signal
signal
output terminal
Prior art date
Application number
PCT/JP2017/038238
Other languages
English (en)
Japanese (ja)
Inventor
孝信 藤原
充弘 下澤
Original Assignee
三菱電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機株式会社 filed Critical 三菱電機株式会社
Priority to PCT/JP2017/038238 priority Critical patent/WO2019082253A1/fr
Publication of WO2019082253A1 publication Critical patent/WO2019082253A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/18—Networks for phase shifting
    • H03H7/21—Networks for phase shifting providing two or more phase shifted output signals, e.g. n-phase output

Definitions

  • the present invention relates to a polyphase filter applied to an analog circuit requiring a 90 ° quadrature signal.
  • a polyphase filter composed of a resistor and a capacitor is well known as an analog circuit that outputs two orthogonal signals that are 90 ° out of phase and of equal amplitude.
  • the polyphase filter is applied to an analog circuit requiring a 90 ° quadrature signal, such as a local signal source for a quadrature mixer, a vector synthesis phase shifter, an image rejection mixer, etc., and used as an element block of a wireless communication device.
  • the minimum unit when constructing a polyphase filter is cascading multiple stages of RC (Resistor-Capacitor) networks in which four resistors and four capacitors are alternately arranged in an annular fashion, to operate the operating band of the polyphase filter. It can be spread. Assuming that the number of stages for cascoding this RC network is N [stages], the insertion loss of the polyphase filter is 3 (N + 1) [dB], and the number of stages and the insertion loss have a monotonically increasing relationship. That is, as the number N of stages is increased to widen the band, the insertion loss of the polyphase filter increases. However, an amplifier is required to compensate for the degradation of the insertion loss, and the power consumption and the circuit area of the entire system increase. In order to widen the operating band in this way, it is important to suppress the insertion loss of the polyphase filter.
  • RC Resistor-Capacitor
  • differential signals are input to two of the four terminals on the input side.
  • There are two methods for connecting the remaining 2 terminals one is a method (open method) in which the remaining 2 terminals are open (open method) and the other is a method in which the other 2 terminals and the two terminals to which a signal is applied ).
  • which method to use depends on the specifications of the applied analog circuit. In general, the open system is used when the accuracy of the 90 ° phase difference is important, and the short circuit system is used when the equal amplitude property is important.
  • the RC network placed in the first stage of the polyphase filter it is a network that realizes originally optimal circuit operation by applying four phases (0, 90, 180, 270 °) to the 4 terminals. Nevertheless, two phases (0, 180 °), ie only one differential signal is applied. For this reason, extra resistance loss occurs and the insertion loss of the polyphase filter is additionally reduced by 3 dB, as compared with the case where the RC network passes the complete four-phase signal.
  • the conventional polyphase filter has a problem that the insertion loss is increased in the RC network disposed in the first stage in order to open or short the processing of the four terminals in the network on the input side.
  • the present invention has been made to solve the problems as described above, and it is an object of the present invention to obtain a polyphase filter with a small insertion loss.
  • a polyphase filter according to the present invention has first to fourth input terminals for inputting 4-phase signals and four output terminals for outputting first to fourth signals, and the first input terminal
  • the four output terminals are 90 ° out of phase with each other.
  • An RC (Resistor-Capacitor) circuit that outputs different signals, and a second differential signal in which the input differential signal is 90 ° out of phase with the first differential signal and the first differential signal.
  • the positive phase signal of the second differential signal is output to the second input terminal, and the second differential signal And a reactance network for outputting a reverse phase signal to the fourth input terminal.
  • the insertion loss can be improved by up to 3 dB as compared with the polyphase filter of the conventional configuration.
  • FIG. 1 is a block diagram of the polyphase filter 1 according to the first embodiment.
  • 10 is a reactance network
  • 20 is a RC (Resistor-Capacitor) network
  • 30 is a first polyphase filter output terminal pair (300a is a ninth output terminal for outputting positive phase signal, 300b is reverse) 10th output terminal for outputting a phase signal)
  • 40 is a second polyphase filter output terminal pair (400a is an 11th output terminal for outputting a positive phase signal
  • 400b is a 12th output for outputting a negative phase signal
  • 100 is an input terminal pair to which differential signals are input to the reactance network 10 (100a is a fifth input terminal for inputting a positive phase signal, 100b is a sixth input terminal for inputting a negative phase signal), 110 is a reactance
  • a first differential signal output from the network 10 110a is a first reactance network output terminal (fifth output terminal) for outputting a positive phase signal
  • 110b is a second output signal for outputting a negative phase signal.
  • Reactance network output terminal (sixth output terminal).
  • 111 is a second differential signal output from the reactance network 10, and 111a is a third reactance network output terminal (seventh output terminal) that outputs a positive phase signal, and 111b is a negative phase signal. Fourth reactance network output terminal (eighth output terminal).
  • 200a is a first RC network input terminal (first input terminal)
  • 200b is a second RC network input terminal (second input terminal)
  • 200c is a third RC network input terminal (third 200d is a fourth RC network input terminal (fourth input terminal)
  • 210a is a first RC network output terminal (first output terminal)
  • 210b is a second RC network output terminal
  • Reference numeral 210c denotes a third RC network output terminal (third output terminal)
  • reference numeral 210d denotes a fourth RC network output terminal (fourth output terminal).
  • Reference numerals 220a to 220d denote capacitive elements
  • reference numerals 230a to 203d denote resistive elements.
  • RC network 20 is a network in which a resistive element and a capacitive element are alternately and annularly connected, and in the present embodiment, between RC network input terminal 200a and RC network output terminal 210a. Is connected to the first resistance element 230a, the second resistance element 230b is connected between the second RC network input terminal 200b and the second RC network output terminal 210b, and the third RC network is connected. The third resistance element 230c is connected between the input terminal 200c and the third RC network output terminal 210c, and between the fourth RC network input terminal 200d and the fourth RC network output terminal 210d.
  • the fourth resistance element 230d is connected, the fifth capacitance element 220a is connected between the output side of the first resistance element 230a and the input side of the second resistance element 230b, and the fourth resistance element 230b is connected.
  • Output side and third resistance element 23 The sixth capacitive element 220b is connected between the input side of c and the seventh capacitive element 220c between the output side of the third resistive element 230c and the input side of the fourth resistive element 230d.
  • the case where the eighth capacitive element 220d is connected between the output side of the fourth resistive element 230d and the input side of the first resistive element 230a will be described.
  • the RC network 20 has a first RC network input terminal 200a, a first RC network input terminal 200b, a first RC network input terminal 200c, and a first RC network input terminal 200d.
  • the first RC network input terminal 200a and the second RC network input terminal 200b are connected to the positive phase signal of differential signals input to the polyphase filter, and the third RC
  • the first RC network input terminal 200a and the second RC network input terminal 200a are connected by connecting the reverse phase signal among the differential signals input to the polyphase filter to the network input terminal 200c and the fourth RC network input terminal 200d.
  • the positive phase signal is connected, and to the fourth RC network input terminal 200d, the negative phase signal of the differential signals input to the polyphase filter is connected; Either of the method of releasing the RC network input terminal 200a and the third RC network input terminal 200c from the input signal is used.
  • the first RC network input terminal 200a, the first RC network input terminal 200b, the first RC network input terminal 200c, and the first RC network input terminal 200d are mutually connected. Input signals with different phases by 90. In the case of widening the operating band, it is possible to cope by cascading a plurality of stages of circuits in which resistive elements and capacitive elements are alternately and annularly connected.
  • the first differential signal 110 is input to the first RC network input terminal 200a and the third RC network input terminal 200c, and the second differential signal 111 is input to the second RC network.
  • the fourth differential signal 310 is transmitted to the first RC network output terminal 210a and the third RC network output terminal 210c.
  • the differential signal 410 is output to the second RC network output terminal 210b and the fourth RC network output terminal 210d.
  • the third differential signal 310 is output from the first polyphase filter output terminal pair 30, and the fourth differential signal 410 is output from the second polyphase filter output terminal pair 40.
  • the reactance network 10 receives a differential signal from the input terminal pair 100 and outputs a first differential signal 110 and a second differential signal 111.
  • the phase difference between the first differential signal 110 and the second differential signal 111 is 90 ° with respect to the differential signal of the desired operating frequency input to the input terminal pair 100. Configured as.
  • FIG. 2 As an example of the reactance network 10 capable of outputting the first differential signal 110 and the second differential signal 111 with a phase difference of 90 °, the case of using a secondary filter configuration is shown in FIG.
  • 120 is a high pass filter
  • 130 is a low pass filter
  • 101 to 104 are capacitive elements
  • 105 to 108 are inductor elements.
  • the differential signal input to the input terminal pair 100 is distributed to each of the high pass filter 120 and the low pass filter 130.
  • the high-pass filter 120 connects the capacitive element 101 (first capacitive element) between the fifth input terminal 100a and the first reactance network output terminal 110a, and the sixth input terminal 100b and the second
  • the capacitive element 102 (second capacitive element) is connected between the first reactance network output terminal 110 b and the inductor element 105 (third inductive element) between the first reactance network output terminal 110 a and the ground.
  • the inductor element 106 (the fourth inductor element) is connected between the second reactance network output terminal 110 b and the ground.
  • the low pass filter 130 connects the inductor element 107 (first inductor element) between the fifth input terminal 100a and the third reactance network output terminal 111a, and the sixth input terminal 100b and the fourth input terminal 100b.
  • the inductor element 108 (second inductor element) is connected between the second reactance network output terminal 111b and the capacitive element 103 (third capacitive element) between the third reactance network output terminal 111a and the ground.
  • the capacitive element 104 (fourth capacitive element) is connected between the fourth reactance network output terminal 111b and the ground.
  • the element values of the capacitive elements 101 to 104 and the inductor elements 105 to 108 are separately determined in order to optimize the impedance matching condition with the front and rear stage circuits.
  • the differential signal that has passed through the high pass filter 120 is output as the first differential signal 110, and the differential signal that has passed through the low pass filter 130 is the second. Is output as the differential signal 111 of FIG.
  • the first differential signal 110 and the second differential signal 111 output from the reactance network 10 are input to the RC network 20, respectively.
  • the RC network 20 approaches a state in which four-phase signals that are completely orthogonal can be passed, and the amount of loss in the RC network 20 can be reduced. Therefore, the third differential signal 310 and the fourth differential signal 410 output from the RC network 20 are output with low loss compared to the conventional configuration while maintaining orthogonality.
  • the improvement amount of the insertion loss by this configuration will be described.
  • the insertion loss of the polyphase filter is at least 6 dB. It should be noted that the insertion loss of the polyphase filter is at least 6 dB when the input terminal pair 100 and the first polyphase filter output terminal pair 30 and the second polyphase filter output terminal pair 40 are disposed in the front and rear stages. Completely impedance matching with the circuit.
  • the reactance network 10 generates a second differential signal 111 having a 90 ° phase difference with the first differential signal 110 as the differential signal input to the input terminal pair 100.
  • Signal to RC network 20 At this time, the potential difference generated between the resistors in the RC network 20 is reduced, and the loss is reduced.
  • the insertion loss of the polyphase filter can be improved up to 3 dB.
  • the RC network 20 has a single-stage configuration.
  • orthogonal signals can be extracted and the operating band can be expanded.
  • FIG. 3 An example in which the three-stage cascode connection of the RC network 20 is shown in FIG.
  • FIG. 3 the same reference numerals as those in FIG. 1 denote the same or corresponding parts.
  • the circuit configuration described in the present embodiment is limited to the one-stage configuration as shown in FIG. 1 because the same effect can be obtained even when cascode connection of a plurality of RC networks 20 is performed and the number of stages is increased. It is not a thing.
  • the insertion loss of the polyphase filter that can be realized by the prior art is 3 (N + 1) [dB], whereas the circuit described in this embodiment
  • the insertion loss in the configuration is 3 N [dB], and an improvement of up to 3 dB is obtained as well.
  • a differential signal that is 90 ° orthogonal to the differential signal input to polyphase filter 1 in reactance network 10 is generated, and the difference input to polyphase filter 1 is generated.
  • the RC network 20 By inputting to the RC network 20 together with the motion signal, it is possible to reduce the loss due to the internal resistance in the RC network 20. Therefore, the insertion loss of the polyphase filter 1 can be improved by 3 dB at the maximum.
  • Second Embodiment In the first embodiment, the case where the configuration of the reactance network 10 is a second-order filter has been described. However, a reactance circuit capable of generating a phase difference close to 90 ° can be considered other than the second-order filter used in the first embodiment. In the present embodiment, the configuration of a reactance network 10 using a first order filter for the high pass filter and the low pass filter will be described.
  • FIG. 4 is a diagram showing an example of the configuration of the reactance network according to the present embodiment.
  • reference numerals 301 and 302 denote capacitive elements
  • 303 and 304 denote inductor elements.
  • the same reference numerals as in FIG. 1 indicate the same or corresponding parts.
  • the differential signal input to the input terminal pair 100 is distributed to each of the high pass filter 120 and the low pass filter 130.
  • the high pass filter 120 connects the capacitive element 301 between the fifth input terminal 100a and the first reactance network output terminal 110a, and the sixth input terminal 100b and the second reactance network output terminal 110b.
  • the capacitor 302 is connected between them.
  • the low pass filter 130 connects the inductor element 303 between the fifth input terminal 100a and the third reactance network output terminal 110a, and the sixth input terminal 100b and the fourth reactance network output terminal 111b. And the inductor element 304 is connected between them.
  • the high pass filter 120 and the low pass filter 130 according to the present embodiment as a first-order filter, the number of elements of the polyphase filter 1 as a whole can be reduced.
  • the polyphase filter 1 can be miniaturized by configuring the reactance network 10 with the high pass filter 120 using the first order filter and the low pass filter 130, and the manufacturing cost Can be reduced.
  • the reactance network is realized by an inductor element and a capacitive element which are lumped multipliers has been described.
  • the configuration of the reactance network 10 in the case of using a line will be described.
  • FIG. 5 is a diagram showing an example of the configuration of reactance network 10 according to the present embodiment.
  • 401 is a first line
  • 402 is a second line
  • 403 is a third line
  • 404 is a fourth line.
  • the line lengths of the first line 401 and the second line 402 are the same, and the line lengths of the third line 403 and the fourth line 404 are the same.
  • 500 is a difference in path length between the first line 401 and the third line 403.
  • the first line 401 is connected between the fifth input terminal 100a and the first reactance network output terminal 110a, and between the sixth input terminal 100b and the second reactance network output terminal 110b.
  • the second line 402 is connected, and the third line 403 is connected between the fifth input terminal 100a and the third reactance network output terminal 111a, and the sixth input terminal 100b is connected to the fourth
  • a fourth line 404 is connected between the reactance network output terminal 111b.
  • the difference 500 is provided between the path lengths of the first line 401 and the second line 402 and the path lengths of the third line 403 and the fourth line 404.
  • the reactance network can be configured by using only the line, the polyphase filter 1 can be miniaturized.
  • the operating frequency is, for example, in the millimeter wave band or more, it is more compact and less lossy to realize the circuit using a line than to realize a circuit using an inductor element and a capacitive element that are concentrated multipliers can do.

Landscapes

  • Filters And Equalizers (AREA)

Abstract

La présente invention concerne un filtre polyphasé (1), comprenant : un circuit RC (résistance-condensateur) (20) qui a des première à quatrième bornes d'entrée dans lesquelles des signaux à quatre phases sont entrés et des premières à quatrième bornes de sortie à partir desquelles des signaux à quatre phases sont émis, et qui émet des signaux ayant des phases qui diffèrent chacune de 90° les unes des autres vers les quatre bornes de sortie dans un cas où un signal de phase positive est entré dans une première borne d'entrée (200a) et une deuxième borne d'entrée (200b) et un signal de phase inverse est entré dans une troisième borne d'entrée (200c) et une quatrième borne d'entrée (200d) ; et un réseau de circuit de réactance (10) qui divise un signal différentiel d'entrée en un premier signal différentiel (110) et un second signal différentiel (111) qui est doté d'une phase de 90° par rapport au premier signal différentiel (110), et qui émet le signal de phase positive du premier signal différentiel (110) vers la première borne d'entrée (200a), émet le signal de phase inverse du premier signal différentiel (110) vers la troisième borne d'entrée (200c), émet le signal de phase positive du second signal différentiel (111) vers la deuxième borne d'entrée (200b), et émet le signal de phase inverse du second signal différentiel (111) vers la quatrième borne d'entrée (200d).
PCT/JP2017/038238 2017-10-24 2017-10-24 Filtre polyphasé WO2019082253A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2017/038238 WO2019082253A1 (fr) 2017-10-24 2017-10-24 Filtre polyphasé

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2017/038238 WO2019082253A1 (fr) 2017-10-24 2017-10-24 Filtre polyphasé

Publications (1)

Publication Number Publication Date
WO2019082253A1 true WO2019082253A1 (fr) 2019-05-02

Family

ID=66246823

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2017/038238 WO2019082253A1 (fr) 2017-10-24 2017-10-24 Filtre polyphasé

Country Status (1)

Country Link
WO (1) WO2019082253A1 (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11127004A (ja) * 1997-10-22 1999-05-11 Sharp Corp 高周波回路
JP2001045080A (ja) * 1999-07-26 2001-02-16 Nippon Telegr & Teleph Corp <Ntt> 振幅整合型ポリフェーズフィルタおよび位相振幅整合型ポリフェーズフィルタならびにイメージ抑圧型受信機
US8552782B1 (en) * 2010-11-30 2013-10-08 Lockheed Martin Corporation Quadrature phase network
WO2017149698A1 (fr) * 2016-03-02 2017-09-08 三菱電機株式会社 Déphaseur à synthèse vectorielle et dispositif de communication sans fil

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11127004A (ja) * 1997-10-22 1999-05-11 Sharp Corp 高周波回路
JP2001045080A (ja) * 1999-07-26 2001-02-16 Nippon Telegr & Teleph Corp <Ntt> 振幅整合型ポリフェーズフィルタおよび位相振幅整合型ポリフェーズフィルタならびにイメージ抑圧型受信機
US8552782B1 (en) * 2010-11-30 2013-10-08 Lockheed Martin Corporation Quadrature phase network
WO2017149698A1 (fr) * 2016-03-02 2017-09-08 三菱電機株式会社 Déphaseur à synthèse vectorielle et dispositif de communication sans fil

Similar Documents

Publication Publication Date Title
US7557673B1 (en) Wide bandwidth microwave balun
US9654983B2 (en) Tunable filter employing feedforward cancellation
US6107898A (en) Microwave channelized bandpass filter having two channels
US6271720B1 (en) Operational filter building block
US10230348B2 (en) Sub-network enhanced reflectionless filter topology
US20100231316A1 (en) Hybrid marchand/back-wave balun and double balanced mixer using same
US6952142B2 (en) Frequency-selective balun transformer
US20090261901A1 (en) Decade bandwidth planar mmic four port transformer
US8552782B1 (en) Quadrature phase network
US10084433B2 (en) Feedforward filter using translational filter
US5023576A (en) Broadband 180 degree hybrid
Maheshwari Mode conversion, topology preservation and symmetry of filter circuit and new tunable circuit example
US7984093B1 (en) Polyphase filter having a tunable notch for image rejection
US8217715B2 (en) Active polyphase filter producing two difference outputs having phase difference of π/2 radians
US8362835B2 (en) Decade bandwidth planar MMIC four port transformer
Yang et al. Compact and high-performance low-temperature co-fired ceramic balun filter using the hybrid resonator and symmetric four-port network
WO2019082253A1 (fr) Filtre polyphasé
US7369834B2 (en) Impedance-matched IQ network for an image rejection circuit
JP6112307B2 (ja) バンドパスフィルタ
US10027307B2 (en) Ultra broadband network of fixed or switched frequency selective filters
GB2364189A (en) Complex filter arrangement and element therefor
US9673859B2 (en) Radio frequency bitstream generator and combiner providing image rejection
US8854157B2 (en) Balun comprising two conversion circuits each constituted by first to third FBARs
US11101782B1 (en) Polyphase filter (PPF) including RC-LR sections
EP3968525A1 (fr) Conversion distribuée de données numériques en radiofréquences

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17929823

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17929823

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP