WO2019071592A1

WO2019071592A1 - Methods and computing device for facilitating multi-user detection

Info

Publication number: WO2019071592A1
Application number: PCT/CN2017/106144
Authority: WO
Inventors: Chunlin Yan
Original assignee: Zte Corporation
Priority date: 2017-10-13
Filing date: 2017-10-13
Publication date: 2019-04-18
Also published as: CN111213346B; CN111213346A

Abstract

A method for facilitating multi-user detection involves a wireless communication device (e.g., a user equipment or relay node) generating a plurality of parity bits for a plurality of information bits; puncturing the parity bits according to a first puncturing pattern to generate a first subset of parity bits; combining the plurality of information bits with the first subset of parity bits, resulting in a first set of channel-coded bits; puncturing the parity bits according to a second puncturing pattern to generate a second subset of parity bits; combining the plurality of information bits with the second subset of parity bits, resulting in a second set of channel-coded bits; and transmitting the first and second sets of channel coded bits to a second communication device via respective first and second channels.

Description

METHODS AND COMPUTING DEVICE FOR FACILITATING MULTI-USER DETECTION

TECHNICAL FIELD

The present disclosure is related generally to wireless networks and, more particularly, to methods and a computing device for facilitating multi-user detection in a wireless network.

BACKGROUND

Mobile communication systems use various coding schemes to in order to maximize throughput while minimizing errors. A common mechanism used to minimize errors involves the use of parity check bits (or “parity bits” ) . Adding parity bits decreases throughput, so the technique of “puncturing” a code is often used to compensate for this decrease. A “punctured” code is one in which certain bits of the code are deleted (usually some of the parity bits) according to a specific pattern (e.g., according to a so-called “puncturing matrix” ) in order to adjust a code rate up from a “mother code” rate， such as a 1/3 rate， to a faster rate， such as a rate of 1/2.

If the receiving device requests retransmission, the transmitting device need only retransmit the non-punctured parity bits. At the receiving device, the parity bits together with previously-received parity bits form a codeword of a punctured “mother code. ” This procedure is repeated after each retransmission request until all of the parity bits of the mother code are transmitted. Over a number of iterations, the receiving device is able to determine the values of the parity bits that were omitted from the mother code in each iteration (i.e., punctured and not transmitted) because the receiving device also knows the puncturing pattern.

Some non-orthogonal multiple access schemes can achieve an additional coding gain by using low code rate channel coding. In some non-orthogonal multiple access schemes, a fixed code rate is applied, in which the same parity check bits are used in the channel coding. This tends to negate the coding gain normally achieved by using low code rate channel coding. Furthermore, the same modulation is always applied, and thus additional modulation diversity cannot be achieved.

DRAWINGS

While the appended claims set forth the features of the present techniques with particularity, these techniques, together with their objects and advantages, may be best understood from the following detailed description taken in conjunction with the accompanying drawings of which:

FIG. 1 is a diagram of a system in which various embodiments of the disclosure are implemented.

FIG. 2 shows an example hardware architecture of a communication device, according to an embodiment.

FIG. 3A and FIG. 3B depict a way in which information bits are combined with parity bits, according to an embodiment.

FIG. 4A and FIG. 4B depict an architecture for the transmit functionality for a communication device, according to an embodiment.

FIG. 5A and FIG. 5B depict an architecture for the transmit functionality for a communication device according to another embodiment.

FIG. 6A and FIG. 6B depict an architecture for the transmit functionality for a communication device according to an interleave division multiple access ( “IDMA” ) embodiment.

FIG. 7A and FIG. 7B depict an architecture for the transmit functionality for a communication device according to a resource spread multiple access ( “RSMA” ) embodiment.

FIG. 8A depicts an example of the log likelihood ratio of series of high priority bits.

FIG. 8B depicts an example of the log likelihood ratio of series of low priority bits.

FIG. 9A depicts an example of a bit-to-symbol mapping for modulation X_i, according to an embodiment.

FIG. 9B depicts an example of a bit-to-symbol mapping for modulation Y_i, according to an embodiment.

FIG. 10A depicts an example of a bit-to-symbol mapping for modulation X_i when a sparse spreading sequence is applied, according to an embodiment.

FIG. 10B depicts an example of a bit-to-symbol mapping for modulation Y_i when a sparse spreading sequence is applied, according to an embodiment.

DESCRIPTION

According to an embodiment, a method for facilitating multi-user detection involves a wireless communication device (e.g., a user equipment or relay node) generating a plurality of parity bits for a plurality of information bits； puncturing the parity bits according to a first puncturing pattern to generate a first subset of parity bits； combining the plurality of information bits with the first subset of parity bits, resulting in a first set of channel-coded bits； puncturing the parity bits according to a second puncturing pattern to generate a second subset of parity bits； combining the plurality of information bits with the second subset of parity bits, resulting in a second set of channel-coded bits； and transmitting the first and second sets of channel coded bits to a second communication device via respective first and second channels.

In an embodiment, the first wireless communication device applies two channel codes, with different parity check bits preserved in each case. The first wireless communication device encodes the information bits by a first channel code, resulting in a first set of encoded bits. After modulating the first set of encoded bits, the first communication device spreads the modulated first set of encoded bits by a first half spreading sequence. The second wireless communication device encodes the information bits by a second channel code, resulting in a second set of encoded bits. After modulating the second set of encoded bits, the first communication device spreads the modulated second set of encoded bits by a second half spreading sequence.

In one example implantation, a mother code with a first rate (e.g., 1/3) is punctured to two channel codes, each with a faster rate (e.g., 1/2) , and different parity bit check bits are preserved for the different channel codes. The spreading length (e.g., 4 bits) is divided into two spreading codes of smaller lengths (e.g., two spreading codes of 2 bits each) . The information encoded by the first channel code is modulated and spread by the first spreading, and the information encoded by the second channel code is modulated and spread by the second spreading code.

The techniques described herein may be used in uplink, downlink, or in direct device-to-device communications.

FIG. 1 depicts a multi-user wireless communication system 100 in which the various embodiments may be deployed. The communication system 100 includes several wireless communication devices (shortened to “communication device” or “device” for convenient reference) . The communication devices depicted are a first communication device 102 (depicted as a user equipment ( “UE” ) ) ， a second communication device 104 (depicted as a base station) , and a third communication device 106 (depicted as a UE) . It is to be understood that there may be many other communication devices and that the ones represented in FIG. 1 are meant only for the sake of example. In an embodiment, the wireless communication system 100 has many other components that are not depicted in FIG. 1, including other base stations, other UEs, wireless infrastructure, wired infrastructure, and other devices commonly found in wireless networks. Possible implementations of the communication devices include any device capable of wireless communication, such as a smartphone, tablet, laptop computer, and non-traditional devices (e.g., household appliances or other parts of the “Internet of Things” ) .

FIG. 2 illustrates a basic hardware architecture implemented by each of the wireless communication devices of FIG. 1, according to an embodiment. The elements of FIG. 1 may have other components as well. The hardware architecture depicted in FIG. 2 includes logic circuitry 202, memory 204, transceiver 206, and one or more antennas represented by antenna 208. The memory 204 may be or include a buffer that, for example, holds incoming transmissions until the logic circuitry is able to process the transmission. Each of these elements is communicatively linked to one another via one or more data pathways 210. Examples of data pathways include wires, conductive pathways on a microchip, and wireless connections.

The term “logic circuitry” as used herein means a circuit (a type of electronic hardware) designed to perform complex functions defined in terms of mathematical logic. Examples of logic circuitry include a microprocessor, a controller, or an application-specific integrated circuit. When the present disclosure refers to a device carrying out an action, it is to be understood that this can also mean that logic circuitry integrated with the device is, in fact, carrying out the action.

According to an embodiment, one or more of the communication devices of FIG. 1 communicate by breaking up a single channel coding process into multiple channels-specifically, splitting up the parity bits and the spreading code among the channels. Using the first communication device 102 example, the device 102 may use a scheme like the one shown in FIG. 3A and FIG. 3B, in which the device 102 starts with information bits 302 and parity check bits 304 (which include a first portion 306 and a second portion 308, though not necessarily grouped discretely as shown in FIG. 3A) (rate 1/3) , divides up the parity check bits 304 according to a puncturing pattern so that a first channel receives the information bits 302 and the first portion 306 of parity check bits and a second channel receives the information bits 302 and the second portion 308 of parity check bits. The device 102 continues this process for multiple times until the entire transmission of information is complete.

In an embodiment, the device receiving the bits from these two channels (e.g., the second communication device 104) demodulates the incoming signal in two parts. The receiving device combines the demodulated signals of the two parts and carries out channel decoding on the combined signal at an equivalent rate (i.e., 1/3) . Because a low code rate channel decoding is applied, the overall MUSA scheme of the system 100 achieves an additional coding gain.

Turning to FIG. 4A and FIG. 4B, an architecture for the transmit functionality for a communication device (e.g., the first communication device 102) according to an embodiment will now be described. A first device (assumed to be operated by User 1) carries out the functions described on a first set of information bits 400. One or more further devices, represented by a Kth device (assumed to be operated by User K) , carry out the functions described on a Kth set (second, third, etc. ) of information bits 422. The architecture includes multiple software components stored in the memory 204 and executed by the logic circuitry 202, including a first channel path that includes a first channel coding block 408, a first modulation block 410 (which generates modulated data X_i) , and a first spreading sequence block 412 (which uses spreading sequence S₁₁, S₁₂) . The architecture also includes a second channel path that includes a second channel coding block 414, a second modulation block 416 (which generates modulated data Y_i) , and a second spreading sequence block 418 (which uses spreading sequence S₁₃, S₁₄) . At the output 420 of the architecture, there is modulated and spread data (i.e., information and parity bits post-channel coding, post-modulation, and post-spreading) , which is represented in FIG. 4B as X_iS₁, X_iS₂, Y_iS₃, Y_iS₄. The Kth device carries out the same functions previously described for the first device (at blocks 422 through 438) .

An example of how the first communication device 102 channel codes data and prepares the data for transmission to the second communication device 104 according to an embodiment will now be described. It is to be understood that these actions do not necessarily occur in the order described. (1) The first communication device 102 source-codes signals (e.g., voice and video) to generate information bits and； (2) generates parity bits based on the information bits. Examples of how the device 102 may generate the parity bits include carrying out a forward error control coding process (e.g., block coding, convolutional coding, polar coding, Turbo coding, or low density parity check) on the information bits.

Continuing with the example, the first communication device 102 then (3) punctures the parity bits according to a first puncturing pattern to generate a first subset of the parity bits； (4) punctures the parity bits according to a second puncturing pattern to generate a second subset of the parity bits； (5) combines the information bits with the first subset of parity bits, resulting in a first set of channel-coded bits； (6) combines information bits with the second subset of parity bits, resulting in a second set of channel-coded bits； (7) modulates the first set of channel coded bits； (8) modulates the second set of channel coded bits； (9) spreads the modulated first set of channel coded bits according to a first spreading sequence (e.g., the first half of a full spreading sequence) ； and (10) spreads the modulated second set of channel coded bits according to a second spreading sequence (e.g., the second half of the full spreading sequence) . Examples of spreading sequences include elements from the set {0, 1, -1, i, -i} or {0, 1, -1, i, -i, 1+i, 1-i, -1+i, -1-i} . In another example, each of the elements is a random complex value.

To illustrate the process described thus far, another example will now be described. Assume that the first communication device 102 applies an original low density parity check code with a rate of 1/9 to obtain [s p1 p2 p3 p4 p5 p6 p7 p8] , where s an information bit and pi is a parity check bit. The first communication device 102 applies two different puncturing schemes to the bits and then channel codes the bits onto two channels, resulting in a Signal 1 of [s p1 p2 p3 p4 ] and a Signal 2 of [s p5 p6 p7 p8] . The first communication device 102 spreads Signal 1 by spreading code 1 and spreads Signal 2 by spreading code 2. Spreading code 1 is first half part of the mother spreading code and spreading code 2 is the last half of the mother spreading code.

Continuing again with the example, the first communication device 102 then (12) maps the first set of modulated and spread channel coded bits and the second set of modulated and spread channel coded bits onto symbols (e.g., orthogonal frequency division multiplexing symbols) ； (13) maps the symbols onto resource elements (e.g., time-frequency resource elements) ； and (14) wirelessly transmits the symbols on the resource elements.

Turning to FIG. 5A and FIG. 5B, an architecture for the transmit functionality for multiple communication devices according to another embodiment will now be described. The blocks depicted in FIG. 5A and FIG. 5B carry out the functions described on multiple channels and for multiple users 1 through K. Referring to User 1 as a representative example, the communication device carries out these functions on a first set of information bits (block 504) . The architecture includes multiple software components stored in the memory 204 and executed by the logic circuitry 202. In this embodiment, only one channel coding is used, but with different parity check bits for each channel path (effectively two channel codes) . Thus only one channel decoding is needed at the receiving communication device. The architecture includes channel coding block 506 at which the information bits 504 are channel coded, block 508 at which the communication device combines the channel-coded bits with parity bits that were generated according to a first puncturing pattern (i.e., a first subset of the parity bits (parity check bits 1) ) , and block 510, at which the communication device combines the channel-coded bits with parity bits that were generated according to a second puncturing pattern (i.e., a second subset of the parity bits (parity check bits 2) ) . At block 512 the communication device modulates a signal carrying the first set of channel coded bits using carrier X₁, and at block 514 the communication device modulates a signal carrying the second set of channel coded bits using carrier Y₁. At block 516, the communication device spreads the modulated signal (carrying the second set of channel coded bits) using a first half-spreading sequence S₁₁S₁₂. At block 518, the communication device spreads the modulated signal (carrying the second set of channel coded bits) using a second half-spreading sequence S₁₃S₁₄. At block 520, the communication device converts the parallel channels into a serial channel.

The architecture depicted in FIG. 5A and FIG. 5B also includes the functionality of Kth communication device (such as the third communication device 106) operated by User K (i.e., any of a number of additional users beyond User 1) , with

blocks

522, 524, 526, 528, 530, 532, 534, 536, and 538 being carried out by the communication device in the same manner described above with respect to

blocks

504, 506, 508, 510, 512, 514, 516, 518, and 520.

Turning to FIG. 6A and FIG. 6B, an architecture for the transmit functionality for multiple communication devices according an IDMA embodiment will now be described. The blocks depicted in FIG. 6A and FIG. 6B carry out the functions described on multiple channels and for multiple users 1 through K. The architecture includes multiple software components stored in the memory 204 and executed by the logic circuitry 202.

Blocks

604, 606, 608, and 612 are carried out by a communication device in the same manner as described above with respect to

blocks

504, 506, 508, and 514.

Blocks

622, 624, 626, and 630 are carried out by another communication device in the same manner described above with respect to

blocks

522, 524, 526, and 532. In the architecture depicted in FIG. 6A and FIG. 6B, however, blocks 608, 612, 626, and 630 are repeating multiple times (e.g., once for each successive set of channel coded bits) at

respective blocks

610, 614, 628, and 632. At

blocks

616 and 634, the bits resulting from the two channel paths are converted into serial data. At

blocks

618 and 636, the interleaver interleaves the serial data with, for example, data destined for different resource elements. At

blocks

620 and 638, the respective communication devices modulate a signal carrying the interleaved bits.

Turning to FIG. 7A and FIG. 7B, an architecture for the transmit functionality for multiple communication devices according to yet another embodiment will now be described. The blocks depicted in FIG. 7A and FIG. 7B carry out the functions described on multiple channels and for multiple users 1 through K in a RSMA scheme. Each communication device carries out these functions on a set of information bits. The architecture includes multiple software components stored in the memory 204 and executed by the logic circuitry 202. The architecture includes

blocks

704, 706, 708, and 714 being carried out by a communication device in the same manner described above with respect to

blocks

504, 506, 508, and 514. The architecture also includes

blocks

724, 726, 728, and 732 being carried out by a communication device in the same manner described above with respect to

blocks

522, 524, 526, and 532.

Referring to FIG. 7B, the rest of the RSMA scheme is carried out by the communication devices as follows: The communication device modulates the channel coded signal (

blocks

710, 716, 730, and 734) , repeats the channel coding and modulation blocks (i.e., blocks 708 and 710； 714 and 716) multiple times (at

blocks

712 and 718； 736 and 738) , converts the data from the two paths from parallel to serial at

blocks

720 and 740, and scrambles the data at

blocks

722 and 742.

In an embodiment, a communication device using one or more of the techniques described above uses different bit-to-symbol mapping rules for the first channel path (e.g., where modulation according to X_i occurs) and the second channel path (e.g., where modulation according to Y_i occurs) . Furthermore, when high order modulation is applied, the communication device maps the high priority bits on X_i to low priority bits on Y_i.

As used herein， “high priority bits” refers to those bits for which the quality of the log likelihood ratio ( “LLR” ) is higher than average， while “low priority bits” refers to those bits for which the quality of the LLR is lower than average. To illustrate, FIG. 8A depicts an example of the LLR of high priority bits (with a first high priority bit index and a second high priority bit index) , using 16QAM (quadrature amplitude multiplexing) , which employs four bits. FIG. 8B depicts an example of the LLR of low priority bits. It can be seen that the mean absolute values of the high priority bits is larger than that of the low priority bits. High priority bits and low priority bits are commonly used in hierarchical modulation (see, for example, Coded Hierarchical Modulation for Wireless Progressive Image Transmission, IEEE Transactions on Vehicular Technoloty, Vol. 60, No. 9, November 2011, by Suayb S. Arslan) .

Turning to FIG. 9A and FIG. 9B, an example of bit-to-symbol mapping for X_i (FIG. 9A) and Y_i (FIG. 9B) that a communication device may carry out according to an embodiment and in conjunction with one or more of the techniques described above is as follows. The first two bits at each constellation point in FIG. 9A (for X_i) are high priority and the last two bits are low priority. In FIG. 9B (for Y_i) , in contrast, the last two bits are high priority at each constellation point and the first two bits are low priority. By using this technique, after demodulation and the LLR combination, the communication device achieves a better quality of LLR value for each bit, which facilitates the channel decoding.

According to an embodiment, a communication device (e.g., using one of the above-described techniques) uses a full spreading or a sparse spreading sequence for modulation. Full spreading denotes that zero does not exist in the spreading sequence elements. For example, {1, -1, i, -i} . Sparse spreading means that there may be zeros in the spreading sequence. For example, [1 0 1 0] and [0 1 1 0] are sparse spreading sequences. In one embodiment, the elements in the spreading sequences are from {0, 1, -1, i, -i} or {0, 1, -1, i, -i, 1+i, 1-i, -1+i, -1-i} or the elements of the spreading sequence are a random complex value. For example, when sparse spreading is applied, the modulation X_i might correspond to the constellation shown in FIG. 10A, while the modulation Y_i might correspond to the constellation shown in FIG. 10B.

It should be understood that the exemplary embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects within each embodiment should typically be considered as available for other similar features or aspects in other embodiments. It will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from their spirit and scope of as defined by the following claims. For example, the steps of the various methods can be reordered in ways that will be apparent to those of skill in the art.

Claims

A method for facilitating multi-user detection in a wireless communication device, the method comprising:

generating a plurality of parity bits for a plurality of information bits；

puncturing the parity bits according to a first puncturing pattern to generate a first subset of parity bits；

combining the plurality of information bits with the first subset of parity bits, resulting in a first set of channel-coded bits；

puncturing the parity bits according to a second puncturing pattern to generate a second subset of parity bits；

combining the plurality of information bits with the second subset of parity bits, resulting in a second set of channel-coded bits； and

transmitting the first and second sets of channel coded bits via respective first and second channels.
The method of claim 1, further comprising:

modulating the first set of channel coded bits；

spreading the modulated first set of channel coded bits according to a first spreading sequence；

modulating the second set of channel coded bits；

spreading the modulated second set of channel coded bits according to a second spreading sequence； and

wirelessly transmitting the first set of modulated and spread channel coded bits and the second set of modulated and spread channel coded bits.
The method of claim 2, wherein

the first spreading sequence comprises a first plurality of spreading codes of equal length and the second spreading sequence comprises a second plurality of spreading codes of equal length, and

the length of each of the plurality of spreading codes of the first spreading sequence is equal to the length of each of the plurality of spreading codes of the second spreading sequence.
The method of claim 2, further comprising:

mapping the first set of modulated and spread channel coded bits and the second set of modulated and spread channel coded bits onto a plurality of symbols,

wherein wirelessly transmitting the first set of modulated and spread channel coded bits and the second set of modulated and spread channel coded bits comprises wirelessly transmitting the plurality of symbols.
The method of claim 4, further comprising:

mapping the plurality of symbols onto one or more resource elements,

wherein wirelessly transmitting the first set of modulated and spread channel coded bits and the second set of modulated and spread channel coded bits comprises wirelessly transmitting the symbols on the one or more resource elements.
The method of claim 2, wherein

modulating the first set of channel coded bits comprises modulating the first set of channel coded bits according to a first set of bit-to-symbol mapping rules, and

modulating the second set of channel coded bits comprises modulating the first set of channel coded bits according to a second set of bit-to-symbol mapping rules.
The method of claim 6, wherein modulating the first set of channel coded bits further comprises:

applying high order modulation to the first set of channel coded bits； and

mapping the high priority bits of the modulated first set of channel coded bits to the low priority bits of the modulated second set of channel coded bits.
The method of claim 2, wherein the elements of at least one of the first spreading sequence and the second spreading are a random complex value.
The method of claim 2, wherein the elements of the first spreading sequence and the second spreading belong to the set {0, 1, -1, i, -i} .
The method of claim 2, wherein the elements of the first spreading sequence and the second spreading belong to the set {1, -1, i, -i} .
The method of claim 2, wherein the elements of the first spreading sequence and the second spreading belong to the set {1, 0} .
The method of claim 2, wherein the at least one of the first spreading sequence and the second spreading sequence is a full spreading sequence.
The method of claim 2, wherein the at least one of the first spreading sequence and the second spreading sequence is a sparse spreading sequence.
The method of claim 1, wherein generating a plurality of parity bits for a plurality of information bits comprises carrying out forward error control coding on the plurality of information bits.
The method of claim 14, wherein carrying out forward error control coding on the plurality of information bits comprises carrying out block coding, convolutional coding, polar coding, Turbo coding, or low density parity check coding on the plurality of information bits.
The method of claim 1, further comprising converting the first and second sets of channel coded bits from parallel streams to a serial stream.
The method of claim 16, further comprising scrambling the serial stream.
The method of claim 16, further comprising interleaving data of the serial stream with data destined for a plurality of different resource elements
The method of claim 1, further comprising repeating the puncturing and combining steps for each of the first puncturing pattern and the second puncturing pattern.
A wireless communication device configured to carry out any one of claims 1 through 19.
A non-transitory computer-readable medium having stored thereon computer-executable instructions for carrying out any one of claims 1 through 19.