WO2019071485A1

WO2019071485A1 - Detection system for hardware module

Info

Publication number: WO2019071485A1
Application number: PCT/CN2017/105756
Authority: WO
Inventors: 朱勇
Original assignee: 深圳传音通讯有限公司
Priority date: 2017-10-11
Filing date: 2017-10-11
Publication date: 2019-04-18

Abstract

Provided is a detection system for a hardware module. The detection system comprises: a GPIO module and hardware modules. The GPIO module comprises: a pull-up input module, a pull-down input module and a GPIO port, wherein the pull-up input module, the pull-down input module and the GPIO port are connected in parallel, so as to control the enabling of pulling up and pulling down of GPIO. The hardware module comprises an input/output interface connected to the GPIO port and a detection interface component arranged in the hardware module, and the detection interface component comprises: a hardware IO end, which is connected to a chip in the hardware module; a open circuit end, which is suspended in the hardware module; and a grounding terminal, which is connected to the ground. The hardware IO end, the open circuit end and the ground terminal are respectively connected with the input/output interface, and the high level or low level is fed back to the pull-up input module or the pull-down input module to detect the configuration of the hardware module. With the above technical solutions, rapid detection and differentiation can be achieved for products from multiple different vendors.

Description

Detection system for hardware module

Technical field

The present invention relates to the field of electronic device detection, and more particularly to a detection system for a hardware module.

Background technique

At present, the development of intelligent terminals is getting faster and faster, and the penetration rate among the people is also increasing. In the manufacture of smart terminals, such as display screens, batteries and other accessories generally have two or three suppliers for the security of supply. Due to the difference in parameters of each material, the software needs to be compatible with each material. Usually it is compatible in software. The usual solution is to give each supplier's material an identification ID number and identify the corresponding software by identifying the ID number. At the hardware level, there are basically two ways to implement the ID number: one is the conventional ADC detection, and the other is the general GPIO detection. Since GPIO can only detect two levels, high level and low level, there are certain limitations in use. Once the supplier increases, it will not be able to distinguish the supplier.

Therefore, there is a need for a new type of detection system and detection method for hardware module identification, which can meet the distinction between different supply products of multiple hardware suppliers.

Summary of the invention

In order to overcome the above technical deficiencies, an object of the present invention is to provide a detection system for a hardware module, which can realize rapid detection and differentiation for products of different vendors.

The invention discloses a detection system for a hardware module, the detection system comprises: an interconnected GPIO module and a hardware module, the GPIO module comprises: a pull-up input module, a pull-down input module and a GPIO port, wherein ,

The pull-up input module and the pull-down input module are connected to the GPIO port to control the pull-up enable or pull-down enable of the GPIO port;

The hardware module includes an input/output interface connected to the GPIO port and a detection interface component disposed in the hardware module, where the detection interface component includes:

a hardware IO end connected to the chip in the hardware module;

a disconnecting end, suspended in the hardware module;

Ground terminal, connected to the ground;

The hardware IO end, the breaking end, and the ground end are respectively connected to the input/output interface, and feedback a high level or a low level to the pull-up input module or the pull-down input module to detect the configuration of the hardware module.

Preferably, the pull-up input module comprises:

a first end, connected to the GPIO port;

Power supply positive VDD;

a pull-up resistor and a first switch connected to the pull-up resistor, and the pull-up resistor and the first switch are connected between the first end and the power source positive VDD;

The pull-down input module includes:

a second end connected to the GPIO port and simultaneously connected to the first end;

Power supply negative VSS;

And a second switch connected to the pull-down resistor, and the pull-down resistor and the second switch are connected between the second end and the power source negative VSS.

Preferably, the hardware IO end is a Vendor_ID pin of the hardware module.

Preferably, the detecting interface component further includes:

The single-pole three-throw switch is disposed in the hardware module, and includes a switch piece, a static contact, and a first movable contact, a second movable contact, and a third movable contact;

One end of the switch piece is pivotally connected to the static contact, and the other end is switched in contact between the first movable contact, the second movable contact and the third movable contact;

The static contact is connected to the Vendor_ID foot;

The first movable contact is connected to the hardware IO end;

The second movable contact is connected to the disconnecting end;

The third movable contact is connected to the ground.

Preferably, when the switch piece is in contact with the first movable contact, the GPIO module is in a first state, wherein the pull-up input module is at a high level, and the pull-down input module is at a high level ;

When the switch piece is in contact with the second movable contact, the GPIO module is in a second state, wherein the pull-up input module is at a low level, and the pull-down input module is at a low level;

When the switch piece is in contact with the third movable contact, the GPIO module is in a third state, wherein the pull-up input module is at a high level, and the pull-down input module is at a low level.

Preferably, when the GPIO module is in the first state, the Vendor_ID pin outputs the number 1;

When the GPIO module is in the second state, the Vendor_ID pin outputs the number 0;

When the GPIO module is in the third state, the Vendor_ID pin outputs the number 2.

Preferably, the hardware module is an LCD display module.

Preferably, the GPIO module is a BBIC chip.

After adopting the above technical solution, compared with the prior art, the following beneficial effects are obtained:

1. When different manufacturers make hardware, there is no additional configuration, saving the process at the supplier;

2. Add a variety of hardware identification tests for the GPIO port, which is more applicable.

DRAWINGS

1 is a schematic structural diagram of a detection system for a hardware module in accordance with a preferred embodiment of the present invention;

2 is a schematic diagram showing the circuit structure of a pull-up input module and a pull-down input module in accordance with a preferred embodiment of the present invention.

Detailed ways

Advantages of the present invention are further explained below in conjunction with the accompanying drawings and specific embodiments.

Exemplary embodiments will be described in detail herein, examples of which are illustrated in the accompanying drawings. The following description refers to the same or similar elements in the different figures unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with aspects of the present disclosure as detailed in the appended claims.

The terms used in the present disclosure are for the purpose of describing particular embodiments only, and are not intended to limit the disclosure. The singular forms "a", "the" and "the" It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

It should be understood that although the terms first, second, third, etc. may be used in the present disclosure to describe various information, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, the first information may also be referred to as second information without departing from the scope of the present disclosure. Similarly, the second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when" or "when" or "in response to determination."

In the description of the present invention, it is to be understood that the terms "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", The orientation or positional relationship of the indications of "horizontal", "top", "bottom", "inside", "outside", etc. is based on the orientation or positional relationship shown in the drawings, only for the convenience of describing the present invention and simplifying the description, rather than It is to be understood that the device or elements referred to have a particular orientation, are constructed and operated in a particular orientation and are therefore not to be construed as limiting.

In the description of the present invention, unless otherwise specified and limited, it should be noted that the terms "mounted", "connected", and "connected" are to be understood broadly, and may be, for example, mechanical or electrical, or both. The internal communication of the components may be directly connected or indirectly connected through an intermediate medium. For those skilled in the art, the specific meanings of the above terms may be understood according to specific circumstances.

In the following description, the suffixes such as "module", "component" or "unit" used to represent components are only used. For the explanation of the present invention, it does not have a specific meaning per se. Therefore, "module" and "component" can be used in combination.

1 is a schematic structural diagram of a detection system for a hardware module according to a preferred embodiment of the present invention. The hardware module is detected, and a GPIO module is connected thereto, and the GPIO module is changed to increase the height of the pair. Level detection stability, and a high-impedance detection scheme based on the original high-low level, including the pull-up input module, the pull-down input module, and the GPIO port in the GPIO module. The pull-up input module and the pull-down input module are respectively disposed in the GPIO module and are connected in parallel with the GPIO port, thereby realizing control of the pull-up enable and pull-down enable of the GPIO port, thereby controlling the GPIO module to be pulled up and enabled. When the high-level state and the low-level state are enabled, the difference between the hardware modules can be identified through a combination of various high-low state states. On the hardware module side, the input and output interfaces connected to the GPIO port and the detection interface component disposed in the hardware module extend from the hardware module and extend toward the GPIO module until connected to The GPIO port, the input/output interface receives the detection signal sent from the GPIO port for the hardware module detection, and then forwards it to the detection interface component. Therefore, the detection interface component includes: a hardware IO end, which is connected with a chip in the hardware module to obtain a signal and a wiring relationship of the chip in the hardware module; the disconnection end is suspended at one end and is in an open state, and is disposed in the hardware module. ; ground terminal, connected to the ground. The hardware IO terminal, the disconnecting terminal and the grounding terminal are respectively connected with the input/output interface. When the GPIO module is pulled up and pulled through the pull-up input module and the pull-down input module, the hardware IO terminal, the disconnecting terminal and the grounding terminal respectively feed back the high voltage. Flat or low to pull up input module and pull down input module. It can be understood that since the GPIO is in a state of being pulled up or pulled down, it can be separately received:

1 pull-up is high and pull-down is high;

2 pull-up is low, pull-down is low;

3 pull-up is high and pull-down is low;

4 pull-up is low, pull-down is high;

These four kinds of feedback information can be used to know the identification of the current hardware components, and thus distinguish the products given by different product suppliers.

Referring to FIG. 2, in a preferred embodiment, the circuit component in the pull-up input module comprises: a first end connected to the GPIO port; a positive power supply VDD; a pull-up resistor and a first switch connected to the pull-up resistor, and The pull-up resistor is connected to the first switch and the power supply positive VDD, and the resistor component in the pull-down input module comprises: a second end connected to the GPIO port and simultaneously connected to the first end; the power supply negative VSS; A pull-down resistor and a second switch connected to the pull-down resistor, and the pull-down resistor and the second switch are connected between the second end and the power supply negative VSS.

For the configuration and function of the pull-up resistor and the pull-down resistor, it includes:

Pull-up is to clamp the indeterminate signal through a resistor at a high level, and the resistor acts as a current-limiter at the same time. The pull-up is to inject current into the device and the pull-down is the output current. Weak strength is only the resistance of the pull-up resistor is different, no What is strictly distinguished. For non-collector (or drain) open-circuit output circuits (such as ordinary gate circuits), the ability to boost current and voltage is limited. The function of pull-up resistors is mainly to output current channels for open-collector output circuits.

As for why the pull resistor is used, when the single button is used for triggering, if the IC itself does not have an internal resistor, in order to maintain the single button in the untriggered state or return to the original state after the trigger, it must be connected to the outside of the IC. resistance. Digital circuits have three states: high, low, and high-impedance. Some applications do not want high-impedance. They can be stabilized by pull-up or pull-down resistors, depending on design requirements. . Generally speaking, I/O ports, some can be set, some can not be set, some are built-in, some need to be external, the output of I/O port is similar to C of a triode, when C is connected through a resistor and power supply When together, the resistor becomes the upper C-pull resistor, that is, if the port is high when it is normal, and C is connected to the ground through a resistor, the resistor is called a pull-down resistor, so that the port is normally Low level, for example, when a port with a pull-up resistor is set to the input state, the normal state is high, which is used to detect the input of the low level. Pull-up resistors are used to provide current when the bus drive capability is insufficient. The general term is to draw current, and the pull-down resistor is used to sink current.

In addition, the resistance mismatch in long-line transmission is likely to cause reflected wave interference, and the pull-down resistor is resistance matching, which effectively suppresses reflected wave interference. Resistor series is a good way to achieve impedance matching. Usually the magnitude of the line resistance is in the order of tens of ohms. If the pull-down is added, the power consumption is too large. When the TTL circuit drives the COMS circuit, if the high level of the TTL circuit output is lower than the lowest level of the COMS circuit (typically 3.5V), then the pull-up resistor needs to be connected to the output of the TTL to increase the output. The value of the level. For high speed circuits, excessive pull-up resistors may flatten the edges. The drive requirements of the lower level circuit. Similarly, for the above pull-up resistor, when the output is high, the switch is turned off, and the pull-up resistor should be properly selected to provide sufficient current to the lower stage circuit.

When the output is high, the output stage of the CMOS circuit is basically push-pull. When the ground level is output, the lower MOSFET turns off and the upper side turns on. The high level is reversed.

When using pull-up resistors and pull-down resistors, be aware of:

1. When the TTL circuit drives the COMS circuit, if the high level of the TTL circuit output is lower than the lowest level of the COMS circuit (generally 3.5V), then the pull-up resistor needs to be connected at the output end of the TTL to improve Output a high value.

2. The OC gate circuit must be equipped with a pull-up resistor before it can be used.

3, in order to increase the drive capability of the output pin, some of the microcontroller pins often use pull-up resistors.

4. On the COMS chip, in order to prevent damage caused by static electricity, the unused pins cannot be suspended. Generally, the pull-up resistor is connected to reduce the input impedance and provide a discharge path.

5. The pin of the chip is added with a pull-up resistor to increase the output level, thereby improving the noise margin of the input signal of the chip and enhancing the anti-interference ability.

6. Improve the anti-electromagnetic interference capability of the bus. When the pins are suspended, it is easier to accept external electromagnetic interference.

7. The resistance mismatch in long-line transmission is easy to cause reflected wave interference, and the pull-down resistor is resistance matching, which effectively suppresses reflected wave interference.

The selection criteria for the value of the pull-up resistor include:

1. It should be large enough to save power and the current sinking capacity of the chip; the resistance is large and the current is small.

2, from the consideration of ensuring sufficient drive current should be small enough; small resistance, large current.

3. For high-speed circuits, excessive pull-up resistors may flatten the edges. Considering

The above three points are usually selected between 1k and 10k. Similar to the pull-down resistor

The selection of the pull-up resistor and the pull-down resistor should be set in combination with the characteristics of the switching transistor and the input characteristics of the lower-level circuit. The following factors should be considered:

1. The balance between drive capability and power consumption. The above pull-up resistor is taken as an example. Generally speaking, the smaller the pull-up resistor, the stronger the driving capability, but the greater the power consumption, the design should pay attention to the balance between the two.

2. The drive requirements of the lower level circuit. Similarly, for the above pull-up resistor, when the output is high, the switch is turned off, and the pull-up resistor should be properly selected to provide sufficient current to the lower stage circuit.

3. High and low level settings. The threshold of the high and low levels of different circuits will be different, and the resistor should be properly set to ensure that the correct level can be output. For example, when the pull-up resistor is output, when the output is low, the switch is turned on, and the pull-up resistor and the on-resistance of the switch should be kept below the zero level threshold.

4. Frequency characteristics. For example, the above pull-up resistor, the capacitance between the pull-up resistor and the drain-source of the switch and the input capacitance between the lower-level circuits form an RC delay. The larger the resistance, the greater the delay. The pull-up resistor should be set to account for the needs of the circuit in this regard.

The principle of setting the pull-down resistor is the same as the pull-up resistor.

When the OC gate outputs a high level, it is a high-impedance state. The pull-up current is provided by a pull-up resistor. The input terminal is not more than 100uA per port, and the output current of the output port is about 500uA. The standard operating voltage is 5V. The high and low thresholds are 0.8V (below this value is low); 2V (high threshold).

When the pull-up resistor is selected:

500uA x 8.4K=4.2 When the output is greater than 8.4K, the output can be pulled down to below 0.8V. This is the minimum resistance value, and it will not be pulled down. If the output current of the output port is large, the resistance value can be reduced, and it can be lower than 0.8V when the pull-down is performed.

When the output is high, the leakage current of the tube is ignored, and the two input ports need 200uA.

200uA x15K=3V, that is, the pull-up resistor has a voltage drop of 3V, and the output port can reach 2V. This resistance is the maximum resistance value, and it will not be able to pull 2V. Choose 10K available.

The leakage current of the tube can not be neglected during design. The actual current of the IO port is different at different levels. The above is only the principle. In one sentence, it is summarized as follows: when the output is high, the input port should be fed, and the output should not be low. The output port feeds, otherwise the excess current is fed to the cascaded input port, which is unreliable above the low level threshold.

Input pins that are not used in digital circuits must be connected to a fixed level and connected to a high level or ground through a 1k resistor.

The function of the pull-up resistor includes: the resistor is to prevent the input terminal from floating, to reduce the interference of the external current on the chip, to protect the protection diode in the CMOS, the current is not more than 10mA, pull-up and pull-down, current limit, change level The potential, the determined state when the pin is floating, the drive capability when the high level output is increased, and the OC gate provides the current.

With continued reference to FIG. 1, in this embodiment, the hardware IO end is the Vendor_ID pin of the hardware module. The Vendor_ID pin is the manufacturer code manufacturer ID identifier, and the supplier can extract the identification pin from its own hardware module for detection by the GPIO module. At the same time, the detection interface component further comprises: a single-pole three-throw switch, disposed in the hardware module, comprising a switch piece, a static contact and the first movable contact, the second movable contact, the third movable contact; one end of the switch piece The static contact is pivotally connected, and the other end is switched between the first movable contact, the second movable contact and the third movable contact; and for the configuration of each contact, the static contact is connected with the Vendor_ID leg; The first moving contact is connected to the hardware IO end; the second moving contact is connected to the breaking end; and the third moving contact is connected to the ground end. The switch piece rotates on the contact of the static contact with the static contact as the axis, and the other end is in the first movable contact, the second movable contact, and the third movable contact, and the first movement After the contact, the second movable contact and the third movable contact are in contact, the internal chip of the hardware module can be connected.

In use, since the moving contact is divided into three, the different positions of the switch piece will also divide the GPIO module into three states, namely:

When the switch piece is in contact with the first movable contact, the GPIO module is in the first state, wherein the pull-up input module is at a low level, and the pull-down input module is at a low level;

When the switch piece is in contact with the second movable contact, the GPIO module is in the second state, wherein the pull-up input module is at a high level, and the pull-down input module is at a high level;

When the switch piece is in contact with the third moving contact, the GPIO module is in the third state, wherein the pull-up input module is at a high level, and the pull-down input module is at a low level.

In the above three states, the true value of the Vendor_ID pin is shown in the following table:

That is to say: when the GPIO module is in the first state, the Vendor_ID pin outputs the number 1; when the GPIO module is in the second state, the Vendor_ID pin outputs the number 0; when the GPIO module is in the third state, the Vendor_ID pin outputs the number 2. Differentiate the devices provided by different vendors by different output numbers.

In any of the above embodiments, the hardware module is an LCD display module, and the GPIO module is a BBIC chip.

The mobile terminal can be implemented in various forms. For example, the terminal described in the present invention may include a mobile terminal such as a mobile phone, a smart phone, a notebook computer, a PDA (Personal Digital Assistant), a PAD (Tablet), a PMP (Portable Multimedia Player), a navigation device, and the like, and such as Fixed terminal for digital TV, desktop computer, etc. In the following, it is assumed that the terminal is a mobile terminal. However, those skilled in the art will appreciate that configurations in accordance with embodiments of the present invention can be applied to fixed type terminals in addition to components that are specifically for mobile purposes.

It should be noted that the embodiments of the present invention are preferred embodiments, and are not intended to limit the scope of the present invention. Any one skilled in the art may use the above-disclosed technical contents to change or modify the equivalent embodiments. Any modification or equivalent changes and modifications of the above embodiments in accordance with the technical spirit of the present invention are still within the scope of the technical solutions of the present invention.

Claims

A detection system for a hardware module, the detection system comprising: an interconnected GPIO module and a hardware module, wherein

The GPIO module includes: a pull-up input module, a pull-down input module, and a GPIO port, wherein

The pull-up input module and the pull-down input module are connected to the GPIO port to control the pull-up enable or pull-down enable of the GPIO port;

The hardware module includes an input/output interface connected to the GPIO port and a detection interface component disposed in the hardware module, where the detection interface component includes:

a hardware IO end connected to the chip in the hardware module;

a disconnecting end, suspended in the hardware module;

Ground terminal, connected to the ground;

The hardware IO end, the breaking end, and the ground end are respectively connected to the input/output interface, and feedback a high level or a low level to the pull-up input module or the pull-down input module to detect the configuration of the hardware module.
The detection system of claim 1 wherein:

The pull-up input module includes:

a first end, connected to the GPIO port;

Power supply positive VDD;

a pull-up resistor and a first switch connected to the pull-up resistor, and the pull-up resistor and the first switch are connected between the first end and the power source positive VDD;

The pull-down input module includes:

a second end connected to the GPIO port and simultaneously connected to the first end;

Power supply negative VSS;

And a second switch connected to the pull-down resistor, and the pull-down resistor and the second switch are connected between the second end and the power source negative VSS.
The detection system of claim 1 wherein:

The hardware IO end is a Vendor_ID pin of the hardware module.
The detection system of claim 3 wherein:

The detection interface component further includes:

The single-pole three-throw switch is disposed in the hardware module, and includes a switch piece, a static contact, a first movable contact, a second movable contact, Third moving contact;

One end of the switch piece is pivotally connected to the static contact, and the other end is switched in contact between the first movable contact, the second movable contact and the third movable contact;

The static contact is connected to the Vendor_ID foot;

The first movable contact is connected to the hardware IO end;

The second movable contact is connected to the disconnecting end;

The third movable contact is connected to the ground.
The detection system of claim 4 wherein:

When the switch piece is in contact with the first movable contact, the GPIO module is in a first state, wherein the pull-up input module is at a high level, and the pull-down input module is at a high level;

When the switch piece is in contact with the second movable contact, the GPIO module is in a second state, wherein the pull-up input module is at a low level, and the pull-down input module is at a low level;

When the switch piece is in contact with the third movable contact, the GPIO module is in a third state, wherein the pull-up input module is at a high level, and the pull-down input module is at a low level.
The detection system of claim 5 wherein:

When the GPIO module is in the first state, the Vendor_ID pin outputs the number 1;

When the GPIO module is in the second state, the Vendor_ID pin outputs the number 0;

When the GPIO module is in the third state, the Vendor_ID pin outputs the number 2.
The detection system of claim 1 wherein:

The hardware module is an LCD display module.
The detection system of claim 1 wherein:

The GPIO module is a BBIC chip.