WO2019061880A1 - 显示面板及其显示装置 - Google Patents

显示面板及其显示装置 Download PDF

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Publication number
WO2019061880A1
WO2019061880A1 PCT/CN2017/117340 CN2017117340W WO2019061880A1 WO 2019061880 A1 WO2019061880 A1 WO 2019061880A1 CN 2017117340 W CN2017117340 W CN 2017117340W WO 2019061880 A1 WO2019061880 A1 WO 2019061880A1
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WIPO (PCT)
Prior art keywords
switches
control
signal
electrically coupled
lines
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PCT/CN2017/117340
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English (en)
French (fr)
Inventor
胡水秀
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惠科股份有限公司
重庆惠科金渝光电科技有限公司
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Priority to US15/745,528 priority Critical patent/US20190096304A1/en
Publication of WO2019061880A1 publication Critical patent/WO2019061880A1/zh

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • the present application relates to the field of display technologies, and in particular, to a display panel and a display device thereof.
  • a gate driver circuit Gate Driver
  • a source driver driver Source Driver
  • the display driving method includes: the system motherboard transmits a color (for example: R/G/B) compression signal, a control signal, and a power source to the control board.
  • the signal is processed by the Timing Controller (TCON) on the control board, and then transmitted to the source circuit and the gate circuit of the printed circuit board, through the scanning lines, data lines, power lines and the like on the substrate, which will be necessary.
  • TCON Timing Controller
  • the data and power are transmitted to the display area, so that the display obtains a power source and a signal that present a picture.
  • each group of data lines is grouped, and the same group of data lines are connected for a certain period of time, and the charge on the parasitic capacitance resistance of the data line is neutralized. However, this only applies to the case where the data voltages of the two columns of pixels on the same row are opposite in polarity.
  • the voltage value of the parasitic capacitance resistance on the two columns of data lines after the charge sharing is the average of the two voltages. It is too far from the zero voltage, which is not conducive to the writing of the next line of data.
  • an object of the present invention is to provide a display panel and a display device thereof, which can simultaneously charge all data lines by connecting all data lines, effectively neutralize the voltage of the data lines, and improve the charging efficiency.
  • a display panel includes: a first substrate and a second substrate disposed oppositely; the first substrate includes a display area and a peripheral wiring area thereof, and the display area includes a plurality of a scan line, a plurality of data lines, a plurality of active switches, and a plurality of pixel units, wherein the plurality of pixel units are respectively coupled to the plurality of active switches, and the plurality of active switches are electrically coupled to the plurality of Between the scan lines and the plurality of data lines; a source driving unit electrically coupled to the plurality of data lines; a plurality of charge sharing switches disposed between the plurality of data lines; control lines, electricity Optionally coupling the control terminals of the plurality of charge sharing switches; wherein the control circuit transmits a first signal to a control end of the plurality of charge sharing switches, causing the plurality of charge sharing switches to be turned on, A plurality of data lines are electrical
  • a plurality of data line switches are further disposed between the source driving unit and the plurality of data lines, and the control circuit is electrically coupled to the plurality of data line switches a control terminal, and when providing the first signal, providing a second signal to a control end of the plurality of data line switches; wherein the first signal and the second signal are different potentials; When the plurality of charge sharing switches are on, the plurality of data line switches are off; when the plurality of charge sharing switches are off, the plurality of data line switches are on.
  • the method further includes an inverting unit disposed between the control line and the plurality of data line switches, the control line outputting the first signal, An inverting unit converts the first signal to the second signal for transmission to the plurality of data line switches.
  • an output end of the inverting unit simultaneously connects all of the plurality of data line switches.
  • each of the plurality of data line switches is coupled to the inverting unit.
  • control circuit is electrically coupled to the source driving unit, and when the source driving unit acquires the second signal through the control line, stopping outputting data to the plurality of pieces of data line.
  • the control circuit includes a selector, the plurality of charge sharing switches are divided into a plurality of switch groups, and an input end of the selector is electrically coupled to the first signal.
  • the output of the selector is connected to a plurality of control lines, the plurality of control lines are electrically coupled to the plurality of switch groups, respectively, and the selector adjusts the plurality of control lines according to the first signal a potential to control the turning on and off of the plurality of switch groups.
  • the multiple control lines include a first control line and a second control line
  • the plurality of switch groups include a first switch group and a second switch group
  • the first The switch group includes an odd-numbered sequence of charge-sharing switches
  • the second switch group includes an even-numbered charge-sharing switch
  • the first control line is electrically coupled to the first switch group
  • the two control lines are electrically coupled to the second switch group.
  • a display panel comprising: a first substrate and a second substrate disposed opposite to each other; the first substrate includes a display area and a peripheral wiring area thereof, the display area including a plurality of scan lines a plurality of data lines, a plurality of active switches, and a plurality of pixel units, wherein the plurality of pixel units are respectively coupled to the plurality of active switches, and the plurality of active switches are electrically coupled to the plurality of scans Between the line and the plurality of data lines; a source driving unit electrically coupled to the plurality of data lines; a plurality of charge sharing switches disposed between the plurality of data lines; and a plurality of data line switches, Between the source driving unit and the plurality of data lines; a control circuit electrically coupled to the control ends of the plurality of charge sharing switches; and an inverting unit, the output of the inverting unit is electrically a control end of the plurality of data line switches, the input end of the inverting unit is electrically coupled to the
  • a further object of the present application is a display device comprising: a control module; a display panel comprising: a first substrate and a second substrate disposed oppositely; the first substrate comprising a display area and a peripheral wiring area thereof
  • the display area includes a plurality of scan lines, a plurality of data lines, a plurality of active switches, and a plurality of pixel units, wherein the plurality of pixel units are respectively coupled to the plurality of active switches, and the plurality of active switches are respectively electrically
  • the plurality of scan lines are coupled to the plurality of data lines; the source driving unit is electrically coupled to the plurality of data lines; and the plurality of charge sharing switches are disposed on the plurality of data lines a control circuit electrically coupled to the control end of the plurality of charge sharing switches and the control module; wherein the control module provides a first signal to a control end of the plurality of charge sharing switches, A plurality of charge sharing switches are turned on to electrically couple the plurality of data lines to each other.
  • This application can not significantly change the existing production process, moderately adjust the charge sharing circuit, make the data line connect all the data lines before polarity switching, make all data lines simultaneously charge sharing, effectively neutralize the voltage of the data line, and speed up the data.
  • the charge on the line and the voltage on the data line are zero or close to zero, which also improves the charging efficiency.
  • the process is not required to be greatly adjusted, the original process requirements and product costs can be maintained.
  • FIG. 1a is a schematic diagram of the architecture of an exemplary display device.
  • FIG. 1b is a schematic diagram of an exemplary pixel unit configuration.
  • Figure 1c is an equivalent circuit diagram of an exemplary source drive line.
  • Figure 1d is a waveform diagram of control signals for an exemplary source drive line.
  • 2a is a schematic diagram showing an equivalent circuit of a source driving circuit applied to a display panel according to a method of the present application.
  • 2b is a schematic diagram showing an equivalent circuit of a source driving circuit applied to a display panel according to a method of the present application.
  • 2c is a schematic diagram showing an equivalent circuit of a source driving circuit applied to a display panel according to a method of the present application.
  • 2d is a schematic diagram showing an equivalent circuit of a source driving circuit applied to a display panel according to the method of the present application.
  • FIG. 3 is a waveform diagram showing control signals applied to a source driving line of a display panel in accordance with a method of the present application.
  • the word “comprising” is to be understood to include the component, but does not exclude any other component.
  • “on” means located above or below the target component, and does not mean that it must be on the top based on the direction of gravity.
  • FIG. 1a is a schematic diagram of the architecture of an exemplary display device.
  • a display device 200 includes: a control board 100, the control board 100 includes a Timing Controller (TCON) 101, a printed circuit board 103, and a flexible flat cable passing through the control board 100.
  • the (Flexible Flat Cable, FFC) 102 is connected to each other; the source driving unit 104 and the gate driving unit 105 are disposed in the wiring region 109, and are respectively connected to the data line 104a and the scanning line 105a in the display area 106.
  • gate drive unit 105 and source drive unit 104 include, but are not limited to, a form of a flip chip.
  • the driving manner of the display device 200 includes: the system mainboard provides color (for example, R/G/B) compression signals, control signals, and power transmission to the control board 100.
  • the Timing Controller (TCON) 101 on the control board 100 and after processing the signals, together with the power source processed by the driving circuit, are transmitted to the printed circuit board through a Flexible Flat Cable (FFC) 102.
  • the gate driving unit 105 and the source driving unit 104 of the 103, the gate driving unit 105 and the source driving unit 104 transmit necessary data and power to the display area 106, thereby causing the display device 200 to obtain a power supply for presenting a picture, signal.
  • FIG. 1b is a schematic diagram of an exemplary pixel unit configuration. Please cooperate with Figure 1a to facilitate understanding.
  • the gate driving unit 105 supplies a scanning signal to the scanning line 105a row by row, and supplies a scanning signal to one scanning line 105a every scanning period.
  • the data line 104a of the display panel is opened row by row, and the source driving unit 104 supplies data to the pixel unit P through the data line 104a.
  • Figure 1c is an equivalent circuit diagram of an exemplary source drive line. Please cooperate with Figure 1a and Figure 1b to facilitate understanding.
  • the source driving unit 104 is connected to the data line 104a, and the data output terminal of the source driving unit 104 is provided with a data line switch 320.
  • the data lines 104a are grouped in pairs, and a charge sharing switch 330 is disposed between each group of data lines 104a.
  • the control module 310 is electrically coupled to the control terminals of the charge sharing switch 330 and the data line switch 320 through the control line 340.
  • the inverting unit 350 is disposed on the control line 340 and between the data line switch 320 and the control module 310.
  • the control module 310 is not limited thereto: the source driving unit 104, the timing control unit 101, or other control components having output control signals.
  • the data line 104a has a parasitic capacitance C and a parasitic resistance R.
  • FIG. 1d is a waveform diagram of control signals for an exemplary source drive line. Please cooperate with Figures 1a to 1c to facilitate understanding.
  • the timing control unit provides a latch signal for source driver (TP) to the source driving unit 104a. When the latch signal is high, the source driving unit 104a does not have data output.
  • the control module 310 provides a Charge Sharing Signal to the control line 340. At this time, the charge sharing switch 330 is turned on under the control of the charge sharing signal, so that the adjacent two data lines 104a are connected together.
  • the charge sharing period (CS cycle) i.e., during which the latch signal is high
  • the adjacent two data lines 104a are subjected to charge neutralization, and the signal waveforms of the two data lines are as shown in Fig. 1d.
  • the latch signal is turned low, the source driving unit 104 outputs a data signal to perform charging of the pixel unit P of the next row.
  • this mode is only suitable for the case where the data polarities of the adjacent two data lines 104a are opposite. If the data polarities of the adjacent two data lines 104a are opposite, the polarity of the voltage on the parasitic capacitance C and the parasitic resistance R will be opposite. When the charge sharing is performed, the parasitic capacitance C and the parasitic resistance on the adjacent two data lines 104a.
  • the voltage of R can be neutralized to a value close to zero, which facilitates the writing of the data voltage of the pixel unit P of the next row.
  • the voltage values of the parasitic capacitance C and the parasitic resistance R on the adjacent two data lines 104a are the average value of the group voltage, and the zero voltage. The difference is too far, which is not conducive to the writing of the pixel unit P of the next row.
  • the display panel 300 includes: a first substrate and a second substrate disposed opposite to each other; the first substrate includes a display area 106 and a peripheral wiring area 109 thereof.
  • the display area 106 includes a plurality of scan lines 05a, a plurality of data lines 104a, a plurality of active switches T and a plurality of pixel units P, and the plurality of pixel units P are respectively coupled to the plurality of active switches T,
  • the plurality of active switches T are electrically coupled between the plurality of scan lines 105a and the plurality of data lines 104a;
  • the source driving unit 104 is electrically coupled to the plurality of data lines 104a;
  • a charge sharing switch 330 disposed between the plurality of data lines 104a;
  • a control circuit 340 electrically coupled to the control terminals of the plurality of charge sharing switches 330; wherein the control line 340 transmits the first signal to
  • the control terminals of the plurality of charge sharing switches 330 cause the plurality of charge sharing switches 330 to be turned on to electrically couple the plurality of data lines 104a to each other.
  • the display panel 300 includes a plurality of data line switches 320 disposed between the source driving unit 104 and the plurality of data lines 104a, the control The line 340 is electrically coupled to the control ends of the plurality of data line switches 320, and provides a second signal to the control ends of the plurality of data line switches 320 when the first signal is provided; wherein the a signal and the second signal are different potentials; when the plurality of charge sharing switches 330 are open, the plurality of data line switches 320 are off; when the plurality of charge sharing switches 330 are off, The plurality of data line switches 320 are open.
  • control line 340 is electrically coupled to the control module 310, and the first signal and the second signal are provided by the control module.
  • the control module 310 includes, without limitation, a source driving unit 104, a timing control unit 101, or other control components having output control signals.
  • the display panel 300 includes an inverting unit 350 disposed between the control line 340 and the plurality of data line switches 320, and the control line 340 outputs the The first signal, the inverting unit 350 converts the first signal into the second signal and transmits to the plurality of data line switches 320.
  • the output of the inverting unit 350 simultaneously connects all of the plurality of data line switches 320.
  • each of the plurality of data line switches 320 is coupled to the inverting unit 350.
  • control circuit 340 is electrically coupled to the source driving unit 104, and when the source driving unit 104 obtains the second signal through the control line 340, stopping outputting data to the plurality of pieces Data line 104a.
  • the control circuit 340 includes a selector 360, and the plurality of charge sharing switches 330 are divided into a plurality of switch groups, and an input end of the selector 360 is electrically coupled to the first signal,
  • the output of the selector 360 is connected to a plurality of control lines, the plurality of control lines are electrically coupled to the plurality of switch groups, and the selector 360 adjusts the plurality according to the first signal. Controlling the potential of the line to control the opening and closing of the plurality of switch groups.
  • the plurality of control lines include a first control line 341 and a second control line 342, the plurality of switch groups including a first switch group and a second switch group, the first switch The group includes an odd-numbered sequence of charge-sharing switches 330, the second group of switches includes an even-numbered charge-sharing switch 330, and the first control line 341 is electrically coupled to the first group of switches.
  • the second control line 342 is electrically coupled to the second switch group.
  • the timing control unit 101 provides a latch signal for source driver (TP) to the source driving unit 104.
  • TP source driver
  • the control module 310 provides a Charge Sharing Signal to the control line 340. At this time, all of the charge share switches 330 are turned on under the control of the charge share signal, causing all of the data lines 104a to form a path.
  • a display panel 300 includes: a first substrate and a second substrate disposed opposite to each other; the first substrate includes a display area 106 and a peripheral wiring area 109 thereof, and the display area 106 includes a plurality of scan lines 105a, a plurality of data lines 104a, a plurality of active switches T and a plurality of pixel units P, wherein the plurality of pixel units P are respectively coupled to the plurality of active switches T, the plurality of active switches T Electrically coupled between the plurality of scan lines 105a and the plurality of data lines 104a; the source driving unit 104 is electrically coupled to the plurality of data lines 104a; and the plurality of charge sharing switches 330 are disposed.
  • the inverting unit 350 transmits the first letter To the control terminals of the plurality of charge sharing switches 330, the plurality of charge sharing switches 330 are turned on, the plurality of data lines 104a are electrically coupled to each other and the voltages on the plurality of data lines 104a Zero or adjacent to zero; the inverting unit 350 takes the first signal to generate and transmit a second signal to the control terminals of the plurality of data line switches 320 to turn off the plurality of data line switches 320.
  • a display device includes: a control module 310; a display panel 300 including: a first substrate and a second substrate disposed oppositely; the first substrate includes a display area 106 and a periphery thereof a wiring area 109, the display area 106 includes a plurality of scanning lines 105a, a plurality of data lines 104a, a plurality of active switches T and a plurality of pixel units P, wherein the plurality of pixel units P are respectively coupled to the plurality of active units a switch T, the plurality of active switches T are electrically coupled between the plurality of scan lines 105a and the plurality of data lines 104a, and the source driving unit 104 is electrically coupled to the plurality of data lines a plurality of charge sharing switches 330 are disposed between the plurality of data lines 104a; a control circuit 340 electrically coupled to the control terminals of the plurality of charge sharing switches 330 and the control module 310; The control module 310 provides a first signal to
  • This application can not significantly change the existing production process, moderately adjust the charge sharing circuit, make the data line connect all the data lines before polarity switching, make all data lines simultaneously charge sharing, effectively neutralize the voltage of the data line, and speed up the data.
  • the charge on the line and the voltage on the data line are zero or close to zero, which also improves the charging efficiency.
  • the process is not required to be greatly adjusted, the original process requirements and product costs can be maintained.
  • the display panel of the present application may be, for example, a liquid crystal display panel, but is not limited thereto, and may also be an OLED display panel, a W-OLED display panel, a QLED display panel, a plasma display panel, and a curved surface. Display panel or other type of display panel.

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Abstract

一种显示面板(300)及其显示装置(200)。显示面板(300)包括:基板,其显示区(106)包括多条扫描线(105a)、多条数据线(104a)、多个主动开关(T)与多个像素单元(P),多个像素单元(P)分别耦接于多个主动开关(T),多个主动开关(T)分别电性耦接于多条扫描线(105a)与多条数据线(104a)之间;源极驱动单元(104),电性耦接多条数据线(104a);多个电荷共享开关(330),设置于多条数据线(104a)之间;控制线路(340),电性耦接多个电荷共享开关(330)的控制端;其中,控制线路(340)传输第一信号至多个电荷共享开关(330)的控制端,令多个电荷共享开关(330)被打开,使多条数据线(104a)相互电性耦接。将所有数据线(104a)之间设置开关(330),并在画面切换时使数据线(104a)形成通路,形成所有数据线(104a)同时电荷共享,以提升充电效率并改善画质。

Description

显示面板及其显示装置 技术领域
本申请涉及一种显示技术领域,特别涉及一种显示面板及其显示装置。
背景技术
TFT-LCD(主动开关-液晶显示器)面板正常显示时,需要栅级驱动线路(Gate Driver)、源极驱动线路(Source Driver),结合基板上纵横交错的扫描线(Gate line)、数据线(Data line)以控制各个像素,实现图像的显示。
显示器驱动方式包括:系统主板将颜色(例如:R/G/B)压缩信号、控制信号及电源传输至控制板。信号经过控制板上的时序控制器(Timing Controller,TCON)处理后,传输至印刷电路板的源极电路及栅极电路,通过基板上的扫描线、数据线、电源等线路,将必要性的数据与电源传输于显示区,从而使得显示器获得呈现画面需求的电源、信号。
正常情况下,源极驱动线路的输出端与显示区的像素单元是连通的,数据可以直接写入面板中。但是,由于面板内存在寄生电容与寄生电阻,因此源极驱动线路输出的数据信号不仅需要给液晶电容充电,还需给寄生电阻及寄生电容充电。这样不仅会降低面板充电效率还会增加充电时间,降低画面品质。现有技术中,是以每两条数据线为组,在某个特定时间段将同组数据线相连,数据线上寄生电容电阻上的电荷就会进行中和。但此仅适用于同一行上两列像素的数据电压极性相反的情况,若两列数据极性一样时,电荷共享之后两列数据线上寄生电容电阻的电压值是两个电压的平均值,与零电压相差太远,不利于下一行数据的写入。
发明内容
为了解决上述技术问题,本申请的目的在于,提供一种显示面板及其显示装置,通过连通所有数据线,使所有数据线同时进行电荷共享,有效中和数据线的电压,提升充电效率。
本申请的目的及解决其技术问题是采用以下技术方案来实现的。依据本申请提出的一种显示面板,所述显示面板,包括:相对设置的第一基板与第二基板;所述第一基板包括显示区及其外围的布线区,所述显示区包括多条扫描线、多条数据线、多个主动开关与多个像素单元,所述多个像素单元分别耦接于所述多个主动开关,所述多个主动开关分别电性耦接于所述多条扫描线与所述多条数据线之间;源极驱动单元,电性耦接所述多条数据线;多个电荷共享开关,设置于所述多条数据线之间;控制线路,电性耦接所述多个电荷共享开关的控制端;其中,所述控制线路传输第一信号至所述多个电荷共享开关的控制端,令所述多个电荷共享开关被打开,使所述多条数据线相互电性 耦接。
本申请解决其技术问题还可采用以下技术措施进一步实现。
在本申请的一实施例中,还包括多个数据线开关,设置于所述源极驱动单元与所述多条数据线之间,所述控制线路电性耦接所述多个数据线开关的控制端,并在提供所述第一信号时,提供第二信号予所述多个数据线开关的控制端;其中,所述第一信号与所述第二信号为相异电位;所述多个电荷共享开关为打开时,所述多个数据线开关为关闭;所述多个电荷共享开关为关闭时,所述多个数据线开关为打开。
在本申请的一实施例中,还包括反相单元,所述反相单元设置在所述控制线路与所述多个数据线开关之间,所述控制线路输出所述第一信号,所述反相单元将所述第一信号转换为所述第二信号,传输至所述多个数据线开关。
在本申请的一实施例中,所述反相单元的输出端同时连接所有的所述多个数据线开关。
在本申请的一实施例中,所述多个数据线开关中的每一者皆连接所述反相单元。
在本申请的一实施例中,所述控制线路电性耦接所述源极驱动单元,所述源极驱动单元通过所述控制线路取得第二信号时,停止输出数据至所述多条数据线。
在本申请的一实施例中,所述控制线路包括选择器,所述多个电荷共享开关区分为多个开关群组,所述选择器的输入端电性耦接所述第一信号,所述选择器的输出端连接多个控制线,所述多个控制线分别电性耦接所述多个开关群组,所述选择器依据所述第一信号以调整所述多个控制线的电位,以控制所述多个开关群组的开启与关闭。
在本申请的一实施例中,所述多条控制线包括第一控制线与第二控制线,所述多个开关群组包括第一开关群组与第二开关群组,所述第一开关群组包括第奇数顺序的电荷共享开关,所述第二开关群组包括第偶数顺序的电荷共享开关,所述第一控制线电性耦接至所述第一开关群组,所述第二控制线电性耦接至所述第二开关群组。
本申请的另一目的为一种显示面板,其包括:相对设置的第一基板与第二基板;所述第一基板包括显示区及其外围的布线区,所述显示区包括多条扫描线、多条数据线、多个主动开关与多个像素单元,所述多个像素单元分别耦接于所述多个主动开关,所述多个主动开关分别电性耦接于所述多条扫描线与所述多条数据线之间;源极驱动单元,电性耦接所述多条数据线;多个电荷共享开关,设置于所述多条数据线之间;多个数据线开关,设置于所述源极驱动单元与所述多条数据线之间;控制线路,电性耦接所述多个电荷共享开关的控制端;反相单元,所述反相单元的输出端电性耦接所述多个数据线开关的控制端,所述反相单元的输入端电性耦接所述控制线路;其中,所述控制线路传输第一信号至所述多个电荷共享开关的控制端,令所述多个电荷共享开关被打开,使所述多条 数据线相互电性耦接并所述多条数据线上的电压为零或邻近为零;所述反相单元取得所述第一信号以产生及传输第二信号至所述多个数据线开关的控制端,以关闭所述多个数据线开关。
本申请的又一目的为一种显示装置,其包括:控制模块;显示面板,包括:相对设置的第一基板与第二基板;所述第一基板包括显示区及其外围的布线区,所述显示区包括多条扫描线、多条数据线、多个主动开关与多个像素单元,所述多个像素单元分别耦接于所述多个主动开关,所述多个主动开关分别电性耦接于所述多条扫描线与所述多条数据线之间;源极驱动单元,电性耦接所述多条数据线;多个电荷共享开关,设置于所述多条数据线之间;控制线路,电性耦接所述多个电荷共享开关的控制端与所述控制模块;其中,所述控制模块提供第一信号至所述多个电荷共享开关的控制端,令所述多个电荷共享开关被打开,使所述多条数据线相互电性耦接。
本申请可以不大幅改变现有生产流程,适度调整电荷共享线路,使数据线在极性转换前,连通所有数据线,使所有数据线同时进行电荷共享,有效中和数据线的电压,加快数据线上的电荷,并使数据线上的电压为零或趋近零,亦较能提升充电效率。而且,因无需大幅调整制程,故较能维持原制程需求和产品成本。
附图说明
图1a为范例性的显示装置的架构示意图。
图1b为范例性的像素单元配置示意图。
图1c为范例性的源极驱动线路的等效电路示意图。
图1d为范例性的源极驱动线路的控制信号波形图。
图2a为显示依据本申请的方法,一实施例应用于显示面板的源极驱动线路的等效电路示意图。
图2b为显示依据本申请的方法,一实施例应用于显示面板的源极驱动线路的等效电路示意图。
图2c为显示依据本申请的方法,一实施例应用于显示面板的源极驱动线路的等效电路示意图。
图2d为显示依据本申请的方法,一实施例应用于显示面板的源极驱动线路的等效电路示意图。
图3为显示依据本申请的方法,一实施例应用于显示面板的源极驱动线路的控制信号波形图。
具体实施方式
以下各实施例的说明是参考附加的图式,用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语,例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本申请,而非用以限制本申请。
附图和说明被认为在本质上是示出性的,而不是限制性的。在图中,结构相似的单元是以相同标号表示。另外,为了理解和便于描述,附图中示出的每个组件的尺寸和厚度是任意示出的,但是本申请不限于此。
在附图中,为了清晰起见,夸大了层、膜、面板、区域等的厚度。在附图中,为了理解和便于描述,夸大了一些层和区域的厚度。将理解的是,当例如层、膜、区域或基底的组件被称作“在”另一组件“上”时,所述组件可以直接在所述另一组件上,或者也可以存在中间组件。
另外,在说明书中,除非明确地描述为相反的,否则词语“包括”将被理解为意指包括所述组件,但是不排除任何其它组件。此外,在说明书中,“在......上”意指位于目标组件上方或者下方,而不意指必须位于基于重力方向的顶部上。
为更进一步阐述本申请为达成预定发明目的所采取的技术手段及功效,以下结合附图及具体的实施例,对依据本申请提出的一种驱动装置,其具体实施方式、结构、特征及其功效,详细说明如后。
图1a为范例性的显示装置的架构示意图。请参照图1a,一种显示装置200,包括:控制板100,所述控制板100包括时序模块(Timing Controller,TCON)101;印刷电路板103,与所述控制板100之间通过柔性扁平电缆(Flexible Flat Cable,FFC)102相连接;源极驱动单元104与栅极驱动单元105配置于布线区109,分别与显示区106内的数据线104a及扫描线105a连接。在一些实施例中,栅极驱动单元105及源极驱动单元104包括但不限制为覆晶薄膜形式。
显示装置200的驱动方式包括:系统主板提供颜色(例如:R/G/B)压缩信号、控制信号及电源传输至控制板100。控制板100上的时序控制器(Timing Controller,TCON)101与处理此等信号后,连同被驱动电路处理的电源,通过柔性扁平电缆(Flexible Flat Cable,FFC)102,一并传输至印刷电路板103的栅极驱动单元105及源极驱动单元104,栅极驱动单元105及源极驱动单元104将必要性的数据与电源传输于显示区106,从而使得显示装置200获得呈现画面需求的电源、信号。
图1b为范例性的像素单元配置示意图。请配合图1a以利于了解。栅极驱动单元105是逐行提供扫描信号给扫描线105a,每一扫描周期提供扫描信号给一行扫描线105a。显示面板的数据线104a会被逐行打开,源极驱动单元104通过数据线104a提供数据至像素单元P。
图1c为范例性的源极驱动线路的等效电路示意图。请配合图1a及图1b以利于了解。源极驱动单元104连接数据线104a,源极驱动单元104的数据输出端设置有数据线开关320。数据线104a两两为一组,每组数据线104a之间设置有电荷共享开关330。控制模块310通过控制线路340电性耦接至电荷共享开关330及数据线开关320的控制端。反相单元350设置于控制线路340上,并介于数据线开关320与控制模块310之间。控制模块310不以此为限的包括:源极驱动单元104、时序控制单元101或其它具输出控制信号的控制组件。其中,数据线104a存在寄生电容C与寄生电阻R。
图1d为范例性的源极驱动线路的控制信号波形图。请配合图1a至图1c以利于了解。时序控 制单元提供锁存信号(latch signal for source driver,简称TP)至源极驱动单元104a。当锁存信号为高电平时,源极驱动单元104a不会有数据输出。控制模块310会提供电荷共享信号(Charge Sharing Signal)至控制线路340。此时,电荷共享开关330受电荷共享信号控制而被打开,使相邻两条数据线104a就会连接在一起。在电荷共享周期(CS cycle)内(即锁存信号为高电平期间),相邻两条数据线104a进行电荷中和,此两条数据线的信号波形即如图1d所示。当锁存信号转为低电平时,源极驱动单元104即输出数据信号,以进行下一行像素单元P的充电。
然而,此方式只适合于相邻两条数据线104a的数据极性相反的情况。如果相邻两条数据线104a的数据极性为相反,寄生电容C与寄生电阻R上的电压极性也会相反,进行电荷共享时,相邻两条数据线104a上寄生电容C与寄生电阻R的电压即能被中和至接近零的数值,有利于下一行像素单元P的数据电压的写入。反之,若相邻两条数据线104a的数据极性一样,那么电荷共享之后,相邻两条数据线104a上寄生电容C与寄生电阻R的电压值是成组电压的平均值,与零电压相差太远,不利于下一行像素单元P的写入。
图2a为显示依据本申请的方法,一实施例应用于显示面板的源极驱动线路的等效电路示意图。现有技术的显示装置相关组件请同时配合图1a至图1d以利于理解。请参阅图2a,在本申请一实施例中,所述一种显示面板300,包括:相对设置的第一基板与第二基板;所述第一基板包括显示区106及其外围的布线区109,所述显示区106包括多条扫描线05a、多条数据线104a、多个主动开关T与多个像素单元P,所述多个像素单元P分别耦接于所述多个主动开关T,所述多个主动开关T分别电性耦接于所述多条扫描线105a与所述多条数据线104a之间;源极驱动单元104,电性耦接所述多条数据线104a;多个电荷共享开关330,设置于所述多条数据线104a之间;控制线路340,电性耦接所述多个电荷共享开关330的控制端;其中,所述控制线路340传输第一信号至所述多个电荷共享开关330的控制端,令所述多个电荷共享开关330被打开,使所述多条数据线104a相互电性耦接。
在一些实施例中,所述显示面板300包括多个数据线开关320,所述多个数据线开关320设置于所述源极驱动单元104与所述多条数据线104a之间,所述控制线路340电性耦接所述多个数据线开关320的控制端,并在提供所述第一信号时,提供第二信号予所述多个数据线开关320的控制端;其中,所述第一信号与所述第二信号为相异电位;所述多个电荷共享开关330为打开时,所述多个数据线开关320为关闭;所述多个电荷共享开关330为关闭时,所述多个数据线开关320为打开。
在一些实施例中,所述控制线路340电性耦接至控制模块310,所述第一信号与所述第二信号由所述控制模块所提供。所述控制模块310不以此为限的包括:源极驱动单元104、时序控制单元 101或其它具输出控制信号的控制组件。
图2b为显示依据本申请的方法,一实施例应用于显示面板的源极驱动线路的等效电路示意图。在一些实施例中,所述显示面板300包括反相单元350,所述反相单元350设置在所述控制线路340与所述多个数据线开关320之间,所述控制线路340输出所述第一信号,所述反相单元350将所述第一信号转换为所述第二信号,传输至所述多个数据线开关320。
在一些实施例中,所述反相单元350的输出端同时连接所有的所述多个数据线开关320。
图2c为显示依据本申请的方法,一实施例应用于显示面板的源极驱动线路的等效电路示意图。在一些实施例中,所述多个数据线开关320中的每一者皆连接所述反相单元350。
在一些实施例中,所述控制线路340电性耦接所述源极驱动单元104,所述源极驱动单元104通过所述控制线路340取得第二信号时,停止输出数据至所述多条数据线104a。
图2d为显示依据本申请的方法,一实施例应用于显示面板的源极驱动线路的等效电路示意图。在一些实施例中,所述控制线路340包括选择器360,所述多个电荷共享开关330区分为多个开关群组,所述选择器360的输入端电性耦接所述第一信号,所述选择器360的输出端连接多个控制线,所述多个控制线分别电性耦接所述多个开关群组,所述选择器360依据所述第一信号以调整所述多个控制线的电位,以控制所述多个开关群组的开启与关闭。
在一些实施例中,所述多条控制线包括第一控制线341与第二控制线342,所述多个开关群组包括第一开关群组与第二开关群组,所述第一开关群组包括第奇数顺序的电荷共享开关330,所述第二开关群组包括第偶数顺序的电荷共享开关330,所述第一控制线341电性耦接至所述第一开关群组,所述第二控制线342电性耦接至所述第二开关群组。
图3为显示依据本申请的方法,一实施例应用于显示面板的源极驱动线路的控制信号波形图。时序控制单元101提供锁存信号至(latch signal for source driver,简称TP)至源极驱动单元104。当锁存信号为高电平时,源极驱动单元104不会有数据输出。控制模块310会提供电荷共享信号(Charge Sharing Signal)至控制线路340。此时,所有的电荷共享开关330受电荷共享信号控制而被打开,使所有的数据线104a形成通路。即在电荷共享周期(CS cycle)内(即锁存信号为高电平期间),所有数据线104a会共同进行电荷中和,两相邻数据线104a的信号波形即如图3所示。与图1d相较(图3中的虚线部分为图1d所示波形),每条数据线104a进行电荷共享而形成电荷中和的效应会更加快速,以在更短时间内使每条数据线104a的电压皆被调整至零电压或接近电零电压。
在本申请一实施例中,一种显示面板300,包括:相对设置的第一基板与第二基板;所述第一基板包括显示区106及其外围的布线区109,所述显示区106包括多条扫描线105a、多条数据线104a、多个主动开关T与多个像素单元P,所述多个像素单元P分别耦接于所述多个主动开关T, 所述多个主动开关T分别电性耦接于所述多条扫描线105a与所述多条数据线104a之间;源极驱动单元104,电性耦接所述多条数据线104a;多个电荷共享开关330,设置于所述多条数据线104a之间;多个数据线开关320,设置于所述源极驱动单元104与所述多条数据线104a之间;控制线路340,电性耦接所述多个电荷共享开关330的控制端;反相单元350,所述反相单元350的输出端电性耦接所述多个数据线开关320的控制端,所述反相单元350的输入端电性耦接所述控制线路340;其中,所述控制线路340传输第一信号至所述多个电荷共享开关330的控制端,令所述多个电荷共享开关330被打开,使所述多条数据线104a相互电性耦接并所述多条数据线104a上的电压为零或邻近为零;所述反相单元350取得所述第一信号以产生及传输第二信号至所述多个数据线开关320的控制端,以关闭所述多个数据线开关320。
在本申请一实施例中,一种显示装置,其包括:控制模块310;显示面板300,包括:相对设置的第一基板与第二基板;所述第一基板包括显示区106及其外围的布线区109,所述显示区106包括多条扫描线105a、多条数据线104a、多个主动开关T与多个像素单元P,所述多个像素单元P分别耦接于所述多个主动开关T,所述多个主动开关T分别电性耦接于所述多条扫描线105a与所述多条数据线104a之间;源极驱动单元104,电性耦接所述多条数据线104a;多个电荷共享开关330,设置于所述多条数据线104a之间;控制线路340,电性耦接所述多个电荷共享开关330的控制端与所述控制模块310;其中,所述控制模块310提供第一信号至所述多个电荷共享开关330的控制端,令所述多个电荷共享开关330被打开,使所述多条数据线104a相互电性耦接。
本申请可以不大幅改变现有生产流程,适度调整电荷共享线路,使数据线在极性转换前,连通所有数据线,使所有数据线同时进行电荷共享,有效中和数据线的电压,加快数据线上的电荷,并使数据线上的电压为零或趋近零,亦较能提升充电效率。而且,因无需大幅调整制程,故较能维持原制程需求和产品成本。
在某些实施例中,本申请所述显示面板可例如为液晶显示面板,然不限于此,其亦可为OLED显示面板,W-OLED显示面板,QLED显示面板,等离子体显示面板,曲面型显示面板或其他类型显示面板。
“在一些实施例中”及“在各种实施例中”等用语被重复地使用。此用语通常不是指相同的实施例;但它也可以是指相同的实施例。“包含”、“具有”及“包括”等用词是同义词,除非其前后文意显示出其它意思。
以上所述,仅是本申请具体的实施例而已,并非对本申请作任何形式上的限制,虽然本申请已以具体的实施例揭露如上,然而并非用以限定本申请,任何熟悉本专业的技术人员,在不脱离本申请技术方案范围内,当可利用上述揭示的技术内容作出些许更动或修饰为等同变化的等效实施例, 但凡是未脱离本申请技术方案的内容,依据本申请的技术实质对以上实施例所作的任何简单修改、等同变化与修饰,均仍属于本申请技术方案的范围内。

Claims (20)

  1. 一种显示面板,包括:
    相对设置的第一基板与第二基板;
    所述第一基板包括显示区及其外围的布线区,所述显示区包括多条扫描线、多条数据线、多个主动开关与多个像素单元,所述多个像素单元分别耦接于所述多个主动开关,所述多个主动开关分别电性耦接于所述多条扫描线与所述多条数据线之间;
    源极驱动单元,电性耦接所述多条数据线;
    多个电荷共享开关,设置于所述多条数据线之间;
    控制线路,电性耦接所述多个电荷共享开关的控制端;
    其中,所述控制线路传输第一信号至所述多个电荷共享开关的控制端,令所述多个电荷共享开关被打开,使所述多条数据线相互电性耦接。
  2. 如权利要求1所述的显示面板,还包括:
    多个数据线开关,设置于所述源极驱动单元与所述多条数据线之间,所述控制线路电性耦接所述多个数据线开关的控制端,并在提供所述第一信号时,提供第二信号予所述多个数据线开关的控制端;
    其中,所述第一信号与所述第二信号为相异电位;
    所述多个电荷共享开关为打开时,所述多个数据线开关为关闭;
    所述多个电荷共享开关为关闭时,所述多个数据线开关为打开。
  3. 如权利要求2所述的显示面板,还包括反相单元,所述反相单元设置在所述控制线路与所述多个数据线开关之间,所述控制线路输出所述第一信号,所述反相单元将所述第一信号转换为所述第二信号,传输至所述多个数据线开关。
  4. 如权利要求3所述的显示面板,其中,所述反相单元的输出端同时连接所有的所述多个数据线开关。
  5. 如权利要求3所述的显示面板,其中,所述多个数据线开关中的每一者皆连接所述反相单元。
  6. 如权利要求1所述的显示面板,其中,所述控制线路电性耦接所述源极驱动单元。
  7. 如权利要求6所述的显示面板,其中,所述源极驱动单元通过所述控制线路取得第二信号时,停止输出数据至所述多条数据线。
  8. 如权利要求1所述的显示面板,所述控制线路包括选择器。
  9. 如权利要求8所述的显示面板,其中,所述多个电荷共享开关区分为多个开关群组,所述选择器的输入端电性耦接所述第一信号,所述选择器的输出端连接多个控制线,所述多个控制线分 别电性耦接所述多个开关群组,所述选择器依据所述第一信号以调整所述多个控制线的电位,以控制所述多个开关群组的开启与关闭。
  10. 如权利要求9所述的显示面板,其中,所述多条控制线包括第一控制线与第二控制线,所述多个开关群组包括第一开关群组与第二开关群组,所述第一开关群组包括第奇数顺序的电荷共享开关,所述第二开关群组包括第偶数顺序的电荷共享开关,所述第一控制线电性耦接至所述第一开关群组,所述第二控制线电性耦接至所述第二开关群组。
  11. 一种显示面板,包括:
    相对设置的第一基板与第二基板;
    所述第一基板包括显示区及其外围的布线区,所述显示区包括多条扫描线、多条数据线、多个主动开关与多个像素单元,所述多个像素单元分别耦接于所述多个主动开关,所述多个主动开关分别电性耦接于所述多条扫描线与所述多条数据线之间;
    源极驱动单元,电性耦接所述多条数据线;
    多个电荷共享开关,设置于所述多条数据线之间;
    多个数据线开关,设置于所述源极驱动单元与所述多条数据线之间;
    控制线路,电性耦接所述多个电荷共享开关的控制端;
    反相单元,所述反相单元的输出端电性耦接所述多个数据线开关的控制端,所述反相单元的输入端电性耦接所述控制线路;
    其中,所述控制线路传输第一信号至所述多个电荷共享开关的控制端,令所述多个电荷共享开关被打开,使所述多条数据线相互电性耦接并所述多条数据线上的电压为零或邻近为零;所述反相单元取得所述第一信号以产生及传输第二信号至所述多个数据线开关的控制端,以关闭所述多个数据线开关。
  12. 一种显示装置,包括:
    控制模块;
    显示面板,包括:
    相对设置的第一基板与第二基板;
    所述第一基板包括显示区及其外围的布线区,所述显示区包括多条扫描线、多条数据线、多个主动开关与多个像素单元,所述多个像素单元分别耦接于所述多个主动开关,所述多个主动开关分别电性耦接于所述多条扫描线与所述多条数据线之间;
    源极驱动单元,电性耦接所述多条数据线;
    多个电荷共享开关,设置于所述多条数据线之间;
    控制线路,电性耦接所述多个电荷共享开关的控制端与所述控制模块;
    其中,所述控制模块提供第一信号至所述多个电荷共享开关的控制端,令所述多个电荷共享开关被打开,使所述多条数据线相互电性耦接。
  13. 如权利要求12所述的显示装置,还包括:
    多个数据线开关,设置于所述源极驱动单元与所述多条数据线之间,所述控制线路电性耦接所述多个数据线开关的控制端,并在提供所述第一信号时,提供第二信号予所述多个数据线开关的控制端;
    其中,所述第一信号与所述第二信号为相异电位;
    所述多个电荷共享开关为打开时,所述多个数据线开关为关闭;
    所述多个电荷共享开关为关闭时,所述多个数据线开关为打开。
  14. 如权利要求13所述的显示装置,还包括反相单元,所述反相单元设置在所述控制线路与所述多个数据线开关之间,所述控制线路输出所述第一信号,所述反相单元将所述第一信号转换为所述第二信号,传输至所述多个数据线开关。
  15. 如权利要求14所述的显示装置,其中,所述反相单元的输出端同时连接所有的所述多个数据线开关。
  16. 如权利要求14所述的显示装置,其中,所述多个数据线开关中的每一者皆连接所述反相单元。
  17. 如权利要求12所述的显示装置,其中,所述控制线路电性耦接所述源极驱动单元。
  18. 如权利要求17所述的显示装置,其中,所述源极驱动单元通过所述控制线路取得第二信号时,停止输出数据至所述多条数据线。
  19. 如权利要求12所述的显示装置,所述控制线路包括选择器。
  20. 如权利要求19所述的显示装置,其中,所述多个电荷共享开关区分为多个开关群组,所述选择器的输入端电性耦接所述第一信号,所述选择器的输出端连接多个控制线,所述多个控制线分别电性耦接所述多个开关群组,所述选择器依据所述第一信号以调整所述多个控制线的电位,以控制所述多个开关群组的开启与关闭。
PCT/CN2017/117340 2017-09-26 2017-12-20 显示面板及其显示装置 WO2019061880A1 (zh)

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108615509B (zh) 2018-05-07 2022-07-19 京东方科技集团股份有限公司 显示装置及其驱动方法
CN110459182A (zh) * 2019-06-11 2019-11-15 惠科股份有限公司 一种显示面板的电荷分享电路、方法和显示面板
CN110164396B (zh) * 2019-06-12 2021-09-03 京东方科技集团股份有限公司 一种显示面板及其驱动方法、显示装置
CN112581910A (zh) * 2019-09-29 2021-03-30 上海和辉光电有限公司 一种阵列基板、显示面板以及显示方法
CN114023244B (zh) * 2021-11-29 2023-12-29 Tcl华星光电技术有限公司 一种goa驱动电路、显示面板及显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101512628A (zh) * 2006-11-02 2009-08-19 夏普株式会社 有源矩阵基板及具备该有源矩阵基板的显示装置
CN101872595A (zh) * 2009-04-21 2010-10-27 瑞萨电子株式会社 驱动器和使用该驱动器的显示设备
CN102184700A (zh) * 2010-12-17 2011-09-14 友达光电股份有限公司 源极驱动电路、显示器与其操作方法
KR20120069315A (ko) * 2010-12-20 2012-06-28 엘지디스플레이 주식회사 입체 영상 표시장치와 그 구동 방법
US20130207958A1 (en) * 2006-12-11 2013-08-15 Samsung Display Co., Ltd. Data driver and liquid crystal display device using the same
CN103366660A (zh) * 2012-03-27 2013-10-23 瀚宇彩晶股份有限公司 显示面板及其电荷分享方法
US20140232627A1 (en) * 2009-01-23 2014-08-21 Novatek Microelectronics Corp. Driving Device For Driving Liquid Crystal Display Device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140127666A (ko) * 2013-04-25 2014-11-04 주식회사 실리콘웍스 디스플레이 구동회로 및 디스플레이 장치
KR102131874B1 (ko) * 2013-11-04 2020-07-09 삼성디스플레이 주식회사 액정 표시 장치 및 그 구동 방법

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101512628A (zh) * 2006-11-02 2009-08-19 夏普株式会社 有源矩阵基板及具备该有源矩阵基板的显示装置
US20130207958A1 (en) * 2006-12-11 2013-08-15 Samsung Display Co., Ltd. Data driver and liquid crystal display device using the same
US20140232627A1 (en) * 2009-01-23 2014-08-21 Novatek Microelectronics Corp. Driving Device For Driving Liquid Crystal Display Device
CN101872595A (zh) * 2009-04-21 2010-10-27 瑞萨电子株式会社 驱动器和使用该驱动器的显示设备
CN102184700A (zh) * 2010-12-17 2011-09-14 友达光电股份有限公司 源极驱动电路、显示器与其操作方法
KR20120069315A (ko) * 2010-12-20 2012-06-28 엘지디스플레이 주식회사 입체 영상 표시장치와 그 구동 방법
CN103366660A (zh) * 2012-03-27 2013-10-23 瀚宇彩晶股份有限公司 显示面板及其电荷分享方法

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