WO2019000242A1 - 微波器件结构及其实现方法 - Google Patents

微波器件结构及其实现方法 Download PDF

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Publication number
WO2019000242A1
WO2019000242A1 PCT/CN2017/090416 CN2017090416W WO2019000242A1 WO 2019000242 A1 WO2019000242 A1 WO 2019000242A1 CN 2017090416 W CN2017090416 W CN 2017090416W WO 2019000242 A1 WO2019000242 A1 WO 2019000242A1
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Prior art keywords
integrated waveguide
substrate integrated
microstrip line
mode
boundary
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PCT/CN2017/090416
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English (en)
French (fr)
Inventor
梅迪
喻鸿飞
罗旭荣
冯昀
朱其玉
Original Assignee
上海诺基亚贝尔股份有限公司
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Priority to CN201780091308.3A priority Critical patent/CN110720159B/zh
Priority to PCT/CN2017/090416 priority patent/WO2019000242A1/zh
Publication of WO2019000242A1 publication Critical patent/WO2019000242A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/20—Frequency-selective devices, e.g. filters
    • H01P1/201—Filters for transverse electromagnetic waves

Definitions

  • the present invention relates to the field of electronic technologies, and in particular, to a microwave device structure and a method for implementing the same.
  • Substrate Integrated Waveguide is a new form of microwave transmission line.
  • the substrate integrated waveguide uses adjacent metallized vias on the dielectric substrate to form a structure similar to a conventional waveguide together with the upper and lower metal faces.
  • the substrate integrated waveguide is a transmission line between the microstrip and the dielectric filled waveguide, which is small in size, easy to integrate, high in power capacity, low in loss, and low in cost.
  • the substrate integrated waveguide combines the advantages of waveguide and microstrip transmission lines to realize a high performance microwave millimeter wave planar circuit.
  • HMSIW Half-Mode Substrate Integrated Waveguides
  • TE mnp modes of electromagnetic waves in the SIW there are various TE mnp modes of electromagnetic waves in the SIW, the so-called TE mnp mode, that is, Transverse Electric mode, where m and n represent the number of half waves distributed along the x direction and the y direction, respectively, and p represents the distribution along the propagation direction z direction.
  • the number of half waves The TE 101 mode is the main mode in the SIW with the lowest cutoff frequency.
  • TE 201 mode such as TE 201 mode, TE 102 mode, TE 202 mode, TE 301 mode, TE 103 mode, and the like.
  • These TE waves reduce the characteristics of the SIW filter.
  • the TE 202 mode has the greatest influence, and its propagation must be suppressed to improve the performance of the filter. Therefore, how to design a SIW that can easily and flexibly suppress the TE 202 mode is a subject worth studying.
  • a microwave device structure and method of implementing the same that is capable of suppressing electromagnetic waves of higher order modes in a substrate integrated waveguide having via boundaries and open boundaries, and preferably for the master mode Transmission has no effect; when the structure is applied to a microwave device such as a substrate integrated waveguide filter, a microwave device capable of achieving high performance can be realized.
  • a microwave device structure comprising a substrate integrated waveguide and a microstrip line, the substrate integrated waveguide including an open boundary of a metal free via and a via boundary having a metal via
  • the first end of the microstrip line is grounded, and the second end of the microstrip line is connected to the open boundary of the substrate integrated waveguide, and the length of the microstrip line is approximately
  • a method of suppressing a high order mode comprising:
  • the first end of the microstrip line is grounded and the second end of the microstrip line is connected to the open boundary of the substrate integrated waveguide.
  • a network device or terminal device in a communication system comprising a microwave device structure as described above.
  • the microwave device structure in accordance with embodiments of the present disclosure is capable of suppressing the electric field of the TE 202 mode and other higher order modes in the substrate integrated waveguide filter, and has substantially no effect on the transmission of the TE 101 mode. Therefore, the device structure can be used in the design of the substrate integrated waveguide filter, so that the filter has excellent band stop performance; at the same time, the structure is easy to implement and control, and can be easily adjusted in the microwave circuit without affecting the overall performance.
  • FIG. 1a-1f show schematic views of a metal top layer pattern of a substrate integrated waveguide in accordance with an embodiment of the present invention.
  • FIGS. 2a and 2b show waveform diagrams of a transmission master mode and a TE 202 mode on a microstrip line, in accordance with an exemplary embodiment of the present invention.
  • FIG 3 is a schematic diagram of a position where a second end of a microstrip line is connected to an open boundary of a rectangular mold half substrate integrated waveguide, in accordance with an exemplary embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a position at which a second end of a microstrip line is connected to an open boundary of a rectangular quarter-mode substrate integrated waveguide, in accordance with an exemplary embodiment of the present invention.
  • 5a and 5b are schematic diagrams of a top metal pattern and a S21 graph of a filter applied in a quarter-mode integrated substrate waveguide filter according to an exemplary embodiment of the present invention.
  • FIG. 6 shows a flow chart of a method of suppressing higher order modes according to an embodiment of the present invention.
  • the microwave device structure of the embodiment of the present invention can be applied to a microwave filter using a substrate integrated waveguide and to a microwave circuit using the microwave device structure.
  • the substrate integrated waveguide is formed on the dielectric substrate by adjacent metallized through holes, and together with the upper and lower metal faces constitute a structure similar to a common waveguide.
  • the resonator of the substrate integrated waveguide includes a metal top layer, a dielectric layer, and a bottom layer.
  • the metal via of the resonator passes through the metal top layer, the dielectric layer and the bottom layer, and the bottom layer is fully metallized to form an electrical ground.
  • Metal through hole, metal top layer and metal bottom layer The metal can be any metal conductor.
  • the dielectric layer material used in the substrate integrated waveguide may be any dielectric material such as a dielectric material of a printed circuit board (PCB), glass, quartz, or an alternative thereof.
  • the microwave device structure using the embodiment of the present invention can be used for a network device or a terminal device in a wireless communication system.
  • a network device in a wireless communication system includes a network device having a wireless transceiver, such as a base station, a mobile station, a relay station, and the like.
  • the term "base station” as used herein may be considered synonymous with and may sometimes be referred to as: Node B, evolved Node B, NodeB, eNodeB, Base Transceiver Station (BTS), Radio Network Control RNC, etc., and may describe a transceiver that communicates with and provides radio resources to a mobile terminal in a wireless communication network that can span multiple technology generations.
  • Terminal devices in a wireless communication system include, but are not limited to, a mobile or fixed terminal including a wireless transceiver, such as a smartphone, tablet, PDA, PC, or the like. It should be noted that the foregoing network device or terminal device is only an example, and other existing or future network devices or terminal devices may be included in the scope of the present invention and may be cited as The way is included here.
  • the substrate integrated waveguide in the microwave device structure of the embodiment of the present invention includes an open boundary of a metal-free via and a via boundary having a metal via.
  • the boundary of the metal top layer pattern of the resonator of the conventional substrate integrated waveguide is a metal via, and the electromagnetic wave is confined in the cavity of the metal via.
  • the ordinary substrate integrated waveguide is divided into two from the intermediate symmetry plane, and the field mode is not changed to form a half-mold substrate integrated waveguide. Therefore, the resonator of the half-mold substrate integrated waveguide has an open boundary without metal via holes and a via boundary having metal via holes.
  • the quarter-mode integrated substrate waveguide is further split on the basis of the half-mold substrate integrated waveguide, thus also having an open boundary without metal vias and a via boundary having metal vias. Going one step further,
  • the eighth-mode substrate integrated waveguide also has open boundaries and via boundaries.
  • the substrate integrated waveguide can be a half mode substrate integrated waveguide, a quarter mode substrate integrated waveguide or an eighth mode substrate integrated waveguide, and other substrate integrated waveguides having open and via boundaries.
  • the above-mentioned half-mold substrate integrated waveguide, quarter-mode integrated substrate integrated waveguide, eighth-mode integrated substrate integrated waveguide, etc. are merely examples, and other existing or future possible include metal-free through holes.
  • the open boundary of the substrate and the substrate-integrated waveguide having the via boundary of the metal via are also intended to be encompassed by the present invention and are incorporated herein by reference.
  • the substrate integrated waveguide comprises a half mode substrate integrated waveguide or a quarter mode integrated substrate integrated waveguide.
  • the substrate integrated waveguide can be any of a half mode substrate integrated waveguide or a quarter mode integrated substrate integrated waveguide. That is, in the microwave device structure of the preferred embodiment of the present invention, the substrate integrated waveguide may be a half mode substrate integrated waveguide; or the substrate integrated waveguide may be a quarter mode substrate integrated waveguide.
  • the shape of the metal top layer pattern of the resonator of the common substrate integrated waveguide may be a circular shape, an elliptical shape, a rectangular shape, a triangular shape composed of metal through holes, or may be a circular shape, a ridge shape or the like which can transmit electromagnetic waves.
  • the shape of the metal top layer pattern of the resonator of the substrate integrated waveguide can be divided by the metal top pattern of the ordinary substrate integrated waveguide.
  • the metal top layer pattern of the substrate integrated waveguide is a shape in which a metal top layer pattern of a common substrate integrated waveguide is cut according to a symmetry plane or cut a plurality of times by a symmetry plane.
  • the metal top layer pattern of the common substrate integrated waveguide is a rectangle
  • the metal top layer pattern of the half mold substrate integrated waveguide after the symmetrical plane cutting may be a rectangle or a triangle; the rectangular half mold substrate integrated waveguide is cut according to the symmetry plane.
  • the quarter-module integrated waveguide can be rectangular.
  • the metal top layer pattern of the common substrate integrated waveguide is circular
  • the metal top layer pattern of the half-mold substrate integrated waveguide after the symmetrical plane cutting may be a semi-circular arc-shaped sector; the semi-circular semi-mold base
  • the quarter-modular integrated waveguide after the chip-integrated waveguide is cut according to the symmetry plane may be a quarter-circle sector.
  • the metal top layer pattern of the substrate integrated waveguide of the present invention is any one of a rectangle, a triangle, and a sector.
  • FIG. 1a, 1b, 1c, 1d, 1e, and 1f are schematic views of a metal top layer pattern of a substrate integrated waveguide in accordance with an embodiment of the present invention.
  • Figure 1a is a rectangular half-mode substrate integrated wave A schematic representation of a metal top layer pattern.
  • Figure 1b is a schematic illustration of a metal top layer pattern of a rectangular quarter-die integrated waveguide.
  • Figure 1c is a schematic illustration of a metal top layer pattern of a triangular mold half substrate integrated waveguide.
  • Figure 1d is a schematic illustration of a metal top layer pattern of a triangular quarter-module integrated waveguide.
  • Figure 1e is a schematic illustration of a metal top layer pattern of a sectored half-mold substrate integrated waveguide.
  • Figure 1f is a schematic illustration of a metal top layer pattern of a sectored quarter-module integrated waveguide.
  • the via boundaries with metal vias and the open boundaries of metal-free vias are shown in Figures 1a, 1b, 1c, 1d, 1e, and 1f, and the shaded portions of the hatched lines indicate metal coverage.
  • the metal top layer pattern of the substrate integrated waveguide shown in FIGS. 1a, 1b, 1c, 1d, 1e, and 1f is merely an example, and the substrate integrated waveguide application of the embodiment of the present invention is applied.
  • the shape or boundary of the metal pattern is adjusted according to the needs of the circuit design.
  • the adjusted substrate integrated waveguide, as applicable to the present invention is also included in the scope of the present invention and is cited by way of reference. Included here.
  • the microstrip line in the microwave device structure of the embodiment of the present invention is a microwave transmission line composed of a single conductor strip supported on a dielectric substrate.
  • the shape, structure and material of the microstrip line are not limited.
  • the microstrip line can be a straight line, or a fold line or a curve; the microstrip line can be a surface type, an embedded structure or the like.
  • the microstrip line includes two endpoints: a first end and a second end.
  • the first end of the microstrip line is grounded.
  • the first end can be grounded in multiple ways, either by directly connecting the first end to a ground plane, by grounding through a metal blind hole, or by connecting to a ground point of a device.
  • the first end is grounded through the metal via.
  • the metal underlayer is a ground layer. Therefore, the manner in which the first end of the microstrip line is grounded through the metal through hole is very simple, easy to implement, and convenient to control the length of the microstrip line, and has little influence on other components.
  • the main mode of the substrate integrated waveguide refers to the TE mode with the lowest cutoff frequency through the substrate integrated waveguide, and the TE 101 mode is the main mode of the substrate integrated waveguide. Since the first end of the microstrip line is grounded, the length of the microstrip line is the wavelength of the main mode Times, so when the main mode is transmitted on the microstrip line, at the second end of the microstrip line is the maximum field strength of the electric field of the main mode, which is equivalent to an open circuit.
  • the length of the microstrip line is the wavelength of the electromagnetic wave. Therefore, the second end of the microstrip line is equivalent to the short contact point of the electromagnetic wave, that is, the second end can be regarded as a virtual ground.
  • the length of the microstrip line is the main Mode wavelength Times, and the first end of the microstrip line is grounded, so the length of the microstrip line is the wavelength of the higher order mode according to a multiple of the frequency between the higher order mode and the main mode
  • the second end of the microstrip line can be regarded as a virtual ground when transmitting the higher order mode.
  • the microstrip line length will be adjusted according to the design requirements, that is, the microstrip line length will be When the length of the main mode wavelength is changed, the length-adjusted microstrip line is applicable to the present invention and is also included in the scope of the present invention and is incorporated herein by reference.
  • the length of the microstrip line is approximately That is, the microstrip line length is one quarter of the wavelength of the microstrip line when the resonant frequency is the dominant mode of the substrate integrated waveguide. At this time, there is not a lot of low-frequency resonance on the microstrip line, which is beneficial to improve and control the overall performance of the microwave device. Therefore, the quarter-wavelength resonant frequency is the microstrip line when the main mode of the substrate integrated waveguide is It is preferably used in the embodiment of the present invention.
  • the second end of the microstrip line is equivalent to an open circuit when transmitting the main mode, and when transmitting a high order mode of 2i times the frequency of the main mode, For example, the TE 202 mode, the second end of the microstrip line can now be seen as grounded.
  • FIG. 2a and 2b show waveform diagrams of a transmission master mode and a TE 202 mode on a microstrip line, in accordance with an exemplary embodiment of the present invention.
  • the main mode is transmitted on the microstrip line
  • the frequency is f 0
  • the wavelength is L 0
  • k 0
  • the resonant frequency is the microstrip line of the substrate integrated waveguide main mode.
  • the first end A1 of the microstrip line 21 is grounded, and the waveform diagram of the main mode transmitted on the microstrip line 21 is as shown in FIG. 2a.
  • the second end B1 is equivalent to an open circuit when the microstrip line 21 transmits the main mode.
  • a microstrip transmission line is twice the frequency of the main mode TE 202 mode, the frequency of the TE 202 mode is 2f 0, the length of the microstrip line 21 corresponds to one of 202 TE is a half wavelength microstrip
  • the waveform of the TE 202 mode transmitted on the line is as shown in Fig. 2b, so the second end B1 is equivalent to ground when the microstrip line 21 transmits the TE 202 mode.
  • the second end of the microstrip line is connected to the open boundary of the substrate integrated waveguide.
  • the angle at which the second end is connected to the open boundary is not limited, and the microstrip line may be connected perpendicularly to the open boundary, or may be formed at any angle after being connected.
  • the second end can be connected to any one of the open boundaries.
  • the length of the microstrip line is the wavelength of the main mode Times, and the first end of the microstrip line is grounded, so when the main mode is transmitted, since the second end of the microstrip line is equivalent to an open circuit at this time, the second end of the microstrip line is connected to the substrate integrated waveguide, The effect of the resonant boundary conditions of the main mode of the integrated waveguide is small.
  • the connection of the second end to the open boundary is equivalent to destroying the resonance boundary condition of these higher-order modes. , the transmission of these higher order modes is suppressed.
  • the suppression effect is the best.
  • the substrate integrated waveguide is a half-mode substrate integrated waveguide
  • the electric field of the TE 404 mode is the strongest at the open boundary of the waveguide at 1/8, 3/8, 5/8, 7/8 of the open boundary.
  • the destruction of the TE 404 mode the resonant boundary conditions preferably, at the same time have little effect on the effect of suppressing the transmission of the TE 404 mode of the master mold.
  • the substrate integrated waveguide is a half mode substrate integrated waveguide, wherein the second end of the microstrip line is on the open boundary and the distance from the via boundary is about one quarter of the length of the open boundary .
  • the distance from the boundary of the via is about one quarter of the length of the open boundary on the open boundary, which is the electric field when the substrate integrated waveguide transmits the TE 202 mode. The strongest place.
  • the second end of the microstrip line is placed in this position, can damage the TE 202 mode the resonant boundary conditions, well inhibit the transmission of the TE 202 mode, while little effect on the resonant boundary conditions of the master mold .
  • FIG. 3 is a schematic diagram of a position where a second end of a microstrip line is connected to an open boundary of a rectangular mold half substrate integrated waveguide, in accordance with an exemplary embodiment of the present invention.
  • the half-mold substrate integrated waveguide in the figure is a rectangular pattern, the length of the open boundary is represented by H, the end point B31 and the end point B32 are the strongest part of the TE 202 mode electric field, and the distance of B31 or B32 from the boundary of the via hole is H of the quarter.
  • the second end of the microstrip line is connected to the open boundary at position B31 or B32 to inhibit transmission of the TE 202 mode. It should be noted that FIG.
  • the TE 202 mode electric field at the open boundary of the substrate integrated waveguide of other metal top layer patterns according to FIG. 3 is a rectangular metal top layer pattern as an example, and those skilled in the art can easily obtain the TE 202 mode electric field at the open boundary of the substrate integrated waveguide of other metal top layer patterns according to FIG. 3 .
  • the position connected to the open boundary is adjusted near the position of the boundary of the via boundary which is approximately one quarter of the length of the open boundary according to the circuit design requirement or the actual use limit, and the position of the second end connected to the open boundary is adjusted. Structures, as applicable to the present invention, are also intended to be included within the scope of the invention and are hereby incorporated by reference.
  • the substrate integrated waveguide is a quarter-mode integrated substrate waveguide, wherein the second end of the microstrip line is on an open boundary and the distance from the via boundary is about the length of the open boundary Half.
  • the distance from the boundary of the via is about one-half of the length of the open boundary, that is, near the midpoint of the open boundary It is the strongest electric field when the substrate integrated waveguide transmits the TE 202 mode.
  • the second end of the microstrip line is placed in this position, the boundary conditions can destroy the resonance mode TE 202, TE 202 well suppressed transmission mode, while little effect on the resonant boundary conditions master mold.
  • FIG. 4 is a schematic diagram of a position at which a second end of a microstrip line is connected to an open boundary of a rectangular quarter-mode substrate integrated waveguide, in accordance with an exemplary embodiment of the present invention.
  • the quarter-module integrated waveguide in the figure is a rectangular pattern.
  • the lengths of the two open boundaries are represented by P and Q.
  • the end points B41 and B42 are the strongest of the TE 202 mode electric field, and the distance of B41 from the boundary of the via is One-half of P, B42 is one-half the distance from the boundary of the via.
  • the second end of the microstrip line is connected to the open boundary at position B41 or B42 to inhibit transmission of the TE 202 mode. It should be noted that FIG.
  • the TE 202 mode electric field at the open boundary of the substrate integrated waveguide of other metal top layer patterns according to FIG. 4 is a rectangular metal top layer pattern as an example, and those skilled in the art can easily obtain the TE 202 mode electric field at the open boundary of the substrate integrated waveguide of other metal top layer patterns according to FIG. 4 .
  • the position connected to the open boundary is adjusted according to the circuit design requirement or the actual use limit, and the position of the second end connected to the open boundary is adjusted when the position of the boundary of the via is about one-half of the length of the open boundary.
  • Device structures, as applicable to the present invention are also intended to be included within the scope of the present invention and are incorporated herein by reference.
  • the number of microstrip lines is not limited.
  • the suppression effect is best when the second end of the microstrip line is connected to the open boundary at the strongest electric field of the higher order mode to be suppressed.
  • the electric field of the TE 404 mode is the strongest, so the second end of the microstrip line can be placed at these positions.
  • the microstrip line comprises one or two microstrip lines.
  • the TE 202 mode of the substrate integrated waveguide has the greatest impact on the design in the microwave device.
  • microwave device structure of the embodiment of the present invention When the microwave device structure of the embodiment of the present invention is applied to a filter design, one or two microstrip lines are used according to the requirements of the design index. A microstrip line is generally used to meet most of the design requirements.
  • FIG. 5a and 5b are schematic diagrams of a top metal pattern and a S21 graph of a filter applied in a quarter-mode integrated substrate waveguide filter according to an exemplary embodiment of the present invention.
  • the upper left includes a quarter-mode integrated substrate waveguide and a microstrip line grounded at one end near the midpoint of an open boundary of the waveguide, which is an implementation of the present invention.
  • Example of the microwave device structure; also in the upper right of FIG. 5a also includes a quarter-mode integrated substrate integrated waveguide and a microstrip line grounded at one end near the midpoint of an open boundary of the waveguide, which is the present invention Microwave device structure of an embodiment.
  • the length of the microstrip line is about one quarter of the wavelength of the microstrip line when the resonant frequency is the main mode of the substrate integrated waveguide, so that the TE 202 mode can be well suppressed.
  • Figure 5b is a comparison of the S21 curve of the filter with the high-order mode suppression structure and the filter without the high-order mode suppression structure. It can be seen from the curve comparison chart that the pass band of the filter is around 8-10 GHz, and the filter with the high-order mode suppression structure has no filter structure compared with the structure. In the vicinity of the 18-20 GHz band, the filter stops. The performance of the belt has been greatly improved.
  • FIG. 6 is a flow diagram of a method of suppressing high order mode in accordance with an embodiment of the present invention.
  • the method of the embodiment of the present invention can be applied to a microwave filter using a substrate integrated waveguide and to a microwave circuit using the microwave device structure.
  • the substrate integrated waveguide is formed on the dielectric substrate by adjacent metallized through holes, and together with the upper and lower metal faces constitute a structure similar to a common waveguide.
  • the resonator of the substrate integrated waveguide includes a metal top layer, a dielectric layer, and a bottom layer. The metal via of the resonator passes through the metal top layer, the dielectric layer and the bottom layer, and the bottom layer is fully metallized to form an electrical ground.
  • the metal used for the metal via, the metal top layer and the metal underlayer may be any metal conductor.
  • the dielectric layer material used in the substrate integrated waveguide may be any dielectric material such as a dielectric material of a printed circuit board (PCB), glass, quartz, or an alternative thereof.
  • a network device in a wireless communication system includes a network device having a wireless transceiver, such as a base station, a mobile station, a relay station, and the like.
  • the term "base station” as used herein may be considered synonymous with and may sometimes be referred to as: Node B, evolved Node B, NodeB, eNodeB, Base Transceiver Station (BTS), Radio Network Control RNC, etc., and may describe a transceiver that communicates with and provides radio resources to a mobile terminal in a wireless communication network that can span multiple technology generations.
  • Terminal devices in a wireless communication system include, but are not limited to, a mobile or fixed terminal including a wireless transceiver, such as a smartphone, tablet, PDA, PC, or the like. It should be noted that the foregoing network device or terminal device is only an example, and other existing or future network devices or terminal devices may be included in the scope of the present invention and may be cited as The way is included here.
  • the substrate integrated waveguide in the method of the embodiment of the present invention includes an open boundary of a metal-free via and a via boundary having a metal via.
  • the boundary of the metal top layer pattern of the resonator of the conventional substrate integrated waveguide is a metal via, and the electromagnetic wave is confined in the cavity of the metal via.
  • the ordinary substrate integrated waveguide is divided into two from the intermediate symmetry plane, and the field mode is not changed to form a half-mold substrate integrated waveguide. Therefore, the resonator of the half-mold substrate integrated waveguide has an open boundary without metal via holes and a via boundary having metal via holes.
  • the quarter-mode integrated waveguide is further split on the basis of the half-mode integrated waveguide, so it also has no metal.
  • the eighth-mode substrate integrated waveguide also has open boundaries and via boundaries.
  • the substrate integrated waveguide can be a half mode substrate integrated waveguide, a quarter mode substrate integrated waveguide or an eighth mode substrate integrated waveguide, and other substrate integrated waveguides having open and via boundaries.
  • the above-mentioned half-mold substrate integrated waveguide, quarter-mode integrated substrate integrated waveguide, eighth-mode integrated substrate integrated waveguide, etc. are merely examples, and other existing or future possible include metal-free through holes.
  • the substrate-integrated waveguides having open boundaries and via-hole boundaries with metal vias, as applicable to the present invention, are also intended to be encompassed by the present invention and are incorporated herein by reference.
  • the substrate integrated waveguide comprises a half mode substrate integrated waveguide or a quarter mode integrated substrate integrated waveguide.
  • the substrate integrated waveguide can be any of a half mode substrate integrated waveguide or a quarter mode integrated substrate integrated waveguide. That is, in the microwave device structure of the preferred embodiment of the present invention, the substrate integrated waveguide may be a half mode substrate integrated waveguide; or the substrate integrated waveguide may be a quarter mode substrate integrated waveguide.
  • the shape of the metal top layer pattern of the resonator of the common substrate integrated waveguide may be a circular shape, an elliptical shape, a rectangular shape, a triangular shape composed of metal through holes, or may be a circular shape, a ridge shape or the like which can transmit electromagnetic waves.
  • the shape of the metal top layer pattern of the resonator of the substrate integrated waveguide can be divided by the metal top pattern of the ordinary substrate integrated waveguide.
  • the metal top layer pattern of the substrate integrated waveguide is a shape in which a metal top layer pattern of a common substrate integrated waveguide is cut according to a symmetry plane or cut a plurality of times by a symmetry plane.
  • the metal top layer pattern of the common substrate integrated waveguide is a rectangle
  • the metal top layer pattern of the half mold substrate integrated waveguide after the symmetrical plane cutting may be a rectangle or a triangle; the rectangular half mold substrate integrated waveguide is cut according to the symmetry plane.
  • the quarter-module integrated waveguide can be rectangular.
  • the metal top layer pattern of the common substrate integrated waveguide is circular
  • the metal top layer pattern of the half-mold substrate integrated waveguide after the symmetrical plane cutting may be a semi-circular arc-shaped sector; the semi-circular semi-mold base
  • the quarter-modular integrated waveguide after the chip-integrated waveguide is cut according to the symmetry plane may be a quarter-circle sector.
  • the metal top layer pattern of the substrate integrated waveguide of the present invention is any one of a rectangle, a triangle, and a sector.
  • FIG. 1a, 1b, 1c, 1d, 1e, and 1f are schematic views of a metal top layer pattern of a substrate integrated waveguide in accordance with an embodiment of the present invention.
  • Figure 1a is a rectangular half-mode substrate integrated wave A schematic representation of a metal top layer pattern.
  • Figure 1b is a schematic illustration of a metal top layer pattern of a rectangular quarter-die integrated waveguide.
  • Figure 1c is a schematic illustration of a metal top layer pattern of a triangular mold half substrate integrated waveguide.
  • Figure 1d is a schematic illustration of a metal top layer pattern of a triangular quarter-module integrated waveguide.
  • Figure 1e is a schematic illustration of a metal top layer pattern of a sectored half-mold substrate integrated waveguide.
  • Figure 1f is a schematic illustration of a metal top layer pattern of a sectored quarter-module integrated waveguide.
  • the via boundaries with metal vias and the open boundaries of metal-free vias are shown in Figures 1a, 1b, 1c, 1d, 1e, and 1f, and the shaded portions of the hatched lines indicate metal coverage.
  • the metal top layer pattern of the substrate integrated waveguide shown in FIGS. 1a, 1b, 1c, 1d, 1e, and 1f is merely an example, and the substrate integrated waveguide application of the embodiment of the present invention is applied.
  • the shape or boundary of the metal pattern is adjusted according to the needs of the circuit design.
  • the adjusted substrate integrated waveguide, as applicable to the present invention is also included in the scope of the present invention and is cited by way of reference. Included here.
  • the microstrip line in the method of the embodiment of the present invention is a microwave transmission line composed of a single conductor strip supported on a dielectric substrate.
  • the shape, structure and material of the microstrip line are not limited.
  • the microstrip line can be a straight line, or a fold line or a curve; the microstrip line can be a surface type, an embedded structure or the like.
  • the microstrip line includes two endpoints: a first end and a second end. In step S61, the first end of the microstrip line is grounded.
  • the first end can be grounded in multiple ways, either by directly connecting the first end to a ground plane, by grounding through a metal blind hole, or by connecting to a ground point of a device.
  • step S61 includes grounding the first end through the metal via.
  • the metal underlayer is a ground layer. Therefore, the manner in which the first end of the microstrip line is grounded through the metal through hole is very simple, easy to implement, and convenient to control the length of the microstrip line, and has little influence on other components.
  • the main mode of the substrate integrated waveguide refers to the TE mode with the lowest cutoff frequency through the substrate integrated waveguide, and the TE 101 mode is the main mode of the substrate integrated waveguide. Since the first end of the microstrip line is grounded, the length of the microstrip line is the wavelength of the main mode Times, so when the main mode is transmitted on the microstrip line, at the second end of the microstrip line is the maximum field strength of the electric field of the main mode, which is equivalent to an open circuit.
  • the length of the microstrip line is the wavelength of the electromagnetic wave. Therefore, the second end of the microstrip line is equivalent to the short contact point of the electromagnetic wave, that is, the second end can be regarded as a virtual ground.
  • the length of the microstrip line is the main Mode wavelength Times, and the first end of the microstrip line is grounded, so the length of the microstrip line is the wavelength of the higher order mode according to a multiple of the frequency between the higher order mode and the main mode
  • the second end of the microstrip line can be regarded as a virtual ground when transmitting the higher order mode.
  • the microstrip line length will be adjusted according to the design requirements, that is, the microstrip line length will be When the length of the main mode wavelength is changed, the length-adjusted microstrip line is applicable to the present invention and is also included in the scope of the present invention and is incorporated herein by reference.
  • the length of the microstrip line is approximately That is, the microstrip line length is one quarter of the wavelength of the microstrip line when the resonant frequency is the dominant mode of the substrate integrated waveguide. At this time, there is not a lot of low-frequency resonance on the microstrip line, which is beneficial to improve and control the overall performance of the microwave device. Therefore, the quarter-wavelength resonant frequency is the microstrip line when the main mode of the substrate integrated waveguide is It is preferably used in the embodiment of the present invention.
  • the second end of the microstrip line is equivalent to an open circuit when transmitting the main mode, and when transmitting a high order mode of 2i times the frequency of the main mode, For example, the TE 202 mode, the second end of the microstrip line can now be seen as grounded.
  • FIG. 2a and 2b show waveform diagrams of a transmission master mode and a TE 202 mode on a microstrip line, in accordance with an exemplary embodiment of the present invention.
  • the main mode is transmitted on the microstrip line
  • the frequency is f 0
  • the wavelength is L 0
  • k 0
  • the frequency is the microstrip line when the substrate is integrated into the main mode of the waveguide.
  • the first end A1 of the microstrip line 21 is grounded, and the waveform diagram of the main mode transmitted on the microstrip line 21 is as shown in FIG. 2a.
  • the second end B1 is equivalent to an open circuit when the microstrip line 21 transmits the main mode.
  • a microstrip transmission line is twice the frequency of the main mode TE 202 mode, the frequency of the TE 202 mode is 2f 0, the length of the microstrip line 21 corresponds to one of 202 TE is a half wavelength microstrip
  • the waveform of the TE 202 mode transmitted on the line is as shown in Fig. 2b, so the second end B1 is equivalent to ground when the microstrip line 21 transmits the TE 202 mode.
  • the second end of the microstrip line is connected to the open boundary of the substrate integrated waveguide.
  • the angle at which the second end is connected to the open boundary is not limited, and the microstrip line may be connected perpendicularly to the open boundary, or may be formed at any angle after being connected.
  • the second end can be connected to any one of the open boundaries. Since the length of the microstrip line is the wavelength of the main mode Times, and the first end of the microstrip line is grounded, so when the main mode is transmitted, since the second end of the microstrip line is equivalent to an open circuit at this time, the second end of the microstrip line is connected to the substrate integrated waveguide, The effect of the resonant boundary conditions of the main mode of the integrated waveguide is small.
  • the connection of the second end to the open boundary is equivalent to destroying the resonance boundary condition of these higher-order modes.
  • the transmission of these higher order modes is suppressed.
  • the position at which the second end is connected to the open boundary is near the position where the electric field of the electromagnetic wave is strongest, the suppression effect is the best.
  • the substrate integrated waveguide is a half-mode substrate integrated waveguide
  • the electric field of the TE 404 mode is the strongest at the open boundary of the waveguide at 1/8, 3/8, 5/8, 7/8 of the open boundary. at the time, the second end is placed in these locations, the destruction of the TE 404 mode the resonant boundary conditions, preferably, at the same time have little effect on the effect of suppressing the transmission of the TE 404 mode of the master mold.
  • the substrate integrated waveguide is a half-mold substrate integrated waveguide
  • step S62 includes: placing the second end of the microstrip line on the open boundary, and the distance from the via boundary is about the length of the open boundary One quarter of the.
  • the distance from the boundary of the via is about one quarter of the length of the open boundary on the open boundary, which is the electric field when the substrate integrated waveguide transmits the TE 202 mode. The strongest place.
  • FIG. 3 is a schematic diagram of a position where a second end of a microstrip line is connected to an open boundary of a rectangular mold half substrate integrated waveguide, in accordance with an exemplary embodiment of the present invention.
  • the half-mold substrate integrated waveguide in the figure is a rectangular pattern, the length of the open boundary is represented by H, the end point B31 and the end point B32 are the strongest part of the TE 202 mode electric field, and the distance of B31 or B32 from the boundary of the via hole is H of the quarter.
  • FIG. 3 is a rectangular metal top layer pattern as an example, and those skilled in the art can easily obtain the TE 202 mode electric field at the open boundary of the substrate integrated waveguide of other metal top layer patterns according to FIG. 3 .
  • the range of locations It should be understood by those skilled in the art that in the practical application, the strongest electric field of the TE 202 mode may change near a quarter of the open boundary, and the second end of the microstrip line is open.
  • the position of the boundary connection is adjusted near the position of the boundary of the via boundary which is about one quarter of the length of the open boundary according to the circuit design requirement or the actual use restriction, and the method after the position adjustment of the second end and the open boundary is as follows.
  • the invention is also intended to be included within the scope of the invention and is hereby incorporated by reference.
  • the substrate integrated waveguide is a quarter-mode integrated substrate waveguide
  • step S62 includes placing the second end of the microstrip line on the open boundary and the distance from the via boundary is approximately One-half the length of the open boundary.
  • the distance from the boundary of the via is about one-half of the length of the open boundary, that is, near the midpoint of the open boundary It is the strongest electric field when the substrate integrated waveguide transmits the TE 202 mode.
  • FIG. 4 is a schematic diagram of a position at which a second end of a microstrip line is connected to an open boundary of a rectangular quarter-mode substrate integrated waveguide, in accordance with an exemplary embodiment of the present invention.
  • the quarter-module integrated waveguide in the figure is a rectangular pattern.
  • the lengths of the two open boundaries are represented by P and Q.
  • the end points B41 and B42 are the strongest of the TE 202 mode electric field, and the distance of B41 from the boundary of the via is One-half of P, B42 is one-half the distance from the boundary of the via.
  • the second end of the microstrip line is connected to the open boundary at position B41 or B42 to inhibit transmission of the TE 202 mode.
  • FIG. 4 is a rectangular metal top layer pattern as an example, and those skilled in the art can easily obtain the TE 202 mode electric field at the open boundary of the substrate integrated waveguide of other metal top layer patterns according to FIG. 4 . The range of locations.
  • the strongest electric field of the TE 202 mode may change near the position of one-half of the open boundary, and the second end of the microstrip line is open.
  • the position of the boundary connection is adjusted according to the circuit design requirement or the actual use limit, and the position after the second end is connected to the open boundary is adjusted when the position of the boundary of the via is about one-half of the length of the open boundary. It is intended to be within the scope of the invention and is intended to be embraced herein.
  • the number of microstrip lines is not limited.
  • the suppression effect is the best.
  • the electric field strength of the TE 404 mode is the largest, so the second end of the microstrip line can be placed at these positions.
  • the microstrip line comprises one or two microstrip lines.
  • the TE 202 mode of the substrate integrated waveguide has the greatest impact on the design in the microwave device.
  • microstrip lines are used according to the requirements of design specifications.
  • a microstrip line is generally used to meet most of the design requirements.
  • FIG. 5a and 5b are schematic diagrams of a top metal pattern and a S21 graph of a filter applied in a quarter-mode integrated substrate waveguide filter according to an exemplary embodiment of the present invention.
  • the upper left includes a quarter-mode integrated substrate waveguide and a microstrip line grounded at one end near the midpoint of an open boundary of the waveguide, which is an implementation of the present invention.
  • Example of the microwave device structure; also in the upper right of FIG. 5a also includes a quarter-mode integrated substrate integrated waveguide and a microstrip line grounded at one end near the midpoint of an open boundary of the waveguide, which is the present invention Microwave device structure of an embodiment.
  • the length of the microstrip line is about one quarter of the wavelength of the microstrip line when the resonant frequency is the main mode of the substrate integrated waveguide, so that the TE202 mode can be well suppressed.
  • Fig. 5b is a comparison of the S21 curve of the filter with the high-order mode suppression structure and the filter without the suppression structure. It can be seen from the curve comparison chart that the pass band of the filter is around 8-10 GHz, and the filter with the high-order mode suppression structure has no filter structure compared with the structure. In the vicinity of the 18-20 GHz band, the filter stops. The performance of the belt has been greatly improved.
  • Clause 3 The microwave device structure of clause 1, wherein the first end is grounded through a metal via.
  • the substrate integrated waveguide comprises a half mode substrate integrated waveguide or a quarter mode integrated substrate integrated waveguide.
  • the substrate integrated waveguide is a half-mold substrate integrated waveguide, wherein a second end of the microstrip line is located on the open boundary, and The distance of the via boundary is about one quarter of the length of the open boundary.
  • Clause 8 The microwave device structure of clause 5, wherein the substrate integrated waveguide is a quarter-mode integrated substrate integrated waveguide, wherein a second end of the microstrip line is on the open boundary, and The distance from the boundary of the via is about one-half the length of the open boundary.
  • Article 9 A method of suppressing higher order modes, including:
  • the first end of the microstrip line is grounded and the second end of the microstrip line is coupled to an open boundary of the substrate integrated waveguide.
  • the first end is grounded through a metal via.
  • the waveguide includes a half mode substrate integrated waveguide or a quarter mode integrated substrate integrated waveguide.
  • the substrate integrated waveguide is a half-mold substrate integrated waveguide, wherein the second end of the microstrip line and the substrate are integrated with an open boundary of the waveguide
  • the connected steps include:
  • a second end of the microstrip line is placed over the open boundary and a distance from the via boundary is about one quarter of the length of the open boundary.
  • a second end of the microstrip line is placed on the open boundary and a distance from the via boundary is about one-half the length of the open boundary.
  • Clause 17 A network device or terminal device in a communication system, comprising the microwave device structure of any one of clauses 1 to 8.

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Abstract

一种实现高次模抑制的微波器件结构及其实现方法，该结构包括基片集成波导和微带线（21），能够在具有过孔边界和开放边界的基片集成波导中抑制高次模，且对主模的传输没有较大影响。该结构可在基片集成波导滤波器中实现优异的止带性能。

Description

微波器件结构及其实现方法 技术领域
本发明涉及电子技术领域，尤其涉及微波器件结构及其实现方法。
背景技术
普通波导的体积大，不易于集成。基片集成波导(Substrate Integrated Waveguide，简称SIW)是一种新的微波传输线形式。基片集成波导在介质基片上用相邻很近的金属化通孔，与上下金属面一起构成类似于普通波导的结构。基片集成波导是介于微带与介质填充波导之间的一种传输线，体积小，易于集成，功率容量高，损耗小，成本低。基片集成波导兼顾波导和微带传输线的优点，可实现高性能微波毫米波平面电路。
将SIW从中心面切割成两部分，就形成两个半模基片集成波导(Half-Mode Substrate integrated waveguide，简称HMSIW)。HMSIW的结构继承了SIW的传播特性。HMSIW与普通SIW相比，尺寸仅有其一半，但性能与其相当。四分之一模基片集成波导(Quarter Mode Substrate Integrated Waveguide，简称QMSIW)在HMSIW基础上，进行第二次分割，得到四分之一模结构的场，与原有场型具有相同的谐振特性。
在SIW中存在各种TEmnp模的电磁波，所谓TEmnp模，即Transverse Electric mode，其中m和n分别代表沿x方向和y方向分布的半波个数，p代表沿传播方向z方向分布的半波的个数。TE101模是SIW中的主模，其截止频率最低。但是也会同时存在很多其他模的TE波如TE201模、TE102模、TE202模、TE301模、TE103模等。这些TE波会降低SIW滤波器的特性，其中，TE202模的影响最大，必须对其传播加以抑制以改善滤波器的性能。因此，如何设计出能够简单灵活地抑制TE202模的SIW，是个值得研究的课题。
发明内容
根据本发明的实施例，希望提供一种微波器件结构及其实现方法，该结构能够在具有过孔边界和开放边界的基片集成波导中抑制高次模的电磁波，且优选地对主模的传输没有影响；当该结构应用在如基片集成波导滤波器等微波器件中时，可实现高性能指标的微波器件。
根据本发明的一个方面的实施例，提供了一种微波器件结构，包括基片集成波导和微带线，该基片集成波导包括无金属通孔的开放边界以及具有金属通孔的过孔边界，微带线的第一端接地，微带线的第二端与基片集成波导的开放边界相连，微带线长度约为
Figure PCTCN2017090416-appb-000001
其中k＝0，1，2，3，...，L是谐振频率为基片集成波导的主模时的微带线的波长。
根据本发明另一个方面的实施例，提供了一种抑制高次模的方法，包括：
提供基片集成波导和微带线，其中该基片集成波导包括无金属通孔的开放边界以及具有金属通孔的过孔边界，微带线长度约为
Figure PCTCN2017090416-appb-000002
其中k＝0，1，2，3，...，L是谐振频率为基片集成波导的主模时的微带线的波长，该方法包括：
将微带线的第一端接地，以及将微带线的第二端与基片集成波导的开放边界相连。
根据本发明另一方面的实施例，提供了一种通信系统中的网络设备或终端设备，该网络设备或终端设备包括如前所述的微波器件结构。
根据本发明公开的实施例的微波器件结构能够在基片集成波导滤波器中抑制TE202模和其他高次模的电场，且对TE101模的传输基本没有影响。因此该器件结构可以用于基片集成波导滤波器的设计中，使得滤波器拥有优异的止带性能；同时该结构易于实现和控制，能在微波电路中方便地进行调整而不影响整体性能。
附图说明
通过后面给出的详细描述和附图将会更加全面地理解本发明，其 中：
图1a-图1f示出了根据本发明的实施例的基片集成波导的金属顶层图案的示意图。
图2a和图2b示出了根据本发明的示范性实施例的微带线上传输主模和TE202模的波形示意图。
图3是根据本发明的示范性实施例的微带线的第二端与矩形半模基片集成波导的开放边界相连接的位置的示意图。
图4是根据本发明的示范性实施例的微带线的第二端与矩形四分之一模基片集成波导的开放边界相连接的位置的示意图。
图5a和图5b是本发明的示范性实施例应用在四分之一模基片集成波导滤波器中的顶层金属图案示意图及滤波器的S21曲线图。
图6示出了根据本发明的实施例的抑制高次模的方法的流程示意图。
应当提到的是，这些附图意图说明在某些示例性实施例中所利用的方法、结构的一般特性，并且对后面提供的书面描述做出补充。但是这些附图并非按比例绘制并且可能没有精确地反映出任何给定实施例的精确的结构或性能特性，并且不应当被解释成定义或限制由示例性实施例所涵盖的数值或属性的范围。在各幅图中使用类似的或完全相同的附图标记是为了表明类似的或完全相同的单元或特征的存在。
具体实施方式
下面结合附图对本发明作进一步详细描述。
本发明的实施例的微波器件结构可以应用在使用基片集成波导的微波滤波器上以及应用在使用该微波器件结构的微波电路中。基片集成波导是在介质基片上用相邻很近的金属化通孔，与上下金属面一起构成类似于普通波导的结构。基片集成波导的谐振器包括金属顶层、介质层和底层。谐振器的金属通孔穿过金属顶层、介质层和底层，底层全部金属化，以形成电接地。金属通孔、金属顶层和金属底层使用的 金属可以是任何一种金属导体。基片集成波导中使用的介质层材料可以是任一种介质材料，例如印制电路板(PCB)的介质材料、玻璃、石英或其替代物。
使用本发明的实施例的微波器件结构可以用于无线通信系统中的网络设备或终端设备。无线通信系统中的网络设备包括有无线收发装置的网络设备，例如基站、移动站、中继站等。这里所使用的术语“基站”可以被视为与以下各项同义并且有时可以被称作以下各项：B节点、演进型B节点、NodeB、eNodeB、基站收发器(BTS)、无线网络控制器RNC等等，并且可以描述在可以跨越多个技术世代的无线通信网络中与移动端通信并且为之提供无线资源的收发器。除了实施这里所讨论的方法的能力之外，这里所讨论的基站可以具有与传统的众所周知的基站相关联的所有功能。无线通信系统中的终端设备包括但不限于智能手机、平板电脑、PDA、PC机等包含有无线收发装置的移动或固定终端。需要说明的是，上述网络设备或终端设备仅为举例，其他现有的或今后可能出现的网络设备或终端设备，如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
本发明的实施例的微波器件结构，包括基片集成波导和微带线，该基片集成波导包括无金属通孔的开放边界以及具有金属通孔的过孔边界，微带线的第一端接地，微带线的第二端与基片集成波导的开放边界相连，微带线长度约为
Figure PCTCN2017090416-appb-000003
其中k＝0，1，2，3，...，其中，L是谐振频率为基片集成波导的主模时的微带线的波长。
本发明实施例的微波器件结构中的基片集成波导包括无金属通孔的开放边界以及具有金属通孔的过孔边界。一般普通的基片集成波导的谐振器的金属顶层图案的边界是金属过孔，电磁波被限制在金属过孔的谐振腔内。将普通基片集成波导从中间对称面一分为二，不会改变场模式，形成半模基片集成波导。因此半模基片集成波导的谐振器具有无金属通孔的开放边界，以及具有金属通孔的过孔边界。同样，四分之一模基片集成波导是在半模基片集成波导基础上进行进一步分割，因此同样具有无金属通孔的开放边界以及具有金属通孔的过孔边界。再进一步， 八分之一模基片集成波导也同样具有开放边界和过孔边界。因此基片集成波导可以是半模基片集成波导、四分之一模基片集成波导或八分之一模基片集成波导以及其他具有开放边界和过孔边界的基片集成波导。需要说明的是，上述半模基片集成波导、四分之一模基片集成波导、八分之一模基片集成波导等仅为举例，其他现有或今后可能出现的包括无金属通孔的开放边界以及具有金属通孔的过孔边界的基片集成波导，如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
优选地，基片集成波导包括半模基片集成波导或四分之一模基片集成波导。在优选实施例中，基片集成波导可以是半模基片集成波导或四分之一模基片集成波导中的任一种。也就是说在本发明的优选实施例的微波器件结构中，基片集成波导可以为半模基片集成波导；或者基片集成波导为四分之一模基片集成波导。
普通基片集成波导的谐振器的金属顶层图案的形状，可以是由金属通孔组成的圆形、椭圆形、矩形、三角形，也可以是圆环形、脊形等其他可以传输电磁波的形状。在本发明的实施例的微波器件结构中，基片集成波导的谐振器的金属顶层图案的形状可以由普通的基片集成波导的金属顶层图案切分而来。基片集成波导的金属顶层图案是由普通基片集成波导的金属顶层图案按照对称面进行切割或按对称面多次切割而成的形状。例如，普通基片集成波导的金属顶层图案为矩形，则按照对称面切割之后的半模基片集成波导的金属顶层图案可以是矩形或三角形；矩形的半模基片集成波导按照对称面切割之后的四分之一模基片集成波导可以是矩形。又例如，普通基片集成波导的金属顶层图案为圆形，则按照对称面切割之后的半模基片集成波导的金属顶层图案可以是半圆形圆弧的扇形；半圆形的半模基片集成波导按照对称面切割之后的四分之一模基片集成波导可以是四分之一圆的扇形。优选地，本发明的基片集成波导的金属顶层图案为矩形、三角形和扇形中的任一项。
图1a、图1b、图1c、图1d、图1e和图1f是根据本发明的实施例的基片集成波导的金属顶层图案的示意图。图1a是矩形半模基片集成波 导的金属顶层图案的示意图。图1b是矩形四分之一模基片集成波导的金属顶层图案的示意图。图1c是三角形半模基片集成波导的金属顶层图案的示意图。图1d是三角形四分之一模基片集成波导的金属顶层图案的示意图。图1e是扇形半模基片集成波导的金属顶层图案的示意图。图1f是扇形四分之一模基片集成波导的金属顶层图案的示意图。图1a、图1b、图1c、图1d、图1e和图1f中的具有金属通孔的过孔边界和无金属通孔的开放边界均已标出，图中斜线的阴影部分表示金属覆盖面，如图中所示。需要说明的是，图1a、图1b、图1c、图1d、图1e和图1f中的示出的基片集成波导的金属顶层图案仅为举例，本发明的实施例的基片集成波导应用在微波电路中时，金属图案的形状或边界等会根据电路设计的需要进行调整，调整之后的基片集成波导如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
本发明实施例的微波器件结构中的微带线是由支在介质基片上的单一导体带构成的微波传输线。微带线的形状、结构和材质等没有限制。微带线可以是直线，也可以是折线或曲线；微带线可以是表面式，嵌入式等结构。微带线包括两个端点：第一端和第二端。在本发明的实施例中，微带线的第一端接地。第一端接地的方式可以是多种，可以是第一端直接与某个地平面相连，或是通过金属盲孔接地，或者是与某个器件的接地点相连。优选地，第一端通过金属通孔接地。在基片集成波导的微波器件中，金属底层为接地层。因此微带线的第一端通过金属通孔实现接地的方式非常简单，易于实现，也便于控制微带线长度，对其他部件的影响也很小。
本发明的实施例的微带线的长度约为
Figure PCTCN2017090416-appb-000004
其中k＝0，1，2，3，...，L是谐振频率为基片集成波导的主模时的微带线的波长。基片集成波导的主模是指通过基片集成波导的截止频率最低的TE模，TE101模是基片集成波导的主模。由于微带线的第一端接地，由于微带线的长度为主模的波长的
Figure PCTCN2017090416-appb-000005
倍，因此当微带线上传输主模时，在微带线的第二端处是主模的电场最大场强处，相当于开路。当微带线上传输的TE波的频率是主模的两倍时，如TE202模，此时微带线的长度为该电磁波的波长的
Figure PCTCN2017090416-appb-000006
倍，因此微带线的第二端相当于是该电磁波的短接点，即此时第二端可以看做是虚拟接地。类似的，对于频率更高的高次模，若高次模的频率为主模频率的2i倍时，i＝1，2，3，......，由于微带线的长度是主模波长的
Figure PCTCN2017090416-appb-000007
倍，且微带线的第一端接地，因此根据高次模与主模之间频率的倍数关系，微带线的长度为该高次模的波长的
Figure PCTCN2017090416-appb-000008
倍，即微带线的第二端在传输该高次模时可以看成是虚拟接地。本领域的技术人员应能理解，本发明实施例的微波器件结构在实际应用当中，微带线长度会根据设计需要进行一定的调整，即微带线长度会在
Figure PCTCN2017090416-appb-000009
倍的主模波长的长度附近变化时，长度调整后的微带线如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
在一个优选实施例中，k＝0，微带线长度约为
Figure PCTCN2017090416-appb-000010
即微带线长度是微带线在谐振频率为基片集成波导的主模时的波长的四分之一。此时的微带线上不会有很多低频的谐振，有利于提高和控制微波器件的整体性能，因此该四分之一波长的谐振频率为基片集成波导的主模时的微带线在本发明的实施例中优选使用。同样的，当微带线长度为主模波长的四分之一时，微带线的第二端在传输主模时相当于开路，而在传输主模频率的2i倍的高次模时，例如TE202模，微带线的第二端此时可以看成是接地。
图2a和图2b示出了根据本发明的示范性实施例的微带线上传输主模和TE202模的波形示意图。在图2a中，微带线上传输的是主模，频率为f0，波长为L0，k＝0，微带线21的长度S＝L0/4，即为四分之一波长的谐振频率为基片集成波导主模的微带线。微带线21包含的第一端A1接地，微带线21上传输的主模的波形示意图如图2a所示，因此第二端B1在微带线21传输主模时相当于开路。在图2b中，微带线上传输的是2倍主模频率的TE202模，TE202模的频率为2f0，微带线21的长度相当于是TE202波长的二分之一，微带线上传输的TE202模的波形如图2b所示，因此第二端B1在微带线21传输TE202模时相当于接地。
在本发明的实施例的微波器件结构中，微带线的第二端与基片集成 波导的开放边界相连。第二端与开放边界相连的角度不限，微带线可以与开放边界垂直连接，也可以是相连之后形成任意一个角度。第二端可以与开放边界的任意一个位置相连。由于微带线的长度是主模的波长的
Figure PCTCN2017090416-appb-000011
倍，且微带线的第一端接地，因此当传输主模时，由于微带线的第二端此时相当于开路，因此微带线的第二端与基片集成波导相连，对基片集成波导的主模的谐振边界条件的影响很小。而在传输频率为主模频率2i倍的高次模的电磁波时，由于第二端此时相当于接地，因此第二端与开放边界相连也就相当于破坏了这些高次模的谐振边界条件，抑制了这些高次模的传输。进一步，如果第二端与开放边界相连的位置是这些电磁波的电场最强处的位置附近，则抑制效果最好。例如，基片集成波导为半模基片集成波导，则在波导的开放边界上，在开放边界的1/8、3/8，5/8、7/8处为TE404模的电场最强处，因此第二端放置在这些位置上时，破坏了TE404模的谐振边界条件，对TE404模的抑制效果最好，同时又对主模的传输影响很小。
在一个优选实施例中，基片集成波导为半模基片集成波导，其中微带线的第二端位于开放边界上，且与过孔边界的距离约为开放边界的长度的四分之一。当基片集成波导为半模基片集成波导时，在开放边界上，与过孔边界的距离约为开放边界的长度的四分之一的位置是基片集成波导传输TE202模时的电场最强处。此时把微带线的第二端放置在这个位置上，可以破坏TE202模的谐振边界条件，很好地抑制了TE202模的传输，同时又对主模的谐振边界条件的影响很小。图3是根据本发明的示范性实施例的微带线的第二端与矩形半模基片集成波导的开放边界相连接的位置的示意图。图中的半模基片集成波导是矩形图案，开放边界的长度以H表示，端点B31和端点B32是TE202模电场最强处，B31或B32距离过孔边界的距离为H的四分之一。微带线的第二端在位置B31或B32处与开放边界相连以抑制TE202模的传输。需要说明的是，图3是以矩形金属顶层图案作为示例，本领域的技术人员可以很容易地根据图3获得其他金属顶层图案的基片集成波导的开放边界上的TE202模电场最强处的位置范围。本领域的技术人员应能理解，本实施例的微波器 件结构在实际应用中，TE202模的电场最强处可能会在开放边界的四分之一的位置附近变化，微带线第二端与开放边界连接的位置根据电路设计需要或实际使用限制，在距离过孔边界的约为开放边界的长度的四分之一的位置附近调整，第二端与开放边界连接的位置调整之后的器件结构如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
在又一个优选实施例中，基片集成波导为四分之一模基片集成波导，其中微带线的第二端位于开放边界上，且与过孔边界的距离约为开放边界的长度的二分之一。当基片集成波导为四分之一模基片集成波导时，在开放边界上，与过孔边界的距离约为开放边界的长度的二分之一的位置，即开放边界的中点位置附近，是基片集成波导传输TE202模时的电场最强处。此时把微带线的第二端放置在这个位置上，可以破坏TE202模的谐振边界条件，很好的抑制TE202模的传输，同时又对主模的谐振边界条件影响很小。图4是根据本发明的示范性实施例的微带线的第二端与矩形四分之一模基片集成波导的开放边界相连接的位置的示意图。图中的四分之一模基片集成波导是矩形图案，两条开放边界的长度以P和Q表示，端点B41和端点B42是TE202模电场最强处，B41距离过孔边界的距离为P的二分之一，B42距离过孔边界的距离为Q的二分之一。微带线的第二端在位置B41或B42处与开放边界相连以抑制TE202模的传输。需要说明的是，图4是以矩形金属顶层图案作为示例，本领域的技术人员可以很容易地根据图4获得其他金属顶层图案的基片集成波导的开放边界上的TE202模电场最强处的位置范围。本领域的技术人员应能理解，本实施例的微波器件结构在实际应用中，TE202模的电场最强处可能会在开放边界的二分之一的位置附近变化，微带线第二端与开放边界连接的位置根据电路设计需要或实际使用限制，在距离过孔边界的约为开放边界的长度的二分之一的位置附近调整时，第二端与开放边界连接的位置调整之后的器件结构如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
在本发明的实施例的结构中，微带线的数量不受限制。当微带线的 第二端与开放边界相连的位置在需要抑制的高次模的的电场最强处时，抑制效果最好。比如，半模基片集成波导开放边界的1/8、3/8，5/8、7/8处为TE404模的电场最强处，因此可以在这些位置放置微带线的第二端从而抑制不需要的TE404模的传输。优选地，微带线包括一条或两条微带线。基片集成波导的TE202模在微波器件中对设计的影响最大。如图3在开放边界的B31和B32两个位置上的TE202模的电场最强处；以及如图4在开放边界的B41和B42两个位置上的TE202模的电场最强处。当本发明实施例的微波器件结构应用在滤波器设计上时，根据设计指标的要求，使用一条或两条微带线。一般使用一条微带线就可以满足大部分的设计需求。
图5a和图5b是本发明的示范性实施例应用在四分之一模基片集成波导滤波器中的顶层金属图案示意图及滤波器的S21曲线图。图5a的滤波器顶层金属图案中，左上方包括有一个四分之一模基片集成波导以及在该波导的一条开放边界的中点附近的一条一端接地的微带线，为本发明的实施例的微波器件结构；同样图5a中的右上方也包括有一个四分之一模基片集成波导以及在该波导的一条开放边界的中点附近的一条一端接地的微带线，为本发明的实施例的微波器件结构。在图5a中，微带线的长度是谐振频率为基片集成波导的主模时的微带线波长的四分之一左右，因此可以很好的抑制TE202模。图5b是该带有高次模抑制结构的滤波器与不带高次模抑制结构的滤波器的S21曲线对比图。从曲线对比图中可以看出，滤波器的通带在8-10GHz附近，带有高次模抑制结构的滤波器相比没有抑制结构的滤波器，在18-20GHz频段附近，滤波器的止带的性能相比得到大幅提升。
图6是根据本发明的实施例的抑制高次模方法的流程示意图。本发明的实施例的方法可以应用在使用基片集成波导的微波滤波器上以及应用在使用该微波器件结构的微波电路中。基片集成波导是在介质基片上用相邻很近的金属化通孔，与上下金属面一起构成类似于普通波导的结构。基片集成波导的谐振器包括金属顶层、介质层和底层。 谐振器的金属通孔穿过金属顶层、介质层和底层，底层全部金属化，以形成电接地。金属通孔、金属顶层和金属底层使用的金属可以是任何一种金属导体。基片集成波导中使用的介质层材料可以是任一种介质材料，例如印制电路板(PCB)的介质材料、玻璃、石英或其替代物。
使用本发明的实施例的方法可以用于无线通信系统中的网络设备或终端设备。无线通信系统中的网络设备包括有无线收发装置的网络设备，例如基站、移动站、中继站等。这里所使用的术语“基站”可以被视为与以下各项同义并且有时可以被称作以下各项：B节点、演进型B节点、NodeB、eNodeB、基站收发器(BTS)、无线网络控制器RNC等等，并且可以描述在可以跨越多个技术世代的无线通信网络中与移动端通信并且为之提供无线资源的收发器。除了实施这里所讨论的方法的能力之外，这里所讨论的基站可以具有与传统的众所周知的基站相关联的所有功能。无线通信系统中的终端设备包括但不限于智能手机、平板电脑、PDA、PC机等包含有无线收发装置的移动或固定终端。需要说明的是，上述网络设备或终端设备仅为举例，其他现有的或今后可能出现的网络设备或终端设备，如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
本发明的实施例的抑制高次模的方法，包括提供基片集成波导和微带线，其中基片集成波导包括无金属通孔的开放边界以及具有金属通孔的过孔边界，微带线长度约为
Figure PCTCN2017090416-appb-000012
其中k＝0，1，2，3，...，L是谐振频率为基片集成波导的主模时的微带线的波长，该方法包括步骤S61和步骤S62。
本发明实施例的方法中的基片集成波导包括无金属通孔的开放边界以及具有金属通孔的过孔边界。一般普通的基片集成波导的谐振器的金属顶层图案的边界是金属过孔，电磁波被限制在金属过孔的谐振腔内。将普通基片集成波导从中间对称面一分为二，不会改变场模式，形成半模基片集成波导。因此半模基片集成波导的谐振器具有无金属通孔的开放边界，以及具有金属通孔的过孔边界。同样，四分之一模基片集成波导是在半模基片集成波导基础上进行进一步分割，因此同样具有无金属 通孔的开放边界以及具有金属通孔的过孔边界。再进一步，八分之一模基片集成波导也同样具有开放边界和过孔边界。因此基片集成波导可以是半模基片集成波导、四分之一模基片集成波导或八分之一模基片集成波导以及其他具有开放边界和过孔边界的基片集成波导。需要说明的是，上述半模基片集成波导、四分之一模基片集成波导、八分之一模基片集成波导等仅为举例，其他现有或今后可能出现的包括无金属通孔的开放边界以及具有金属通孔的过孔边界的基片集成波导，如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
优选地，基片集成波导包括半模基片集成波导或四分之一模基片集成波导。在优选实施例中，基片集成波导可以是半模基片集成波导或四分之一模基片集成波导中的任一种。也就是说在本发明的优选实施例的微波器件结构中，基片集成波导可以为半模基片集成波导；或者基片集成波导为四分之一模基片集成波导。
普通基片集成波导的谐振器的金属顶层图案的形状，可以是由金属通孔组成的圆形、椭圆形、矩形、三角形，也可以是圆环形、脊形等其他可以传输电磁波的形状。在本发明的实施例的微波器件结构中，基片集成波导的谐振器的金属顶层图案的形状可以由普通的基片集成波导的金属顶层图案切分而来。基片集成波导的金属顶层图案是由普通基片集成波导的金属顶层图案按照对称面进行切割或按对称面多次切割而成的形状。例如，普通基片集成波导的金属顶层图案为矩形，则按照对称面切割之后的半模基片集成波导的金属顶层图案可以是矩形或三角形；矩形的半模基片集成波导按照对称面切割之后的四分之一模基片集成波导可以是矩形。又例如，普通基片集成波导的金属顶层图案为圆形，则按照对称面切割之后的半模基片集成波导的金属顶层图案可以是半圆形圆弧的扇形；半圆形的半模基片集成波导按照对称面切割之后的四分之一模基片集成波导可以是四分之一圆的扇形。优选地，本发明的基片集成波导的金属顶层图案为矩形、三角形和扇形中的任一项。
图1a、图1b、图1c、图1d、图1e和图1f是根据本发明的实施例的基片集成波导的金属顶层图案的示意图。图1a是矩形半模基片集成波 导的金属顶层图案的示意图。图1b是矩形四分之一模基片集成波导的金属顶层图案的示意图。图1c是三角形半模基片集成波导的金属顶层图案的示意图。图1d是三角形四分之一模基片集成波导的金属顶层图案的示意图。图1e是扇形半模基片集成波导的金属顶层图案的示意图。图1f是扇形四分之一模基片集成波导的金属顶层图案的示意图。图1a、图1b、图1c、图1d、图1e和图1f中的具有金属通孔的过孔边界和无金属通孔的开放边界均已标出，图中斜线的阴影部分表示金属覆盖面，如图中所示。需要说明的是，图1a、图1b、图1c、图1d、图1e和图1f中的示出的基片集成波导的金属顶层图案仅为举例，本发明的实施例的基片集成波导应用在微波电路中时，金属图案的形状或边界等会根据电路设计的需要进行调整，调整之后的基片集成波导如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
本发明实施例的方法中的微带线是由支在介质基片上的单一导体带构成的微波传输线。微带线的形状、结构和材质等没有限制。微带线可以是直线，也可以是折线或曲线；微带线可以是表面式，嵌入式等结构。微带线包括两个端点：第一端和第二端。在步骤S61中，将微带线的第一端接地。第一端接地的方式可以是多种，可以是第一端直接与某个地平面相连，或是通过金属盲孔接地，或者是与某个器件的接地点相连。优选地，步骤S61包括将第一端通过金属通孔接地。在基片集成波导的微波器件中，金属底层为接地层。因此微带线的第一端通过金属通孔实现接地的方式非常简单，易于实现，也便于控制微带线长度，对其他部件的影响也很小。
本发明的实施例的方法中的微带线的长度约为
Figure PCTCN2017090416-appb-000013
其中k＝0，1，2，3，...，L是谐振频率为基片集成波导的主模时的微带线的波长。基片集成波导的主模是指通过基片集成波导的截止频率最低的TE模，TE101模是基片集成波导的主模。由于微带线的第一端接地，由于微带线的长度为主模的波长的
Figure PCTCN2017090416-appb-000014
倍，因此当微带线上传输主模时，在微带线的第二端处是主模的电场最大场强处，相当于开路。当微带线上传输的TE波的频率是主模的两倍时，如TE202模，此时微带线的长度为该电 磁波的波长的
Figure PCTCN2017090416-appb-000015
倍，因此微带线的第二端相当于是该电磁波的短接点，即此时第二端可以看做是虚拟接地。类似的，对于频率更高的高次模，若高次模的频率为主模频率的2i倍时，i＝1，2，3，......，由于微带线的长度是主模波长的
Figure PCTCN2017090416-appb-000016
倍，且微带线的第一端接地，因此根据高次模与主模之间频率的倍数关系，微带线的长度为该高次模的波长的
Figure PCTCN2017090416-appb-000017
倍，即微带线的第二端在传输该高次模时可以看成是虚拟接地。本领域的技术人员应能理解，本发明实施例的方法在实际应用当中，微带线长度会根据设计需要进行一定的调整，即微带线长度会在
Figure PCTCN2017090416-appb-000018
倍的主模波长的长度附近变化时，长度调整后的微带线如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
在一个优选实施例中，k＝0，微带线长度约为
Figure PCTCN2017090416-appb-000019
即微带线长度是微带线在谐振频率为基片集成波导的主模时的波长的四分之一。此时的微带线上不会有很多低频的谐振，有利于提高和控制微波器件的整体性能，因此该四分之一波长的谐振频率为基片集成波导的主模时的微带线在本发明的实施例中优选使用。同样的，当微带线长度为主模波长的四分之一时，微带线的第二端在传输主模时相当于开路，而在传输主模频率的2i倍的高次模时，例如TE202模，微带线的第二端此时可以看成是接地。
图2a和图2b示出了根据本发明的示范性实施例的微带线上传输主模和TE202模的波形示意图。在图2a中，微带线上传输的是主模，频率为f0，波长为L0，k＝0，微带线21的长度S＝L0/4，即四分之一波长的谐振频率为基片集成波导的主模时的微带线。微带线21包含的第一端A1接地，微带线21上传输的主模的波形示意图如图2a所示，因此第二端B1在微带线21传输主模时相当于开路。在图2b中，微带线上传输的是2倍主模频率的TE202模，TE202模的频率为2f0，微带线21的长度相当于是TE202波长的二分之一，微带线上传输的TE202模的波形如图2b所示，因此第二端B1在微带线21传输TE202模时相当于接地。
在步骤S62中，微带线的第二端与基片集成波导的开放边界相连。 第二端与开放边界相连的角度不限，微带线可以与开放边界垂直连接，也可以是相连之后形成任意一个角度。第二端可以与开放边界的任意一个位置相连。由于微带线的长度是主模的波长的
Figure PCTCN2017090416-appb-000020
倍，且微带线的第一端接地，因此当传输主模时，由于微带线的第二端此时相当于开路，因此微带线的第二端与基片集成波导相连，对基片集成波导的主模的谐振边界条件的影响很小。而在传输频率为主模频率2i倍的高次模的电磁波时，由于第二端此时相当于接地，因此第二端与开放边界相连也就相当于破坏了这些高次模的谐振边界条件，抑制了这些高次模的传输。进一步，如果第二端与开放边界相连的位置是这些电磁波的电场最强处的位置附近，则抑制效果最好。例如，基片集成波导为半模基片集成波导，则在波导的开放边界上，在开放边界的1/8、3/8，5/8、7/8处为TE404模的电场最强处，因此第二端放置在这些位置上时，破坏了TE404模的谐振边界条件，对TE404模的抑制效果最好，同时又对主模的传输影响很小。
在一个优选实施例中，基片集成波导为半模基片集成波导，步骤S62包括：将微带线的第二端放置于开放边界上，且与过孔边界的距离约为开放边界的长度的四分之一。当基片集成波导为半模基片集成波导时，在开放边界上，与过孔边界的距离约为开放边界的长度的四分之一的位置是基片集成波导传输TE202模时的电场最强处。此时把微带线的第二端放置在这个位置上，可以破坏TE202模的谐振边界条件，很好地抑制TE202模的传输，同时又对主模的谐振边界条件的影响很小。图3是根据本发明的示范性实施例的微带线的第二端与矩形半模基片集成波导的开放边界相连接的位置的示意图。图中的半模基片集成波导是矩形图案，开放边界的长度以H表示，端点B31和端点B32是TE202模电场最强处，B31或B32距离过孔边界的距离为H的四分之一。微带线的第二端在位置B31或B32处与开放边界相连以抑制TE202模的传输。需要说明的是，图3是以矩形金属顶层图案作为示例，本领域的技术人员可以很容易地根据图3获得其他金属顶层图案的基片集成波导的开放边界上的TE202模电场最强处的位置范围。本领域的技术人员应能理解，本实施例的方 法在实际应用中，TE202模的电场最强处可能会在开放边界的四分之一的位置附近变化，微带线第二端与开放边界连接的位置根据电路设计需要或实际使用限制，在距离过孔边界的约为开放边界的长度的四分之一的位置附近调整，第二端与开放边界连接的位置调整之后的方法如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
在又一个优选实施例中，基片集成波导为四分之一模基片集成波导，步骤S62包括：将微带线的第二端放置于开放边界上，且与过孔边界的距离约为开放边界的长度的二分之一。当基片集成波导为四分之一模基片集成波导时，在开放边界上，与过孔边界的距离约为开放边界的长度的二分之一的位置，即开放边界的中点位置附近，是基片集成波导传输TE202模时的电场最强处。此时把微带线的第二端放置在这个位置上，可以破坏TE202模的谐振边界条件，很好的抑制TE202模的传输，同时又对主模的谐振边界条件的影响很小。图4是根据本发明的示范性实施例的微带线的第二端与矩形四分之一模基片集成波导的开放边界相连接的位置的示意图。图中的四分之一模基片集成波导是矩形图案，两条开放边界的长度以P和Q表示，端点B41和端点B42是TE202模电场最强处，B41距离过孔边界的距离为P的二分之一，B42距离过孔边界的距离为Q的二分之一。微带线的第二端在位置B41或B42处与开放边界相连以抑制TE202模的传输。需要说明的是，图4是以矩形金属顶层图案作为示例，本领域的技术人员可以很容易地根据图4获得其他金属顶层图案的基片集成波导的开放边界上的TE202模电场最强处的位置范围。本领域的技术人员应能理解，本实施例的方法在实际应用中，TE202模的电场最强处可能会在开放边界的二分之一的位置附近变化，微带线第二端与开放边界连接的位置根据电路设计需要或实际使用限制，在距离过孔边界的约为开放边界的长度的二分之一的位置附近调整时，第二端与开放边界连接的位置调整之后的方法如可适用于本发明，也应包含在本发明保护范围以内，并以引用方式包含于此。
在本发明的实施例的方法中，微带线的数量不受限制。当微带线的第二端与开放边界相连的位置在需要抑制的高次模的的电场最强处时， 抑制效果最好。比如，半模基片集成波导开放边界的1/8、3/8，5/8、7/8处为TE404模的电场强度最大处，因此可以在这些位置放置微带线的第二端从而抑制不需要的TE404模的传输。优选地，微带线包括一条或两条微带线。基片集成波导的TE202模在微波器件中对设计的影响最大。如图3在开放边界的B31和B32两个位置上的TE202模的电场最强处；以及如图4在开放边界的B41和B42两个位置上的TE202模的电场最强处。当本发明实施例的抑制高次模的方法应用在滤波器设计上时，根据设计指标的要求，使用一条或两条微带线。一般使用一条微带线就可以满足大部分的设计需求。
图5a和图5b是本发明的示范性实施例应用在四分之一模基片集成波导滤波器中的顶层金属图案示意图及滤波器的S21曲线图。图5a的滤波器顶层金属图案中，左上方包括有一个四分之一模基片集成波导以及在该波导的一条开放边界的中点附近的一条一端接地的微带线，为本发明的实施例的微波器件结构；同样图5a中的右上方也包括有一个四分之一模基片集成波导以及在该波导的一条开放边界的中点附近的一条一端接地的微带线，为本发明的实施例的微波器件结构。在图5a中，微带线的长度是谐振频率为基片集成波导的主模时的微带线波长的四分之一左右，因此可以很好的抑制TE202模。图5b是该带有高次模抑制结构的滤波器与不带抑制结构的滤波器的S21曲线对比图。从曲线对比图中可以看出，滤波器的通带在8-10GHz附近，带有高次模抑制结构的滤波器相比没有抑制结构的滤波器，在18-20GHz频段附近，滤波器的止带的性能相比得到大幅提升。
对于本领域技术人员而言，显然本发明不限于上述示范性实施例的细节，而且在不背离本发明的精神或基本特征的情况下，能够以其他的具体形式实现本发明。因此，无论从哪一点来看，均应将实施例看作是示范性的，而且是非限制性的，本发明的范围由所附权利要求而不是上述说明限定，因此旨在将落在权利要求的等同要件的含义和范围内的所有变化涵括在本发明内。不应将权利要求中的任何附图标 记视为限制所涉及的权利要求。此外，显然“包括”一词不排除其他单元或步骤，单数不排除复数。系统权利要求中陈述的多个单元或装置也可以由一个单元或装置通过软件或者硬件来实现。第一，第二等词语用来表示名称，而并不表示任何特定的顺序。
虽然示例性实施例可以有多种修改和替换形式，但是在附图中以举例的方式示出了其中的一些实施例，并且将在这里对其进行详细描述。但是应当理解的是，并不意图将示例性实施例限制到所公开的具体形式，相反，示例性实施例意图涵盖落在权利要求书的范围内的所有修改、等效方案和替换方案。相同的附图标记在各幅图的描述中始终指代相同的单元。
在更加详细地讨论示例性实施例之前应当提到的是，一些示例性实施例被描述成作为流程图描绘的处理或方法。虽然流程图将各项操作描述成顺序的处理，但是其中的许多操作可以被并行地、并发地或者同时实施。此外，各项操作的顺序可以被重新安排。当其操作完成时所述处理可以被终止，但是还可以具有未包括在附图中的附加步骤。所述处理可以对应于方法、函数、规程、子例程、子程序等等。
这里所公开的具体结构和功能细节仅仅是代表性的，并且是用于描述本发明的示例性实施例的目的。但是本发明可以通过许多替换形式来具体实现，并且不应当被解释成仅仅受限于这里所阐述的实施例。
应当理解的是，虽然在这里可能使用了术语“第一”、“第二”等等来描述各个单元，但是这些单元不应当受这些术语限制。使用这些术语仅仅是为了将一个单元与另一个单元进行区分。举例来说，在不背离示例性实施例的范围的情况下，第一单元可以被称为第二单元，并且类似地第二单元可以被称为第一单元。这里所使用的术语“和/或”包括其中一个或更多所列出的相关联项目的任意和所有组合。
应当理解的是，当一个单元被称为“连接”或“耦合”到另一单元时，其可以直接连接或耦合到所述另一单元，或者可以存在中间单元。与此相对，当一个单元被称为“直接连接”或“直接耦合”到另一单元时，则不存在中间单元。应当按照类似的方式来解释被用于描 述单元之间的关系的其他词语(例如“处于...之间”相比于“直接处于...之间”，“与...邻近”相比于“与...直接邻近”等等)。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指，否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是，这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在，而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
还应当提到的是，在一些替换实现方式中，所提到的功能/动作可以按照不同于附图中标示的顺序发生。举例来说，取决于所涉及的功能/动作，相继示出的两幅图实际上可以基本上同时执行或者有时可以按照相反的顺序来执行。
除非另行定义，否则这里使用的所有术语(包括技术和科学术语)都具有与示例性实施例所属领域内的技术人员通常所理解的相同的含义。还应当理解的是，除非在这里被明确定义，否则例如在通常使用的字典中定义的那些术语应当被解释成具有与其在相关领域的上下文中的含义相一致的含义，而不应按照理想化的或者过于正式的意义来解释。
虽然前面特别示出并且描述了示例性实施例，但是本领域技术人员将会理解的是，在不背离权利要求书的精神和范围的情况下，在其形式和细节方面可以有所变化。这里所寻求的保护在所附权利要求书中做了阐述。在下列编号条款中规定了各个实施例的这些和其他方面：
第1条.一种微波器件结构，包括基片集成波导和微带线，所述基片集成波导包括无金属通孔的开放边界以及具有金属通孔的过孔边界，所述微带线的第一端接地，所述微带线的第二端与所述基片集成波导的开放边界相连，所述微带线长度约为
Figure PCTCN2017090416-appb-000021
其中k＝0，1，2，3，...，L是谐振频率为所述基片集成波导的主模时的所述微带线的波长。
第2条.根据条款1所述的微波器件结构，其中k＝0，所述微带线长 度约为
Figure PCTCN2017090416-appb-000022
第3条.根据条款1所述的微波器件结构，其中所述第一端通过金属通孔接地。
第4条.根据条款1所述的微波器件结构，其中所述微带线包括一条或两条微带线。
第5条.根据条款1至4中任一项所述的微波器件结构，其中所述基片集成波导包括半模基片集成波导或四分之一模基片集成波导。
第6条.根据条款1至4中任一项所述的微波器件结构，其中所述基片集成波导的金属顶层图案为矩形、三角形和扇形中的任一项。
第7条.根据条款5所述的微波器件结构，其中所述基片集成波导为半模基片集成波导，其中所述微带线的第二端位于所述开放边界上，且与所述过孔边界的距离约为所述开放边界的长度的四分之一。
第8条.根据条款5所述的微波器件结构，其中所述基片集成波导为四分之一模基片集成波导，其中所述微带线的第二端位于所述开放边界上，且与所述过孔边界的距离约为所述开放边界的长度的二分之一。
第9条.一种抑制高次模的方法，包括：
提供基片集成波导和微带线，其中所述基片集成波导包括无金属通孔的开放边界以及具有金属通孔的过孔边界，所述微带线长度约为
Figure PCTCN2017090416-appb-000023
其中k＝0，1，2，3，...，L是谐振频率为所述基片集成波导的主模时的所述微带线的波长，所述方法包括：
将所述微带线的第一端接地，以及将所述微带线的第二端与所述基片集成波导的开放边界相连。
第10条.根据条款9所述的方法，其中k＝0，所述微带线长度约为
Figure PCTCN2017090416-appb-000024
第11条.根据条款9所述的方法，其中，所述将所述微带线的第一端接地的步骤包括：
将所述第一端通过金属通孔接地。
第12条.根据条款9所述的微波器件结构，其中所述微带线包括一条或两条微带线
第13条.根据条款9至12中任一项所述的方法，其中所述基片集成 波导包括半模基片集成波导或四分之一模基片集成波导。
第14条.根据条款9至12中任一项所述的方法，其中所述基片集成波导的金属顶层图案为矩形、三角形和扇形中的任一项。
第15条.根据条款13所述的方法，其中所述基片集成波导为半模基片集成波导，其中所述将所述微带线的第二端与所述基片集成波导的开放边界相连的步骤包括：
将所述微带线的第二端放置于所述开放边界上，且与所述过孔边界的距离约为所述开放边界的长度的四分之一。
第16条.根据条款13所述的方法，其中所述基片集成波导为四分之一模基片集成波导，其中所述将所述微带线的第二端与所述基片集成波导的开放边界相连的步骤包括：
将所述微带线的第二端放置于所述开放边界上，且与所述过孔边界的距离约为所述开放边界的长度的二分之一。
第17条.通信系统中的网络设备或终端设备，其中包括如条款1至8中任一项所述的微波器件结构。

Claims (15)

  1. 一种微波器件结构，包括基片集成波导和微带线，所述基片集成波导包括无金属通孔的开放边界以及具有金属通孔的过孔边界，所述微带线的第一端接地，所述微带线的第二端与所述基片集成波导的开放边界相连，所述微带线长度约为
    Figure PCTCN2017090416-appb-100001
    其中k＝0，1，2，3，...，L是谐振频率为所述基片集成波导的主模时的所述微带线的波长。
  2. 根据权利要求1所述的微波器件结构，其中k＝0，所述微带线长度约为
    Figure PCTCN2017090416-appb-100002
  3. 根据权利要求1所述的微波器件结构，其中所述第一端通过金属通孔接地。
  4. 根据权利要求1所述的微波器件结构，其中所述微带线包括一条或两条微带线。
  5. 根据权利要求1至4中任一项所述的微波器件结构，其中所述基片集成波导包括半模基片集成波导或四分之一模基片集成波导。
  6. 根据权利要求1至4中任一项所述的微波器件结构，其中所述基片集成波导的金属顶层图案为矩形、三角形和扇形中的任一项。
  7. 根据权利要求5所述的微波器件结构，其中所述基片集成波导为半模基片集成波导，其中所述微带线的第二端位于所述开放边界上，且与所述过孔边界的距离约为所述开放边界的长度的四分之一。
  8. 根据权利要求5所述的微波器件结构，其中所述基片集成波导为四分之一模基片集成波导，其中所述微带线的第二端位于所述开放边界上，且与所述过孔边界的距离约为所述开放边界的长度的二分之一。
  9. 一种抑制高次模的方法，包括：
    提供基片集成波导和微带线，其中所述基片集成波导包括无金属通孔的开放边界以及具有金属通孔的过孔边界，所述微带线长度约为
    Figure PCTCN2017090416-appb-100003
    其中k＝0，1，2，3，...，L是谐振频率为所述基片集成波导的主模时的所述微带线的波长，所述方法包括：
    将所述微带线的第一端接地，以及将所述微带线的第二端与所述基片集成波导的开放边界相连。
  10. 根据权利要求9所述的方法，其中k＝0，所述微带线长度约为
    Figure PCTCN2017090416-appb-100004
  11. 根据权利要求9所述的方法，其中，所述将所述微带线的第一端接地的步骤包括：
    将所述第一端通过金属通孔接地。
  12. 根据权利要求9至11中任一项所述的方法，其中所述基片集成波导包括半模基片集成波导或四分之一模基片集成波导。
  13. 根据权利要求12所述的方法，其中所述基片集成波导为半模基片集成波导，其中所述将所述微带线的第二端与所述基片集成波导的开放边界相连的步骤包括：
    将所述微带线的第二端放置于所述开放边界上，且与所述过孔边界的距离约为所述开放边界的长度的四分之一。
  14. 根据权利要求12所述的方法，其中所述基片集成波导为四分之一模基片集成波导，其中所述将所述微带线的第二端与所述基片集成波导的开放边界相连的步骤包括：
    将所述微带线的第二端放置于所述开放边界上，且与所述过孔边界的距离约为所述开放边界的长度的二分之一。
  15. 通信系统中的网络设备或终端设备，其中包括如权利要求1至8中任一项所述的微波器件结构。
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