WO2018233423A1

WO2018233423A1 - On-off control circuit

Info

Publication number: WO2018233423A1
Application number: PCT/CN2018/087666
Authority: WO
Inventors: 金若愚; 宋建峰; 刘湘
Original assignee: 广州金升阳科技有限公司
Priority date: 2017-06-19
Filing date: 2018-05-21
Publication date: 2018-12-27
Also published as: CN107171560A; CN107171560B

Abstract

An on-off control circuit, which may implement the turning on and turning off of single and multiple dry node control circuits and achieve time division multiplexing of a same direct current (DC) power supply. When there are more than two dry node control circuits, an access port of one dry node control circuit is turned on, and the access ports of the other dry node control circuits are turned off, so that a relay connected to the on dry node control circuit is closed, and a DC level is outputted to a load port by means of the closed relay; when the access ports of multiple dry node control circuits are all turned on at the same time, each dry node control circuit is turned off according to the mutual restriction relationship among the dry node control circuits, and a relay connected to such circuit is always in an off state, so that a DC level could not be outputted to the load port by means of the relay.

Description

Switch control circuit

Technical field

The present invention relates to a control circuit, and more particularly to a switch control circuit.

Background technique

The high-voltage power supply is a switching converter for providing stable and reliable DC voltage for control systems and heating systems such as photovoltaic solar power, wind power generation, SVG, and central air conditioning. At present, the demand for higher input voltage, the demand for PV power supply with wider input voltage range has increased sharply, and the industry has developed rapidly. And a clear trend in the development of the industry is that applications are ever-changing, output power is getting bigger and bigger, and the working environment is becoming more and more strict.

Dry node signals are common in industrial control, power and other fields. An empty contact that is not powered by itself is a passive switch with two states of closure and switch, and there is no polarity between the two contact points.

At present, high-voltage power supplies and other applications usually use dry junctions, relays or other control switches to switch their output DC voltage to different two or more load terminals, or to achieve time-sharing multiplexing of a DC power supply.

The prior art usually controls a single dry node signal. For the control logic between two or more dry node signals and dry node signals, there is no simple and feasible better solution.

Summary of the invention

In view of the above, in order to solve the problems existing in the prior art, the present invention provides a switch control circuit capable of turning on and off one-way, two-way, and two-way dry junction control circuits, thereby achieving output DC The voltage is switched to a different two or more load terminals.

The object of the present invention is achieved by the following technical solutions: a switch control circuit including a first dry node control circuit, DC levels Vo+ and Vo- to be switched, a relay DC power supply VDD, a first relay drive circuit, and a load port A2+.

The first dry node control circuit includes a dry node access port A2, a dry node access port B2, a resistor R21, a resistor R22, a resistor R23, a resistor R24, and a transistor Q22;

One end of the dry node access port A2 and one end of the dry node access port B2 are respectively connected with an external control signal to control the opening and closing of the dry node access ports A2 and B2; one end of the resistor R21 is connected to the relay DC power supply VDD, and the resistor The other end of the resistor R22 is connected to one end of the resistor R22 and the emitter of the transistor Q22; the other end of the resistor R22 is connected to one end of the resistor R23 and the base of the transistor Q22; the other end of the resistor R23 is connected to the other end of the dry node access port A2; The collector of the transistor Q22 is connected to one end of the resistor R24, and the other end of the resistor R24 is grounded to the other end of the dry node access port B2.

The first relay driving circuit comprises a relay K2, a diode D21, an NPN type transistor Q21, a load Z2; a relay K2 port 1 is connected to a DC level to be switched Vo+, a relay K2 port 2 is connected to a load port A2+, and a relay K2 port 3 is connected to a collector of a transistor Q21 And the anode of the diode D21; the emitter of the transistor Q21 is grounded, the base of the transistor Q21 is connected to the collector of the transistor Q22; the port of the relay K2 is connected to the cathode of the diode D21 and the DC power supply VDD of the relay, and the end of the load Z2 is connected to the load port A2+, the other end Ground.

Preferably, the connection relationship between the resistor R22 and the resistor R23 can be adjusted such that one end of the resistor R22 is connected to the other end of the resistor R21, and one end of the resistor R23 is connected to the base of the transistor Q22, the resistor The other end of R22 is connected to the dry node access port A2 at the same time as the other end of the resistor R23.

Preferably, a switch control circuit includes a second dry junction control circuit and a second relay drive circuit; the second dry junction control circuit includes a dry junction access port A3, a dry junction access port B3, a resistor R31, a resistor R32, and a resistor. R33, resistor R34 and transistor Q31;

One end of the dry node access port A3 and one end of the dry node access port B3 are respectively connected with external control signals to control the opening and closing of the dry node access ports A3 and B3; one end of the resistor R31 is connected to the relay DC power supply VDD, and the resistor The other end of the resistor R32 is connected to one end of the resistor R32 and the emitter of the transistor Q32; the other end of the resistor R32 is connected to one end of the resistor R33 and the base of the transistor Q32; the other end of the resistor R33 is connected to the other end of the dry node access port A3; The collector of the transistor Q32 is connected to one end of the resistor R34, and the other end of the resistor R34 is grounded to the other end of the dry node access port B3.

The second relay driving circuit includes a relay K3, a diode D11, an NPN type transistor Q31, and a load Z3. Relay K3 port 1 and relay K3 port 2 are a pair of mechanical contacts of relay K3, relay K3 port 3 and relay K3 port 4 are control signal input ports; relay K3 port 1 is connected to be switched DC level Vo+, relay K3 port 2 is connected Load port A3+, relay K3 port 3 is connected to the collector of transistor Q31 and the anode of diode D11; the emitter of transistor Q31 is grounded, the base of transistor Q31 is connected to the collector of transistor Q32; relay K3 port 4 is connected to diode D11 cathode and relay DC Power supply VDD, one end of load Z3 is connected to load port A3+, and the other end is grounded.

Preferably, the connection relationship between the resistor R32 and the resistor R33 can be adjusted such that one end of the resistor R32 is connected to the other end of the resistor R31, one end of the resistor R33 is connected to the base of the transistor Q32, and the other end of the resistor R32 is simultaneously connected to the other end of the resistor R33. The dry node is connected to port A3.

Preferably, the connection relationship between the first dry node control circuit and the second dry node control circuit can be adjusted as follows: the other end of the dry node access port A2 is connected to the base of Q31; the dry node is connected The other end of the ingress port A3 is connected to the base of Q21.

The connection relationship between the first dry node control circuit and the second dry node control circuit may also be adjusted as follows: the other end of the dry node access port A2 is connected to the base of Q31; the dry node access port The other end of A3 is connected to the emitter of Q22.

Preferably, when no control signal or control signal is low level, a pair of mechanical contacts of the relay K2 and a pair of mechanical contacts of the relay K3 are normally open.

Preferably, relay K2 and relay K3 can be replaced with control switches of similar function.

The idea of the invention is that the external control signal is input to the dry node access ports A1 and A2, and the dry node is controlled to be turned on and off. When the dry node access port is turned on, the dry node control circuit is also turned on, and then driven. The control switch of the relay or similar function controls the conduction side, and at the same time, the mechanical contact of the relay is closed; the DC level to be switched forms a loop through the closed contact of the relay, and is output to the load port; when the dry node is disconnected, it is connected to the dry node The branch is also disconnected, the relay or similar function of the control switch is controlled to open, and the mechanical contact of the relay is disconnected. The DC level to be switched cannot pass through the open contact of the relay and no DC level is transmitted to the load port. The control logic of the present invention is shown in Table 1 below:

Table 1

Remarks: 1 indicates the dry junction control circuit path, 0 indicates the dry junction control circuit is open; ON indicates the output channel, and OFF indicates the output disconnection.

When the single-channel dry junction control circuit, the specific working principle is as follows: When the dry junction control circuit is closed, the relay DC power supply VDD and the resistor R21, the resistor R22, the resistor R23 and the closed dry junction access port A2 form a series connection. The voltage circuit, the transistor Q22 is a PNP type triode, the transistor Q22 of the transistor is forward biased, the Q22 collector junction is turned on, the relay DC power supply VDD and the resistor R21, the triode Q22 collector junction and the resistor R24 form a series voltage dividing circuit; The transistor Q21 is an NPN type triode. After the Q21 emitter junction is forward biased, the Q21 collector junction is turned on. The relay DC power supply VDD and the relay drive winding, the triode Q21 collector structure are closed circuits, and the pull-in relay mechanical contact is closed. The DC level to be switched forms a loop through the closed contact of the relay and is output to the load port. When the dry junction control circuit is disconnected, the transistors Q21 and Q22 are disconnected, the relay mechanical contacts are disconnected, and the DC level to be switched cannot be transmitted to the load port.

Further, if time division multiplexing of the same DC power supply is to be realized, an external control signal is required to control the on and off of the two dry junction control circuits. When the first dry node control circuit is turned on and the second dry node control circuit is turned off, the first relay driving circuit is turned on, the second relay driving circuit is turned off, the mechanical contact of the driving relay K2 is closed, and the DC level to be switched is passed. The closed contact of the driven relay K2 constitutes a loop and is output to the load port A2+;

When the second dry node control circuit is turned on, when the first dry node control circuit is turned off, the second relay driving circuit is turned on, the first relay driving circuit is turned off, the mechanical contact of the driving relay K3 is closed, and the DC level to be switched is passed. The closed contact of the driven relay K3 constitutes a loop and is output to the load port A3+;

When both dry junction control circuits are turned on, the mechanical contacts of relays K2 and K3 are disconnected, and the DC level to be switched cannot be output to any one of the load terminals;

The working process is as follows: For the dual dry junction control circuit, the difference from the single dry junction control circuit is:

The first dry node input ports A2 and B2 are closed and turned on at the same time, pulling the emitter potential of the transistor Q32 low to zero level, the transistor Q32 is a PNP type transistor, and the transistor Q32 is turned off, thereby turning off the second dry node control circuit, further The second relay drive circuit is turned off, and the mechanical contact of the relay K3 is kept normally open, and the DC level to be switched cannot be transmitted to the load port A3+.

When the second dry junction input ports A3, B3 are closed and turned on, similarly, the emitter potential of the transistor Q22 is pulled down to zero level, and the transistor Q22 is turned off, thereby turning off the first dry junction control circuit and further turning off the first In the relay drive circuit, the mechanical contact of the relay K2 remains normally open, and the DC level to be switched cannot be transmitted to the load port A2+.

It is also possible to achieve the same effect by pulling down the base currents of the transistors Q21 and Q31, thereby turning off the transistors Q21 and Q31.

In particular, the dual-channel dry junction control circuit of the solution of the present invention is very flexible in design, and can directly implement on-off control for a single dry node port; for two dry node ports, only four switch tubes can be used to achieve different OR gate control logic, the circuit is simple and reliable.

Compared with the prior art, the present invention has the following beneficial effects:

1) This scheme can directly realize on-off control for single-channel dry junction ports; it is easy to design and easy to debug.

2) For the two-way dry junction port, only four switch tubes are used to realize the XOR gate control logic, and the circuit is simple and reliable.

3) The circuit structure of the scheme is simple, the number of components is small, the design is flexible, and the cost is advantageous.

DRAWINGS

Figure 1 is a schematic diagram of a first embodiment of the present invention;

Figure 2 is a schematic diagram of a second embodiment of the present invention;

Figure 3 is a schematic diagram of a third embodiment of the present invention;

Figure 4 is a schematic diagram of a fourth embodiment of the present invention;

Figure 5 is a schematic diagram of a fifth embodiment of the present invention;

Figure 6 is a schematic diagram of a sixth embodiment of the present invention;

Figure 7 is a schematic diagram of a sixth embodiment of the present invention;

Figure 8 is a schematic diagram of a sixth embodiment of the present invention;

Figure 9 is a schematic diagram of a sixth embodiment of the present invention;

Figure 10 is a schematic diagram of a sixth embodiment of the present invention.

First embodiment

1 is a circuit schematic diagram of a first embodiment of the present invention, a switch control circuit including a first dry junction control circuit, DC levels Vo+ and Vo- to be switched, a relay DC power supply VDD, and a first relay drive circuit , load port A2+.

One end of the dry node access port A2 and one end of B2 are respectively connected with external control signals to control the opening and closing of A2 and B2; one end of R21 is connected to VDD, and the other end of R21 is respectively connected to one end of R22 and the emitter of Q22; R22 The other end is connected to one end of R23 and the base of Q22; the other end of R23 is connected to A2; the collector of Q22 is connected to one end of R24, and the other end of R24 is grounded to the other end of B2.

The first relay driving circuit includes a relay K2, a diode D21, an NPN type transistor Q21, and a load Z2. K2 port 1 and K2 port 2 are mechanical contacts, K2 port 3 and K2 port 4 are control signal input ports; K2 port 1 is connected to Vo+, K2 port 2 is connected to A2+, K2 port 3 is connected to the collector of Q21 and the anode of D21; The emitter of Q21 is grounded, the base of Q21 is connected to the collector of Q22, the port of K2 is connected to the cathode of D21 and VDD, the end of Z2 is connected to A2+, and the other end is grounded.

Embodiment 1 belongs to a single dry node control circuit. Referring to the connection relationship of the circuit shown in FIG. 1, the working principle of the circuit of the present invention is described:

When A2 and B2 are turned on, VDD and resistors R21, R22, and R23 form a series voltage divider circuit through A2, B2 and ground signal GND, Q22 is a PNP type transistor, Q22 emitter junction is forward biased, Q22 collector junction On, VDD and resistors R21, Q22 collector junction and R24 form a series voltage divider circuit; at the same time, after the transistor Q21 emitter junction is forward biased, Q21 collector junction is turned on, transistor Q21 is NPN transistor, VDD and K2 The drive winding, the Q21 collector structure is a closed circuit, and the mechanical contact of the pull-in relay K2 is turned on. The DC level VO+, VO- to be switched forms a loop through the closed contact of K2 and the load port A2+.

When A2 and B2 are disconnected, the relay DC power supply VDD and the resistors R21, R22, and R23 cannot form a series voltage divider circuit through the disconnected dry junctions A2 and B2 and the ground signal GND. The Q21 and Q22 emitter junctions and collector junctions are both Disconnected, the mechanical contact of relay K2 is disconnected, and the DC levels VO+, VO- to be switched cannot form a closed loop with the load access port. At this time, the DC level cannot supply power to the load Z2.

When the drive K2 has no drive signal or the drive signal is low, its mechanical contact is normally open.

Relay K2 can be replaced with a similarly functioning control switch.

Second embodiment

2 is a circuit schematic diagram showing a second embodiment of the present invention, which is different from the first embodiment in that the second embodiment includes a second dry node control circuit and a second relay drive circuit, and the two dry node controls The interaction between the circuits enables time-sharing multiplexing of the same DC power supply.

The second dry node control circuit includes a dry node access port A3, a dry node access port B3, a resistor R31, a resistor R32, a resistor R33, a resistor R34, and a transistor Q31; one end of the dry node access port A3 and a dry node access port One end of B3 is connected with an external control signal to control the opening and closing of the dry node access ports A3 and B3; one end of the resistor R31 is connected to the relay DC power supply VDD, and the other end of the resistor R31 is connected to one end of the resistor R32 and the transistor Q32 respectively. The other end of the resistor R32 is connected to one end of the resistor R33 and the base of the transistor Q32; the other end of the resistor R33 is connected to the other end of the dry junction access port A3; the collector of the transistor Q32 is connected to one end of the resistor R34, and the resistor R34 is The other end is grounded to the other end of the dry node access port B3.

The connection relationship between the second dry node control circuit and the first dry node control circuit is: the other end of the dry node access port A2 in the first dry node control circuit is connected to the emitter of Q32; the second dry node control circuit The other end of the dry node access port A3 is connected to the emitter of Q22.

The second relay driving circuit includes a relay K3, a diode D11, an NPN type transistor Q31, and a load Z3. Relay K3 port 1 and relay K3 port 2 are mechanical contacts, relay K3 port 3 and relay K3 port 4 are control signal input ports; relay K3 port 1 is connected to the DC level to be switched Vo+, relay K3 port 2 is connected to load port A3+, relay K3 port 3 is connected to the collector of transistor Q31 and the anode of diode D11, the emitter of Q31 is grounded, the base of Q31 is connected to the collector of Q32 in the second dry junction control circuit; the junction of relay K3 is connected to the cathode of diode D11 and the DC supply of relay Power supply VDD, one end of load Z3 is connected to load port A3+, and the other end is grounded.

Referring to the connection relationship of the circuit shown in FIG. 2, the working principle of the circuit of the present invention is described: the working principle of the second dry node control circuit is the same as that of the first dry node control circuit, and will not be described herein again. The interaction and working principle between the control circuits are as follows:

The difference from the single dry node control circuit shown in Figure 1 is that;

When the dry node access ports A2 and B2 are closed and the dry node access ports A3 and B3 are disconnected, the first dry node control circuit is turned on, the first relay driving circuit is turned on, and the pull-in relay K2 mechanical contact is turned on. Closed, the DC level VO+ to be switched is output to the load Z2 through the relay K2; similarly, when the dry node access ports A3, B3 are closed and the dry node access ports A2 and B2 are disconnected, the second dry node control circuit When the second relay driving circuit is turned on, the pull-in relay K3 mechanical contact is closed, and the DC level VO+ to be switched is output to the load Z3 through the relay K3.

If the dry junction access ports A2 and B2, A3 and B3 are both closed and turned on at the same time, the two dry junction control circuits are simultaneously turned off, and the two relay drive circuits are all turned off, and no DC level is transmitted to the load port. The specific principle is as follows:

The dry node access ports A2 and B2 are closed and turned on at the same time, pulling down the emitter potential of the transistor Q32 to zero level, turning off the transistor Q32, thereby turning off the second dry node control circuit, further turning off the second relay driving circuit, and the relay The K3 mechanical contact remains normally open, and the potential difference between the load Z3 to be supplied is zero.

The dry junction access ports A3 and B3 are closed and turned on. Similarly, the emitter potential of the transistor Q22 is pulled down to zero level, and the transistor Q22 is turned off, thereby turning off the first dry junction control circuit and further turning off the first relay drive. In the circuit, the mechanical contact of the relay K2 is kept in a normally open state, and the potential difference between the ends of the load Z2 to be supplied is zero.

Therefore, when both the dry node access ports are closed at the same time, the two dry node control circuits are simultaneously turned off, and the load port has no DC level output.

If the dry node access ports A2 and B2, A3 and B3 are both disconnected at the same time, the two dry node control circuits are directly in the off state.

Third embodiment

3 is a block diagram showing a third embodiment of the present invention. The difference from the single-channel dry node control shown in FIG. 1 in the first embodiment is that the connection between the resistor R22, the resistor R23 and the transistor Q22 is adjusted: the resistor R22. One end of the resistor R21 is connected to one end of the resistor R21. One end of the resistor R23 is connected to the base of the transistor Q22, and the other end of the R22 is connected to the dry node access port A2 at the same time. The working principle and the effect of the implementation are the same as those in the first embodiment, and details are not described herein again.

Fourth embodiment

4 is a block diagram showing a fourth embodiment of the present invention. The fourth embodiment combines the single-channel dry junction control circuits described in the two-way third embodiment to form a two-way dry junction control circuit. Different from the second embodiment, the connection relationship of the resistors in each dry junction control circuit is adjusted: one end of the resistor R22 is connected to the other end of the resistor R21, one end of the resistor R23 is connected to the base of the transistor Q22, and the other end of the R22 is connected with the R23. The other end of the resistor is connected to the dry node access port A2; one end of the resistor R32 is connected to the other end of the resistor R31, one end of the resistor R33 is connected to the base of the transistor Q32, and the other end of the resistor R32 is connected to the dry node of the other end of the resistor R33. Enter port A3.

The connection relationship between the two-way dry-node control circuit is the same as that of the second embodiment. The working principle and the effect of the implementation are the same as those in the second embodiment, and details are not described herein again.

Fifth embodiment

The fifth embodiment combines the single-channel dry junction control circuit in the first embodiment with the single-channel dry junction control circuit in the third embodiment to form a dual-channel dry junction control circuit, as shown in FIG. 5, and Compared with the second embodiment, only the resistance connection relationship of one of the dry junction control circuits is adjusted: one end of the resistor R32 is connected to the other end of the resistor R31, one end of the resistor R33 is connected to the base of the transistor Q32, and the other end of the resistor R32 is connected with the resistor R33. The other end is connected to the dry node access port A3 at the same time.

The connection relationship between the two-way dry node control circuits is the same as that of the second embodiment, and the working principle and the effect of the implementation are also the same as those of the second embodiment.

Sixth embodiment

As shown in FIG. 6, the sixth embodiment is also evolved according to the second embodiment. The difference from the second embodiment is that the connection relationship between the two dry node control circuits is adjusted, and the first dry node control circuit is The other end of the dry node access port A2 is connected to the base of Q31; the other end of the dry node access port A3 in the second dry node control circuit is connected to the base of Q21.

Its working principle is slightly different from the second embodiment:

When the dry junction access ports A2 and B2, A3 and B3 are both closed and turned on, the two dry junction control circuits are simultaneously turned off, and the two relay drive circuits are all turned off, and no DC level is transmitted to the load port. The specific principle is as follows:

When the dry junction access ports A2 and B2 are closed and turned on, the base potential of the transistor Q31 is pulled down to zero level, and the transistor Q31 is turned off, thereby turning off the second dry junction control circuit, further turning off the second relay driving circuit, and the relay. The K3 mechanical contact remains normally open, and the potential difference between the load Z3 to be supplied is zero.

The dry node access ports A3 and B3 are closed and turned on. Similarly, the base potential of the transistor Q21 is pulled down to zero level, and the transistor Q21 is turned off, thereby turning off the first dry node control circuit and further turning off the first relay drive. In the circuit, the mechanical contact of the relay K2 is kept in a normally open state, and the potential difference between the ends of the load Z2 to be supplied is zero.

Other working principles are the same as those of the second embodiment, and are not described herein again.

Seventh embodiment

As shown in FIG. 7, the seventh embodiment is different from the sixth embodiment in that the connection relationship of the resistors in each dry node control circuit is adjusted: one end of the resistor R22 is connected to the other end of the resistor R21, and one end of the resistor R23 is connected. The base of the transistor Q22, the other end of the R22 and the other end of the R23 are simultaneously connected to the dry node access port A2; one end of the resistor R32 is connected to the other end of the resistor R31, one end of the resistor R33 is connected to the base of the transistor Q32, and the other end of the resistor R32 One end is connected to the dry node access port A3 at the same time as the other end of the resistor R33.

The working principle is the same as that of the sixth embodiment.

Eighth embodiment

As shown in FIG. 8, the eighth embodiment is different from the sixth embodiment in that the connection relationship of the resistors in one of the dry node control circuits is adjusted: one end of the resistor R32 is connected to the other end of the resistor R31, and one end of the resistor R33 is connected. The base of the transistor Q32, the other end of the resistor R32 and the other end of the resistor R33 are simultaneously connected to the dry node access port A3.

The working principle is the same as that of the sixth embodiment.

Ninth embodiment

As shown in FIG. 9, the ninth embodiment differs from the fifth embodiment in that the connection relationship between the two dry node control circuits is adjusted: the dry node access port A2 in the first dry node control circuit is further One end is connected to the emitter of Q32; the other end of the dry node access port A3 in the second dry node control circuit is connected to the base of Q21.

The working principle is different: the dry junction access ports A2 and B2 are closed and turned on at the same time, the low-level transistor Q32 emitter potential is pulled to zero level, and the triode Q32 is turned off, thereby turning off the second dry junction control circuit, further shutting down In the two relay drive circuit, the mechanical contact of the relay K3 is kept in a normally open state, and the potential difference between the ends of the load Z3 to be supplied is zero.

Tenth embodiment

As shown in FIG. 10, the tenth embodiment is similar to the ninth embodiment, and is also an adjustment of the connection relationship between the two-way dry node control circuits in the fifth embodiment: the dry node connection in the first dry node control circuit The other end of the ingress port A2 is connected to the base of Q31; the other end of the dry node access port A3 in the second dry node control circuit is connected to the emitter of Q22.

The working principle is different: the dry junction access ports A2 and B2 are closed and turned on at the same time. The base potential of the triode Q31 is pulled to zero level, and the triode Q31 is turned off, thereby turning off the second dry junction control circuit and further turning off the second In the two relay drive circuit, the mechanical contact of the relay K3 is kept in a normally open state, and the potential difference between the ends of the load Z3 to be supplied is zero.

The above is only a preferred embodiment of the present invention, and it should be noted that the above-described preferred embodiments are not to be construed as limiting the present invention, and those skilled in the art, without departing from the spirit and scope of the invention, It is also possible to make a number of improvements and refinements, which are also to be considered as the scope of protection of the present invention, and the scope of the present invention should be defined by the scope of the claims.

Claims

A switch control circuit includes a DC level Vo+ and Vo- to be switched, a relay DC power supply VDD, and a load port A2+, and is characterized in that: a first dry node control circuit and a first relay drive circuit are further included;

The first dry node control circuit includes a dry node access port A2, a dry node access port B2, a resistor R21, a resistor R22, a resistor R23, a resistor R24, and a transistor Q22; one end of the dry node access port A2 and a dry node One end of the access port B2 is respectively connected with an external control signal; one end of the resistor R21 is connected to the relay DC power supply VDD, and the other end of the resistor R21 is respectively connected to one end of the resistor R22 and the emitter of the transistor Q22; the other end of the resistor R22 is connected to the resistor R23 One end and the base of the transistor Q22; the other end of the resistor R23 is connected to the other end of the dry node access port A2; the collector of the transistor Q22 is connected to one end of the resistor R24, the other end of the resistor R24 is connected to the other end of the dry node access port B2 Grounding

The first relay driving circuit comprises a relay K2, a diode D21, an NPN type transistor Q21, a load Z2, a relay K2 port 1 connected to a DC level to be switched Vo+, a relay K2 port 2 connected to a load port A2+, a relay K2 port 3 connected to a triode Q21 The collector and the anode of the diode D21; the emitter of the transistor Q21 is grounded, the base of the transistor Q21 is connected to the collector of the transistor Q22; the port of the relay K2 is connected to the cathode of the diode D21 and the DC power supply VDD of the relay, and the end of the load Z2 is connected to the load port A2+ The other end is grounded.
A switch control circuit according to claim 1, wherein the connection relationship between the resistor R22 and the resistor R23 is adjusted such that one end of the resistor R22 is connected to the other end of the resistor R21. One end of the resistor R23 is connected to the base of the transistor Q22, and the other end of the resistor R22 is connected to the dry node access port A2 at the same time as the other end of the resistor R23.
A switch control circuit according to claim 1 or 2, wherein said switch control circuit further comprises a load port A3+, a second dry node control circuit and a second relay drive circuit;

The second dry node control circuit includes a dry node access port A3, a dry node access port B3, a resistor R31, a resistor R32, a resistor R33, a resistor R34, and a transistor Q31; one end of the dry node access port A3 and a dry node One end of the access port B3 is respectively connected with an external control signal; one end of the resistor R31 is connected to the relay DC power supply VDD, and the other end of the resistor R31 is respectively connected to one end of the resistor R32 and the emitter of the transistor Q32; the other end of the resistor R32 is connected to the resistor R33 One end and the base of the transistor Q32; the other end of the resistor R33 is connected to the other end of the dry node access port A3; the collector of the transistor Q32 is connected to one end of the resistor R34, the other end of the resistor R34 is connected to the other end of the dry node access port B3 Grounding

The connection relationship between the first dry node control circuit and the second dry node control circuit is: the other end of the dry node access port A2 is connected to the emitter of Q32; the dry node is connected to the port A3. One end is connected to the emitter of Q22;

The second relay driving circuit comprises a relay K3, a diode D11, an NPN type transistor Q31, a load Z3; a relay K3 port 1 and a relay K3 port 2 are a pair of mechanical contacts of the relay K3, a relay K3 port 3 and a relay K3 port 4 is the control signal input port; relay K3 port 1 is connected to the DC level to be switched Vo+, relay K3 port 2 is connected to the load port A3+, relay K3 port 3 is connected to the collector of transistor Q31 and the anode of diode D11; the emitter of transistor Q31 is grounded, The base of the transistor Q31 is connected to the collector of the transistor Q32; the port of the relay K3 is connected to the cathode of the diode D11 and the DC power supply VDD of the relay, and the end of the load Z3 is connected to the load port A3+, and the other end is grounded.
The switch control circuit according to claim 3, wherein the connection relationship between the resistor R32 and the resistor R33 is adjusted such that one end of the resistor R32 is connected to the other end of the resistor R31. One end of the resistor R33 is connected to the base of the transistor Q32, and the other end of the resistor R32 is connected to the dry node access port A3 at the same time as the other end of the resistor R33.
A switch control circuit according to claim 3, wherein the connection relationship between said first dry node control circuit and said second dry node control circuit is adjusted to: dry node access port A2 The other end is connected to the base of Q31; the other end of the dry junction access port A3 is connected to the base of Q21.
A switch control circuit according to claim 4, wherein the connection relationship between said first dry node control circuit and said second dry node control circuit is adjusted to: dry node access port A2 The other end is connected to the base of Q31; the other end of the dry junction access port A3 is connected to the base of Q21.
A switch control circuit according to claim 3, wherein the connection relationship between said first dry node control circuit and said second dry node control circuit is adjusted to: dry node access port A2 The other end is connected to the base of Q31; the other end of the dry junction access port A3 is connected to the emitter of Q22.
A switch control circuit according to claim 4, wherein the connection relationship between said first dry node control circuit and said second dry node control circuit is adjusted to: dry node access port A2 The other end is connected to the base of Q31; the other end of the dry junction access port A3 is connected to the emitter of Q22.
A switch control circuit according to any one of claims 5 to 8, wherein said relay K2 port 1 and said relay K2 port 2 are a pair of mechanical contacts of relay K2, said Relay K2 port 3 and said relay K2 port 4 are control signal input ports;

The relay K3 port 1 and the relay K3 port 2 are a pair of mechanical contacts of the relay K3, and the relay K3 port 3 and the relay K3 port 4 are control signal input ports.
A switch control circuit according to claim 9, wherein a pair of mechanical contacts of said relay K2 and said pair of mechanical contacts of said relay K3 are low in no control signal or control signal At the level, it is normally open; the relay K2 and the relay K3 can be replaced by a control switch similar in function.