WO2018227547A1 - 确定同步块的发送时间的方法、装置、用户设备及基站 - Google Patents

确定同步块的发送时间的方法、装置、用户设备及基站 Download PDF

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Publication number
WO2018227547A1
WO2018227547A1 PCT/CN2017/088616 CN2017088616W WO2018227547A1 WO 2018227547 A1 WO2018227547 A1 WO 2018227547A1 CN 2017088616 W CN2017088616 W CN 2017088616W WO 2018227547 A1 WO2018227547 A1 WO 2018227547A1
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Prior art keywords
pbch
symbol data
bit
pbch symbol
synchronization block
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PCT/CN2017/088616
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English (en)
French (fr)
Inventor
刘洋
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北京小米移动软件有限公司
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Application filed by 北京小米移动软件有限公司 filed Critical 北京小米移动软件有限公司
Priority to CN201780000502.6A priority Critical patent/CN109429557B/zh
Priority to EP17913134.7A priority patent/EP3641416A4/en
Priority to PCT/CN2017/088616 priority patent/WO2018227547A1/zh
Publication of WO2018227547A1 publication Critical patent/WO2018227547A1/zh
Priority to US16/704,230 priority patent/US11438852B2/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W56/00Synchronisation arrangements
    • H04W56/001Synchronization between nodes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W48/00Access restriction; Network selection; Access point selection
    • H04W48/08Access restriction or access information delivery, e.g. discovery data delivery
    • H04W48/12Access restriction or access information delivery, e.g. discovery data delivery using downlink control channel
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/003Arrangements for allocating sub-channels of the transmission path
    • H04L5/0048Allocation of pilot signals, i.e. of signals known to the receiver
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2647Arrangements specific to the receiver only
    • H04L27/2655Synchronisation arrangements
    • H04L27/2656Frame synchronisation, e.g. packet synchronisation, time division duplex [TDD] switching point detection or subframe synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/0091Signaling for the administration of the divided path
    • H04L5/0094Indication of how sub-channels of the path are allocated
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W24/00Supervisory, monitoring or testing arrangements
    • H04W24/08Testing, supervising or monitoring using real traffic
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W72/00Local resource management
    • H04W72/04Wireless resource allocation
    • H04W72/044Wireless resource allocation based on the type of the allocated resource
    • H04W72/046Wireless resource allocation based on the type of the allocated resource the resource being in the space domain, e.g. beams
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W72/00Local resource management
    • H04W72/04Wireless resource allocation
    • H04W72/044Wireless resource allocation based on the type of the allocated resource
    • H04W72/0466Wireless resource allocation based on the type of the allocated resource the resource being a scrambling code
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W72/00Local resource management
    • H04W72/20Control channels or signalling for resource management
    • H04W72/23Control channels or signalling for resource management in the downlink direction of a wireless link, i.e. towards a terminal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/003Arrangements for allocating sub-channels of the transmission path
    • H04L5/0053Allocation of signaling, i.e. of overhead other than pilot signals
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W56/00Synchronisation arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W72/00Local resource management
    • H04W72/30Resource management for broadcast services

Definitions

  • the present disclosure relates to the field of wireless communication technologies, and in particular, to a method, an apparatus, a user equipment, and a base station for determining a transmission time of a synchronization block.
  • a beam scanning-based synchronization block and a synchronization block set are introduced to implement user equipment (User Equipment, UE for short).
  • Synchronization configuration scheme of symbol synchronization and frame synchronization In this synchronization configuration scheme, all synchronization blocks in the synchronization block set period of up to 20 ms need to be completely transmitted within 5 ms, and each synchronization block carries a physical broadcast channel (Physical The Broadcast Channel (PBCH) message is used.
  • PBCH Physical The Broadcast Channel
  • TTI Transmission Time Interval
  • the user equipment may implement symbol level timing based on the primary synchronization signal and the secondary synchronization signal in the synchronization block, but the user equipment cannot obtain the synchronization block set from the synchronization signal in the transmission period of 20 ms.
  • Which radio frame and which of the specific slots or sub-frames of a radio frame are time-indicated (Timing Index, TI for short) information.
  • the user equipment is designed to obtain these synchronization information mainly through PBCH messages, but the PBCH resources are very limited. Therefore, in the 5G system, it is necessary to propose a kind of decoding complexity without wasting PBCH resources and increasing the decoding complexity of the user equipment.
  • a technical solution for indicating TI information and system frame number of the synchronization block based on the PBCH message is implemented.
  • the embodiments of the present disclosure provide a method, an apparatus, a user equipment, and a base station for determining a transmission time of a synchronization block, which are used to effectively indicate a TI and a system frame number of a synchronization block.
  • a method of determining a transmission time of a synchronization block comprising:
  • the PBCH symbol data to be merged is obtained, and the PBCH symbol data to be merged includes the PBCH of the same beam as the beam where the synchronization block is located in the PBCH combining period. Symbol data and PBCH symbol data of adjacent beams;
  • acquiring PBCH symbol data to be merged with the cached PBCH symbol data includes:
  • combining the buffered PBCH symbol data with the PBCH symbol data to be merged includes:
  • the merged PBCH symbol data is combined with the PBCH symbol data to be merged in the next synchronization block set in the PBCH combining period, and the decoding process is performed until the decoding is successful or the PBCH merge period is not enabled.
  • the combined PBCH symbol data is up.
  • the PBCH merge period is 80 ms.
  • the PBCH merge period is 40 ms.
  • the method before performing the descrambling and decoding process on the physical broadcast channel PBCH message carried in the synchronization block, the method further includes:
  • the PBCH symbol data includes a high N bit and a first low data bit of a system frame number and a high P bit of a sync block time indication bit, N is 7 or 8, and P is a natural number not greater than 5.
  • a method of determining a transmission time of a synchronization block comprising:
  • PBCH symbol data includes a high N bit and a first low data bit of the system frame number and a sync block time indication bit.
  • High P bit, P is a natural number not greater than 5;
  • the synchronization block is sent according to a preset transmission manner, and the synchronization block carries the PBCH message.
  • sending the synchronization block based on the preset sending manner includes:
  • the synchronization block is sent according to a second convention manner, where the second convention mode is used to indicate that each synchronization block sends a synchronization block in each direction during a transmission period.
  • N is 7 or 8.
  • an apparatus for determining a transmission time of a synchronization block comprising:
  • a first processing module configured to perform descrambling and decoding processing on a physical broadcast channel PBCH message carried in the synchronization block, and buffer PBCH symbol data of the PBCH message before demodulation;
  • a data acquisition module configured to acquire PBCH symbol data to be merged with the buffered PBCH symbol data after the first processing module is successfully descrambled and the decoding fails, where the PBCH symbol data to be merged includes a PBCH merge period PBCH symbol data of the same beam as the beam of the synchronization block and PBCH symbol data of the adjacent beam;
  • the merging module is configured to combine the buffered PBCH symbol data with the to-be-combined PBCH symbol data acquired by the data module until the PBCH symbol data can be correctly decoded.
  • the data acquisition module includes:
  • a location determining submodule configured to determine an occurrence position of the sync block signal in a PBCH merge period based on a scrambling code of the PBCH message
  • a first determining submodule configured to determine, according to the appearance location, PBCH symbol data to be merged in the PBCH combining period that is the same as the buffered PBCH symbol data;
  • the monitoring submodule is configured to listen to the PBCH symbol data to be merged in a sending window of the PBCH symbol data to be merged.
  • the merging module comprises:
  • Obtaining a submodule configured to acquire PBCH symbol data of an adjacent beam that is located in the same synchronization block set as the synchronization block;
  • a first merging submodule configured to acquire adjacent beams in the same set of sync blocks After the PBCH symbol data, the buffered PBCH symbol data is merged with the PBCH symbol data of the adjacent beam that is located in the same synchronization block set as the synchronization block;
  • a decoding submodule configured to perform decoding processing on the combined PBCH symbol data of the first merge submodule
  • a second merging sub-module configured to combine the decoded PBCH symbol data with the PBCH symbol data to be merged in the next synchronization block set in the PBCH combining period and decode the decoding if the decoding sub-module fails to decode Until the decoding is successful or there is no PBCH symbol data that can be merged within the PBCH merge period.
  • the PBCH merge period is 80 ms.
  • the PBCH merge period is 40 ms.
  • the method further includes:
  • a listening module configured to listen to the synchronization block
  • the symbol synchronization module is configured to complete symbol synchronization based on the primary synchronization signal and the secondary synchronization signal after the monitoring module listens to the synchronization block.
  • the PBCH symbol data includes a high N bit and a first low data bit of the system frame number and a high P bit of the sync block time indication bit, N is 7 or 8, and P is a natural number not greater than 5.
  • an apparatus for determining a transmission time of a synchronization block comprising:
  • the second processing module is configured to perform scrambling and modulation processing on the encoded PBCH symbol data based on the agreed scrambling code to obtain a PBCH message, where the PBCH symbol data includes a high N bit and an Mth low data of the system frame number. Bit and the high P bit of the sync block time indication bit, P is a natural number not greater than 5;
  • the sending module is configured to send a synchronization block according to a preset sending manner, where the synchronization block carries the PBCH message.
  • the sending module comprises:
  • the first sending submodule is configured to send the synchronization block according to a first appointment manner, where the first appointment manner is used to indicate that the synchronization block in each direction is sent in a puncturing manner;
  • the second sending submodule is configured to send the synchronization block according to a second appointment manner, where the second convention mode is used to indicate that each synchronization block sends a synchronization block in each direction during a transmission period.
  • N is 7 or 8.
  • a user equipment including:
  • a memory for storing processor executable instructions
  • processor is configured to:
  • the PBCH symbol data to be merged is obtained, and the PBCH symbol data to be merged includes the PBCH of the same beam as the beam where the synchronization block is located in the PBCH combining period. Symbol data and PBCH symbol data of adjacent beams;
  • a base station including:
  • a memory for storing processor executable instructions
  • processor is configured to:
  • PBCH symbol data includes a high N bit and a first low data bit of the system frame number and a sync block time indication bit.
  • High P bit, P is a natural number not greater than 5;
  • the synchronization block is sent according to a preset transmission manner, and the synchronization block carries the PBCH message.
  • a non-transitory computer readable storage medium having stored thereon computer instructions that, when executed by a processor, implement the following steps:
  • the PBCH symbol data to be merged is obtained, and the PBCH symbol data to be merged includes the PBCH of the same beam as the beam where the synchronization block is located in the PBCH combining period. Symbol data and PBCH symbol data of adjacent beams;
  • a non-transitory computer readable storage medium having stored thereon computer instructions that, when executed by a processor, implement the following steps:
  • PBCH symbol data includes a high N bit and a first low data bit of a system frame number and a high P bit of a sync block time indication bit, and P is a natural number not greater than 5;
  • the synchronization block is sent according to a preset transmission manner, and the synchronization block carries the PBCH message.
  • the base station may carry the high N bit and the Mth low data bit of the system frame number and the high P bit of the sync block time indication bit in the PBCH symbol data of the sync block, and N is 7 or 8, whereby the user equipment receives the sync block.
  • the PBCH symbol data to be merged can be obtained based on the scrambling code. Since the number of scrambling bits can be at least two or three bits, the TI and the system for effectively indicating the synchronization block by using the PBCH symbol data are implemented. The frame number, and based on the PBCH symbol data merge decoding, does not add too much descrambling complexity to the user equipment.
  • FIG. 1A is a flowchart illustrating a method of determining a transmission time of a synchronization block, according to an exemplary embodiment.
  • FIG. 1B is a scene diagram of a method of determining a transmission time of a sync block, according to an exemplary embodiment.
  • FIG. 1C is a first schematic diagram of a method for determining a transmission time of a sync block, according to an exemplary embodiment.
  • FIG. 1D is a schematic diagram 2 of a method for determining a transmission time of a sync block, according to an exemplary embodiment.
  • FIG. 1E is a schematic structural diagram of a sync block according to an exemplary embodiment.
  • FIG. 2A is a flowchart of still another method of determining a transmission time of a sync block, according to an exemplary embodiment.
  • FIG. 2B is a flowchart of a method for obtaining PBCH symbol data to be merged with the cached PBCH symbol data in the embodiment shown in FIG. 2A.
  • FIG. 2C is a diagram showing the buffered PBCH symbol data and the PBCH to be merged in the embodiment shown in FIG. 2A. Flow chart of the method for merging data.
  • FIG. 3 is a flowchart illustrating a method of determining a transmission time of a synchronization block, according to an exemplary embodiment.
  • FIG. 4 is a flowchart of still another method of determining a transmission time of a sync block, according to an exemplary embodiment.
  • FIG. 5 is a block diagram of an apparatus for determining a transmission time of a sync block, according to an exemplary embodiment.
  • FIG. 6 is a block diagram of another apparatus for determining a transmission time of a sync block, according to an exemplary embodiment.
  • FIG. 7 is a block diagram of an apparatus for determining a transmission time of a sync block, according to an exemplary embodiment.
  • FIG. 8 is a block diagram of another apparatus for determining a transmission time of a sync block, according to an exemplary embodiment.
  • FIG. 9 is a block diagram of an apparatus suitable for determining a transmission time of a sync block, according to an exemplary embodiment.
  • FIG. 10 is a block diagram of an apparatus suitable for determining a transmission time of a sync block, according to an exemplary embodiment.
  • FIG. 1A is a flowchart of a method for determining a transmission time of a synchronization block
  • FIG. 1B is a scene diagram of a method for determining a transmission time of a synchronization block, according to an exemplary embodiment, according to an exemplary embodiment.
  • FIG. 1C is a first schematic diagram of a method for determining a transmission time of a synchronization block according to an exemplary embodiment
  • FIG. 1D is a schematic diagram 2 of a method for determining a transmission time of a synchronization block according to an exemplary embodiment
  • FIG. 1E is a schematic structural diagram of a synchronization block according to an exemplary embodiment; the method for determining a transmission time of a synchronization block may be applied to a user equipment, as shown in FIG. 1A, the method for determining a transmission time of a synchronization block includes the following Steps 101-103:
  • step 101 the physical broadcast channel PBCH message carried in the synchronization block is descrambled and decoded, and the PBCH symbol data of the PBCH message is buffered.
  • the structure of the synchronization block can be seen in FIG. 1E, including a primary synchronization signal, a secondary synchronization signal PBCH message, and a Demodulation Reference Signal (DMRS) interspersed in the frequency domain.
  • DMRS Demodulation Reference Signal
  • the obtained PBCH may be buffered prior to demodulation.
  • the symbol data, the PBCH symbol data includes the high N bit and the first low data bit of the system frame number and the high P bit of the sync block time indication bit, and N is 7 or 8.
  • the transmission time interval of the PBCH message carried in the synchronization block is 80 ms
  • the PBCH message includes the high N bit and the first low data bit of the system frame number, and the high P bit of the TI of the synchronization block, except
  • other TI data bits and system frame number bits are implicit bits for scrambling PBCH symbol data.
  • the value of P may be a natural number of not more than 5.
  • the higher the TI number of the dominant display the better, for example, when the value of P is 5,
  • the bit number of the invisible display is the first low data bit.
  • P is 5 as an optional embodiment, but the value of P is not limited to 5.
  • the hidden bit may include 3 bits, which are the second and third low data bits of the system frame number and the first low data bit of the sync block time indication bit, and the 3 bit implicitly contains 8 possibilities
  • the scrambling codes can be 0, 1, 2, 3, 4, 5, 6, and 7, respectively.
  • the PBCH combining period is 80ms, indicating 4 20ms, that is, in the 80ms period, there are 8 PBCH messages. identical.
  • the UE may determine the occurrence position of the synchronization block in the PBCH combining period based on the scrambling code capable of successfully decoding the PBCH message. Referring to FIG.
  • the first low data bit with the hidden bit being the system frame number and the first low data bit of the sync block time indication bit are indicated, in the figure, 0, 1, 2, 3, 4, 5,
  • the PBCH symbol data carried in the sync block marked by 6, 7 is PBCH symbol data that can be used for merging.
  • the hidden bit may include 2 bits, which are the second low data bit of the system frame number and the first low data bit of the sync block time indication bit, and the 2 bit implicitly contains 4 possibilities.
  • the scrambling code can be 0, 1, 2, 3 respectively
  • the PBCH combining period is 40ms, indicating 2 20ms, that is, in the 40ms period, 4 PBCH messages are the same.
  • the UE may determine the occurrence position of the synchronization block in the PBCH combining period based on the scrambling code capable of successfully decoding the PBCH message. Referring to FIG. 1D, the second low data bit whose implicit bit is the system frame number and the first low data bit of the sync block time indication bit are indicated, and the sync blocks marked by 0, 1, 2, and 3 in the figure are usable. The sync block to be merged.
  • step 102 after the descrambling is successful and the decoding fails, the same PBCH symbol data to be merged with the buffered PBCH symbol data is acquired.
  • the PBCH symbol data to be merged includes the PBCH symbol data of the same beam as the beam of the synchronization block in the PBCH combining period and the PBCH symbol data of the adjacent beam, and the system frame number and corresponding synchronization of the PBCH symbol data to be merged.
  • the TI of the block is the same as the buffered PBCH symbol data. For example, if the scrambling code of the PBCH symbol data buffered in FIG. 1C is 0, the number of PBCH symbols carried in the synchronization block of labels 1-7 According to the PBCH symbol data to be merged.
  • step 103 the buffered PBCH symbol data is combined with the PBCH symbol data to be merged until the PBCH symbol data can be correctly decoded.
  • the buffered PBCH symbol data may be first combined with the PBCH symbol data of the adjacent beam in the same synchronization block set, and the PBCH symbol data of labels 0 and 1 are merged and merged as shown in FIG. 1C. Then, the decoding is performed, and if the decoding is still not successful, it is merged with the next 20 ms PBCH symbol data, such as the PBCH symbol data of labels 2 and 3.
  • those skilled in the art may understand that the user equipment may not be able to monitor the synchronization block of the adjacent beam.
  • the synchronization block of the adjacent beam cannot be monitored, only the same beam in the PBCH combining period may be merged.
  • the base station may punctate the transmission of the SSB according to the need of energy saving, that is, send the synchronization block once in a transmission interval in a certain direction, as shown in FIG. 1C. In a certain direction, only the sync blocks labeled 0, 1, 4, and 5 may be transmitted.
  • the user equipment may still perform the merge operation of the PBCH symbol data.
  • a base station 10 in the scenario shown in FIG. 1B, a base station 10, a user equipment (such as a smart phone, a tablet, etc.) 20 is included, wherein the base station 10 can have a PBCH symbol in the sync block.
  • the data carries the high N bits and the first low data bits of the system frame number and the high P bit of the sync block time indication bit, and N is 7 or 8, whereby the user equipment 20 may fail to decode the PBCH after receiving the sync block.
  • the PBCH symbol data to be merged is obtained based on the scrambling code, since the number of scrambling bits can be at least two or three bits, the TI and the system frame number of the synchronization block are effectively indicated by the PBCH symbol data, and the PBCH is implemented.
  • the symbol data merge decoding does not add too much descrambling complexity to the user equipment.
  • the TI and the system frame number of the synchronization block can be effectively indicated by the PBCH symbol data, and the decoding and decoding of the PBCH symbol data is not implemented, and the user equipment is not added with much large descrambling complexity. degree.
  • acquiring the PBCH symbol data to be merged with the buffered PBCH symbol data includes:
  • the PBCH symbol data to be merged is monitored in a transmission window of the PBCH symbol data to be merged.
  • the buffered PBCH symbol data is merged with the PBCH symbol data to be merged, include:
  • the merged PBCH symbol data is combined with the PBCH symbol data to be merged in the next synchronization block set in the PBCH combining period, and the decoding process is performed until the decoding succeeds or there is no PBCH symbol that can be merged in the PBCH combining period.
  • the data is up.
  • the PBCH merge period is 80 ms.
  • the PBCH merge period is 40 ms.
  • the method for determining the transmission time of the synchronization block may further include:
  • the PBCH symbol data includes a high N bit and a first low data bit of a system frame number and a high P bit of a sync block time indication bit, N is 7 or 8, and P is a natural number not greater than 5.
  • FIG. 2A is a flowchart of still another method for determining a transmission time of a synchronization block according to an exemplary embodiment
  • FIG. 2B is a method for acquiring PBCH symbol data to be merged with the buffered PBCH symbol data in the embodiment shown in FIG. 2A
  • FIG. 2C is a flowchart of a method for combining the buffered PBCH symbol data with the PBCH symbol data to be merged in the embodiment shown in FIG. 2A.
  • This embodiment uses the foregoing method provided by the embodiment of the present disclosure to How to determine the sending time of the sync block is exemplified as an example, as shown in FIG. 2A, including the following steps:
  • step 201 the sync block is listened to.
  • step 202 after the sync block is sensed, symbol synchronization is completed based on the primary sync signal and the secondary sync signal.
  • the main sync signal is first demodulated and decoded,
  • the secondary synchronization signal is demodulated and decoded, and symbol synchronization is performed based on the demodulated and decoded primary synchronization signal and the secondary synchronization signal.
  • step 203 the physical broadcast channel PBCH message carried in the synchronization block is descrambled and decoded, and the PBCH symbol data of the PBCH message is buffered.
  • step 203 can be referred to the description of step 101 of the embodiment shown in FIG. 1A, and will not be described in detail herein.
  • step 204 after the descrambling is successful and the decoding fails, the same PBCH symbol data to be merged with the buffered PBCH symbol data is acquired.
  • the method for obtaining the same PBCH symbol data to be merged with the buffered PBCH symbol data can be referred to the embodiment shown in FIG. 2B. As shown in FIG. 2B, the method includes the following steps:
  • step 211 the occurrence position of the sync block signal in the PBCH merge period is determined based on the scrambling code of the PBCH message.
  • the user equipment may determine that the PBCH symbol data is in the combining period based on the scrambling code of the received synchronization block. For example, referring to FIG. 1C, the number of scrambling digits is 3 bits, and when the user equipment receives the PBCH symbol data with the scrambling code of 1, the exact position of the symbol data in the 80 ms merge period is determined as the label in the figure. Carryed in a sync block of 1.
  • step 212 based on the appearance position, the PBCH symbol data to be merged with the buffered PBCH symbol data in the PBCH merge period is determined.
  • the PBCH symbol data to be merged includes PBCH symbol data of the same beam as the beam of the synchronization block in the PBCH combining period and PBCH symbol data of the adjacent beam.
  • step 213 the PBCH symbol data to be merged is monitored in the transmission window of the PBCH symbol data to be merged.
  • the system can generally agree that the location of the field sent by the synchronization block of the same cell remains unchanged. Therefore, after determining the PBCH symbol data to be merged, it can be determined that the next transmission period is to be combined.
  • the transmission window of the PBCH symbol data which in turn can listen to the synchronization block within 5 ms of the transmission window, and descrambles the PBCH symbol data to be merged.
  • step 205 the buffered PBCH symbol data is combined with the PBCH symbol data to be merged until the PBCH symbol data can be correctly decoded.
  • step 205 can be seen in the embodiment shown in FIG. 2C. As shown in FIG. 2C, the following steps are included:
  • step 221 the PBCH symbol data of the adjacent beam that is located in the same synchronization block set as the synchronization block is obtained.
  • step 223 is performed.
  • step 222 is performed.
  • step 222 the buffered PBCH symbol data is combined with the PBCH symbol data to be merged in the next synchronization block set in the PBCH combining period, and the decoding process is performed until the decoding succeeds or there is no PBCH symbol data that can be merged in the PBCH combining period. until.
  • step 223 the buffered PBCH symbol data is merged with the PBCH symbol data of the adjacent beams that are located in the same sync block set as the sync block.
  • step 224 the combined PBCH symbol data is subjected to decoding processing.
  • step 225 if the decoding fails, the combined PBCH symbol data is combined with the PBCH symbol data to be merged in the next synchronization block set in the PBCH combining period, and the decoding process is performed until the decoding succeeds or there is no PBCH combining period. It is possible to merge PBCH symbol data.
  • the PBCH message-based scrambling code can be used to determine the occurrence position of the PBCH symbol data in the merging period, and then the transmission window of the PBCH symbol data to be merged is determined, and the PBCH symbol to be merged is obtained.
  • the data is implemented to effectively indicate the TI and the system frame number of the synchronization block by using the PBCH symbol data, and does not add too much descrambling complexity to the user equipment on the basis of implementing the PBCH symbol data merge decoding.
  • FIG. 3 is a flowchart of a method for determining a transmission time of a synchronization block according to an exemplary embodiment; the method for determining a transmission time of a synchronization block may be applied to a base station, as shown in FIG.
  • the method of sending time includes the following steps 301-302:
  • step 301 the encoded PBCH symbol data is scrambled and modulated based on the agreed scrambling code to obtain a PBCH message.
  • the PBCH symbol data includes a high N bit and a first low data bit of the system frame number and a high P bit of the sync block time indication bit, N is 7 or 8, and P is a natural number not greater than 5.
  • bits other than the upper N bit and the first low data bit of the system frame number are used as scrambling codes, and the first low data bit of the sync block time indicating bit is used as a scrambling code for scrambling PBCH symbol data.
  • step 302 the synchronization block is sent according to the preset transmission mode, and the synchronization block carries the PBCH message.
  • the preset sending manner may be the first agreed manner, and the first agreed manner is used to indicate the basic
  • the hopping mode is used to send the Sync block in each direction.
  • the first stipulation mode is beneficial to save the base station resources.
  • the preset sending mode may be the second stipulated mode, and the second stipulated mode is used to indicate each one.
  • the sync block is transmitted in each direction during the sync block transmission period.
  • the base station 10 may be in PBCH symbol data of the synchronization block.
  • N Carrying the high N bit and the first low data bit of the system frame number and the high P bit of the sync block time indication bit, N is 7 or 8, whereby the user equipment 20 may fail to decode the PBCH after receiving the sync block.
  • the PBCH symbol data to be merged is obtained based on the scrambling code.
  • the number of scrambling bits can be at least two or three bits, the TI and the system frame number of the synchronization block are effectively indicated by the PBCH symbol data, and the PBCH symbol data is merged.
  • the decoding does not add too much descrambling complexity to the user equipment.
  • the TI and the system frame number of the synchronization block can be effectively indicated by the PBCH symbol data, and the PBCH symbol data is combined and decoded, and the user equipment is not added with much large descrambling complexity. degree.
  • sending the synchronization block based on the preset sending manner includes:
  • the synchronization block is sent according to the second convention mode, and the second convention mode is used to indicate that the synchronization block is sent in each direction in each synchronization block transmission period.
  • N is 7 or 8.
  • FIG. 4 is a flowchart of still another method for determining a transmission time of a synchronization block according to an exemplary embodiment.
  • This embodiment uses the foregoing method provided by the embodiment of the present disclosure to exemplify how to send a synchronization block. As shown in Figure 4, the following steps are included:
  • step 401 the coded PBCH symbol data is scrambled and modulated according to the agreed scrambling code to obtain a PBCH message, and step 402 or step 403 is performed.
  • the PBCH symbol data includes a high N bit and a first low data bit of the system frame number and a high P bit of the sync block time indication bit, N is 7 or 8, and P is a natural number not greater than 5.
  • step 402 the synchronization block is sent according to the first appointment manner, and the first appointment mode is used to indicate that the synchronization block in each direction is sent in a puncturing manner.
  • the PDCH merge period length is 80 ms, and the merged PBCH can be combined.
  • the sync block when N is 8, in order to ensure efficient combining of PBCH symbol data, the sync block is usually not transmitted in the first convention manner.
  • step 403 the synchronization block is sent according to the second appointment mode, and the second appointment mode is used to indicate that the synchronization block is sent in each direction in each synchronization block transmission period.
  • the synchronization block can be sent in a second manner.
  • the base station may perform puncturing of the transmission of the synchronization block according to the requirement of energy saving, that is, transmitting the synchronization block by using the first convention manner, and ensuring the implementation of the PBCH symbol data combining and decoding.
  • the base station resources can be saved.
  • FIG. 5 is a block diagram of an apparatus for determining a transmission time of a synchronization block, the apparatus being applied to a user equipment, as shown in FIG. 5, the apparatus for determining a transmission time of a synchronization block, according to an exemplary embodiment, includes:
  • the first processing module 51 is configured to perform descrambling and decoding processing on the physical broadcast channel PBCH message carried in the synchronization block, and buffer PBCH symbol data of the PBCH message;
  • the data acquisition module 52 is configured to acquire, after the first processing module 51 descrambles successfully and fails the decoding, the PBCH symbol data to be merged with the buffered PBCH symbol data, where the PBCH symbol data to be merged includes the synchronization block in the PBCH merge period.
  • the merging module 53 is configured to combine the buffered PBCH symbol data with the PBCH symbol data to be merged acquired by the data module until the PBCH symbol data can be correctly decoded.
  • FIG. 6 is a block diagram of another apparatus for determining a transmission time of a sync block according to an exemplary embodiment. As shown in FIG. 6, on the basis of the embodiment shown in FIG. 5 above, in an embodiment, data acquisition is performed.
  • Module 52 includes:
  • the location determining submodule 521 is configured to determine, according to the scrambling code of the PBCH message, an occurrence position of the synchronization block signal in the PBCH combining period;
  • the first determining submodule 522 is configured to determine PBCH symbol data to be merged with the same PBCH symbol data in the PBCH combining period based on the appearance position;
  • the listening sub-module 523 is configured to listen to the PBCH symbol data to be merged in a transmission window of the PBCH symbol data to be merged.
  • the merging module 53 comprises:
  • the obtaining submodule 531 is configured to acquire PBCH symbol data of an adjacent beam that is located in the same synchronization block set as the synchronization block;
  • the first merging sub-module 532 is configured to: after acquiring the PBCH symbol data of the adjacent beam in the same synchronization block set, the buffered PBCH symbol data and the adjacent beam in the same synchronization block set as the synchronization block. PBCH symbol data is merged;
  • the decoding sub-module 533 is configured to perform decoding processing on the PBCH symbol data that is merged by the first combining sub-module 532;
  • the second merging sub-module 534 is configured to combine the decoded PBCH symbol data with the PBCH symbol data to be merged in the next synchronization block set in the PBCH combining period, and decode the decoding if the decoding sub-module 533 fails to decode, until the decoding fails.
  • the decoding is successful or there is no PBCH symbol data that can be merged in the PBCH merge period.
  • the PBCH merge period is 80 ms.
  • the PBCH merge period is 40 ms.
  • the method further includes:
  • the listening module 54 is configured to listen to the synchronization block
  • the symbol synchronization module 55 is configured to complete symbol synchronization based on the primary synchronization signal and the secondary synchronization signal after the monitoring module listens to the synchronization block.
  • the PBCH symbol data includes a high N bit and an Mth low data bit of the system frame number and a high P bit of the sync block time indication bit, N is 7 or 8, and P is a natural number not greater than 5.
  • FIG. 7 is a block diagram of an apparatus for determining a transmission time of a synchronization block, where the apparatus is applied to a base station, as shown in FIG. 7, the apparatus for determining a transmission time of a synchronization block, according to an exemplary embodiment, includes:
  • the second processing module 71 is configured to perform scrambling and modulation processing on the encoded PBCH symbol data based on the agreed scrambling code to obtain a PBCH message, where the PBCH symbol data includes a high N bit and a first low data bit of the system frame number. And a high P bit of the sync block time indication bit, P being a natural number not greater than 5;
  • the sending module 72 is configured to send a synchronization block according to a preset sending manner, where the synchronization block carries a PBCH message.
  • FIG. 8 is a block diagram of another apparatus for determining a transmission time of a sync block, as shown in FIG. 8, on the basis of the embodiment shown in FIG. 7 above, in an embodiment, according to an exemplary embodiment.
  • Module 72 includes:
  • the first sending submodule 721 is configured to send the synchronization block according to the first appointment manner, where the first appointment mode is used to indicate that the synchronization block in each direction is sent according to the puncturing manner; or
  • the second sending submodule 722 is configured to send the synchronization block according to the second agreed mode, where the second appointment mode is used to indicate that the synchronization block is sent in each direction in each synchronization block transmission period.
  • N is 7 or 8.
  • FIG. 9 is a block diagram of an apparatus suitable for determining a transmission time of a sync block, according to an exemplary embodiment.
  • Apparatus 900 can be provided as a base station.
  • device 900 includes a processing component 922, a wireless transmit/receive component 924, an antenna component 926, and a signal processing portion specific to the wireless interface.
  • Processing component 922 can further include one or more processors.
  • One of the processing components 922 can be configured to perform the method of determining the transmission time of the synchronization block described above.
  • non-transitory computer readable storage medium comprising instructions executable by processing component 922 of apparatus 900 to perform the method described in the second aspect above.
  • the non-transitory computer readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, and an optical data storage device.
  • FIG. 10 is a block diagram of an apparatus suitable for determining a transmission time of a sync block, according to an exemplary embodiment.
  • device 1000 can be a mobile device, such as a smart phone.
  • apparatus 1000 can include one or more of the following components: processing component 1002, memory 1004, power component 1006, multimedia component 1008, audio component 1010, input/output (I/O) interface 1012, sensor component 1014, And a communication component 1016.
  • Processing component 1002 typically controls the overall operation of device 1000, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations.
  • Processing component 1002 can include one or more processors 1020 to execute instructions to perform all or part of the steps of the above described methods.
  • processing component 1002 can include one or more modules to facilitate interaction between component 1002 and other components.
  • processing component 1002 can include a multimedia module to facilitate interaction between multimedia component 1008 and processing component 1002.
  • the memory 1004 is configured to store various types of data to support operation at the device 1000. Examples of such data include instructions, messages, pictures, etc. for any application or method operating on device 1000.
  • the memory 1004 can be implemented by any type of volatile or non-volatile storage device, or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read only memory (EEPROM), erasable. Programmable Read Only Memory (EPROM), Programmable Read Only Memory (PROM), Read Only Memory (ROM), Magnetic Memory, Flash Memory, Disk or Optical Disk.
  • SRAM static random access memory
  • EEPROM electrically erasable programmable read only memory
  • EPROM Programmable Read Only Memory
  • PROM Programmable Read Only Memory
  • ROM Read Only Memory
  • Magnetic Memory Flash Memory
  • Disk Disk or Optical Disk.
  • Power component 1006 provides power to various components of device 1000.
  • Power component 1006 can include a power management system, one or more power sources, and other components associated with generating, managing, and distributing power for device 1000.
  • the multimedia component 1008 includes a screen between the device 1000 and the user that provides an output interface.
  • the screen can include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen can be implemented as a touch screen to receive input signals from the user.
  • the touch panel includes one or more touch sensors to sense touches, slides, and gestures on the touch panel. The touch sensor can sense not only the boundaries of the touch or sliding action, but also the duration and pressure associated with the touch or slide operation.
  • the multimedia component 1008 includes a front camera and/or a rear camera. When the device 1000 is in an operation mode, such as a shooting mode or a video mode, the front camera and/or the rear camera can receive external multimedia data. Each front and rear camera can be a fixed optical lens system or have focal length and optical zoom capabilities.
  • the audio component 1010 is configured to output and/or input an audio signal.
  • the audio component 1010 includes a microphone (MIC) that is configured to receive an external audio signal when the device 1000 is in an operational mode, such as a call mode, a recording mode, and a voice recognition mode.
  • the received audio signal may be further stored in memory 1004 or transmitted via communication component 1016.
  • the audio component 1010 also includes a speaker for outputting an audio signal.
  • the I/O interface 1012 provides an interface between the processing component 1002 and the peripheral interface module, which may be a keyboard, a click wheel, a button, or the like. These buttons may include, but are not limited to, a home button, a volume button, a start button, and a lock button.
  • Sensor assembly 1014 includes one or more sensors for providing device 1000 with various aspects of state assessment.
  • the sensor assembly 1014 can detect an open/closed state of the device 1000, the relative positioning of the components, such as a display and a keypad of the device 1000, and the sensor assembly 1014 can also detect a change in position of a component of the device 1000 or device 1000, the user The presence or absence of contact with device 1000, device 1000 orientation or acceleration/deceleration and temperature variation of device 1000.
  • Sensor assembly 1014 can include a proximity sensor configured to detect the presence of nearby objects without any physical contact.
  • Sensor assembly 1014 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications.
  • the sensor assembly 1014 can also include an acceleration sensor, a gyro sensor, a magnetic sensor, a distance sensor, a pressure sensor, or a temperature sensor.
  • Communication component 1016 is configured to facilitate wired or wireless communication between device 1000 and other devices.
  • the device 1000 can access a wireless network based on a communication standard, such as WIFI, 2G or 3G, or a combination thereof.
  • the communication component 1016 receives a broadcast signal or broadcast associated information from an external broadcast management system via a broadcast channel.
  • communication component 1016 also includes a near field communication (NFC) module to facilitate short range communication.
  • NFC near field communication
  • the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.
  • RFID radio frequency identification
  • IrDA infrared data association
  • UWB ultra-wideband
  • Bluetooth Bluetooth
  • apparatus 1000 may be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable A gate array (FPGA), controller, microcontroller, microprocessor or other electronic component implementation for performing the above-described method of determining the transmission time of a sync block.
  • ASICs application specific integrated circuits
  • DSPs digital signal processors
  • DSPDs digital signal processing devices
  • PLDs programmable logic devices
  • FPGA field programmable A gate array
  • controller microcontroller, microprocessor or other electronic component implementation for performing the above-described method of determining the transmission time of a sync block.
  • non-transitory computer readable storage medium comprising instructions, such as a memory 1004 comprising instructions executable by processor 1020 of apparatus 1000 to perform the operations described above in the first aspect method.
  • the non-transitory computer readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, and an optical data storage device.

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Abstract

本公开是关于一种确定同步块的发送时间的方法、装置、用户设备及基站。方法包括:对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且缓存PBCH消息的PBCH符号数据;在解扰成功并且解码失败后,获取与缓存的PBCH符号数据相同的待合并PBCH符号数据,待合并PBCH符号数据包括PBCH合并周期中与同步块所在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据;将缓存的PBCH符号数据与待合并PBCH符号数据进行合并。本公开技术方可以实现5G系统中有效地指示同步块的发送时间以及系统帧号,并且在没有增加UE复杂度的基础上实现PBCH符号数据的合并。

Description

确定同步块的发送时间的方法、装置、用户设备及基站 技术领域
本公开涉及无线通信技术领域,尤其涉及一种确定同步块的发送时间的方法、装置、用户设备及基站。
背景技术
相关技术中,在第五代移动通信技术(5th Generation,简称为5G)项目的研究讨论中,引入了基于波束扫描的同步块以及同步块集合来实现用户设备(User Equipment,简称为UE)的符号同步和帧同步的同步配置方案,在这个同步配置方案中,最长20ms的同步块集合周期中的所有同步块需要在5ms内全部发送出去,每一个同步块中携带有物理广播信道(Physical Broadcast Channel,简称为PBCH)消息,PBCH消息的传输时间间隔(Transmission Time Interval,简称为TTI)是约定好的。
相关技术中,用户设备在接收到一个同步块之后,可以基于同步块中的主同步信号和辅同步信号实现符号级定时,但是用户设备无法从同步信号中获得同步块集合在20ms的发送周期中的哪一个无线帧以及一个无线帧的哪个5ms内哪个具体的时隙或子帧发送的同步块的时间指示(Timing Index,简称为TI)信息。在5G项目的研究讨论中,设计用户设备主要通过PBCH消息获得这些同步信息,但是PBCH资源非常有限因此5G系统中需要提出一种在不浪费PBCH资源和不增加用户设备的解码复杂度的前提下,实现基于PBCH消息指示同步块的TI信息和系统帧号的技术方案。
发明内容
为克服相关技术中存在的问题,本公开实施例提供一种确定同步块的发送时间的方法、装置、用户设备及基站,用以有效指示同步块的TI和系统帧号。
根据本公开实施例的第一方面,提供一种确定同步块的发送时间的方法,包括:
对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且在解调之前缓存所述PBCH消息的PBCH符号数据;
在解扰成功并且解码失败后,获取与所述缓存的PBCH符号数据相同的待合并PBCH符号数据,所述待合并PBCH符号数据包括PBCH合并周期中与所述同步块所在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据;
将所述缓存的PBCH符号数据与待合并PBCH符号数据进行合并,直至能正确解码所述PBCH符号数据。
在一实施例中,获取与所述缓存的PBCH符号数据相同的待合并PBCH符号数据,包括:
基于所述PBCH消息的扰码确定所述同步块信号在PBCH合并周期中的出现位置;
基于所述出现位置,确定所述PBCH合并周期中与所述缓存的PBCH符号数据相同的待合并PBCH符号数据;
在所述待合并PBCH符号数据的发送窗口内监听所述待合并PBCH符号数据。
在一实施例中,将所述缓存的PBCH符号数据与待合并PBCH符号数据进行合并,包括:
获取与所述同步块位于同一个同步块集合中的相邻波束的PBCH符号数据;
在获取到所述同一个同步块集合中的相邻波束的PBCH符号数据之后,将所述缓存的PBCH符号数据和与所述同步块位于同一个同步块集合中的相邻波束的PBCH符号数据进行合并;
对合并后的PBCH符号数据进行解码处理;
若解码失败,则将所述合并后的PBCH符号数据与PBCH合并周期中的下一个同步块集合中的待合并PBCH符号数据进行合并以及解码处理,直至解码成功或者所述PBCH合并周期内没有能够合并的PBCH符号数据为止。
在一实施例中,当所述扰码位为2位系统帧号位和1位同步块时间指示位时,所述PBCH合并周期为80ms。
在一实施例中,当所述扰码位为1位系统帧号位和1位同步块时间指示位时,所述PBCH合并周期为40ms。
在一实施例中,所述对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理之前,还包括:
监听所述同步块;
在监听到所述同步块之后,基于主同步信号和辅同步信号完成符号同步。
在一实施例中,所述PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,N为7或者8,P为不大于5的自然数。
根据本公开实施例的第二方面,提供一种确定同步块的发送时间的方法,方法包括:
基于约定的扰码对编码后的PBCH符号数据进行加扰和调制处理,得到PBCH消息,所述PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,P为不大于5的自然数;
基于预设发送方式发送同步块,所述同步块中携带有所述PBCH消息。
在一实施例中,基于预设发送方式发送同步块,包括:
基于第一约定方式发送所述同步块,所述第一约定方式用于指示基于打孔的方式发送每一个方向上的同步块;或者,
基于第二约定方式发送所述同步块,所述第二约定方式用于指示每一个同步块发送周期内均在每一个方向上发送同步块。
在一实施例中,N为7或者8。
根据本公开实施例的第三方面,提供一种确定同步块的发送时间的装置,装置包括:
第一处理模块,被配置为对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且在解调之前缓存所述PBCH消息的PBCH符号数据;
数据获取模块,被配置为在所述第一处理模块解扰成功并且解码失败后,获取与所述缓存的PBCH符号数据相同的待合并PBCH符号数据,所述待合并PBCH符号数据包括PBCH合并周期中与所述同步块所在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据;
合并模块,被配置为将所述缓存的PBCH符号数据与所述数据模块获取的所述待合并PBCH符号数据进行合并,直至能正确解码所述PBCH符号数据。
在一实施例中,数据获取模块包括:
位置确定子模块,被配置为基于所述PBCH消息的扰码确定所述同步块信号在PBCH合并周期中的出现位置;
第一确定子模块,被配置为基于所述出现位置,确定所述PBCH合并周期中与所述缓存的PBCH符号数据相同的待合并PBCH符号数据;
监听子模块,被配置为在所述待合并PBCH符号数据的发送窗口内监听所述待合并PBCH符号数据。
在一实施例中,合并模块包括:
获取子模块,被配置为获取与所述同步块位于同一个同步块集合中的相邻波束的PBCH符号数据;
第一合并子模块,被配置为在获取到所述同一个同步块集合中的相邻波束的 PBCH符号数据之后,将所述缓存的PBCH符号数据和与所述同步块位于同一个同步块集合中的相邻波束的PBCH符号数据进行合并;
解码子模块,被配置为对所述第一合并子模块合并后的PBCH符号数据进行解码处理;
第二合并子模块,被配置为若所述解码子模块解码失败,将所述合并后的PBCH符号数据与PBCH合并周期中的下一个同步块集合中的待合并PBCH符号数据进行合并以及解码处理,直至解码成功或者所述PBCH合并周期内没有能够合并的PBCH符号数据为止。
在一实施例中,当所述扰码位为2位系统帧号位和1位同步块时间指示位时,所述PBCH合并周期为80ms。
在一实施例中,当所述扰码位为1位系统帧号位和1位同步块时间指示位时,所述PBCH合并周期为40ms。
在一实施例中,还包括:
监听模块,被配置为监听所述同步块;
符号同步模块,被配置为在所述监听模块监听到所述同步块之后,基于主同步信号和辅同步信号完成符号同步。
在一实施例中,PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,N为7或者8,P为不大于5的自然数。
根据本公开实施例的第四方面,提供一种确定同步块的发送时间的装置,装置包括:
第二处理模块,被配置为基于约定的扰码对编码后的PBCH符号数据进行加扰和调制处理,得到PBCH消息,所述PBCH符号数据中包括系统帧号的高N位和第M低数据位以及同步块时间指示位的高P位,P为不大于5的自然数;
发送模块,被配置为基于预设发送方式发送同步块,所述同步块中携带有所述PBCH消息。
在一实施例中,发送模块包括:
第一发送子模块,被配置为基于第一约定方式发送所述同步块,所述第一约定方式用于指示基于打孔的方式发送每一个方向上的同步块;或者,
第二发送子模块,被配置为基于第二约定方式发送所述同步块,所述第二约定方式用于指示每一个同步块发送周期内均在每一个方向上发送同步块。
在一实施例中,N为7或者8。
根据本公开实施例的第五方面,提供用户设备,包括:
处理器;
用于存储处理器可执行指令的存储器;
其中,所述处理器被配置为:
对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且在解调之前缓存所述PBCH消息的PBCH符号数据;
在解扰成功并且解码失败后,获取与所述缓存的PBCH符号数据相同的待合并PBCH符号数据,所述待合并PBCH符号数据包括PBCH合并周期中与所述同步块所在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据;
将所述缓存的PBCH符号数据与待合并PBCH符号数据进行合并,直至能正确解码所述PBCH符号数据。
根据本公开实施例的第六方面,提供一种基站,包括:
处理器;
用于存储处理器可执行指令的存储器;
其中,所述处理器被配置为:
基于约定的扰码对编码后的PBCH符号数据进行加扰和调制处理,得到PBCH消息,所述PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,P为不大于5的自然数;
基于预设发送方式发送同步块,所述同步块中携带有所述PBCH消息。
根据本公开实施例的第七方面,提供一种非临时计算机可读存储介质,所述存储介质上存储有计算机指令,所述指令被处理器执行时实现以下步骤:
对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且在解调之前缓存所述PBCH消息的PBCH符号数据;
在解扰成功并且解码失败后,获取与所述缓存的PBCH符号数据相同的待合并PBCH符号数据,所述待合并PBCH符号数据包括PBCH合并周期中与所述同步块所在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据;
将所述缓存的PBCH符号数据与待合并PBCH符号数据进行合并,直至能正确解码所述PBCH符号数据。
根据本公开实施例的第八方面,提供一种非临时计算机可读存储介质,所述存储介质上存储有计算机指令,所述指令被处理器执行时实现以下步骤:
基于约定的扰码对编码后的PBCH符号数据进行加扰和调制处理,得到PBCH 消息,所述PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,P为不大于5的自然数;
基于预设发送方式发送同步块,所述同步块中携带有所述PBCH消息。
本公开实施例提供的技术方案可以包括以下有益效果:
基站可以在同步块的PBCH符号数据中携带系统帧号的高N位和第M低数据位以及同步块时间指示位的高P位,N为7或者8,由此用户设备在接收到同步块后,可以在解码PBCH失败时,基于扰码获取待合并的PBCH符号数据,由于扰码位数为最少可以为两位或者三位,因此实现了通过PBCH符号数据有效指示同步块的TI和系统帧号,并且在实现PBCH符号数据合并解码的基础上没有给用户设备增加太大的解扰复杂度。
应当理解的是,以上的一般描述和后文的细节描述仅是示例性和解释性的,并不能限制本公开。
附图说明
此处的附图被并入说明书中并构成本说明书的一部分,示出了符合本发明的实施例,并与说明书一起用于解释本发明的原理。
图1A是根据一示例性实施例示出的一种确定同步块的发送时间的方法的流程图。
图1B是根据一示例性实施例示出的一种确定同步块的发送时间的方法的场景图。
图1C是根据一示例性实施例示出的一种确定同步块的发送时间的方法的示意图一。
图1D是根据一示例性实施例示出的一种确定同步块的发送时间的方法的示意图二。
图1E是根据一示例性实施例示出的同步块的结构示意图。
图2A是根据一示例性实施例示出的又一种确定同步块的发送时间的方法的流程图。
图2B是图2A所示实施例中获取与所述缓存的PBCH符号数据相同的待合并PBCH符号数据的方法流程图。
图2C是图2A所示实施例中将所述缓存的PBCH符号数据与待合并PBCH符 号数据进行合并的方法流程图。
图3是根据一示例性实施例示出的一种确定同步块的发送时间的方法的流程图。
图4是根据一示例性实施例示出的又一种确定同步块的发送时间的方法的流程图。
图5是根据一示例性实施例示出的一种确定同步块的发送时间的装置的框图。
图6是根据一示例性实施例示出的另一种确定同步块的发送时间的装置的框图。
图7是根据一示例性实施例示出的一种确定同步块的发送时间的装置的框图。
图8是根据一示例性实施例示出的另一种确定同步块的发送时间的装置的框图。
图9是根据一示例性实施例示出的一种适用于确定同步块的发送时间的装置的框图。
图10是根据一示例性实施例示出的一种适用于确定同步块的发送时间的装置的框图。
具体实施方式
这里将详细地对示例性实施例进行说明,其示例表示在附图中。下面的描述涉及附图时,除非另有表示,不同附图中的相同数字表示相同或相似的要素。以下示例性实施例中所描述的实施方式并不代表与本发明相一致的所有实施方式。相反,它们仅是与如所附权利要求书中所详述的、本发明的一些方面相一致的装置和方法的例子。
图1A是根据一示例性实施例示出的一种确定同步块的发送时间的方法的流程图,图1B是根据一示例性实施例示出的一种确定同步块的发送时间的方法的场景图。
图1C是根据一示例性实施例示出的一种确定同步块的发送时间的方法的示意图一,图1D是根据一示例性实施例示出的一种确定同步块的发送时间的方法的示意图二,图1E是根据一示例性实施例示出的同步块的结构示意图;该确定同步块的发送时间的方法可以应用在用户设备上,如图1A所示,该确定同步块的发送时间的方法包括以下步骤101-103:
在步骤101中,对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且缓存PBCH消息的PBCH符号数据。
在一实施例中,同步块的结构可参见图1E,包括主同步信号、辅同步信号PBCH消息以及穿插在频域上的解调参考信号(Demodulation Reference Signal,简称为DMRS)。
在一实施例中,在解扰PBCH消息之后,可以在解调之前缓存所得到的PBCH 符号数据,PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,N为7或者8。
在一实施例中,同步块中携带的PBCH消息的传输时间间隔为80ms,PBCH消息中包括系统帧号的高N位和第1低数据位,以及同步块的TI的高P位,除了显性显示的同步块的TI的高P位以及系统帧号的高N位和第1低数据位之外,其他的TI数据位和系统帧号位为隐含位,用于加扰PBCH符号数据。
在一实施例中,P可以取值为不大于5的自然数,通常为了减小用户设备的解扰的复杂度,显性显示的TI位数越高越好,例如P取值为5时,隐形显示的TI位数为第1低数据位,本申请中后续以P为5作为一个可选实施例进行描述,但是P的数值并不限定为5。
在一实施例中,当N为7时,隐含位可以包括3bit,分别为系统帧号的第2、第3低数据位以及同步块时间指示位的第1低数据位,3bit隐含有8种可能性,扰码可以分别是0、1、2、3、4、5、6、7,PBCH合并周期为80ms,表示4个20ms,即在80ms的周期内,有8个PBCH消息是相同的。UE收到同步块之后,基于能够成功解码PBCH消息的扰码可以确定同步块在PBCH合并周期中的出现位置。参见图1C,以隐含位为系统帧号的第2、第3低数据位以及同步块时间指示位的第1低数据位进行示意,图中0、1、2、3、4、5、6、7所标记的同步块中携带的PBCH符号数据为能够用来合并的PBCH符号数据。
在一实施例中,当N为8时,隐含位可以包括2bit,分别为系统帧号的第2低数据位以及同步块时间指示位的第1低数据位,2bit隐含有4种可能性,扰码可以分别是0、1、2、3,PBCH合并周期为40ms,表示2个20ms,即在40ms的周期内,有4个PBCH消息是相同的。UE收到同步块之后,基于能够成功解码PBCH消息的扰码可以确定同步块在PBCH合并周期中的出现位置。参见图1D,以隐含位为系统帧号的第2低数据位以及同步块时间指示位的第1低数据位进行示意,图中0、1、2、3所标记的同步块为能够用来合并的同步块。
在步骤102中,在解扰成功并且解码失败后,获取与缓存的PBCH符号数据相同的待合并PBCH符号数据。
在一实施例中,待合并PBCH符号数据包括PBCH合并周期中与同步块所在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据,待合并的PBCH符号数据的系统帧号与对应同步块的TI与所缓存的PBCH符号数据的相同,例如,图1C中所缓存的PBCH符号数据的扰码为0,则标号1-7的同步块中携带的PBCH符号数 据为待合并PBCH符号数据。
在步骤103中,将缓存的PBCH符号数据与待合并PBCH符号数据进行合并,直至能正确解码PBCH符号数据。
在一实施例中,可首先将所缓存的PBCH符号数据与同一个同步块集合中的相邻波束的PBCH符号数据进行合并,如图1C中的标号0和1的PBCH符号数据进行合并,合并之后进行解码,如果仍然不能成功解码,则再和下一个20ms的PBCH符号数据进行合并,如与标号2、3的PBCH符号数据进行合并。
在一实施例中,本领域技术人员可以理解的是,用户设备可能无法监听到相邻波束的同步块,在无法监听到相邻波束的同步块时,可以只合并PBCH合并周期中的相同波束下监听到的同步块携带的PBCH符号数据。
在一实施例中,在PBCH合并周期为80ms时,基站可能会基于节能的需要,对SSB的发送进行打孔,也即在某一个方向上间隔一个发送周期发送一次同步块,参见图1C,在某个方向上,可以只发送标号为0、1、4、5的同步块,在这种前提下,在80ms的PBCH周期中,用户设备仍可执行PBCH符号数据的合并操作。
在一示例性场景中,如图1B所示,在图1B所示的场景中,包括基站10、用户设备(如智能手机、平板电脑等)20,其中,基站10可以在同步块的PBCH符号数据中携带系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,N为7或者8,由此用户设备20在接收到同步块后,可以在解码PBCH失败时,基于扰码获取待合并的PBCH符号数据,由于扰码位数为最少可以为两位或者三位,因此实现了通过PBCH符号数据有效指示同步块的TI和系统帧号,并且在实现PBCH符号数据合并解码的基础上没有给用户设备增加太大的解扰复杂度。
本实施例通过上述步骤101-步骤103,可以实现通过PBCH符号数据有效指示同步块的TI和系统帧号,并且在实现PBCH符号数据合并解码的基础上没有给用户设备增加太大的解扰复杂度。
在一实施例中,获取与缓存的PBCH符号数据相同的待合并PBCH符号数据,包括:
基于PBCH消息的扰码确定同步块信号在PBCH合并周期中的出现位置;
基于出现位置,确定PBCH合并周期中与缓存的PBCH符号数据相同的待合并PBCH符号数据;
在待合并PBCH符号数据的发送窗口内监听待合并PBCH符号数据。
在一实施例中,将缓存的PBCH符号数据与待合并PBCH符号数据进行合并, 包括:
获取与同步块位于同一个同步块集合中的相邻波束的PBCH符号数据;
在获取到同一个同步块集合中的相邻波束的PBCH符号数据之后,将缓存的PBCH符号数据和与同步块位于同一个同步块集合中的相邻波束的PBCH符号数据进行合并;
对合并后的PBCH符号数据进行解码处理;
若解码失败,则将合并后的PBCH符号数据与PBCH合并周期中的下一个同步块集合中的待合并PBCH符号数据进行合并以及解码处理,直至解码成功或者PBCH合并周期内没有能够合并的PBCH符号数据为止。
在一实施例中,当扰码位为2位系统帧号位和1位同步块时间指示位时,PBCH合并周期为80ms。
在一实施例中,当扰码位为1位系统帧号位和1位同步块时间指示位时,PBCH合并周期为40ms。
在一实施例中,对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理之前,确定同步块的发送时间的方法进一步还可以包括:
监听同步块;
在监听到同步块之后,基于主同步信号和辅同步信号完成符号同步。
在一实施例中,所述PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,N为7或者8,P为不大于5的自然数。
具体如何确定同步块的发送时间的,请参考后续实施例。
下面以具体实施例来说明本公开实施例提供的技术方案。
图2A是根据一示例性实施例示出的又一种确定同步块的发送时间的方法的流程图,图2B是图2A所示实施例中获取与缓存的PBCH符号数据相同的待合并PBCH符号数据的方法流程图,图2C是图2A所示实施例中将缓存的PBCH符号数据与待合并PBCH符号数据进行合并的方法流程图;本实施例利用本公开实施例提供的上述方法,以如何UE如何确定同步块的发送时间为例进行示例性说明,如图2A所示,包括如下步骤:
在步骤201中,监听同步块。
在步骤202中,在监听到同步块之后,基于主同步信号和辅同步信号完成符号同步。
在一实施例中,在接收到同步块之后,首先对主同步信号进行解调和解码,然 后对辅同步信号进行解调和解码,基于解调和解码后的主同步信号和辅同步信号完成符号同步。
在步骤203中,对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且缓存PBCH消息的PBCH符号数据。
在一实施例中,步骤203的描述可参见图1A所示实施例的步骤101的描述,这里不再详述。
在步骤204中,在解扰成功并且解码失败后,获取与缓存的PBCH符号数据相同的待合并PBCH符号数据。
在一实施例中,获取与缓存的PBCH符号数据相同的待合并PBCH符号数据的方法可参见图2B所示实施例,如图2B所示,包括以下步骤:
在步骤211中,基于PBCH消息的扰码确定同步块信号在PBCH合并周期中的出现位置。
在一实施例中,基于扰码的位数,可以确定出PBCH合并周期中有几个PBCH消息是相同的,因而用户设备可以基于收到的同步块的扰码确定PBCH符号数据在合并周期中的位置,例如,参见图1C,扰码位数为3bit,用户设备在收到扰码为1的PBCH符号数据时,即可确定出这个符号数据在80ms合并周期中的确切位置为图中标号为1的同步块中携带。
在步骤212中,基于出现位置,确定PBCH合并周期中与缓存的PBCH符号数据相同的待合并PBCH符号数据。
在一实施例中,待合并PBCH符号数据包括PBCH合并周期中与同步块所在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据。
在步骤213中,在待合并PBCH符号数据的发送窗口内监听待合并PBCH符号数据。
在一实施例中,通常系统可以约定同一个小区的同步块发送的半帧位置保持不变,由此,在确定出待合并PBCH符号数据之后,即可确定出下一个发送周期内发送待合并PBCH符号数据的发送窗口,进而可以在发送窗口的5ms的时间内监听同步块,并且解扰获取待合并PBCH符号数据。
在步骤205中,将缓存的PBCH符号数据与待合并PBCH符号数据进行合并,直至能正确解码PBCH符号数据。
在一实施例中,步骤205的描述可参见图2C所示实施例,如图2C所示,包括以下步骤:
在步骤221中,获取与同步块位于同一个同步块集合中的相邻波束的PBCH符号数据,在获取到同一个同步块集合中的相邻波束的PBCH符号数据时,执行步骤223,在没有获取同一个同步块集合中的相邻波束的PBCH符号数据时,执行步骤222。
例如,参见图1C,如果当前所缓存的PBCH符号数据为扰码为0的同步块中的PBCH符号数据,并且监听到了相邻波束的扰码为1的同步块中的PBCH符号数据,则可首先将两个PBCH符号数据做合并。
在步骤222中,将缓存的PBCH符号数据与PBCH合并周期中的下一个同步块集合中的待合并PBCH符号数据进行合并以及解码处理,直至解码成功或者PBCH合并周期内没有能够合并的PBCH符号数据为止。
在步骤223中,将缓存的PBCH符号数据和与同步块位于同一个同步块集合中的相邻波束的PBCH符号数据进行合并。
在步骤224中,对合并后的PBCH符号数据进行解码处理。
在步骤225中,若解码失败,则将合并后的PBCH符号数据与PBCH合并周期中的下一个同步块集合中的待合并PBCH符号数据进行合并以及解码处理,直至解码成功或者PBCH合并周期内没有能够合并的PBCH符号数据为止。
本实施例中,通过上述步骤201-步骤205,可以实现基于PBCH消息的扰码确定PBCH符号数据在合并周期中的出现位置,进而确定出待合并PBCH符号数据的发送窗口,获取待合并PBCH符号数据,实现通过PBCH符号数据有效指示同步块的TI和系统帧号,并且在实现PBCH符号数据合并解码的基础上没有给用户设备增加太大的解扰复杂度。
图3是根据一示例性实施例示出的一种确定同步块的发送时间的方法的流程图;该确定同步块的发送时间的方法可以应用在基站上,如图3所示,该确定同步块的发送时间的方法包括以下步骤301-302:
在步骤301中,基于约定的扰码对编码后的PBCH符号数据进行加扰和调制处理,得到PBCH消息。
在一实施例中,PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,N为7或者8,P为不大于5的自然数。
在一实施例中,除系统帧号的高N位和第1低数据位之外的其他位用作扰码,同步块时间指示位的第1低数据位用作扰码,用来加扰PBCH符号数据。
在步骤302中,基于预设发送方式发送同步块,同步块中携带有PBCH消息。
在一实施例中,预设发送方式可以为第一约定方式,第一约定方式用于指示基 于打孔的方式发送每一个方向上的同步块,第一约定方式有益于节约基站资源;在一实施例中,预设发送方式可以为第二约定方式,第二约定方式用于指示每一个同步块发送周期内均在每一个方向上发送同步块。
在一示例性场景中,如图1B所示,在图1B所示的场景中,包括基站10、用户设备(如智能手机、平板电脑等)20,基站10可以在同步块的PBCH符号数据中携带系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,N为7或者8,由此用户设备20在接收到同步块后,可以在解码PBCH失败时,基于扰码获取待合并的PBCH符号数据,由于扰码位数最少可以为两位或者三位,因此实现了通过PBCH符号数据有效指示同步块的TI和系统帧号,并且在实现PBCH符号数据合并解码的基础上没有给用户设备增加太大的解扰复杂度。
本实施例通过上述步骤301-步骤303,可以实现通过PBCH符号数据有效指示同步块的TI和系统帧号,并且在实现PBCH符号数据合并解码的基础上没有给用户设备增加太大的解扰复杂度。
在一实施例中,基于预设发送方式发送同步块,包括:
基于第一约定方式发送同步块,第一约定方式用于指示基于打孔的方式发送每一个方向上的同步块;或者,
基于第二约定方式发送同步块,第二约定方式用于指示每一个同步块发送周期内均在每一个方向上发送同步块。
在一实施例中,N为7或者8。
具体如何确定同步块的发送时间的,请参考后续实施例。
下面以具体实施例来说明本公开实施例提供的技术方案。
图4是根据一示例性实施例示出的又一种确定同步块的发送时间的方法的流程图;本实施例利用本公开实施例提供的上述方法,以如何发送同步块为例进行示例性说明,如图4所示,包括如下步骤:
在步骤401中,基于约定的扰码对编码后的PBCH符号数据进行加扰和调制处理,得到PBCH消息,执行步骤402或步骤403。
在一实施例中,PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,N为7或者8,P为不大于5的自然数。
在步骤402中,基于第一约定方式发送同步块,第一约定方式用于指示基于打孔的方式发送每一个方向上的同步块。
在一实施例中,在N为7时,PDCH合并周期长度为80ms,能够合并的PBCH 符号数据有8个,而通常PBCH不需要合并这么多PBCH符号数据即可实现成功解码,因此可采用打孔的方式发送每一个方向上的同步块,参见图1C,在80ms的周期内,某个方向上可以只发送0、1、4、5同步块,而不发送2、3、6、7,进而节约基站资源。
在一实施例中,当N为8时,为了确保PBCH符号数据的有效合并,通常不采用第一约定方式发送同步块。
在步骤403中,基于第二约定方式发送同步块,第二约定方式用于指示每一个同步块发送周期内均在每一个方向上发送同步块。
在一实施例中,在N为7或者N为8时,都可以采用第二约定方式发送同步块。
本实施例中,通过上述步骤401-步骤403,基站可以根据节能的需求,对同步块的发送进行打孔,也就是采用第一约定方式发送同步块,在保证实现PBCH符号数据合并解码的基础上,又可以节约基站资源。
图5是根据一示例性实施例示出的一种确定同步块的发送时间的装置的框图,该装置应用在用户设备上,如图5所示,确定同步块的发送时间的装置包括:
第一处理模块51,被配置为对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且缓存PBCH消息的PBCH符号数据;
数据获取模块52,被配置为在第一处理模块51解扰成功并且解码失败后,获取与缓存的PBCH符号数据相同的待合并PBCH符号数据,待合并PBCH符号数据包括PBCH合并周期中与同步块所在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据;
合并模块53,被配置为将缓存的PBCH符号数据与数据模块获取的待合并PBCH符号数据进行合并,直至能正确解码PBCH符号数据。
图6是根据一示例性实施例示出的另一种确定同步块的发送时间的装置的框图,如图6示,在上述图5所示实施例的基础上,在一实施例中,数据获取模块52包括:
位置确定子模块521,被配置为基于PBCH消息的扰码确定同步块信号在PBCH合并周期中的出现位置;
第一确定子模块522,被配置为基于出现位置,确定PBCH合并周期中与缓存的PBCH符号数据相同的待合并PBCH符号数据;
监听子模块523,被配置为在待合并PBCH符号数据的发送窗口内监听待合并PBCH符号数据。
在一实施例中,合并模块53包括:
获取子模块531,被配置为获取与同步块位于同一个同步块集合中的相邻波束的PBCH符号数据;
第一合并子模块532,被配置为在获取到同一个同步块集合中的相邻波束的PBCH符号数据之后,将缓存的PBCH符号数据和与同步块位于同一个同步块集合中的相邻波束的PBCH符号数据进行合并;
解码子模块533,被配置为对第一合并子模块532合并后的PBCH符号数据进行解码处理;
第二合并子模块534,被配置为若解码子模块533解码失败,将合并后的PBCH符号数据与PBCH合并周期中的下一个同步块集合中的待合并PBCH符号数据进行合并以及解码处理,直至解码成功或者PBCH合并周期内没有能够合并的PBCH符号数据为止。
在一实施例中,当扰码位为2位系统帧号位和1位同步块时间指示位时,PBCH合并周期为80ms。
在一实施例中,当扰码位为1位系统帧号位和1位同步块时间指示位时,PBCH合并周期为40ms。
在一实施例中,还包括:
监听模块54,被配置为监听同步块;
符号同步模块55,被配置为在监听模块监听到同步块之后,基于主同步信号和辅同步信号完成符号同步。
在一实施例中,PBCH符号数据中包括系统帧号的高N位和第M低数据位以及同步块时间指示位的高P位,N为7或者8,P为不大于5的自然数。
图7是根据一示例性实施例示出的一种确定同步块的发送时间的装置的框图,该装置应用在基站上,如图7所示,确定同步块的发送时间的装置包括:
第二处理模块71,被配置为基于约定的扰码对编码后的PBCH符号数据进行加扰和调制处理,得到PBCH消息,PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,P为不大于5的自然数;
发送模块72,被配置为基于预设发送方式发送同步块,同步块中携带有PBCH消息。
图8是根据一示例性实施例示出的另一种确定同步块的发送时间的装置的框图,如图8所示,在上述图7所示实施例的基础上,在一实施例中,发送模块72包括:
第一发送子模块721,被配置为基于第一约定方式发送同步块,第一约定方式用于指示基于打孔的方式发送每一个方向上的同步块;或者,
第二发送子模块722,被配置为基于第二约定方式发送同步块,第二约定方式用于指示每一个同步块发送周期内均在每一个方向上发送同步块。
在一实施例中,N为7或者8。
关于上述实施例中的装置,其中各个模块执行操作的具体方式已经在有关该方法的实施例中进行了详细描述,此处将不做详细阐述说明。
图9是根据一示例性实施例示出的一种适用于确定同步块的发送时间的装置的框图。装置900可以被提供为一个基站。参照图9,装置900包括处理组件922、无线发射/接收组件924、天线组件926、以及无线接口特有的信号处理部分,处理组件922可进一步包括一个或多个处理器。
处理组件922中的其中一个处理器可以被配置为执行上述确定同步块的发送时间的方法。
在示例性实施例中,还提供了一种包括指令的非临时性计算机可读存储介质,上述指令可由装置900的处理组件922执行以完成上述第二方面所描述的方法。例如,非临时性计算机可读存储介质可以是ROM、随机存取存储器(RAM)、CD-ROM、磁带、软盘和光数据存储设备等。
图10是根据一示例性实施例示出的一种适用于确定同步块的发送时间的装置的框图。例如,装置1000可以是移动设备,例如智能手机。
参照图10,装置1000可以包括以下一个或多个组件:处理组件1002,存储器1004,电源组件1006,多媒体组件1008,音频组件1010,输入/输出(I/O)的接口1012,传感器组件1014,以及通信组件1016。
处理组件1002通常控制装置1000的整体操作,诸如与显示,电话呼叫,数据通信,相机操作和记录操作相关联的操作。处理元件1002可以包括一个或多个处理器1020来执行指令,以完成上述的方法的全部或部分步骤。此外,处理组件1002可以包括一个或多个模块,便于处理组件1002和其他组件之间的交互。例如,处理部件1002可以包括多媒体模块,以方便多媒体组件1008和处理组件1002之间的交互。
存储器1004被配置为存储各种类型的数据以支持在设备1000的操作。这些数据的示例包括用于在装置1000上操作的任何应用程序或方法的指令,消息,图片等。存储器1004可以由任何类型的易失性或非易失性存储设备或者它们的组合实现,如静态随机存取存储器(SRAM),电可擦除可编程只读存储器(EEPROM),可擦除可 编程只读存储器(EPROM),可编程只读存储器(PROM),只读存储器(ROM),磁存储器,快闪存储器,磁盘或光盘。
电源组件1006为装置1000的各种组件提供电力。电力组件1006可以包括电源管理系统,一个或多个电源,及其他与为装置1000生成、管理和分配电力相关联的组件。
多媒体组件1008包括在装置1000和用户之间的提供一个输出接口的屏幕。在一些实施例中,屏幕可以包括液晶显示器(LCD)和触摸面板(TP)。如果屏幕包括触摸面板,屏幕可以被实现为触摸屏,以接收来自用户的输入信号。触摸面板包括一个或多个触摸传感器以感测触摸、滑动和触摸面板上的手势。触摸传感器可以不仅感测触摸或滑动动作的边界,而且还检测与触摸或滑动操作相关的持续时间和压力。在一些实施例中,多媒体组件1008包括一个前置摄像头和/或后置摄像头。当设备1000处于操作模式,如拍摄模式或视频模式时,前置摄像头和/或后置摄像头可以接收外部的多媒体数据。每个前置摄像头和后置摄像头可以是一个固定的光学透镜系统或具有焦距和光学变焦能力。
音频组件1010被配置为输出和/或输入音频信号。例如,音频组件1010包括一个麦克风(MIC),当装置1000处于操作模式,如呼叫模式、记录模式和语音识别模式时,麦克风被配置为接收外部音频信号。所接收的音频信号可以被进一步存储在存储器1004或经由通信组件1016发送。在一些实施例中,音频组件1010还包括一个扬声器,用于输出音频信号。
I/O接口1012为处理组件1002和外围接口模块之间提供接口,上述外围接口模块可以是键盘,点击轮,按钮等。这些按钮可包括但不限于:主页按钮、音量按钮、启动按钮和锁定按钮。
传感器组件1014包括一个或多个传感器,用于为装置1000提供各个方面的状态评估。例如,传感器组件1014可以检测到设备1000的打开/关闭状态,组件的相对定位,例如组件为装置1000的显示器和小键盘,传感器组件1014还可以检测装置1000或装置1000一个组件的位置改变,用户与装置1000接触的存在或不存在,装置1000方位或加速/减速和装置1000的温度变化。传感器组件1014可以包括接近传感器,被配置用来在没有任何的物理接触时检测附近物体的存在。传感器组件1014还可以包括光传感器,如CMOS或CCD图像传感器,用于在成像应用中使用。在一些实施例中,该传感器组件1014还可以包括加速度传感器,陀螺仪传感器,磁传感器,距离感应器,压力传感器或温度传感器。
通信组件1016被配置为便于装置1000和其他设备之间有线或无线方式的通信。装置1000可以接入基于通信标准的无线网络,如WIFI,2G或3G,或它们的组合。在一个示例性实施例中,通信部件1016经由广播信道接收来自外部广播管理系统的广播信号或广播相关信息。在一个示例性实施例中,通信部件1016还包括近场通信(NFC)模块,以促进短程通信。例如,在NFC模块可基于射频识别(RFID)技术,红外数据协会(IrDA)技术,超宽带(UWB)技术,蓝牙(BT)技术和其他技术来实现。
在示例性实施例中,装置1000可以被一个或多个应用专用集成电路(ASIC)、数字信号处理器(DSP)、数字信号处理设备(DSPD)、可编程逻辑器件(PLD)、现场可编程门阵列(FPGA)、控制器、微控制器、微处理器或其他电子元件实现,用于执行上述确定同步块的发送时间的方法。
在示例性实施例中,还提供了一种包括指令的非临时性计算机可读存储介质,例如包括指令的存储器1004,上述指令可由装置1000的处理器1020执行以完成上述第一方面所描述的方法。例如,非临时性计算机可读存储介质可以是ROM、随机存取存储器(RAM)、CD-ROM、磁带、软盘和光数据存储设备等。
本领域技术人员在考虑说明书及实践这里公开的公开后,将容易想到本公开的其它实施方案。本申请旨在涵盖本公开的任何变型、用途或者适应性变化,这些变型、用途或者适应性变化遵循本公开的一般性原理并包括本公开未公开的本技术领域中的公知常识或惯用技术手段。说明书和实施例仅被视为示例性的,本公开的真正范围和精神由下面的权利要求指出。
应当理解的是,本公开并不局限于上面已经描述并在附图中示出的精确结构,并且可以在不脱离其范围进行各种修改和改变。本公开的范围仅由所附的权利要求来限制。

Claims (24)

  1. 一种确定同步块的发送时间的方法,其特征在于,所述方法包括:
    对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且在解调之前缓存所述PBCH消息的PBCH符号数据;
    在解扰成功并且解码失败后,获取与所述缓存的PBCH符号数据相同的待合并PBCH符号数据,所述待合并PBCH符号数据包括PBCH合并周期中与所述同步块所在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据;
    将所述缓存的PBCH符号数据与待合并PBCH符号数据进行合并,直至能正确解码所述PBCH符号数据。
  2. 根据权利要求1所述的方法,其特征在于,所述获取与所述缓存的PBCH符号数据相同的待合并PBCH符号数据,包括:
    基于所述PBCH消息的扰码确定所述同步块信号在PBCH合并周期中的出现位置;
    基于所述出现位置,确定所述PBCH合并周期中与所述缓存的PBCH符号数据相同的待合并PBCH符号数据;
    在所述待合并PBCH符号数据的发送窗口内监听所述待合并PBCH符号数据。
  3. 根据权利要求1所述的方法,其特征在于,所述将所述缓存的PBCH符号数据与待合并PBCH符号数据进行合并,包括:
    获取与所述同步块位于同一个同步块集合中的相邻波束的PBCH符号数据;
    在获取到所述同一个同步块集合中的相邻波束的PBCH符号数据之后,将所述缓存的PBCH符号数据和与所述同步块位于同一个同步块集合中的相邻波束的PBCH符号数据进行合并;
    对合并后的PBCH符号数据进行解码处理;
    若解码失败,则将所述合并后的PBCH符号数据与PBCH合并周期中的下一个同步块集合中的待合并PBCH符号数据进行合并以及解码处理,直至解码成功或者所述PBCH合并周期内没有能够合并的PBCH符号数据为止。
  4. 根据权利要求1所述的方法,其特征在于,当所述扰码位为2位系统帧号位和1位同步块时间指示位时,所述PBCH合并周期为80ms。
  5. 根据权利要求1所述的方法,其特征在于,当所述扰码位为1位系统帧号位和1位同步块时间指示位时,所述PBCH合并周期为40ms。
  6. 根据权利要求1所述的方法,其特征在于,所述对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理之前,还包括:
    监听所述同步块;
    在监听到所述同步块之后,基于主同步信号和辅同步信号完成符号同步。
  7. 根据权利要求1所述的方法,其特征在于,所述PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,N为7或者8,P为不大于5的自然数。
  8. 一种确定同步块的发送时间的方法,其特征在于,所述方法包括:
    基于约定的扰码对编码后的PBCH符号数据进行加扰和调制处理,得到PBCH消息,所述PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,P为不大于5的自然数;
    基于预设发送方式发送同步块,所述同步块中携带有所述PBCH消息。
  9. 根据权利要求8所述的方法,其特征在于,所述基于预设发送方式发送同步块,包括:
    基于第一约定方式发送所述同步块,所述第一约定方式用于指示基于打孔的方式发送每一个方向上的同步块;或者,
    基于第二约定方式发送所述同步块,所述第二约定方式用于指示每一个同步块发送周期内均在每一个方向上发送同步块。
  10. 根据权利要求8所述的方法,其特征在于,所述N为7或者8。
  11. 一种确定同步块的发送时间的装置,其特征在于,所述装置包括:
    第一处理模块,被配置为对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且在解调之前缓存所述PBCH消息的PBCH符号数据;
    数据获取模块,被配置为在所述第一处理模块解扰成功并且解码失败后,获取与所述缓存的PBCH符号数据相同的待合并PBCH符号数据,所述待合并PBCH符号数据包括PBCH合并周期中与所述同步块所在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据;
    合并模块,被配置为将所述缓存的PBCH符号数据与所述数据模块获取的所述待合并PBCH符号数据进行合并,直至能正确解码所述PBCH符号数据。
  12. 根据权利要求11所述的装置,其特征在于,所述数据获取模块包括:
    位置确定子模块,被配置为基于所述PBCH消息的扰码确定所述同步块信号在PBCH合并周期中的出现位置;
    第一确定子模块,被配置为基于所述出现位置,确定所述PBCH合并周期中与所述缓存的PBCH符号数据相同的待合并PBCH符号数据;
    监听子模块,被配置为在所述待合并PBCH符号数据的发送窗口内监听所述待合并PBCH符号数据。
  13. 根据权利要求11所述的装置,其特征在于,所述合并模块包括:
    获取子模块,被配置为获取与所述同步块位于同一个同步块集合中的相邻波束的PBCH符号数据;
    第一合并子模块,被配置为在获取到所述同一个同步块集合中的相邻波束的PBCH符号数据之后,将所述缓存的PBCH符号数据和与所述同步块位于同一个同步块集合中的相邻波束的PBCH符号数据进行合并;
    解码子模块,被配置为对所述第一合并子模块合并后的PBCH符号数据进行解码处理;
    第二合并子模块,被配置为若所述解码子模块解码失败,将所述合并后的PBCH符号数据与PBCH合并周期中的下一个同步块集合中的待合并PBCH符号数据进行合并以及解码处理,直至解码成功或者所述PBCH合并周期内没有能够合并的PBCH符号数据为止。
  14. 根据权利要求11所述的装置,其特征在于,当所述扰码位为2位系统帧号位和1位同步块时间指示位时,所述PBCH合并周期为80ms。
  15. 根据权利要求11所述的装置,其特征在于,当所述扰码位为1位系统帧号位和1位同步块时间指示位时,所述PBCH合并周期为40ms。
  16. 根据权利要求11所述的装置,其特征在于,所述装置还包括:
    监听模块,被配置为监听所述同步块;
    符号同步模块,被配置为在所述监听模块监听到所述同步块之后,基于主同步信号和辅同步信号完成符号同步。
  17. 根据权利要求11所述的装置,其特征在于,所述PBCH符号数据中包括系统帧号的高N位和第M低数据位以及同步块时间指示位的高P位,N为7或者8,P为不大于5的自然数。
  18. 一种确定同步块的发送时间的装置,其特征在于,所述装置包括:
    第二处理模块,被配置为基于约定的扰码对编码后的PBCH符号数据进行加扰和调制处理,得到PBCH消息,所述PBCH符号数据中包括系统帧号的高N位和第M低数据位以及同步块时间指示位的高P位,P为不大于5的自然数;
    发送模块,被配置为基于预设发送方式发送同步块,所述同步块中携带有所述PBCH消息。
  19. 根据权利要求18所述的装置,其特征在于,所述发送模块包括:
    第一发送子模块,被配置为基于第一约定方式发送所述同步块,所述第一约定方式用于指示基于打孔的方式发送每一个方向上的同步块;或者,
    第二发送子模块,被配置为基于第二约定方式发送所述同步块,所述第二约定方式用于指示每一个同步块发送周期内均在每一个方向上发送同步块。
  20. 根据权利要求18所述的装置,其特征在于,所述N为7或者8。
  21. 一种用户设备,其特征在于,包括:
    处理器;
    用于存储处理器可执行指令的存储器;
    其中,所述处理器被配置为:
    对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且在解调之前缓存所述PBCH消息的PBCH符号数据;
    在解扰成功并且解码失败后,获取与所述缓存的PBCH符号数据相同的待合并PBCH符号数据,所述待合并PBCH符号数据包括PBCH合并周期中与所述同步块所在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据;
    将所述缓存的PBCH符号数据与待合并PBCH符号数据进行合并,直至能正确解码所述PBCH符号数据。
  22. 一种基站,其特征在于,包括:
    处理器;
    用于存储处理器可执行指令的存储器;
    其中,所述处理器被配置为:
    基于约定的扰码对编码后的PBCH符号数据进行加扰和调制处理,得到PBCH消息,所述PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,P为不大于5的自然数;
    基于预设发送方式发送同步块,所述同步块中携带有所述PBCH消息。
  23. 一种非临时计算机可读存储介质,所述存储介质上存储有计算机指令,其特征在于,所述指令被处理器执行时实现以下步骤:
    对同步块中携带的物理广播信道PBCH消息进行解扰和解码处理,并且在解调之前缓存所述PBCH消息的PBCH符号数据;
    在解扰成功并且解码失败后,获取与所述缓存的PBCH符号数据相同的待合并PBCH符号数据,所述待合并PBCH符号数据包括PBCH合并周期中与所述同步块所 在波束相同的波束的PBCH符号数据和相邻波束的PBCH符号数据;
    将所述缓存的PBCH符号数据与待合并PBCH符号数据进行合并,直至能正确解码所述PBCH符号数据。
  24. 一种非临时计算机可读存储介质,所述存储介质上存储有计算机指令,其特征在于,所述指令被处理器执行时实现以下步骤:
    基于约定的扰码对编码后的PBCH符号数据进行加扰和调制处理,得到PBCH消息,所述PBCH符号数据中包括系统帧号的高N位和第1低数据位以及同步块时间指示位的高P位,P为不大于5的自然数;
    基于预设发送方式发送同步块,所述同步块中携带有所述PBCH消息。
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