WO2018208015A1 - Light emitting diode including zinc oxide layer - Google Patents

Light emitting diode including zinc oxide layer Download PDF

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Publication number
WO2018208015A1
WO2018208015A1 PCT/KR2018/004050 KR2018004050W WO2018208015A1 WO 2018208015 A1 WO2018208015 A1 WO 2018208015A1 KR 2018004050 W KR2018004050 W KR 2018004050W WO 2018208015 A1 WO2018208015 A1 WO 2018208015A1
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Prior art keywords
light emitting
electrode
contact
emitting cells
semiconductor layer
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PCT/KR2018/004050
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French (fr)
Korean (ko)
Inventor
이섬근
이진웅
양명학
신찬섭
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서울바이오시스주식회사
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Publication of WO2018208015A1 publication Critical patent/WO2018208015A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission

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  • the present invention relates to a light emitting diode having a zinc oxide (ZnO) layer.
  • III-N Group III-nitride (III-N) based lasers or light emitting diodes have changed the field of lighting, display and data storage significantly and continue to expand their applications.
  • the typically low electrical conductivity of the p-type layer results in current concentration in the light emitting diode, causing low light efficiency.
  • a low ohmic contact is formed in the p-GaN layer which is highly transparent to the light generated by the light emitting diode, and a current dispersion layer having a low sheet resistance is introduced.
  • ITO Indium-tin oxide
  • ITO Indium-tin oxide
  • deposition method deposition method, deposition surface properties, annealing conditions, element ratio of indium and tin in the film.
  • ITO contains a large amount of defects in the film, there is a limit to increasing the thickness, and therefore, there is a limit to improving current dispersion performance using high electrical conductivity.
  • ITO In this limitation of ITO, a technique has been employed which employs a relatively thin thickness ITO film and further introduces an extension electrode extending from the electrode pads. In this case, however, an increase in sheet resistance of ITO concentrates currents under the electrode pads and the extension electrode, and thus, an additional current block layer has been introduced under the ITO film near the electrode pads and the extension electrode. However, the introduction of the current block layer complicates the light emitting diode manufacturing process and also increases the forward voltage of the light emitting diode by reducing the contact area between the ITO film and the p-GaN layer.
  • the n electrode pad is formed over the p-GaN layer, it is necessary to form an additional insulating layer or to remove the ITO film to expose the current block layer to insulate the n electrode pad and the ITO film.
  • additional insulating layers further complicates the light emitting diode manufacturing process, and the ITO film removal further reduces the contact area between the ITO film and the p-GaN layer.
  • a single light emitting diode generally operates under a low voltage corresponding to the bandgap of the active layer.
  • a structure for connecting a plurality of light emitting cells in series has been developed.
  • a plurality of light emitting cells may be connected in parallel to operate under a high current, and connecting the light emitting cells in parallel may help to distribute current.
  • a light emitting diode adopting a plurality of light emitting cells has a different light emitting area due to the limitation of the ITO film, and also has a shape in which the transparent electrodes formed on the light emitting cells or the shape of the extension electrodes are different from each other and thus enter the light emitting cells. A difference occurs in the current, and thus the current is concentrated in a specific light emitting cell.
  • An object of the present invention is to provide a light emitting diode capable of operating under high current and high voltage, and capable of uniformly distributing current in a plurality of light emitting cells.
  • a light emitting diode includes a substrate; A plurality of light emitting cells disposed on the substrate, each of the light emitting cells including an active layer interposed between a first conductive semiconductor layer and a second conductive semiconductor layer; ZnO transparent electrodes disposed on second conductive semiconductor layers of the light emitting cells, respectively; First contact electrodes electrically contacting first conductive semiconductor layers of the light emitting cells; Second contact electrodes in electrical contact with the ZnO transparent electrodes, respectively; A first pad electrode electrically connected to some of the first contact electrodes; And a second pad electrode electrically connected to some of the second contact electrodes, wherein each of the light emitting cells exposes the first conductive semiconductor layer through the second conductive semiconductor layer and the active layer. It has at least one through hole, and the active layers have the same light generating region.
  • a ZnO transparent electrode and using second contact electrodes by adopting a ZnO transparent electrode and using second contact electrodes, current dispersing performance can be improved without a current block layer. Furthermore, a plurality of light emitting cells have the same light generating region. Since it is possible to distribute the current evenly to the plurality of light emitting cells.
  • FIG. 1 is a schematic plan view illustrating a light emitting diode according to an embodiment of the present invention.
  • 2A and 2B are cross-sectional views taken along the cut lines A-A and B-B of FIG. 1, respectively.
  • FIG. 3 is a schematic circuit diagram of the light emitting diode of FIG. 1.
  • 4A, 4B, 4C, and 4D are schematic plan views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.
  • FIG. 5 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention.
  • 6A and 6B are cross-sectional views taken along the cut lines A-A and B-B of FIG. 5, respectively.
  • FIG. 7 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention.
  • FIG. 8 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention.
  • a light emitting diode a substrate; A plurality of light emitting cells disposed on the substrate, each of the light emitting cells including an active layer interposed between a first conductive semiconductor layer and a second conductive semiconductor layer; ZnO transparent electrodes disposed on second conductive semiconductor layers of the light emitting cells, respectively; First contact electrodes electrically contacting first conductive semiconductor layers of the light emitting cells; Second contact electrodes in electrical contact with the ZnO transparent electrodes, respectively; A first pad electrode electrically connected to some of the first contact electrodes; And a second pad electrode electrically connected to some of the second contact electrodes, wherein each of the light emitting cells exposes the first conductive semiconductor layer through the second conductive semiconductor layer and the active layer. It has at least one through hole, and the active layers have the same light generating region.
  • the active layers have different areas, it is difficult to uniformly control the current input to the active layers.
  • the active layers have the same light generating region, currents flowing into the light emitting cells can be uniformly dispersed.
  • contact areas of the ZnO transparent electrodes and the second conductive semiconductor layers may be the same. Accordingly, the current can be more uniformly distributed in the plurality of light emitting cells.
  • each of the lower surfaces of the ZnO transparent electrodes may contact the upper surface of the second conductive semiconductor layer.
  • no current block layer is used in embodiments of the present invention. Accordingly, the light emitting diode manufacturing process can be simplified.
  • the contact area between the first contact electrode and the first conductive semiconductor layer may be the same for each light emitting cell.
  • the first contact electrodes may have the same shape.
  • the light emitting diode may further include an insulating layer interposed between the first pad electrode and the ZnO transparent electrode.
  • the first pad electrode may be disposed above the light emitting cell, and a ZnO transparent electrode may remain below the first pad electrode. Therefore, the light emitting area is formed under the first electrode pad like the other areas, thereby ensuring the light emitting area.
  • all of the ZnO transparent electrodes on all the light emitting cells may have the same size, so that current may be uniformly distributed in the light emitting cells.
  • the first pad electrode may be disposed on the ZnO transparent electrode and directly connected to the first contact electrode contacting the first conductive semiconductor layer through the through hole.
  • the light emitting diode may further include an insulating layer interposed between the second pad electrode and the ZnO transparent electrode.
  • a portion of the second pad electrode may contact the ZnO transparent electrode.
  • the second contact electrodes may be arranged in a mirror symmetric structure.
  • the first contact electrodes may be arranged in a mirror symmetric structure.
  • the light emitting diode may include at least one first electrode connection part for electrically connecting neighboring first contact electrodes to connect the plurality of light emitting cells in parallel; At least one second electrode connector for electrically connecting neighboring second contact electrodes to connect the plurality of light emitting cells in parallel; And third electrode connection parts for electrically connecting a neighboring first contact electrode and a second contact electrode to connect the plurality of light emitting cells in series.
  • the plurality of light emitting cells may be electrically connected in a series-parallel structure through the first to third electrode connectors.
  • the first electrode connector may be connected to the first pad electrode, and the first electrode connector may be insulated from the ZnO transparent electrode by an insulating layer.
  • the second electrode connection part may be insulated from the first conductive semiconductor layer by an insulating layer.
  • the plurality of light emitting cells are arranged in a matrix, the light emitting cells arranged in the same row share a first conductivity type semiconductor layer, and the light emitting cells arranged in the same column are separated from each other.
  • a semiconductor layer wherein the first electrode connector electrically connects the first contact electrodes on the light emitting cells arranged in the same row, and the second electrode connector is the second contact electrode on the light emitting cells arranged in the same row.
  • the third electrode connection part may electrically connect the first contact electrode and the second contact electrode on the light emitting cells arranged in the same column.
  • the first pad electrode and the second pad electrode may be disposed on the light emitting cells arranged in different rows.
  • Each of the ZnO transparent electrodes may have a roughened surface.
  • the roughened surface improves the light extraction efficiency through the ZnO transparent electrode.
  • FIG. 1 is a schematic plan view illustrating a light emitting diode according to an embodiment of the present invention
  • FIGS. 2A and 2B are cross-sectional views taken along the cutting lines AA and BB of FIG. 1, respectively
  • FIG. 3 is the light emitting diode of FIG. 1.
  • a schematic circuit diagram of the is shown.
  • the light emitting diode includes a substrate 21, a plurality of light emitting cells R1C1 to R3C3, ZnO transparent electrodes 29, and insulating layers 31a, 31b, and 31aa. , 31bb, 31ab, first electrode pad 33a, first contact electrodes 33b, first electrode connectors 33ab, second electrode pad 35a, second contact electrodes 35b, and It may include the second electrode connectors 35ab and the third electrode connectors 335.
  • the substrate 21 is not particularly limited as long as it is a substrate capable of growing a gallium nitride semiconductor layer.
  • Examples of the substrate 21 may include a sapphire substrate, a gallium nitride substrate, a SiC substrate, and the like, and may be a patterned sapphire substrate.
  • the substrate 21 may have a rectangular or square outer shape as shown in the plan view of FIG. 1, but is not necessarily limited thereto.
  • the size of the substrate 21 is not particularly limited and may be variously selected.
  • the plurality of light emitting cells R1C1 to R3C3 are disposed on the substrate 21.
  • Each light emitting cell includes a first conductive semiconductor layer 23, a second conductive semiconductor layer 27, and an active layer 25 interposed therebetween.
  • the first conductivity type semiconductor layer 23 is disposed on the substrate 21.
  • the first conductivity type semiconductor layer 23 may be a layer grown on the substrate 21, and may be a gallium nitride based semiconductor layer doped with impurities such as Si.
  • the active layer 25 and the second conductive semiconductor layer 27 are disposed on the first conductive semiconductor layer 23.
  • the active layer 25 and the second conductive semiconductor layer 27 may have an area smaller than that of the first conductive semiconductor layer 23.
  • the active layer 25 and the second conductive semiconductor layer 27 may be located on the first conductive semiconductor layer 23 by mesa M formed by mesa etching.
  • the active layer 25 is formed of a gallium nitride-based semiconductor layer, and may have a single quantum well structure or a multiple quantum well structure.
  • the composition and thickness of the well layer in the active layer 25 determines the wavelength of the light produced. In particular, it is possible to provide an active layer that generates ultraviolet light, blue light or green light by adjusting the composition of the well layer.
  • the second conductivity-type semiconductor layer 27 may be a gallium nitride-based semiconductor layer doped with p-type impurities, for example, Mg.
  • Each of the first conductive semiconductor layer 23 and the second conductive semiconductor layer 27 may be a single layer, but is not limited thereto, and may be a multilayer or a superlattice layer.
  • the first conductive semiconductor layer 23, the active layer 25, and the second conductive semiconductor layer 27 may be formed using a known method such as metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). It may be formed and grown on the substrate 21 within.
  • MOCVD metal organic chemical vapor deposition
  • MBE molecular beam epitaxy
  • the plurality of light emitting cells R1C1 to R3C3 may be arranged in a matrix structure by mesa etching regions and cell isolation regions ISO. Although the drawings show that the plurality of light emitting cells are arranged in a 3 ⁇ 3 matrix, the present invention is not limited thereto and may be arranged in various matrices of 2 ⁇ 2 or more.
  • the light emitting cells arranged in the same row may share the first conductivity type semiconductor layer 23.
  • the light emitting cells R1C1, R1C2, and R1C3 arranged in the first row share the first conductive semiconductor layer
  • the light emitting cells R2C1, R2C2, R2C3 arranged in the second row may also be formed in the second row.
  • the first conductive semiconductor layer is shared, and the light emitting cells R3C1, R3C2, and R3C3 arranged in the third row also share the first conductive semiconductor layer.
  • the light emitting cells arranged in the same row may have the active layer 25 and the second conductive semiconductor layer 27 separated from each other.
  • the light emitting cells arranged in the same column may have the first conductivity type semiconductor layer 23 separated from each other.
  • the first conductive semiconductor layers 23 of the light emitting cells R1C1, R2C1, and R3C1 arranged in the first column are separated from each other by the cell isolation regions ISO, and the light emission arranged in the second column.
  • the first conductive semiconductor layers 23 of the cells R1C2, R2C2, and R3C2 are also separated from each other by the cell isolation regions ISO, and the light emitting cells R1C3, R2C3, and R3C3 arranged in a third column.
  • the first conductive semiconductor layers 23 are also separated by the cell isolation regions ISO.
  • the light emitting cells arranged in the same row share the first conductivity type semiconductor layer 23, thereby preventing the current from being concentrated along a specific column. That is, even if the current is concentrated through a specific light emitting cell in one row, the current may be redistributed through the first conductive semiconductor layer 23 shared with each other. It can be supplied uniformly distributed.
  • light emitting cells in the same row may have first conductive semiconductor layers 23 separated from each other by a cell isolation region.
  • ZnO transparent electrodes 29 are disposed on the light emitting cells.
  • the ZnO transparent electrode 29 has substantially the same shape as the second conductive semiconductor layer 27. However, the ZnO transparent electrode 29 may have a smaller area than the second conductivity type semiconductor layer 27. The lower surface of the ZnO transparent electrode 29 may be in contact with the upper surface of the second conductive semiconductor layer 27.
  • the ZnO transparent electrode 29 may comprise any material so long as Zn and O make up the majority of the compound and retain the ZulO crystal structure.
  • ZnO transparent electrode 29 includes aluminum doped zinc oxide (AZO), gallium doped zinc oxide (GZO), and indium doped zinc oxide (IZO).
  • ZnO transparent electrode 29 also includes materials having small amounts of other dopants and / or other impurities or inclusion materials, as well as nonstoichiometric materials due to the presence of vacancy and insertion-based material defects. .
  • the ZnO transparent electrode 29 deposits a thin continuous ZnO seed layer on the second conductive semiconductor layer 27, for example a p-type GaN layer, and then grows a ZnO bulk layer from the ZnO seed layer. Can be formed.
  • the ZnO transparent electrode 29 may have a single crystal structure.
  • the ZnO transparent electrode 29 may have a thickness of at least about five times the general thickness of the ITO film.
  • the ITO film is usually formed to have a thickness of about 500 GPa because of the absorptivity.
  • the ZnO transparent electrode 29 since the ZnO transparent electrode 29 has a low absorption, it may be formed to have a thickness of 3000 Pa or more, and more than about 5000 Pa.
  • the upper limit of the ZnO transparent electrode 29 is not particularly limited, but may be about 1 ⁇ m or less.
  • Each of the light emitting cells may include a through hole 30a penetrating through the second conductive semiconductor layer 27 and the active layer 27 to expose the first conductive semiconductor layer 23.
  • the through hole 30a may also be formed in the ZnO transparent electrode 29. Therefore, the through hole 30a is surrounded by the ZnO transparent electrode 29, the second conductive semiconductor layer 27, and the active layer 25.
  • the through hole 30a may have an elongated shape from one edge of the light emitting cell toward the other edge as shown. For example, as shown in FIG. 1, the through holes 30a may have an elongated shape in a direction perpendicular to the cell isolation region ISO.
  • the through holes 30a formed in the light emitting cells have the same size, and therefore, the exposed areas of the first conductive semiconductor layers 23 exposed by the through holes 30a have the same size.
  • the active layers 25 may have the same light generating area. have. That is, the active layers 25 may have the same outer shape, and through holes 30a having the same size penetrate through the active layers 25. Accordingly, regions in which the light may be generated in the active layers 25 are the same. Since the light generating regions of the active layers 25 are identical to each other, current may be uniformly distributed in the light emitting cells.
  • the through holes 30a may be formed at substantially the same positions in the active layers 25, but the light emitting cells R1C2 in which the second electrode pads 35a are formed.
  • the position of the through hole 30a may be slightly modified by the second electrode pad 35a. That is, the through hole 30a formed in the light emitting cell R1C2 may be disposed slightly below the through holes 30a formed in the other light emitting cells in order to secure the separation distance from the second electrode pad 35a. have.
  • the first pad electrode 33a and the second pad electrode 35a are disposed to introduce electricity from the outside. As illustrated in FIG. 1, the first and second pad electrodes 33a and 35a may be limitedly disposed in the upper region of the light emitting cell. For example, the first pad electrode 33a may be disposed on the light emitting cell R3C2, and the second pad electrode 35a may be disposed on the light emitting cell R1C2. However, when the light emitting cells are arranged in even rows, the first and second pad electrodes 33a 35a may be disposed over two light emitting cells.
  • the first pad electrode 33a is insulated from the ZnO transparent electrode 29 by the insulating layer 31a.
  • the insulating layer 31a may be disposed under a portion of the first pad electrode 33a, and a portion of the first pad electrode 33a is exposed through the through hole 30a. ) May be electrically connected to constitute a part of the first contact electrode 33b.
  • the second pad electrode 35a may be partially spaced apart from the ZnO transparent electrode 29 by the insulating layer 31b. A portion of the second pad electrode 35a may contact the ZnO transparent electrode 29 and may form a portion of the second contact electrode 35b.
  • the first contact electrodes 33b are disposed in the through holes 30a and make ohmic contact with the first conductive semiconductor layers 23. Each first contact electrode 33b is spaced apart from the second conductivity type semiconductor layer 27 and the active layer 25.
  • the first contact electrodes 33b may have the same size, and the areas where the first contact electrodes 33b and the first conductive semiconductor layer contact each other may also be the same.
  • the second contact electrodes 35b are positioned on the ZnO transparent electrodes 29 and are in electrical contact with the ZnO transparent electrodes 29, respectively.
  • the second contact electrodes 35b may have substantially the same shape.
  • the part where the 2nd electrode pad 35a contacts the ZnO transparent electrode 29 can also be made to be the same as some shape of a 2nd contact electrode.
  • the second contact electrodes 29 may be arranged in a mirror symmetric structure. These may be symmetrical with respect to the plane across the first pad electrode 33a and the second pad electrode 35a, for example.
  • the first contact electrodes 29 may also be arranged in a mirror symmetric structure. By forming the first and second contact electrodes 33b and 35b in a mirror symmetrical structure, a current can be uniformly supplied to both sides of the first and second electrode pads 33a and 35a.
  • the first electrode connector 33ab electrically connects adjacent first contact electrodes 33b to connect the plurality of light emitting cells in parallel.
  • the first electrode connection part 33ab electrically connects the first contact electrodes 33b on the light emitting cells arranged in the same row.
  • the first electrode connection part 33ab may connect the first electrode pad 33a and the first electrode electrodes 33b.
  • an insulating layer 31aa is disposed between the first electrode connecting portion 33ab and the ZnO transparent electrode 29 to insulate the first electrode connecting portion 33ab from the ZnO transparent electrode 29.
  • the insulating layer 31aa may be continuous from the insulating layer 31a.
  • the second electrode connector 35ab electrically connects adjacent second contact electrodes to connect the plurality of light emitting cells in parallel.
  • the second electrode connection part 35ab electrically connects the second contact electrodes 35b on the light emitting cells arranged in the same row.
  • the insulating layer 31bb is disposed between the first conductivity type semiconductor layer 23 and the second electrode connection part 35ab in the mesa etching region to form the second electrode connection part 35ab in the first conductivity type semiconductor layer 23. Insulate from
  • the third electrode connector 335 electrically connects the neighboring first and second contact electrodes to connect the plurality of light emitting cells in series.
  • the third electrode connector 335 electrically connects the first contact electrode 33b and the second contact electrode 35b on the light emitting cells arranged in the same column.
  • the insulating layer 31ab is interposed between the third electrode connector 335 and the ZnO transparent electrode 29 to prevent the third electrode connector 335 from being short-circuited to the ZnO transparent electrode 29.
  • the insulating layer 31ab may also be disposed in the cell isolation region (ISO) region, and the third electrode connection portion 335 may include the first conductive semiconductor layer 23, the active layer 25, or the second conductive semiconductor layer 27. To prevent a short circuit.
  • the light emitting cells are connected in a series-parallel structure.
  • the dotted line shows the electrical connection by the first conductivity type semiconductor layer 23 shared with each other.
  • the ZnO transparent electrode 29 is adopted, and the light generating regions of the active layers 25 are the same, and the first contact electrodes 33b and the second contact electrodes 35b are made. By forming the same substantially, it is possible to uniformly distribute the current in the plurality of light emitting cells.
  • 4A through 4D are schematic plan views illustrating a method of manufacturing a light emitting diode according to an exemplary embodiment of the present invention.
  • the first conductive semiconductor layer 23, the active layer 25, and the second conductive semiconductor layer 27 are grown on the substrate 21.
  • These semiconductor layers can be formed using techniques such as metal organic chemical vapor growth, molecular beam epitaxy, hydride vapor phase growth, and the like.
  • a ZnO transparent electrode 29 is formed on the second conductivity type semiconductor layer 27.
  • the ZnO transparent electrode 29 may be formed by various methods, but in particular, the single crystal ZnO transparent electrode 29 having a wurtzite structure may be formed by growing a ZnO bulk layer using an aqueous solution method in which a ZnO seed layer is formed. have.
  • through-holes 30a and mesas M are formed using a photo and etching process.
  • the ZnO transparent electrode 29, the second conductive semiconductor layer 27, and the active layer 25 may be patterned using the same photoresist pattern.
  • the ZnO transparent electrode 29 may be etched by using wet etching, for example, and the second conductive semiconductor layer 27 and the active layer 25 may be etched by using dry etching. Accordingly, a plurality of light emitting cell regions arranged in a matrix structure may be defined.
  • the through holes 30a formed in the light emitting cell regions all have the same size, and thus, the active layer 25 in each light emitting cell region has a constant light generating region.
  • cell isolation regions ISO are formed.
  • the cell isolation regions ISO may be formed using a photolithography and etching process, and the upper surface of the substrate 21 may be exposed in the cell isolation regions ISO. Rows of light emitting cells are separated from each other by the cell isolation regions ISO.
  • insulating layers 31a, 31b, 31aa, 31bb, and 31ab are formed.
  • the insulating layer may be formed of, for example, a single layer of SiO 2 or Si 3 N 4, but is not limited thereto.
  • the insulating layer may have a multi-layer structure including a silicon nitride film and a silicon oxide film, and a distribution bragg is formed by alternately stacking layers having different refractive indices in an SiO 2 film, a TiO 2 film, a ZrO 2 film, an MgF 2 film, or an Nb 2 O 5 film.
  • It may also include a reflector DBR.
  • the adoption of DBR prevents light generated in the active layer 25 from being absorbed and lost by various electrodes and connections disposed on the insulating layers 31a, 31b, 31aa, 31bb, 31ab.
  • the first pad electrode 33a, the first contact electrodes 33b, the second pad electrode 35a, the second contact electrodes 35ab, and the first electrode connection part ( 33ab, second electrode connectors 35ab, and third electrode connectors 335 are formed. These can be formed together in the same process with the same material.
  • the light emitting diode of FIG. 1 is completed by dividing the substrate 21 into individual light emitting diodes through a scribing process.
  • the ZnO transparent electrode 29 is directly formed on the second conductive semiconductor layer 27 without introducing a current block layer.
  • the light emitting diode manufacturing process is extremely simple.
  • FIG. 5 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention
  • FIGS. 6A and 6B are cross-sectional views taken along the cutting lines A-A and B-B of FIG. 5.
  • the light emitting diode according to the present embodiment has a surface R roughened by ZnO transparent electrodes 29, which is generally similar to the light emitting diode described with reference to FIGS. There is a difference in having.
  • the ZnO transparent electrodes 29 have a flat surface and a roughened surface R.
  • the roughened surface R improves the light extraction efficiency.
  • the first electrode pad 33a, the second electrode pad 35a, the second contact electrodes 35b and the electrode connecting portions 33ab, 35ab, and 335 and the insulating layers 31a, 31b, 31aa, and 31bb. , 31ab) and the like have a flat surface, and a roughened surface R is formed in the surrounding areas.
  • a flat surface may be formed in the edge regions of the ZnO transparent electrode 29.
  • the roughened surface R forms a photoresist pattern exposing a region where the roughened surface R is to be formed before forming the insulating layers 31a, 31b, 31aa, 31bb, and 31ab, and using ZnO using an acid solution. It can be formed by wet treating the surface.
  • the maximum depth of the roughened surface R produced by the wet treatment may be in the range of approximately 200 mm to 2000 mm.
  • FIG. 7 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention.
  • the light emitting diode according to the present embodiment is generally similar to the light emitting diode described with reference to FIGS. 1 to 3, but there is a difference in that a plurality of through holes 130a are formed in some light emitting cells. .
  • a plurality of through holes 130a may be formed in one light emitting cell.
  • each of the light emitting cells has one through hole ( 30a) may be formed.
  • the sum of the sizes of the plurality of through holes 130a formed in each of the light emitting cells may be the same as that of the through holes 30a.
  • the first contact electrode 33b may be formed of the first conductive semiconductor layer.
  • the contact area in contact with 23 may be the same in all light emitting cells.
  • a roughened surface R may be further formed on the ZnO surface.
  • FIG. 8 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention.
  • the light emitting diode according to the present embodiment is generally similar to the light emitting diode described with reference to FIGS. 1 to 3, but in the previous embodiment, the second electrode connecting portions 35ab are formed in the first row R1. Unlike to be positioned on the light emitting cells disposed in the ()), in the present embodiment, the second electrode connecting portions (35ab) is different from that disposed on the light emitting cells of all the rows.
  • the second electrode connecting portions 35ab are disposed not only in the first row R1 but also in the other rows R2 and R3, so that even if current is concentrated through a specific light emitting cell in the first row R1, In addition to the current dispersion by the first conductivity type semiconductor layer 23, the current can be distributed using the second electrode connecting portions 35ab to more evenly distribute the current to the light emitting cells in the next rows R2 and R3. You can.
  • the roughened surface R may be further formed on the ZnO surface, and as described with reference to FIG. Likewise, a plurality of through holes 130a may be formed in one light emitting cell.

Abstract

A light emitting diode according to embodiments of the present invention comprises: a plurality of light emitting cells which are arranged on a substrate and include active layers interposed between first conductivity type semiconductor layers and second conductivity type semiconductor layers, respectively; ZnO transparent electrodes arranged on the second conductivity type semiconductor layers of the light emitting cells, respectively; first contact electrodes in electrical contact with the first conductivity type semiconductor layers of the light emitting cells, respectively; second contact electrodes in electrical contact with the ZnO transparent electrodes, respectively; first pad electrodes electrically connected to some of the first contact electrodes; and second pad electrodes electrically connected to some of the second contact electrodes, wherein each of the light emitting cells has at least one through hole which extends through the second conductivity type semiconductor layer and the active layer to expose the first conductivity type semiconductor layer, and the active layers have the same light generating region.

Description

아연 산화물층을 구비하는 발광 다이오드Light Emitting Diodes With Zinc Oxide Layer
본 발명은 아연 산화물(ZnO)층을 구비하는 발광 다이오드에 관한 것이다.The present invention relates to a light emitting diode having a zinc oxide (ZnO) layer.
Ⅲ족-질화물(Ⅲ-N) 계열 레이저 또는 발광 다이오드는 조명, 디스플레이 및 데이터 저장 분야를 크게 변화시켰으며, 그 적용 분야를 계속해서 넓혀 가고 있다.Group III-nitride (III-N) based lasers or light emitting diodes have changed the field of lighting, display and data storage significantly and continue to expand their applications.
Ⅲ-N 기반 LED 소자에 있어서, p-형 층의 전형적으로 낮은 전기 전도성은 발광 다이오드 내에서 전류 집중을 초래하여 낮은 광 효율의 원인이 된다. 높은 광 효율을 달성하기 위해, 발광 다이오드에서 생성되는 광에 고도로 투명하고 p-GaN층에 낮은 오믹 접촉이 형성되며, 면저항이 낮은 전류 분산층을 도입하는 것이다.In III-N based LED devices, the typically low electrical conductivity of the p-type layer results in current concentration in the light emitting diode, causing low light efficiency. In order to achieve high light efficiency, a low ohmic contact is formed in the p-GaN layer which is highly transparent to the light generated by the light emitting diode, and a current dispersion layer having a low sheet resistance is introduced.
인디움-주석 산화물(ITO)은, 상대적으로 높은 전기 전도성 및 낮은 광학적 흡수에 기인하여, 다양한 LED 제조 업자들에 의해 현재 LED 전류 분산층으로 선택된 재료이다. 그러나 증착 방법, 증착 표면 성질, 열처리(annealing) 조건, 막 내 인디움과 주석의 원소비와 같은 다양한 요인들에 의존하여 ITO 막의 보고된 성질에는 상당한 편차가 있다. 특히, ITO는 막 내에 많은 양의 결함을 포함하므로, 두께를 증가시키는데 한계가 있으며, 따라서, 높은 전기 전도성을 이용한 전류 분산 성능 개선에 한계가 있다.Indium-tin oxide (ITO), due to its relatively high electrical conductivity and low optical absorption, is currently the material of choice for LED current dispersion layers by various LED manufacturers. However, there are significant variations in the reported properties of ITO films depending on various factors such as deposition method, deposition surface properties, annealing conditions, element ratio of indium and tin in the film. In particular, since ITO contains a large amount of defects in the film, there is a limit to increasing the thickness, and therefore, there is a limit to improving current dispersion performance using high electrical conductivity.
ITO의 이러한 한계를 극복하기 위해, 상대적으로 얇은 두께의 ITO 막을 채택하면서 추가로 전극 패드들에서 연장되는 연장 전극을 도입하는 기술이 사용되고 있다. 그러나 이 경우, ITO의 면저항 증가로 전극 패드들 및 연장 전극 하부에 전류가 집중되고, 이에 따라, 전극 패드들 및 연장 전극 근처에서 ITO 막 하부에 전류 블록층을 추가로 도입하여 왔다. 그러나 전류 블록층의 도입은 발광 다이오드 제조 공정을 복잡하게 만들며 또한, ITO 막과 p-GaN층의 접촉 면적을 감소시켜 발광 다이오드의 순방향 전압을 증가시킨다. 나아가, n 전극 패드를 p-GaN층 상부에 형성할 경우, n 전극 패드와 ITO 막을 절연하기 위해 추가의 절연층이 형성되거나 또는 ITO 막을 제거하여 전류 블록층을 노출시킬 필요가 있다. 추가 절연층 형성은 발광 다이오드 제조 공정을 더 복잡하게 만들며, ITO 막 제거는 ITO 막과 p-GaN층의 접촉 면적을 더욱 감소시킨다.To overcome this limitation of ITO, a technique has been employed which employs a relatively thin thickness ITO film and further introduces an extension electrode extending from the electrode pads. In this case, however, an increase in sheet resistance of ITO concentrates currents under the electrode pads and the extension electrode, and thus, an additional current block layer has been introduced under the ITO film near the electrode pads and the extension electrode. However, the introduction of the current block layer complicates the light emitting diode manufacturing process and also increases the forward voltage of the light emitting diode by reducing the contact area between the ITO film and the p-GaN layer. Further, when the n electrode pad is formed over the p-GaN layer, it is necessary to form an additional insulating layer or to remove the ITO film to expose the current block layer to insulate the n electrode pad and the ITO film. The formation of additional insulating layers further complicates the light emitting diode manufacturing process, and the ITO film removal further reduces the contact area between the ITO film and the p-GaN layer.
한편, 단일의 발광 다이오드는 일반적으로 활성층의 밴드갭에 상응하는 낮은 전압하에서 동작한다. 이러한 저전압 동작 특성을 해결하기 위해, 복수의 발광셀들을 직렬 연결하는 구조가 개발되었다. 나아가, 고전류 하에서 동작하기 위해 복수의 발광셀들이 병렬로 연결될 수 있으며, 발광셀들을 병렬로 연결하면 전류를 분산시키는데 도움이 된다.On the other hand, a single light emitting diode generally operates under a low voltage corresponding to the bandgap of the active layer. In order to solve such low voltage operating characteristics, a structure for connecting a plurality of light emitting cells in series has been developed. Furthermore, a plurality of light emitting cells may be connected in parallel to operate under a high current, and connecting the light emitting cells in parallel may help to distribute current.
그러나 종래 복수의 발광셀들을 채택한 발광 다이오드는 ITO 막의 한계에 기인하여 발광 면적이 서로 다르고, 또한, 발광셀들 상에 형성되는 투명 전극의 형상이나 연장 전극들의 형상이 서로 달라 각 발광셀에 유입되는 전류에 차이가 발생되며, 이에 따라 특정 발광셀에 전류가 집중된다.However, a light emitting diode adopting a plurality of light emitting cells has a different light emitting area due to the limitation of the ITO film, and also has a shape in which the transparent electrodes formed on the light emitting cells or the shape of the extension electrodes are different from each other and thus enter the light emitting cells. A difference occurs in the current, and thus the current is concentrated in a specific light emitting cell.
본 발명이 해결하고자 하는 과제는, 고전류 및 고전압하에서 동작 가능하며, 복수의 발광셀들에 균일하게 전류를 분산시킬 수 있는 발광 다이오드를 제공하는 것이다.An object of the present invention is to provide a light emitting diode capable of operating under high current and high voltage, and capable of uniformly distributing current in a plurality of light emitting cells.
본 발명의 실시예들에 따른 발광 다이오드는, 기판; 상기 기판 상부에 배치되고, 각각 제1 도전형 반도체층과 제2 도전형 반도체층 사이에 개재된 활성층을 포함하는 복수의 발광셀들; 상기 발광셀들의 제2 도전형 반도체층들 상에 각각 배치된 ZnO 투명 전극들; 상기 발광셀들의 제1 도전형 반도체층들에 각각 전기적으로 접촉하는 제1 접촉 전극들; 상기 ZnO 투명 전극들에 각각 전기적으로 접촉하는 제2 접촉 전극들; 상기 제1 접촉 전극들 중 일부에 전기적으로 연결된 제1 패드 전극; 및 상기 제2 접촉 전극들 중 일부에 전기적으로 연결된 제2 패드 전극을 포함하고, 상기 발광셀들 각각은 상기 제2 도전형 반도체층 및 상기 활성층을 관통하여 상기 제1 도전형 반도체층을 노출시키는 적어도 하나의 관통홀을 가지며, 상기 활성층들은 서로 동일한 광 생성 영역을 가진다.A light emitting diode according to embodiments of the present invention includes a substrate; A plurality of light emitting cells disposed on the substrate, each of the light emitting cells including an active layer interposed between a first conductive semiconductor layer and a second conductive semiconductor layer; ZnO transparent electrodes disposed on second conductive semiconductor layers of the light emitting cells, respectively; First contact electrodes electrically contacting first conductive semiconductor layers of the light emitting cells; Second contact electrodes in electrical contact with the ZnO transparent electrodes, respectively; A first pad electrode electrically connected to some of the first contact electrodes; And a second pad electrode electrically connected to some of the second contact electrodes, wherein each of the light emitting cells exposes the first conductive semiconductor layer through the second conductive semiconductor layer and the active layer. It has at least one through hole, and the active layers have the same light generating region.
본 발명의 실시예들에 따르면, ZnO 투명 전극을 채택함과 아울러, 제2 접촉 전극들을 사용함으로써 전류 블록층 없이 전류 분산 성능을 개선할 수 있으며, 나아가, 복수의 발광셀들이 서로 동일한 광 생성 영역을 가지므로, 복수의 발광셀들에 고르게 전류를 분산시킬 수 있다.According to embodiments of the present invention, by adopting a ZnO transparent electrode and using second contact electrodes, current dispersing performance can be improved without a current block layer. Furthermore, a plurality of light emitting cells have the same light generating region. Since it is possible to distribute the current evenly to the plurality of light emitting cells.
본 발명의 다른 장점 및 효과에 대해서는 상세한 설명을 통해 더 명확하게 될 것이다.Other advantages and effects of the present invention will become more apparent from the detailed description.
도 1은 본 발명의 일 실시예에 따른 발광 다이오드를 설명하기 위한 개략적인 평면도이다.1 is a schematic plan view illustrating a light emitting diode according to an embodiment of the present invention.
도 2A 및 도 2B는 각각 도 1의 절취선 A-A 및 B-B를 따라 취해진 단면도들이다.2A and 2B are cross-sectional views taken along the cut lines A-A and B-B of FIG. 1, respectively.
도 3은 도 1의 발광 다이오드의 개략적인 회로도를 나타낸다.3 is a schematic circuit diagram of the light emitting diode of FIG. 1.
도 4A, 도 4B, 도 4C 및 도 4D는 본 발명의 일 실시예에 따른 발광 다이오드 제조 방법을 설명하기 위한 개략적인 평면도들이다.4A, 4B, 4C, and 4D are schematic plan views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.
도 5는 본 발명의 또 다른 실시예에 따른 발광 다이오드를 설명하기 위한 개략적인 평면도이다.5 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention.
도 6A 및 도 6B는 각각 도 5의 절취선 A-A 및 B-B를 따라 취해진 단면도들이다.6A and 6B are cross-sectional views taken along the cut lines A-A and B-B of FIG. 5, respectively.
도 7은 본 발명의 또 다른 실시예에 따른 발광 다이오드를 설명하기 위한 개략적인 평면도이다.7 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention.
도 8은 본 발명의 또 다른 실시예에 따른 발광 다이오드를 설명하기 위한 개략적인 평면도이다.8 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention.
이하, 첨부한 도면들을 참조하여 본 발명의 실시예들을 상세히 설명한다. 다음에 소개되는 실시예들은 본 발명이 속하는 기술분야의 통상의 기술자에게 본 발명의 사상이 충분히 전달될 수 있도록 하기 위해 예로서 제공되는 것이다. 따라서, 본 발명은 이하 설명되는 실시예들에 한정되지 않고 다른 형태로 구체화될 수도 있다. 그리고, 도면들에 있어서, 구성요소의 폭, 길이, 두께 등은 편의를 위하여 과장되어 표현될 수도 있다. 또한, 하나의 구성요소가 다른 구성요소의 "상부에" 또는 "상에" 있다고 기재된 경우 각 부분이 다른 부분의 "바로 상부" 또는 "바로 상에" 있는 경우뿐만 아니라 각 구성요소와 다른 구성요소 사이에 또 다른 구성요소가 개재된 경우도 포함한다. 명세서 전체에 걸쳐서 동일한 참조번호들은 동일한 구성요소들을 나타낸다.Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention; The following embodiments are provided as examples to sufficiently convey the spirit of the present invention to those skilled in the art to which the present invention pertains. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. In the drawings, widths, lengths, thicknesses, and the like of components may be exaggerated for convenience. In addition, when one component is described as "on" or "on" another component, each component is different from each other as well as when the component is "just above" or "on" the other component. It also includes a case where another component is interposed therebetween. Like numbers refer to like elements throughout.
본 발명의 일 실시예에 따른 발광 다이오드는, 기판; 상기 기판 상부에 배치되고, 각각 제1 도전형 반도체층과 제2 도전형 반도체층 사이에 개재된 활성층을 포함하는 복수의 발광셀들; 상기 발광셀들의 제2 도전형 반도체층들 상에 각각 배치된 ZnO 투명 전극들; 상기 발광셀들의 제1 도전형 반도체층들에 각각 전기적으로 접촉하는 제1 접촉 전극들; 상기 ZnO 투명 전극들에 각각 전기적으로 접촉하는 제2 접촉 전극들; 상기 제1 접촉 전극들 중 일부에 전기적으로 연결된 제1 패드 전극; 및 상기 제2 접촉 전극들 중 일부에 전기적으로 연결된 제2 패드 전극을 포함하고, 상기 발광셀들 각각은 상기 제2 도전형 반도체층 및 상기 활성층을 관통하여 상기 제1 도전형 반도체층을 노출시키는 적어도 하나의 관통홀을 가지며, 상기 활성층들은 서로 동일한 광 생성 영역을 가진다.A light emitting diode according to an embodiment of the present invention, a substrate; A plurality of light emitting cells disposed on the substrate, each of the light emitting cells including an active layer interposed between a first conductive semiconductor layer and a second conductive semiconductor layer; ZnO transparent electrodes disposed on second conductive semiconductor layers of the light emitting cells, respectively; First contact electrodes electrically contacting first conductive semiconductor layers of the light emitting cells; Second contact electrodes in electrical contact with the ZnO transparent electrodes, respectively; A first pad electrode electrically connected to some of the first contact electrodes; And a second pad electrode electrically connected to some of the second contact electrodes, wherein each of the light emitting cells exposes the first conductive semiconductor layer through the second conductive semiconductor layer and the active layer. It has at least one through hole, and the active layers have the same light generating region.
활성층들이 서로 다른 면적을 가질 경우, 활성층들에 입력되는 전류를 균일하게 조절하기 어렵다. 이에 반해, 본 발명의 실시예들에 있어서, 활성층들이 동일한 광 생성 영역을 가지므로, 발광셀들에 유입되는 전류를 균일하게 분산시킬 수 있다.When the active layers have different areas, it is difficult to uniformly control the current input to the active layers. On the contrary, in the embodiments of the present invention, since the active layers have the same light generating region, currents flowing into the light emitting cells can be uniformly dispersed.
나아가, 상기 ZnO 투명 전극들과 상기 제2 도전형 반도체층들의 접촉 면적은 서로 동일할 수 있다. 이에 따라, 복수의 발광셀들에 전류를 더욱 균일하게 분산시킬 수 있다.Furthermore, contact areas of the ZnO transparent electrodes and the second conductive semiconductor layers may be the same. Accordingly, the current can be more uniformly distributed in the plurality of light emitting cells.
또한, 상기 ZnO 투명 전극들 각각은 그 하부면 전체가 제2 도전형 반도체층의 상면에 접촉할 수 있다. ITO 막과 달리, 본 발명의 실시예들에 전류 블록층은 사용되지 않는다. 이에 따라, 발광 다이오드 제조 공정을 단순화할 수 있다.In addition, each of the lower surfaces of the ZnO transparent electrodes may contact the upper surface of the second conductive semiconductor layer. Unlike the ITO film, no current block layer is used in embodiments of the present invention. Accordingly, the light emitting diode manufacturing process can be simplified.
나아가, 상기 제1 접촉 전극과 상기 제1 도전형 반도체층의 접촉 면적은 각 발광셀에 대해 동일할 수 있다.In addition, the contact area between the first contact electrode and the first conductive semiconductor layer may be the same for each light emitting cell.
또한, 상기 제1 접촉 전극들은 서로 동일한 형상을 가질 수 있다.In addition, the first contact electrodes may have the same shape.
한편, 상기 발광 다이오드는 상기 제1 패드 전극과 ZnO 투명 전극 사이에 개재된 절연층을 더 포함할 수 있다. 제1 패드 전극은 발광셀 상부에 배치될 수 있으며, 제1 패드 전극 하부에 ZnO 투명 전극이 잔류할 수 있다. 따라서, 제1 전극 패드 하부에도 다른 영역과 마찬가지로 발광 영역이 형성되며, 따라서, 발광 면적을 확보할 수 있다. 나아가, 모든 발광셀들 상의 ZnO 투명 전극들이 모두 동일한 크기를 가질 수 있어 발광셀들에 전류를 균일하게 분산시킬 수 있다.The light emitting diode may further include an insulating layer interposed between the first pad electrode and the ZnO transparent electrode. The first pad electrode may be disposed above the light emitting cell, and a ZnO transparent electrode may remain below the first pad electrode. Therefore, the light emitting area is formed under the first electrode pad like the other areas, thereby ensuring the light emitting area. Furthermore, all of the ZnO transparent electrodes on all the light emitting cells may have the same size, so that current may be uniformly distributed in the light emitting cells.
상기 제1 패드 전극은 상기 ZnO 투명 전극 상부에 배치되되, 상기 관통홀을 통해 상기 제1 도전형 반도체층에 접촉하는 제1 접촉 전극과 직접 연결될 수 있다.The first pad electrode may be disposed on the ZnO transparent electrode and directly connected to the first contact electrode contacting the first conductive semiconductor layer through the through hole.
또한, 상기 발광 다이오드는 상기 제2 패드 전극과 ZnO 투명 전극 사이에 개재된 절연층을 더 포함할 수 있다. 나아가, 상기 제2 패드 전극의 일부는 상기 ZnO 투명 전극에 접촉할 수 있다.In addition, the light emitting diode may further include an insulating layer interposed between the second pad electrode and the ZnO transparent electrode. In addition, a portion of the second pad electrode may contact the ZnO transparent electrode.
상기 제2 접촉 전극들은 거울면 대칭 구조로 배열될 수 있다. 또한, 상기 제1 접촉 전극들은 거울면 대칭 구조로 배열될 수 있다.The second contact electrodes may be arranged in a mirror symmetric structure. In addition, the first contact electrodes may be arranged in a mirror symmetric structure.
한편, 상기 발광 다이오드는 상기 복수의 발광셀들을 병렬 연결하기 위해 이웃하는 제1 접촉 전극들을 전기적으로 연결하기 위한 적어도 하나의 제1 전극 연결부; 상기 복수의 발광셀들을 병렬 연결하기 위해 이웃하는 제2 접촉 전극들을 전기적으로 연결하기 위한 적어도 하나의 제2 전극 연결부; 및 상기 복수의 발광셀들을 직렬 연결하기 위해 이웃하는 제1 접촉 전극과 제2 접촉 전극을 전기적으로 연결하기 위한 제3 전극 연결부들을 더 포함할 수 있다.The light emitting diode may include at least one first electrode connection part for electrically connecting neighboring first contact electrodes to connect the plurality of light emitting cells in parallel; At least one second electrode connector for electrically connecting neighboring second contact electrodes to connect the plurality of light emitting cells in parallel; And third electrode connection parts for electrically connecting a neighboring first contact electrode and a second contact electrode to connect the plurality of light emitting cells in series.
제1 내지 제3 전극 연결부들을 통해 복수의 발광셀들이 직병렬 구조로 전기적으로 연결될 수 있다.The plurality of light emitting cells may be electrically connected in a series-parallel structure through the first to third electrode connectors.
한편, 상기 제1 전극 연결부는 상기 제1 패드 전극에 연결되며, 상기 제1 전극 연결부는 절연층에 의해 ZnO 투명 전극으로부터 절연될 수 있다.The first electrode connector may be connected to the first pad electrode, and the first electrode connector may be insulated from the ZnO transparent electrode by an insulating layer.
또한, 상기 제2 전극 연결부는 절연층에 의해 제1 도전형 반도체층으로부터 절연될 수 있다.In addition, the second electrode connection part may be insulated from the first conductive semiconductor layer by an insulating layer.
몇몇 실시예들에 있어서, 상기 복수의 발광셀들은 행렬로 배열되고, 동일한 행에 배치된 발광셀들은 제1 도전형 반도체층을 공유하며, 동일한 열에 배치된 발광셀들은 서로 분리된 제1 도전형 반도체층을 가지되, 상기 제1 전극 연결부는 동일한 행에 배치된 발광셀들 상의 제1 접촉 전극들을 전기적으로 연결하고, 상기 제2 전극 연결부는 동일한 행에 배치된 발광셀들 상의 제2 접촉 전극들을 전기적으로 연결하며, 상기 제3 전극 연결부는 동일한 열에 배치된 발광셀들 상의 제1 접촉 전극과제2 접촉 전극을 전기적으로 연결할 수 있다.In some embodiments, the plurality of light emitting cells are arranged in a matrix, the light emitting cells arranged in the same row share a first conductivity type semiconductor layer, and the light emitting cells arranged in the same column are separated from each other. A semiconductor layer, wherein the first electrode connector electrically connects the first contact electrodes on the light emitting cells arranged in the same row, and the second electrode connector is the second contact electrode on the light emitting cells arranged in the same row. And the third electrode connection part may electrically connect the first contact electrode and the second contact electrode on the light emitting cells arranged in the same column.
발광셀들을 위와 같이 배열함으로써 특정 열에 배치된 발광셀들에 전류가 집중되는 것을 방지할 수 있다. By arranging the light emitting cells as described above, it is possible to prevent the current from concentrating on the light emitting cells arranged in a specific column.
한편, 상기 제1 패드 전극과 제2 패드 전극은 서로 다른 행에 배열된 발광셀들 상부에 배치될 수 있다.The first pad electrode and the second pad electrode may be disposed on the light emitting cells arranged in different rows.
상기 ZnO 투명 전극들 각각은 거칠어진 표면을 가질 수 있다. 거칠어진 표면은 ZnO 투명 전극을 통한 광 추출 효율을 개선한다.Each of the ZnO transparent electrodes may have a roughened surface. The roughened surface improves the light extraction efficiency through the ZnO transparent electrode.
도 1은 본 발명의 일 실시예에 따른 발광 다이오드를 설명하기 위한 개략적인 평면도이고, 도 2A 및 도 2B는 각각 도 1의 절취선 A-A 및 B-B를 따라 취해진 단면도들이며, 도 3은 도 1의 발광 다이오드의 개략적인 회로도를 나타낸다.1 is a schematic plan view illustrating a light emitting diode according to an embodiment of the present invention, FIGS. 2A and 2B are cross-sectional views taken along the cutting lines AA and BB of FIG. 1, respectively, and FIG. 3 is the light emitting diode of FIG. 1. A schematic circuit diagram of the is shown.
우선, 도 1, 도 2A 및 도 2B를 참조하면, 상기 발광 다이오드는 기판(21), 복수의 발광셀들(R1C1~R3C3), ZnO 투명 전극들(29), 절연층(31a, 31b, 31aa, 31bb, 31ab), 제1 전극 패드(33a), 제1 접촉 전극들(33b), 제1 전극 연결부들(33ab), 제2 전극 패드(35a), 제2 접촉 전극들(35b), 제2 전극 연결부들(35ab), 및 제3 전극 연결부들(335)을 포함할 수 있다.First, referring to FIGS. 1, 2A, and 2B, the light emitting diode includes a substrate 21, a plurality of light emitting cells R1C1 to R3C3, ZnO transparent electrodes 29, and insulating layers 31a, 31b, and 31aa. , 31bb, 31ab, first electrode pad 33a, first contact electrodes 33b, first electrode connectors 33ab, second electrode pad 35a, second contact electrodes 35b, and It may include the second electrode connectors 35ab and the third electrode connectors 335.
기판(21)은 질화갈륨계 반도체층을 성장시킬 수 있는 기판이면 특별히 제한되지 않는다. 기판(21)의 예로는 사파이어 기판, 질화갈륨 기판, SiC 기판 등 다양할 수 있으며, 패터닝된 사파이어 기판일 수 있다. 기판(21)은 도 1의 평면도에서 보듯이 직사각형 또는 정사각형의 외형을 가질 수 있으나, 반드시 이에 한정되는 것은 아니다. 기판(21)의 크기는 특별히 한정되는 것은 아니며 다양하게 선택될 수 있다.The substrate 21 is not particularly limited as long as it is a substrate capable of growing a gallium nitride semiconductor layer. Examples of the substrate 21 may include a sapphire substrate, a gallium nitride substrate, a SiC substrate, and the like, and may be a patterned sapphire substrate. The substrate 21 may have a rectangular or square outer shape as shown in the plan view of FIG. 1, but is not necessarily limited thereto. The size of the substrate 21 is not particularly limited and may be variously selected.
복수의 발광셀들(R1C1~R3C3)은 기판(21) 상에 배치된다. 각 발광셀은 제1 도전형 반도체층(23), 제2 도전형 반도체층(27) 및 이들 사이에 개재된 활성층(25)을 포함한다. 제1 도전형 반도체층(23)은 기판(21) 상에 배치된다. 제1 도전형 반도체층(23)은 기판(21) 상에서 성장된 층일 수 있으며, 불순물, 예컨대 Si이 도핑된 질화갈륨계 반도체층일 수 있다.The plurality of light emitting cells R1C1 to R3C3 are disposed on the substrate 21. Each light emitting cell includes a first conductive semiconductor layer 23, a second conductive semiconductor layer 27, and an active layer 25 interposed therebetween. The first conductivity type semiconductor layer 23 is disposed on the substrate 21. The first conductivity type semiconductor layer 23 may be a layer grown on the substrate 21, and may be a gallium nitride based semiconductor layer doped with impurities such as Si.
제1 도전형 반도체층(23) 상에 활성층(25) 및 제2 도전형 반도체층(27)이 배치된다. 활성층(25) 및 제2 도전형 반도체층(27)은 제1 도전형 반도체층(23)보다 작은 면적을 가질 수 있다. 활성층(25) 및 제2 도전형 반도체층(27)은 메사 식각에 의해 형성된 메사(M)로 제1 도전형 반도체층(23) 상에 위치할 수 있다.The active layer 25 and the second conductive semiconductor layer 27 are disposed on the first conductive semiconductor layer 23. The active layer 25 and the second conductive semiconductor layer 27 may have an area smaller than that of the first conductive semiconductor layer 23. The active layer 25 and the second conductive semiconductor layer 27 may be located on the first conductive semiconductor layer 23 by mesa M formed by mesa etching.
활성층(25)은 질화갈륨계 반도체층으로 형성되며, 단일 양자우물 구조 또는 다중 양자우물 구조를 가질 수 있다. 활성층(25) 내에서 우물층의 조성 및 두께는 생성되는 광의 파장을 결정한다. 특히, 우물층의 조성을 조절함으로써 자외선, 청색광 또는 녹색광을 생성하는 활성층을 제공할 수 있다.The active layer 25 is formed of a gallium nitride-based semiconductor layer, and may have a single quantum well structure or a multiple quantum well structure. The composition and thickness of the well layer in the active layer 25 determines the wavelength of the light produced. In particular, it is possible to provide an active layer that generates ultraviolet light, blue light or green light by adjusting the composition of the well layer.
한편, 제2 도전형 반도체층(27)은 p형 불순물, 예컨대 Mg이 도핑된 질화갈륨계 반도체층일 수 있다. 제1 도전형 반도체층(23) 및 제2 도전형 반도체층(27)은 각각 단일층일 수 있으나, 이에 한정되는 것은 아니며, 다중층일 수도 있으며, 초격자층을 포함할 수도 있다. 제1 도전형 반도체층(23), 활성층(25) 및 제2 도전형 반도체층(27)은 금속유기화학 기상 성장법(MOCVD) 또는 분자선 에피택시(MBE)와 같은 공지의 방법을 이용하여 챔버 내에서 기판(21) 상에 성장되어 형성될 수 있다.The second conductivity-type semiconductor layer 27 may be a gallium nitride-based semiconductor layer doped with p-type impurities, for example, Mg. Each of the first conductive semiconductor layer 23 and the second conductive semiconductor layer 27 may be a single layer, but is not limited thereto, and may be a multilayer or a superlattice layer. The first conductive semiconductor layer 23, the active layer 25, and the second conductive semiconductor layer 27 may be formed using a known method such as metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE). It may be formed and grown on the substrate 21 within.
상기 복수의 발광셀들(R1C1~R3C3)은 메사 식각 영역 및 셀 분리 영역(ISO)에 의해 행렬 구조로 배열될 수 있다. 도면에, 복수의 발광셀들이 3×3 행렬로 배열된 것을 도시하고 있으나, 이에 한정되는 것은 아니며, 2×2 이상의 다양한 행렬로 배열될 수 있다.The plurality of light emitting cells R1C1 to R3C3 may be arranged in a matrix structure by mesa etching regions and cell isolation regions ISO. Although the drawings show that the plurality of light emitting cells are arranged in a 3 × 3 matrix, the present invention is not limited thereto and may be arranged in various matrices of 2 × 2 or more.
한편, 동일한 행에 배열된 발광셀들은 제1 도전형 반도체층(23)을 공유할 수 있다. 예를 들어, 제1행에 배열된 발광셀들(R1C1, R1C2, R1C3)은 제1 도전형 반도체층을 공유하며, 제2행에 배열된 발광셀들(R2C1, R2C2, R2C3) 또한, 제1 도전형 반도체층을 공유하고, 제3행에 배열된 발광셀들(R3C1, R3C2, R3C3) 또한, 제1 도전형 반도체층을 공유한다. 다만, 동일한 행에 배열된 발광셀들은 각각 서로 분리된 활성층(25) 및 제2 도전형 반도체층(27)을 가질 수 있다.Meanwhile, the light emitting cells arranged in the same row may share the first conductivity type semiconductor layer 23. For example, the light emitting cells R1C1, R1C2, and R1C3 arranged in the first row share the first conductive semiconductor layer, and the light emitting cells R2C1, R2C2, R2C3 arranged in the second row may also be formed in the second row. The first conductive semiconductor layer is shared, and the light emitting cells R3C1, R3C2, and R3C3 arranged in the third row also share the first conductive semiconductor layer. However, the light emitting cells arranged in the same row may have the active layer 25 and the second conductive semiconductor layer 27 separated from each other.
한편, 동일한 열에 배열된 발광셀들은 서로 분리된 제1 도전형 반도체층(23)을 가질 수 있다. 예를 들어, 제1열에 배열된 발광셀들(R1C1, R2C1, R3C1)의 제1 도전형 반도체층들(23)은 셀 분리 영역들(ISO)에 의해 서로 분리되며, 제2열에 배열된 발광셀들(R1C2, R2C2, R3C2)의 제1 도전형 반도체층들(23) 또한, 셀 분리 영역들(ISO)에 의해 서로 분리되며, 제3열에 배열된 발광셀들(R1C3, R2C3, R3C3)의 제1 도전형 반도체층들(23) 또한, 셀 분리 영역들(ISO)에 의해 분리된다.Meanwhile, the light emitting cells arranged in the same column may have the first conductivity type semiconductor layer 23 separated from each other. For example, the first conductive semiconductor layers 23 of the light emitting cells R1C1, R2C1, and R3C1 arranged in the first column are separated from each other by the cell isolation regions ISO, and the light emission arranged in the second column. The first conductive semiconductor layers 23 of the cells R1C2, R2C2, and R3C2 are also separated from each other by the cell isolation regions ISO, and the light emitting cells R1C3, R2C3, and R3C3 arranged in a third column. The first conductive semiconductor layers 23 are also separated by the cell isolation regions ISO.
본 실시예에 있어서, 동일한 행에 배열된 발광셀들이 제1 도전형 반도체층(23)을 공유함으로써 전류가 특정 열을 따라 집중되는 것을 방지할 수 있다. 즉,어느 하나의 행 내에서 특정 발광셀을 통해 전류가 집중되더라도 서로 공유된 제1 도전형 반도체층(23)을 통해 전류가 재분산될 수 있으며, 따라서, 다음 행의 발광셀들에 전류가 균일하게 분산되어 공급될 수 있다.In the present embodiment, the light emitting cells arranged in the same row share the first conductivity type semiconductor layer 23, thereby preventing the current from being concentrated along a specific column. That is, even if the current is concentrated through a specific light emitting cell in one row, the current may be redistributed through the first conductive semiconductor layer 23 shared with each other. It can be supplied uniformly distributed.
그러나 본 발명이 이에 한정되는 것은 아니며, 같은 행 내의 발광셀들도 셀 분리 영역에 의해 서로 분리된 제1 도전형ㄴ 반도체층들(23)을 가질 수도 있다.However, the present invention is not limited thereto, and light emitting cells in the same row may have first conductive semiconductor layers 23 separated from each other by a cell isolation region.
ZnO 투명 전극들(29)은 발광셀들 상에 배치된다. ZnO 투명 전극(29)은 제2 도전형 반도체층(27)과 대체로 동일한 형상을 가진다. 다만, ZnO 투명 전극(29)이 제2 도전형 반도체층(27)보다 좁은 면적을 가질 수 있다. ZnO 투명 전극(29)의 하부면은 모두 제2 도전형 반도체층(27)의 상면에 접촉할 수 있다.ZnO transparent electrodes 29 are disposed on the light emitting cells. The ZnO transparent electrode 29 has substantially the same shape as the second conductive semiconductor layer 27. However, the ZnO transparent electrode 29 may have a smaller area than the second conductivity type semiconductor layer 27. The lower surface of the ZnO transparent electrode 29 may be in contact with the upper surface of the second conductive semiconductor layer 27.
ZnO 투명 전극(29)은 Zn 및 O가 화합물의 대부분을 구성하고 ZnO의 울짜이트 결정 구조를 보유하는 한 임의의 재료를 포함할 수 있다. ZnO 투명 전극(29)은 알루미늄 도핑된 아연 산화물(AZO), 갈륨 도핑된 아연 산화물(GZO), 및 인디움 도핑된 아연 산화물(IZO)을 포함한다. ZnO 투명 전극(29)은 또한 소량의 다른 도펀트들 및/또는 다른 불순물이나 함유물 재료를 구비하는 재료뿐만 아니라 공공(vacancy) 및 삽입계 재료 결함의 존재에 기인한 비화학양론인 재료를 포함한다.The ZnO transparent electrode 29 may comprise any material so long as Zn and O make up the majority of the compound and retain the ZulO crystal structure. ZnO transparent electrode 29 includes aluminum doped zinc oxide (AZO), gallium doped zinc oxide (GZO), and indium doped zinc oxide (IZO). ZnO transparent electrode 29 also includes materials having small amounts of other dopants and / or other impurities or inclusion materials, as well as nonstoichiometric materials due to the presence of vacancy and insertion-based material defects. .
ZnO 투명 전극(29)은 얇은 연속적인 ZnO 씨드층을 제2 도전형 반도체층(27), 예를 들어, p-형 GaN층 상에 증착하고, 이어서 상기 ZnO 씨드층으로부터 ZnO 벌크층을 성장함으로써 형성될 수 있다. ZnO 투명 전극(29)은 단결정 구조를 가질 수 있다. ZnO 투명 전극(29)은 ITO막의 일반적인 두께의 약 5배 이상의 두께를 가질 수 있다. 예컨대, ITO 막은 흡수율 때문에 통상 약 500Å 두께로 형성되나, ZnO 투명 전극(29)은 흡수율이 낮으므로, 3000Å 이상, 나아가 약 5000Å 이상의 두께로 형성될 수 있다. ZnO 투명 전극(29)의 상한은 특별히 한정되는 것은 아니지만, 약 1um 이하일 수 있다.The ZnO transparent electrode 29 deposits a thin continuous ZnO seed layer on the second conductive semiconductor layer 27, for example a p-type GaN layer, and then grows a ZnO bulk layer from the ZnO seed layer. Can be formed. The ZnO transparent electrode 29 may have a single crystal structure. The ZnO transparent electrode 29 may have a thickness of at least about five times the general thickness of the ITO film. For example, the ITO film is usually formed to have a thickness of about 500 GPa because of the absorptivity. However, since the ZnO transparent electrode 29 has a low absorption, it may be formed to have a thickness of 3000 Pa or more, and more than about 5000 Pa. The upper limit of the ZnO transparent electrode 29 is not particularly limited, but may be about 1 μm or less.
한편, 각 발광셀은 제2 도전형 반도체층(27) 및 활성층(27)을 관통하여 제1 도전형 반도체층(23)을 노출시키는 관통홀(30a)을 포함할 수 있다. 관통홀(30a)은 ZnO 투명 전극(29)에도 형성될 수 있다. 따라서, 관통홀(30a)은 ZnO 투명 전극(29), 제2 도전형 반도체층(27) 및 활성층(25)으로 둘러싸인다. 관통홀(30a)은 도시한 바와 같이 발광셀의 일측 가장자리에서 타측 가장자리를 향해 기다란 형상을 가질 수 있다. 예를 들어, 도 1에 도시한 바와 같이, 관통홀들(30a)은 셀 분리 영역(ISO)에 대해 수직한 방향으로 기다란 형상을 가질 수 있다.Each of the light emitting cells may include a through hole 30a penetrating through the second conductive semiconductor layer 27 and the active layer 27 to expose the first conductive semiconductor layer 23. The through hole 30a may also be formed in the ZnO transparent electrode 29. Therefore, the through hole 30a is surrounded by the ZnO transparent electrode 29, the second conductive semiconductor layer 27, and the active layer 25. The through hole 30a may have an elongated shape from one edge of the light emitting cell toward the other edge as shown. For example, as shown in FIG. 1, the through holes 30a may have an elongated shape in a direction perpendicular to the cell isolation region ISO.
발광셀들에 형성되는 관통홀들(30a)은 서로 동일한 크기를 가지며, 따라서 관통홀들(30a)에 의해 노출되는 제1 도전형 반도체층들(23)의 노출 영역들은 서로 동일한 크기를 가진다. 또한, 복수의 발광셀들(R1C1~R3C3)이 서로 동일한 크기를 가지며, 나아가, 관통홀들(30a)이 서로 동일한 크기를 가지므로, 상기 활성층들(25)은 서로 동일한 광 생성 영역을 가질 수 있다. 즉, 상기 활성층들(25)은 서로 동일한 외형을 가질 수 있으며, 나아가 동일한 크기의 관통홀들(30a)이 활성층들(25)을 관통한다. 이에 따라, 활성층들(25)에서 광이 생성될 수 있는 영역들이 서로 동일하게 된다. 활성층들(25)의 광 생성 영역들이 서로 동일하므로, 발광셀들에 전류를 균일하게 분산시킬 수 있다.The through holes 30a formed in the light emitting cells have the same size, and therefore, the exposed areas of the first conductive semiconductor layers 23 exposed by the through holes 30a have the same size. In addition, since the plurality of light emitting cells R1C1 to R3C3 have the same size and furthermore, the through holes 30a have the same size, the active layers 25 may have the same light generating area. have. That is, the active layers 25 may have the same outer shape, and through holes 30a having the same size penetrate through the active layers 25. Accordingly, regions in which the light may be generated in the active layers 25 are the same. Since the light generating regions of the active layers 25 are identical to each other, current may be uniformly distributed in the light emitting cells.
한편, 도 1에 도시한 바와 같이, 관통홀들(30a)은 각각 활성층들(25) 내에서 대체로 동일한 위치들에 형성될 수 있으나, 제2 전극 패드(35a)가 형성되는 발광셀(R1C2)의 경우 제2 전극 패드(35a)에 의해 관통홀(30a)의 위치가 약간 변형될 수 있다. 즉, 제2 전극 패드(35a)로부터의 이격 거리를 확보하기 위해 발광셀(R1C2) 에 형성된 관통홀(30a)이 다른 발광셀들에 형성된 관통홀들(30a)에 비해 약간 아래에 배치될 수 있다.Meanwhile, as shown in FIG. 1, the through holes 30a may be formed at substantially the same positions in the active layers 25, but the light emitting cells R1C2 in which the second electrode pads 35a are formed. In this case, the position of the through hole 30a may be slightly modified by the second electrode pad 35a. That is, the through hole 30a formed in the light emitting cell R1C2 may be disposed slightly below the through holes 30a formed in the other light emitting cells in order to secure the separation distance from the second electrode pad 35a. have.
외부로부터 전기 유입을 위해 제1 패드 전극(33a) 및 제2 패드 전극(35a)이 배치된다. 제1 및 제2 패드 전극들(33a, 35a)은 각각 도 1에 도시한 바와 같이 발광셀 상부 영역 내에 한정되어 배치될 수 있다. 예를 들어, 제1 패드 전극(33a)은 발광셀(R3C2) 상에 배치되고, 제2 패드 전극(35a)은 발광셀(R1C2) 상에 배치될 수 있다. 그러나 발광셀들이 짝수 열로 배열된 경우, 제1 및 제2 패드 전극들(33a 35a)은 두 개의 발광셀들에 걸쳐서 배치될 수도 있다.The first pad electrode 33a and the second pad electrode 35a are disposed to introduce electricity from the outside. As illustrated in FIG. 1, the first and second pad electrodes 33a and 35a may be limitedly disposed in the upper region of the light emitting cell. For example, the first pad electrode 33a may be disposed on the light emitting cell R3C2, and the second pad electrode 35a may be disposed on the light emitting cell R1C2. However, when the light emitting cells are arranged in even rows, the first and second pad electrodes 33a 35a may be disposed over two light emitting cells.
한편, 제1 패드 전극(33a)은 절연층(31a)에 의해 ZnO 투명 전극(29)으로부터 절연된다. 절연층(31a)은 제1 패드 전극(33a)의 일부 영역 아래에 배치될 수 있으며, 제1 패드 전극(33a)의 일부는 관통홀(30a)을 통해 노출된 제1 도전형 반도체층(23)에 전기적으로 접속되어 제1 접촉 전극(33b)의 일부를 구성할 수 있다.On the other hand, the first pad electrode 33a is insulated from the ZnO transparent electrode 29 by the insulating layer 31a. The insulating layer 31a may be disposed under a portion of the first pad electrode 33a, and a portion of the first pad electrode 33a is exposed through the through hole 30a. ) May be electrically connected to constitute a part of the first contact electrode 33b.
제2 패드 전극(35a)은 절연층(31b)에 의해 부분적으로 ZnO 투명 전극(29)으로부터 이격될 수 있다. 한편, 제2 패드 전극(35a)의 일부는 ZnO 투명 전극(29)에 접촉하며, 제2 접촉 전극(35b)의 일부를 구성할 수 있다.The second pad electrode 35a may be partially spaced apart from the ZnO transparent electrode 29 by the insulating layer 31b. A portion of the second pad electrode 35a may contact the ZnO transparent electrode 29 and may form a portion of the second contact electrode 35b.
제1 접촉 전극들(33b)은 상기 관통홀들(30a) 내에 배치되며, 제1 도전형 반도체층들(23)에 오믹 콘택한다. 각각의 제1 접촉 전극(33b)은 제2 도전형 반도체층(27) 및 활성층(25)으로부터 이격된다. 제1 접촉 전극들(33b)의 크기는 모두 동일할 수 있으며, 제1 접촉 전극들(33b)과 제1 도전형 반도체층이 접촉하는 면적들 또한 서로 동일할 수 있다.The first contact electrodes 33b are disposed in the through holes 30a and make ohmic contact with the first conductive semiconductor layers 23. Each first contact electrode 33b is spaced apart from the second conductivity type semiconductor layer 27 and the active layer 25. The first contact electrodes 33b may have the same size, and the areas where the first contact electrodes 33b and the first conductive semiconductor layer contact each other may also be the same.
제2 접촉 전극들(35b)은 ZnO 투명 전극들(29) 상에 위치하여 ZnO 투명 전극들(29)에 각각 전기적으로 접촉한다. 제2 접촉 전극들(35b)은 대체로 동일한 형상을 가질 수 있다. 나아가, 제2 전극 패드(35a)가 ZnO 투명 전극(29)에 접촉하는 부분 또한, 제2 접촉 전극의 일부 형상과 동일하게 할 수도 있다. The second contact electrodes 35b are positioned on the ZnO transparent electrodes 29 and are in electrical contact with the ZnO transparent electrodes 29, respectively. The second contact electrodes 35b may have substantially the same shape. Furthermore, the part where the 2nd electrode pad 35a contacts the ZnO transparent electrode 29 can also be made to be the same as some shape of a 2nd contact electrode.
제2 접촉 전극들(29)은 거울면 대칭 구조로 배열될 수 있다. 이들은 예를 들어, 제1 패드 전극(33a)과 제2 패드 전극(35a)을 가로지르는 면에 대해 대칭일 수 있다. 제1 접촉 전극들(29) 또한 거울면 대칭 구조로 배열될 수 있다. 제1 및 제2 접촉 전극들(33b, 35b)을 거울면 대칭 구조로 형성함으로써, 제1 및 제2 전극 패드들(33a, 35a)의 양측으로 전류를 균일하게 공급할 수 있다.The second contact electrodes 29 may be arranged in a mirror symmetric structure. These may be symmetrical with respect to the plane across the first pad electrode 33a and the second pad electrode 35a, for example. The first contact electrodes 29 may also be arranged in a mirror symmetric structure. By forming the first and second contact electrodes 33b and 35b in a mirror symmetrical structure, a current can be uniformly supplied to both sides of the first and second electrode pads 33a and 35a.
한편, 제1 전극 연결부(33ab)는 복수의 발광셀들을 병렬 연결하기 위해 이웃하는 제1 접촉 전극들(33b)을 전기적으로 연결한다. 제1 전극 연결부(33ab)는 특히 동일한 행에 배치된 발광셀들 상의 제1 접촉 전극들(33b)을 전기적으로 연결한다. 도 1에 도시한 바와 같이, 제1 전극 연결부(33ab)는 제1 전극 패드(33a)와 제1 전촉 전극들(33b)을 연결할 수 있다. 한편, 절연층(31aa)이 제1 전극 연결부(33ab)와 ZnO 투명 전극(29) 사이에 배치되어 제1 전극 연결부(33ab)를 ZnO 투명 전극(29)으로부터 절연시킨다. 절연층(31aa)은 절연층(31a)으로부터 연속적일 수 있다.Meanwhile, the first electrode connector 33ab electrically connects adjacent first contact electrodes 33b to connect the plurality of light emitting cells in parallel. In particular, the first electrode connection part 33ab electrically connects the first contact electrodes 33b on the light emitting cells arranged in the same row. As illustrated in FIG. 1, the first electrode connection part 33ab may connect the first electrode pad 33a and the first electrode electrodes 33b. Meanwhile, an insulating layer 31aa is disposed between the first electrode connecting portion 33ab and the ZnO transparent electrode 29 to insulate the first electrode connecting portion 33ab from the ZnO transparent electrode 29. The insulating layer 31aa may be continuous from the insulating layer 31a.
제2 전극 연결부(35ab)는 복수의 발광셀들을 병렬 연결하기 위해 이웃하는 제2 접촉 전극들을 전기적으로 연결한다. 제2 전극 연결부(35ab)는 특히 동일한 행에 배치된 발광셀들 상의 제2 접촉 전극들(35b)을 전기적으로 연결한다. 한편, 절연층(31bb)이 메사 식각 영역에서 제1 도전형 반도체층(23)과 제2 전극 연결부(35ab) 사이에 배치되어 제2 전극 연결부(35ab)를 제1 도전형 반도체층(23)으로부터 절연시킨다.The second electrode connector 35ab electrically connects adjacent second contact electrodes to connect the plurality of light emitting cells in parallel. In particular, the second electrode connection part 35ab electrically connects the second contact electrodes 35b on the light emitting cells arranged in the same row. Meanwhile, the insulating layer 31bb is disposed between the first conductivity type semiconductor layer 23 and the second electrode connection part 35ab in the mesa etching region to form the second electrode connection part 35ab in the first conductivity type semiconductor layer 23. Insulate from
제3 전극 연결부(335)는 복수의 발광셀들을 직렬 연결하기 위해 이웃하는 제1 접촉 전극과 제2 접촉 전극을 전기적으로 연결한다. 제3 전극 연결부(335)는 동일한 열에 배치된 발광셀들 상의 제1 접촉 전극(33b)과 제2 접촉 전극(35b)을 전기적으로 연결한다. 한편, 절연층(31ab)이 제3 전극 연결부(335)와 ZnO 투명 전극(29) 사이에 개재되어 제3 전극 연결부(335)가 ZnO 투명 전극(29)에 단락되는 것을 방지한다. 절연층(31ab)은 셀 분리 영역(ISO) 영역에도 배치될 수 있으며, 제3 전극 연결부(335)가 제1 도전형 반도체층(23), 활성층(25) 또는 제2 도전형 반도체층(27)에 단락되는 것을 방지한다.The third electrode connector 335 electrically connects the neighboring first and second contact electrodes to connect the plurality of light emitting cells in series. The third electrode connector 335 electrically connects the first contact electrode 33b and the second contact electrode 35b on the light emitting cells arranged in the same column. Meanwhile, the insulating layer 31ab is interposed between the third electrode connector 335 and the ZnO transparent electrode 29 to prevent the third electrode connector 335 from being short-circuited to the ZnO transparent electrode 29. The insulating layer 31ab may also be disposed in the cell isolation region (ISO) region, and the third electrode connection portion 335 may include the first conductive semiconductor layer 23, the active layer 25, or the second conductive semiconductor layer 27. To prevent a short circuit.
상기 제1 전극 연결부(33ab), 제2 전극 연결부(35ab) 및 제3 전극 연결부(335)를 통해, 도 3에 도시한 바와 같이. 발광셀들이 직병렬 구조로 연결된다. 도 3에서 점선은 서로 공유된 제1 도전형 반도체층(23)에 의한 전기적 연결을 나타낸다.As shown in FIG. 3, through the first electrode connection part 33ab, the second electrode connection part 35ab, and the third electrode connection part 335. The light emitting cells are connected in a series-parallel structure. In FIG. 3, the dotted line shows the electrical connection by the first conductivity type semiconductor layer 23 shared with each other.
본 실시예에 따르면, ZnO 투명 전극(29)을 채택함과 아울러, 활성층들(25)의 광 생성 영역들을 동일하게 하고, 제1 접촉 전극들(33b) 및 제2 접촉 전극들(35b)을 대체로 동일하게 형성함으로써, 복수의 발광셀들에 전류를 균일하게 분산시킬 수 있다.According to the present embodiment, the ZnO transparent electrode 29 is adopted, and the light generating regions of the active layers 25 are the same, and the first contact electrodes 33b and the second contact electrodes 35b are made. By forming the same substantially, it is possible to uniformly distribute the current in the plurality of light emitting cells.
도 4A 내지 도 4D는 본 발명의 일 실시예에 따른 발광 다이오드 제조 방법을 설명하기 위한 개략적인 평면도들이다.4A through 4D are schematic plan views illustrating a method of manufacturing a light emitting diode according to an exemplary embodiment of the present invention.
도 2A, 도 2B 및 도 4A를 참조하면, 우선 기판(21) 상에 제1 도전형 반도체층(23), 활성층(25) 및 제2 도전형 반도체층(27)이 성장된다. 이들 반도체층들은 금속 유기화학기상 성장, 분자선 에피택시, 수소화물 기상 성장 등의 기술을 이용하여 형성될 수 있다. 이어서, 제2 도전형 반도체층(27) 상에 ZnO 투명 전극(29)이 형성된다. ZnO 투명 전극(29)은 다양한 방법으로 형성될 수 있으나, 특히, ZnO 씨드층을 형성한 수 수용액법을 이용한 ZnO 벌크층을 성장함으로써 울짜이트 구조의 단결정 ZnO 투명 전극(29)이 형성될 수 있다.2A, 2B, and 4A, first, the first conductive semiconductor layer 23, the active layer 25, and the second conductive semiconductor layer 27 are grown on the substrate 21. As shown in FIG. These semiconductor layers can be formed using techniques such as metal organic chemical vapor growth, molecular beam epitaxy, hydride vapor phase growth, and the like. Subsequently, a ZnO transparent electrode 29 is formed on the second conductivity type semiconductor layer 27. The ZnO transparent electrode 29 may be formed by various methods, but in particular, the single crystal ZnO transparent electrode 29 having a wurtzite structure may be formed by growing a ZnO bulk layer using an aqueous solution method in which a ZnO seed layer is formed. have.
그 후, 사진 및 식각 공정을 이용하여 관통홀들(30a) 및 메사(M)가 형성된다. 동일한 포토레지스트 패턴을 이용하여 ZnO 투명 전극(29)과, 제2 도전형 반도체층(27) 및 활성층(25)이 패터닝될 수 있다. 이때, ZnO 투명 전극(29)은 예를 들어 습식 식각을 이용하여 식각될 수 있으며, 제2 도전형 반도체층(27) 및 활성층(25)은 건식 식각을 이용하여 식각될 수 있다. 이에 따라, 행렬 구조로 배열된 복수의 발광셀 영역들이 정의될 수 있다.Thereafter, through-holes 30a and mesas M are formed using a photo and etching process. The ZnO transparent electrode 29, the second conductive semiconductor layer 27, and the active layer 25 may be patterned using the same photoresist pattern. In this case, the ZnO transparent electrode 29 may be etched by using wet etching, for example, and the second conductive semiconductor layer 27 and the active layer 25 may be etched by using dry etching. Accordingly, a plurality of light emitting cell regions arranged in a matrix structure may be defined.
나아가, 발광셀 영역들에 형성된 관통홀들(30a)은 모두 동일한 크기를 가지며, 따라서, 각 발광셀 영역 내의 활성층(25)은 일정한 광 생성 영역을 가진다.Furthermore, the through holes 30a formed in the light emitting cell regions all have the same size, and thus, the active layer 25 in each light emitting cell region has a constant light generating region.
도 2A, 도 2B 및 도 4B를 참조하면, 셀 분리 영역들(ISO)이 형성된다. 셀 분리 영역들(ISO)은 사진 및 식각 공정을 이용하여 형성될 수 있으며, 셀 분리 영역들(ISO)에서 기판(21) 상면이 노출될 수 있다. 상기 셀 분리 영역들(ISO)에 의해 발광셀들의 행들이 서로 분리된다.2A, 2B, and 4B, cell isolation regions ISO are formed. The cell isolation regions ISO may be formed using a photolithography and etching process, and the upper surface of the substrate 21 may be exposed in the cell isolation regions ISO. Rows of light emitting cells are separated from each other by the cell isolation regions ISO.
도 2A, 도 2B 및 도 4C 참조하면, 절연층(31a, 31b, 31aa, 31bb, 31ab)이 형성된다. 절연층은 예를 들어, SiO2 또는 Si3N4의 단일층으로 형성될 수 있으나, 이에 한정되는 것은 아니다. 예를 들어, 절연층은 실리콘질화막과 실리콘산화막을 포함하는 다층 구조를 가질 수도 있으며, SiO2막, TiO2막, ZrO2막, MgF2막, 또는 Nb2O5막 등에서 굴절률이 서로 다른 층들을 교대로 적층한 분포브래그 반사기(DBR)를 포함할 수도 있다. 특히, DBR을 채택함으로써 활성층(25)에서 생성된 광이 절연층(31a, 31b, 31aa, 31bb, 31ab) 상에 배치되는 다양한 전극들 및 연결부들에 흡수되어 손실되는 것을 방지한다.2A, 2B, and 4C, insulating layers 31a, 31b, 31aa, 31bb, and 31ab are formed. The insulating layer may be formed of, for example, a single layer of SiO 2 or Si 3 N 4, but is not limited thereto. For example, the insulating layer may have a multi-layer structure including a silicon nitride film and a silicon oxide film, and a distribution bragg is formed by alternately stacking layers having different refractive indices in an SiO 2 film, a TiO 2 film, a ZrO 2 film, an MgF 2 film, or an Nb 2 O 5 film. It may also include a reflector DBR. In particular, the adoption of DBR prevents light generated in the active layer 25 from being absorbed and lost by various electrodes and connections disposed on the insulating layers 31a, 31b, 31aa, 31bb, 31ab.
도 2A, 도 2B 및 도 4D 참조하면, 제1 패드 전극(33a), 제1 접촉 전극들(33b), 제2 패드 전극(35a), 제2 접촉 전극들(35ab), 제1 전극 연결부(33ab), 제2 전극 연결부(35ab), 및 제3 전극 연결부들(335)이 형성된다. 이들은 동일한 재료로 동일 공정에서 함께 형성될 수 있다.2A, 2B, and 4D, the first pad electrode 33a, the first contact electrodes 33b, the second pad electrode 35a, the second contact electrodes 35ab, and the first electrode connection part ( 33ab, second electrode connectors 35ab, and third electrode connectors 335 are formed. These can be formed together in the same process with the same material.
이어서, 스크라이빙 공정을 통해 기판(21)을 개별 발광 다이오드로 분할함으로써 도 1의 발광 다이오드가 완성된다.Subsequently, the light emitting diode of FIG. 1 is completed by dividing the substrate 21 into individual light emitting diodes through a scribing process.
본 발명의 실시예들에 따르면, ZnO 투명 전극(29)이 제2 도전형 반도체층(27) 상에 전류 블록층을 도입함이 없이 직접 형성된다. 이에 따라, 발광 다이오드 제조 공정이 극히 단순해진다.According to embodiments of the present invention, the ZnO transparent electrode 29 is directly formed on the second conductive semiconductor layer 27 without introducing a current block layer. As a result, the light emitting diode manufacturing process is extremely simple.
도 5는 본 발명의 또 다른 실시예에 따른 발광 다이오드를 설명하기 위한 개략적인 평면도이고, 도 6A 및 도 6B는 도 5의 절취선 A-A 및 B-B를 따라 취해진 단면도들이다.5 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention, and FIGS. 6A and 6B are cross-sectional views taken along the cutting lines A-A and B-B of FIG. 5.
도 5, 도 6A 및 도 6B를 참조하면, 본 실시예에 따른 발광 다이오드는 도 1 내지 도 3을 참조하여 설명한 발광 다이오드와 대체로 유사한, ZnO 투명 전극들(29)이 거칠어진 표면(R)을 가지는 것에 차이가 있다.5, 6A and 6B, the light emitting diode according to the present embodiment has a surface R roughened by ZnO transparent electrodes 29, which is generally similar to the light emitting diode described with reference to FIGS. There is a difference in having.
ZnO 투명 전극들(29)은 평평한 표면과 거칠어진 표면(R)을 가진다. 거칠어진 표면(R)은 광 추출 효율을 향상시킨다. 예를 들어, 제1 전극 패드(33a), 제2 전극 패드(35a), 제2 접촉 전극들(35b) 및 전극 연결부들(33ab, 35ab, 335) 및 절연층(31a, 31b, 31aa, 31bb, 31ab) 등이 형성되는 영역은 평평한 표면을 가지며, 그 주위 영역들에 거칠어진 표면(R)이 형성된다. 또한, ZnO 투명 전극(29)의 가장자리 영역들에 평평한 표면이 형성될 수 있다.The ZnO transparent electrodes 29 have a flat surface and a roughened surface R. The roughened surface R improves the light extraction efficiency. For example, the first electrode pad 33a, the second electrode pad 35a, the second contact electrodes 35b and the electrode connecting portions 33ab, 35ab, and 335 and the insulating layers 31a, 31b, 31aa, and 31bb. , 31ab) and the like have a flat surface, and a roughened surface R is formed in the surrounding areas. In addition, a flat surface may be formed in the edge regions of the ZnO transparent electrode 29.
거칠어진 표면(R)은 절연층(31a, 31b, 31aa, 31bb, 31ab)을 형성하기 전에 거칠어진 표면(R)이 형성될 영역을 노출시키는 포토레지스트 패턴을 형성하고, 산 용액을 이용하여 ZnO 표면을 습식 처리함으로써 형성될 수 있다. 습식 처리에 따라 생성되는 거칠어진 표면(R)의 최대 깊이는 대략 200Å~2000Å 범위 내일 수 있다.The roughened surface R forms a photoresist pattern exposing a region where the roughened surface R is to be formed before forming the insulating layers 31a, 31b, 31aa, 31bb, and 31ab, and using ZnO using an acid solution. It can be formed by wet treating the surface. The maximum depth of the roughened surface R produced by the wet treatment may be in the range of approximately 200 mm to 2000 mm.
도 7은 본 발명의 또 다른 실시예에 따른 발광 다이오드를 설명하기 위한 개략적인 평면도이다.7 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention.
도 7을 참조하면, 본 실시예에 따른 발광 다이오드는 도 1 내지 도 3을 참조하여 설명한 발광 다이오드와 대체로 유사하나, 일부 발광셀들에 복수의 관통홀들(130a)이 형성되는 것에 차이가 있다. 제1 접촉 전극(33b)의 접촉 위치를 넓게 분산시키기 위해, 하나의 발광셀 내에 복수의 관통홀들(130a)이 형성될 수 있다. 다만, 제1 전극 패드(33a) 또는 제2 전극 패드(35a)가 형성되는 발광셀들에 제1 접촉 전극(33b)을 넓게 분산시키는 것이 곤란한 경우, 이들 발광셀들에는 각각 하나의 관통홀(30a)이 형성될 수도 있다. 다만, 각 발광셀에 형성되는 복수의 관통홀들(130a)의 크기의 합은 관통홀(30a)의 크기와 동일할 수 있으며, 따라서, 제1 접촉 전극(33b)이 제1 도전형 반도체층(23)에 접촉하는 접촉 면적은 모든 발광셀들에서 동일할 수 있다.Referring to FIG. 7, the light emitting diode according to the present embodiment is generally similar to the light emitting diode described with reference to FIGS. 1 to 3, but there is a difference in that a plurality of through holes 130a are formed in some light emitting cells. . In order to spread the contact position of the first contact electrode 33b widely, a plurality of through holes 130a may be formed in one light emitting cell. However, when it is difficult to widely disperse the first contact electrode 33b in the light emitting cells in which the first electrode pad 33a or the second electrode pad 35a is formed, each of the light emitting cells has one through hole ( 30a) may be formed. However, the sum of the sizes of the plurality of through holes 130a formed in each of the light emitting cells may be the same as that of the through holes 30a. Thus, the first contact electrode 33b may be formed of the first conductive semiconductor layer. The contact area in contact with 23 may be the same in all light emitting cells.
본 실시예에 있어서도, 앞서 도 5, 도 6A 및 도 6B를 참조하여 설명한 바와 같이, ZnO 표면에 거칠어진 표면(R)이 추가로 형성될 수도 있다.Also in this embodiment, as described above with reference to FIGS. 5, 6A, and 6B, a roughened surface R may be further formed on the ZnO surface.
도 8은 본 발명의 또 다른 실시예에 따른 발광 다이오드를 설명하기 위한 개략적인 평면도이다.8 is a schematic plan view illustrating a light emitting diode according to still another embodiment of the present invention.
도 8을 참조하면, 본 실시예에 따른 발광 다이오드는 도 1 내지 도 3을 참조하여 설명한 발광 다이오드와 대체로 유사하나, 앞의 실시예에 있어서, 제2 전극 연결부들(35ab)이 첫번째 행(R1)에 배치된 발광셀들 상에 한정되어 위치하는 것과 달리, 본 실시예에서, 제2 전극 연결부들(35ab)은 모든 행들의 발광셀들 상에 배치된 것에 차이가 있다.Referring to FIG. 8, the light emitting diode according to the present embodiment is generally similar to the light emitting diode described with reference to FIGS. 1 to 3, but in the previous embodiment, the second electrode connecting portions 35ab are formed in the first row R1. Unlike to be positioned on the light emitting cells disposed in the ()), in the present embodiment, the second electrode connecting portions (35ab) is different from that disposed on the light emitting cells of all the rows.
본 실시예에 따르면, 첫번째 행(R1)뿐만 아니라 다른 행들(R2, R3)에도 제2 전극 연결부들(35ab)을 배치함으로써, 첫번째 행(R1) 내의 특정 발광셀을 통해 전류가 집중되더라도 공유된 제1 도전형 반도체층(23)에 의한 전류 분산에 더하여 제2 전극 연결부들(35ab)을 이용하여 전류를 분산시킬 수 있어 다음 행들(R2, R3) 내의 발광셀들에 전류를 더욱 균일하게 분산시킬 수 있다.According to the present embodiment, the second electrode connecting portions 35ab are disposed not only in the first row R1 but also in the other rows R2 and R3, so that even if current is concentrated through a specific light emitting cell in the first row R1, In addition to the current dispersion by the first conductivity type semiconductor layer 23, the current can be distributed using the second electrode connecting portions 35ab to more evenly distribute the current to the light emitting cells in the next rows R2 and R3. You can.
나아가, 본 실시예에 있어서도, 앞서 도 5, 도 6A 및 도 6B를 참조하여 설명한 바와 같이, ZnO 표면에 거칠어진 표면(R)이 추가로 형성될 수 있으며, 또한, 도 7을 참조하여 설명한 바와 같이, 하나의 발광셀 내에 복수의 관통홀들(130a)이 형성될 수도 있다.In addition, in the present embodiment, as described above with reference to FIGS. 5, 6A, and 6B, the roughened surface R may be further formed on the ZnO surface, and as described with reference to FIG. Likewise, a plurality of through holes 130a may be formed in one light emitting cell.
이상에서, 본 발명의 다양한 실시예들에 대해 설명하였으나, 본 발명은 이들 실시예들에 한정되는 것은 아니다. 또한, 하나의 실시예에 대해서 설명한 사항이나 구성요소는 본 발명의 기술적 사상을 벗어나지 않는 한, 다른 실시예에도 적용될 수 있다.In the above, various embodiments of the present invention have been described, but the present invention is not limited to these embodiments. In addition, the matters or components described with respect to one embodiment may be applied to other embodiments without departing from the technical spirit of the present invention.

Claims (16)

  1. 기판;Board;
    상기 기판 상부에 배치되고, 각각 제1 도전형 반도체층과 제2 도전형 반도체층 사이에 개재된 활성층을 포함하는 복수의 발광셀들;A plurality of light emitting cells disposed on the substrate, each of the light emitting cells including an active layer interposed between a first conductive semiconductor layer and a second conductive semiconductor layer;
    상기 발광셀들의 제2 도전형 반도체층들 상에 각각 배치된 ZnO 투명 전극들;ZnO transparent electrodes disposed on second conductive semiconductor layers of the light emitting cells, respectively;
    상기 발광셀들의 제1 도전형 반도체층들에 각각 전기적으로 접촉하는 제1 접촉 전극들;First contact electrodes electrically contacting first conductive semiconductor layers of the light emitting cells;
    상기 ZnO 투명 전극들에 각각 전기적으로 접촉하는 제2 접촉 전극들;Second contact electrodes in electrical contact with the ZnO transparent electrodes, respectively;
    상기 제1 접촉 전극들 중 일부에 전기적으로 연결된 제1 패드 전극; 및A first pad electrode electrically connected to some of the first contact electrodes; And
    상기 제2 접촉 전극들 중 일부에 전기적으로 연결된 제2 패드 전극을 포함하고,A second pad electrode electrically connected to some of the second contact electrodes,
    상기 발광셀들 각각은 상기 제2 도전형 반도체층 및 상기 활성층을 관통하여 상기 제1 도전형 반도체층을 노출시키는 적어도 하나의 관통홀을 가지며,Each of the light emitting cells has at least one through hole through the second conductive semiconductor layer and the active layer to expose the first conductive semiconductor layer,
    상기 활성층들은 서로 동일한 광 생성 영역을 가지는 발광 다이오드.The active layers have the same light generating region with each other.
  2. 청구항 1에 있어서,The method according to claim 1,
    상기 ZnO 투명 전극들과 상기 제2 도전형 반도체층들의 접촉 면적은 서로 동일한 발광 다이오드.And a contact area between the ZnO transparent electrodes and the second conductive semiconductor layer is the same.
  3. 청구항 2에 있어서,The method according to claim 2,
    상기 ZnO 투명 전극들 각각은 그 하부면 전체가 제2 도전형 반도체층의 상면에 접촉하는 발광 다이오드.Each of the ZnO transparent electrodes has a bottom surface thereof in contact with an upper surface of the second conductive semiconductor layer.
  4. 청구항 1에 있어서,The method according to claim 1,
    상기 제1 접촉 전극과 상기 제1 도전형 반도체층의 접촉 면적은 각 발광셀에 대해 동일한 발광 다이오드.The light emitting diode of claim 1, wherein the contact area between the first contact electrode and the first conductive semiconductor layer is the same for each light emitting cell.
  5. 청구항 4에 있어서, 상기 제1 접촉 전극들은 서로 동일한 형상을 가지는 발광 다이오드.The light emitting diode of claim 4, wherein the first contact electrodes have the same shape.
  6. 청구항 1에 있어서,The method according to claim 1,
    상기 제1 패드 전극과 ZnO 투명 전극 사이에 개재된 절연층을 더 포함하는 발광 다이오드.The light emitting diode further comprising an insulating layer interposed between the first pad electrode and the ZnO transparent electrode.
  7. 청구항 6에 있어서,The method according to claim 6,
    상기 제1 패드 전극은 상기 ZnO 투명 전극 상부에 배치되되, 상기 관통홀을 통해 상기 제1 도전형 반도체층에 접촉하는 제1 접촉 전극과 직접 연결된 발광 다이오드.The first pad electrode is disposed on the ZnO transparent electrode, the light emitting diode directly connected to the first contact electrode in contact with the first conductive semiconductor layer through the through hole.
  8. 청구항 1에 있어서,The method according to claim 1,
    상기 제2 패드 전극과 ZnO 투명 전극 사이에 개재된 절연층을 더 포함하되,Further comprising an insulating layer interposed between the second pad electrode and the ZnO transparent electrode,
    상기 제2 패드 전극의 일부는 상기 ZnO 투명 전극에 접촉하는 발광 다이오드.A portion of the second pad electrode is in contact with the ZnO transparent electrode.
  9. 청구항 1에 있어서,The method according to claim 1,
    상기 제2 접촉 전극들은 거울면 대칭 구조로 배열된 발광 다이오드.And the second contact electrodes are arranged in a mirror symmetric structure.
  10. 청구항 9에 있어서,The method according to claim 9,
    상기 제1 접촉 전극들은 거울면 대칭 구조로 배열된 방광 다이오드.And the first contact electrodes are arranged in a mirror symmetric structure.
  11. 청구항 1에 있어서,The method according to claim 1,
    상기 복수의 발광셀들을 병렬 연결하기 위해 이웃하는 제1 접촉 전극들을 전기적으로 연결하기 위한 적어도 하나의 제1 전극 연결부;At least one first electrode connection part for electrically connecting neighboring first contact electrodes to connect the plurality of light emitting cells in parallel;
    상기 복수의 발광셀들을 병렬 연결하기 위해 이웃하는 제2 접촉 전극들을 전기적으로 연결하기 위한 적어도 하나의 제2 전극 연결부; 및At least one second electrode connector for electrically connecting neighboring second contact electrodes to connect the plurality of light emitting cells in parallel; And
    상기 복수의 발광셀들을 직렬 연결하기 위해 이웃하는 제1 접촉 전극과 제2 접촉 전극을 전기적으로 연결하기 위한 제3 전극 연결부들을 더 포함하는 발광 다이오드.And a third electrode connection part for electrically connecting a neighboring first contact electrode and a second contact electrode to connect the plurality of light emitting cells in series.
  12. 청구항 11에 있어서,The method according to claim 11,
    상기 제1 전극 연결부는 상기 제1 패드 전극에 연결되며,The first electrode connection part is connected to the first pad electrode,
    상기 제1 전극 연결부는 절연층에 의해 ZnO 투명 전극으로부터 절연된 발광 다이오드.The first electrode connector is insulated from the ZnO transparent electrode by an insulating layer.
  13. 청구항 11에 있어서,The method according to claim 11,
    상기 제2 전극 연결부는 절연층에 의해 제1 도전형 반도체층으로부터 절연된 발광 다이오드.The second electrode connection part is insulated from the first conductive semiconductor layer by an insulating layer.
  14. 청구항 11에 있어서,The method according to claim 11,
    상기 복수의 발광셀들은 행렬로 배열되고,The plurality of light emitting cells are arranged in a matrix,
    동일한 행에 배치된 발광셀들은 제1 도전형 반도체층을 공유하며,The light emitting cells arranged in the same row share the first conductivity type semiconductor layer,
    동일한 열에 배치된 발광셀들은 서로 분리된 제1 도전형 반도체층을 가지되,The light emitting cells arranged in the same column have a first conductivity type semiconductor layer separated from each other,
    상기 제1 전극 연결부는 동일한 행에 배치된 발광셀들 상의 제1 접촉 전극들을 전기적으로 연결하고,The first electrode connector electrically connects the first contact electrodes on the light emitting cells arranged in the same row.
    상기 제2 전극 연결부는 동일한 행에 배치된 발광셀들 상의 제2 접촉 전극들을 전기적으로 연결하며,The second electrode connector electrically connects the second contact electrodes on the light emitting cells arranged in the same row.
    상기 제3 전극 연결부는 동일한 열에 배치된 발광셀들 상의 제1 접촉 전극과제2 접촉 전극을 전기적으로 연결하는 발광 다이오드.The third electrode connector is a light emitting diode for electrically connecting the first contact electrode and the second contact electrode on the light emitting cells arranged in the same column.
  15. 청구항 14에 있어서,The method according to claim 14,
    상기 제1 패드 전극과 제2 패드 전극은 서로 다른 행에 배열된 발광셀들 상부에 배치된 발광 다이오드.The first pad electrode and the second pad electrode are disposed on top of the light emitting cells arranged in different rows.
  16. 청구항 1에 있어서,The method according to claim 1,
    상기 ZnO 투명 전극들 각각은 거칠어진 표면을 가지는 발광 다이오드.Each of the ZnO transparent electrodes has a roughened surface.
PCT/KR2018/004050 2017-05-11 2018-04-06 Light emitting diode including zinc oxide layer WO2018208015A1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080085343A (en) * 2007-03-19 2008-09-24 서울옵토디바이스주식회사 Light emitting diode
KR20110093248A (en) * 2010-02-12 2011-08-18 서울옵토디바이스주식회사 Light emitting diode having electrode pads
KR20130006808A (en) * 2011-06-23 2013-01-18 엘지이노텍 주식회사 Light emitting device, light emitting device package, and light unit
KR20160079480A (en) * 2014-12-26 2016-07-06 서울바이오시스 주식회사 Light emitting diode
KR20160143431A (en) * 2015-06-05 2016-12-14 서울바이오시스 주식회사 Light-emitting diode and method of fabricating the same

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* Cited by examiner, † Cited by third party
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KR20080085343A (en) * 2007-03-19 2008-09-24 서울옵토디바이스주식회사 Light emitting diode
KR20110093248A (en) * 2010-02-12 2011-08-18 서울옵토디바이스주식회사 Light emitting diode having electrode pads
KR20130006808A (en) * 2011-06-23 2013-01-18 엘지이노텍 주식회사 Light emitting device, light emitting device package, and light unit
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