WO2018201518A1 - 显示面板及其应用的显示装置 - Google Patents

显示面板及其应用的显示装置 Download PDF

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Publication number
WO2018201518A1
WO2018201518A1 PCT/CN2017/084672 CN2017084672W WO2018201518A1 WO 2018201518 A1 WO2018201518 A1 WO 2018201518A1 CN 2017084672 W CN2017084672 W CN 2017084672W WO 2018201518 A1 WO2018201518 A1 WO 2018201518A1
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WIPO (PCT)
Prior art keywords
voltage
common voltage
array substrate
device array
driving circuit
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Ceased
Application number
PCT/CN2017/084672
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English (en)
French (fr)
Inventor
陈猷仁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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Application filed by HKC Co Ltd, Chongqing HKC Optoelectronics Technology Co Ltd filed Critical HKC Co Ltd
Priority to US15/555,871 priority Critical patent/US20180322839A1/en
Publication of WO2018201518A1 publication Critical patent/WO2018201518A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

Definitions

  • the present application relates to a display panel and a display device therefor, and more particularly to a display panel having a common voltage regulation architecture and an apparatus thereof that can automatically detect and adjust a common voltage.
  • the liquid crystal display panel has the advantages of high image quality, small size, light weight, low voltage driving, low power consumption and wide application range. Therefore, liquid crystal display panel TFT-LCD (Thin Film Transistor Liquid Crystal Display) has been widely used in consumer products such as small and medium-sized portable TVs, mobile phones, video recorders, notebook computers, and desktop displays. Electronic products, and gradually replaced the cathode ray tube (CRT) to become the mainstream of the display.
  • the liquid crystal display panel is mainly composed of an active device array substrate, a color filter substrate and a liquid crystal layer between the two substrates.
  • the main driving principle of the liquid crystal display panel the system motherboard connects the R/G/B compression signal, the control signal and the power through the wire to the connector on the control board (C-Board), and the data passes through the control circuit board.
  • TCON Transmission Controller
  • IC processing it is transmitted to the signal driving circuit (scanning signal driving circuit, data signal driving circuit) via flexible flat cable (FFC), and passes through the source chip (Source-Chip on Film, S-COF) and Gate-Chip on Film (G-COF) are connected to the display area, so that the liquid crystal display panel obtains the required power and signal.
  • the liquid crystal display panel display is driven by voltage, and the reference voltage is required to be supplied by the common voltage generated by the common voltage generating circuit during the display process.
  • the common voltage value is that the control circuit board outputs a reference voltage through a digital voltage regulator (DVR) or a mechanical voltage regulator (VR) to generate an output to the liquid crystal panel.
  • DVR digital voltage regulator
  • VR mechanical voltage regulator
  • an object of the present invention is to provide a display panel having a common voltage adjustment structure, including: a control circuit board; a common voltage adjustment unit electrically connected to the control circuit board,
  • the common voltage regulating unit includes a common voltage generating circuit, a voltage comparator and a voltage regulator electrically connected to each other; and an active device array substrate electrically connected to the common voltage adjusting unit and transmitted through the signal driving circuit
  • the control circuit board is connected; the control circuit board outputs a reference voltage to the common voltage generating circuit, and the common voltage generating circuit transmits the reference voltage value to the voltage comparator for recording or comparison, and And performing feedback adjustment on the common voltage generating circuit through the voltage regulator according to the result of the comparison of the voltage comparators, and inputting a common voltage into the active device array substrate to maintain the active device array
  • the common voltage value of the column substrate is stable.
  • the signal driving circuit includes a scan signal driving circuit and a data signal driving circuit.
  • the scan signal driving circuit and the data signal driving circuit are each connected to the control circuit board via a flexible flat cable (FFC).
  • FFC flexible flat cable
  • the active device array substrate includes a substrate, the substrate includes a display area, a plurality of scan lines, and is disposed on the substrate and connected to the scan signal driving circuit and a plurality of Data wiring, disposed on the substrate and connected to the data signal driving circuit, a plurality of active components, disposed on the substrate, and arrayed in the display area, each active component and its corresponding
  • the scan wiring and the data wiring are electrically connected, wherein the scan signal driving circuit is electrically connected to an active component in the display area via a gate-chip (G-COF)
  • G-COF gate-chip
  • S-COF source-chip on film
  • the voltage comparator compares the reference voltage value with a voltage value of an active device array substrate. A comparison can be made to a logic voltage.
  • the logic voltage when the reference voltage is higher than a voltage value of the active device array substrate, the logic voltage is a high voltage, and the reference voltage is lower than a voltage value of the active device array substrate, the logic voltage is low voltage.
  • the voltage comparator when the logic voltage is a high voltage, the voltage comparator outputs a signal to cause the voltage regulator to reduce a common voltage of the common voltage generating circuit, and then input the reduced common voltage into the Active device array substrate.
  • the voltage comparator when the logic voltage is a low voltage, the voltage comparator outputs a signal to cause the voltage regulator to raise a common voltage of the common voltage generating circuit, and then input the increased common voltage.
  • the active device array substrate when the logic voltage is a low voltage, the voltage comparator outputs a signal to cause the voltage regulator to raise a common voltage of the common voltage generating circuit, and then input the increased common voltage.
  • the voltage comparator when the reference voltage value is equal to the voltage value of the active device array substrate, the voltage comparator does not output a signal to the voltage regulator to adjust the common voltage generating circuit.
  • the present application solves the technical problem and can be further implemented by the following technical measures, that is, a display device having a common voltage adjustment architecture, including a backlight module, and the display panel.
  • the application can avoid the phenomenon of common voltage drift caused by the panel being matched with different control circuit boards, thereby maintaining the stability of the common voltage of the panel and suppressing the occurrence of flicker.
  • FIG. 1A is a schematic diagram of an exemplary common voltage regulation mode.
  • FIG. 1B is a schematic diagram of another exemplary common voltage regulation mode.
  • FIG. 2 is a schematic diagram of a common voltage regulation architecture described in the present application.
  • FIG. 3A is a schematic diagram of an adjustment manner according to an embodiment of the present application.
  • FIG. 3B is a schematic diagram of an adjustment manner of another embodiment of the present application.
  • FIG. 3C is a schematic diagram of the adjustment of the embodiment of the present application.
  • circuit boards, circuit components, circuits, and the like are simplified for clarity.
  • representations of some of the circuit components are exaggerated for the purposes of illustration and description. It will be understood that when a component such as a circuit board, a circuit component, a panel, etc. is referred to as being "on" another component, the component can be directly on the other component, or an intermediate component can also be present.
  • the word “comprising” is to be understood to include the element, but does not exclude any other element.
  • “on” means located above or below the target element, and does not mean that it must be on the top based on the direction of gravity.
  • the liquid crystal display device In order to prevent deterioration of the liquid crystal material, the liquid crystal display device normally exchanges the potential applied between the "voltage value of the active device array substrate" and the “reference voltage value” to prevent the DC voltage from being continuously applied for a long time.
  • this effect is achieved by inverting the polarity of the potential applied between the voltage value of the active device array substrate and the reference voltage in units of one frame or several frames, and preventing the application of the DC voltage for a long time, in units of frames.
  • a certain potential is applied to almost all of the voltage values of the active device array substrate.
  • the driving of the potential polarity between the voltage value applied to the active device array substrate and the reference voltage is reversed in units of one frame or several frames, and only when the power supply is supplied to the liquid crystal display device, that is, the power supply is stopped. Thereafter, an almost constant potential is applied within the voltage value of the active device array substrate.
  • the active element is kept in the off state, the voltage value of the active device array substrate to which the power supply to the liquid crystal display device is turned off is still maintained for a long time, and the voltage value of the active device array substrate is continuously applied for a long time. A certain potential.
  • the reference voltage is not supplied to the active element of the general pixel unit, the potential is directly supplied. Therefore, when the supply of the power supply to the liquid crystal display device is stopped, the GND potential (the potential of the earth as the set reference) is quickly reached.
  • the liquid crystal display device having the active element was used for a long time when the supply of the power source to the liquid crystal display device was stopped.
  • a DC potential difference is supplied between the voltage value and the reference voltage of the active device array substrate, and the pixel has direct current. Therefore, even if the power is supplied to the liquid crystal display device again, the potential between the voltage value and the reference voltage of the active device array substrate at this time is formed to have an AC signal shape in the residual DC potential, and the liquid crystal is in the polarity. There is an imbalance in the driving voltage, so that flicker occurs.
  • the present application proposes a display panel and a display device thereof, which can avoid the phenomenon of common voltage drift caused when the panel is matched with different control circuit boards, thereby maintaining the stability of the common voltage of the panel and suppressing the occurrence of flicker.
  • the display panel can be, for example, a liquid crystal display panel or other display panel.
  • FIG. 1A and FIG. 1B are schematic diagrams of two exemplary common voltage regulation modes, as shown in FIG. 1A and FIG. 1B, an exemplary common voltage regulation mode 1A′ and an exemplary common voltage.
  • the adjustment mode 1B′ includes a control circuit board 11 , a digital voltage regulator 11D (Digital Voltage Regulator (DVR) or a mechanical voltage regulator 11B (Voltage Regulator, VR), and an active device array substrate, and is electrically connected.
  • the digital voltage regulator 11A or the mechanical voltage regulator 11B is connected to the control circuit board 11 through the signal driving circuit 14.
  • the signal driving circuit 14 includes a scanning signal driving circuit 14A and a data signal driving circuit 14B.
  • the scanning signal driving circuit 14A and the data signal driving circuit 14B each pass through a flexible flat panel (FFC) and a control circuit.
  • the plates 11 are connected.
  • the active device array substrate 13 includes a substrate 131.
  • the substrate 131 includes a display area 1311 and a plurality of scanning lines 132.
  • the substrate 131 is disposed on the substrate 131 and connected to the scan signal driving circuit 14A.
  • the line 133 is disposed on the substrate 131 and connected to the data signal driving circuit 14B and the plurality of active components 134, and is disposed on the substrate 131.
  • the array is arranged in the display area 1311, and each active component 134 is disposed.
  • the scan line 132 and the data line 133 are electrically connected to the corresponding scan line 132, wherein the scan signal drive circuit 14A passes through a gate chip 1321 (Gate-Chip on Film, G-COF) and the display area 1311.
  • the active signal 134 is electrically connected to the active signal 134 in the display area 1311 via a source chip (S-COF).
  • the control circuit board 11 outputs a reference voltage V to generate a common voltage VC output via a digital voltage regulator 11A (Digital Voltage Regulator (DVR) or a mechanical voltage regulator 11B (Voltage Regulator, VR).
  • DVR Digital Voltage Regulator
  • VR Voltage Regulator
  • a common voltage adjustment architecture 1 includes: a control circuit board 11; a common voltage adjustment unit 12, Connected to the control circuit board 11, the common voltage adjusting unit 12 includes a common voltage generating circuit 121, a voltage comparator 122 and a voltage regulator 123 electrically connected to each other; and an active device array substrate 13, electrically Connected to the common voltage regulating unit 12 and connected to the control circuit board 11 through a signal driving circuit 14; the control circuit board 11 outputs a reference voltage V to the common voltage a generating circuit 121, wherein the common voltage generating circuit 121 transmits the reference voltage V value to the voltage comparator 122 for recording or comparison, and transmits the voltage regulator 123 according to a result of the voltage comparator 122 comparison. Feedback adjustment is performed on the common voltage generating circuit 121 and a common voltage VC is input to the active device array substrate 13 to stabilize the common voltage value VC of the active device array substrate 13.
  • the signal driving circuit 14 of the present application includes a scan signal driving circuit 14A and a data signal driving circuit 14B, and the scanning signal driving circuit 14A and the data signal driving circuit 14B are each passed through a flexible flat circuit board 15 ( The Flexible Flat Cable (FFC) is connected to the control circuit board 11.
  • FFC Flexible Flat Cable
  • the active device array substrate 13 of the present application includes a substrate 131.
  • the substrate 131 includes a display area 1311 and a plurality of scan lines 132 disposed on the substrate 131 and connected to the scan signal.
  • the driving circuit 14A and the plurality of data lines 133 are disposed on the substrate 131 and connected to the data signal driving circuit 14B and the plurality of active devices 134, and are disposed on the substrate 131, and arrayed in the display area
  • Each of the active components 134 is electrically connected to the corresponding scan wiring 132 and the data wiring 133, wherein the scan signal driving circuit 14A passes through a gate chip 1321 (Gate-Chip on Film).
  • G-COF is electrically connected to the active component 134 in the display area 1311
  • the data signal driving circuit 14B passes through a source chip (S-COF) and an active component in the display area 1311.
  • 134 electrical connection is possible electrical connection.
  • the present application uses the common voltage adjustment unit 12, and the operation mode of the common voltage adjustment unit 12 is as follows, please refer to FIG. 3A to FIG. 3C.
  • the voltage comparator 122 compares the reference voltage V value with an active device array.
  • the voltage value VT of the substrate is compared to obtain a logic voltage VL.
  • the logic voltage VL when the reference voltage V is higher than the voltage value VT of the active device array substrate, the logic voltage VL is a high voltage H, and the reference voltage V is lower than a voltage value VT of the active device array substrate.
  • the logic voltage VL is a low voltage L.
  • the voltage comparator The output signal 122 causes the voltage regulator 123 to lower the common voltage VC of the common voltage generating circuit 121, and then inputs the reduced common voltage VC into the active device array substrate 13.
  • the voltage comparator The output signal 122 causes the voltage regulator 123 to raise the common voltage VC of the common voltage generating circuit 121, and then inputs the raised common voltage VC into the active device array base. Board 13.
  • the voltage comparator 122 when the reference voltage V value is equal to the voltage value VT of the active device array substrate, the voltage comparator 122 does not output a signal to the voltage regulator 123.
  • the common voltage generating circuit 121 performs adjustment, and directly inputs the reference voltage V transmitted by the control circuit board 11 into the active device array substrate 13 as a common voltage VC to maintain the common voltage VC of the active device array substrate 13. stable.
  • a display device includes a backlight module, and further includes the display panel 1 having an adjustment structure of a common voltage.
  • the application can avoid the phenomenon of common voltage drift caused by the panel being matched with different control circuit boards, thereby maintaining the stability of the common voltage of the panel and suppressing the occurrence of flicker.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种显示面板及其应用的显示装置，此显示面板包括：一控制电路板（11）；一共同电压调节单元（12），连接于所述控制电路板（11），此共同电压调节单元（12）包含有一共同电压产生电路（121）、一电压比较器（122）和一电压调节器（123）；以及一主动元件阵列基板（13），连接于所述共同电压调节单元（12），并透过信号驱动电路（14）与控制电路板（13）相连接。透过共同电压调节单元（12）的设置，可达到自动侦测比较并调节共同电压的效果。

Description

显示面板及其应用的显示装置 技术领域
本申请涉及一种显示面板及其应用的显示装置，特别是涉及一种可自动侦测比较并调节共同电压的具有共同电压调节架构的显示面板及其装置。
背景技术
液晶显示面板具有高画质、体积小、重量轻、低电压驱动、低消耗功率及应用范围广等优点。因此，液晶显示面板TFT-LCD(Thin Film Transistor Liquid Crystal Display)已被广泛地应用在中、小型可携式电视、行动电话、摄录放影机、笔记型计算机以及桌上型显示器等消费性电子产品，并且逐渐取代阴极射线管(Cathode Ray Tube；CRT)而成为显示器的主流。液晶显示面板主要是由一主动元件阵列基板、一彩色滤光基板以及一位于两基板之间的液晶层所构成。
液晶显示面板主要驱动原理，系统主板将R/G/B压缩信号、控制信号及动力通过线材与控制电路板(Control Board，C-Board)上的连接器相连接，数据经过控制电路板上的TCON(Timing Controller，时序控制器)IC处理后，经柔性扁平电缆(Flexible Flat Cable，FFC)传输至信号驱动电路(扫描信号驱动电路、数据信号驱动电路)，通过源极芯片(Source-Chip on Film，S-COF)和栅极芯片(Gate-Chip on Film，G-COF)与显示区连接，从而使得液晶显示面板获得所需的电源、信号。
其中，液晶显示面板显示是通过电压驱动，显示过程中需要基准电压经共同电压产生电路产生的共同电压予以供电。但因为制程的不稳定性，每一片液晶面板的最佳共同电压值都不相同，需要根据每一片面板的实际特性进行调节。现有技术中，共同电压值是控制电路板输出一基准电压通过数字电压调节器(Digital Voltage Regulator，DVR)或者机械电压调节器(Voltage Regulator，VR)产生输出至液晶面板。惟，因为出货至客户时面板与控制电路板是分别出货，组装时不能一一匹配，造成组装后的面板的共同电路非最佳值。
发明内容
为了解决上述技术问题，本申请的目的在于，提供一种具有共同电压的调节架构的显示面板，包括：一控制电路板；一共同电压调节单元，电性连接于所述控制电路板，所述共同电压调节单元包含有一共同电压产生电路、一电压比较器和一电压调节器彼此电性连接；以及一主动元件阵列基板，电性连接于所述共同电压调节单元，并透过信号驱动电路与所述控制电路板相连接；所述控制电路板输出一基准电压至所述共同电压产生电路，所述共同电压产生电路将所述基准电压值传输至所述电压比较器进行记录或比较，并根据所述电压比较器比较的结果透过所述电压调节器对所述共同电压产生电路进行反馈调整并将一共同电压输入所述主动元件阵列基板，使保持所述主动元件阵 列基板的共同电压值的稳定。
在本申请的一实施例中，所述信号驱动电路包含扫描信号驱动电路和数据信号驱动电路。
在本申请的一实施例中，所述扫描信号驱动电路以及数据信号驱动电路各经一柔性扁平电路板(Flexible Flat Cable，FFC)与控制电路板相连接。
在本申请的一实施例中，所述主动元件阵列基板包括一基板，所述基板包含一显示区、多条扫描配线，配置于所述基板上并连接所述扫描信号驱动电路、多条数据配线，配置于所述基板上并连接所述数据信号驱动电路、多个主动元件，配置于所述基板上，且阵列排列于所述显示区内，每一主动元件与其所对应的所述扫描配线和所述数据配线电性连接，其中，所述扫描信号驱动电路经一栅极芯片(Gate-Chip on Film，G-COF)与显示区内的主动元件电性连接、所述数据信号驱动电路经一源极芯片(Source-Chip on Film，S-COF)与显示区内的主动元件电性连接。
在本申请的一实施例中，所述共同电压产生电路将所述基准电压值传输至所述电压比较器后，所述电压比较器将所述基准电压值与主动元件阵列基板的电压值相比较可得一逻辑电压。
在本申请的一实施例中，所述基准电压高于主动元件阵列基板的电压值时所述逻辑电压为高电压、所述基准电压低于主动元件阵列基板的电压值时所述逻辑电压为低电压。
在本申请的一实施例中，所述逻辑电压为高电压时，所述电压比较器输出一讯号使电压调节器降低所述共同电压产生电路的共同电压，再将降低的共同电压输入所述主动元件阵列基板。
在本申请的一实施例中，所述逻辑电压为低电压时，所述电压比较器输出一讯号使电压调节器升高所述共同电压产生电路的共同电压，再将升高的共同电压输入所述主动元件阵列基板。
在本申请的一实施例中，所述基准电压值与主动元件阵列基板的电压值相等时，所述电压比较器不输出讯号至所述电压调节器对所述共同电压产生电路进行调节。
本申请解决其技术问题还可采用以下技术措施进一步实现，亦即提供一种具有共同电压的调节架构的显示装置，包括背光模块，还包括所述的显示面板。
有益效果
本申请可以避免面板搭配不同控制电路板时所造成的共同电压飘移的现象，进而保持面板共同电压的稳定，并抑制闪烁的情形发生。
附图说明
图1A是一种范例性的共同电压调节方式示意图。
图1B是另一种范例性的共同电压调节方式示意图。
图2是本申请所述的共同电压调节架构示意图。
图3A是本申请一实施例的调节方式示意图。
图3B是本申请另一实施例的调节方式示意图。
图3C是本申请实施例的不予调节示意图。
本发明的实施方式
以下各实施例的说明是参考附加的图式，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。
附图和说明被认为在本质上是示出性的，而不是限制性的。在图中，结构相似的单元是以相同标号表示。另外，为了理解和便于描述，附图中示出的每个元件的尺寸和厚度是任意示出的，但是本申请不限于此。
在附图中，为了清晰起见，简化了电路板、电路组件及线路等的表示方式。在附图中，为了理解和便于描述，夸大了一些电路组件的表示。将理解的是，当例如电路板、电路组件、面板等组件被称作“在”另一组件“上”时，所述组件可以直接在所述另一组件上，或者也可以存在中间组件。
另外，在说明书中，除非明确地描述为相反的，否则词语“包括”将被理解为意指包括所述元件，但是不排除任何其它元件。此外，在说明书中，“在......上”意指位于目标元件上方或者下方，而不意指必须位于基于重力方向的顶部上。
为更进一步阐述本申请为达成预定发明目的所采取的技术手段及功效，以下结合附图及较佳实施例，对依据本申请提出的一种显示面板及其应用的显示装置，其具体实施方式、结构、特征及其功效，详细说明如后。
液晶显示装置通常为防止液晶材料老化，是将施加在「主动元件阵列基板的电压值」与「基准电压值」之间的电位予以交流化，以防止长时间连续施加直流电压。但是，此种效果仅藉由以1帧或数帧单位使施加在主动元件阵列基板的电压值与基准电压间的电位的极性反转，长时间平均的防止施加直流电压，以各帧单位来观察时，主动元件阵列基板的电压值内几乎均施加有一定的电位。
而此种以1帧或数帧单位反转施加在主动元件阵列基板的电压值与基准电压间的电位极性的驱动，仅可在液晶显示装置上供给有电源时，亦即，停止供给电源后，主动元件阵列基板的电压值内仍保持施加的几乎一定的电位。而藉由主动元件保持在关闭状态时，供给至液晶显示装置的电源被切断的主动元件阵列基板的电压值仍然维持较长时间的关闭状态，主动元件阵列基板的电压值内长时间持续保持施加一定电位。
另外，由于基准电压上未经由一般像素单位的主动元件，而直接供给有电位，因此，反之停止供给电源至液晶显示装置后，即迅速达到GND电位(做为设定基准的大地等电位)。
结果证实，具有主动元件的液晶显示装置，于停止供给电源至液晶显示装置的情况下，长时间 在主动元件阵列基板的电压值-基准电压间供给有直流电位差，像素带有直流电。因而，纵使再度于液晶显示装置上供给有电源，此时的主动元件阵列基板的电压值-基准电压间的电位形成在残留的直流电位上含有交流信号形的驱动，在极性间，于液晶驱动电压上产生不均衡，以致发生闪烁。
因此，本申请提出了一种显示面板及其显示装置，可以避免面板搭配不同控制电路板时所造成的共同电压飘移的现象，进而保持面板共同电压的稳定，并抑制闪烁的情形发生。
在不同的实施例中，显示面板可例如为液晶显示面板或其他显示面板。
敬请参阅图1A与图1B，图1A与图1B为两种范例性的共同电压调节方式示意图，如图1A和图1B所示，范例性的共同电压调节方式1A’及范例性的共同电压调节方式1B’，其包括有一控制电路板11、一数字电压调节器11A(Digital Voltage Regulator，DVR)或一机械电压调节器11B(Voltage Regulator，VR)，以及一主动元件阵列基板，电性连接于所述数字电压调节器11A或所述机械电压调节器11B，并透过信号驱动电路14与控制电路板11相连接。所述信号驱动电路14包含扫描信号驱动电路14A和数据信号驱动电路14B，所述扫描信号驱动电路14A以及数据信号驱动电路14B各经一柔性扁平电路板15(Flexible Flat Cable，FFC)与控制电路板11相连接。所述主动元件阵列基板13包括一基板131，所述基板131包含一显示区1311、多条扫描配线132，配置于所述基板131上并连接所述扫描信号驱动电路14A、多条数据配线133，配置于所述基板131上并连接所述数据信号驱动电路14B、多个主动元件134，配置于所述基板131上，且阵列排列于所述显示区1311内，每一主动元件134与其所对应的所述扫描配线132和所述数据配线133电性连接，其中所述扫描信号驱动电路14A经一栅极芯片1321(Gate-Chip on Film，G-COF)与显示区1311内的主动元件134电性连接、所述数据信号驱动电路14B经一源极芯片1331(Source-Chip on Film，S-COF)与显示区1311内的主动元件134电性连接。
惟，如图1A与1B所示，控制电路板11输出一基准电压V经数字电压调节器11A(Digital Voltage Regulator，DVR)或机械电压调节器11B(Voltage Regulator，VR)产生一共同电压VC输出至显示面板的主动元件阵列基板13，但主动元件阵列基板的电压值VT与数字电压调节器11A(Digital Voltage Regulator，DVR)或机械电压调节器11B(Voltage Regulator，VR)所产生的共同电压VC值可能不相一致，因此极容易产生共同电压飘移的问题。
图2是本申请所述的共同电压调节架构示意图，请参考图2，在一实施例中，一种共同电压的调节架构1，包括：一控制电路板11；一共同电压调节单元12，电性连接于所述控制电路板11，所述共同电压调节单元12包含有一共同电压产生电路121、一电压比较器122和一电压调节器123彼此电性连接；以及一主动元件阵列基板13，电性连接于所述共同电压调节单元12，并透过信号驱动电路14与所述控制电路板11相连接；所述控制电路板11输出一基准电压V至所述共同电压 产生电路121，所述共同电压产生电路121将所述基准电压V值传输至所述电压比较器122进行记录或比较，并根据所述电压比较器122比较的结果透过所述电压调节器123对所述共同电压产生电路121进行反馈调整并将一共同电压VC输入所述主动元件阵列基板13，使保持所述主动元件阵列基板13的共同电压值VC的稳定。
在一实施例中，本申请所述信号驱动电路14包含扫描信号驱动电路14A和数据信号驱动电路14B，并且所述扫描信号驱动电路14A以及数据信号驱动电路14B各经一柔性扁平电路板15(Flexible Flat Cable，FFC)与控制电路板11相连接。
在一实施例中，本申请所述主动元件阵列基板13包括一基板131，所述基板131包含一显示区1311、多条扫描配线132，配置于所述基板131上并连接所述扫描信号驱动电路14A、多条数据配线133，配置于所述基板131上并连接所述数据信号驱动电路14B、多个主动元件134，配置于所述基板131上，且阵列排列于所述显示区1311内，每一主动元件134与其所对应的所述扫描配线132和所述数据配线133电性连接，其中，所述扫描信号驱动电路14A经一栅极芯片1321(Gate-Chip on Film，G-COF)与显示区1311内的主动元件134电性连接、所述数据信号驱动电路14B经一源极芯片1331(Source-Chip on Film，S-COF)与显示区1311内的主动元件134电性连接。
亦即，本申请与范例性的共同电压调节方式最大的差异在于，本申请以共同电压调节单元12，而所述共同电压调节单元12的运作方式如下列说明，请参考图3A至图3C。
在本申请的一实施例中，所述共同电压产生电路121将所述基准电压V值传输至所述电压比较器122后，所述电压比较器122将所述基准电压V值与主动元件阵列基板的电压值VT相比较可得一逻辑电压VL。
在本申请的一实施例中，所述基准电压V高于主动元件阵列基板的电压值VT时所述逻辑电压VL为高电压H、所述基准电压V低于主动元件阵列基板的电压值VT时所述逻辑电压VL为低电压L。
敬请参阅图3A，在本申请的一实施例中，当所述基准电压V高于主动元件阵列基板的电压值VT，亦即所述逻辑电压VL为高电压H时，所述电压比较器122输出一讯号使电压调节器123降低所述共同电压产生电路121的共同电压VC，再将降低的共同电压VC输入所述主动元件阵列基板13。
敬请参阅图3B，在本申请的一实施例中，当所述基准电压V低于主动元件阵列基板的电压值VT，亦即所述逻辑电压VL为低电压L时，所述电压比较器122输出一讯号使电压调节器123升高所述共同电压产生电路121的共同电压VC，再将升高的共同电压VC输入所述主动元件阵列基 板13。
最后请参阅图3C，于本申请的一实施例中，所述基准电压V值与主动元件阵列基板的电压值VT相等时，所述电压比较器122不输出讯号至所述电压调节器123对所述共同电压产生电路121进行调节，而是直接将控制电路板11所传输的基准电压V做为共同电压VC输入所述主动元件阵列基板13以保持所述主动元件阵列基板13共同电压VC的稳定。
请参考图2至图3C，在一实施例中，一种显示装置，包括背光模块，还包括所述的具有共同电压的调节架构的显示面板1。
本申请可以避免面板搭配不同控制电路板时所造成的共同电压飘移的现象，进而保持面板共同电压的稳定，并抑制闪烁的情形发生。
“在一些实施例中”及“在各种实施例中”等用语被重复地使用。所述用语通常不是指相同的实施例；但它亦可以是指相同的实施例。“包含”、“具有”及“包括”等用词是同义词，除非其前后文意显示出其它意思。
以上所述，仅是本申请的较佳实施例而已，并非对本申请作任何形式上的限制，虽然本申请已以较佳实施例揭露如上，然而并非用以限定本申请，任何熟悉本专业的技术人员，在不脱离本申请技术方案范围内，当可利用上述揭示的技术内容作出些许更动或修饰为等同变化的等效实施例，但凡是未脱离本申请技术方案的内容，依据本申请的技术实质对以上实施例所作的任何简单修改、等同变化与修饰，均仍属于本申请技术方案的范围内。

Claims (18)

  1. 一种显示面板，包括：
    一控制电路板；
    一共同电压调节单元，电性连接于所述控制电路板，所述共同电压调节单元包含有一共同电压产生电路、一电压比较器和一电压调节器彼此电性连接；以及
    一主动元件阵列基板，电性连接于所述共同电压调节单元，并透过信号驱动电路与所述控制电路板相连接；
    所述控制电路板输出一基准电压至所述共同电压产生电路，所述共同电压产生电路将所述基准电压值传输至所述电压比较器进行记录或比较，并根据所述电压比较器比较的结果透过所述电压调节器对所述共同电压产生电路进行反馈调整并将一共同电压输入所述主动元件阵列基板，使保持所述主动元件阵列基板的共同电压值的稳定。
  2. 如权利要求1所述的显示面板，其中所述信号驱动电路包含扫描信号驱动电路和数据信号驱动电路。
  3. 如权利要求2所述的显示面板，其中所述扫描信号驱动电路以及数据信号驱动电路各经一柔性扁平电路板与控制电路板相连接。
  4. 如权利要求2所述显示面板，其中所述主动元件阵列基板包括一基板，所述基板包含一显示区、多条扫描配线，配置于所述基板上并连接所述扫描信号驱动电路、多条数据配线，配置于所述基板上并连接所述数据信号驱动电路、多个主动元件，配置于所述基板上，且阵列排列于所述显示区内，每一主动元件与其所对应的所述扫描配线和所述数据配线电性连接。
  5. 如权利要求4所述的显示面板，其中所述扫描信号驱动电路经一栅极芯片与显示区内的主动元件电性连接、所述数据信号驱动电路经一源极芯片与显示区内的主动元件电性连接。
  6. 如权利要求1所述的显示面板，其中所述共同电压产生电路将所述基准电压值传输至所述电压比较器后，所述电压比较器将所述基准电压值与主动元件阵列基板的电压值相比较可得一逻辑电压，所述基准电压高于主动元件阵列基板的电压值时所述逻辑电压为高电压、所述基准电压低于主动元件阵列基板的电压值时所述逻辑电压为低电压。
  7. 如权利要求6所述的显示面板，其中所述逻辑电压为高电压时，所述电压比较器输出一讯号使电压调节器降低所述共同电压产生电路的共同电压，再将降低的共同电压输入所述主动元件阵列基板。
  8. 如权利要求6所述的显示面板，其中所述逻辑电压为低电压时，所述电压比较器输出一讯号使电压调节器升高所述共同电压产生电路的共同电压，再将升高的共同电压输入所述主动元件阵列基 板。
  9. 如权利要求1所述的显示面板，其中所述基准电压值与主动元件阵列基板的电压值相等时，所述电压比较器不输出讯号至所述电压调节器对所述共同电压产生电路进行调节。
  10. 一种显示装置，包括
    一背光模块；
    一显示面板，所述显示面板包括：
    一控制电路板；
    一共同电压调节单元，电性连接于所述控制电路板，所述共同电压调节单元包含有一共同电压产生电路、一电压比较器和一电压调节器彼此电性连接；以及
    一主动元件阵列基板，电性连接于所述共同电压调节单元，并透过信号驱动电路与所述控制电路板相连接；
    其中，所述控制电路板输出一基准电压至所述共同电压产生电路，所述共同电压产生电路将所述基准电压值传输至所述电压比较器进行记录或比较，并根据所述电压比较器比较的结果透过所述电压调节器对所述共同电压产生电路进行反馈调整并将一共同电压输入所述主动元件阵列基板，使保持所述主动元件阵列基板的共同电压值的稳定。
  11. 如权利要求10所述的显示装置，其中所述信号驱动电路包含扫描信号驱动电路和数据信号驱动电路。
  12. 如权利要求11所述的显示装置，其中所述扫描信号驱动电路以及数据信号驱动电路各经一柔性扁平电路板与控制电路板相连接。
  13. 如权利要求11所述的显示装置，其中所述主动元件阵列基板包括一基板，所述基板包含一显示区、多条扫描配线，配置于所述基板上并连接所述扫描信号驱动电路、多条数据配线，配置于所述基板上并连接所述数据信号驱动电路、多个主动元件，配置于所述基板上，且阵列排列于所述显示区内，每一主动元件与其所对应的所述扫描配线和所述数据配线电性连接。
  14. 如权利要求13所述的显示装置，其中所述扫描信号驱动电路经一栅极芯片与显示区内的主动元件电性连接、所述数据信号驱动电路经一源极芯片与显示区内的主动元件电性连接。
  15. 如权利要求10所述的显示装置，其中所述共同电压产生电路将所述基准电压值传输至所述电压比较器后，所述电压比较器将所述基准电压值与主动元件阵列基板的电压值相比较可得一逻辑电压，所述基准电压高于主动元件阵列基板的电压值时所述逻辑电压为高电压、所述基准电压低于主动元件阵列基板的电压值时所述逻辑电压为低电压。
  16. 如权利要求15所述的显示装置，其中所述逻辑电压为高电压时，所述电压比较器输出一讯号 使电压调节器降低所述共同电压产生电路的共同电压，再将降低的共同电压输入所述主动元件阵列基板。
  17. 如权利要求15所述的显示装置，其中所述逻辑电压为低电压时，所述电压比较器输出一讯号使电压调节器升高所述共同电压产生电路的共同电压，再将升高的共同电压输入所述主动元件阵列基板。
  18. 如权利要求10所述的显示装置，其中所述基准电压值与主动元件阵列基板的电压值相等时，所述电压比较器不输出讯号至所述电压调节器对所述共同电压产生电路进行调节。
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CN107464520A (zh) * 2017-09-15 2017-12-12 惠科股份有限公司 显示装置及其驱动方法
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