WO2018196372A1 - 一种可配置低功耗全数字发射机 - Google Patents

一种可配置低功耗全数字发射机 Download PDF

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WO2018196372A1
WO2018196372A1 PCT/CN2017/113508 CN2017113508W WO2018196372A1 WO 2018196372 A1 WO2018196372 A1 WO 2018196372A1 CN 2017113508 W CN2017113508 W CN 2017113508W WO 2018196372 A1 WO2018196372 A1 WO 2018196372A1
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digital
module
signal
power
transmitter
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English (en)
French (fr)
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李通
殷韵
刘阳子
马磊
闫娜
闵昊
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Fudan University
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Fudan University
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0475—Circuits with means for limiting noise, interference or distortion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B2001/0408—Circuits with power amplifiers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B2001/0491—Circuits with frequency synthesizers, frequency converters or modulators

Definitions

  • the invention belongs to the technical field of wireless communication, and in particular relates to a configurable low power full digital transmitter circuit.
  • CMOS integrated circuit technology has entered the deep sub-micron and even nano-era era.
  • the RF transmitter implemented by CMOS technology has the advantages of low cost, low power consumption and high integration.
  • digital circuits present a clear advantage in terms of low power consumption, small size, low cost, and process compatibility. Therefore, low-power all-digital transmitters have become a hot topic in academic and industrial research.
  • the present invention proposes a single chip integrated configurable low power all digital transmitter Circuit architecture.
  • the radio frequency of the transmitter of the invention covers 0.7GHz-2.6GHz, and the signal bandwidth covers 100kHz-5MHz, which can meet the requirements of different communication standard protocols (such as 802.11ah, NB-IoT, BLE, etc.).
  • the transmitter integrates an configurable baseband signal processing circuit (110/120), an all-digital dual-supply differential power amplifier (180), a low-dropout linear regulator (210), an all-digital frequency synthesizer (310), and a serial Circuit modules such as interface (410) can greatly reduce application cost and improve system integration.
  • the technology of using a single-chip integrated circuit brings cost and volume advantages to the system; at the same time, the chip can be optimally configured according to the application environment, thereby greatly improving the robustness and practicability of the system.
  • the object of the present invention is to propose an all-digital transmitter with flexible reconfigurable features that optimizes transmitter performance and power consumption.
  • the configurable low-power all-digital transmitter has a circuit system as shown in FIG. 1 , including a configurable baseband signal processing circuit module (including a reconfigurable baseband processing 110 and a reconfigurable upsampling filter circuit 120), Coordinate conversion circuit (CORDIC) 130, phase predistortion calibration (DPD) 140, phase modulation module 150, oversampling and noise shaping module (Sigma Delta modulator) 160, amplitude control logic module 170, all digital dual supply differential power amplifier ( DPA) 180, a passive matching network 190, a low dropout linear regulator (LDO) 210, an all digital frequency synthesizer (ADPLL) 310, a serial peripheral interface (SPI) 410, and an output load 200, etc., wherein The passive matching network 190 can adopt a transformer power synthesis method or a discrete component synthesis method to implement impedance conversion and differential to single-ended functions.
  • CORDIC Coordinate conversion circuit
  • DPD phase predistortion calibration
  • DPD phase modul
  • the baseband I/Q quadrature signal is subjected to clipping, clipping, upsampling, filtering, etc. of the configurable baseband signal module (including reconfigurable baseband processing (110) and reconfigurable upsampling filtering circuit (120)) After processing, it is sent to the coordinate conversion module (130) to obtain an amplitude modulated signal (AM) and a phase modulated signal (PM); the amplitude modulated signal is injected into the oversampling and noise shaping module (160) and the amplitude control logic module (170), An amplitude control logic to further reduce the out-of-band noise floor of the transmitter system and to generate an all-digital dual-supply differential power amplifier module (180); the phase modulation signal is coupled to the phase predistortion calibration module (140) and the phase modulation module (150) To calibrate the amplitude-to-phase distortion of the all-digital dual-supply differential power amplifier to improve the linearity of the transmitter system and add the transmitted carrier signal; then, the amplitude control logic and the
  • the low dropout linear regulator module (210) is used to generate the reference voltage and reference current to suppress variations due to temperature, supply voltage and process angle fluctuations, and to provide a configurable low power full digital transmitter circuit.
  • the all-digital synthesizer module (310) has two configurable modes of operation: the transmitter system produces a local oscillator signal output or an off-chip sinking local oscillator signal output to provide a carrier signal for a configurable low power all digital transmitter.
  • the serial peripheral interface module (410) is used to generate configuration bits for a configurable low power all digital transmitter to implement configurable functions of the transmitter system.
  • the all-digital dual-supply differential power amplifier 180 of the present invention can configure the maximum output power of the all-digital dual-supply differential power amplifier by changing the effective number of bits of the amplitude control logic module 170 to meet the output power of different communication protocols.
  • the power amplifier 180 of the present invention is a power amplifier based on a switched capacitor type, which benefits from an advanced process and a precise capacitance ratio, and has a linearity close to an ideal amplitude to amplitude; a dual power supply technology is used depending on the input signal amplitude.
  • the transmitter of the present invention only needs to correct the amplitude-to-phase distortion, compared with the traditional architecture.
  • the transmitter (requires two non-linear calibrations of amplitude, amplitude and amplitude versus phase for the transmitter system, which consumes a large amount of power), further saves power consumption and is more suitable for low-power applications.
  • the configurable baseband signal processing circuit module of the present invention comprises a reconfigurable baseband processing 110 and a reconfigurable upsampling filtering circuit (120); for different modulation schemes of different communication protocol standards, the reconfigurable baseband processing circuit and the heavyweight
  • the sampling filter circuit is configured to perform corresponding processing to complete the processing of the corresponding baseband signal.
  • the oversampling and noise shaping circuit module 160 of the present invention reduces the out-of-band noise floor by further oversampling the amplitude information and noise shaping (Sigma Delta modulator) to meet the requirements of the communication protocol standard for the noise floor of the transmitter system.
  • the coordinate conversion circuit module 130 of the present invention converts an IQ quadrature signal into an amplitude signal and a phase signal.
  • the amplitude signal may be unsigned or signed: when the amplitude signal is unsigned, the phase signal rotates in the range of 0 to 360 degrees; when the amplitude signal is signed, the phase signal is in the range of 0 to 180 degrees. Rotate within the range, the sign bit controls the positive and negative selection of the phase signal.
  • the configurable low-power all-digital transmitter of the invention adopts a polar coordinate architecture based on two-point modulation, and has the capability of transmitting carrier frequency covering 0.7 GHz-2.6 GHz and the signal bandwidth covering 100 kHz-5 MHz, which can meet different communication standard protocol pairs. Carrier frequency and baseband bandwidth requirements.
  • the transmitter has flexible and reconfigurable features, which can reduce the overall average power consumption while meeting the actual communication specifications.
  • the on-chip integrated configurable baseband signal processing circuit 110/120, all-digital dual-supply differential power amplifier 180, low-dropout linearity Circuit modules such as voltage regulator 210, full digital frequency synthesizer 310, and serial peripheral interface 410 are capable of meeting low power consumption, high integration, and low cost applications.
  • the configurable low-power all-digital transmitter of the invention adopts a polar coordinate architecture based on two-point modulation, and has the capability of transmitting carrier frequency covering 0.7 GHz-2.6 GHz and the signal bandwidth covering 100 kHz-5 MHz to meet different communication standard protocol pairs carrier. Frequency and baseband bandwidth requirements.
  • the transmitter circuit is flexible and reconfigurable (mainly reconfigurable baseband signal bandwidth, reconfigurable radio frequency, reconfigurable transmit power, etc.), and can meet different wireless communication standard protocols (such as Bluetooth low energy technology BLE, wireless body) Domain network WBAN, cellular based Application requirements for narrowband Internet of Things NB-IoT, 802.11ah, etc.)
  • the transmitter of the invention has a simple structure and is all digital circuits (easy to system integration), has the advantages of low power consumption, high integration and low cost, and is easy to be applied in an actual wireless communication system.
  • the configurable low-power all-digital transmitter circuit of the invention also has the characteristics of low power consumption, can flexibly configure performance indicators according to different application environments, and reduces the average work of the transmitter as a whole under the requirement of actual communication indicators. Consumption, improve transmitter system efficiency, delay battery life, and improve communication service quality.
  • the configurable low-power transmitter of the present invention is fully digitalized. Compared with the analog RF transmitter, in the case of the same output power, since the all-digital circuit only has dynamic power consumption, the full digital transmitter system works. Low consumption and superior power addition efficiency.
  • the configurable low power all digital transmitter circuit of the present invention integrates a configurable baseband signal processing circuit 110/120, an all digital dual power differential power amplifier 180, a low dropout linear regulator 210, an all digital frequency synthesizer 310, and a string.
  • Circuit modules such as the line peripheral interface 410 can meet the requirements of low power consumption, high integration, and low cost.
  • the application examples of the configurable low power all digital transmitter of the present invention can be divided into two categories: a low transmission power mode and a high transmission power mode.
  • the first application example of the configurable low power all digital transmitter of the present invention is a low transmission power mode (such as an 802.11ah protocol transmission power of about 14 dBm).
  • the transmitter is configured to cover the RF frequency covering 0.7GHz-1GHz, and the signal bandwidth supports the mode of 1MHz-4MHz.
  • the on-chip circuit modules used in the working mode are: a baseband signal processing circuit module (110/120) configured to correspond to a bandwidth, a coordinate conversion circuit (130), a phase predistortion calibration (140), a phase modulation module (150), and Sampling and noise shaping module (160), amplitude control logic module (170), all-digital dual-supply differential power amplifier (180), passive matching network (190), low-dropout linear regulator (210), full digital frequency synthesis Circuit modules such as a device (310), a serial peripheral interface (410), and an output load (200).
  • a baseband signal processing circuit module 110/120 configured to correspond to a bandwidth
  • a coordinate conversion circuit 130
  • a phase predistortion calibration 140
  • a phase modulation module 150
  • Sampling and noise shaping module 160
  • amplitude control logic module (170
  • all-digital dual-supply differential power amplifier 180
  • passive matching network 190
  • low-dropout linear regulator 210
  • full digital frequency synthesis Circuit modules such as
  • the 802.11ah digital baseband chip sends the digital signal to the configured all-digital transmitter (520), performs baseband processing, upsampling filtering, coordinate conversion, phase predistortion calibration on the transmitter chip, and The amplitude and phase are combined and processed, and then the output RF signal is transmitted through the off-chip antenna (530).
  • the digital baseband chip (510), the crystal oscillator (530), the control unit (540), and the antenna (550) are required for off-chip, and the implementation is simple and the application cost is low.
  • the second application of the configurable low power all digital transmitter of the present invention is exemplified by a high transmit power mode (eg, a NB-IoT protocol transmit power of approximately 23 dBm).
  • a high transmit power mode eg, a NB-IoT protocol transmit power of approximately 23 dBm.
  • the transmitter is configured to cover the RF frequency from 0.7 GHz to 2.6 GHz, and the signal bandwidth supports the mode of 100 kHz to 300 kHz.
  • the on-chip circuit modules used in the working mode are: a baseband signal processing circuit module (110/120) configured to correspond to a bandwidth, a coordinate conversion circuit (130), a phase predistortion calibration (140), a phase modulation module (150), and Sampling and noise shaping module (160), amplitude control logic module (170), all-digital dual-supply differential power amplifier (180), passive matching network (190), low-dropout linear regulator (210), full digital frequency synthesis Circuit modules such as a device (310), a serial peripheral interface (410), and an output load (200).
  • a baseband signal processing circuit module 110/120 configured to correspond to a bandwidth
  • a coordinate conversion circuit 130
  • a phase predistortion calibration 140
  • a phase modulation module 150
  • Sampling and noise shaping module 160
  • amplitude control logic module (170
  • all-digital dual-supply differential power amplifier 180
  • passive matching network 190
  • low-dropout linear regulator 210
  • full digital frequency synthesis Circuit modules such as
  • the specific implementation process is: NB-IoT
  • the communication protocol digital baseband chip (610) sends the digital signal to the configured all-digital transmitter (620), performs baseband processing, upsampling filtering, coordinate conversion, phase predistortion calibration, and amplitude and phase synthesis on the transmitter chip. Processing, and then outputting the RF signal further amplified by an off-chip power amplifier (650) and transmitted through an off-chip antenna (660).
  • the off-chip digital baseband chip (610), crystal oscillator (630), control unit (640), power amplifier (650) and antenna (660) are required to meet the requirements of higher transmit power.
  • Figure 1 Structure diagram of a configurable low-power all-digital transmitter.
  • FIG. 2 Application example for low transmit power mode (eg 802.11ah).
  • Figure 3 Application example of high transmit power mode (eg NB-IoT).
  • Figure 4 Reconfigurable baseband signal processing block diagram.
  • FIG. 5 Block diagram and performance diagram of an all-digital dual-supply differential power amplifier (power-added efficiency, AM-AM/AM-PM).
  • Figure 6 Output spectrum of an all-digital transmitter in different carrier frequency modes with different bandwidths.
  • the configurable low-power all-digital transmitter of the present invention adopts a two-point modulation based polar coordinate architecture, the RF frequency covers 0.7 GHz-2.6 GHz, and the signal bandwidth covers 100 kHz-5 MHz, and is flexible and reconfigurable.
  • the coordinate conversion circuit (130) converts the IQ quadrature signal into an amplitude signal and a phase signal; wherein the amplitude signal can be unsigned or signed: when the amplitude signal is unsigned, the phase signal Rotating in the range of 0 to 360 degrees; when the amplitude signal is signed, the phase signal is rotated in the range of 0 to 180 degrees, and the sign bit controls the positive and negative selection of the phase signal.
  • the phase predistortion calibration circuit (140) is used for calibrating the amplitude-to-phase distortion of the power amplifier, and may adopt a one-dimensional look-up table (LUT) or a two-dimensional look-up table, mainly depending on different modulation modes and system linearity. The specification of the degree is also a compromise between linearity performance and system power consumption.
  • the low dropout linear regulator circuit (210) is capable of simultaneously generating a reference voltage and a reference current, which can suppress variations due to temperature, supply voltage, and process angle fluctuations, and is configurable for low power consumption.
  • the transmitter circuit provides a reference reference source.
  • the all-digital frequency synthesizer (310) has two options Set the working mode: the loop generates the local oscillator signal output or the off-chip sinking local oscillator signal output, providing the transmitter with the local oscillator signal frequency coverage range of 0.7GHz-2.6GHz to meet the carrier frequency requirements of different communication standard protocols. .
  • the serial peripheral interface circuit module (410) is used to control the operation mode of each circuit module inside the chip.
  • the configurable baseband signal processing circuit mainly includes a baseband chip (710) of different communication protocols, a reconfigurable baseband processing (720), and a reconfigurable upsampling and filtering circuit (730); wherein, different communication protocols
  • the baseband chip is connected by off-chip connection, such as 802.11ah digital baseband chip, NB-IoT narrowband IoT digital baseband chip.
  • the reconfigurable baseband processing circuit performs reasonable cropping and limiting processing for different modulation modes.
  • the reconfigurable upsampling and filtering circuit further increases the baseband data rate to reduce the out-of-band image signal component of the transmitted spectrum.
  • the specific signal flow is: for a given baseband data, the baseband processing module (720) performs reasonable cropping, limiting, and the like, and then the control circuit configures the multiplexer (MUX) and the upsampling filter circuit to complete Processing of different baseband signals under different communication protocol standards.
  • the baseband processing module 720
  • the control circuit configures the multiplexer (MUX) and the upsampling filter circuit to complete Processing of different baseband signals under different communication protocol standards.
  • the all-digital dual-supply differential power amplifier uses the amplitude control word to change the number of open sub-units to achieve output power following the input amplitude; benefiting from advanced processes and precise capacitance ratios, Close to the ideal linearity of amplitude to amplitude; according to the magnitude of the input signal, dual power supply (VDD1/VDD2) is used to switch back and forth to improve the back-off efficiency of the all-digital power amplifier.
  • One of the subunit circuits mainly includes a control logic circuit (820) and a switched capacitor circuit (830) based on dual power supply;
  • the control logic circuit (820) is a phase modulation signal (PM) and an amplitude (AM) control word and/or After the non-logic operation, four signals A1, B1, C1, and D1 are generated, and the four signals are respectively connected to the corresponding four ports A, B, C, and D in the switched capacitor circuit (830).
  • the all-digital dual-supply differential power amplifier has a maximum output power of 23.3dBm, a peak power added efficiency of 42.5%, and a power-added efficiency of 35dB for a back-off of 6dB; as shown in Figure 5 ( Figure 5 ( c) shows that the amplitude-to-amplitude (AM-AM) nonlinearity of the all-digital dual-supply differential power amplifier is 0.32 dB, with near-ideal amplitude-to-amplitude linearity; amplitude-to-phase (AM-PM) non-linearity The linearity is 8.7° and can be corrected back by the phase predistortion calibration module.
  • AM-AM amplitude-to-amplitude
  • AM-PM amplitude-to-phase
  • Figure 6 shows the output spectrum of an all-digital transmitter in different carrier frequencies (700MHz/900MHz) with different bandwidths (1.5MHz/5MHz).
  • the output spectrum of the all-digital transmitter system of the present invention can meet various communication standards.
  • the output spectrum mask version of the protocol is required.
  • the configurable low-power all-digital transmitter of the invention has the characteristics of flexible and reconfigurable, and can reduce the average power consumption of the transmitter system under the premise of satisfying the actual communication index according to different application environments; in addition, the on-chip integration can be configured Baseband signal processing circuit (110/120), all-digital dual-supply differential power amplifier (180), low-dropout linear regulator (210), all-digital frequency synthesizer (310), and serial peripheral interface (410) Modules that meet low power, high integration and low cost applications.
  • Baseband signal processing circuit 110/120
  • all-digital dual-supply differential power amplifier 180
  • low-dropout linear regulator 210
  • all-digital frequency synthesizer 310
  • serial peripheral interface (410) Modules that meet low power, high integration and low cost applications.

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Abstract

本发明属于无线通信技术领域，具体为一种可配置低功耗全数字发射机。本发明的可配置低功耗发射机主要包括可配置基带信号处理电路、坐标转换电路、相位预失真校准、相位调制模块、过采样及噪声整形模块、幅度控制逻辑模块、全数字双电源差分功率放大器、无源匹配网络、低压差线性稳压器、全数字频率综合器、串行外设接口以及输出负载等电路模块。该发射机电路灵活可重构(主要为可重构基带信号带宽、可重构射频频点、可重构发射功率等)，能够满足不同无线通信标准协议(如蓝牙低能耗技术BLE、无线体域网WBAN、基于蜂窝的窄带物联网NB-IoT、802.11ah等)的应用要求。另外，该发射机结构简单且全为数字电路，具有低功耗、高集成度和低成本等优点，易于在实际无线通信系统中应用。

Description

一种可配置低功耗全数字发射机 技术领域
本发明属于无线通信技术领域，具体为一种可配置低功耗全数字发射机电路。
背景技术
无线通信技术的迅速发展极大地改变了人们的生活，目前支持2G/3G/4G移动通信、无线局域网、无线城域网等应用的智能手机和平板电脑已经成为人们日常生活的标准配置。为了使人们的生活更加方便快捷，物联网应运而生。与移动通信系统相比，物联网通信具有广覆盖、实时性强及终端灵活可配置等特点。在Qualcomm、华为等业界巨头的推动下，国际标准协议组织801.11ah也在不断推进Sub-GHz频段的物联网应用。作为物联网通信的典型代表，智能家居、智能交通、智慧农业以及医疗健康等场景均具有数据率可变和低功耗的应用需求。另外，蓝牙低能耗技术(Bluetooth Low Energy，BLE)、无线体域网(Wireless Body Area Network，WBAN)以及ZigBee等通信标准同样也有数据率可变和低功耗的应用需求。
通常，不同的通信标准具有不同的射频频率、信道带宽和发射功率等指标，发射机需要灵活地配置成对应的工作模式来满足不同通信标准的要求。可配置发射机不仅具有灵活可重构的特点，其在低功耗应用领域也有很大潜力。传统的无线通信发射机在设计时需要满足通信系统的最苛刻要求，必然会付出功耗的代价；可配置发射机可以根据不同的应用环境，灵活地配置其性能指标，在满足实际通信指标的要求下降低整体功耗。
在集成电路工艺方面，CMOS集成电路工艺已经进入深亚微米乃至纳米时代，采用CMOS工艺实现的射频发射机具有低成本、低功耗和高集成度的优势。随着特征尺寸的缩小，数字电路在低功耗、小尺寸、低成本以及工艺兼容性等方面体现出更加明显的优势。因此，低功耗全数字发射机已成为当前学术界和工业界研究的热点。
目前，国外学术界和工业界正在开展全数字低功耗射频芯片的研究，如加州大学洛杉矶分校集成电路实验室、伯克利无线研究中心、斯坦福大学微波集成电路实验室等国际知名大学，以及Intel、Broadcom、IMC等国际知名公司。但是，大多数全数字发射机主要支持2.4GHz频段的短距离无线通信或部分频段的2G/3G/4G应用，兼容Sub-GHz频段802.11ah物联网标准协议的发射机芯片很少。在国内，清华大学微电子所、中科院微电子研究所、东南大学射频与光电集成电路研究所、复旦大学国家集成电路实验室等在射频收发机方面都有研究，但兼容物联网、BLE等多种协议标准的可重构低功耗全数字射频收发机的研究较少。
针对上述问题，本发明提出了一种单芯片集成的可配置低功耗全数字发射机 电路架构。本发明发射机的射频频率覆盖0.7GHz-2.6GHz，信号带宽覆盖100kHz-5MHz，可满足不同通信标准协议(如802.11ah、NB-IoT、BLE等)的要求。该发射机片上集成可配置基带信号处理电路(110/120)、全数字双电源差分功率放大器(180)、低压差线性稳压器(210)、全数字频率综合器(310)以及串行外设接口(410)等电路模块，可极大地降低应用成本且提高系统的集成度。另外，采用单芯片集成电路的技术给该系统带来成本和体积上的优势；同时，芯片可根据应用环境进行优化配置，从而大大提高了系统的鲁棒性和实用性。
发明内容
本发明的目的在于提出一款具有灵活可重构特点的、实现发射机性能和功耗优化配置的全数字发射机。
本发明提供的可配置低功耗全数字发射机，其电路系统如图1所示，包括可配置基带信号处理电路模块(包括可重构基带处理110和可重构上采样滤波电路120)、坐标转换电路(CORDIC)130、相位预失真校准(DPD)140、相位调制模块150、过采样及噪声整形模块(Sigma Delta调制器)160、幅度控制逻辑模块170、全数字双电源差分功率放大器(DPA)180、无源匹配网络190、低压差线性稳压器(LDO)210、全数字频率综合器(ADPLL)310、串行外设接口(SPI)410及输出负载200等电路模块；其中，无源匹配网络190可采用变压器功率合成的方式、也可采用分立元件合成的方式，以实现阻抗变换和差分转单端的功能。
其中，基带I/Q正交信号经过可配置基带信号模块(包括可重构基带处理(110)和可重构上采样滤波电路(120)等)的裁剪、限幅、上采样、滤波等信号处理后，送入坐标转换模块(130)，得到幅度调制信号(AM)与相位调制信号(PM)；幅度调制信号灌入过采样及噪声整形模块(160)和幅度控制逻辑模块(170)，用以进一步降低发射机系统的带外噪声基底和产生全数字双电源差分功率放大器模块(180)的幅度控制逻辑；相位调制信号接入相位预失真校准模块(140)和相位调制模块(150)，用以校准全数字双电源差分功率放大器的幅度对相位的失真来提高发射机系统的线性度和添加发射的载波信号；然后，再将幅度控制逻辑和带有载波的相位调制信号同时灌入到全数字双电源差分功率放大器模块(180)，接着在无源匹配网络(190)处实现功率合成和差分到单端的转换，经天线负载(200)辐射出去。
另外，低压差线性稳压器模块(210)用以产生参考电压和参考电流，可抑制由于温度、电源电压和工艺角波动等因素造成的偏差，为可配置低功耗全数字发射机电路提供基准参考电压源和基准参考电流源。全数字频率综合器模块(310)具有两种可配置的工作模式：发射机系统产生本振信号输出或者片外灌入本振信号输出，为可配置低功耗全数字发射机提供载波信号。串行外设接口模块(410)用以产生可配置低功耗全数字发射机的配置位，实现发射机系统的可配置的功能。
本发明所述的全数字双电源差分功率放大器180，可通过改变幅度控制逻辑模块170的有效位数，对全数字双电源差分功率放大器的最大输出功率进行配置，以满足不同通信协议对输出功率的要求；本发明的功率放大器180是基于开关电容类型的功率放大器，受益于先进的工艺及精准电容比，具有接近理想的幅度对幅度的线性度；采用双电源供电的技术，根据输入信号幅度的大小，来回切换VDD2与VDD1，来提高功率放大器回退效率，进而提高发射机系统的平均效率。又由于具有漏端动态负载调制的功能，与传统的功率放大器相比，在同等输出功率的前提下，具有更高的功率附加效率，节省系统功耗。正是因为采用基于开关电容的电压型全数字双电源差分功率放大器具有接近理想的幅度对幅度的线性度，故本发明的发射机仅需对幅度对相位的失真进行校正，相对于传统架构的发射机(需要对发射机系统进行幅度对幅度与幅度对相位两种非线性的校准，消耗较大的功耗)来讲，又进一步节省功耗，更适合低功耗的应用需求。
本发明所述的可配置基带信号处理电路模块包括可重构基带处理110和可重构上采样滤波电路(120)；针对不同通信协议标准中不同调制方式，可重构基带处理电路和可重构上采样滤波电路分别做出对应配置，以完成相应基带信号的处理。
本发明所述过采样及噪声整形电路模块160，通过对幅度信息进一步过采样以及噪声整形(Sigma Delta调制器)，降低带外噪声基底，满足通信协议标准对发射机系统噪声基底的要求。
本发明所述的坐标转换电路模块130，将IQ正交信号转换为幅度信号和相位信号。其中，幅度信号可采用无符号编码或有符号编码：当幅度信号为无符号编码时，相位信号在0到360度范围内旋转；当幅度信号为有符号编码时，相位信号在0到180度范围内旋转，符号位控制相位信号的正负选择。
本发明的可配置低功耗全数字发射机是采用基于两点调制的极坐标架构，具备发射载波频率覆盖0.7GHz-2.6GHz，信号带宽覆盖100kHz-5MHz的能力，可以满足不同通信标准协议对载波频率和基带带宽的要求。该发射机具有灵活可重构的特点，能够在满足实际通信指标的前提下降低整体平均功耗，片上集成可配置基带信号处理电路110/120、全数字双电源差分功率放大器180、低压差线性稳压器210、全数字频率综合器310以及串行外设接口410等电路模块，能够满足低功耗、高集成度和低成本的应用要求。
有益效果
本发明的可配置低功耗全数字发射机采用基于两点调制的极坐标架构，具备发射载波频率覆盖0.7GHz-2.6GHz，信号带宽覆盖100kHz-5MHz的能力，以满足不同通信标准协议对载波频率和基带带宽的要求。该发射机电路灵活可重构(主要为可重构基带信号带宽、可重构射频频点、可重构发射功率等)，能够满足不同无线通信标准协议(如蓝牙低能耗技术BLE、无线体域网WBAN、基于蜂窝的 窄带物联网NB-IoT、802.11ah等)的应用要求。另外，本发明发射机结构简单且全为数字电路(易于系统集成)，具有低功耗、高集成度和低成本等优点，易于在实际无线通信系统中应用。
本发明的可配置低功耗全数字发射机电路还具有低功耗的特点，可以根据不同的应用环境，灵活地配置性能指标，在满足实际通信指标的要求下，降低发射机整体的平均功耗，提高发射机系统效率，延迟电池的寿命，提高通信服务质量。另外，本发明的可配置低功耗发射机实现全数字化，相对于模拟射频发射机来讲，在同等输出功率的情况下，由于全数字化电路仅具有动态功耗，因此全数字发射机系统功耗较低，功率附加效率较优。
本发明的可配置低功耗全数字发射机电路片上集成可配置基带信号处理电路110/120、全数字双电源差分功率放大器180、低压差线性稳压器210、全数字频率综合器310以及串行外设接口410等电路模块，能够满足低功耗、高集成度和低成本的应用要求。
本发明的可配置低功耗全数字发射机的应用举例可分为两类：低发射功率模式和高发射功率模式。
如图2所示，本发明的可配置低功耗全数字发射机第一种应用举例为低发射功率模式(如802.11ah协议发射功率约14dBm)。此时，发射机配置在射频频率覆盖0.7GHz-1GHz，信号带宽支持1MHz-4MHz的模式。该工作模式用到的片上电路模块有：配置成对应带宽的基带信号处理电路模块(110/120)、坐标转换电路(130)、相位预失真校准(140)、相位调制模块(150)、过采样及噪声整形模块(160)、幅度控制逻辑模块(170)、全数字双电源差分功率放大器(180)、无源匹配网络(190)、低压差线性稳压器(210)、全数字频率综合器(310)、串行外设接口(410)以及输出负载(200)等电路模块。具体实施过程为：802.11ah数字基带芯片(510)将数字信号送入配置后的全数字发射机(520)，在发射机片内进行基带处理、上采样滤波、坐标转换、相位预失真校准以及幅度和相位合成等处理，然后再将输出的射频信号通过片外天线(530)发射出去。在这种应用模式下，片外仅需数字基带芯片(510)、晶振(530)、控制单元(540)和天线(550)，实施简单，应用成本低。
如图3所示，本发明的可配置低功耗全数字发射机第二种应用举例为高发射功率模式(如NB-IoT协议发射功率约23dBm)。此时，发射机配置在射频频率覆盖0.7GHz-2.6GHz，信号带宽支持100kHz-300kHz的模式。该工作模式用到的片上电路模块有：配置成对应带宽的基带信号处理电路模块(110/120)、坐标转换电路(130)、相位预失真校准(140)、相位调制模块(150)、过采样及噪声整形模块(160)、幅度控制逻辑模块(170)、全数字双电源差分功率放大器(180)、无源匹配网络(190)、低压差线性稳压器(210)、全数字频率综合器(310)、串行外设接口(410)以及输出负载(200)等电路模块。具体实施过程为：NB-IoT 通信协议数字基带芯片(610)将数字信号送入配置后的全数字发射机(620)，在发射机片内进行基带处理、上采样滤波、坐标转换、相位预失真校准以及幅度和相位合成等处理，然后将输出的射频信号经过片外功率放大器(650)进一步放大并通过片外天线(660)发射出去。在这种应用模式下，片外需数字基带芯片(610)、晶振(630)、控制单元(640)、功率放大器(650)和天线(660)，以满足较高发射功率的指标要求。
附图说明
图1：可配置低功耗全数字发射机结构图。
图2：低发射功率模式的应用实施举例(如802.11ah)。
图3：高发射功率模式的应用实施举例(如NB-IoT)。
图4：可重构基带信号处理结构图。
图5：全数字双电源差分功率放大器结构图与性能图(功率附加效率、AM-AM/AM-PM)。
图6：不同带宽不同载波频率模式下全数字发射机的输出频谱图。
具体实施方式
如图1所示，本发明的可配置低功耗全数字发射机采用基于两点调制的极坐标架构，射频频率覆盖0.7GHz-2.6GHz，信号带宽覆盖100kHz-5MHz，具有灵活可重构的特点。主要包括可配置基带信号处理电路模块(110/120)、坐标转换电路(130)、相位预失真校准(140)、相位调制模块(150)、过采样及噪声整形模块(160)、幅度控制逻辑模块(170)、全数字双电源差分功率放大器(180)、无源匹配网络(190)、低压差线性稳压器(210)、全数字频率综合器(310)、串行外设接口(410)以及输出负载(200)等电路模块；其中，无源匹配网络(190)可采用变压器功率合成的方式、也可采用分立元件合成的方式实现阻抗变换和差分转单端的功能。
如图1所示，坐标转换电路(130)将IQ正交信号转换为幅度信号和相位信号；其中，幅度信号可采用无符号编码或有符号编码：当幅度信号为无符号编码时，相位信号在0到360度范围内旋转；当幅度信号为有符号编码时，相位信号在0到180度范围内旋转，符号位控制相位信号的正负选择。相位预失真校准电路(140)用于校准功率放大器的幅度对相位失真，可采用一维查找表(Look-Up Table，LUT)或二维查找表等方式，主要取决于不同调制方式对系统线性度的指标要求，同时也是线性度性能和系统功耗的折衷。
如图1所示，低压差线性稳压器电路(210)能够同时产生参考电压和参考电流，可以抑制由于温度、电源电压和工艺角波动等因素造成的偏差，为可配置低功耗全数字发射机电路提供基准参考源。全数字频率综合器(310)具有两种可配 置的工作模式：环路产生本振信号输出或者片外灌入本振信号输出，为发射机提供本振信号的频率覆盖范围0.7GHz-2.6GHz，以满足不同通信标准协议对载波频率的要求。串行外设接口电路模块(410)是用来控制芯片内部各个电路模块的工作模式。
如图4所示，可配置基带信号处理电路主要包括不同通信协议的基带芯片(710)、可重构基带处理(720)和可重构上采样、滤波电路(730)；其中，不同通信协议的基带芯片是采用片外连接的方式，如802.11ah数字基带芯片、NB-IoT窄带物联网数字基带芯片等。可重构基带处理电路针对不同的调制方式做出合理的裁剪、限幅等处理，可重构上采样、滤波电路是进一步提高基带数据率，以降低发射频谱的带外镜像信号分量。具体信号流程为：对于给定的基带数据，基带处理模块(720)完成合理的裁剪、限幅等处理，再由控制电路对多路选择器(MUX)和上采样滤波电路进行配置，以完成不同通信协议标准下对不同基带信号的处理。
如图5(a)所示，全数字双电源差分功率放大器通过幅度控制字来改变开启的子单元数目，以实现输出功率对输入幅度的跟随；受益于先进的工艺及精准的电容比，具有接近理想的幅度对幅度的线性度；根据输入信号的幅度大小，采用双电源(VDD1/VDD2)来回切换，提高全数字功率放大器的回退效率。其中一个子单元电路主要包括控制逻辑电路(820)和基于双电源供电的开关电容电路(830)；控制逻辑电路(820)是将相位调制信号(PM)和幅度(AM)控制字进行与或非逻辑运算之后，产生A1、B1、C1、D1四路信号，这四路信号分别连接至开关电容电路(830)中对应的A、B、C、D四个端口。如图5(b)所示，该全数字双电源差分功率放大器的最大输出功率可达23.3dBm，峰值功率附加效率为42.5％，回退6dB的功率附加效率可达35.8％；如图5(c)所示，该全数字双电源差分功率放大器的幅度对幅度(AM-AM)的非线性为0.32dB，具有接近理想的幅度对幅度的线性度；幅度对相位(AM-PM)的非线性为8.7°，可通过相位预失真校准模块校正回来。
图6给出了不同带宽(1.5MHz/5MHz)不同载波频率(700MHz/900MHz)模式下全数字发射机的输出频谱图，本发明的全数字发射机系统的输出频谱均能够满足多种通信标准协议的输出频谱掩膜版要求。
本发明的可配置低功耗全数字发射机具有灵活可重构的特点，能够根据不同的应用环境，在满足实际通信指标的前提下降低发射机系统的平均功耗；另外，片上集成可配置基带信号处理电路(110/120)、全数字双电源差分功率放大器(180)、低压差线性稳压器(210)、全数字频率综合器(310)以及串行外设接口(410)等电路模块，能够满足低功耗、高集成度和低成本的应用要求。

Claims (8)

  1. 一种可配置低功耗全数字发射机，其特征在于，包括：由可重构基带处理110和可重构上采样滤波电路120组成的可配置基带信号处理电路模块、坐标转换电路(130)、相位预失真校准(140)、相位调制模块(150)、过采样及噪声整形模块(160)、幅度控制逻辑模块(170)、全数字双电源差分功率放大器(180)、无源匹配网络(190)、低压差线性稳压器(210)、全数字频率综合器(310)、串行外设接口(410)以及输出负载(200)；其中，所述无源匹配网络(190)采用变压器功率合成的方式或者采用分立元件合成的方式实现阻抗变换和差分转单端的功能；
    基带I/Q正交信号经过可配置基带信号模块的裁剪、限幅、上采样、滤波处理后，送入坐标转换模块(130)，得到幅度调制信号(AM)与相位调制信号(PM)；幅度调制信号灌入过采样及噪声整形模块(160)和幅度控制逻辑模块(170)，用以进一步降低发射机系统的带外噪声基底和产生全数字双电源差分功率放大器模块(180)的幅度控制逻辑；相位调制信号接入相位预失真校准模块(140)和相位调制模块(150)，用以校准全数字双电源差分功率放大器的幅度对相位的失真来提高发射机系统的线性度和添加发射的载波信号；然后，再将幅度控制逻辑和带有载波的相位调制信号同时灌入到全数字双电源差分功率放大器模块(180)，接着在无源匹配网络(190)处实现功率合成和差分到单端的转换，经天线负载(200)辐射出去。
  2. 根据权利要求1所述的可配置低功耗全数字发射机，其特征在于，低压差线性稳压器模块(210)用以产生参考电压和参考电流，为可配置低功耗全数字发射机电路提供基准参考电压源和基准参考电流源；全数字频率综合器模块(310)具有两种可配置的工作模式：发射机系统产生本振信号输出或者片外灌入本振信号输出，为可配置低功耗全数字发射机提供载波信号；串行外设接口模块(410)用以产生可配置低功耗全数字发射机的配置位，实现发射机系统的可配置的功能。
  3. 根据权利要求2所述的可配置低功耗全数字发射机，其特征在于，所述的全数字双电源差分功率放大器电路模块(180)通过改变幅度控制逻辑模块(170)的有效位数，对全数字双电源差分功率放大器的最大输出功率进行配置，以满足不同通信协议对输出功率的要求。
  4. 根据权利要求1所述的可配置低功耗全数字发射机，其特征在于，所述的相位预失真校准电路模块(140)用于校准功率放大器的幅度对相位失真；该相位预失真校准电路模块(140)采用一维查找表(Look-Up Table，LUT)或二维查找表方式。
  5. 根据权利要求1所述的可配置低功耗全数字发射机，其特征在于，所述的过采样及噪声整形电路模块(160)，在幅度支路上对幅度信息进一步过采样以及 噪声整形，以降低带外噪声基底，满足通信协议标准对发射机系统噪声基底的要求。
  6. 根据权利要求1所述的可配置低功耗全数字发射机，其特征在于，所述的坐标转换电路模块(130)，将IQ正交信号转换为幅度信号和相位信号；其中，幅度信号采用无符号编码或有符号编码：当幅度信号为无符号编码时，相位信号在0到360度范围内旋转；当幅度信号为有符号编码时，相位信号在0到180度范围内旋转，符号位控制相位信号的正负选择。
  7. 根据权利要求1所述的可配置低功耗全数字发射机，其特征在于，所述的低压差线性稳压器电路模块(210)，同时产生参考电压和参考电流，用以抑制由于温度、电源电压和工艺角波动等因素造成的偏差，为可配置低功耗全数字发射机电路提供基准参考源。
  8. 根据权利要求1所述的可配置低功耗全数字发射机，其特征在于，所述的全数字频率综合器模块(310)，具有两种可配置的工作模式：环路产生本振信号输出或者片外灌入本振信号输出，为发射机提供本振信号的频率覆盖范围0.7GHz-2.6GHz，以满足不同通信标准协议对载波频率的要求。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11706075B2 (en) 2021-03-12 2023-07-18 International Business Machines Corporation High-efficiency transmitter

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107204785B (zh) * 2017-04-23 2019-10-15 复旦大学 一种可配置低功耗全数字发射机
US11121680B1 (en) * 2020-03-30 2021-09-14 Mitsubishi Electric Research Laboratories, Inc. All-digital transmitter with wideband beamformer
CN114189256A (zh) * 2021-12-01 2022-03-15 北京博瑞微电子科技有限公司 一种全数字波形直接调制的超宽带发射机
CN114499556B (zh) * 2022-02-28 2023-11-24 复旦大学 一种连续变频的多模式全数字发射机
US11777771B1 (en) 2022-05-19 2023-10-03 Microaiot, Ltd., Hangzhou (CN) BLE protocol-based battery-free multi-mode transceiver
CN115118303B (zh) * 2022-05-19 2024-02-13 脉砥微电子(杭州)有限公司 一种基于ble协议的无电池多模式收发机
CN115549703B (zh) * 2022-10-09 2024-06-18 芯翼信息科技(上海)有限公司 集成cmos功率放大器的发射机和收发机
CN117220697B (zh) * 2023-10-31 2026-04-14 深圳市纽瑞芯科技有限公司 一种应用于uwb发射机的am-pm失真校准方法
CN120074552B (zh) * 2025-02-08 2025-11-11 中山大学 一种射频正交开关电容发射机

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101015121A (zh) * 2004-06-29 2007-08-08 松下电器产业株式会社 失真补偿电路
CN104349514A (zh) * 2013-07-26 2015-02-11 华为技术有限公司 多模无线终端
CN105684301A (zh) * 2013-10-25 2016-06-15 三菱电机株式会社 功率编码器和用于对数据进行调制的方法
US20160309535A1 (en) * 2015-04-17 2016-10-20 Samsung Electronics Co., Ltd. Transmitter and method using carrier aggregation
CN107204785A (zh) * 2017-04-23 2017-09-26 复旦大学 一种可配置低功耗全数字发射机

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103516371B (zh) * 2013-09-18 2015-10-21 清华大学 可配置无线发射机

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101015121A (zh) * 2004-06-29 2007-08-08 松下电器产业株式会社 失真补偿电路
CN104349514A (zh) * 2013-07-26 2015-02-11 华为技术有限公司 多模无线终端
CN105684301A (zh) * 2013-10-25 2016-06-15 三菱电机株式会社 功率编码器和用于对数据进行调制的方法
US20160309535A1 (en) * 2015-04-17 2016-10-20 Samsung Electronics Co., Ltd. Transmitter and method using carrier aggregation
CN107204785A (zh) * 2017-04-23 2017-09-26 复旦大学 一种可配置低功耗全数字发射机

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11706075B2 (en) 2021-03-12 2023-07-18 International Business Machines Corporation High-efficiency transmitter

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