WO2018172629A1 - Procédé de simulation, sur un ordinateur classique, d'un circuit quantique - Google Patents
Procédé de simulation, sur un ordinateur classique, d'un circuit quantique Download PDFInfo
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- WO2018172629A1 WO2018172629A1 PCT/FR2018/000057 FR2018000057W WO2018172629A1 WO 2018172629 A1 WO2018172629 A1 WO 2018172629A1 FR 2018000057 W FR2018000057 W FR 2018000057W WO 2018172629 A1 WO2018172629 A1 WO 2018172629A1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
Definitions
- the invention relates to the field of computer science, and more specifically to the simulation of a quantum logic circuit by means of a conventionally structured computer - that is to say using processors comprising logic gates each consisting of a circuit of transistors that can be traversed by electron flows.
- the design of a computer (which can be likened to a processor, the two terms being synonymous here) is generally based on a preliminary algorithmic simulation phase of its operation (that is to say the operation of the logic circuits which compose it) to predict in a general way the behavior and, more particularly, the results that the computer would provide at the end of the execution of a given program.
- the operations are performed by combinations of elementary logic gates with transistors, which perform logic functions applied to input bits (of value 0 or 1) and whose results are bits output (value 0 or 1).
- the logical functions NOT, AND, OR, NOR, NAND.
- the output (that is, the result) of a program requiring n bits input can be modeled by a state vector with 2 n components, which represents the set of possible values of the output bits.
- quantum computer In a quantum computer, it is the qubit (quantum bit contraction) which represents the elementary unit of storage of the information, by analogy with the bit which itself represents the elementary unit of storage of the information in a classic computer.
- the value of a qubit is indeterminate because probabilistic.
- qubit is a quantum system whose state is described by an ip wave function, denoted ⁇ ⁇ ) according to Dirac's bra-ket formalism, in a Hilbert space.
- i />) is written as a linear combination of the possible values of the qubit:
- a qubit can be represented by a point positioned on the surface of a so-called Bloch sphere (of radius 1), whose spherical coordinates are ⁇ (0 ⁇ ⁇ ) and ⁇ (0 ⁇ 2 ⁇ ).
- the qubits are intended to be used in a manner analogous to the conventional bits, that is to say to be combined into a register of n qubits (n an integer) that can be processed. within a computer program.
- n qubits The state of n qubits is described by a wave function ⁇ ⁇ ) generalized in a Hilbert space with 2 n dimensions:
- ⁇ i represents the possible values (or base states) of classical bit combinations
- coefficients t are the probability amplitudes of each value, normalized according to the following relationship:
- the quantum computer is theoretically capable of simultaneously processing all possible states of the register, or 2 n .
- the quantum computer naturally performs its calculations in parallel. It follows that the addition of a qubit multiplies by 2 the computing power of the computer, the latter being an exponential function of the size of the register.
- the size of the register - and thus the number of states (characterizing each one information) of this one that can treat simultaneously the computer - is 2,330 ⁇ 10 90 , which corresponds to the estimated number of particles in our observable universe.
- quantum computers are expected to solve problems that are currently insoluble by conventional computers because of the unreasonable computing capacity that would need to be mobilized - and computing time required.
- Shor's quantum algorithm makes it possible - in theory - to solve the problem of the factorization of a natural integer N in a time whose order of magnitude is asymptotically algorithmic, that is to say (in notation called "big O” from Landau), of the order of 0 (log (N)) Shore's algorithm is based on the use of a quantum Fourier transform, whose efficiency is much higher than that of classical Fourier transforms.
- a known modeling of a quantum logic circuit with n qubits consists in mathematically representing this circuit by a matrix (denoted U, called the operation matrix) of size 2 n ⁇ 2 n and which, applied to a initial state vector E of size 2 n , outputs a final state vector E ', also of size 2 n and matrix product of E by U:
- n m the maximum number, denoted n m , of simulatable qubits is not greater than:
- a known technique for limiting the memory capacity required for the calculation (or, with equivalent memory capacity, to increase the number n m of simulated qubits) consists in making an approximation of the operation matrix U by reducing its dimension by means of a so-called Schmidt decomposition, the methodology of which is described in particular in the reference work A. Nielsen & I. Chuang, Quantum Computation and Quantum Information, Cambridge University Press, 10th Anniversary Edition, 2010, p.109 et seq. In practice, however, if this approximation can provide acceptable results for some simple quantum circuits (eg for an AND-type logic gate), it is severely lacking in robustness for more complex circuits (eg for a circuit). of Quantum Fourier Transform).
- phase of configuring the quantum circuit which comprises the operations of
- o define the number n of qubits to be treated at the input of the quantum circuit model
- an analysis phase of the thus configured quantum circuit model which comprises the operations of:
- a) define a vector state of the n qubits at the input of the quantum circuit, which comprises a series of 2 n amplitude coefficients (i an integer, 0 ⁇ i ⁇ 2 n - 1) equal to 0 or 1, and such that:
- each operator being 1 and determine his / trunk number and column number c (l and c integers such that 0 ⁇ l ⁇ 2 n, 0 ⁇ c ⁇ 2 and n ⁇ c) ;
- L k such as:
- This method makes it possible to simulate more efficiently (that is to say more quickly, and by mobilizing a lesser memory space) a quantum circuit, compared to known methods.
- FIG. 1 is a diagrammatic representation of an example of a diagonal type of quantum logic gate associated with a state transition graph of qubits passing through this gate;
- FIG. 2 is a diagrammatic representation of an example of a classical quantum logic gate associated with a state transition graph of qubits transiting through this gate;
- FIG. 3 is a diagrammatic representation of an example of a dense type of quantum logic gate associated with a state transition graph of qubits passing through this gate;
- FIG. 4 is a diagrammatic representation of an example of a quantum logic circuit comprising a series of quantum logic gates, associated with a graph of the qubit state transitions successively traversing these logic gates.
- semiconductor integrated circuit computing processing unit refers to any processor (also called a microprocessor) comprising sets of transistors obtained according to conventional techniques for purification, etching, doping of semiconductor materials (such as silicon) and each capable of being crossed (or not, depending on the state of the transistor) by a flow of electric current that can be modeled by the laws classical physics (including Ohm's Law).
- a transistor provides, at its output, a signal whose value, determined by the state of the transistor, is by convention equal to 0 or 1. This value is allocated to a bit numbering unit called bit, which is the base of the coding of conventional computers. known (and used) of the general public.
- probability amplitudes are complex numbers each relating the probability of occurrence of the corresponding value (respectively
- the wave function ⁇ ⁇ ) (or state) of the unit qubit can also be written in the form of a vector (column matrix):
- ⁇ i) represents, in bra-ket notation (Dirac notation) and in binary, the possible values (or basic states) of the classical bit combinations.
- the coefficients are the probability amplitudes (or coefficients
- the method of simulation of a quantum circuit does not rest on a computational approach taking into account the complex notations of the coefficients ⁇ ⁇ of amplitude, but on a combinatorial approach which takes into account of the set of possible values that the state vector ⁇ ⁇ ) (that is, the wave function) can take while eliminating the unlikely values of this state vector as the qubits progress through the quantum circuit.
- a quantum circuit modifies the value of the 2 n qubits which crosses it (nt).
- ⁇ ⁇ the state of the qubits entering the circuit
- ⁇ ⁇ ' the state of the qubits that come out.
- ⁇ ⁇ ) and ⁇ xj) ') are linked by a transfer function, operated by the quantum circuit and described by a matrix relation:
- U is a so-called transfer matrix, of size 2 n ⁇ 2 n , corresponding to the transfer function applied by the quantum circuit to the incoming qubits.
- the transfer matrix U comprises operators u xy (x and y integers, 0 ⁇ x ⁇ 2 n - 1, 0 y y 2 2 n - 1) which are in the form of complex numbers (in the mathematical sense of the term). .
- the transfer matrix U represents the set of operations applied by the quantum circuit to the incoming qubits, as described by their state vector.
- the inventors had, in the first place, the idea of subdividing the quantum circuit into several adjacent successive layers through which the set of qubits entering the circuit and each containing a predetermined elementary quantum logic gate each carrying an operation also predetermined on one or more of the qubits entering the layer (but not necessarily on all of them).
- d (d be an integer such that d ⁇ 2) the number of elementary quantum logic gates of the circuit. It is decreed that d ⁇ 2 because an elementary logic gate corresponds to a simple matrix operation whose result is easily solved by the known simulations.
- H the Hadamard gate
- the SWAP gate (or qSWAP), which applies its permutation transfer function) to two qubits and is defined as follows:
- the controlled phase gate denoted by fl ⁇ , associated with an angle denoted by ⁇ (in the notation used to describe the qubit on the Bloch sphere), which applies its transfer function (a rotation of angle ⁇ ) to a single qubit and is defined as follows:
- the inventors have, secondly, the idea of classifying the different models of elementary gates (which can be used to configure the quantum circuit) into three types:
- Gate type classic whose matrix is non-diagonal and includes operators worth 0 or 1 due to a single operator equal to 1 per line and column;
- the inventors have, thirdly, the idea of minimizing the operations performed on the qubits passing through each layer L k of the quantum circuit, simplifying as much as possible the calculations resulting from the application of the transfer function performed by the elementary logic gate G k resident in this layer, starting from the following triple postulate:
- the vector state is in the form of a column matrix comprising 2 n - 1 amplitude coefficient coefficients of value 0 and a single amplitude coefficient of value 1 (see the examples provided below):
- a diagonal type logic gate does not modify the value of the state vector (considered according to its possible values) - this is in particular the case of the Pauli gate Z and the controlled phase gates f1, because a diagonal matrix does not affect the value of the amplitude coefficients of the state vector of the incoming qubits;
- a classical logic gate carries out a single possible transformation of the state vector incoming qubits
- the matrix H because its matrix comprises non-zero values on at least one row and / or one column.
- This triple postulate makes it possible to simplify considerably the calculations during the simulation of the passage of each gate by the n qubits, because it makes it possible to eliminate - that is to say not to take into account - the unlikely values of the vector d 'state at the exit of the door, to retain (and memorize in a dedicated memory register) only the probable values.
- FIG. 1 shows a circuit comprising a single diagonal-type elementary quantum gate traversed by a single qubit: it is a controlled phase which applies to the qubit which passes through it an angular rotation.
- 0) is represented by a horizontal arrow, which signifies that the quantum gate considered does not modify the value of the processed qubits.
- FIG. 2 shows a circuit comprising a single elementary quantum gate of conventional type traversed by a single qubit: this is an X gate.
- 1) is illustrated by an oblique arrow, which means that the quantum gate under consideration modifies the state of the incoming qubit by assigning it the only other possible state.
- FIG. 3 shows a circuit comprising a single dense quantum elementary quantum gate traversed by a single qubit: this is a gate H (Hadamard).
- the two possible states of the input qubit are represented under the gate, in superimposed boxes, and, at the same height, the two possible values of the output qubit:
- each quantum gate model being associated with a matrix U k of transfer comprising ordered operators in rows and columns and defining the set of possible state transitions of qubits transiting through this gate.
- the simulation includes a first configuration phase, which includes the operations of:
- n 3;
- d quantum gate models eg. three Hadamard doors, two doors and a door
- the simulation comprises a second phase of analysis of the quantum circuit model thus configured, which comprises the operations of:
- Diagonal type gate the matrix of which is diagonal - this is so, in the example of FIG. 4, G 2 , G 4 and G S ;
- Gate of conventional type whose matrix is non-diagonal and includes operators of 0 or 1 due to a single operator per line and column (no door concerned in the example of FIG.4);
- bra-ket notation (used in FIG. 4) can be noted respectively:
- this vector comprising a series of 2 n amplitude coefficients
- L k the following values: o memorize the vector in a dedicated register of a semiconductor integrated circuit memory, which makes it possible to perform each computation step in parallel;
- L k such as:
- the qubit entering the Hadamart gate can take any value at the output, while the other two bits are unchanged: this explains why a double arrow starts from the box containing the possible state of the qubits at the entrance of the door and leads to the only two possible states at the output of the door, depending on the value of the qubit affected by the transfer function of the door: in the case, e.g. of the gate G 3 , which affects the second qubit only, and starting from the state
- the simulation could be accelerated by a factor of between 20 and 40.
- the method makes it possible to process a maximum number n m of qubits greater than:
- This number is greater by a factor of 2 than the known numbers, with equivalent memory capacity.
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Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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CA3057734A CA3057734A1 (fr) | 2017-03-24 | 2018-03-19 | Procede de simulation, sur un ordinateur classique, d'un circuit quantique |
CN201880033603.8A CN110709851A (zh) | 2017-03-24 | 2018-03-19 | 在传统计算机上仿真量子电路的方法 |
US16/497,004 US11487923B2 (en) | 2017-03-24 | 2018-03-19 | Method for simulating a quantum circuit, on a classical computer |
EP18714301.1A EP3602354A1 (fr) | 2017-03-24 | 2018-03-19 | Procédé de simulation, sur un ordinateur classique, d'un circuit quantique |
JP2020501846A JP2020515999A (ja) | 2017-03-24 | 2018-03-19 | 古典的なコンピュータ上で量子回路をシミュレートする方法 |
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FR1770299A FR3064380B1 (fr) | 2017-03-24 | 2017-03-24 | Procede de simulation, sur un ordinateur classique, d'un circuit quantique |
FR1770299 | 2017-03-24 |
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US (1) | US11487923B2 (fr) |
EP (1) | EP3602354A1 (fr) |
JP (1) | JP2020515999A (fr) |
CN (1) | CN110709851A (fr) |
CA (1) | CA3057734A1 (fr) |
FR (1) | FR3064380B1 (fr) |
WO (1) | WO2018172629A1 (fr) |
Cited By (5)
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EP3671577A1 (fr) * | 2018-12-20 | 2020-06-24 | Bull SAS | Procédé d'analyse d'une simulation de l'exécution d'un circuit quantique |
EP3671578A1 (fr) * | 2018-12-20 | 2020-06-24 | Bull SAS | Procédé d'analyse d'une simulation de l'exécution d'un circuit quantique |
CN111914378A (zh) * | 2019-04-22 | 2020-11-10 | 合肥本源量子计算科技有限责任公司 | 一种单振幅量子计算模拟方法 |
CN113128015A (zh) * | 2019-12-31 | 2021-07-16 | 合肥本源量子计算科技有限责任公司 | 预估单振幅模拟量子计算所需资源的方法和系统 |
CN114511093A (zh) * | 2020-11-16 | 2022-05-17 | 中国人民解放军国防科技大学 | 玻色子系统模拟方法 |
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CN110428055A (zh) * | 2018-04-27 | 2019-11-08 | 阿里巴巴集团控股有限公司 | 量子计算方法和设备 |
US11205030B2 (en) * | 2019-01-03 | 2021-12-21 | International Business Machines Corporation | Avoiding data exchange in gate operation for quantum computing gates on a chip |
CN111738448B (zh) * | 2020-06-23 | 2021-09-28 | 北京百度网讯科技有限公司 | 量子线路模拟方法、装置、设备及存储介质 |
WO2022004274A1 (fr) * | 2020-06-30 | 2022-01-06 | 国立研究開発法人産業技術総合研究所 | Système informatique et dispositif de commande |
EP4152221A1 (fr) | 2021-09-16 | 2023-03-22 | Bull SAS | Procédé de construction d'un réseau informatique quantique-classique hybride |
CN116523053A (zh) * | 2022-01-24 | 2023-08-01 | 腾讯科技(深圳)有限公司 | 量子线路模拟方法、装置、设备、存储介质及程序产品 |
KR20230155761A (ko) * | 2022-05-04 | 2023-11-13 | 한국전자기술연구원 | 상태 벡터를 효율적으로 계산하는 양자 회로 연산 방법 |
KR20230155760A (ko) * | 2022-05-04 | 2023-11-13 | 한국전자기술연구원 | 양자 회로 시뮬레이션 하드웨어 |
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CN1870015A (zh) * | 2006-06-28 | 2006-11-29 | 中山大学 | 一种协同量子计算机体系结构方案 |
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WO2017095652A1 (fr) * | 2015-11-30 | 2017-06-08 | Microsoft Technology Licensing, Llc | Procédé et système pour arithmétique ternaire quantique efficace |
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2017
- 2017-03-24 FR FR1770299A patent/FR3064380B1/fr active Active
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2018
- 2018-03-19 CA CA3057734A patent/CA3057734A1/fr not_active Abandoned
- 2018-03-19 CN CN201880033603.8A patent/CN110709851A/zh active Pending
- 2018-03-19 EP EP18714301.1A patent/EP3602354A1/fr not_active Withdrawn
- 2018-03-19 US US16/497,004 patent/US11487923B2/en active Active
- 2018-03-19 WO PCT/FR2018/000057 patent/WO2018172629A1/fr active Application Filing
- 2018-03-19 JP JP2020501846A patent/JP2020515999A/ja not_active Ceased
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Cited By (12)
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EP3671577A1 (fr) * | 2018-12-20 | 2020-06-24 | Bull SAS | Procédé d'analyse d'une simulation de l'exécution d'un circuit quantique |
EP3671578A1 (fr) * | 2018-12-20 | 2020-06-24 | Bull SAS | Procédé d'analyse d'une simulation de l'exécution d'un circuit quantique |
FR3090983A1 (fr) * | 2018-12-20 | 2020-06-26 | Bull Sas | Procédé d’analyse d’une simulation de l’exécution d’un circuit quantique |
FR3090984A1 (fr) * | 2018-12-20 | 2020-06-26 | Bull Sas | Procédé d’analyse d’une simulation de l’exécution d’un circuit quantique |
US11501045B2 (en) | 2018-12-20 | 2022-11-15 | Bull Sas | Method for analyzing a simulation of the execution of a quantum circuit |
US11954009B2 (en) | 2018-12-20 | 2024-04-09 | Bull Sas | Method for analyzing a simulation of the execution of a quantum circuit |
CN111914378A (zh) * | 2019-04-22 | 2020-11-10 | 合肥本源量子计算科技有限责任公司 | 一种单振幅量子计算模拟方法 |
CN111914378B (zh) * | 2019-04-22 | 2024-05-07 | 本源量子计算科技(合肥)股份有限公司 | 一种单振幅量子计算模拟方法及装置 |
CN113128015A (zh) * | 2019-12-31 | 2021-07-16 | 合肥本源量子计算科技有限责任公司 | 预估单振幅模拟量子计算所需资源的方法和系统 |
CN113128015B (zh) * | 2019-12-31 | 2023-04-07 | 合肥本源量子计算科技有限责任公司 | 预估单振幅模拟量子计算所需资源的方法和系统 |
CN114511093A (zh) * | 2020-11-16 | 2022-05-17 | 中国人民解放军国防科技大学 | 玻色子系统模拟方法 |
CN114511093B (zh) * | 2020-11-16 | 2023-06-09 | 中国人民解放军国防科技大学 | 玻色子系统模拟方法 |
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Publication number | Publication date |
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JP2020515999A (ja) | 2020-05-28 |
EP3602354A1 (fr) | 2020-02-05 |
CA3057734A1 (fr) | 2018-09-27 |
US20210103692A1 (en) | 2021-04-08 |
FR3064380B1 (fr) | 2019-04-19 |
FR3064380A1 (fr) | 2018-09-28 |
US11487923B2 (en) | 2022-11-01 |
CN110709851A (zh) | 2020-01-17 |
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