WO2018167981A1 - Inverter control device and inverter control method - Google Patents

Inverter control device and inverter control method Download PDF

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Publication number
WO2018167981A1
WO2018167981A1 PCT/JP2017/011056 JP2017011056W WO2018167981A1 WO 2018167981 A1 WO2018167981 A1 WO 2018167981A1 JP 2017011056 W JP2017011056 W JP 2017011056W WO 2018167981 A1 WO2018167981 A1 WO 2018167981A1
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output
phase
output voltage
inverter
time correction
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PCT/JP2017/011056
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French (fr)
Japanese (ja)
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照佳 村松
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三菱電機株式会社
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Priority to JP2019505676A priority Critical patent/JP6647448B2/en
Priority to PCT/JP2017/011056 priority patent/WO2018167981A1/en
Publication of WO2018167981A1 publication Critical patent/WO2018167981A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
    • H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation

Definitions

  • the present invention relates to a pulse width modulation type inverter control device and an inverter control method for driving a synchronous motor.
  • PWM pulse width modulation
  • the output time of each phase may be smaller than the minimum output time that allows current detection. In this case, it is not possible to detect a phase current whose output time is shorter than the minimum output time during which current can be detected. As a result, the current can be detected only for one phase or the current cannot be detected for one phase, and the PWM inverter control cannot be performed.
  • the present invention has been made in view of the above, and an object of the present invention is to obtain an inverter control device that enables stable inverter control regardless of the combination of the motor speed and the carrier frequency.
  • the present invention provides a direct current that supplies direct current power to an inverter in an inverter control device that controls an inverter that drives a motor based on a carrier signal and a timer value of each phase.
  • the phase current calculation means for calculating the AC current of each phase
  • the motor rotation speed calculation means for calculating the motor rotation speed from the AC current of each phase
  • the output time Ti per half of the pulse width modulation period of two basic voltage vectors of non-zero magnitude adjacent to the sector of Vs and the output voltage vector Vs.
  • Vs calculating means for calculating Tk and Tk, and an average vector of the output voltage vectors Vs ′ and Vs ′′ is equal to the output voltage vector Vs, and half the pulse width modulation period of two basic voltage vectors adjacent to the output voltage vector Vs ′ Vs ′ and Vs ′′ calculating means for calculating the output voltage vectors Vs ′ and Vs ′′ so that each of the hit output times is equal to or longer than the required output time.
  • the present invention includes the frequency of the carrier signal and the motor rotation.
  • Output time correction control execution determining means for determining whether or not to execute output time correction control based on the number and output times Ti and Tk, and determining that the output time correction control execution determination means executes the output time correction control
  • the first half of the pulse width modulation period is the output voltage vector Vs ′
  • the second half of the pulse width modulation period is the output voltage vector Vs ′′.
  • the output time correction control execution determination means determines that the output time correction control is not executed, the output voltage vector Vs is set to both in the first half and the second half of the pulse width modulation period.
  • Timer value calculating means for obtaining a timer value of each phase is further provided.
  • the inverter control device has an effect that stable inverter control is possible regardless of the combination of the motor speed and the carrier frequency.
  • FIG. 3 is a diagram for explaining a relationship between a basic voltage vector and a sector according to the first embodiment; 6 is a flowchart for explaining the operation of the output time correction control execution determination unit according to the first embodiment.
  • Vector diagram of output voltage vector in the case of FIG. The figure which shows the motor current waveform of the U phase when output time correction control is performed even if it is a case where the inverter control apparatus concerning Embodiment 1 satisfy
  • FIG. 1 is a block diagram showing a configuration of a microcomputer according to a first embodiment.
  • FIG. 1 is a diagram illustrating a configuration of an inverter control device 100 according to the first embodiment of the present invention.
  • the inverter control device 100 controls the inverter 1 that drives the motor 2 that is a synchronous motor.
  • Motor 2 is a three-phase motor.
  • the inverter control device 100 includes a phase current calculation unit 4, a motor rotation number calculation unit 5, a ⁇ - ⁇ axis voltage calculation unit 6, a Vs calculation unit 7, a carrier frequency setting unit 8, and an output time correction control execution determination.
  • Vs ′ and Vs ′′ calculating means 10 Means 9, Vs ′ and Vs ′′ calculating means 10, timer value calculating means 11, and drive signal generating means 12, and DC bus 13 for supplying DC power from power supply 14 to inverter 1
  • Current detection means 3 is provided, and the current detection means 3 detects a direct current for each of a plurality of phases flowing through the motor 2.
  • FIG. 2 is a diagram illustrating a configuration of the inverter 1 and the motor 2 according to the first embodiment.
  • the inverter 1 is a three-phase inverter.
  • the inverter 1 includes switching elements SW1 and SW4 corresponding to the U phase, switching elements SW2 and SW5 corresponding to the V phase, and switching elements SW3 and SW6 corresponding to the W phase.
  • Switching elements SW1 to SW3 are upper arm side switching elements, and switching elements SW4 to SW6 are lower arm side switching elements.
  • Switching elements SW1 and SW4 are connected via terminal 101, switching elements SW2 and SW5 are connected via terminal 102, and switching elements SW3 and SW6 are connected via terminal 103.
  • the terminal connected to the coil corresponding to the U phase of the motor 2 is connected to the terminal 101 of the inverter 1, and the terminal connected to the coil corresponding to the V phase of the motor 2 is connected to the terminal 102 of the inverter 1, The terminal connected to the coil corresponding to the W phase of the motor 2 is connected to the terminal 103 of the inverter 1.
  • the phase current calculation unit 4 calculates three-phase AC currents Iu, Iv, and Iw that are AC currents of the respective phases from the DC current Idc detected by the current detection unit 3.
  • the motor rotation speed calculation means 5 calculates a q-axis current by dq conversion from the three-phase AC currents Iu, Iv, and Iw obtained by the phase current calculation means 4, and calculates the motor from the calculated q-axis current AC component.
  • the rotational speed f is calculated.
  • the ⁇ - ⁇ -axis voltage calculation means 6 is a ⁇ -axis voltage command V ⁇ and a ⁇ -axis voltage command V ⁇ that are voltage command values for the ⁇ - ⁇ axes from the three-phase alternating currents Iu, Iv, Iw obtained by the phase current calculation means 4. And the phase ⁇ are calculated.
  • the ⁇ - ⁇ axis is a rotational coordinate system assumed on the stator of the motor 2.
  • the phase ⁇ is an angle in the rotational coordinate system from the U phase of the stator of the motor 2 to the ⁇ axis.
  • the U phase of the stator of the motor 2 corresponds to a basic voltage vector V1 described later.
  • the Vs calculation means 7 is adjacent to the sector SCT_Vs of the output voltage vector Vs and the output voltage vector Vs based on the ⁇ -axis voltage command V ⁇ , the ⁇ -axis voltage command V ⁇ and the phase ⁇ calculated by the ⁇ - ⁇ -axis voltage calculation means 6.
  • the output times Ti and Tk per 1/2 PWM period of two basic voltage vectors whose magnitudes are non-zero are calculated.
  • Perfect 1/2 PWM cycle means a value in units of 1/2 PWM cycle, which is half of the pulse width modulation cycle. SCT_Vs, output times Ti and Tk will be described below with reference to FIG.
  • FIG. 3 is a diagram for explaining the relationship between the basic voltage vector and the sector according to the first embodiment.
  • the basic voltage vectors V1 to V6 correspond to the switching states of the switching elements SW1 to SW6 of the inverter 1.
  • (1, 0, 0) indicating the basic voltage vector V1 indicates that the switching elements SW1, SW5, and SW6 of the inverter 1 are in the ON state and the switching elements SW2, SW3, and SW4 are in the OFF state. That is, “1” when the upper arm side switching element is ON and the lower arm side switching element is OFF in each of the U phase, V phase, and W phase, and the upper arm side switching element is OFF.
  • “0” is shown in order. Therefore, (1, 1, 0) indicating the basic voltage vector V2 indicates that the switching elements SW1, SW2, and SW6 of the inverter 1 are in the ON state and the switching elements SW3, SW4, and SW5 are in the OFF state.
  • the carrier frequency setting means 8 outputs the carrier frequency fc, which is a preset frequency of the carrier signal, to the output time correction control execution determination means 9 and the drive signal generation means 12.
  • the output time correction control execution determination means 9 outputs the output time from the motor rotation speed f calculated by the motor rotation speed calculation means 5, Ti and Tk calculated by the Vs calculation means 7, and a preset carrier frequency fc. It is determined whether or not correction control is executed.
  • the Vs ′ and Vs ′′ calculation means 10 is based on the required output time TMIN which is the minimum output time required for the current detection means 3 to detect any of the Ti and Tk calculated by the Vs calculation means 7.
  • TMIN the required output time required for the current detection means 3 to detect any of the Ti and Tk calculated by the Vs calculation means 7.
  • the output time correction control is executed so that phase current information for two phases can be detected from the DC bus current during one PWM cycle.
  • Vs ′ and Vs ′′ calculating means 10 executes the output time correction control.
  • the output time correction control is executed based on the sector SCT_Vs, the output times Ti and Tk given from the Vs calculating means 7 via the determination means 9.
  • Vs ′ and Vs ′′ calculation means 10 calculates two basic voltages whose average vectors of output voltage vectors Vs ′ and Vs ′′ are equal to output voltage vector Vs and whose magnitude is adjacent to output voltage vector Vs ′.
  • the output voltage vectors Vs ′ and Vs ′′ are calculated so that each of the output times per 1/2 PWM period of the vector is equal to or greater than a predetermined required output time TMIN.
  • the output voltage vector Vs ′ is calculated in the first half of the PWM period.
  • the output voltage vector Vs ′′ is applied in the second half of the PWM period.
  • the Vs ′ and Vs ′′ calculating means 10 per sector SCT_Vs ′ of the output voltage vector Vs ′ satisfying the above conditions and the 1 ⁇ 2 PWM period of the basic voltage vector adjacent to the output voltage vector Vs ′.
  • a specific example of a detailed calculation method of the Vs ′ and Vs ′′ calculation means 10 may be a known method such as the method described in Patent Document 1.
  • the timer value calculation means 11 When the output time correction control is executed, the timer value calculation means 11 outputs the sector SCT_Vs ′ calculated by the calculation means 10, the output times Ti ′ and Tk ′, the sector SCT_Vs ′′, and the output time. Timer values U_TIM, V_TIM, and W_TIM for each of the U phase, V phase, and W phase are calculated so as to satisfy Ti ′′ and Tk ′′. Specifically, the sector SCT_Vs ′, the output times Ti ′ and Tk ′, and the sector SCT_Vs ′′ are set such that the first half of the PWM cycle is the output voltage vector Vs ′ and the second half of the PWM cycle is the output voltage vector Vs ′′. Based on the output times Ti ′′ and Tk ′′, the timer value calculation means 11 calculates the timer values U_TIM, V_TIM, W_TIM of each phase.
  • the timer value calculation unit 11 When the output time correction control is not executed, the timer value calculation unit 11 satisfies the sector SCT_Vs and the output times Ti and Tk given from the Vs calculation unit 7 via the output time correction control execution determination unit 9. In addition, timer values U_TIM, V_TIM, and W_TIM for each phase are calculated. Specifically, the timer value calculation means 11 calculates the timer values U_TIM, V_TIM, W_TIM of each phase based on the sector SCT_Vs and the output times Ti and Tk so that both the first half and the second half of the PWM cycle become the output voltage vector Vs. Is calculated.
  • a specific method for calculating the timer values U_TIM, V_TIM, and W_TIM of each phase by the timer value calculation unit 11 is a known method such as the method described in Patent Document 1. It doesn't matter.
  • the drive signal generation unit 12 generates a PWM drive signal by comparing the carrier signal of the carrier frequency fc and the timer values U_TIM, V_TIM, and W_TIM calculated by the timer value calculation unit 11 and outputs them to the inverter 1. To do.
  • a specific example of a method for generating a PWM drive signal using the timer values U_TIM, V_TIM, and W_TIM of each phase may be a known method such as the method described in Patent Document 1.
  • FIG. 4 is a flowchart for explaining the operation of the output time correction control execution determination unit 9 according to the first embodiment.
  • the output times Ti and Tk calculated by the Vs calculating means 7 and the required output times TMIN and TMIN which are half the minimum output times required for detecting the direct current are obtained.
  • the output time correction control execution determination means 9 executes case classification in 11 cases of case 0 to case 10 as follows (step S1).
  • the output time correction control execution determination means 9 determines whether or not the output times Ti and Tk correspond to case 0 (step S2). When the output times Ti and Tk correspond to case 0 (step S2: Yes), the output time correction control execution determination unit 9 determines that the current for two phases can be detected, and the inverter control device 100 corrects the output time. Control is not executed (step S5). That is, the timer value calculator 11 calculates the timer values U_TIM, V_TIM, and W_TIM of each phase so that the sector SCT_Vs and the output times Ti and Tk calculated by the Vs calculator 7 are satisfied. When the output times Ti and Tk do not correspond to case 0 (step S2: No), the output time correction control execution determination unit 9 proceeds to step S3.
  • step S3 the output time correction control execution determination unit 9 determines whether or not the combination of the carrier frequency fc and the motor rotation speed f satisfying the conditions in which case1, case2, case3, and case7 exist.
  • FIG. 5 is a diagram illustrating a relationship between the motor current and the carrier signal according to the first embodiment.
  • FIG. 6 is a vector diagram of an output voltage vector in the case of FIG.
  • the number of carrier periods included in one electrical angle period is obtained by fc ⁇ (f ⁇ number of pole pairs).
  • the carrier period is the period of the carrier signal.
  • the above combination is applied in the case of a three-phase inverter.
  • the combination of the carrier frequency fc that satisfies the condition and the motor rotation speed f may be any combination that synchronizes with the common divisor of 60 deg whose carrier cycle is an electrical angle.
  • the inverter 1 is a three-phase inverter
  • the number of phases of inverter 1 may be different from 3. If the combination of the motor rotation speed f and the carrier frequency fc is such that the carrier period is synchronized with the common divisor of the electrical angle (360 ⁇ inverter phase ⁇ 2) deg, case 1 can only detect current for one phase.
  • the state can be any of case2, case3, and case7. Therefore, in step S3, it is determined whether or not the motor rotation speed f and the carrier frequency fc satisfy the condition that the carrier period is synchronized with the common divisor of the electrical angle (360 ⁇ inverter phase ⁇ 2) deg. What is necessary is just to judge.
  • the inverter control device 100 executes the output time correction control (step S3). S6). That is, the timer value calculation unit 11 satisfies the sector SCT_Vs ′ calculated by the Vs ′ and Vs ′′ calculation unit 10, the output times Ti ′ and Tk ′, the sector SCT_Vs ′′, and the output times Ti ′′ and Tk ′′. As described above, the timer value calculation means 11 calculates the timer values U_TIM, V_TIM, and W_TIM of the U phase, V phase, and W phase.
  • step S3 If the output time correction control execution determination unit 9 determines that the combination of the carrier frequency fc and the motor speed f satisfies the conditions (step S3: Yes), the process proceeds to step S4.
  • step S4 the output time correction control execution determination means 9 determines whether or not the output times Ti and Tk calculated by the Vs calculation means 7 satisfy a predetermined condition.
  • the predetermined condition may be case1, case2, case3, and case7 in which only one phase of current can be detected in a 1/2 PWM cycle.
  • the predetermined conditions for the output times Ti and Tk in step S4 may be limited to case 2 and case 7 in which the output voltage phase is greatly shaken when the output time correction control is executed.
  • a plurality of states may be selected from case1, case2, case3, and case7, and the predetermined conditions for the output times Ti and Tk may be set.
  • step S4 If the output time correction control execution determination means 9 determines that the output times Ti and Tk satisfy the predetermined conditions (step S4: Yes), the inverter control device 100 does not execute the output time correction control (step S5). Further, when the output time correction control execution determining means 9 determines that the output times Ti and Tk do not satisfy the predetermined condition (step S4: No), the inverter control device 100 executes the output time correction control (step S4). S6).
  • FIG. 7 is a diagram illustrating a U-phase motor current waveform when the output time correction control is executed even when the inverter control device 100 according to the first embodiment satisfies a predetermined condition.
  • FIG. 8 is a diagram illustrating a U-phase motor current waveform when the output time correction control is not executed when the inverter control device 100 according to the first embodiment satisfies a predetermined condition. 7 and 8, the horizontal axis is time, and the vertical axis is motor current. FIG.
  • Fig. 5 shows a U-phase motor current waveform when the output time correction control is executed. That is, FIG. 7 differs from FIG. 4 in the case where it is determined in step S4 of FIG. 4 that the output times Ti and Tk satisfy predetermined conditions (step S4: Yes). The situation when time correction control is executed is shown.
  • FIG. 8 shows a case where the inverter control device 100 does not execute the output time correction control according to the flowchart of FIG. 4 in the case 2 or case 7 (step S4: Yes) under the same conditions as FIG.
  • the U-phase motor current waveform in step S5) is shown.
  • the inverter 1 is a three-phase inverter
  • the number of poles of the motor 2 is 6
  • the carrier frequency fc 4.5 kHz
  • the motor rotation speed f 125 rp
  • the total number of times of current detection per one electrical angle cycle is 12 times.
  • six times is a state in which current can be detected only for one phase. In all of these cases, if correction control is executed for the output time, the voltage phase may increase and control may become unstable.
  • the inverter control device 100 has the carrier frequency fc and the motor rotation that satisfy the condition that the current can be detected only in one phase regardless of the modulation rate in the 1/2 PWM period. In the case of a combination with the number f, control instability can be suppressed by not correcting the output time. Furthermore, the inverter control device 100 according to the first embodiment is a combination of the carrier frequency fc and the motor rotation speed f that satisfy the above conditions, and the output times Ti and Tk satisfy further predetermined conditions. In addition, the output time may not be corrected.
  • An example of a device on which the inverter control device 100 according to the first embodiment is mounted is an air conditioner or a refrigerator.
  • the inverter control device 100 can control an inverter control board that drives a compressor motor or a fan motor mounted thereon.
  • the inverter control device 100 By installing the inverter control device 100 in an air conditioner or refrigerator, it is possible to expand the operating range, improve the operation quality, and prevent the noise or vibration of the compressor motor or fan motor due to current pulsation. A high air conditioner or refrigerator can be realized.
  • the inverter control device 100 is specifically realized by a microcomputer or the like.
  • FIG. 9 is a block diagram of the configuration of the microcomputer 200 according to the first embodiment.
  • the function of each means of the inverter control device 100 is realized by the microcomputer 200 having the configuration as shown in FIG.
  • the microcomputer 200 includes a CPU (Central Processing Unit) 201 that executes calculation and control, a RAM (Random Access Memory) 202 that the CPU 201 uses as a work area, a ROM (Read Only Memory) 203 that stores programs and data, It includes an I / O (Input / Output) 204 that is hardware for exchanging signals with the outside, and a peripheral device 205 including an oscillator that generates a clock.
  • the inverter control method described above performed by the inverter control device 100 is realized by the CPU 201 executing a program stored in the ROM 203.
  • the configuration described in the above embodiment shows an example of the contents of the present invention, and can be combined with another known technique, and can be combined with other configurations without departing from the gist of the present invention. It is also possible to omit or change the part.

Abstract

An inverter control device (100) for controlling an inverter (1) for driving a motor (2) is provided with: a motor rotational speed calculation means (5) for calculating motor rotational speed; a Vs calculation means (7) for calculating the sector of an output voltage vector Vs and output times Ti and Tk per half pulse width modulation cycle of two fundamental voltage vectors adjacent to the output voltage vector Vs and having nonzero magnitude; a Vs' and Vs" calculation means (10) for calculating output voltage vectors Vs' and Vs"; an output time correction control execution determination means (9) for determining, on the basis of the frequency of a carrier signal, the motor rotational speed, and the output times Ti and Tk, whether output time correction control is executed or not; and a timer value calculation means (11) for, when the output time correction control execution determination means (9) determines that the output time correction control is not executed, obtaining the timer value of each phase so that the output voltage vector Vs is applied to both first and second half of the pulse width modulation cycle.

Description

インバーター制御装置およびインバーター制御方法Inverter control device and inverter control method
　本発明は、同期電動機を駆動させるパルス幅変調方式のインバーター制御装置およびインバーター制御方法に関する。 The present invention relates to a pulse width modulation type inverter control device and an inverter control method for driving a synchronous motor.
　パルス幅変調（Pulse　Width　Modulation：以下ＰＷＭと称する）方式のインバーター制御装置における三相インバーターの直流電流を検出する回路においては、電流検出の際に二相分の相電流を検出する必要がある。そして、相電流を電流検出するためには、各相において電流検出が可能となるために必要な最小の出力時間以上の出力時間が必要である。 In a circuit that detects the direct current of a three-phase inverter in a pulse width modulation (hereinafter referred to as PWM) type inverter control device, it is necessary to detect the phase current for two phases when detecting the current. In order to detect the phase current, an output time longer than the minimum output time necessary for detecting the current in each phase is required.
　しかし、軽負荷の状態または低回転数の領域などにおいては、各相の出力時間が電流検出可能な最小の出力時間より小さくなる場合が発生する。この場合、出力時間が電流検出可能な最小の出力時間より小さくなる相の電流は検出できない。これにより、一相分しか電流検出ができない状態または電流検出が一相もできない状態になり、ＰＷＭ方式のインバーター制御ができない。 However, in a light load state or a low rotation speed region, the output time of each phase may be smaller than the minimum output time that allows current detection. In this case, it is not possible to detect a phase current whose output time is shorter than the minimum output time during which current can be detected. As a result, the current can be detected only for one phase or the current cannot be detected for one phase, and the PWM inverter control cannot be performed.
　特許文献１に示される従来のインバーター制御装置においては、出力時間が電流検出可能な最小の出力時間より小さくなった場合、「Ｖｓ’Ｖｓ’’演算手段」によって出力時間の補正を行い、二相分の電流を検出できるように制御している。 In the conventional inverter control device disclosed in Patent Document 1, when the output time becomes shorter than the minimum output time at which current can be detected, the output time is corrected by “Vs′Vs” calculation means ”, and two-phase It is controlled so that the current of the minute can be detected.
特開２０１１－２３４４２８号公報JP 2011-234428 A
　しかしながら、特許文献１における出力時間の補正制御の種類は、ｃａｓｅ０～ｃａｓｅ１０の計１１ケースあり、ケースによっては出力電圧の位相が大きく振られる場合があり、制御が不安定になる場合がある。 However, there are a total of 11 cases of output time correction control in Patent Document 1 (case 0 to case 10), and depending on the case, the phase of the output voltage may be greatly shaken, and the control may become unstable.
　さらに、あるモーター回転数とあるキャリア周波数の組み合わせなど、パルス幅変調周期の半分すなわち１／２ＰＷＭ周期において一相しか電流検出できない状態が存在するモーター回転数とキャリア周波数との組み合わせとなる場合においては、電気角１周期における電流検出時に一相分しか電流検出できない状態となる割合が大きくなる。このような場合においては、一相分しか電流検出できない状態のすべてに出力時間の補正を行うため、制御が不安定になる場合があり、制御不安定によるモーター電流の脈動が発生する。その結果、効率悪化、脈動音が大きくなること、過電流保護によるユニット停止といった問題が起こる可能性があり、省エネルギーおよび快適性の実現が困難になるという課題がある。 Furthermore, in the case of a combination of the motor rotation speed and the carrier frequency, such as a combination of a certain motor rotation speed and a certain carrier frequency, where there is a state in which only one phase of current can be detected in half the pulse width modulation period, that is, 1/2 PWM period. When the current is detected in one electrical angle cycle, the ratio of the state in which only one phase of current can be detected increases. In such a case, since the output time is corrected for all states in which current can be detected only for one phase, control may become unstable, and motor current pulsation may occur due to control instability. As a result, problems such as deterioration in efficiency, increase in pulsation noise, and unit stop due to overcurrent protection may occur, which makes it difficult to realize energy saving and comfort.
　したがって、上記のようなモーター回転数とキャリア周波数との組み合わせにおいても、変調率によらず、安定したインバーター制御を可能とすることが望まれていた。 Therefore, it has been desired to enable stable inverter control regardless of the modulation rate even in the combination of the motor rotation speed and the carrier frequency as described above.
　本発明は、上記に鑑みてなされたものであって、モーター回転数とキャリア周波数との組み合わせによらず安定したインバーター制御を可能にするインバーター制御装置を得ることを目的とする。 The present invention has been made in view of the above, and an object of the present invention is to obtain an inverter control device that enables stable inverter control regardless of the combination of the motor speed and the carrier frequency.
　上述した課題を解決し、目的を達成するために、本発明は、モーターを駆動するインバーターをキャリア信号および各相のタイマー値に基づいて制御するインバーター制御装置において、直流電力をインバーターに供給する直流母線から検出された直流電流から各相の交流電流を算出する相電流算出手段と、各相の交流電流からモーター回転数を算出するモーター回転数算出手段と、各相の交流電流から、モーターの固定子上に想定した回転座標系であるγ軸およびδ軸の電圧指令値と、回転座標系における位相とを算出するγ－δ軸電圧演算手段と、電圧指令値および位相から、出力電圧ベクトルＶｓのセクターと出力電圧ベクトルＶｓに隣接する大きさが非零の２つの基本電圧ベクトルのパルス幅変調周期の半分当たりの出力時間ＴｉおよびＴｋを算出するＶｓ演算手段と、出力電圧ベクトルＶｓ’およびＶｓ”の平均ベクトルが出力電圧ベクトルＶｓに等しく、かつ出力電圧ベクトルＶｓ’に隣接する２つの基本電圧ベクトルのパルス幅変調周期の半分当たりの出力時間の各々が必要出力時間以上となるように出力電圧ベクトルＶｓ’およびＶｓ”を算出するＶｓ’およびＶｓ”演算手段と、を備える。本発明は、キャリア信号の周波数と、モーター回転数と、出力時間ＴｉおよびＴｋと、に基づいて、出力時間補正制御の実行の有無を判定する出力時間補正制御実行判定手段と、出力時間補正制御実行判定手段が出力時間補正制御を実行すると判定した場合は、パルス幅変調周期の前半は出力電圧ベクトルＶｓ’となり、パルス幅変調周期の後半は出力電圧ベクトルＶｓ”となるように各相のタイマー値を求め、出力時間補正制御実行判定手段が出力時間補正制御を実行しないと判定した場合は、パルス幅変調周期の前半および後半で共に出力電圧ベクトルＶｓとなるように各相のタイマー値を求めるタイマー値演算手段とをさらに備えることを特徴とする。 In order to solve the above-described problems and achieve the object, the present invention provides a direct current that supplies direct current power to an inverter in an inverter control device that controls an inverter that drives a motor based on a carrier signal and a timer value of each phase. From the DC current detected from the bus, the phase current calculation means for calculating the AC current of each phase, the motor rotation speed calculation means for calculating the motor rotation speed from the AC current of each phase, and the AC current of each phase, Γ-δ-axis voltage calculation means for calculating voltage command values for the γ-axis and δ-axis, which is a rotational coordinate system assumed on the stator, and a phase in the rotary coordinate system, and an output voltage vector from the voltage command value and the phase The output time Ti per half of the pulse width modulation period of two basic voltage vectors of non-zero magnitude adjacent to the sector of Vs and the output voltage vector Vs. Vs calculating means for calculating Tk and Tk, and an average vector of the output voltage vectors Vs ′ and Vs ″ is equal to the output voltage vector Vs, and half the pulse width modulation period of two basic voltage vectors adjacent to the output voltage vector Vs ′ Vs ′ and Vs ″ calculating means for calculating the output voltage vectors Vs ′ and Vs ″ so that each of the hit output times is equal to or longer than the required output time. The present invention includes the frequency of the carrier signal and the motor rotation. Output time correction control execution determining means for determining whether or not to execute output time correction control based on the number and output times Ti and Tk, and determining that the output time correction control execution determination means executes the output time correction control In this case, the first half of the pulse width modulation period is the output voltage vector Vs ′, and the second half of the pulse width modulation period is the output voltage vector Vs ″. When the output time correction control execution determination means determines that the output time correction control is not executed, the output voltage vector Vs is set to both in the first half and the second half of the pulse width modulation period. Timer value calculating means for obtaining a timer value of each phase is further provided.
　本発明にかかるインバーター制御装置は、モーター回転数とキャリア周波数との組み合わせによらず安定したインバーター制御が可能になるという効果を奏する。 The inverter control device according to the present invention has an effect that stable inverter control is possible regardless of the combination of the motor speed and the carrier frequency.
本発明の実施の形態１にかかるインバーター制御装置の構成を示す図The figure which shows the structure of the inverter control apparatus concerning Embodiment 1 of this invention. 実施の形態１にかかるインバーターおよびモーターの構成を示す図The figure which shows the structure of the inverter and motor concerning Embodiment 1. FIG. 実施の形態１にかかる基本電圧ベクトルとセクターの関係を説明する図FIG. 3 is a diagram for explaining a relationship between a basic voltage vector and a sector according to the first embodiment; 実施の形態１にかかる出力時間補正制御実行判定手段の動作を説明するフローチャート6 is a flowchart for explaining the operation of the output time correction control execution determination unit according to the first embodiment. 実施の形態１にかかるモーター電流とキャリア信号との関係を示す図The figure which shows the relationship between the motor electric current and carrier signal concerning Embodiment 1. 図５の場合における出力電圧ベクトルのベクトル図Vector diagram of output voltage vector in the case of FIG. 実施の形態１にかかるインバーター制御装置が予め定めた条件を満たす場合であっても出力時間補正制御を実行したときのＵ相のモーター電流波形を示す図The figure which shows the motor current waveform of the U phase when output time correction control is performed even if it is a case where the inverter control apparatus concerning Embodiment 1 satisfy | fills predetermined conditions. 実施の形態１にかかるインバーター制御装置が予め定めた条件を満たす場合に出力時間補正制御を実行しなかったときのＵ相のモーター電流波形を示す図The figure which shows the motor current waveform of the U phase when not performing output time correction | amendment control, when the inverter control apparatus concerning Embodiment 1 satisfy | fills the predetermined condition. 実施の形態１にかかるマイクロコンピュータの構成を示すブロック図1 is a block diagram showing a configuration of a microcomputer according to a first embodiment.
　以下に、本発明の実施の形態にかかるインバーター制御装置およびインバーター制御方法を図面に基づいて詳細に説明する。なお、この実施の形態によりこの発明が限定されるものではない。 Hereinafter, an inverter control device and an inverter control method according to an embodiment of the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.
実施の形態１．
　図１は、本発明の実施の形態１にかかるインバーター制御装置１００の構成を示す図である。インバーター制御装置１００は、同期電動機であるモーター２を駆動するインバーター１を制御する。モーター２は三相モーターである。インバーター制御装置１００は、相電流算出手段４と、モーター回転数算出手段５と、γ－δ軸電圧演算手段６と、Ｖｓ演算手段７と、キャリア周波数設定手段８と、出力時間補正制御実行判定手段９と、Ｖｓ’およびＶｓ”演算手段１０と、タイマー値演算手段１１と、駆動信号生成手段１２と、を備える。そして、電源１４からの直流電力をインバーター１に供給する直流母線１３には電流検出手段３が設けられている。電流検出手段３は、モーター２に流れる複数相の各相分の直流電流を検出する。 Embodiment 1 FIG.
FIG. 1 is a diagram illustrating a configuration of an inverter control device 100 according to the first embodiment of the present invention. The inverter control device 100 controls the inverter 1 that drives the motor 2 that is a synchronous motor. Motor 2 is a three-phase motor. The inverter control device 100 includes a phase current calculation unit 4, a motor rotation number calculation unit 5, a γ-δ axis voltage calculation unit 6, a Vs calculation unit 7, a carrier frequency setting unit 8, and an output time correction control execution determination. Means 9, Vs ′ and Vs ″ calculating means 10, timer value calculating means 11, and drive signal generating means 12, and DC bus 13 for supplying DC power from power supply 14 to inverter 1 Current detection means 3 is provided, and the current detection means 3 detects a direct current for each of a plurality of phases flowing through the motor 2.
　図２は、実施の形態１にかかるインバーター１およびモーター２の構成を示す図である。インバーター１は、三相インバーターである。インバーター１は、Ｕ相に対応するスイッチング素子ＳＷ１，ＳＷ４と、Ｖ相に対応するスイッチング素子ＳＷ２，ＳＷ５と、Ｗ相に対応するスイッチング素子ＳＷ３，ＳＷ６と、を備える。スイッチング素子ＳＷ１～ＳＷ３が上アーム側のスイッチング素子であり、スイッチング素子ＳＷ４～ＳＷ６が下アーム側のスイッチング素子である。スイッチング素子ＳＷ１およびＳＷ４は端子１０１を介して接続され、スイッチング素子ＳＷ２およびＳＷ５は端子１０２を介して接続され、スイッチング素子ＳＷ３およびＳＷ６は端子１０３を介して接続される。モーター２のＵ相に対応するコイルに接続された端子は、インバーター１の端子１０１に接続され、モーター２のＶ相に対応するコイルに接続された端子は、インバーター１の端子１０２に接続され、モーター２のＷ相に対応するコイルに接続された端子は、インバーター１の端子１０３に接続される。 FIG. 2 is a diagram illustrating a configuration of the inverter 1 and the motor 2 according to the first embodiment. The inverter 1 is a three-phase inverter. The inverter 1 includes switching elements SW1 and SW4 corresponding to the U phase, switching elements SW2 and SW5 corresponding to the V phase, and switching elements SW3 and SW6 corresponding to the W phase. Switching elements SW1 to SW3 are upper arm side switching elements, and switching elements SW4 to SW6 are lower arm side switching elements. Switching elements SW1 and SW4 are connected via terminal 101, switching elements SW2 and SW5 are connected via terminal 102, and switching elements SW3 and SW6 are connected via terminal 103. The terminal connected to the coil corresponding to the U phase of the motor 2 is connected to the terminal 101 of the inverter 1, and the terminal connected to the coil corresponding to the V phase of the motor 2 is connected to the terminal 102 of the inverter 1, The terminal connected to the coil corresponding to the W phase of the motor 2 is connected to the terminal 103 of the inverter 1.
　相電流算出手段４は、電流検出手段３が検出した直流電流Ｉｄｃから各相の交流電流である三相の交流電流Ｉｕ，Ｉｖ，Ｉｗを算出する。 The phase current calculation unit 4 calculates three-phase AC currents Iu, Iv, and Iw that are AC currents of the respective phases from the DC current Idc detected by the current detection unit 3.
　モーター回転数算出手段５は、相電流算出手段４が求めた三相の交流電流Ｉｕ，Ｉｖ，Ｉｗからｄ－ｑ変換してｑ軸電流を算出し、算出したｑ軸電流の交流成分からモーター回転数ｆを算出する。 The motor rotation speed calculation means 5 calculates a q-axis current by dq conversion from the three-phase AC currents Iu, Iv, and Iw obtained by the phase current calculation means 4, and calculates the motor from the calculated q-axis current AC component. The rotational speed f is calculated.
　γ－δ軸電圧演算手段６は、相電流算出手段４が求めた三相の交流電流Ｉｕ，Ｉｖ，Ｉｗからγ－δ軸の電圧指令値であるγ軸電圧指令Ｖγおよびδ軸電圧指令Ｖδと位相θとを算出する。γ－δ軸は、モーター２の固定子上に想定した回転座標系である。ここで、位相θはモーター２の固定子のＵ相からγ軸までの上記回転座標系における角度である。モーター２の固定子のＵ相は、後述する基本電圧ベクトルＶ１に相当する。 The γ-δ-axis voltage calculation means 6 is a γ-axis voltage command Vγ and a δ-axis voltage command Vδ that are voltage command values for the γ-δ axes from the three-phase alternating currents Iu, Iv, Iw obtained by the phase current calculation means 4. And the phase θ are calculated. The γ-δ axis is a rotational coordinate system assumed on the stator of the motor 2. Here, the phase θ is an angle in the rotational coordinate system from the U phase of the stator of the motor 2 to the γ axis. The U phase of the stator of the motor 2 corresponds to a basic voltage vector V1 described later.
　Ｖｓ演算手段７は、γ－δ軸電圧演算手段６が算出したγ軸電圧指令Ｖγ，δ軸電圧指令Ｖδおよび位相θに基づいて、出力電圧ベクトルＶｓのセクターＳＣＴ_Ｖｓと、出力電圧ベクトルＶｓに隣接する大きさが非零の２つの基本電圧ベクトルの１／２ＰＷＭ周期当たりの出力時間ＴｉおよびＴｋを算出する。１／２ＰＷＭ周期当たりとは、パルス幅変調周期の半分である１／２ＰＷＭ周期を単位とした値という意味である。ＳＣＴ_Ｖｓ、出力時間ＴｉおよびＴｋについては、図３を用いて以下に説明する。 The Vs calculation means 7 is adjacent to the sector SCT_Vs of the output voltage vector Vs and the output voltage vector Vs based on the γ-axis voltage command Vγ, the δ-axis voltage command Vδ and the phase θ calculated by the γ-δ-axis voltage calculation means 6. The output times Ti and Tk per 1/2 PWM period of two basic voltage vectors whose magnitudes are non-zero are calculated. “Per 1/2 PWM cycle” means a value in units of 1/2 PWM cycle, which is half of the pulse width modulation cycle. SCT_Vs, output times Ti and Tk will be described below with reference to FIG.
　図３は、実施の形態１にかかる基本電圧ベクトルとセクターの関係を説明する図である。図３において、大きさが非零である基本電圧ベクトルＶ１～Ｖ６によりセクター０～セクター５が区分される。したがって、Ｖｓ演算手段７において、ＳＣＴ_Ｖｓ＝０は、出力電圧ベクトルＶｓのセクターがセクター０にあることを示し、ＳＣＴ_Ｖｓ＝１は、出力電圧ベクトルＶｓのセクターがセクター１にあることを示すといったように、ＳＣＴ_Ｖｓの値は決定される。 FIG. 3 is a diagram for explaining the relationship between the basic voltage vector and the sector according to the first embodiment. In FIG. 3, sectors 0 to 5 are divided by basic voltage vectors V1 to V6 having non-zero magnitudes. Therefore, in the Vs calculation means 7, SCT_Vs = 0 indicates that the sector of the output voltage vector Vs is in the sector 0, SCT_Vs = 1 indicates that the sector of the output voltage vector Vs is in the sector 1, and so on. , SCT_Vs is determined.
　図３において、基本電圧ベクトルＶ１～Ｖ６は、インバーター１のスイッチング素子ＳＷ１～ＳＷ６のスイッチング状態に対応している。基本電圧ベクトルＶ１を示す（１，０，０）は、インバーター１のスイッチング素子ＳＷ１，ＳＷ５，ＳＷ６がＯＮ状態で、スイッチング素子ＳＷ２，ＳＷ３，ＳＷ４がＯＦＦ状態であることを示している。すなわちＵ相、Ｖ相、Ｗ相の各相の、上アーム側のスイッチング素子がＯＮ状態で下アーム側のスイッチング素子がＯＦＦ状態のときを“１”、上アーム側のスイッチング素子がＯＦＦ状態で下アーム側のスイッチング素子がＯＮ状態のときを“０”と順に表記してある。したがって、基本電圧ベクトルＶ２を示す（１，１，０）は、インバーター１のスイッチング素子ＳＷ１，ＳＷ２，ＳＷ６がＯＮ状態で、スイッチング素子ＳＷ３，ＳＷ４，ＳＷ５がＯＦＦ状態であることを示している。 In FIG. 3, the basic voltage vectors V1 to V6 correspond to the switching states of the switching elements SW1 to SW6 of the inverter 1. (1, 0, 0) indicating the basic voltage vector V1 indicates that the switching elements SW1, SW5, and SW6 of the inverter 1 are in the ON state and the switching elements SW2, SW3, and SW4 are in the OFF state. That is, “1” when the upper arm side switching element is ON and the lower arm side switching element is OFF in each of the U phase, V phase, and W phase, and the upper arm side switching element is OFF. When the switching element on the lower arm side is in the ON state, “0” is shown in order. Therefore, (1, 1, 0) indicating the basic voltage vector V2 indicates that the switching elements SW1, SW2, and SW6 of the inverter 1 are in the ON state and the switching elements SW3, SW4, and SW5 are in the OFF state.
　したがって、図３において、出力電圧ベクトルＶｓはセクター０にあり、出力電圧ベクトルＶｓを隣接する基本電圧ベクトルであるＶ１およびＶ２にそれぞれ投影した１／２ＰＷＭ周期当たりの出力時間がＴｉおよびＴｋとなる。したがって、図３の状況のときには、Ｖｓ演算手段７は、ＳＣＴ_Ｖｓ＝０と、隣接する基本電圧ベクトルの１／２ＰＷＭ周期当たりの出力時間Ｔｉ、Ｔｋを算出して出力する。出力電圧ベクトルＶｓが存在するセクターが変化しても同様である。 Therefore, in FIG. 3, the output voltage vector Vs is in the sector 0, and the output times per 1/2 PWM period obtained by projecting the output voltage vector Vs onto the adjacent basic voltage vectors V1 and V2, respectively, are Ti and Tk. Therefore, in the situation of FIG. 3, the Vs calculation means 7 calculates and outputs SCT_Vs = 0 and output times Ti and Tk per 1/2 PWM period of the adjacent basic voltage vector. The same applies even if the sector in which the output voltage vector Vs exists changes.
　キャリア周波数設定手段８は、キャリア信号の予め設定された周波数であるキャリア周波数ｆｃを出力時間補正制御実行判定手段９および駆動信号生成手段１２に出力する。 The carrier frequency setting means 8 outputs the carrier frequency fc, which is a preset frequency of the carrier signal, to the output time correction control execution determination means 9 and the drive signal generation means 12.
　出力時間補正制御実行判定手段９は、モーター回転数算出手段５が算出したモーター回転数ｆと、Ｖｓ演算手段７で算出されたＴｉおよびＴｋと、予め設定されたキャリア周波数ｆｃと、から出力時間補正制御の実行の有無を判定する。 The output time correction control execution determination means 9 outputs the output time from the motor rotation speed f calculated by the motor rotation speed calculation means 5, Ti and Tk calculated by the Vs calculation means 7, and a preset carrier frequency fc. It is determined whether or not correction control is executed.
　Ｖｓ’およびＶｓ”演算手段１０は、Ｖｓ演算手段７で算出されたＴｉおよびＴｋのいずれかが直流電流を電流検出手段３が検出するのに必要な最小の出力時間である必要出力時間ＴＭＩＮより小さい場合に、１ＰＷＭ周期中に直流母線電流から２相分の相電流情報を検出することができるように出力時間補正制御を実行する。Ｖｓ’およびＶｓ”演算手段１０は、出力時間補正制御実行判定手段９を経由してＶｓ演算手段７から与えられたセクターＳＣＴ_Ｖｓ、出力時間ＴｉおよびＴｋに基づいて出力時間補正制御を実行する。 The Vs ′ and Vs ″ calculation means 10 is based on the required output time TMIN which is the minimum output time required for the current detection means 3 to detect any of the Ti and Tk calculated by the Vs calculation means 7. When it is small, the output time correction control is executed so that phase current information for two phases can be detected from the DC bus current during one PWM cycle. Vs ′ and Vs ″ calculating means 10 executes the output time correction control. The output time correction control is executed based on the sector SCT_Vs, the output times Ti and Tk given from the Vs calculating means 7 via the determination means 9.
　すなわち、Ｖｓ’およびＶｓ”演算手段１０は、出力電圧ベクトルＶｓ’およびＶｓ”の平均ベクトルが出力電圧ベクトルＶｓに等しく、かつ出力電圧ベクトルＶｓ’に隣接する大きさが非零の２つの基本電圧ベクトルの１／２ＰＷＭ周期当たりの出力時間の各々が予め定められている必要出力時間ＴＭＩＮ以上となるように出力電圧ベクトルＶｓ’およびＶｓ”を演算する。出力電圧ベクトルＶｓ’はＰＷＭ周期の前半に適用され、出力電圧ベクトルＶｓ”はＰＷＭ周期の後半に適用される。具体的には、Ｖｓ’およびＶｓ”演算手段１０は、以上の条件を満たすような出力電圧ベクトルＶｓ’のセクターＳＣＴ_Ｖｓ’と、出力電圧ベクトルＶｓ’に隣接する基本電圧ベクトルの１／２ＰＷＭ周期当たりの出力時間Ｔｉ’およびＴｋ’と、出力電圧ベクトルＶｓ”のセクターＳＣＴ_Ｖｓ”と、出力電圧ベクトルＶｓ”に隣接する基本電圧ベクトルの１／２ＰＷＭ周期当たりの出力時間Ｔｉ”およびＴｋ”を算出する。Ｖｓ’およびＶｓ”演算手段１０の詳細な演算方法の具体例は、特許文献１に記載の手法といった公知の手法を用いてかまわない。 That is, Vs ′ and Vs ″ calculation means 10 calculates two basic voltages whose average vectors of output voltage vectors Vs ′ and Vs ″ are equal to output voltage vector Vs and whose magnitude is adjacent to output voltage vector Vs ′. The output voltage vectors Vs ′ and Vs ″ are calculated so that each of the output times per 1/2 PWM period of the vector is equal to or greater than a predetermined required output time TMIN. The output voltage vector Vs ′ is calculated in the first half of the PWM period. The output voltage vector Vs ″ is applied in the second half of the PWM period. Specifically, the Vs ′ and Vs ″ calculating means 10 per sector SCT_Vs ′ of the output voltage vector Vs ′ satisfying the above conditions and the ½ PWM period of the basic voltage vector adjacent to the output voltage vector Vs ′. Output times Ti ′ and Tk ′, sector SCT_Vs ″ of output voltage vector Vs ″, and output times Ti ″ and Tk ″ per ½ PWM period of the basic voltage vector adjacent to output voltage vector Vs ″. A specific example of a detailed calculation method of the Vs ′ and Vs ″ calculation means 10 may be a known method such as the method described in Patent Document 1.
　タイマー値演算手段１１は、出力時間補正制御が実行される場合は、Ｖｓ’およびＶｓ”演算手段１０が算出したセクターＳＣＴ_Ｖｓ’と、出力時間Ｔｉ’およびＴｋ’と、セクターＳＣＴ_Ｖｓ”と、出力時間Ｔｉ”およびＴｋ”と、を満たすように、Ｕ相、Ｖ相、Ｗ相の各相のタイマー値Ｕ＿ＴＩＭ、Ｖ＿ＴＩＭ、Ｗ＿ＴＩＭを算出する。具体的には、ＰＷＭ周期の前半は出力電圧ベクトルＶｓ’となり、ＰＷＭ周期の後半は出力電圧ベクトルＶｓ”となるように、セクターＳＣＴ_Ｖｓ’と、出力時間Ｔｉ’およびＴｋ’と、セクターＳＣＴ_Ｖｓ”と、出力時間Ｔｉ”およびＴｋ”と、に基づいて、各相のタイマー値Ｕ＿ＴＩＭ、Ｖ＿ＴＩＭ、Ｗ＿ＴＩＭをタイマー値演算手段１１が算出する。 When the output time correction control is executed, the timer value calculation means 11 outputs the sector SCT_Vs ′ calculated by the calculation means 10, the output times Ti ′ and Tk ′, the sector SCT_Vs ″, and the output time. Timer values U_TIM, V_TIM, and W_TIM for each of the U phase, V phase, and W phase are calculated so as to satisfy Ti ″ and Tk ″. Specifically, the sector SCT_Vs ′, the output times Ti ′ and Tk ′, and the sector SCT_Vs ″ are set such that the first half of the PWM cycle is the output voltage vector Vs ′ and the second half of the PWM cycle is the output voltage vector Vs ″. Based on the output times Ti ″ and Tk ″, the timer value calculation means 11 calculates the timer values U_TIM, V_TIM, W_TIM of each phase.
　また、出力時間補正制御が実行されない場合は、タイマー値演算手段１１は、出力時間補正制御実行判定手段９を経由してＶｓ演算手段７から与えられたセクターＳＣＴ_Ｖｓ、出力時間ＴｉおよびＴｋを満たすように、各相のタイマー値Ｕ＿ＴＩＭ、Ｖ＿ＴＩＭ、Ｗ＿ＴＩＭを算出する。具体的には、ＰＷＭ周期の前半および後半で共に出力電圧ベクトルＶｓとなるように、セクターＳＣＴ_Ｖｓ、出力時間ＴｉおよびＴｋに基づいて、各相のタイマー値Ｕ＿ＴＩＭ、Ｖ＿ＴＩＭ、Ｗ＿ＴＩＭをタイマー値演算手段１１が算出する。 When the output time correction control is not executed, the timer value calculation unit 11 satisfies the sector SCT_Vs and the output times Ti and Tk given from the Vs calculation unit 7 via the output time correction control execution determination unit 9. In addition, timer values U_TIM, V_TIM, and W_TIM for each phase are calculated. Specifically, the timer value calculation means 11 calculates the timer values U_TIM, V_TIM, W_TIM of each phase based on the sector SCT_Vs and the output times Ti and Tk so that both the first half and the second half of the PWM cycle become the output voltage vector Vs. Is calculated.
　出力時間補正制御の実行の有無にかかわらず、タイマー値演算手段１１による各相のタイマー値Ｕ＿ＴＩＭ、Ｖ＿ＴＩＭ、Ｗ＿ＴＩＭの算出の具体的な方法は、特許文献１に記載の手法といった公知の手法を用いてかまわない。 Regardless of whether or not the output time correction control is executed, a specific method for calculating the timer values U_TIM, V_TIM, and W_TIM of each phase by the timer value calculation unit 11 is a known method such as the method described in Patent Document 1. It doesn't matter.
　駆動信号生成手段１２は、キャリア周波数ｆｃのキャリア信号とタイマー値演算手段１１が算出した各相のタイマー値Ｕ＿ＴＩＭ、Ｖ＿ＴＩＭ、Ｗ＿ＴＩＭとを比較することにより、ＰＷＭ駆動信号を生成してインバーター１に出力する。各相のタイマー値Ｕ＿ＴＩＭ、Ｖ＿ＴＩＭ、Ｗ＿ＴＩＭを用いたＰＷＭ駆動信号の生成手法の具体例は、特許文献１に記載の手法といった公知の手法を用いてかまわない。 The drive signal generation unit 12 generates a PWM drive signal by comparing the carrier signal of the carrier frequency fc and the timer values U_TIM, V_TIM, and W_TIM calculated by the timer value calculation unit 11 and outputs them to the inverter 1. To do. A specific example of a method for generating a PWM drive signal using the timer values U_TIM, V_TIM, and W_TIM of each phase may be a known method such as the method described in Patent Document 1.
　図４は、実施の形態１にかかる出力時間補正制御実行判定手段９の動作を説明するフローチャートである。 FIG. 4 is a flowchart for explaining the operation of the output time correction control execution determination unit 9 according to the first embodiment.
　まず、Ｖｓ演算手段７が算出した出力時間ＴｉおよびＴｋと、直流電流を検出するのが可能となるために必要となる最小の出力時間である必要出力時間ＴＭＩＮおよびＴＭＩＮの半分の時間であるＴＭＩＮ／２との大小関係に基づいて、出力時間補正制御実行判定手段９は、以下のようにｃａｓｅ０～ｃａｓｅ１０の１１通りの場合に場合分けを実行する（ステップＳ１）。 First, the output times Ti and Tk calculated by the Vs calculating means 7 and the required output times TMIN and TMIN which are half the minimum output times required for detecting the direct current are obtained. Based on the magnitude relationship with / 2, the output time correction control execution determination means 9 executes case classification in 11 cases of case 0 to case 10 as follows (step S1).
　ｃａｓｅ０：　Ｔｉ≧ＴＭＩＮ、Ｔｋ≧ＴＭＩＮ
　ｃａｓｅ１：　Ｔｉ≧ＴＭＩＮ、ＴＭＩＮ／２≦Ｔｋ＜ＴＭＩＮ
　ｃａｓｅ２：　Ｔｉ≧ＴＭＩＮ、Ｔｋ＜ＴＭＩＮ／２
　ｃａｓｅ３：　ＴＭＩＮ／２≦Ｔｉ＜ＴＭＩＮ、Ｔｋ≧ＴＭＩＮ
　ｃａｓｅ４：　ＴＭＩＮ／２≦Ｔｉ＜ＴＭＩＮ、ＴＭＩＮ／２≦Ｔｋ＜ＴＭＩＮ
　ｃａｓｅ５：　ＴＭＩＮ／２≦Ｔｉ＜ＴＭＩＮ、Ｔｋ＜ＴＭＩＮ／２
　　　　　　　　且つ（Ｔｉ＋Ｔｋ≧ＴＭＩＮ）
　ｃａｓｅ６：　ＴＭＩＮ／２≦Ｔｉ＜ＴＭＩＮ、Ｔｋ＜ＴＭＩＮ／２
　　　　　　　　且つ（Ｔｉ＋Ｔｋ＜ＴＭＩＮ）
　ｃａｓｅ７：　Ｔｉ＜ＴＭＩＮ／２、Ｔｋ≧ＴＭＩＮ
　ｃａｓｅ８：　Ｔｉ＜ＴＭＩＮ／２、ＴＭＩＮ／２≦Ｔｋ＜ＴＭＩＮ
　　　　　　　　且つ（Ｔｉ＋Ｔｋ≧ＴＭＩＮ）
　ｃａｓｅ９：　Ｔｉ＜ＴＭＩＮ／２、ＴＭＩＮ／２≦Ｔｋ＜ＴＭＩＮ
　　　　　　　　且つ（Ｔｉ＋Ｔｋ＜ＴＭＩＮ）
　ｃａｓｅ１０：　Ｔｉ＜ＴＭＩＮ／２、Ｔｋ＜ＴＭＩＮ／２ case0: Ti ≧ TMIN, Tk ≧ TMIN
case1: Ti ≧ TMIN, TMIN / 2 ≦ Tk <TMIN
case2: Ti ≧ TMIN, Tk <TMIN / 2
case3: TMIN / 2 ≦ Ti <TMIN, Tk ≧ TMIN
case4: TMIN / 2 ≦ Ti <TMIN, TMIN / 2 ≦ Tk <TMIN
case5: TMIN / 2 ≦ Ti <TMIN, Tk <TMIN / 2
And (Ti + Tk ≧ TMIN)
case6: TMIN / 2 ≦ Ti <TMIN, Tk <TMIN / 2
And (Ti + Tk <TMIN)
case7: Ti <TMIN / 2, Tk ≧ TMIN
case8: Ti <TMIN / 2, TMIN / 2 ≦ Tk <TMIN
And (Ti + Tk ≧ TMIN)
case 9: Ti <TMIN / 2, TMIN / 2 ≦ Tk <TMIN
And (Ti + Tk <TMIN)
case 10: Ti <TMIN / 2, Tk <TMIN / 2
　次に、出力時間補正制御実行判定手段９は、出力時間ＴｉおよびＴｋがｃａｓｅ０に該当するか否かを判定する（ステップＳ２）。出力時間ＴｉおよびＴｋがｃａｓｅ０に該当する場合（ステップＳ２：Ｙｅｓ）、出力時間補正制御実行判定手段９は、二相分の電流検出が可能であると判断し、インバーター制御装置１００は出力時間補正制御を実行しない（ステップＳ５）。すなわち、タイマー値演算手段１１は、Ｖｓ演算手段７が算出したセクターＳＣＴ_Ｖｓ、出力時間ＴｉおよびＴｋを満たすように、各相のタイマー値Ｕ＿ＴＩＭ、Ｖ＿ＴＩＭ、Ｗ＿ＴＩＭをタイマー値演算手段１１が算出する。出力時間ＴｉおよびＴｋがｃａｓｅ０に該当しない場合（ステップＳ２：Ｎｏ）、出力時間補正制御実行判定手段９は、ステップＳ３に進む。 Next, the output time correction control execution determination means 9 determines whether or not the output times Ti and Tk correspond to case 0 (step S2). When the output times Ti and Tk correspond to case 0 (step S2: Yes), the output time correction control execution determination unit 9 determines that the current for two phases can be detected, and the inverter control device 100 corrects the output time. Control is not executed (step S5). That is, the timer value calculator 11 calculates the timer values U_TIM, V_TIM, and W_TIM of each phase so that the sector SCT_Vs and the output times Ti and Tk calculated by the Vs calculator 7 are satisfied. When the output times Ti and Tk do not correspond to case 0 (step S2: No), the output time correction control execution determination unit 9 proceeds to step S3.
　ｃａｓｅ１～ｃａｓｅ１０の中でｃａｓｅ１、ｃａｓｅ２、ｃａｓｅ３およびｃａｓｅ７の場合は、１／２ＰＷＭ周期において変調率によらず一相しか電流検出することができない状態になっている。ステップＳ３では、ｃａｓｅ１、ｃａｓｅ２、ｃａｓｅ３およびｃａｓｅ７が存在する条件を満たすキャリア周波数ｆｃとモーター回転数ｆとの組み合わせであるか否かを出力時間補正制御実行判定手段９が判定する。 In cases 1 to 10, case 1, case 2, case 3, and case 7 are in a state where only one phase of current can be detected regardless of the modulation rate in the 1/2 PWM period. In step S3, the output time correction control execution determination unit 9 determines whether or not the combination of the carrier frequency fc and the motor rotation speed f satisfying the conditions in which case1, case2, case3, and case7 exist.
　１／２ＰＷＭ周期において、変調率によらず一相しか電流検出することができないｃａｓｅ１、ｃａｓｅ２、ｃａｓｅ３およびｃａｓｅ７といった状態が存在するキャリア周波数ｆｃとモーター回転数ｆとの組み合わせの具体的な例を以下に説明する。 A specific example of a combination of the carrier frequency fc and the motor rotation speed f in which a state such as case1, case2, case3, and case7 in which only one phase current can be detected regardless of the modulation rate in the 1/2 PWM period is as follows. Explained.
　具体的な例としては、インバーター１が図２に示したように三相インバーターの場合でモーター２の極数が６の場合、キャリア周波数ｆｃ＝４．５ｋＨｚとモーター回転数ｆ＝１２５ｒｐｓとの組み合わせが挙げられる。 As a specific example, when the inverter 1 is a three-phase inverter as shown in FIG. 2 and the number of poles of the motor 2 is 6, a combination of the carrier frequency fc = 4.5 kHz and the motor rotation speed f = 125 rps. Is mentioned.
　図５は、実施の形態１にかかるモーター電流とキャリア信号との関係を示す図である。図５は、三相インバーターに接続されたモーター２の極数が６の場合でキャリア周波数ｆｃ＝４．５ｋＨｚで、モーター回転数ｆ＝１２５ｒｐｓである時のモーター電流とキャリア信号との関係を示している。図６は、図５の場合における出力電圧ベクトルのベクトル図である。図６には、電気角（３６０÷インバーター相数÷２）ｄｅｇ＝（３６０÷３÷２）ｄｅｇ＝６０ｄｅｇ毎の位相方向が示されている。 FIG. 5 is a diagram illustrating a relationship between the motor current and the carrier signal according to the first embodiment. FIG. 5 shows the relationship between the motor current and the carrier signal when the number of poles of the motor 2 connected to the three-phase inverter is 6, the carrier frequency fc = 4.5 kHz, and the motor rotation speed f = 125 rps. ing. FIG. 6 is a vector diagram of an output voltage vector in the case of FIG. FIG. 6 shows the phase direction every electrical angle (360 ÷ inverter phase number / 2) deg = (360 ÷ 3/2) deg = 60 deg.
　電気角１周期辺りに含まれるキャリア周期の数は、ｆｃ÷（ｆ×極対数）で求まる。キャリア周期は、キャリア信号の周期である。モーター２の極数が６の場合は、極対数＝３となる。したがって、ｆｃ÷（ｆ×極対数）＝４５００÷（１２５×３）＝１２となり、この例の場合は、図５に示すように、電気角１周期辺りに１２回分のキャリア周期が含まれる。そして、３６０ｄｅｇ÷１２回＝３０ｄｅｇであるので、図６に示されるように出力電圧ベクトルは、電気角３０ｄｅｇ周期の位相方向に出力される。そのため、１２回のキャリア周期の内６回が電気角６０ｄｅｇ周期の位相方向に電圧を出力する。三相インバーターの場合においては、電気角６０ｄｅｇ周期の位相方向に電圧を出力させる場合、１／２ＰＷＭ周期において、一相分しか電圧を出力させない状態となるため、電流検出手段３が電流検出をする際には、一相分の電流しか検出することができない。 The number of carrier periods included in one electrical angle period is obtained by fc ÷ (f × number of pole pairs). The carrier period is the period of the carrier signal. When the number of poles of the motor 2 is 6, the number of pole pairs is 3. Accordingly, fc ÷ (f × number of pole pairs) = 4500 ÷ (125 × 3) = 12, and in this example, as shown in FIG. 5, 12 carrier cycles are included per one electrical angle cycle. Since 360 deg ÷ 12 times = 30 deg, the output voltage vector is output in the phase direction of the electrical angle of 30 deg as shown in FIG. Therefore, 6 out of 12 carrier cycles output a voltage in the phase direction of an electrical angle of 60 deg. In the case of a three-phase inverter, when a voltage is output in the phase direction of an electrical angle of 60 deg, the voltage is output only for one phase in the ½ PWM cycle, so that the current detection means 3 detects the current. In this case, only the current for one phase can be detected.
　１／２ＰＷＭ周期において変調率によらず一相しか電流検出することができない状態が存在する条件を満たすキャリア周波数ｆｃとモーター回転数ｆとの組み合わせの例として、三相インバーターの場合で上記組み合わせを挙げた。しかし、条件を満たすキャリア周波数ｆｃとモーター回転数ｆとの組み合わせは、キャリア周期が電気角である６０ｄｅｇの公約数に同期するような組み合わせであれば良い。 As an example of the combination of the carrier frequency fc and the motor rotational speed f that satisfy the condition that there is a state in which only one phase of current can be detected regardless of the modulation rate in the 1/2 PWM cycle, the above combination is applied in the case of a three-phase inverter. Listed. However, the combination of the carrier frequency fc that satisfies the condition and the motor rotation speed f may be any combination that synchronizes with the common divisor of 60 deg whose carrier cycle is an electrical angle.
　したがって、インバーター１が三相インバーターの場合は、上記以外の組合せである、キャリア周波数ｆｃ＝９.０ｋＨｚとモーター回転数ｆ＝１２５ｒｐｓとの組み合わせでもよいし、キャリア周波数ｆｃ＝１３．５ｋＨｚとモーター回転数ｆ＝１５０ｒｐｓとの組み合わせでもかまわない。 Therefore, when the inverter 1 is a three-phase inverter, a combination other than the above, that is, a combination of the carrier frequency fc = 9.0 kHz and the motor rotation speed f = 125 rps, or a carrier frequency fc = 13.5 kHz and the motor rotation is acceptable. A combination with the number f = 150 rps is also acceptable.
　また、インバーター１の相数が３と異なってもかまわない。電気角（３６０÷インバーターの相数÷２）ｄｅｇの公約数にキャリア周期が同期するようなモーター回転数ｆとキャリア周波数ｆｃとの組み合わせであれば、一相しか電流検出することができないｃａｓｅ１、ｃａｓｅ２、ｃａｓｅ３およびｃａｓｅ７のいずれかの状態になり得る。したがって、ステップＳ３では、電気角（３６０÷インバーターの相数÷２）ｄｅｇの公約数にキャリア周期が同期するような条件を満たすモーター回転数ｆとキャリア周波数ｆｃとの組み合わせであるか否かを判定すればよい。 Also, the number of phases of inverter 1 may be different from 3. If the combination of the motor rotation speed f and the carrier frequency fc is such that the carrier period is synchronized with the common divisor of the electrical angle (360 ÷ inverter phase ÷ 2) deg, case 1 can only detect current for one phase. The state can be any of case2, case3, and case7. Therefore, in step S3, it is determined whether or not the motor rotation speed f and the carrier frequency fc satisfy the condition that the carrier period is synchronized with the common divisor of the electrical angle (360 ÷ inverter phase ÷ 2) deg. What is necessary is just to judge.
　条件を満たすキャリア周波数ｆｃとモーター回転数ｆとの組み合わせではないと出力時間補正制御実行判定手段９が判定した場合（ステップＳ３：Ｎｏ）、インバーター制御装置１００は出力時間補正制御を実行する（ステップＳ６）。すなわち、タイマー値演算手段１１は、Ｖｓ’およびＶｓ”演算手段１０が算出したセクターＳＣＴ_Ｖｓ’と、出力時間Ｔｉ’およびＴｋ’と、セクターＳＣＴ_Ｖｓ”と、出力時間Ｔｉ”およびＴｋ”と、を満たすように、Ｕ相、Ｖ相、Ｗ相の各相のタイマー値Ｕ＿ＴＩＭ、Ｖ＿ＴＩＭ、Ｗ＿ＴＩＭをタイマー値演算手段１１が算出する。 When the output time correction control execution determination means 9 determines that the combination of the carrier frequency fc and the motor rotation speed f satisfying the conditions is not satisfied (step S3: No), the inverter control device 100 executes the output time correction control (step S3). S6). That is, the timer value calculation unit 11 satisfies the sector SCT_Vs ′ calculated by the Vs ′ and Vs ″ calculation unit 10, the output times Ti ′ and Tk ′, the sector SCT_Vs ″, and the output times Ti ″ and Tk ″. As described above, the timer value calculation means 11 calculates the timer values U_TIM, V_TIM, and W_TIM of the U phase, V phase, and W phase.
　条件を満たすキャリア周波数ｆｃとモーター回転数ｆとの組み合わせであると出力時間補正制御実行判定手段９が判定した場合（ステップＳ３：Ｙｅｓ）、処理はステップＳ４に移行する。 If the output time correction control execution determination unit 9 determines that the combination of the carrier frequency fc and the motor speed f satisfies the conditions (step S3: Yes), the process proceeds to step S4.
　ステップＳ４では、Ｖｓ演算手段７が算出した出力時間ＴｉおよびＴｋが予め定めた条件を満たすか否かを出力時間補正制御実行判定手段９が判定する。予め定めた条件は、１／２ＰＷＭ周期において一相しか電流検出することができない状態であるｃａｓｅ１、ｃａｓｅ２、ｃａｓｅ３およびｃａｓｅ７としてもよいが、出力時間補正制御を実行すると出力電圧の位相が大きく振られてしまって弊害が大きい場合に限定してもよい。具体的には、ステップＳ４における出力時間ＴｉおよびＴｋに対して予め定めた条件を出力時間補正制御を実行すると出力電圧の位相が大きく振られてしまうｃａｓｅ２およびｃａｓｅ７に限定してもよい。このように、ｃａｓｅ１、ｃａｓｅ２、ｃａｓｅ３およびｃａｓｅ７から複数の状態を選択して出力時間ＴｉおよびＴｋに対する予め定めた条件としてよい。 In step S4, the output time correction control execution determination means 9 determines whether or not the output times Ti and Tk calculated by the Vs calculation means 7 satisfy a predetermined condition. The predetermined condition may be case1, case2, case3, and case7 in which only one phase of current can be detected in a 1/2 PWM cycle. However, when the output time correction control is executed, the phase of the output voltage is greatly shaken. It may be limited to the case where the adverse effect is great. Specifically, the predetermined conditions for the output times Ti and Tk in step S4 may be limited to case 2 and case 7 in which the output voltage phase is greatly shaken when the output time correction control is executed. As described above, a plurality of states may be selected from case1, case2, case3, and case7, and the predetermined conditions for the output times Ti and Tk may be set.
　そして、出力時間ＴｉおよびＴｋが予め定めた条件を満たすと、出力時間補正制御実行判定手段９が判定した場合（ステップＳ４：Ｙｅｓ）、インバーター制御装置１００は出力時間補正制御を実行しない（ステップＳ５）。また、出力時間ＴｉおよびＴｋが予め定めた条件を満たさないと、出力時間補正制御実行判定手段９が判定した場合（ステップＳ４：Ｎｏ）、インバーター制御装置１００は出力時間補正制御を実行する（ステップＳ６）。 If the output time correction control execution determination means 9 determines that the output times Ti and Tk satisfy the predetermined conditions (step S4: Yes), the inverter control device 100 does not execute the output time correction control (step S5). ). Further, when the output time correction control execution determining means 9 determines that the output times Ti and Tk do not satisfy the predetermined condition (step S4: No), the inverter control device 100 executes the output time correction control (step S4). S6).
　図７は、実施の形態１にかかるインバーター制御装置１００が予め定めた条件を満たす場合であっても出力時間補正制御を実行したときのＵ相のモーター電流波形を示す図である。図８は、実施の形態１にかかるインバーター制御装置１００が予め定めた条件を満たす場合に出力時間補正制御を実行しなかったときのＵ相のモーター電流波形を示す図である。図７および図８において、横軸は時間で、縦軸はモーター電流である。図７は、インバーター１が三相インバーターで、モーター２の極数が６で、キャリア周波数ｆｃ＝４．５ｋＨｚおよびモーター回転数ｆ＝１２５ｒｐである場合に、インバーター制御装置１００がｃａｓｅ２またはｃａｓｅ７の場合に出力時間補正制御を実行した場合のＵ相のモーター電流波形を示している。すなわち、図７は、図４のステップＳ４において、出力時間ＴｉおよびＴｋが予め定めた条件を満たすと判定された場合（ステップＳ４：Ｙｅｓ）に、図４とは異なり、インバーター制御装置１００が出力時間補正制御を実行した場合の様子を示している。これに対して、図８は、図７と同じ条件でｃａｓｅ２またはｃａｓｅ７の場合（ステップＳ４：Ｙｅｓ）に、図４のフローチャートに従って、インバーター制御装置１００が出力時間補正制御を実行しなかった場合（ステップＳ５）のＵ相のモーター電流波形を示している。 FIG. 7 is a diagram illustrating a U-phase motor current waveform when the output time correction control is executed even when the inverter control device 100 according to the first embodiment satisfies a predetermined condition. FIG. 8 is a diagram illustrating a U-phase motor current waveform when the output time correction control is not executed when the inverter control device 100 according to the first embodiment satisfies a predetermined condition. 7 and 8, the horizontal axis is time, and the vertical axis is motor current. FIG. 7 shows a case where the inverter 1 is a three-phase inverter, the number of poles of the motor 2 is 6, the carrier frequency fc = 4.5 kHz and the motor speed f = 125 rp, and the inverter control device 100 is case 2 or case 7. Fig. 5 shows a U-phase motor current waveform when the output time correction control is executed. That is, FIG. 7 differs from FIG. 4 in the case where it is determined in step S4 of FIG. 4 that the output times Ti and Tk satisfy predetermined conditions (step S4: Yes). The situation when time correction control is executed is shown. On the other hand, FIG. 8 shows a case where the inverter control device 100 does not execute the output time correction control according to the flowchart of FIG. 4 in the case 2 or case 7 (step S4: Yes) under the same conditions as FIG. The U-phase motor current waveform in step S5) is shown.
　図７では、電流の脈動が見られ、電流脈動による効率の悪化、脈動音、過電流保護によるユニット停止といった問題を引き起こす可能性がある。これに対して、図８では、ｃａｓｅ２またはｃａｓｅ７の場合において、インバーター制御装置１００が出力時間補正制御を実行しないことにより、電流の脈動が改善されている。 In FIG. 7, pulsation of current is observed, which may cause problems such as deterioration of efficiency due to current pulsation, pulsation noise, and unit stop due to overcurrent protection. On the other hand, in FIG. 8, in the case 2 or case 7, the pulsation of the current is improved by the inverter control device 100 not executing the output time correction control.
　インバーター１が三相インバーターで、モーター２の極数が６で、キャリア周波数ｆｃ＝４．５ｋＨｚおよびモーター回転数ｆ＝１２５ｒｐである場合は、電気角１周期辺りに電流検出する合計回数の１２回の内、６回が一相分しか電流を検出できない状態である。その場合の全てにおいて、出力時間に対して補正制御を実行してしまうと、電圧の位相の振れが大きくなって、制御不安定になる可能性がある。 When the inverter 1 is a three-phase inverter, the number of poles of the motor 2 is 6, the carrier frequency fc = 4.5 kHz, and the motor rotation speed f = 125 rp, the total number of times of current detection per one electrical angle cycle is 12 times. Among these, six times is a state in which current can be detected only for one phase. In all of these cases, if correction control is executed for the output time, the voltage phase may increase and control may become unstable.
　以上説明したように、実施の形態１にかかるインバーター制御装置１００は、１／２ＰＷＭ周期において変調率によらず一相しか電流検出することができない状態が存在する条件を満たすキャリア周波数ｆｃとモーター回転数ｆとの組み合わせとなる場合は、出力時間の補正を行わないことで制御不安定を抑制することができる。さらに、実施の形態１にかかるインバーター制御装置１００は、上記条件を満たすキャリア周波数ｆｃとモーター回転数ｆとの組み合わせとなる場合であって、出力時間ＴｉおよびＴｋがさらに予め定めた条件を満たす場合に、出力時間の補正を行わないようにしてもよい。これにより、キャリア周波数ｆｃとモーター回転数ｆとの組み合わせによらず、出力電圧の位相の振れによる制御不安定を抑制して安定したインバーター制御が可能となる。したがって、制御不安定によるモーター電流の脈動によって引き起こされる可能性がある効率の悪化、脈動音、過電流保護によるユニット停止といった問題を防ぐことが可能となる。 As described above, the inverter control device 100 according to the first embodiment has the carrier frequency fc and the motor rotation that satisfy the condition that the current can be detected only in one phase regardless of the modulation rate in the 1/2 PWM period. In the case of a combination with the number f, control instability can be suppressed by not correcting the output time. Furthermore, the inverter control device 100 according to the first embodiment is a combination of the carrier frequency fc and the motor rotation speed f that satisfy the above conditions, and the output times Ti and Tk satisfy further predetermined conditions. In addition, the output time may not be corrected. Thereby, regardless of the combination of the carrier frequency fc and the motor rotation speed f, it is possible to suppress the control instability due to the fluctuation of the phase of the output voltage and perform stable inverter control. Therefore, it is possible to prevent problems such as deterioration in efficiency that may be caused by pulsation of the motor current due to unstable control, pulsation noise, and unit stop due to overcurrent protection.
　実施の形態１にかかるインバーター制御装置１００を搭載する装置の例は、空気調和機または冷蔵庫である。これらに搭載される圧縮機モーターまたはファンモーターを駆動させるインバーター制御基板をインバーター制御装置１００が制御することができる。 An example of a device on which the inverter control device 100 according to the first embodiment is mounted is an air conditioner or a refrigerator. The inverter control device 100 can control an inverter control board that drives a compressor motor or a fan motor mounted thereon.
　空気調和機または冷蔵庫にインバーター制御装置１００を搭載させることにより、運転範囲の拡大、動作品質の向上、電流脈動による圧縮機モーターまたはファンモーターの音または振動の防止が可能となり、高能力で品質の高い空気調和機または冷蔵庫を実現することができる。 By installing the inverter control device 100 in an air conditioner or refrigerator, it is possible to expand the operating range, improve the operation quality, and prevent the noise or vibration of the compressor motor or fan motor due to current pulsation. A high air conditioner or refrigerator can be realized.
　インバーター制御装置１００は、具体的にはマイクロコンピュータなどにより実現される。図９は、実施の形態１にかかるマイクロコンピュータ２００の構成を示すブロック図である。インバーター制御装置１００の各手段の機能は、図９に示すような構成のマイクロコンピュータ２００で実現される。マイクロコンピュータ２００は、演算および制御を実行するＣＰＵ（Central　Processing　Unit）２０１と、ＣＰＵ２０１がワークエリアに用いるＲＡＭ（Random　Access　Memory）２０２と、プログラムおよびデータを記憶するＲＯＭ（Read　Only　Memory）２０３と、外部と信号をやりとりするハードウェアであるＩ／Ｏ（Input／Output）２０４と、クロックを生成する発振子を含む周辺装置２０５と、を備える。インバーター制御装置１００が行う上記で説明したインバーター制御方法は、ＲＯＭ２０３に記憶されるプログラムをＣＰＵ２０１が実行することにより実現される。 The inverter control device 100 is specifically realized by a microcomputer or the like. FIG. 9 is a block diagram of the configuration of the microcomputer 200 according to the first embodiment. The function of each means of the inverter control device 100 is realized by the microcomputer 200 having the configuration as shown in FIG. The microcomputer 200 includes a CPU (Central Processing Unit) 201 that executes calculation and control, a RAM (Random Access Memory) 202 that the CPU 201 uses as a work area, a ROM (Read Only Memory) 203 that stores programs and data, It includes an I / O (Input / Output) 204 that is hardware for exchanging signals with the outside, and a peripheral device 205 including an oscillator that generates a clock. The inverter control method described above performed by the inverter control device 100 is realized by the CPU 201 executing a program stored in the ROM 203.
　以上の実施の形態に示した構成は、本発明の内容の一例を示すものであり、別の公知の技術と組み合わせることも可能であるし、本発明の要旨を逸脱しない範囲で、構成の一部を省略、変更することも可能である。 The configuration described in the above embodiment shows an example of the contents of the present invention, and can be combined with another known technique, and can be combined with other configurations without departing from the gist of the present invention. It is also possible to omit or change the part.
　１　インバーター、２　モーター、３　電流検出手段、４　相電流算出手段、５　モーター回転数算出手段、６　γ－δ軸電圧演算手段、７　Ｖｓ演算手段、８　キャリア周波数設定手段、９　出力時間補正制御実行判定手段、１０　Ｖｓ’およびＶｓ”演算手段、１１　タイマー値演算手段、１２　駆動信号生成手段、１３　直流母線、１４　電源、１００　インバーター制御装置、１０１，１０２，１０３　端子、２００　マイクロコンピュータ、２０１　ＣＰＵ、２０２　ＲＡＭ、２０３　ＲＯＭ、２０４　Ｉ／Ｏ、２０５　周辺装置。 1 inverter, 2 motor, 3 current detection means, 4 phase current calculation means, 5 motor rotation speed calculation means, 6 γ-δ axis voltage calculation means, 7 Vs calculation means, 8 carrier frequency setting means, 9 output time correction control execution Determination means, 10 Vs ′ and Vs ”calculation means, 11 timer value calculation means, 12 drive signal generation means, 13 DC bus, 14 power supply, 100 inverter control device, 101, 102, 103 terminal, 200 microcomputer, 201 CPU, 202 RAM, 203 ROM, 204 I / O, 205 peripheral devices.

Claims (4)

  1. 　モーターを駆動するインバーターをキャリア信号および各相のタイマー値に基づいて制御するインバーター制御装置において、
    　直流電力を前記インバーターに供給する直流母線から検出された直流電流から前記各相の交流電流を算出する相電流算出手段と、
    　前記各相の交流電流からモーター回転数を算出するモーター回転数算出手段と、
    　前記各相の交流電流から、前記モーターの固定子上に想定した回転座標系であるγ軸およびδ軸の電圧指令値と、前記回転座標系における位相とを算出するγ－δ軸電圧演算手段と、
    　前記電圧指令値および前記位相から、出力電圧ベクトルＶｓのセクターと前記出力電圧ベクトルＶｓに隣接する大きさが非零の２つの基本電圧ベクトルのパルス幅変調周期の半分当たりの出力時間ＴｉおよびＴｋを算出するＶｓ演算手段と、
    　出力電圧ベクトルＶｓ’およびＶｓ”の平均ベクトルが出力電圧ベクトルＶｓに等しく、かつ出力電圧ベクトルＶｓ’に隣接する２つの前記基本電圧ベクトルのパルス幅変調周期の半分当たりの出力時間の各々が必要出力時間以上となるように出力電圧ベクトルＶｓ’およびＶｓ”を算出するＶｓ’およびＶｓ”演算手段と、
    　前記キャリア信号の周波数と、前記モーター回転数と、出力時間ＴｉおよびＴｋと、に基づいて、出力時間補正制御の実行の有無を判定する出力時間補正制御実行判定手段と、
    　前記出力時間補正制御実行判定手段が出力時間補正制御を実行すると判定した場合は、パルス幅変調周期の前半は出力電圧ベクトルＶｓ’となり、パルス幅変調周期の後半は出力電圧ベクトルＶｓ”となるように各相の前記タイマー値を求め、前記出力時間補正制御実行判定手段が出力時間補正制御を実行しないと判定した場合は、パルス幅変調周期の前半および後半で共に出力電圧ベクトルＶｓとなるように各相の前記タイマー値を求めるタイマー値演算手段と
    　を備える
    　ことを特徴とするインバーター制御装置。     In the inverter control device that controls the inverter that drives the motor based on the carrier signal and the timer value of each phase,
    Phase current calculation means for calculating an AC current of each phase from a DC current detected from a DC bus that supplies DC power to the inverter;
    Motor rotation number calculating means for calculating the motor rotation number from the alternating current of each phase;
    Γ-δ-axis voltage calculation means for calculating voltage command values for the γ-axis and δ-axis, which are rotational coordinate systems assumed on the stator of the motor, and a phase in the rotational coordinate system from the alternating current of each phase When,
    From the voltage command value and the phase, output times Ti and Tk per half of the pulse width modulation period of the sector of the output voltage vector Vs and the two non-zero magnitude adjacent to the output voltage vector Vs. Vs calculating means for calculating;
    The average vector of the output voltage vectors Vs ′ and Vs ″ is equal to the output voltage vector Vs, and each of the output times per half of the pulse width modulation period of the two basic voltage vectors adjacent to the output voltage vector Vs ′ is required. Vs ′ and Vs ″ calculating means for calculating the output voltage vectors Vs ′ and Vs ″ so as to be equal to or greater than time;
    Output time correction control execution determination means for determining whether or not to execute output time correction control based on the frequency of the carrier signal, the motor rotation speed, and the output times Ti and Tk;
    When the output time correction control execution determination means determines that the output time correction control is to be executed, the first half of the pulse width modulation period is the output voltage vector Vs ′, and the second half of the pulse width modulation period is the output voltage vector Vs ″. When the timer value of each phase is obtained and the output time correction control execution determination means determines that the output time correction control is not executed, the output voltage vector Vs is set to both in the first half and the second half of the pulse width modulation period. Timer value calculation means for obtaining the timer value of each phase. An inverter control device comprising:
  2. 　前記出力時間補正制御実行判定手段は、前記モーター回転数と前記周波数との組み合わせが電気角（３６０÷前記インバーターの相数÷２）ｄｅｇの公約数に前記キャリア信号の周期が同期するような条件を満たし、出力時間ＴｉおよびＴｋが予め定めた条件を満たす場合に、出力時間補正制御を実行しないと判定する
    　ことを特徴とする請求項１に記載のインバーター制御装置。     The output time correction control execution determination means is configured so that a combination of the motor rotation speed and the frequency is synchronized with a common divisor of an electrical angle (360 ÷ number of phases of the inverter ÷ 2) deg. And the output times Ti and Tk satisfy a predetermined condition, it is determined that the output time correction control is not executed. The inverter control device according to claim 1, wherein:
  3. 　前記必要出力時間は、前記直流電流を検出するのに必要な最小の出力時間である
    　ことを特徴とする請求項１または２に記載のインバーター制御装置。     The inverter control device according to claim 1, wherein the necessary output time is a minimum output time necessary for detecting the direct current.
  4. 　モーターを駆動するインバーターをキャリア信号および各相のタイマー値に基づいて制御するインバーター制御方法において、
    　直流電力を前記インバーターに供給する直流母線から検出された直流電流から前記各相の交流電流を算出するステップと、
    　前記各相の交流電流からモーター回転数を算出するステップと、
    　前記各相の交流電流から、前記モーターの固定子上に想定した回転座標系であるγ軸およびδ軸の電圧指令値と、前記回転座標系における位相とを算出するステップと、
    　前記電圧指令値および前記位相から、出力電圧ベクトルＶｓのセクターと前記出力電圧ベクトルＶｓに隣接する大きさが非零の２つの基本電圧ベクトルのパルス幅変調周期の半分当たりの出力時間ＴｉおよびＴｋを算出するステップと、
    　出力電圧ベクトルＶｓ’およびＶｓ”の平均ベクトルが出力電圧ベクトルＶｓに等しく、かつ出力電圧ベクトルＶｓ’に隣接する２つの前記基本電圧ベクトルのパルス幅変調周期の半分当たりの出力時間の各々が必要出力時間以上となるように出力電圧ベクトルＶｓ’およびＶｓ”を算出するステップと、
    　前記キャリア信号の周波数と、前記モーター回転数と、出力時間ＴｉおよびＴｋと、に基づいて、出力時間補正制御の実行の有無を判定するステップと、
    　前記判定するステップが出力時間補正制御を実行すると判定した場合は、パルス幅変調周期の前半は出力電圧ベクトルＶｓ’となり、パルス幅変調周期の後半は出力電圧ベクトルＶｓ”となるように各相の前記タイマー値を求め、前記判定するステップが出力時間補正制御を実行しないと判定した場合は、パルス幅変調周期の前半および後半で共に出力電圧ベクトルＶｓとなるように各相の前記タイマー値を求めるステップと
    　を備える
    　ことを特徴とするインバーター制御方法。     In an inverter control method for controlling an inverter that drives a motor based on a carrier signal and a timer value of each phase,
    Calculating an alternating current of each phase from a direct current detected from a direct current bus that supplies direct current power to the inverter;
    Calculating the motor speed from the alternating current of each phase;
    Calculating the voltage command values of the γ-axis and δ-axis, which are rotational coordinate systems assumed on the stator of the motor, and the phase in the rotational coordinate system from the alternating current of each phase;
    From the voltage command value and the phase, output times Ti and Tk per half of the pulse width modulation period of the sector of the output voltage vector Vs and the two non-zero magnitude adjacent to the output voltage vector Vs. A calculating step;
    The average vector of the output voltage vectors Vs ′ and Vs ″ is equal to the output voltage vector Vs, and each of the output times per half of the pulse width modulation period of the two basic voltage vectors adjacent to the output voltage vector Vs ′ is required. Calculating output voltage vectors Vs ′ and Vs ″ so as to be equal to or greater than time;
    Determining whether or not to perform output time correction control based on the frequency of the carrier signal, the motor rotation speed, and the output times Ti and Tk;
    If it is determined that the determination step is to execute the output time correction control, the first half of the pulse width modulation period is the output voltage vector Vs ′, and the second half of the pulse width modulation period is the output voltage vector Vs ″. The timer value is obtained, and when the judging step judges that the output time correction control is not executed, the timer value of each phase is obtained so that both the first half and the second half of the pulse width modulation period become the output voltage vector Vs. An inverter control method comprising: and a step.
PCT/JP2017/011056 2017-03-17 2017-03-17 Inverter control device and inverter control method WO2018167981A1 (en)

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