WO2018162894A1

WO2018162894A1 - Single photon source

Info

Publication number: WO2018162894A1
Application number: PCT/GB2018/050572
Authority: WO
Inventors: Manus HAYNE; Robert James Young; Peter David HODGSON
Original assignee: Lancaster University Business Enterprises Limited
Priority date: 2017-03-07
Filing date: 2018-03-07
Publication date: 2018-09-13
Also published as: GB201703594D0

Abstract

A photon source is disclosed. The photon source comprises a semiconductor device comprising a first nanostructure and a second nanostructure, and control circuitry operable to apply an electric pulse to the semiconductor device so as to cause the first nanostructure to emit one single photon. The photon source is configured such that when the electric pulse is applied to the semiconductor device, only a single electron or only a single hole is provided to the first nanostructure via the second nanostructure.

Description

Single Photon Source

The present invention relates to a single photon source (SPS), and in particular to a single photon light emitting diode (SPLED).

The first single photon source (SPS) is thought to have been created in 1974 using a transition of calcium atoms (Clauser Phys. Rev. D. 9 (4): 853-860). Since then single photon emission has been observed from many systems including atoms, ions, molecules, colour centres in insulators (e.g. nitrogen vacancy (NV) centre in diamond), colloidal and self-assembled quantum dots (QDs). For a review see for example Buckley et al., "Engineered QD single-photon sources", Rep. Prog. Phys. 75, 126503 (2012). To date no single photon source (SPS) has been commercially adopted.

The Applicants believe that there remains scope for improvements to single photon sources.

According to a first aspect, there is provided a photon source comprising: a semiconductor device comprising a gallium arsenide antimonide nanostructure located within a quantum well, wherein the nanostructure contains more antimony atoms than arsenic atoms; and

control circuitry operable to apply an electric pulse to the semiconductor device so as to cause the nanostructure to emit one single photon.

According to a second aspect, there is provided a method of operating a photon source that comprises a semiconductor device comprising a gallium arsenide antimonide nanostructure located within a quantum well, wherein the nanostructure contains more antimony atoms than arsenic atoms, the method comprising:

applying an electric pulse to the semiconductor device so as to cause the nanostructure to emit one single photon.

Various embodiments are concerned with a photon source comprising a semiconductor device that emits at most one single photon when an electrical pulse is applied to it, i.e. a single photon source. In various embodiments, photon emission is from a gallium arsenide antimonide nanostructure, wherein the nanostructure contains more antimony atoms than arsenic atoms, located within a quantum well. The Applicants have found that the photon source of various embodiments is particularly suited to telecommunications applications.

In particular, the photon source, in various embodiments at least: (i) can be configured to have a small physical size, low power consumption, and low cost of manufacture; (ii) can be configured to be compatible with the transmission band(s) of telecommunications optical fibres (i.e. can be configured to emit photons with a wavelength between 1260 and 1675 nm); (iii) can be configured such that photon output is stimulated electronically; (iv) can be configured such that photon output is deterministic and on-demand (i.e. such that the photon source emits one photon per electrical stimulus); (v) can be configured to have a high output coupling efficiency, e.g. to an optical fibre; (vi) can be configured to operate at ambient (room) temperatures; (vii) has potential for epitaxial integration, e.g. with one or more other semiconductor devices; and (viii) can be configured to have a high repetition (i.e. single photon emission) rate.

To date, no single photon source meets sufficient of these criteria, and so no single photon source has yet been commercially adopted. Some single photon sources based on self-assembled quantum dots are known. However none emit at suitably long wavelengths, other than indium arsenide devices (located in gallium arsenide, indium gallium arsenide or indium phosphide). Such devices operate only at or below temperatures around 90K, which is prohibitively expensive and impractical for commercial devices.

In contrast, and as will be described in more detail below, the Applicants have found that the gallium arsenide antimonide nanostructure of various embodiments can emit photons at wavelengths within the telecommunications optical fibre transmission band while operating at ambient (e.g. room) temperature.

To the skilled person, the choice of gallium antimonide for use in a single photon source will appear unintuitive and unlikely to succeed. Gallium antimonide and gallium arsenide have type-ll (staggered) band alignment, which confines positive charge (holes) in the gallium antimonide and repels negative charge (electrons). This would be expected to reduce charge carrier recombination and hence lower emission intensity.

However the Applicants have realised that a photon source can be made such that positive charge (holes) may accumulate (even at elevated temperatures) in the confining potential provided by the gallium antimonide. This may attract negative charge (electrons) and allow elevated levels of charge carrier (electron and hole) recombination and accordingly single photon emission.

It will be appreciated, therefore, that various embodiments provide an improved single photon source.

The nanostructure may comprise any suitable nanostructure that is configured to be operable as a single photon emitter.

The nanostructure may comprise a nano-scale structure of a first semiconductor material embedded within a second different semiconductor material. The first semiconductor material should (and in various embodiments does) have a different band gap to the second semiconductor material, e.g. so that the nanostructure forms a potential well in which one or both of: (i) one or more electrons; and (ii) one or more holes, may be confined (trapped).

The nanostructure should be (and in various embodiments is) configured such that one or more electrons and/or one or more holes can be (quantum) confined by the nanostructure in at least two, or three, dimensions, i.e. such that the density of (electron and/or hole) states is discrete. The nanostructure should (and in various embodiments does) have at least two, or three, dimensions that are smaller than the de Broglie wavelength of electron(s) and/or hole(s) confined (trapped) by the nanostructure. As such, the nanostructure may (and in various embodiments does) comprise a structure that has at least two, or three, dimensions smaller than 100 nanometres.

In various particular embodiments, the nanostructure comprises a zero- dimensional (0D) nanostructure (i.e. a nanoparticle), such as a quantum dot or a quantum ring.

In various embodiments, the first semiconductor material comprises gallium antimonide (GaSb), and the second semiconductor material comprises gallium arsenide (GaAs). Thus, in various particular embodiments, the gallium arsenide antimonide nanostructure comprises a nano-scale structure of gallium antimonide (GaSb) embedded within gallium arsenide (GaAs).

Gallium antimonide (GaSb) and gallium arsenide (GaAs) have type-ll

(staggered) band alignment, leading to spatial separation of electrons and holes. In particular, positive charge (holes) is confined in the gallium antimonide (GaSb) nanostructure, whereas negative charge (electrons) is repelled from the gallium antimonide (GaSb) nanostructure. This would be expected to reduce charge carrier (electron and hole) recombination and hence lower the single photon emission rate (intensity).

However the Applicants have realised that a photon source can be made such that positive charge (holes) may accumulate (even at elevated temperatures) in the confining potential provided by the gallium antimonide (GaSb) nanostructure. This may then attract negative charge (electrons) and allow elevated levels of charge carrier (electron and hole) recombination. In particular, electrons may be bound to the gallium antimonide (GaSb) nanostructure due to Coulombic attraction to holes confined by the gallium antimonide (GaSb) nanostructure.

The Applicants have found that gallium antimonide nanostructures embedded within gallium arsenide can emit single photons within the

telecommunications transmission band(s) at ambient temperatures and above.

The nanostructure may (and in various embodiments does) comprise one nanostructure of a plurality of such nanostructures.

The nanostructure may comprise, for example, a quantum dot, i.e. a nano- scale particle of the first semiconductor material (e.g. gallium antimonide (GaSb)) embedded within the second semiconductor material (e.g. gallium arsenide

(GaAs)). Quantum dots may be (and in various embodiments are) formed by depositing a few atomic monolayers of gallium antimonide (GaSb) onto gallium arsenide (GaAs). Strain due to the lattice mismatch between gallium antimonide

(GaSb) and gallium arsenide (GaAs) causes the gallium antimonide (GaSb) layer to break up (to self-assemble) into quantum dot nanostructures, e.g. by the Stranski- Krastanov growth mode.

However, according to various particular embodiments, the nanostructure comprises a quantum ring, i.e. a nano-scale ring-shaped (annular) structure of the first semiconductor material (e.g. gallium antimonide (GaSb)) embedded within the second semiconductor material (e.g. gallium arsenide (GaAs)). Quantum rings may be (and in in various embodiments are) formed by depositing gallium arsenide (GaAs) onto gallium antimonide (GaSb) quantum dots under suitable conditions. The gallium antimonide (GaSb) in the central region of a gallium antimonide (GaSb) quantum dot may be partially or entirely replaced with gallium arsenide (GaAs), thereby forming a ring-shaped (annular) nanostructure of gallium antimonide (GaSb) embedded within gallium arsenide (GaAs).

The Applicants have found that, in the case of quantum rings, holes may be confined within the gallium antimonide (GaSb) quantum ring nanostructure, and electrons may be bound to the gallium antimonide (GaSb) nanostructure due to Coulombic attraction to holes confined by the gallium antimonide (GaSb) nanostructure, e.g. as described above. However, in the case of quantum rings, the electron wave-function may be centred in the central gallium arsenide (GaAs) region of the quantum ring. This has the effect of increasing the electron's overlap with the confined hole(s), thereby significantly increasing the likelihood of electron- hole recombination, and significantly increasing the single photon emission rate (brightness) of the gallium antimonide (GaSb) quantum ring (when compared with a gallium antimonide (GaSb) quantum dot).

The use of quantum rings rather than quantum dots also has the effect of relaxing the strain from the incorporation of gallium antimonide into gallium arsenide, thereby reducing the number of defects (dislocations) in the

semiconductor material, and increasing the robustness and accuracy of the fabrication process.

It will accordingly be appreciated that the Applicants have realised that gallium arsenide antimonide self-assembled quantum rings (QRs) constitute a surprising and advantageous system for single photon sources emitting at telecommunications wavelengths operating at room temperature or above.

The nanostructure is located within a quantum well. As described above, since gallium antimonide (GaSb) and gallium arsenide (GaAs) have type II

(staggered) band alignment, electrons are repelled from the gallium antimonide (GaSb) nanostructure (but may be bound to the gallium antimonide (GaSb) nanostructure by Coulombic attraction). Locating the nanostructure in a quantum well has the effect of increasing the density of electrons (and holes) in proximity with the nanostructure (e.g. by effectively forcing electrons closer to the quantum rings), and can accordingly significantly increase the likelihood of electron-hole recombination, and significantly increasing the single photon emission rate

(brightness) of the photon source.

The quantum well may be formed in any suitable manner. In various embodiments, the (first and) second semiconductor material (e.g. gallium arsenide) is surrounded by a third different semiconductor material that may have a different band gap to the (first and) second semiconductor material.

The third semiconductor material may comprise any suitable material. The third semiconductor may have a wider bandgap than the second semiconductor material, and may have type I (straddling) band alignment with the second semiconductor material, e.g. so that when the third semiconductor material surrounds the second semiconductor material, a quantum well is formed. In various embodiments, the third semiconductor material comprises aluminium gallium arsenide (AIGaAs). Thus, the quantum well may be formed of gallium arsenide (GaAs) surrounded by aluminium gallium arsenide (AIGaAs).

Thus, in various embodiments, the semiconductor device comprises a nano- scale structure of gallium antimonide (GaSb) embedded within gallium arsenide (GaAs), wherein the gallium arsenide is at least partially surrounded by aluminium gallium arsenide (AIGaAs).

In various particular embodiments, the semiconductor device comprises a heterostructure comprising (at least) a first layer of aluminium gallium arsenide (AIGaAs), followed by a first layer of gallium arsenide (GaAs), followed by a layer of gallium antimonide (GaSb) nanostructures (e.g. that may be formed by depositing a few atomic monolayers of gallium antimonide (GaSb) onto the first layer of gallium arsenide), followed by a second layer of gallium arsenide (GaAs), followed by a second layer of aluminium gallium arsenide (AIGaAs).

The aluminium content x of one or each of the aluminium gallium arsenide (Al_xGa₍₁_x₎As) layers may be selected as desired. The aluminium content x of one or each of the aluminium gallium arsenide (Al_xGa₍₁_x₎As) layers may be fixed throughout the layer in question or the ratio of aluminium to gallium may vary, e.g. may form a composition-gradient. The aluminium content x of one or each of the aluminium gallium arsenide (Al_xGa₍₁_x₎As) layers may be, for example, around 0.6, but other values may be used.

Each layer may have any suitable thickness. For example, in various embodiments the quantum well has a width (e.g. the combined width of the first layer of gallium arsenide (GaAs), the layer of gallium antimonide (GaSb) nanostructures, and the second layer of gallium arsenide (GaAs)) of around 5-100 nm, or 10-50 nm, e.g. 50 nm, 20 nm or 10 nm. Other widths for the quantum well would be possible.

In various embodiments, the semiconductor device is configured such that photons are preferentially emitted in a single direction from the semiconductor device. The semiconductor device may be configured such that photons are preferentially emitted in an out-of-plane direction, i.e. in a direction out of

(orthogonal to) the plane of the semiconductor heterostructure (chip). This can facilitate a high output coupling efficiency, e.g. to an optical fibre or otherwise. In these embodiments, the photon source may be configured such that photons are preferentially emitted from the top or bottom of the semiconductor device (heterostructure).

The directional photon emission from the semiconductor device may be achieved in any suitable manner. In various embodiments, the semiconductor device comprises at least a first mirror region which may be configured for this purpose.

The first mirror region may comprise a distributed Bragg reflector (DBR), i.e. a structure formed from multiple layers of two or more alternating materials, whereby each material has a different refractive index. The alternating layers may give rise to an optical band gap, e.g. which may be configured so that photons emitted from the nanostructure are at least partially reflected by the first mirror region.

In various embodiments, the first mirror region comprises plural alternate layers of aluminium gallium arsenide (AIGaAs) and gallium arsenide (GaAs). DBR technology is well established for these materials. Aluminium gallium arsenide (AIGaAs) and gallium arsenide (GaAs) have similar lattice constants but significantly different refractive indices, thereby allowing robust formation of high quality distributed Bragg reflectors. Indeed, a particular advantage of the photon source of various embodiments is that it can be straightforwardly integrated with such technology, thereby facilitating straightforward manufacturing, low production cost, and robust devices.

The first mirror region (the first distributed Bragg reflector) may be provided above or beneath the nanostructure in the semiconductor device (heterostructure). The first mirror region (the first distributed Bragg reflector) may be provided

(directly) adjacent to the first or second layer of aluminium gallium arsenide

(AIGaAs), or there may be one or more other layers between the first mirror region (the first distributed Bragg reflector) and the first or second layer of aluminium gallium arsenide (AIGaAs). In various other embodiments, the first or second layer of aluminium gallium arsenide (AIGaAs) comprises one of the multiple aluminium gallium arsenide (AIGaAs) layers of the first distributed Bragg reflector.

The nanostructure may be embedded within an optical cavity such as a micro-cavity. This may have the effect of directing the photon emission from the nanostructure, increasing the output coupling efficiency, and also enhancing the spontaneous emission rate (via the Purcell effect). Any suitable optical cavity may be used. However, in various embodiments, the nanostructure is located within an optical cavity formed by the first mirror region described above and a second mirror region. In these embodiments, the first and second mirror regions may face one another so as to form the optical cavity, and the nanostructure may be located between the first mirror region and the second mirror region.

The second mirror region may comprise a distributed Bragg reflector (DBR), e.g. as described above in relation to the first mirror region.

Thus, in various embodiments, the semiconductor device (heterostructure) comprises first and second distributed Bragg reflectors surrounding (beneath and above) the gallium arsenide antimonide nanostructure.

The second mirror region may comprise plural alternate layers of aluminium gallium arsenide (AIGaAs) and gallium arsenide (GaAs), e.g. as described above in relation to the first mirror region. However, the second mirror region may be less reflective than the first mirror region (or vice versa), e.g. so that photons are preferentially emitted in a single direction. The difference in reflectivity may be achieved in any suitable manner. In various embodiments, the second DBR comprises fewer layers than the first DBR (or vice versa).

The second mirror region (the second distributed Bragg reflector) may be provided (directly) adjacent to the second or first layer of aluminium gallium arsenide (AIGaAs), or there may be one or more other layers between the second mirror region (the second distributed Bragg reflector) and the second or first layer of aluminium gallium arsenide (AIGaAs). In various other embodiments, the second or first layer of aluminium gallium arsenide (AIGaAs) comprises one of the multiple aluminium gallium arsenide (AIGaAs) layers of the second distributed Bragg reflector.

Thus, in various embodiments, the semiconductor device (heterostructure) comprises (at least) plural alternating layers of aluminium gallium arsenide

(AIGaAs) and gallium arsenide (GaAs), followed by the first layer of aluminium gallium arsenide (AIGaAs) as described above or followed by the first layer of gallium arsenide (GaAs) as described above.

Additionally or alternatively, in various embodiments, the semiconductor device (heterostructure) comprises (at least) the second layer of gallium arsenide (GaAs) or the second layer of aluminium gallium arsenide (AIGaAs) as described above followed by plural alternating layers of aluminium gallium arsenide (AIGaAs) and gallium arsenide (GaAs).

The exact number of periods (layers) in each DBR mirror region may be selected as desired. A structure with too few layers may provide too leaky an optical cavity, whereas a structure with too many layers may have reduced emission performance, e.g. due to photon absorption.

In addition to the vertical optical confinement that may be provided by the first and second mirror regions, the semiconductor device may be configured such that light is laterally confined, e.g. within the optical cavity. Additionally or alternatively, the semiconductor device may be configured such that current is laterally confined.

The lateral confinement of current and/or the lateral optical confinement may be achieved in any suitable manner.

In various embodiments, the semiconductor device comprises a mesa or a pillar such as a micropillar. A mesa or pillar may be formed, for example, by suitably etching a semiconductor chip. The mesa or pillar may have any suitable cross-section, such as an elliptical or circular cross-section. The mesa or pillar may have any suitable form, such as an elliptical prism. In this case, the cross-sectional area of the elliptical prism may be constant or may vary, e.g. may taper or diverge.

Thus, in various embodiments, the semiconductor device is formed from a semiconductor heterostructure (chip) that has been etched or otherwise formed into one or more mesa or pillar structures.

Other techniques for lateral confinement of current and/or lateral optical confinement may additionally or alternatively be used.

For example, in various embodiments ion bombardment is used, e.g. to create one or more appropriately positioned electrically insulating regions.

In various other embodiments, oxidisation of gallium aluminium arsenide is used, e.g. to create one or more appropriately positioned oxidised gallium aluminium arsenide regions. In this case, an additional gallium aluminium arsenide layer may be included in the semiconductor heterostructure, e.g. immediately following (above) the second gallium arsenide layer or otherwise, and the lateral edge regions of this layer may be oxidised. The resulting oxide region is electrically insulating and has a very different refractive index to aluminium arsenide, and may therefore be used to provide (and in various embodiments is used to provide) both electrical and optical lateral confinement. Other arrangements would be possible.

The semiconductor device may be in the form of a solid state photo- electronic device, e.g. in the form of a light emitting diode (LED) engineered to output one single photon per electrical stimulus, i.e. a single photon light emitting diode (SPLED).

Thus, the semiconductor device may comprise an active region, i.e. light- emitting region, that may be formed between p-type and n-type regions.

In various embodiments, one or more or each layer of the first mirror region may be p-doped to form the p-type region, and one or more or each layer of the second mirror region may be n-doped to form the n-type region (or vice versa).

In these embodiments, the optical cavity formed between the first and second mirror regions may form the active region. Thus, the gallium arsenide antimonide (GaAsSb) nanostructure and the quantum well (e.g. at least the first layer of gallium arsenide (GaAs), the layer of gallium antimonide (GaSb)

nanostructures, and the second layer of gallium arsenide (GaAs)) may form the active region.

However, it would also be possible for the semiconductor device to comprise doped regions elsewhere, such as beneath or above the first and/or second mirror regions or within the optical cavity. In this latter case, only part of the optical cavity formed between the first and second mirror regions may form the active region.

The semiconductor device may comprise electrical contacts. The electrical contacts may be configured to allow a voltage to be applied across (at least) the gallium arsenide antimonide nanostructure and the quantum well.

A first electrical contact may be arranged to contact the p-type region and a second electrical contact may be arranged to contact the n-type region, e.g. to thereby facilitate application of an electrical pulse to the active region therebetween.

The electrical contacts may be configured to contact the p-type and n-type regions at any suitable position within the semiconductor heterostructure. For example, one or more of the contacts may be configured to contact one or more extremities of the semiconductor device, and/or one or more of the contacts may be configured to contact the first or second mirror region. It would also be possible for the contacts to comprise intra-cavity contacts, e.g. where doped regions are provided within the optical cavity as described above. Each electrical contact may have any suitable form. One or more of the contacts (e.g. at least the upper contact) may, for example, be arranged such that photon emission from the nanostructure is unhindered by the contact. In this regard, one or more of the contacts may have the form of a ring or otherwise.

The photon source comprises control circuitry operable to apply an electric pulse to the semiconductor device so as to cause the nanostructure to emit one single photon.

The control circuitry may comprise any suitable such circuitry that is operable to apply an electric pulse to the semiconductor device. The control circuitry may comprise or may form part of a voltage source or similar.

In various embodiments, the control circuitry is configured to apply a voltage pulse between the electrical contacts (e.g. between top contact and bottom contact), e.g. so as to provide an electrical stimulus that causes single photon emission from the nanostructure. Thus, the semiconductor device may be configured such that nanostructure emits at most one single photon when an electric pulse is applied to the electrical contacts.

The electric pulse may be configured such that it causes the nanostructure to emit one single photon when it is applied to the semiconductor device, e.g. via the electrical contacts.

In this context, it will be understood that an "electric pulse" or a "voltage pulse" means a rapid, transient change in the magnitude of a voltage applied to the electrical contacts, e.g. from a baseline value to a higher value, followed by a rapid return to the baseline value.

The pulse may have any suitable duration. In various embodiments, the pulse is shorter than the lifetime of an exciton (i.e. an electron and hole pair) bound to the nanostructure. This avoids the possibility of multiple excitations being caused by a single pulse, and accordingly ensures that the photon source emits only one single photon when a single electric pulse is applied to it. Suitable pulse lengths would be of the order of nanoseconds or picoseconds.

The pulse shape may be selected as desired. Suitable pulse shapes include, for example, square, rectangular, triangular, sine or cosine curves, and/or parts or combinations of such shapes.

Plural such electric pulses may be applied to the semiconductor device, e.g. periodically, and each electric pulse may cause the nanostructure to emit one single photon. In this case, the electric pulse may have any suitable repetition rate (e.g. such that the period is shorter than the lifetime of an exciton bound to the nanostructure), such as up to gigahertz or terahertz repetition rates.

In these embodiments, the baseline value and the higher value of the electric pulse may be selected as desired.

The baseline value may be, for example, zero volts. Alternatively, the baseline value may be non-zero. For example, a substantially constant DC voltage may be applied to the semiconductor device, e.g. at a level below the level required to cause single photon emission, together with a series of voltage pulses having a relatively small amplitude sufficient to stimulate single photon emission from the nanostructure. This may simplify the electronics required for the photon source (i.e. the control circuitry), and e.g. allow the photon source to operate at increased repetition rates.

In various particular embodiments, the peak amplitude (e.g. the maximum magnitude of the voltage signal) of the electric pulse is less than the turn on voltage of the light emitting diode (LED).

In this regard, the Applicants have recognised that single photon emission may be obtained from the photon source, even where plural nanostructures are present in the semiconductor device, by utilising resonant tunnelling of electrons and holes into the nanostructure.

A characteristic of a light emitting diode (LED) is that light emission dramatically increases when a voltage greater than a certain voltage, known as the turn on voltage, is applied to the LED. By restricting the applied electric pulse to have a magnitude less than the turn on voltage, charge carriers (electrons and holes) may tunnel into the nanostructure.

In particular, by appropriately selecting the peak amplitude (the maximum magnitude of the voltage signal) of the electric pulse, charge carriers (electrons and holes) may tunnel into the very lowest energy nanostructure state in the

semiconductor device.

This allows single photon emission even when more than one nanostructure (conceivably many millions of nanostructures) is present in the semiconductor device. This conveniently avoids the need to isolate one single nanostructure in the semiconductor device (which would be incompatible with cheap mass-production). There is an additional advantage that single-photon emission is from the lowest energy (longest wavelength) nanostructure in the semiconductor device, thereby facilitating photon emission in the telecommunications band(s). Thus, in various particular embodiments, the electric pulse is configured (e.g. the peak amplitude (the maximum magnitude of the voltage signal) of the electric pulse is selected) such that one or both of (i) one or more holes, and (ii) one or more electrons are caused to tunnel only into the lowest energy nanostructure state in the semiconductor device, and in various embodiments to resonantly tunnel into the lowest energy nanostructure state in the semiconductor device.

That is the electric pulse may be configured such that a single nanostructure is stimulated to emit a single photon by the application of the electric pulse, wherein application of the electric pulse is insufficient to stimulate any other nanostructure present in the semiconductor device.

Thus, in various embodiments, the nanostructure comprises one

nanostructure of a plurality of nanostructures in the semiconductor device, and the photon source (the electric pulse of the photon source) is configured such that when the electric pulse is applied to the semiconductor device, only the one single nanostructure of the plurality of nanostructures is caused to emit a (single) photon.

Additionally or alternatively, where the semiconductor device comprises a plurality of nanostructures which each emit photons at one of a plurality of different wavelengths, e.g. which are stimulated simultaneously, a filter may be used to select photon(s) having a single desired wavelength.

According to various other embodiments, the semiconductor device may comprise only a few nanostructures or only a single nanostructure.

In various particular embodiments, the nanostructure is doped, e.g. p- doped, i.e. doped with holes, e.g. from acceptor impurities. This may be done using so-called modulation doping, e.g. whereby the acceptor impurities are located outside of the nanostructure.

In various such embodiments, the (acceptor) impurities are located within the quantum well (external to the nanostructure). Thus, the impurities may be located within at least part of the first gallium arsenide layer and/or at least part of the second gallium arsenide layer. The acceptor impurities may comprise, for example, atoms of carbon or beryllium.

Doping, e.g. p-doping, of the nanostructure offers a number of advantages. Where, as discussed above, the photon source is configured such that resonant- tunnelling is used (so that the photon sources emits photons at the wavelength corresponding to the very lowest energy state in the semiconductor device), there is a risk that the photon emission may be beyond the telecommunications band (i.e. may have too long a wavelength), especially at room temperature.

In this regard, the Applicants have found that p-doping of the nanostructure, e.g. by modulation doping, increases the energy of the emission (decreases the wavelength) due to a capacitive charging effect. In particular, the Applicants have found that p-doping of the nanostructure increases the energy of the emission by about twenty four meV (millielectronvolts) per hole. As such, control of the level of p-doping represents a convenient method for controlling the wavelength of single photon emission.

In addition, p-doping of the nanostructure has device design and operational advantages. For example, p-doping allows the design of the device to be optimised for the injection of electrons. This in turn allows higher repetition rates.

Furthermore, the radiative lifetime of an exciton bound to gallium antimonide nanostructures such as quantum rings is of the order of a few to hundreds or even thousands of nanoseconds, depending in particular, on hole occupation. This can be reduced by p-doping the nanostructures with holes, e.g. so as to increase electron-hole binding and wave-function overlap. This again allows higher repetition rates.

In various particular embodiments, the semiconductor device

(heterostructure) may further comprise an electron filter layer, e.g. that is configured such that when the electric pulse is applied to the semiconductor device, only a small number of electrons (e.g. a single electron) is provided to the nanostructure (i.e. per pulse).

In this regard, the Applicants have furthermore recognised that since in various embodiments the (e.g. gallium antimonide (GaSb)) nanostructure (e.g. quantum ring) may be type-ll (and therefore may only confines holes) and the hole localisation potential may be very deep (-600 meV), there may be several holes per nanostructure (e.g. per quantum ring), even in the absence of external excitation, e.g. due to unavoidable background p-doping. Furthermore, since in various embodiments the nanostructure (e.g. quantum ring) may be type-ll and may not confine electrons, it can be challenging to guarantee that the electric pulse will provide either a single hole and/or a single electron to the nanostructure.

The single electron filter layer according to various embodiments may be provided in order to counteract this and to improve the purity of the single photon source. It is believed that the idea of providing an electron filter layer within a SPLED device is new and beneficial in its own right.

Thus, according to an aspect there is provided a photon source comprising: a semiconductor device comprising a first nanostructure and a second nanostructure; and

control circuitry operable to apply an electric pulse to the semiconductor device so as to cause the first nanostructure to emit one single photon;

wherein the photon source is configured such that when the electric pulse is applied to the semiconductor device, only a single electron is provided to the first nanostructure via the second nanostructure.

According to an aspect there is provided a method of operating a photon source that comprises a semiconductor device comprising a first nanostructure and a second nanostructure, the method comprising:

applying an electric pulse to the semiconductor device so as to cause the first nanostructure to emit one single photon;

Alternatively, the semiconductor device (heterostructure) may comprise a hole filter layer, e.g. that is configured such that when the electric pulse is applied to the semiconductor device, only a small number of holes (e.g. a single hole) is provided to the nanostructure (i.e. per pulse).

wherein the photon source is configured such that when the electric pulse is applied to the semiconductor device, only a single hole is provided to the first nanostructure via the second nanostructure.

applying an electric pulse to the semiconductor device so as to cause the first nanostructure to emit one single photon; wherein the photon source is configured such that when the electric pulse is applied to the semiconductor device, only a single hole is provided to the first nanostructure via the second nanostructure.

These aspects can (and in various embodiments do) include any one or more or each of the optional features described herein.

Thus, for example, the first nanostructure may comprise any suitable nanostructure that is configured to be operable as a single photon emitter, e.g. as described above. As such, the first nanostructure may comprise a nano-scale structure of a first semiconductor material embedded within a second different semiconductor material, e.g. as described above.

In various particular embodiments, the first nanostructure comprises a zero- dimensional (0D) nanostructure (i.e. a nanoparticle), such as a quantum dot or a quantum ring, e.g. as described above. The first nanostructure may (and in various embodiments does) comprise one nanostructure of a plurality of such

nanostructures.

In these aspects and embodiments the first nanostructure may comprise a gallium arsenide antimonide nanostructure optionally located within a quantum well, wherein the nanostructure contains more antimony atoms than arsenic atoms (e.g. as described above).

However, it would also be possible for the first nanostructure to comprise any other type of nanostructure (e.g. nanoparticle) that is configured to be operable as a single photon emitter.

For example, according to various embodiments, the first nanostructure may comprise any suitable group IV element of the periodic table or any suitable combination of binary, quaternary, quinary alloys or other combination of different group IV elements of the periodic table or group III and group V elements of the periodic table or group II and group VI elements of the periodic table, forming a suitable nanostructure, such as C, Si, Ge, SiGe, CdTe, CdSe, InAs, InGaAs, GaAs, InGaAsN, InGaAsNSb, InP, InGaP, InSb, InAsSb, InN, InGaN, BN. The first nanostructure may also be a defect, such as an impurity, or a localised fluctuation in material composition or thickness or strain, or have any other suitable form.

The first nanostructure may be located within a quantum well, e.g. as described above, e.g. where, the (first and) second semiconductor material is surrounded by a third different semiconductor material that may have a different (wider) band gap to the (first and) second semiconductor material, although in these aspects and embodiments this need not be the case.

In these aspects and embodiments, the electron (or hole) filter layer may be configured in any suitable manner such that when the electric pulse is applied to the semiconductor device only a single electron (or only a single hole) is provided to the first nanostructure.

The second nanostructure may comprise any suitable nanostructure that is configured to be operable to provide a single electron (or a single hole) to the first nanostructure.

The second nanostructure may comprise a nano-scale structure of a fourth semiconductor material embedded within a fifth different semiconductor material. The fourth semiconductor material should (and in various embodiments does) have a different band gap to the fifth semiconductor material, e.g. so that the second nanostructure forms a potential well in which one or both of: (i) one or more electrons; and (ii) one or more holes, may be confined (trapped).

The second nanostructure should be (and in various embodiments is) configured such that one or more electrons and/or one or more holes can be (quantum) confined by the second nanostructure in at least two, or three, dimensions, i.e. such that the density of (electron and/or hole) states is discrete. The second nanostructure should (and in various embodiments does) have at least two, or three, dimensions that are smaller than the de Broglie wavelength of electron(s) and/or hole(s) confined (trapped) by the second nanostructure. As such, the second nanostructure may (and in various embodiments does) comprise a structure that has at least two, or three, dimensions smaller than 100 nanometres.

The second nanostructure may (and in various embodiments does) comprise one nanostructure of a plurality of such nanostructures.

In various particular embodiments, the second nanostructure comprises a zero-dimensional (0D) nanostructure (i.e. a nanoparticle), such as a quantum dot or a quantum ring.

The second nanostructure may be any type of nanostructure (e.g.

nanoparticle) that is configured to (confine and) provide a single electron (or a single hole) to the first nanostructure.

In various embodiments, the fourth semiconductor material comprises gallium arsenide (GaAs), and the fifth semiconductor material comprises aluminium gallium arsenide (AIGaAs). Thus, in various particular embodiments, the second nanostructure comprises a nano-scale structure of gallium arsenide (GaAs) embedded within aluminium gallium arsenide (AIGaAs).

However, it would also be possible for the second nanostructure to comprise any suitable group IV element of the periodic table or any suitable combination of binary, quaternary, quinary alloys or other combination of different group IV elements of the periodic table or group III and group V elements of the periodic table or group II and group VI elements of the periodic table, forming a suitable nanostructure, such as C, Si, Ge, SiGe, CdTe, CdSe, InAs, InGaAs, GaAs, InGaAsN, InGaAsNSb, InP, InGaP, InSb, InAsSb, InN, InGaN, BN. The second nanostructure may also be a defect, such as an impurity, or a localised fluctuation in material composition or thickness or strain, or have any other suitable form.

The first and second nanostructures may be the same type of nanostructure (e.g. formed of the same materials) or may be different types of nanostructure (e.g. formed of different materials).

In these aspects and embodiments, the semiconductor device may comprise a heterostructure comprising (at least) a first layer of the fifth

semiconductor material (e.g. aluminium gallium arsenide (AIGaAs)), followed by a layer of second nanostructures (e.g. a layer of gallium arsenide (GaAs)

nanoparticles), followed by a second layer of the fifth semiconductor material (e.g. aluminium gallium arsenide (AIGaAs)), optionally followed by a first layer of the second semiconductor material (e.g. gallium arsenide (GaAs)), followed by a layer of first nanostructures (e.g. a layer of gallium antimonide (GaSb) nanoparticles), followed by a second layer of the second semiconductor material (e.g. gallium arsenide (GaAs) (or vice versa).

In these embodiments, where the fifth semiconductor material and the second semiconductor material are different materials, then the first layer of the second semiconductor material may be present, but where the fifth semiconductor material and the second semiconductor material are the same material, the first layer of the second semiconductor material may or may not be present.

The heterostructure may (and in various embodiments does) comprise any one or more additional layers as appropriate (e.g. as described herein).

In these embodiments, each layer may have any suitable thickness, e.g. as described above. In various embodiments, the first and second nanostructures (layers) are separated by less than around 100 nm, less than around 50 nm, less than around 30 nm, or less than around 10 nm (i.e. in the growth direction of the heterostructure).

In various particular embodiments, the second nanostructure (electron filter) layer may be provided on the n-type side of the semiconductor device (relative to the first nanostructure), i.e. so that electrons from the n-type region must pass via (through) the second nanostructure (electron filter) layer before reaching the first nanostructure layer.

In these embodiments (i.e. where the photon source is configured such that when the electric pulse is applied to the semiconductor device, only a single electron is provided to the first nanostructure via the second nanostructure), the photon source may be configured such that when the electric pulse is applied to the semiconductor device, any (plural or singular) number of holes from the p-type region may be provided to the first nanostructure.

In various other embodiments, the second nanostructure (hole filter) layer may be provided on the p-type side of the semiconductor device (relative to the first nanostructure), i.e. so that holes from the p-type region must pass via (through) the second nanostructure (hole filter) layer before reaching the first nanostructure layer.

In these embodiments (i.e. where the photon source is configured such that when the electric pulse is applied to the semiconductor device, only a single hole is provided to the first nanostructure via the second nanostructure), then the photon source may be configured such that when the electric pulse is applied to the semiconductor device, any (plural or singular) number of electrons from the n-type region may be provided to the first nanostructure.

Where the first nanostructure comprises a gallium arsenide antimonide nanostructure located within a quantum well (as described above), then in various particular embodiments, the second nanostructure (electron filter) layer is provided outside (but relatively close to) the quantum well (i.e. close to the GaAs emission region). The electron filter layer may be provided within the third semiconductor material (e.g. aluminium gallium arsenide (AIGaAs)), i.e. within the first and/or second layer of aluminium gallium arsenide (AIGaAs). In various particular embodiments, the electron filter layer is provided within the aluminium gallium arsenide (AIGaAs) layer that is adjacent to or relatively close to the n-type region (i.e. on the n-type side of the junction) (e.g. within the first layer of aluminium gallium arsenide (AIGaAs)). This means that electrons from the n-type region must pass via (through) the electron filter layer before reaching the quantum well and the nanostructure.

Thus, in various particular embodiments, the semiconductor device comprises a heterostructure comprising (at least) a first layer of aluminium gallium arsenide (AIGaAs), followed by an electron filter layer, followed by a third layer of aluminium gallium arsenide (AIGaAs), followed by a first layer of gallium arsenide (GaAs), followed by a layer of gallium antimonide (GaSb) nanostructures, followed by a second layer of gallium arsenide (GaAs), followed by a second layer of aluminium gallium arsenide (AIGaAs).

In these embodiments, the electron filter layer may comprise a layer of nanostructures such as quantum dots, e.g. a layer of gallium arsenide (GaAs) quantum dots.

In these aspects and embodiments, the semiconductor device may be in the form of a solid state photo-electronic device, e.g. in the form of a light emitting diode (LED) engineered to output one single photon per electrical stimulus, i.e. a single photon light emitting diode (SPLED), e.g. as described above. Thus, the semiconductor device may comprise an active region, i.e. Iight-emitting region, that may be formed between p-type and n-type regions, e.g. as described above.

In these aspects and embodiments, the photon source comprises control circuitry operable to apply an electric pulse to the semiconductor device so as to cause the first nanostructure to emit one single photon, wherein the photon source is configured such that when the electric pulse is applied to the semiconductor device, only a single electron (or only a single hole) is provided to the first nanostructure via the second nanostructure.

The control circuitry may comprise any suitable such circuitry that is operable to apply an electric pulse to the semiconductor device, e.g. as described above. The control circuitry may be configured to apply a voltage pulse between the electrical contacts (e.g. between top contact and bottom contact), e.g. so as to provide an electrical stimulus that causes single photon emission from the first nanostructure. Thus, the semiconductor device may be configured such that first nanostructure emits at most one single photon when an electric pulse is applied to the electrical contacts.

The electric pulse may be configured in any suitable manner such that it causes a single electron (or a single hole) to be provided to the first nanostructure via the second nanostructure (and consequently causes the first nanostructure to emit one single photon) when it is applied to the semiconductor device, e.g. via the electrical contacts.

In various particular embodiments, the peak amplitude (e.g. the maximum magnitude of the voltage signal) of the electric pulse is less than the turn on voltage of the light emitting diode (LED), e.g. as described above.

In various particular embodiments, single photon emission is obtained from the first nanostructure by utilising resonant tunnelling of an electron (or a hole) into the second nanostructure. Thus, the electric pulse may be selected such that a single electron (or a single hole) (resonantly) tunnels into the second nanostructure (and the single electron (or the single hole) may then be provided to the first nanostructure by tunnelling from the second nanostructure).

Thus, in various embodiments, the peak amplitude (the maximum

magnitude of the voltage signal) of the electric pulse is selected such that an electron (or a hole) may tunnel into the very lowest energy second nanostructure state (in the second nanostructure layer), and the single electron (or the single hole) may then be provided to the first nanostructure by tunnelling from that lowest energy second nanostructure state.

In various embodiments, the electric pulse (e.g. the peak amplitude (the maximum magnitude of the voltage signal) of the electric pulse) may be configured such that one or more electrons (or holes) are (a single electron (or hole) is) caused to tunnel only into a single (e.g. the lowest energy) second nanostructure state in the second nanostructure (electron (or hole) filter) layer, and in various

embodiments to resonantly tunnel into the (e.g. lowest energy) second

nanostructure state in the second nanostructure (electron (or hole) filter) layer.

That is, the electric pulse may be configured to be sufficient to cause one or more electrons (or holes) (a single electron (or a single hole)) to tunnel into (a single second nanostructure/nanostructure state within) the second nanostructure (electron (or hole) filter) layer (but insufficient to turn the diode on, or cause electrons (or holes) to tunnel into other second nanostructures or into other second nanostructure states within the second nanostructure (electron (or hole) filter) layer). In other words, the electric pulse may be configured such that a single second nanostructure is populated with an electron (or with a single hole) by the application of the electric pulse, wherein application of the electric pulse is insufficient to populate any other second nanostructures present in the

semiconductor device. Thus, in various embodiments, the photon source (the electric pulse of the photon source) is configured such that when the electric pulse is applied to the semiconductor device, only the one single second nanostructure of the plurality of second nanostructures is populated with an electron (or with a hole).

The Applicants have found that the addition of the second nanostructure

(electron (or hole) filter) layer (e.g. quantum dots layer) has the effect of filtering out a single electron (or a single hole), where the single electron (or hole) may then rapidly tunnel from the second nanostructure into or towards the first nanostructure, e.g. into the (e.g. GaAs) quantum well where the (e.g. GaSb quantum ring) nanostructure is located. This means that only a single electron (or hole) is provided to the nanostructure (i.e. per pulse). In this way, the problem mentioned above regarding multiple electrons being available for recombination with the holes in the nanostructure (e.g. quantum ring) can be addressed.

These aspects and embodiments have the additional benefit that the second nanostructure may act as an electron (or hole) funnel, i.e. as a spatial electron (or hole) filter within the semiconductor device, such only the first nanostructure that is sufficiently well aligned with the second nanostructure may receive an electron (or hole) when the pulse is applied.

Although as described above, carriers may be provided to the nanostructure by applying a voltage across (at least) the gallium arsenide antimonide

nanostructure and the quantum well, it would instead be possible, if desired, to optically stimulate photon emission from the nanostructure when an electric pulse is applied to the semiconductor device. In this case, application of the electric pulse to the semiconductor device may cause light emission, e.g. from an electrically- driven photon-emitting material that is provided external to the optical cavity, wherein the light may be arranged to optically stimulate photon emission from the nanostructure.

In various particular embodiments, the nanostructure of various

embodiments emits single photons having a (single) wavelength in the range 1260 nm to 1675 nm.

According to various embodiments, the semiconductor device of various embodiments may comprise one such semiconductor device of a collection of plural semiconductor devices. For example, the semiconductor device of various embodiments may comprise one semiconductor device in an array, matrix or grid of plural semiconductor devices. ln these embodiments, each semiconductor device may be configured to be individually (separately) stimulated. Equally, each semiconductor device may be configured to emit at most one single photon when an electric pulse is applied to that semiconductor device. Thus, each semiconductor device may be configured such that an electric pulse can be applied individually (separately) to that semiconductor device, e.g. so that the semiconductor device emits one single photon.

In these embodiments, each of the plural semiconductor devices may comprise a gallium arsenide antimonide nanostructure located within a quantum well, e.g. as described above (and in various embodiments this is the case), or one or more of the plural semiconductor devices may comprise some other type of photon emitter.

In various particular embodiments, each semiconductor device of the collection of plural photon sources semiconductor devices is configured to emit photons at one of a plurality of different wavelengths. All of the semiconductor devices may be coupled to an individual optical fibre. In this way, a device may be (and in various embodiments is) provided that is operable to emit single photons at plural different wavelengths, e.g. on demand.

Thus, according to various embodiments, there is provided a device comprising plural semiconductor devices including the semiconductor device as described above, wherein each semiconductor device may be configured to emit photons at one wavelength of a plurality of different wavelengths, and wherein the device is configured such that each semiconductor device can be separately caused to emit a single photon, e.g. by applying an electric pulse to the

semiconductor device in question.

The photon source of various embodiments may be operated under ambient conditions, e.g. at room temperature or above.

It would be possible, if desired, to thermoelectrically cool the photon source. Alternatively, the photon source may be operated without active cooling. This may simplify operation of the photon source, and accordingly reduce the operating cost of the photon source.

The semiconductor device of various embodiments may be (and in various embodiments is) configured to be coupled to an optical fibre. Thus, according to various embodiments, there is provided a system comprising a photon source as described above, and an optical fibre coupled to the semiconductor device. The system may be configured such that photons emitted by the nanostructure are collected by the optical fibre.

The photon source of various embodiments may be used as desired. The photon source may be used, for example, for applications in quantum key distribution, quantum information applications, quantum optics, quantum sensing and quantum metrology, etc.

According to an embodiment, there is provided a solid state photo-electronic device comprising electrical contacts, and between the contacts a first mirror region and an active region; where

the first mirror region comprises distributed Bragg reflectors formed of a plurality of layers;

photon emission is from a gallium arsenide antimonide nanostructure in the active region, and the said nanostructure has two or more dimensions each smaller than one hundred nanometres;

the said nanostructure contains more antimony atoms than arsenic atoms; the said nanostructure is located within a quantum well; and

in use the device emits at most one single photon upon stimulation by an electric pulse via the electrical contacts.

The nanostructure may be one of a plurality of such nanostructures.

Each nanostructure may be doped with holes from acceptor impurities.

The doping may be modulation doping by acceptor impurities which are located outside each nanostructure.

The acceptor impurities may be located within the quantum well and external to each nanostructure.

The acceptor impurities may comprise atoms of carbon or beryllium.

At least one nanostructure may be a quantum ring.

The quantum well may be comprised of gallium arsenide in aluminium gallium arsenide.

There may comprise a second mirror region such that the active region is located between the first and second mirror regions.

The second mirror region may comprise a distributed Bragg reflector formed of a plurality of layers.

The first and second mirror regions may have unequal reflectivity, resulting in a preferential direction for the emission of photons. The first and second mirror regions may comprise different numbers of layers.

At least part of each mirror regions may be doped to form an electrical contact.

The active region may be a micro-cavity.

The micro-cavity may be optically stimulated by emission from electrically- driven photon-emitting material that is external to the micro-cavity.

The micro-cavity may have an elliptical cross-section.

The micro-cavity may have the form of an elliptical prism that tapers or diverges.

The device may form an element of a collection of similar such device, for example an array, matrix or grid.

Each element may be individually stimulated.

According to another embodiment, there is provided a device or array of devices as described above generating single photons with a wavelength in the range 1260 nm to 1675 nm.

The device or array of devices may have thermoelectric cooling.

The device or array of devices may operate with no active cooling.

According to another aspect, there is provided a method of operating a device as described above where a single first nanostructure is stimulated to emit a single photon by the appliance of a stimulus that is insufficient to stimulate any other nanostructure present in the device.

A suitable optical filter may select a single photon from a plurality of photons of different frequencies emitted from a respective plurality of nanostructures by the application of a stimulus.

Various embodiments will now be described, by way of example only, and with reference to the accompanying drawings in which:

Figure 1 shows schematically a band-gap diagram of a gallium

antimonide/gallium arsenide heterostructure;

Figure 2 shows schematically a cross sectional view of an embodiment;

Figure 3 shows schematically a band-gap diagram of a gallium

antimonide/gallium arsenide nanostructure located within a quantum well;

Figure 4 shows schematically a cross-sectional view of the active region of an embodiment; Figure 5 shows current-voltage characteristics for devices manufactured according to embodiments;

Figure 6 shows LED emission as a function of wavelength at 300 K;

Figure 7 shows a model for the typical LED-like turn on relationship between voltage applied to a device and emission measured from it;

Figure 8 shows photoluminescence emission versus photon wavelength for a small ensemble of gallium antimonide QRs in a device;

Figure 9 shows schematically a cross sectional view of a photon source according to an embodiment; and

Figure 10 shows schematically a band-gap diagram of a photon source according to an embodiment.

Like reference numerals are used for like components throughout the drawings, where appropriate.

Various embodiments will now be described with reference to the Figures. Various embodiments relate to light emitting diodes (LEDs), in particular

LEDs engineered to output one single photon per electrical stimulus (SPLED).

To be suitable for telecommunications applications, the characteristics desired of an SPS include: (i) small physical size, low power consumption, low cost of manufacture; (ii) compatibility with transmission of telecoms optical fibres (1260 to 1675 nm); (iii) photon output stimulated electronically; (iv) photon output deterministic and on-demand (one photon per stimulus); (v) high output coupling efficiency; (vi) operation at ambient temperatures; (vii) potential for epitaxial integration; and (viii) high repetition rate.

Various embodiments can provide electrically-stimulated SPS devices (SPLEDs) that satisfy these criteria.

Various embodiments can provide electrically-stimulated SPS devices suitable for applications in quantum key distribution, quantum information applications, quantum optics, quantum sensing and quantum metrology.

Various embodiments relate to a solid state photo-electronic device wherein photon emission is from a gallium arsenide antimonide nanostructure in an active region, where the nanostructure contains more antimony atoms than arsenic atoms and the nanostructure is located within a quantum well.

The Oxford English Dictionary ("OED") defines nanostructure as "a structure, esp. a semiconductor device that has dimensions of a few nanometres" (entry dated 2012). Skilled persons working in the field of the invention consider that only structures with two or more dimensions smaller than 100 nanometres are nanostructures.

In order to increase the output coupling efficiency, which is beneficial in the development of a practical single photon emitter, the inventors reasoned that the device may be embedded in a cavity, such as a cavity formed by distributed Bragg reflectors (DBRs). Such a cavity is a solid state structure, not a void.

This architecture strongly favours gallium arsenide technology, for which DBR technology is well established, making indium arsenide, indium gallium arsenide, gallium arsenide (InAs/lnGaAs/GaAs) a candidate system for practical SPS devices at telecoms wavelengths. However such devices only operate at or below temperatures around 90K.

The inventors have realised that gallium antimonide/gallium arsenide self- assembled quantum rings (QRs) constitute a surprising alternative system for single photon sources at telecommunications wavelengths at room temperature.

As illustrated by Figure 1 , gallium antimonide in gallium arsenide has a deep

(about 600 meV) hole-confining potential, but strain-induced bending of the conduction band repels electrons, so it is a non-intuitive choice for an optical device.

Cross-sectional scanning tunnelling spectroscopy microscopy (X-STM) has shown that when gallium antimonide forms QRs, the electron wave-function is centred in the ring, increasing its overlap with the hole. This makes gallium antimonide QRs bright when compared with gallium antimonide QDs.

Conveniently, emission at around 1300-nanometres may be achieved through creation of a large valence-band offset (hole-confinement energy).

The inventors have observed photoluminescence and electroluminescence at telecommunications wavelengths at temperatures up to 380 K in samples and LEDs tested.

Single QR electroluminescence (EL) or electrically-driven single photon emission may be obtained using resonant tunnelling of electrons and holes to QR states (where they recombine) by driving an LED at very low voltages, that is at voltages before the LED turns on. Carriers then tunnel into the very lowest energy QR state, allowing single photon emission even when more than one (conceivably as many as one million) QR is present in a single device.

This conveniently avoids the need for isolating one single QR in an operational device (which would be incompatible with cheap mass-production). There is an additional advantage that single-photon emission is from the lowest energy (longest wavelength) QR.

In the case of devices comprising a plurality of QRs driven simultaneously and emitting at different wavelengths, a filter may be used to select just one desired wavelength.

To use the gallium antimonide/gallium arsenide system for SPLEDs, p- doping of the active region of QRs offers advantages. Resonant-tunnelling

SPLEDs emit at the wavelength corresponding to the very lowest energy element in the device, so there is a risk that emission may be beyond the telecommunications band (i.e. too long a wavelength), especially at room temperature. Addition of holes to the QRs increases the PL energy due to a capacitive charging effect by about twenty four meV (millielectronvolt) per hole, so control of the level of doping represents control of the wavelength of single photon emission.

To the skilled person the choice of gallium antimonide for use in the active region of the LED will appear unintuitive and unlikely to succeed. Gallium antimonide and gallium arsenide have type-ll band alignment, which confines positive charge in the gallium antimonide and repels negative charge. This would be expected to reduce charge carrier recombination and hence lower emission intensity.

However the inventors have realised that counter-intuitively, LEDs may be made such that positive charge may accumulate (even at elevated temperatures) in the confining potential provided by the gallium antimonide. This may attract negative charge and allow elevated levels of charge carrier recombination.

Also, pre-charging the QRs with positive charge has device design and operational advantages, as the device may be optimised for injection of electrons.

The use of QRs rather than traditional QDs also relaxes the strain from the incorporation of gallium antimonide into gallium arsenide, reducing the number of defects (dislocations) in the material.

Figure 2 shows a schematic (not to scale) cross sectional view of a single photon source according to an embodiment. This device comprises a substrate

104 with lower electrical contact(s) 102. On the other (upper) side of the substrate 104 is provided an optional buffer layer 105 and a first mirror region 106, which comprises a Distributed Bragg Reflector (DBR) formed of a plurality of layers.

Then follows an active region 108 within which the active nanostructures 110 are formed. Next there is a second mirror region 1 12 which is a DBR comprising a plurality of layers, a further optional buffer layer 114 and upper electrical contact(s) 1 16.

The device is formed into a mesa or a pillar by suitably etching a

semiconductor chip. The mesa or pillar may have the form of an elliptical prism, where the cross-sectional area of the elliptical prism may be constant or may vary, e.g. may taper or diverge.

In use, single photons may be emitted from the top or bottom of the device (as described below). The upper contact(s) 1 16 may be in the form of a ring.

A voltage is applied between the top contact(s) 116 and bottom contact(s) 102 to provide an electrical stimulus that powers the device and causes single photon emission.

Quantum rings may be formed by depositing gallium antimonide onto a gallium arsenide surface. Because of the lattice mismatch, highly strained QDs first self-assemble, by the Stanski-Krastanov growth mode. The exact dimensions may depend on growth conditions, but such QDs may typically have radii of about 30 nm and height of about 4 nm.

When the QDs are covered ("capped") by deposition of gallium arsenide, the QDs transform into QRs. Rings form when the antimony atoms in the centre of the QDs are replaced by arsenic atoms, reducing the overall structural strain. Rings typically have radii of about 30 nm, height of about 4 nm, and inner radii of the order of 15 nm.

The emission intensity of devices according to the various embodiments is improved by locating each gallium antimonide QR within a quantum well in the active region 108.

As illustrated by Figure 3, the quantum well increases the electron confinement, forcing electrons closer to the QRs.

The quantum well width may, for example, be around 50 nm, 20 nm or 10 nm. Other widths of quantum well may be used in other embodiments.

Figure 4 shows schematically (not to scale) a cross-sectional view of the active region of a photon source according to an embodiment. The active region

108 comprises four strata 202, 204, 206, 208 and is preceded by a first spacer layer 107, and followed by a second spacer layer 11 1.

In various embodiments the DBRs 106, 1 12 are doped and the whole cavity comprises an active region, with current driven through it. Other embodiments may comprise intra-cavity contacts, for example comprising doped regions within the cavity. In such embodiments only part of the whole cavity comprises an active region.

In the present embodiment the first 107 and second 11 1 spacer layers comprise aluminium (x) gallium (1-x) arsenide. The aluminium content x may be fixed throughout these layers or the ratio of aluminium to gallium may form a composition-gradient. In both cases aluminium (x) gallium (1-x) arsenide bounds layers of gallium arsenide, and so forms a quantum well. Three strata 202, 206, 208 of the active region 108 comprise gallium arsenide with suitable properties to allow a further stratum 204 comprising gallium antimonide to form active devices 110.

The construction of one exemplary embodiment will now be described in detail. The described embodiment is engineered and fabricated to have an output wavelength of 1326 nanometres. Those skilled in the art will understand that varying composition and dimensions may be used to produce devices with other emission wavelengths.

Construction of the device begins with a crystalline solid-state gallium arsenide substrate 104, which is widely commercially available.

First deposited onto the substrate 104 is a buffer layer 105 of gallium arsenide with thickness around 1 micron (not critical). This is n-type doped (for example with tellurium or silicon) to a level of 2 x 10¹⁸ dopant atoms per cubic centimetre.

Next the first layer (layer "A", black line in Figure 2) of the first DBR mirror region 106 is deposited, comprising aluminium (0.9) gallium (0.1) arsenide. This is n-type doped (for example with tellurium or silicon) to a level of 2 x 10¹⁸ dopant atoms per cubic centimetre, and has a thickness of 112.2 nanometres.

This is followed by the second layer (layer "B", white line in Figure 2) of the first DBR mirror region 106, comprising gallium arsenide. This is n-type doped (for example with tellurium or silicon) to a level of 2 x 10¹⁸ dopant atoms per cubic centimetre, and has a thickness of 98.5 nanometres.

The A and B layers are repeated alternately until there are in total 35 instances of the A layer and 34 instances of the B layer, to complete the first mirror region 106. Fewer layers are shown in Figure 2 to improve clarity. Different numbers, thicknesses, doping levels, etc. of the A layers and B layers may be used in different embodiments. As shown in Figure 4, the active region 108 is preceded by a first spacer layer 107 comprising 199.9 nanometres of undoped aluminium (x) gallium (1-x) arsenide, where the aluminium fraction x is 0.6.

The active region 108 comprises a first stratum 202 of 10 nanometres of gallium arsenide. This is p-type doped (for example with beryllium or carbon) to a level of 2 x 10¹⁶ dopant atoms per cubic centimetre. In other embodiments, the first stratum 202 may be undoped, or may be less or more heavily doped.

The first stratum 202 is followed by a second stratum 204 comprising nominally 2.1 atomic monolayers of undoped gallium antimonide (approximately 0.6 nm), a third stratum 206 of 5 nanometres of "cold capping" undoped gallium arsenide and a fourth stratum 208 of a further 5 nanometres of undoped gallium arsenide.

The active emitting nanostructures 1 10 form in the second stratum 204. As noted above, the presence of multiple QRs can be addressed using tunnelling, whereby emission occurs from the QR with the lowest energy (longest wavelength). This simplifies the manufacturing process, because it is not necessary to isolate one individual QR per finished device. In other embodiments only a few QRs or even a single QR may be provided in each device.

The active region 108 is followed by a second spacer layer 11 1 comprising 199.9 nanometres of undoped aluminium (x) gallium (1-x) arsenide, where the aluminium fraction x is 0.6. Other values for the composition fractions may be used in other embodiments.

Next a first (low refractive index) layer of the second DBR mirror region 1 12 is deposited, comprising aluminium (0.9) gallium (0.1) arsenide. This is p-type doped (for example with beryllium or carbon) to a level of 2 x 10¹⁸ dopant atoms per cubic centimetre, and has a thickness of 1 12.2 nanometres.

This is followed by the second (high refractive index) layer (layer "C", white line in Figure 2) of the second DBR mirror region 1 12, comprising gallium arsenide. This is p-type doped (for example with beryllium or carbon) to a level of 3 x 10¹⁸ dopant atoms per cubic centimetre, and has a thickness of 98.5 nanometres.

This is followed by the third (low refractive index) layer (layer "D", black line in Figure 2) of the second DBR mirror region 1 12, comprising aluminium (0.9) gallium (0.1) arsenide. This is p-type doped (for example with beryllium or carbon) to a level of 3 x 10¹⁸ dopant atoms per cubic centimetre, and has a thickness of 1 12.2 nanometres. The C and D layers are repeated alternately until there are in total 24 instances of the C layer and 24 instances of the D layer. That completes the second mirror region 1 12. Fewer layers are shown in Figure 2 to improve clarity. Different numbers, thicknesses, doping levels, etc. of C layers and D layers may be used in different embodiments.

The exact number of periods (layers) in each DBR mirror region 106, 112 is not critical. However, a structure with too few layers may provide too leaky a micro- cavity, and a structure with too many layers may have degraded emission performance through photon absorption.

The direction of emission of single photons is controlled by the relative numbers of layers in first DBR mirror region 106 and the second DBR mirror region 1 12.

In some embodiments, single photon emission is desired to be towards the top of the device, and in such embodiments there are provided more layers in first DBR mirror region 106 than the second 112.

In other embodiments, single photon emission is desired to be via the substrate. In such embodiments there are provided fewer layers in first DBR mirror region 106 than the second 1 12. Such embodiments may be appropriate when it is desired to separate the device from the substrate, for example for integration with other devices.

The structure is completed by the addition of a contact layer 1 16 comprising gallium arsenide that is p-type doped (for example with beryllium or carbon) to a level of at least 1 x 10¹⁹ dopant atoms per cubic centimetre and 98.5 nanometres in thickness.

In addition to the vertical structure detailed above, the device may require lateral confinement of current and lateral optical confinement to operate efficiently. This requirement may be achieved by selection of a suitable technique.

One such confinement technique is ion bombardment, by which insulating layers are created at the edges of the part of the device 11 1 , 112, 114 above the active region 108, 11 1 by bombarding the device with high energy ions.

Another such confinement technique is the oxidation of gallium aluminium arsenide, e.g. which has an aluminium composition of roughly 98%. In this technique, an additional gallium aluminium arsenide layer is included in the device structure immediately after (above) the active region 108. Edge regions of this layer may be oxidised after growth. The resulting lateral oxide layer is insulating and has a very different refractive index to the aluminium arsenide. This layer provides both electrical and optical confinement.

Devices according to various embodiments may be grown by several techniques.

Devices according to various embodiments may be grown by molecular beam epitaxy ("MBE"). Example MBE growth conditions are given below, detailing suitable temperatures and growth rates. Note that these may vary in detail from machine to machine, as is well known to those skilled in the art. · Gallium arsenide 105, 106-B, 1 12-C, 1 14, 202, 208: 580 °C, 1

monolayer/second (arsenic to gallium ratio of 1.7)

• "Cold cap" gallium arsenide 206: 430 °C, 1 monolayer/second (arsenic to gallium ratio of 5)

• Aluminium gallium arsenide 106-A, 107, 1 11 , 112-D: 600 °C, 1

monolayer/second (group five to group three ratio of 2)

• Gallium antimonide 204: 490 °C, 0.3 monolayers per second (antimony to gallium atomic ratio of 10)

Devices according to various embodiments may also be grown by chemical vapour deposition ("CVD") such as metal-organic chemical vapour deposition ("MOCVD") also known as metal-organic vapour phase epitaxy. Growth by

MOVCD requires conditions (different to those for MBE), which are well known to those skilled in the art.

Figure 5 shows current-voltage characteristics at temperatures from 2 K to 380 K of LED devices manufactured according to various embodiments, but without DBRs and a cavity. The y-axis is the current in amperes and the x-axis is the voltage in volts. The devices were prepared at the University of Lancaster and processed and packaged by Compound Semiconductor Technologies Global Ltd. The data show low reverse leakage current and high reverse breakdown voltage, indicative of excellent quality diodes.

The devices for Figure 5 were manufactured with a single layer of GaSb QRs in the active region of the LED, but devices were also grown and processed with three layers of GaSb QRs. All devices tested had excellent l-V characteristics, without exception. Similarly, all devices tested exhibited excellent electroluminescence (EL). All devices tested showed strong EL that overlapped with the telecoms band all the way up to 380 K. LEDs with 3 layers of QRs were approximately three times brighter than LEDs with one layer at the same excitation current, with the peak at slightly longer wavelength in the devices having three layers.

Figure 6 shows LED emission as a function of wavelength at 300 K. The x- axis indicates the wavelength in nanometres and the y-axis indicates emission in arbitrary units. Figure 6 shows that emission from QRs within the ensemble emission, from gallium antimonide/gallium arsenide nanostructures, overlaps the telecoms transmission window(s).

Single photon emission can be verified by performing a Hanbury-Brown Twiss experiment.

Figure 7 shows a model for the typical LED-like turn on relationship between voltage applied to a device and emission measured from it. The x-axis represents the voltage applied across a device, and the y-axis represents the photon emission in arbitrary units. Figure 7 shows that there is a critical voltage VA below which electrons have insufficient energy to occupy the lowest energy states in the active region 108 of the device.

Figure 8 shows photoluminescence emission versus photon wavelength for a small ensemble of gallium antimonide QRs in a device. The lower x-axis shows photon wavelength, and the upper x-axis shows the equivalent photon energy. The y-axis shows the level of photoluminescence in arbitrary units. Figure 8 also shows a critical voltage VA (as in Figure 7).

By placing such an ensemble in a diode and driving it at the voltage VA, emission occurs only for energies of EA and below. Selection of an appropriate VA accordingly selects emission from a single QR.

A SPLED device may be suitably stimulated by providing voltage pulses across it. As explained above, the voltage may be chosen so that carriers tunnel into only the lowest energy QR.

The pulse may be shorter than the lifetime of the exciton confined in the QR

(so as to avoid multiple excitations in a single stimulus).

The pulse shape is not in itself particularly important. Suitable pulse shapes may include square, rectangular, triangular, sine or cosine curves, and/or parts or combinations of such shapes. A suitable method of stimulation is to apply a substantially constant DC voltage to the device, at a level below the level VA required to stimulate the QRs present, plus a series of voltage pulses having small amplitude, sufficient to stimulate emission.

In use, higher pulse repetition rates are preferable. This may be limited by a number of factors.

One such factor is the RC time constant of the device. This may be reduced (desirable) by making the device physically small.

Another factor is the radiative life of the exciton. This is of the order of a few to hundreds or even thousands of nanoseconds for gallium antimonide QRs, depending, in particular, on hole occupation. This may be reduced (allowing higher repetition rates) by suitable means, for example by p-doping the QRs with holes to increase electron-hole binding and overlap of their wave-functions, and/or through cavity enhancement (Purcell effect). With suitably high-quality fact (high-Q) cavities, lifetimes of one picosecond or lower are possible, allowing repetition rates of terabits per second.

As described above, the GaSb QRs are type-ll (only confine holes), and the hole localisation potential is very deep (-600 meV), with the result that there can be several holes per QR, even in the absence of external excitation, due to

background p-doping. Furthermore, since the QRs are type-ll and do not confine electrons, it can be challenging to guarantee that either a single hole or a single electron is provided to the QR. In order to counteract this, a single electron filter layer 300 of quantum dots may be included in the AIGaAs 107 close to the GaAs emission region 202, 206, on the n-type side of the junction. This has been found to have the effect of improving the purity of the single photon source.

Figure 9 illustrates an embodiment that corresponds to the embodiments depicted in Figures 2 and 4, except that a single electron filter layer 300 of GaAs quantum dots is provided within the first spacer layer 107.

As described above, SPLEDs in which there are multiple quantum dots or rings may be operated such that the confined state of a single (the largest) dot/ring is brought down in energy by the application of a forward bias that is sufficient that electrons and holes can tunnel into it, but insufficient to turn the diode on, or even to bring the states of the other, smaller dots, sufficiently low (i.e. such that just one dot/ring is occupied). As illustrated in Figure 10, the SPLED in these embodiments can be operated in a similar manner, except that the additional dot layer (shown as a GaAs QD tunnel layer in Figures 9 and 10) filters out a single electron (i.e. a single electron tunnels into the ground state of a single (the lowest energy) QD in the QD layer), which will then rapidly tunnel into the GaAs quantum well where the GaSb quantum rings are located.

In Figure 10, e_g represents the electron ground state in the GaAs quantum dot. An electron may tunnel into the GaAs quantum dot with electron tunnelling probability the P_T1. An electron may tunnel from the GaAs quantum dot towards the quantum ring (indicated by the arrow in Figure 10, but not shown in the band diagram) with electron tunnelling probability P_T2. In various embodiments, P_T1 < P_T2.

This embodiment means that only a single electron is provided to the QR per pulse. In this way, the problem mentioned above regarding multiple electrons being available for recombination with the holes in the quantum rings can be resolved.

Although this embodiment has been described in terms of a GaAs quantum dot layer acting as an electron filter layer to a GaSb quantum ring layer, an electron filter layer may be provided and used in any other suitable material system, e.g. as described above.

Although this embodiment has been described in terms of an electron filter layer filtering out a single electron and providing that single electron to the single photon emitting nanostructure, it would also be possible to provide a hole filter layer, e.g. that is configured to filter out a single hole and to provide that single hole to the single photon emitting nanostructure, i.e. in an corresponding manner, mutates mutandi. In this case, the second nanostructure (hole filter) layer may be located on the p-type side of the semiconductor device relative to the first nanostructure.

The photon source of various embodiments may be configured to emit in the telecommunications band (1260 nm to 1675 nm) at room temperature or above. As such, the photon source need not be cooled in use, thereby reducing operational complexity and cost.

The photon source of various embodiments may comprise one such photon source of a collection of plural photon sources, e.g. in an array, matrix or grid of photon sources. In this case, each photon source may be configured to emit photons at one of a plurality of different wavelengths, and each photon source may be individually addressable. All of the photon sources may be coupled to a single optical fibre. As such, a device may be provided that is operable to emit a single photon of any one of plural different wavelengths on demand.

Although in the embodiments described above, carriers are provided to the nanostructure by applying a voltage across the gallium arsenide antimonide nanostructure and the quantum well, it would instead be possible, if desired, to optically stimulate photon emission from the photon source when an electric pulse is applied to the electrical contacts. In this case, application of the electric pulse to the contacts may cause light emission, e.g. from an electrically-driven photon- emitting material that is provided external to the optical cavity. The light may then optically stimulate photon emission from the nanostructure.

It can be seen from the above that various embodiments enable single photon emission within the telecommunications wavelength transmission bands at room temperature and above. This is achieved, in various embodiments at least, by providing a single photon source comprising a gallium arsenide antimonide nanostructure located within a quantum well, wherein the nanostructure contains more antimony atoms than arsenic atoms.

The foregoing detailed description has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the technology to the precise form disclosed. Many modifications and variations are possible in the light of the above teaching. The described embodiments were chosen in order to best explain the principles of the technology and its practical application, to thereby enable others skilled in the art to best utilise the technology in various embodiments and with various modifications as are suited to the particular use contemplated. It is intended that the scope be defined by the claims appended hereto.

Claims

1. A photon source comprising:

a semiconductor device comprising a first nanostructure and a second nanostructure; and

wherein the photon source is configured such that when the electric pulse is applied to the semiconductor device, only a single electron or only a single hole is provided to the first nanostructure via the second nanostructure.

2. The photon source of claim 1 , wherein the first nanostructure comprises a zero-dimensional nanostructure and/or the second nanostructure comprises a zero- dimensional nanostructure.

3. The photon source of claim 1 or 2, wherein:

the first nanostructure comprises one first nanostructure of a layer of first nanostructures in the semiconductor device; and

the second nanostructure comprises one second nanostructure of a layer of second nanostructures in the semiconductor device.

4. The photon source of claim 1 , 2 or 3, wherein:

the second nanostructure is located on the n-type side of the semiconductor device relative to the first nanostructure, and the photon source is configured such that when the electric pulse is applied to the semiconductor device, only a single electron is provided to the first nanostructure via the second nanostructure; or the second nanostructure is located on the p-type side of the semiconductor device relative to the first nanostructure, and the photon source is configured such that when the electric pulse is applied to the semiconductor device, only a single hole is provided to the first nanostructure via the second nanostructure.

5. The photon source of any one of the preceding claims, wherein the photon source is configured such that when the electric pulse is applied to the

semiconductor device, the second nanostructure is populated with a single electron or with a single hole.

6. The photon source of any one of the preceding claims, wherein the photon source is configured such that when the electric pulse is applied to the

semiconductor device, a single electron or a single hole is caused to resonantly tunnel into the second nanostructure.

7. The photon source of any one of the preceding claims, wherein the photon source is configured such that the single electron or the single hole is provided to the first nanostructure via the second nanostructure by the single electron or the single hole tunnelling from the second nanostructure.

8. The photon source of any one of the preceding claims, wherein the first nanostructure comprises a gallium arsenide antimonide nanostructure.

9. A photon source comprising:

a semiconductor device comprising a gallium arsenide antimonide nanostructure located within a quantum well, wherein the nanostructure contains more antimony atoms than arsenic atoms; and

10. The photon source of claim 9, wherein the quantum well is formed from gallium arsenide and aluminium gallium arsenide.

1 1. The photon source of claim 8, 9 or 10, wherein the gallium arsenide antimonide nanostructure comprises a nano-scale structure of gallium antimonide embedded within gallium arsenide.

12. The photon source of any one of the preceding claims, wherein the nanostructure comprises a quantum ring.

13. The photon source of any one of the preceding claims, wherein the semiconductor device comprises at least a first distributed Bragg reflector optionally formed from aluminium gallium arsenide and gallium arsenide.

14. The photon source of any one of the preceding claims, wherein the nanostructure is located within an optical cavity.

15. The photon source of any one of the preceding claims, wherein:

the nanostructure comprises one nanostructure of a plurality of

nanostructures in the semiconductor device; and

the photon source is configured such that when the electric pulse is applied to the semiconductor device, only a single nanostructure is caused to emit a photon.

16. The photon source of any one of the preceding claims, wherein:

the nanostructure comprises one nanostructure of a plurality of

nanostructures in the semiconductor device; and

the photon source comprises a filter configured to select a single photon.

17. The photon source of any one of the preceding claims, wherein the nanostructure is doped with holes from acceptor impurities.

18. The photon source of claim 17, wherein acceptor impurities are located outside of the nanostructure.

19. The photon source of claim 17 or 18, wherein acceptor impurities are located within the quantum well.

20. The photon source of claim 17, 18 or 19, wherein acceptor impurities comprise atoms of carbon or beryllium.

21. The photon source of any one of the preceding claims, wherein the nanostructure is configured to emit single photons having a wavelength in the range 1260 nm to 1675 nm.

22. The photon source of any one of the preceding claims, wherein the photon source is configured to operate under ambient conditions.

23. The photon source of any one of the preceding claims, wherein the photon source is configured to operate without active cooling.

24. The photon source of any one of the preceding claims, wherein:

the semiconductor device comprises one semiconductor device of a collection of plural semiconductor devices; and

the photon source is configured such that an electric pulse can be applied individually to each semiconductor device of the collection of plural semiconductor devices.

25. A method of operating a photon source that comprises a semiconductor device comprising a first nanostructure and a second nanostructure, the method comprising:

26. A method of operating a photon source that comprises a semiconductor device comprising a gallium arsenide antimonide nanostructure located within a quantum well, wherein the nanostructure contains more antimony atoms than arsenic atoms, the method comprising: