WO2018137519A1

WO2018137519A1 - Encoding method and communication apparatus

Info

Publication number: WO2018137519A1
Application number: PCT/CN2018/072904
Authority: WO
Inventors: 余荣道
Original assignee: 华为技术有限公司
Priority date: 2017-01-24
Filing date: 2018-01-16
Publication date: 2018-08-02
Also published as: CN108347298B; CN108347298A

Abstract

Disclosed is a method for inserting a fixed bit during encoding of an LDPC code. The method comprises: a sending device divides a transmission block to be sent into at least one code block; insert a fixed bit at a bit position with the lowest bitness or a sub-block with the lowest blockness in at least one of the code block, and perform LDPC encoding on each code block to obtain a plurality of data bit sequences; the sending device sends the data bit sequences; a receiving device decodes after receiving the data bit sequences, and removes the fixed bit from the code block where the fixed bit is inserted. By means of the method, fixed bits are inserted to positions with the lowest reliability, thereby effectively improving the reliability of LDPC encoding.

Description

Coding method and communication device

Technical field

The present application relates to the field of wireless communication technologies, and in particular, to a coding method and a communication device.

Background technique

The communication system employs coding to ensure communication reliability through the noisy communication channel. In these communication channels, the bits of each symbol have a corresponding capacity under a certain Signal-Noise Ratio (SNR), and a theoretical upper limit (Shannon limit) can be defined for this. The coding scheme aims to achieve a rate close to this Shannon limit, one of which is close to the Shannon limit is the Low-Density Parity-Check (LDPC).

LDPC is a class of linear block codes with sparse check matrices proposed in 1962. That is, only a small number of elements in the check matrix are "1", and most of them are "0". The LDPC utilizes the sparseness of the matrix, so that the decoding complexity is only linearly related to the code length, and can be effectively decoded in the case of a long code length, and has a simpler decoding algorithm. Studies have shown that LDPC has coding performance close to the Shannon limit. At the 86b meeting of the 3GPP (3rd Generation Partnership Project) RAN (Radio Access Network) 1, the LDPC officially received 5G (English full name: 5 ^th generation; Chinese full name: Five generations) One of the channel coding schemes for communication technology.

One method of constructing an existing LDPC check matrix is based on a base matrix H _{b of} a m _b ×n _b basis matrix, and is extended to an m×n LDPC check matrix H by a spreading factor z, that is, m=z× m _b , n=z×n _b , where n is the code length of the LDPC code, m is the number of parity bits of the LDPC code, and m _b and n _b are the number of rows and columns of the base matrix, respectively, and correspondingly the LDPC code information bits The length is k=nm. For example, the base matrix H _b is

That is, H _b is a 2 × 3 matrix, and is expanded by a spreading factor of 2, wherein the element "1" in H _b is replaced by a matrix obtained by rotating a 2 × 2 unit array by one bit right, and the element "0" is 2 × 2 Substituting the unit matrix, the element "-1" is replaced by a 2x2 0 matrix, that is, the extended 4x6 LDPC check matrix is:

Generally, after a transport block passes through the LDPC encoding module, an LDPC encoded codeword is obtained. Since the code length of the LDPC code check matrix is generally finite length, the information bit length is also finite length, and the length of the transport block does not match the information bit length of the LDPC. In some cases, after the transport block is divided into multiple coded blocks, the length of the coded block may also not match the information bit length of the LDPC, which requires bit stuffing, that is, some known fixed bits need to be filled into the coded block. The padding code block length is matched with the information bit length of the LDPC.

The current bit stuffing method uniformly specifies the position of the padding bits. The padding position is either at the head of the coding block or at the end of the coding block. Such a unified processing is very likely to put the padding bits at a higher bit or The block position is higher, and the information bits are placed at a lower bit or lower block position, and the LDPC code is not fully integrated. In view of this, it is necessary to find a more reasonable bit filling method to take advantage of the LDPC code.

Summary of the invention

The present application describes a data transmitting and receiving method, apparatus and system.

A first aspect of the embodiments of the present application provides a data sending method. After acquiring a transport block of information bits, the transmitting device divides the transport block to be sent into one or at least two coding blocks; The bit with the smallest bit size or the smallest block size in the one or at least two coding blocks is filled with fixed bits, and the low-density parity check LDPC coding is performed on the coded block filled with the fixed bits to obtain LDPC-encoded data bits. a sequence; the transmitting device transmits the sequence of data bits. In this way, the fixed bits are padded to a position with low reliability, and the information bits are prevented from being placed at a position with low reliability, the coding performance of the LDPC can be effectively improved, and the advantages of the LDPC code are repeatedly played.

In a possible design, the transmitting device fills the fixed bit in a position with the smallest bit or the smallest block in the one or at least two coding blocks, optionally, if the transmission block to be transmitted is divided into At least two coding blocks include, but are not limited to, a filling manner of any one of the following fixed bits: 1) filling a fixed bit with a minimum bit size or a minimum block size in all coding blocks; 2) concentrating fixed bits into multiple In a coding block of the coding block that is agreed with the receiving device, padding is performed at a position where the bit degree is the smallest or the block degree is the smallest; 3) the fixed bits to be padd are equally distributed to the respective coding blocks, and then in each coding In the block, a bit position with a low bit strength or a sub-block with a low sub-block degree is selected for filling; 4) selecting a part of the coding block to fill a fixed bit and selecting only a bit position with a low bit degree in the coding block agreed by the other part and the receiving device Or sub-blocks with low sub-blockiness are padded; 5) all fixed bits are filled in the coding block where the bit with the least bit or the sub-block with the lowest sub-block is located; 6) The fixed bits are concentrated into the first coding block of the plurality of coding blocks, and padding is performed at a position where the bit degree is the smallest or the block degree is the smallest; 7) the fixed bits are concentrated into the last coding block among the plurality of coding blocks Filling is performed at a position where the bit size is the smallest or the block degree is the smallest; 8) padding is performed in a fixed bit filling manner unified by any one of the transmitting device and the receiving device.

In a possible design, each of the coding blocks includes a plurality of sub-blocks; each sub-block has a corresponding block degree, wherein the sub-block with the smallest block-degree value is the least reliable sub-block, and each sub-block The block size of each bit is the same.

In a possible design, the blockiness of each sub-block is calculated according to the column weight of each column of the base matrix of the LDPC code; or the block degree of each sub-block is calculated according to the column weight of each column of the check matrix. .

In one possible design, the fixed bits are evenly distributed between different sub-blocks.

In one possible design, the fixed bits are sequentially padded into the same sub-block with the smallest blockiness value.

In one possible design, the fixed bits are sequentially padded into different sub-blocks with the smallest blockiness value.

In one possible design, the fixed bits are padded into sub-blocks with the smallest blockiness value in order from left to right or right to left.

In one possible design, the position of each bit of the coding block has a corresponding bit degree, wherein the bit position with the smallest bit value is the least reliable bit position.

In one possible design, the fixed bits are filled at the position with the smallest bit length in order from left to right or from right to left.

In a possible design, the sending device divides the transport block to be sent into one or at least two coding blocks, including:

The transmitting device acquires a maximum information bit length of an LDPC code used to encode the transport block;

The sending device determines whether the length of the transport block is greater than the maximum information bit length;

If the length of the transport block is greater than the maximum information bit length, the transport block is divided into at least two coded blocks, otherwise the transport block is divided into one coded block.

In one possible design, the method further includes:

Determining, by the sending device, a coded block filled with fixed bits in the one or at least two coding blocks according to a predetermined rule;

or,

The transmitting device sends padding information, where the padding information is used to indicate a coding block that is filled with the fixed bits.

In one possible design, the padding information is sent by unicast signaling such as broadcast or RRC signaling, PDCCH signaling, or the like.

In one possible design, the fixed bit is 0 or empty.

In a possible design, the transmitting device determines, before the fixed bit is filled in a bit with the smallest bit or the smallest block in the at least one of the one or at least two coding blocks, the sending device determines The number of fixed bits.

A second aspect of the embodiments of the present application provides a data receiving method, including:

Receiving, by the receiving device, at least one data bit sequence sent by the sending device;

The receiving device performs LDPC decoding on each data bit sequence to obtain a coding block corresponding to each data bit sequence, where the at least one data bit sequence corresponds to one or at least two coding blocks;

The receiving device removes fixed bits from the coded block in which the fixed bits are filled in the one or at least two coding blocks.

In a possible design, before the receiving device removes the fixed bit from the coded block in which the fixed bit is filled in the one or at least two coding blocks, the method further includes:

The receiving device determines a coding block that is filled with fixed bits in the one or at least two coding blocks.

In one possible design, it also includes:

Determining, by the receiving device, a coded block filled with fixed bits in the one or at least two coding blocks according to a predetermined rule;

or,

Receiving, by the receiving device, padding information sent by the sending device, where the padding information is used to indicate a coding block that is filled with the fixed bit;

The receiving device determines, according to the padding information, a coded block that is filled with fixed bits in the one or at least two coding blocks.

The padding information is sent by unicast signaling such as broadcast or RRC signaling, PDCCH signaling, or the like.

In a possible design, the receiving device removes fixed bits from the coded block filled with fixed bits in the one or at least two coding blocks, optionally if the number of the one or at least two coding blocks If it is greater than or equal to 2, it includes but is not limited to the filling manner of any one of the following fixed bits: 1) filling the fixed bit with the smallest bit or the smallest block in all coding blocks; 2) concentrating the fixed bits into multiple coding blocks In a coding block agreed with the transmitting device, padding is performed at a position where the bit degree is the smallest or the block degree is the smallest; 3) the fixed bits to be padd are equally distributed to the respective coding blocks, and then in each coding In the block, a bit position with a low bit length or a sub-block with a low sub-block degree is selected for padding; 4) selecting a part of the coding block does not fill the fixed bit and selecting only a low bit degree in the coding block agreed by the other part and the transmitting device Sub-blocks with low bit positions or low sub-blocks are padded; 5) padding all fixed ratios in the code block in which the bit with the least bit or the sub-block with the lowest sub-block is located ; 6) concentrating fixed bits into the first coding block of the plurality of coding blocks, filling at the position where the bit degree is the smallest or the smallest block degree; 7) concentrating the fixed bits to the last of the plurality of coding blocks In a coding block, padding is performed at a position where the bit degree is the smallest or the block degree is the smallest; 8) padding is performed in a fixed bit filling manner unified by any one of the transmitting device and the receiving device.

In one possible design, each of the coding blocks includes a plurality of sub-blocks; each sub-block has a corresponding block degree; wherein the sub-block with the smallest block-degree value is the least reliable sub-block.

In one possible design, the blockiness of each sub-block is calculated according to the column weight of each column of the base matrix; or the blockiness of each sub-block is calculated according to the column weight of each column of the check matrix.

The receiving device determines the number of the fixed bits.

A third aspect of the embodiments of the present application provides a data sending apparatus, including:

a processing module, configured to divide the transport block to be transmitted into one or at least two coding blocks; the processing module has a minimum bit size or a minimum block size in at least one of the one or at least two coding blocks Position filling a fixed bit, performing low-density parity check LDPC encoding on the coded block filled with the fixed bit, to obtain an LDPC-encoded data bit sequence;

And a sending module, configured to send the data bit sequence.

In a possible design, the processing module fills a fixed bit in a position with a minimum bit size or a minimum block size in at least one of the one or at least two coding blocks, optionally, if to be sent The transport block is divided into at least two coding blocks, including but not limited to the filling manner of any one of the following fixed bits: 1) filling the fixed bits with the smallest bit or the smallest block in all the coding blocks; 2) fixing the bits Concentrating into one coding block of a plurality of coding blocks that is agreed by the receiving device, filling at a position where the bit degree is the smallest or the smallest block degree; 3) equally distributing the fixed bits to be filled into the respective coding blocks, and then In each coding block, a bit position with a low bit strength or a sub-block with a low sub-block degree is selected for padding; 4) selecting a part of the coding block does not fill the fixed bit and only selects the bit degree in the coding block agreed by the other part and the receiving device. Sub-blocks with low bit positions or low sub-blockiness are padded; 5) fill all blocks in the code block with the smallest bit or the sub-block with the lowest sub-block Fixed bit; 6) concentrating fixed bits into the first coding block of the plurality of coding blocks, filling at a position where the bit degree is the smallest or the smallest block degree; 7) concentrating the fixed bits into a plurality of coding blocks In the last coding block, padding is performed at a position where the bit size is the smallest or the block degree is the smallest; 8) padding is performed in a fixed bit filling manner unified by any one of the transmitting device and the receiving device.

In one possible design, the device further includes:

An obtaining module, configured to obtain a maximum information bit length of an LDPC code used to encode the transport block;

The processing module determines whether the length of the transport block is greater than the maximum information bit length;

If the length of the transport block is greater than the maximum information bit length, the processing module divides the transport block into at least two coded blocks, otherwise the processing module divides the transport block into one coded block.

In one possible design, the device further includes:

The processing module determines, according to a predetermined rule, a coded block filled with fixed bits in the one or at least two coding blocks;

or,

The processing module sends padding information for indicating a coded block that is filled with the fixed bits.

In a possible design, the padding information is sent by the sending module by using unicast signaling such as broadcast or RRC signaling, PDCCH signaling, or the like.

In one possible design, the fixed bit is 0 or Null.

In one possible design, the processing module determines the number of fixed bits.

A fourth aspect of the embodiments of the present application provides a data receiving apparatus, including:

a receiving module, configured to receive at least one data bit sequence sent by the sending device;

a processing module, configured to perform LDPC decoding on each data bit sequence, to obtain a coding block corresponding to each data bit sequence, where the at least one data bit sequence corresponds to one or at least two coding blocks;

The processing module is further configured to remove fixed bits from the coded block filled with fixed bits in the one or at least two coding blocks.

In a possible design, the processing module is further configured to: before removing the fixed bit from the coded block in which the fixed bit is filled in the one or at least two coding blocks, the method further includes:

The processing module determines a coding block that is filled with fixed bits in the one or at least two coding blocks.

In a possible design, the processing module determines the coded block that is filled with fixed bits in the one or at least two coding blocks, including:

The processing module determines, according to a predetermined rule, a coded block that is filled with fixed bits in the one or at least two coding blocks;

or,

The receiving module is further configured to receive the padding information sent by the sending device, where the padding information is used to indicate a coded block that is filled with the fixed bit;

The processing module determines, according to the padding information, a coded block that is filled with fixed bits in the one or at least two coding blocks.

In a possible design, the processing module removes fixed bits from the coded block filled with fixed bits in the one or at least two coding blocks, optionally if the number of the one or at least two coding blocks If it is greater than or equal to 2, it includes but is not limited to the filling manner of any one of the following fixed bits: 1) filling the fixed bit with the smallest bit or the smallest block in all coding blocks; 2) concentrating the fixed bits into multiple coding blocks In a coding block agreed with the transmitting device, padding is performed at a position where the bit degree is the smallest or the block degree is the smallest; 3) the fixed bits to be padd are equally distributed to the respective coding blocks, and then in each coding In the block, a bit position with a low bit length or a sub-block with a low sub-block degree is selected for padding; 4) selecting a part of the coding block does not fill the fixed bit and selecting only a low bit degree in the coding block agreed by the other part and the transmitting device Sub-blocks with low bit positions or low sub-blocks are padded; 5) padding all fixed ratios in the code block in which the bit with the least bit or the sub-block with the lowest sub-block is located ; 6) concentrating fixed bits into the first coding block of the plurality of coding blocks, filling at the position where the bit degree is the smallest or the smallest block degree; 7) concentrating the fixed bits to the last of the plurality of coding blocks In a coding block, padding is performed at a position where the bit degree is the smallest or the block degree is the smallest; 8) padding is performed in a fixed bit filling manner unified by any one of the transmitting device and the receiving device.

In a possible design, in one possible design, each of the coding blocks includes a plurality of sub-blocks; each sub-block has a corresponding block degree; wherein the sub-block with the smallest block value is the least reliable Subblock.

In a possible design, before the receiving device removes the fixed bit from the coded block in which the fixed bit is filled in the one or at least two coding blocks, the apparatus further includes:

The processing module determines the number of fixed bits.

A fifth aspect of the embodiments of the present application provides a data sending device, including:

a processor, configured to divide a transport block to be transmitted into one or at least two coded blocks; the processor fills a fixed bit in a position with a minimum bit size or a minimum block size in the one or at least two code blocks, Encapsulating the fixed bit to perform low-density parity check LDPC encoding to obtain an LDPC-encoded data bit sequence;

a transmitter for transmitting the sequence of data bits.

In a possible design, the processor fills a fixed bit in a position with a minimum bit size or a minimum block size in the one or at least two coding blocks, optionally, if the transmission block to be transmitted is divided into at least two The coding blocks include, but are not limited to, the following filling manners of any fixed bits: 1) filling the fixed bits with the smallest bit or the smallest block in all coding blocks; 2) concentrating the fixed bits into multiple coding blocks In a coding block that is agreed with the receiving device, padding is performed at a position where the bit degree is the smallest or the block degree is the smallest; 3) the fixed bits to be padd are equally distributed to the respective coding blocks, and then in each coding block Selecting a bit position with a low bit length or a sub-block with a low sub-blockiness for padding; 4) selecting a part of the coding block to fill a fixed bit and selecting only a bit position or a sub-bit with a low bit length in another coding block agreed by the receiving device Sub-blocks with low blockiness are padded; 5) all fixed bits are filled in the coding block where the bit with the smallest bit or the sub-block with the lowest sub-block is located; 6) the fixed ratio Concentrating into the first coding block of the plurality of coding blocks, filling at a position where the bit degree is the smallest or the smallest block degree; 7) concentrating the fixed bits into the last coding block of the plurality of coding blocks, in The padding is performed at a position with the smallest bit size or the smallest block size; 8) padding is performed by a fixed bit filling manner unified by any one of the transmitting device and the receiving device.

In a possible design, the device further includes:

Determining, by the processor, whether a length of the transport block is greater than a maximum information bit length;

If the length of the transport block is greater than the maximum information bit length, the processor divides the transport block into at least two coded blocks, otherwise the processor divides the transport block into one coded block.

In a possible design, the device further includes:

Determining, by the processor, a coded block filled with fixed bits in the one or at least two coding blocks according to a predetermined rule;

or,

The processor sends padding information for indicating a coded block that is filled with the fixed bits.

In one possible design, the padding information is transmitted by the transmitter by broadcast or unicast signaling such as RRC signaling, PDCCH signaling, or the like.

In one possible design, the fixed bit is 0 or empty.

In one possible design, the processor determines the number of fixed bits.

In a possible design, the device further includes a memory for storing execution instructions; the processor is configured to execute execution instructions of the memory storage, such that the transmitting device performs data interaction with the receiving device through the communication interface to perform the above A method of transmitting data provided by various embodiments.

A sixth aspect of the embodiments of the present application provides a data receiving device, including:

a receiver, configured to receive at least one data bit sequence sent by the sending device;

a processor, configured to perform LDPC decoding on each data bit sequence to obtain a coding block corresponding to each data bit sequence, where the at least one data bit sequence corresponds to one or at least two coding blocks;

The processor is further configured to remove fixed bits from the coded block filled with fixed bits in the one or at least two coding blocks.

In a possible design, the processor is further configured to: before removing the fixed bit from the coded block in which the fixed bit is filled in the one or at least two coding blocks, the method further includes:

The processor determines a coded block that is filled with fixed bits in the one or at least two coded blocks.

In a possible design, the processor determines, in the one or at least two coding blocks, a coding block that is filled with fixed bits, including:

or,

The receiver is further configured to receive padding information sent by the sending device, where the padding information is used to indicate a coded block that is filled with the fixed bit;

The processor determines, according to the padding information, a coded block that is filled with fixed bits in the one or at least two coding blocks.

In a possible design, the processor removes fixed bits from the coded block filled with fixed bits in the one or at least two coding blocks, optionally if the number of the one or at least two coding blocks If it is greater than or equal to 2, it includes but is not limited to the filling manner of any one of the following fixed bits: 1) filling the fixed bit with the smallest bit or the smallest block in all coding blocks; 2) concentrating the fixed bits into multiple coding blocks In a coding block agreed with the transmitting device, padding is performed at a position where the bit degree is the smallest or the block degree is the smallest; 3) the fixed bits to be padd are equally distributed to the respective coding blocks, and then in each coding block Selecting a bit position with a low bit strength or a sub-block with a low sub-blockiness for padding; 4) selecting a part of the coding block to fill a fixed bit and selecting only a bit position or a sub-bit with a low bit length in another coding block agreed by the transmitting device Sub-blocks with low blockiness are padded; 5) all fixed bits are filled in the coding block where the bit with the least bit or the sub-block with the lowest sub-block is located; 6) will be fixed Bits are concentrated into a first one of the plurality of coded blocks, padded at a position where the bit degree is the smallest or the blockiness is the smallest; 7) the fixed bits are grouped into the last code block of the plurality of coded blocks, The padding is performed at a position where the bit size is the smallest or the block degree is the smallest; 8) padding is performed in a fixed bit filling manner unified by any one of the transmitting device and the receiving device.

In a possible design, before the processor removes the fixed bit from the coded block in which the fixed bit is filled in the one or at least two coding blocks, the device further includes:

The processor determines the number of fixed bits.

In a possible design, the device further includes a memory for storing execution instructions; the processor is configured to execute execution instructions of the memory storage, such that the receiving device performs data interaction with the transmitting device through the communication interface to perform the above A method of receiving data provided by various embodiments.

A seventh aspect of the present application provides a readable storage medium, where an execution instruction is stored, and when at least one processor of a transmitting device executes the execution instruction, the sending device performs the first aspect or the first aspect. A method of transmitting data provided by an embodiment.

An eighth aspect of the present application provides a readable storage medium, where an execution instruction is stored, and when at least one processor of a receiving device executes the execution instruction, the receiving device performs the second aspect or the second aspect. A method of receiving data provided by an embodiment.

A ninth aspect of the present application provides a program product, the program product comprising an execution instruction stored in a readable storage medium. The at least one processor of the transmitting device can read the execution instruction from a readable storage medium, and the at least one processor executes the execution instruction such that the transmitting device implements the method of transmitting the data provided by the first aspect or the various embodiments of the first aspect.

A tenth aspect of the present application provides a program product, the program product comprising an execution instruction stored in a readable storage medium. At least one processor of the receiving device may read the execution instruction from a readable storage medium, and the at least one processor executes the execution instruction such that the receiving device implements the data receiving method provided by the second aspect or the various embodiments of the second aspect .

The sending device in the embodiment of the present application may be a network device or a terminal. Correspondingly, the receiving device may also be a terminal or a network device.

The method for transmitting data, the receiving method, the device and the device provided by the application, the transmitting device divides the transport block to be transmitted into at least one coding block, and the bit position or block with the lowest bit degree among one or at least two coding blocks The lowest sub-block is filled with fixed bits, and each coding block is LDPC-encoded to obtain a plurality of data bit sequences, and the transmitting device transmits the data bit sequences, and the receiving device decodes the data bit sequences after receiving the data bit sequences. The fixed bits are removed from the coded block filled with fixed bits. In this way, the fixed bits are filled to the position with the lowest reliability, which effectively improves the reliability of the LDPC encoding.

DRAWINGS

In order to more clearly illustrate the embodiments of the present application, the drawings used in the description of the embodiments will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the present application, which are common in the art. For the skilled person, other drawings can be obtained from these drawings without paying for creative labor.

1 is a schematic diagram of a communication system according to an embodiment of the present application;

2 is a schematic flowchart of a method for transmitting data provided by the present application;

FIG. 3a is a schematic diagram of filling a fixed bit of data provided in the first coding block in the present application; FIG.

FIG. 3b is a schematic diagram of filling a fixed bit of data provided in the present application in a last coding block;

Figure 3c is a schematic diagram of the fixed bits of data provided in the present application filled in all coding blocks;

4 is a schematic flowchart of a method for receiving data provided by the present application;

FIG. 5 is a schematic structural diagram of an apparatus for transmitting data provided by the present application; FIG.

6 is a schematic structural diagram of a data receiving apparatus provided by the present application;

FIG. 7 is a schematic structural diagram of an embodiment of a sending device provided by the present application;

FIG. 8 is a schematic structural diagram of an embodiment of a receiving device provided by the present application.

detailed description

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings.

When performing LDPC encoding on the information bit sequence to be transmitted, it is first necessary to construct an LDPC check matrix for the wireless communication device. The check matrix of an exemplary LDPC code is as follows:

In the wireless communication system, different sizes of radio resource blocks (RBs) may be allocated to the wireless communication device according to different transmission requirements, and the LDPC codes that the wireless communication device can support under different RBs. The length is also different.

In order to enable the wireless communication device to be compatible with LDPCs of different code lengths, a base matrix H _{b of} m _b ×n _b may be generated in advance, and then the spreading factor z corresponding to the code length of each LDPC is preset, after the code length of the LDPC is determined. The data transmission device first obtains a spreading factor corresponding to the code length, and then performs expansion using the base matrix of the spreading factor, thereby obtaining a parity check matrix H corresponding to the code length, and H is a matrix of m×n . In this manner, different check matrices can be obtained on the basis of the base matrix when the code lengths of the LDPCs are different, so that the wireless communication device can support LDPCs of different code lengths.

For example, the base matrix H _b is

That is, m _b = 2, n _b = 3, H _b is a 2 × 3 base matrix, and the base matrix H _b is expanded by a spreading factor z = 2, where the element "1" in H _b is in units of 2 × 2 Instead of the matrix obtained by rotating one bit right, the element "0" is replaced by a 2 × 2 unit matrix, and the element "-1" is replaced by a 2 × 2 0 matrix, that is, the expanded H = m × n = (z × m _b ) × (z × n _b ) = (2 × 2) × (2 × 3) = 4 × 6 LDPC check matrix is:

After the LDPC encoding is performed on the information bit sequence to be transmitted, it can be sent to the receiving device after subsequent steps such as constellation modulation and resource mapping.

In order to solve the problem that the filling manner of the fixed bits in the LDPC encoding is too singular in the prior art, that is, the padding bits are uniformly placed after the information bits, and the characteristics of the LDPC code itself are not combined, the embodiment of the present application is based on FIG. In the illustrated communication system, a solution is proposed according to the blockiness or bit degree of each bit in the coding block to improve the transmission efficiency of the LDPC code.

The technical solution of the present application can be applied to various communication systems such as Wifi, 2G, 3G, 4G, and 5G. FIG. 1 is a schematic structural diagram of a system for transmitting or receiving data according to an embodiment of the present disclosure. As shown in FIG. 1 , the system architecture includes a network device and a terminal. Similarly, in a Wifi system, the network device is used. That is, the Wifi access point, the terminal is a Wifi terminal or the like. The number of network devices and terminals in this solution is not limited. The network device transmits downlink data to the terminal, where the data is LDPC coded, and the LDPC coded data is transmitted to the terminal after being modulated and the like; the terminal transmits uplink data to the base station, and the uplink data may also be LDPC coded, and the LDPC coded data is modulated. After transmission to the base station. In the process of transmitting uplink data or downlink data, a subsequently provided method can be adopted.

In the above architecture, the network device is a base station on the network side or another device capable of providing a base station function, and provides communication services for the terminal device; for example, the network device may be a Radio Access Network (RAN) device, or may be global. Base System (BTS) in Global System for Mobile communication (GSM) or Code Division Multiple Access (CDMA), or Wideband Code Division Multiple Access (Wideband Code Division Multiple Access, A base station (NodeB, NB) in WCDMA) may also be an evolved base station (Evolved Node B, eNB or eNodeB) in Long Term Evolution (LTE), or a relay station or an access point, or a 5G network. The base station or the like is not limited herein. In particular, in D2D (English name: Device-to-Device; Chinese name: device-to-device communication) communication, the network device may also be a terminal that assumes the function of the base station. The terminal is a device that needs to perform uplink and downlink data interaction on the user side, for example, a mobile phone, a user device, a tablet computer, and the like.

For the convenience of description, the meanings of the concepts and symbols involved in the embodiments of the present application are first described herein:

To further illustrate the data transmission method implemented in the communication system provided by the present application, the LDPC base matrix H _b and the LDPC check matrix H involved in the embodiments of the present application are further described.

The base matrix H _b in this embodiment may first construct a bit rate according to the number of rows m _b and the number of columns n _b , and then adopt density evolution theory or progressive edge growth (PEG) method.

Base matrix. The value of the number of rows m _b and the number of columns may be determined according to data transmission requirements of wireless communication. The generation method or construction method of the base matrix H _b will not be described here.

The construction of the LDPC check matrix H is based on a base matrix H _b and is extended by a cyclic permutation matrix, which is expressed as follows:

Where P represents a permutation matrix.

When the base matrix H _b is expanded, all the elements with a value of -1 are expanded to obtain an all-zero matrix of z × z size, and other elements other than "-1" are expanded to obtain a z × z size. The permutation matrix, z is the actual expansion factor. The permutation matrix may be obtained by cyclically shifting an identity matrix according to a corresponding number of displacements, and the number of displacements corresponds to the value of the element. Alternatively, the element value may be transformed according to the following formula (1) to obtain the number of displacements.

In formula (1), z ₀ is the maximum value of the expansion factor, z _f is the actual expansion factor, and p(i, j) is the value of the element of the i-th row and the j-th column in the base matrix.

Indicates rounding down, p(f, i, j) indicates the number of shifts.

The following provides a technical solution provided by the present application by taking the following base matrix H _b as an example.

The base matrix H _b has the number of rows m _b = 3 and the number of columns n _b = 6, that is, a matrix of 3 × 6.

When the base matrix H _b is expanded, the element "0" is replaced by the unit matrix, the element "-1" is replaced by the all 0 matrix, and the elements other than "0" and non - "-1" are based on the identity matrix. Perform a cyclic replacement. For example, the second element in the second row is 2, and if the actual expansion factor is z=3, then the corresponding permutation matrix can be obtained by cyclically shifting the unit matrix to the right or left twice.

The unit matrix of the permutation element "0" is:

The all-zero matrix of the permutation element "-1" is:

The matrix of the permutation element "1" is obtained by looping the unit matrix to the left or right by 1 bit. Here, the loop to the right is taken as an example:

The matrix of the permutation element "2" is obtained by looping 2 bits to the left or right through the unit matrix. Here, the loop to the right is taken as an example:

The extended LDPC check matrix is a matrix of m×n, m=z×m _b =3×3=9,

n=z×n _b =3×6=18, which is a matrix of 9×18, as follows:

That is, the parity check matrix H is a matrix composed of a plurality of 3×3 permutation matrices, the code length of the LDPC is 18, and the number of parity bits of the LDPC code is 9.

In order to further describe the data transmission method and apparatus provided by the embodiments of the present application, the following describes the technical terms, weights, and degrees of bits involved in the embodiments of the present application.

Column weight: For the base matrix H _b , the column weight refers to the number of non-"-1" elements in each column, such as the base matrix H _b described above, and its column weight is calculated as shown in Table 1:

Table 1: Base matrix H _b column weight

列数Number of columns	第1列Column 1	第2列Column 2	第3列Column 3	第4列Column 4	第5列Column 5	第6列Column 6
列重Column weight	22	33	11	33	11	22

For the check matrix H, the column weight refers to the number of elements "1" in each column, such as the check matrix H described above, and the column weight is calculated as shown in Table 2 below:

Table 2: Column weight of check matrix H

After the LDPC check matrix H is formed, the check matrix can be obtained by calculating the column weight value of each column of the base matrix H _b according to the principle that the column weight value of the extended z column is equal to the column weight value of the original column. H column weight value of the corresponding column. For example, after a first column of the matrix H of the base _B of the weight is 2, z = 3 after spreading factor H to the base matrix _B to extend, the first column in the check matrix H is extended to the first column, the second column, 3 column, and the first column, second column, the column weight values of column 3 and column base matrix H _b of a weight value equal to 2.

Block degree: The block degree involved in the embodiment of the present application refers to an LDPC check matrix H, where each column corresponds to one bit, wherein the first k columns correspond one-to-one to the bits in the coding block to be encoded, and the last m columns are one by one. Corresponding to the check bit, H is divided into a plurality of sub-blocks, for example, dividing H into a plurality of sub-blocks by using a spreading factor of z; calculating the degree of each sub-block, and obtaining the block degree, sometimes referred to as a sub-block Block degree. The block degree of the Gth bit refers to the number of 1s in any one of the corresponding sub-blocks of the G-th bit in the check matrix H, 0<G≤n, G is a positive integer, when the value of G is When the range is 0 < G ≤ k, the block degree of the bits in the coding block to be coded is indicated. In the present application, since the fixed bits discussed are also in the coding block, the value range of G in the present application is 0 < G ≤ k unless otherwise specified.

Optionally, the bits in the coding block to be coded may also correspond to any k columns in the check matrix, and the remaining m columns correspond to check bits, and the corresponding manner only needs to be unified at the transmitting end and the receiving end. This application does not limit it.

In the embodiment of the present application, the manner of calculating the block degree may be flexible, and may include at least the following two types:

First, calculating a column weight of each column of the base matrix H _b , and calculating a degree of the sub-block corresponding to the bit according to the column weight of each column;

Second, the column weight of each column of the check matrix H is calculated, and the degree of the sub-block corresponding thereto is calculated according to the column weight of each column.

Taking the above 9×18 check matrix H as an example, z=3 bits are grouped into six groups, that is, sub-block 1, sub-block 2, sub-block 3, sub-block 4, sub-block 5, and sub-block. 6, as shown in Table 3 and matrix combination is as follows:

The above two ways of calculating the blockiness have many possible forms in the specific implementation:

One way of blocks corresponding to each bit of the sub-block is calculated, the calculation of each column by the column base matrix H _b of the weight, i.e. the number of base matrix H _b is calculated than "-1" element, to obtain the corresponding For example, if the column weight of the first column of the base matrix H _b is 2, the definition of the column weight and the definition of the sub-block are obtained, and the block degree of the sub-block 1 is obtained as 2.

Another way of calculating the blockiness of the sub-block corresponding to each bit is to calculate the column weight of each column of the base matrix H _b and then multiply the column by the expansion factor to obtain the corresponding sub-block. For example, if the column weight of the first column of the base matrix H _b is 2 and multiplied by the expansion factor 3, the block degree of the sub-block 1 is obtained, and in the present application, without special declaration, The embodiments also define the block degree by taking the column weight of a single column as an example.

Another way of calculating the blockiness of the sub-block corresponding to each bit is to obtain the column of each column of the check matrix H by calculating the number of elements "1" in each column of the check matrix H corresponding thereto. After the multivalued value, the block degree of the sub-block can be obtained; for example, after the column weight value of the 1-3th column of the check matrix H is obtained, the block degree of the sub-block 1 is obtained as 2;

Another way of calculating the block degree of the sub-block corresponding to each bit is to add the column of the corresponding column of each sub-block in the H-check matrix or multiply the column of the single column by the expansion factor to obtain the sub-block. The blockiness of the block. For example, if the column weights of the 1-3 columns of the check matrix H are both 2, the block degree of the sub-block 1 may also be 2+2+2=6, or 2×3=6; and so on, without adding In the case of a special statement, each embodiment in the present application defines the block degree by taking the column weight of a single column as an example.

Table 3: Block size of sub-blocks

子块Subblock	子块1Sub block 1	子块2Subblock 2	子块3Subblock 3	子块4Subblock 4	子块5Subblock 5	子块6Subblock 6
块度Blockiness	22	33	11	33	11	22

As shown above, the LDPC coded code sequence is divided into 6 sub-blocks, and the block degree of each sub-block is: the block degree of the sub-block 1 is 2, the block degree of the sub-block 2 is 3, and the block degree of the sub-block 3 is 1. The sub-block 4 has a blockiness of 3, the sub-block 5 has a blockiness of 1, and the sub-block 6 has a blockiness of 2. Each dashed box in the formula is a sub-block, which is not difficult to understand. Here, the sub-block 1 The sub-block 2 and the sub-block 3 correspond to bits in the coding block to be encoded, and the sub-block 4, the sub-block 5, and the sub-block 6 correspond to parity bits;

Comparing Table 1 and Table 2, the block value of each sub-block is the same as the column weight of each column of the base matrix H _b , and is equal to the column weight of the corresponding column of the expanded check matrix H.

Among the bits corresponding to the LDPC check matrix described above, the reliability of each bit is high or low, and the reliability here refers to the probability that the bit is detected correctly. In the embodiment of the present application, the reliability of the bit is associated with the block degree of the sub-block to which it belongs, and the block degree of the sub-block is proportional to the value of the column weight of the base matrix H _b or the check matrix H.

Specifically, the higher the value of the column weight of the base matrix H _b , the higher the reliability of the sub-block corresponding to the column, the higher the reliability of the bits belonging to the sub-block, and the error of transmission after modulation The lower the code rate; conversely, the lower the value of the column weight of a column of the base matrix H _b , the lower the reliability of the sub-block in the code sequence corresponding to the column, and the lower the reliability of the bits belonging to the sub-block, The bit error rate transmitted after modulation is lower.

The calculation method of the sub-blockiness of each bit in the LDPC coded block and the relationship with the reliability are given above. Similarly, the bit degree of each bit in the LDPC coded block may be defined as the LDPC corresponding to the bit. The number of 1s in the column of the check matrix, that is, the block degree of the Gth bit is the number of 1s in the corresponding Gth column of the Gth bit in the check matrix H, 0<G≤n, G is a positive integer, and when the value of G ranges from 0 < G ≤ k, the bit degree of the bit in the coding block to be coded is indicated. Similar to the feature that the sub-block is high, the reliability is high, the sub-block is low, and the reliability is low, the bit-bit degree is high, the reliability is high, the bit degree is low, and the reliability is low, which will not be described here. Similarly, in the present application, since the fixed bits discussed are also in the coding block, the value range of G in the present application is 0 < G ≤ k unless otherwise specified.

The implementation process of applying the data sending method provided by the embodiment of the present application to the foregoing communication system will be described below with reference to the accompanying drawings and the above table.

2 is a schematic flowchart of an embodiment of a method for transmitting data provided by the present application. As shown in FIG. 2, on the basis of the application diagram shown in FIG. 1, a base station or a terminal may be used as a sending device or a receiving device, optionally, The method includes the following steps:

S201: The transmitting device determines a code rate and a code length of an LDPC code of the transport block used for encoding.

The code rate is equal to the information bit length of the LDPC code divided by the code length of the LDPC code. Generally, the commonly used code rate is 1/2, 2/3, 3/4, 5/6, etc., and is not limited herein.

S202: Determine a maximum information bit length at a code rate of the LDPC code according to the code rate of the LDPC code. The maximum information bit length may be directly determined, and the maximum information bit length may be determined according to a code rate of the LDPC code and a maximum LDPC code length of the code rate, that is, the maximum information bit length is equal to The code rate of the LDPC code is multiplied by the maximum LDPC code length.

S203: If the transport block length is not greater than the maximum information bit length of the LDPC code at the code rate, then execute S204, otherwise execute S205.

S204: Calculate the number of fixed bits to be padded according to the length of the transport block and the maximum information bit length of the LDPC at the code rate, and determine a corresponding fixed bit position; generally, the number of fixed bits filled is equal to the maximum information bit of the LDPC at the code rate. The length is subtracted from the length of the transport block, and the flow goes to step S207.

S205: Divide the transport block into at least two coding blocks.

S206: Calculate a coding block, a fixed number of bits, and a location that need to be filled with fixed bits according to the number of the coded blocks, the length of the coding block, and the maximum information bit length at the code rate.

Optionally, the length of the transport block is L, and the maximum information bit length of the LDPC is P, and L>P, the transport block is segmented, divided into multiple coding blocks, and the coding blocks are Number is

Said

Indicates rounding up. If the number of coded blocks is K, the number of fixed bits that need to be padded is

F=Num*K-L

If it is divided into multiple coding blocks and has two different lengths, which are divided into K1 and K2, the number of coding blocks whose coding block length is K1 is Num1, and the number of coding blocks whose coding block length is K2 is Num2, then The number of bits filled is:

F=Num1*K1+Num2*K2-L

In S204 or S206, after the transmitting device determines the fixed number of bits to be filled, the corresponding fixed bit position is also determined. Optionally, when the fixed bit is filled in the LDPC code, the padded fixed bit is filled in the LDPC code with low bit length. The bit position, or a sub-block with a low LDPC sub-block. With such a filling method, the coding gain of the LDPC code can be fully utilized to achieve an effect of enhancing coding efficiency.

Optionally, the padding fixed bits mentioned herein may be any known bits or Null, without loss of generality, and the fixed bits may be set to zero.

S207: Perform bit filling according to the number of padding bits and padding bit positions determined in S204 or S206.

Optionally, the filling may be performed in a uniform filling order on both sides of the transmitting end and the receiving end.

In the case of a coded block, or without a block and only one code block, when the padded fixed bit number X is confirmed, when the padding position is selected according to the bit degree, the padding principle is:

a) first determining the bit position with the lowest bit strength;

b) if the number Y of these bit positions is greater than or equal to X, then optionally X is filled, skip to step d), otherwise to step c);

c) determining the Y bit positions as the position filling the fixed bits, and updating X=X-Y; determining the bit position with the lowest bit degree among the remaining bit positions, the number of which is Y, skipping to step b),

d) end

Where X and Y are positive integers.

When the padding position is selected according to the block degree, since one sub-block contains a plurality of columns, and the column weights of the plurality of columns are equal, the corresponding block degree of each column in the same sub-block is the same, so the filling principle and the bit-by-bit The degree is similar, that is, to ensure that the padding bit position is the position with the lowest sub-blockiness. Once the number of bits that need to be filled in the sub-block is confirmed, there can be a corresponding number of columns in the sub-block.

For example, as shown in Table 3, if one fixed bit is to be filled, the sub-block with the lowest block degree is sub-block 3 and sub-block 5, so one can be selected, and the sub-block 3 is selected as an example, and can be left to right. The order of filling the 1 fixed bit at the leftmost first bit position of the sub-block 3, or filling the 1 fixed bit at the rightmost first bit position of the sub-block 3 in order from right to left, It is even possible to fill the bit positions in the middle of the sub-block 3.

If you want to fill 2 fixed bits, the lowest block is the sub-block 3 and sub-block 5, there are two ways to fill:

1) One way is to fill two fixed bits in sub-block 3 and sub-block 5 with a fixed bit, which can be filled according to the above-mentioned 1-bit padding, and each sub-block is selected from left to right or pressed. Select from right to left can be independent or unified;

2) Another way is to fill 2 bits into sub-block 3 or sub-block 5, and still fill in sub-block 3 as an example, and fill 2 fixed bits in the order from left to right. Blocking the leftmost first and second bit positions of block 3, or filling the 2 fixed bits in the right and left bit positions of the sub-block 3 in right-to-left order, and also 2 fixed bits The first and third bit positions of the sub-block 3 are filled.

If you want to fill 3 fixed bits, the lowest block size is sub-block 3 and sub-block 5, then there are two ways to fill:

1) One way is to fill 3 fixed bits on sub-block 3, and fill one on sub-block 5 (or fill one on sub-block 3, fill two on sub-block 5, the principle is the same), fill 1 The manner of fixing bits and 2 fixed bits is consistent with the above method;

2) Another way is to fill the 3 bits into the sub-block 3 or the sub-block 5, and still fill the sub-block 3 as an example, and fill the 3 fixed bits in the first and second of the sub-block 3 respectively. , the third bit position.

If there are more fixed bits to fill, the principles and methods are the same and will not be described again. For example, if 7 fixed bits need to be filled, after sub-block 3 and sub-block 5 are filled, it is necessary to further find the sub-block with the smallest blockiness among the remaining sub-blocks, and so on.

Similarly, fixed bits are padded at locations where the bitrate is minimal.

Regardless of which order or which of any fixed bit is filled, it is only necessary to uniformly define both sides of the transmitting device and the receiving device. Alternatively, it may be determined in a predetermined manner, for example, a 3GPP protocol, etc., or may be temporarily determined by the network device to notify the terminal of the padding information by means of broadcast or unicast, or the terminal may notify the network device by using control signaling, the padding The information is used to indicate at least one of the following information: a coded block filled with fixed bits, the number and location of fixed bits, and the transmission mode may include, but is not limited to, a broadcast PBCH (English full name: Physical Broadcasting Channel; Chinese full name: physical Broadcast channel) signaling or unicast RRC (English full name: Radio Resource Control; Chinese full name: radio resource control) signaling, PDCCH (English full name: Physical Downlink Control Channel; Chinese full name: physical downlink control channel) signaling, PUCCH (English full name: Physical Uplink Control Channel; Chinese full name: physical uplink control channel) signaling. In this way, the receiving device can clearly know the position of the padding bit after determining the number of padding bits according to the corresponding parameters.

Optionally, when a transport block is divided into at least two coded blocks, the process is divided into three code blocks, as shown in FIG. 3a, FIG. 3b, and FIG. 3c, code block 1, code block 2, and code block 3. , the position selection of the padding bits includes but is not limited to the following ways:

As shown in Figure 3a, all the fixed bits are padded in the first coding block, and the padding fixed bits are padded in the bit position where the first coding block has a low bit length, or the sub-block degree in the first coding block is low. The block is filled in the padding manner in one of the above coding blocks. Then performing LDPC coding on each coding block to obtain an LDPC codeword;

As shown in FIG. 3b, all the fixed bits are padded in the last coding block, and the padding fixed bits are filled in the bit position with the low bit degree of the last coding block, or the sub-block with the low sub-block degree in the last coding block is pressed. The filling method in one of the above coding blocks is filled. Then, each coding block is subjected to LDPC coding to obtain an LDPC codeword.

Optionally, the fixed bits are grouped into a plurality of coding blocks that are padded with a minimum bit size or a minimum block size in a coding block agreed upon by the receiving device. Alternatively, all fixed bits are filled in the coded block in which the bit with the least bit or the sub-block with the lowest sub-block is located.

As shown in FIG. 3c, all fixed bit distributions are filled in a plurality of coding blocks, including but not limited to the following filling manners of any fixed bits: 1) padding fixed at the least bit or minimum block size in all coding blocks Bits; 2) equally distribute the fixed bits to be filled into the respective coding blocks, and then select a bit position with a low bit degree or a sub-block with a low sub-block degree for padding in each coding block; 3) select a part of the coding block Filling the fixed bits and selecting only the bit positions with low bit width or sub-blocks with low sub-blocks in the coding block agreed by the other part and the receiving device to fill; 4) filling the fixed bits with any one of the transmitting device and the receiving device The way to fill.

The information bit occupation bit can be avoided by filling a bit position with a low bit degree or a plurality of sub block bits having a low coding block sub-blockiness in a bit position of a low bit of information of an LDPC code or a sub-block position having a low sub-blockiness. A low bit position or a sub-block position with a low sub-blockiness results in poor LDPC encoding performance, thereby improving the encoding performance of the LDPC encoding.

S208: The transmitting device performs LDPC encoding on the coding block bit sequence filled with the fixed bits and the coding block bit sequence that does not need to be filled with the fixed bits, and transmits the encoded data (that is, the encoded multiple data bit sequences).

At the receiving end, the receiving device receives the LDPC encoded data sent by the transmitting device, that is, receives a plurality of data bit sequences.

The receiving device performs LDPC decoding on the data bit sequence, and the decoding uses the LDPC check matrix to perform decoding, and obtains the bit sequence of the decoded coded block. For distinguishing, the decoded coded block may be referred to as translation. Code blocks, of course, can be called code blocks without causing confusion;

The receiving device removes the fixed bits from the decoded block filled with fixed bits in the decoded bit sequence, an exemplary description is shown in FIG. 4:

S401: Acquire a code rate and a code length of an LDPC code of a transport block

S402: Determine a maximum information bit length at a code rate of the LDPC code according to the code rate of the LDPC code. The maximum information bit length may be directly determined, and the maximum information bit length may be determined according to a code rate of the LDPC code and a maximum LDPC code length of the code rate, that is, the maximum information bit length is equal to The code rate of the LDPC code is multiplied by the maximum LDPC code length.

S403: If the transport block length is not greater than the maximum information bit length of the LDPC code at the code rate, execute S404, otherwise execute S405.

S404: Calculate the number of padding fixed bits to be removed according to the length of the transport block and the maximum information bit length of the LDPC at the code rate, and determine a corresponding fixed bit position; generally, the fixed number of bits filled is equal to the maximum information of the LDPC at the code rate. The bit length minus the transport block length. The method is the same as the method in S204 of the foregoing sending end, and details are not described herein again. Go to step S407.

S405: Divide the decoded bit sequence into at least two decoding blocks.

S406: Determine, according to the number of the decoded coding blocks, the length of the decoded bit sequence, the maximum information bit length at the code rate, and/or the received control signaling, the translation of the fixed bits that need to be removed. Code block, fixed number of bits and location. The method is the same as the method in S206 of the foregoing sending end, and is not described again.

S407: The receiving device removes the padded fixed bit according to the decoding block where the fixed bit determined in step S404 or S406, the fixed bit, and the position, to obtain the decoded information bit sequence.

Optionally, the location information of the fixed bit of the receiving device may be determined according to a predetermined rule, such as a 3GPP protocol, etc., or may be determined by receiving, by using a padding information sent by the sending device by using a broadcast or a unicast, the padding information is used to indicate the following information. At least one of: a coding block filled with fixed bits, a number and location of fixed bits, wherein the transmission manner includes but is not limited to PBCH signaling, RRC signaling, PDCCH signaling, PUCCH signaling, and the like.

The filling manner of the fixed bits includes, but is not limited to, any one of the following: 1) filling the fixed bits with the smallest bit or the smallest block in all the coding blocks; 2) concentrating the fixed bits into the plurality of coding blocks and the transmitting device In a predetermined coding block, padding is performed at a position where the bit degree is the smallest or the block degree is the smallest; 3) the fixed bits to be padd are equally distributed to the respective coding blocks, and then the bit degree is selected in each coding block. Sub-blocks with low bit positions or low sub-blocks are padded; 4) selecting a part of the coding blocks without filling the fixed bits and selecting only the bit positions with low bit-degree or sub-blocks with low bit positions in the coding blocks agreed by the other part and the transmitting device Blocking is performed; 5) filling all fixed bits in the coding block in which the bit with the smallest bit or the sub-block with the lowest sub-block is located; 6) concentrating the fixed bits into the first coding block of the plurality of coding blocks, Filling at a position where the bit size is the smallest or the blockiness is the smallest; 7) concentrating the fixed bits into the last one of the plurality of coded blocks, with the least bit or Minimum filling degree of the position of the block; 8) in any of a fixed transmission bit stuffing unified manner and receiving devices are filled. Since the receiving device has already agreed with the sending device to fill the fixed bits, it is only necessary to remove the padding fixed bits at the corresponding position according to the filling rule.

For some optional filling methods, refer to the related description in S207. Since the principles are completely consistent, they will not be described again.

FIG. 5 is a schematic structural diagram of an apparatus for sending data according to the present application. As shown in FIG. 5, the data sending apparatus 10 includes:

The processing module 11 is configured to obtain, according to the flow shown in FIG. 2 and various methods in the foregoing embodiments, code rate information of the LDPC code, a maximum information bit length at a code rate of the LDPC code, and a coding block split (ie, whether Dividing into a plurality of coding blocks) information, filling the number and position of fixed bits, performing a padding fixed bit operation, and after filling the fixed bits, performing LDPC coding on each coding block to obtain an LDPC coded data bit sequence;

The sending module 12 is configured to send the data bit sequence.

In the implementation of the sending device of the foregoing data, the processing module 11 is configured to include, but is not limited to, a filling manner of any one of the following fixed bits: 1) filling a fixed bit in a position with the smallest bit size or the smallest block size in all coding blocks. 2) concentrating fixed bits into one coding block of a plurality of coding blocks agreed upon by the receiving device, filling at a position where the bit degree is the smallest or the smallest block degree; 3) equally allocating the fixed bits to be filled to In each coding block, a bit position with a low bit strength or a sub-block with a low sub-block degree is selected in each coding block for filling; 4) selecting a part of the coding block does not fill the fixed bit but only agrees with the receiving device in another part. The coding block selects a bit position with a low bit rate or a sub-block with a low sub-block degree for padding; 5) filling all fixed bits in a coding block in which the bit bit minimum or the sub-block with the lowest sub-block is located; 6) The fixed bits are concentrated into the first coding block of the plurality of coding blocks, and padding is performed at a position where the bit degree is the smallest or the block degree is the smallest; 7) the fixed bits are concentrated to a maximum In the last coding block in the coding block, padding is performed at a position where the bit degree is the smallest or the block degree is the smallest; 8) padding is performed in a fixed bit filling manner unified by any one of the transmitting device and the receiving device.

Optionally, the sending device further includes:

An obtaining module, configured to obtain a maximum information bit length for performing LDPC encoding on the transport block;

Determining whether the length of the transport block is greater than the maximum information bit length;

If the length of the transport block is greater than the maximum information bit length, the transport block is divided into at least two coded blocks.

Optionally, the processing module 11 is further configured to:

Determining a code rate and a code length of the LDPC code used to encode the transport block;

Determining the maximum information bit length according to the code rate and code length; wherein a maximum information bit length of the LDPC code is equal to a product of a code rate and a code length of the LDPC code.

Optionally, the sending module 12 is further configured to send the padding information of the fixed bit in a unicast or broadcast manner, where the padding information is used to indicate at least one of the following information: a coding block filled with fixed bits, and a fixed bit Number and location.

The data sending apparatus provided in this embodiment is used to implement the technical solution of the sending device in any of the foregoing method embodiments, and the implementation principle and technical effects are similar, and details are not described herein again.

FIG. 6 is a schematic structural diagram of an apparatus for receiving data according to the present application. As shown in FIG. 6, the data receiving apparatus 20 includes:

The receiving module 21 is configured to receive a data bit sequence sent by the sending device.

The processing module 22 is configured to perform LDPC decoding on each data bit sequence to obtain a coding block corresponding to each data bit sequence;

The processing module 22 is further configured to remove fixed bits from the coded block that is filled with fixed bits.

Before the processing module 22 removes the fixed bits from the coded block filled with the fixed bits, the processing module 22 is further configured to:

The coded block that has been coded is determined to be a coded block filled with fixed bits, the number and location of fixed bits.

Further, the processing module 22 is configured to determine, according to a predetermined rule, a coded block filled with fixed bits;

or,

The receiving module 21 is further configured to receive the padding information of the fixed bit sent by the sending device, where the padding information is used to indicate at least one of the following information: a coding block filled with fixed bits, a number and a position of fixed bits;

The processing module 22 is further configured to determine, according to the padding information, a coded block that is filled with fixed bits.

Optionally, the processing module 22 is configured to remove the fixed bit according to the filling position specified by the protocol or the padding information sent by the sending device.

The data receiving device provided in this embodiment is used to implement the technical solution of the receiving device in any of the foregoing method embodiments, and the implementation principle and the technical effect are similar, and details are not described herein again.

FIG. 7 is a schematic structural diagram of an embodiment of a sending device provided by the present application. As shown in FIG. 7, the sending device 30 includes:

The processor 31 is configured to obtain, according to the flow shown in FIG. 2 and various methods in the foregoing embodiments, code rate information of the LDPC code, a maximum information bit length at a code rate of the LDPC code, and a coding block partition (ie, whether Dividing into a plurality of coding blocks) information, filling the number and position of fixed bits, performing a padding fixed bit operation, and after filling the fixed bits, performing LDPC coding on each coding block to obtain an LDPC coded data bit sequence;

The transmitter 32 is configured to send the data bit sequence.

The memory 33 is configured to store an execution instruction. The processor 31 is operative to execute execution instructions for memory storage. The transmitting device is caused to perform data interaction between the communication device and the receiving device to perform the data sending method provided by the various embodiments.

In an optional implementation manner of the sending apparatus of the foregoing data, the processor 31 is configured to include, but is not limited to, a filling manner of any one of the following fixed bits: 1) minimum bit size or block degree in all coding blocks The minimum position is filled with fixed bits; 2) the fixed bits are concentrated into one coding block of the plurality of coding blocks that is agreed upon by the receiving device, and padding is performed at a position where the bit degree is the smallest or the blockiness is the smallest; 3) is to be filled The fixed bits are evenly distributed into the respective coding blocks, and then the bit positions with low bit strength or sub-blocks with low sub-blockiness are selected for filling in each coding block; 4) selecting a part of coding blocks does not fill fixed bits but only in another Part of the coding block agreed by the receiving device is padded with a bit position with a low bit rate or a sub-block with a low sub-block degree; 5) filling all the coding blocks with the smallest bit or the sub-block with the lowest sub-block Fixed bits; 6) concentrating fixed bits into the first coding block of multiple coding blocks, filling at the position with the smallest bit size or the smallest block size; 7) fixed The bits are concentrated into the last coding block of the plurality of coding blocks, and are padded at a position where the bit size is the smallest or the block degree is the smallest; 8) padding is performed in a fixed bit filling manner unified by any one of the transmitting device and the receiving device.

Optionally, the processor 31 is further configured to:

Obtaining a maximum information bit length used for LDPC encoding the transport block;

Optionally, the processor 31 is further configured to:

Optionally, the sender 32 is further configured to send the padding information of the fixed bit in a unicast or broadcast manner, where the padding information is used to indicate at least one of the following information: a coding block filled with fixed bits, and a fixed bit Number and location.

FIG. 8 is a schematic structural diagram of an embodiment of a receiving device provided by the present application. As shown in FIG. 8, the receiving device 40 includes:

a receiver 41, configured to receive a data bit sequence sent by the sending device;

The processor 42 is configured to perform LDPC decoding on each data bit sequence to obtain a coded block corresponding to each data bit sequence;

The memory 43 is configured to store an execution instruction. The processor 41 is operative to execute execution instructions for memory storage. The receiving device is configured to perform data receiving by the various embodiments described above by performing data interaction between the receiving device and the transmitting device.

The processor 42 is also operative to remove fixed bits from coded blocks that are filled with fixed bits.

In one implementation, before the processor 42 removes fixed bits from the coded block filled with fixed bits, the processor 42 is further configured to:

Further, the processor 42 is configured to determine, according to a predetermined rule, a coded block filled with fixed bits;

or,

When the receiving device is a terminal, the receiver 41 is further configured to receive the padding information of the fixed bit sent by the sending device; the padding information is used to indicate at least one of the following information: a code filled with fixed bits The number and location of blocks, fixed bits;

The processor 42 is further configured to determine, according to the fixed information, a coded block that is filled with fixed bits.

The present application further provides a readable storage medium, where the readable storage medium stores execution instructions, and when the at least one processor of the transmitting device executes the execution instruction, the sending device executes the data sending method provided by the various embodiments described above. .

The present application further provides a readable storage medium, where the readable storage medium stores execution instructions, and when the at least one processor of the receiving device executes the execution instruction, the receiving device performs the data receiving method provided by the various embodiments described above. .

The application also provides a program product comprising an execution instruction stored in a readable storage medium. At least one processor of the transmitting device can read the execution instructions from a readable storage medium, and the at least one processor executes the execution instructions such that the transmitting device implements the method of transmitting data provided by the various embodiments described above.

The application also provides a program product comprising an execution instruction stored in a readable storage medium. At least one processor of the receiving device can read the execution instructions from a readable storage medium, and the at least one processor executes the execution instructions such that the receiving device implements the method of receiving data provided by the various embodiments described above.

In the above embodiment of the transmitting device or the receiving device, it should be understood that the processor may be a central processing unit (English: Central Processing Unit, CPU for short), or may be other general-purpose processors, digital signal processors (English: Digital) Signal Processor (DSP), Application Specific Integrated Circuit (ASIC), etc. The general purpose processor may be a microprocessor or the processor or any conventional processor or the like. The steps of the method disclosed in connection with the present application may be directly embodied by hardware processor execution or by a combination of hardware and software modules in a processor.

All or part of the steps of implementing the above method embodiments may be performed by hardware associated with the program instructions. The aforementioned program can be stored in a readable memory. When the program is executed, the steps including the foregoing method embodiments are performed; and the foregoing memory (storage medium) includes: read-only memory (English: read-only memory, abbreviation: ROM), RAM, flash memory, hard disk, Solid state drive, magnetic tape (English: magnetic tape), floppy disk (English: floppy disk), optical disc (English: optical disc) and any combination thereof.

Finally, it should be noted that although the present solution has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or All of the technical features are equivalently substituted; and these modifications or substitutions do not depart from the scope of the technical solutions of the embodiments of the present application.

Claims

A data transmission method, comprising:

The transmitting device divides the transport block to be transmitted into one or at least two code blocks;

Transmitting, by the transmitting device, a fixed bit in a position with a minimum bit size or a minimum block size in at least one of the one or at least two coding blocks;

Transmitting, by the sending device, low density parity check LDPC encoding on the one or at least two coding blocks, to obtain an LDPC coded data bit sequence;

The transmitting device transmits the sequence of data bits.
The method according to claim 1, wherein said transmitting device fills said fixed bit with a bit with a minimum bit size or a minimum block size in at least one of said one or at least two coded blocks If the transport block to be transmitted is divided into at least two code blocks, then:

Transmitting, by the transmitting device, the fixed bit in a first one of the at least two coding blocks; or

Transmitting, by the transmitting device, the fixed bit in a last one of the at least two coding blocks; or

Transmitting, by the transmitting device, the fixed bit in one coding block of the at least two coding blocks that is agreed with the receiving device; or

Transmitting, by the transmitting device, the fixed bit in two or more coding blocks of the at least two coding blocks that are agreed with the receiving device, without filling the fixed bit in the remaining coding block; or

The transmitting device fills the fixed bit at a position where the bit degree is the smallest or the block degree is the smallest in each of the at least two coding blocks.
The method according to claim 1 or 2, wherein each of said coding blocks comprises a plurality of sub-blocks; each sub-block has a corresponding block degree, wherein the sub-block with the smallest block-degree value is the least reliable sub-block Piece.
The method according to claim 3, wherein the blockiness of each sub-block is calculated according to the column weight of each column of the base matrix of the LDPC code; or

The blockiness of each sub-block is calculated from the column weight of each column of the check matrix of the LDPC code.
The method according to claim 1 or 2, characterized in that the position of each bit of the coding block has a corresponding bit degree, wherein the bit position with the smallest bit value is the bit position with the lowest reliability.
The method according to any one of claims 1 to 5, wherein the transmitting device divides the transport block to be transmitted into one or at least two coded blocks, including:

The transmitting device acquires a maximum information bit length of an LDPC code used to encode the transport block;

Determining, by the sending device, whether the length of the transport block is greater than the maximum information bit length, and if the length of the transport block is greater than the maximum information bit length, dividing the transport block into at least two coding blocks, otherwise The transport block is divided into one code block.
The method according to any one of claims 1 to 6, wherein the method further comprises:

Determining, by the sending device, a coded block filled with fixed bits in the one or at least two coding blocks according to a predetermined rule;

or,

The transmitting device sends padding information, where the padding information is used to indicate a coding block that is filled with the fixed bits.
The method according to any one of claims 1 to 7, wherein the fixed bit is 0 or null.
The method according to any one of claims 1 to 8, wherein the transmitting device fills the fixed bit at a position where the bit size is the smallest or the blockiness is the smallest among the one or at least two coding blocks. The transmitting device determines the number of the fixed bits.
A method for receiving data, comprising:

Receiving, by the receiving device, at least one data bit sequence sent by the sending device;

The receiving device performs LDPC decoding on each data bit sequence to obtain a coding block corresponding to each data bit sequence, where the at least one data bit sequence corresponds to one or at least two coding blocks;

The receiving device removes the fixed bit from a coding block in which the fixed bit is filled in the one or at least two coding blocks.
The method according to claim 10, wherein the method further comprises: before the receiving device removes the fixed bit from the coded block in which the fixed bit is filled in the one or at least two coding blocks, the method further comprises:

The receiving device determines a coding block that is filled with fixed bits in the one or at least two coding blocks.
The method of claim 11 wherein the method further comprises:

Determining, by the receiving device, a coded block filled with fixed bits in the one or at least two coding blocks according to a predetermined rule;

or,

Receiving, by the receiving device, padding information sent by the sending device, where the padding information is used to indicate a coding block that is filled with the fixed bit;

The receiving device determines, according to the padding information, a coded block that is filled with fixed bits in the one or at least two coding blocks.
The method according to any one of claims 10 to 12, wherein the receiving device removes the fixed bit from the coded block filled with fixed bits in the one or at least two coding blocks, if If the number of one or at least two coding blocks is greater than or equal to 2, then:

The fixed bit is in the first coding block; or,

The fixed bit is in the last code block; or,

The fixed bit is in a coding block agreed with the transmitting device; or

The fixed bits are in two or more coded blocks agreed with the transmitting device and not in the remaining code blocks in the one or at least two code blocks; or

The fixed bits are in each of the one or at least two coded blocks.
The method according to any one of claims 10 to 13, wherein each of the coding blocks comprises a plurality of sub-blocks; each sub-block has a corresponding block degree; wherein the sub-block with the smallest block value is reliable The least sub-block.
The method according to claim 14, wherein the blockiness of each sub-block is calculated according to the column weight of each column of the base matrix; or the blockiness of each sub-block is based on the column weight of each column of the check matrix Calculated.
The method according to any one of claims 10 to 13, wherein each bit position of the coding block has a corresponding bit degree, wherein the bit position with the smallest bit value is the least reliable bit position.
The method according to any one of claims 10 to 16, wherein the receiving device removes the fixed bit from the coded block in which the fixed bit is filled in the one or at least two coding blocks The method further includes:

The receiving device determines the number of the fixed bits.
A data transmitting device, comprising:

a processing module, configured to divide the transport block to be transmitted into one or at least two coding blocks; the processing module has a minimum bit size or a minimum block size in at least one of the one or at least two coding blocks Position filling a fixed bit, performing low-density parity check LDPC encoding on the coded block filled with the fixed bit, to obtain an LDPC-encoded data bit sequence;

And a sending module, configured to send the data bit sequence sending device.
The apparatus according to claim 18, wherein said processing module fills a fixed bit with a bit with a minimum bit size or a minimum block size in at least one of said one or at least two coded blocks, if The transport block to be transmitted is divided into at least two code blocks, then:

The processing module fills the fixed bit in a first one of the at least two coding blocks; or

The processing module fills the fixed bit in a last one of the at least two coding blocks; or

The processing module fills the fixed bit in one of the at least two coding blocks that is agreed with the receiving device; or

The processing module fills the fixed bits in two or more coded blocks of the at least two coded blocks that are agreed with the receiving device without filling the fixed bits in the remaining coded blocks; or

The processing module fills the fixed bits in each of the at least two coding blocks.
The apparatus according to claim 18 or 19, wherein each of said coding blocks comprises a plurality of sub-blocks; each sub-block has a corresponding block degree; wherein the sub-block with the smallest block-degree value is the least reliable sub-block Piece.
The apparatus according to claim 20, wherein a block degree of each sub-block is calculated according to a column weight of each column of a base matrix of the LDPC code; or a block degree of each sub-block is according to each column of the check matrix The column is calculated by weight.
The apparatus according to claim 18 or 19, wherein each bit position of said coding block has a corresponding bit degree, wherein the bit position with the smallest bit value is the bit position with the lowest reliability.
The device according to any one of claims 18 to 22, wherein the device further comprises:

An obtaining module, configured to obtain a maximum information bit length of an LDPC code used to encode the transport block;

The processing module determines whether the length of the transport block is greater than the maximum information bit length, and if the length of the transport block is greater than the maximum information bit length, the processing module divides the transport block into at least two Encoding blocks, otherwise the processing module divides the transport block into one coded block.
The device according to any one of claims 18 to 23, wherein the device further comprises:

The processing module determines, according to a predetermined rule, a coded block filled with fixed bits in the one or at least two coding blocks;

or,

The processing module sends padding information for indicating a coded block that is filled with the fixed bits.
The apparatus according to any one of claims 18 to 24, wherein the fixed bit is 0 or Null.
The apparatus according to any one of claims 18 to 25, wherein the processing module fills a position with a minimum bit size or a minimum block size in at least one of the one or at least two coding blocks The processing module determines the number of fixed bits before the bits are fixed.
A data receiving device, comprising:

a receiving module, configured to receive at least one data bit sequence sent by the sending device;

a processing module, configured to perform LDPC decoding on each data bit sequence, to obtain a coding block corresponding to each data bit sequence, where the at least one data bit sequence corresponds to one or at least two coding blocks;

The processing module is further configured to remove fixed bits from the coded block filled with fixed bits in the one or at least two coding blocks.
The apparatus according to claim 27, wherein the processing module is further configured to: before removing the fixed bits from the coded block in which the fixed bits are filled in the one or at least two coding blocks, further comprising:

The processing module determines a coding block that is filled with fixed bits in the one or at least two coding blocks.
The apparatus according to claim 28, wherein the processing module determines the coded block filled with fixed bits in the one or at least two coding blocks, including:

The processing module determines, according to a predetermined rule, a coded block that is filled with fixed bits in the one or at least two coding blocks;

or,

The receiving module is further configured to receive the padding information sent by the sending device, where the padding information is used to indicate a coded block that is filled with the fixed bit;

The processing module determines, according to the padding information, a coded block that is filled with fixed bits in the one or at least two coding blocks.
The apparatus according to any one of claims 27 to 29, wherein the processing module removes the fixed bit from the coded block in which the fixed bit is filled in the one or at least two coding blocks, if If the number of one or at least two coding blocks is greater than or equal to 2, then:

The fixed bit is in the first coding block; or,

The fixed bit is in the last code block; or,

The fixed bit is in a coding block agreed with the transmitting device; or

The fixed bits are in two or more coded blocks agreed with the transmitting device and not in the remaining code blocks in the one or at least two code blocks; or

The fixed bits are in each of the one or at least two coded blocks.
The apparatus according to any one of claims 27 to 30, wherein each of said coding blocks comprises a plurality of sub-blocks; each sub-block has a corresponding block degree; wherein the sub-block with the smallest block value is reliable The least sub-block.
The apparatus according to claim 31, wherein a blockiness of each sub-block is calculated according to a column weight of each column of the base matrix; or a block degree of each sub-block is weighted according to a column of each column of the check matrix Calculated.
The apparatus according to any one of claims 27 to 30, wherein each bit position of the coding block has a corresponding bit degree, wherein the bit position with the smallest bit value is the least reliable bit position.
The apparatus according to any one of claims 27 to 33, wherein the processing module removes fixed bits from the coded block in which the fixed bits are filled in the one or at least two coding blocks, The device also includes:

The processing module determines the number of fixed bits.
A data transmitting device, characterized in that the device comprises:

a processor for implementing the data transmission method according to any one of claims 1 to 9;

a transmitter for transmitting the sequence of data bits.
The device of claim 35, wherein the device further comprises:

a memory for storing execution instructions; the memory being coupled to the processor.
A data receiving device, characterized in that the device comprises:

a receiver, configured to receive at least one data bit sequence sent by the sending device;

Processor for receiving data according to any one of claims 10 to 17
The device of claim 35, wherein the device further comprises:

a memory for storing execution instructions; the memory being coupled to the processor.
A readable storage medium, characterized in that the readable storage medium comprises an execution instruction for implementing the data transmission method according to any one of claims 1 to 9.
A readable storage medium, characterized in that the readable storage medium comprises an execution instruction for implementing the data receiving method according to any one of claims 10 to 17.
A program product, characterized in that the program product comprises an execution instruction for a transmitting device to perform the method of claims 1 to 9.
A program product, characterized in that the program product comprises an execution instruction for a receiving device to perform the method of claims 10 to 17.