CN100589327C - Coding, decoding method and encoder, decoder - Google Patents

Coding, decoding method and encoder, decoder Download PDF

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Publication number
CN100589327C
CN100589327C CN200710151337A CN200710151337A CN100589327C CN 100589327 C CN100589327 C CN 100589327C CN 200710151337 A CN200710151337 A CN 200710151337A CN 200710151337 A CN200710151337 A CN 200710151337A CN 100589327 C CN100589327 C CN 100589327C
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information
code word
ldpc
check
filling
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CN101141131A (en
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郑平方
刘荣科
戚达平
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to PCT/CN2008/072359 priority patent/WO2009043261A1/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6362—Error control coding in combination with rate matching by puncturing
    • H03M13/6368—Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
    • H03M13/6393—Rate compatible low-density parity check [LDPC] codes

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  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)

Abstract

The invention discloses a coding method that consists of: obtaining input information; filling information is arranged at the tail of the input information; encode the input information that is provided with filling information according to the matrix generated by the LDPC code so as to obtain corresponding code word. The invention also provides a decoding method. Correspondingly, the invention provides an encoder and a decoder. The invention can obtain higher coding benefits, improve the anti error code capacity of the system.

Description

Coding, coding/decoding method and encoder, decoder
Technical field
The present invention relates to the channel coding technology field, be specifically related to coding, coding/decoding method and encoder, the decoder of a kind of loe-density parity-check code (LDPC sign indicating number).
Background technology
Handheld digital broadcasting DVB-H (Digital Video Broadcasting Handled) is that European digital television standard is organized as by the received terrestrial digital broadcasting network to the transmission standard that portable, handheld terminal provide multimedia service to formulate, and is the expanded application on portable terminal of European digital TV ground transmission standard (DVB-T).Be to adopt Read-Solomon RS sign indicating number (Reed-Solomon) sign indicating number to encode at present in the DVB-H standard.According to the DVB-H standard, IP datagram will be received in that a columns is fixed as 255, in the matrix of line number variable (1024,512 or 256), and use RS (255,191) to carry out forward error correction coding in the IP wrapper.Wherein, " 191 " are the information bit length of input, and " 255 " are coding back code word size, and check digit length is 255-191=64.Seeing also Fig. 1, is encapsulation of prior art multi-protocols and forward error correction coding MPE-FEC frame structure schematic diagram, as shown in Figure 1, corresponding byte of each node in the matrix, the left side 191 row are used for the filling of IP datagram, are called application data sheet; The right 64 row are used for the filling of error correction coding check digit, are called RS tables of data or checking data table.
In application data sheet, first IP datagram is filled downwards along row from matrix first row, the first row node, after first IP datagram is filled and finished, and then fill second datagram ... after last datagram was filled and finished, filled with 0 vacant position.Complete 0 number of filling row will be with 82 system figure notations in multi-protocols encapsulation of data newspaper header, and itself will not transmitted by system.After the application data sheet filling finishes, use RS (255,191) that matrix is encoded, the check digit of generation is filled in matrix right part 64 row, the corresponding code word of each row.More rightmost row can not transmit in the RS tables of data, promptly allow punching, to reduce the expense that error correction coding is brought.After error correction coding is finished, system also will carry out multi-protocols encapsulation and cyclic redundancy check (CRC)-32 coding to IP datagram in the matrix and RS data rows, obtain the MPE-FEC frame after this.
In research and practice process to prior art, the inventor finds that there is following problem in prior art: because multipath effect and Doppler effect, the mobile channel serious interference, and characteristic with long error burst, even again through the CRC-32 coding, forward error correction coding adopts RS (255,191) also at most only to correct 64 error bytes; When error byte in the code word surpasses 64, the misdata newspaper can't recover, and therefore the coding gain that adopts the RS sign indicating number to carry out forward error correction coding is not too high.
Summary of the invention
The technical problem that the embodiment of the invention will solve provides a kind of coding, coding/decoding method and encoder, decoder, can obtain higher coding gain.
For solving the problems of the technologies described above, embodiment provided by the present invention is achieved through the following technical solutions:
The embodiment of the invention provides a kind of coding method, comprising: obtain input information; At described input information end filling information is set; Describedly at described input information end filling information is set and is: the information filling bit that adds first predetermined number at the end of input information; According to the generator matrix of low-density check LDPC sign indicating number the described input information that is provided with behind the filling information is encoded, obtain corresponding codewords; The described code word that obtains is deleted the filling information of described setting, and the check information in the code word is provided with back output.
The embodiment of the invention provides a kind of coding/decoding method, comprising: obtain the low-density check LDPC code word of input, in described LDPC code word filling information is set, and the check information in the code word is provided with, obtain new code word; Relation according to the described new code word LDPC check matrix corresponding with it is decoded.
The embodiment of the invention provides a kind of encoder, comprising: first processing unit, be used to obtain input information, and at described input information end filling information is set; Describedly at described input information end filling information is set and is: the information filling bit that adds first predetermined number at the end of input information; Coding unit is used for according to the generator matrix of low-density check LDPC sign indicating number the described input information that is provided with behind the filling information being encoded, and obtains corresponding codewords; Second processing unit is used for the described code word that obtains is deleted the filling information of described setting, and the check information in the code word is provided with back output.
The embodiment of the invention provides a kind of decoder, comprising: processing unit, be used to obtain the low-density check LDPC code word of input, and in described LDPC code word, filling information is set, and the check information in the code word is provided with, obtain new code word; Decoding unit, the relation that is used for the new code word that obtains according to the described processing unit LDPC check matrix corresponding with it is decoded.
Above technical scheme as can be seen, the RS sign indicating number that adopts the LDPC sign indicating number to replace DVB-H standard Central Plains to adopt by the information to input in the embodiment of the invention carries out forward error correction coding, and corresponding decoding, therefore can obtain higher coding gain, simulation performance correlation curve through emulation experiment is found when error rate BER is 10-6, compare with adopting the RS sign indicating number, adopt the LDPC sign indicating number can obtain the coding gain of about 6dB, thereby also improved the anti-error code capacity of system on largely.
Description of drawings
Fig. 1 is encapsulation of prior art multi-protocols and forward error correction coding MPE-FEC frame structure schematic diagram;
Fig. 2 is an embodiment of the invention coding method flow chart;
Fig. 3 is an embodiment of the invention coding/decoding method flow chart;
Fig. 4 is that the embodiment of the invention adopts LDPC (2040,1528) to carry out the simulation performance correlation curve figure of forward coding with adopting RS (255,191);
Fig. 5 is an embodiment of the invention coder structure schematic diagram;
Fig. 6 is an embodiment of the invention decoder architecture schematic diagram.
Embodiment
It is a kind of based on loe-density parity-check code (LDPC that the embodiment of the invention provides, Low Density ParityCheck) methods for forward error correction coding, replace RS (255,191) coding in the DVB-H standard, can obtain higher coding gain and adapt to more harsh channel circumstance.
The LDPC sign indicating number is that a kind of check matrix is the linear block codes of sparse matrix, and its performance has characteristics such as encoder complexity is controlled, decoding simple and fast near shannon limit.Under same bit error rate, compare with the RS sign indicating number, use the LDPC sign indicating number can obtain higher coding gain as forward error correction coding.
The embodiment of the invention provides a kind of methods for forward error correction coding based on LDPC (2040,1528).Wherein, " 1528 " are the information bit bit length of input, and " 2040 " are the bit length of coding back code word, and the check bit bit length is 2040-1528=512.LDPC (2040,1528) is by 5 information filling bits of LDPC (2044,1533) deletion and increase by 1 verification filling bit acquisition.
The LDPC sign indicating number is defined by check matrix H, can distinguish different LDPC sign indicating numbers by check matrix H.Whether the capable heavy and column weight by check matrix H is that definite value can be divided into canonical LDPC sign indicating number and non-canonical LDPC sign indicating number, and the latter's decoding performance is better than the former.The LDPC that the building method of LDPC sign indicating number mainly is divided into two big class: random configuration LDPC and constructs based on ad hoc rules with certain Algebraic Structure.Used LDPC (2044 in the embodiment of the invention, 1533) be based on euclidean geometry space E G (3, non-canonical LDPC sign indicating number 2^3), by calculating the dependent vector and the circulation matroid that can obtain in this space, the circulation matroid is done to decompose and reorganization, can obtain the LDPC sign indicating number of different length, code check, and check matrix H and generator matrix G has accurate cycle characteristics.
LDPC (2044,1533) is by check matrix H QcDefinition, wherein, c=1533, q=2044-1533=511, H QcStructure as follows:
H qc＝[H 0?H 1?H 2?H 3]
Wherein, H iBe 511 * 511 rank circular matrixes, get 0≤i≤3.Circular matrix H iIn each provisional capital be by lastrow to the right one of cyclic shift obtain.H iFirst row be designated as h i=(J 0, J 1, ∧, J k), J wherein k(0≤J k≤ 510) the expression correspondence position is 1, and all the other positions are 0.h iBe defined as follows:
h 0：10，17，238
h 1：333，349，393
h 2：154，267，390
h 3：5，8，10，32，71
The check matrix H of LDPC sign indicating number and generator matrix G satisfy GH T=0, H TBe the transposed matrix of check matrix H, therefore can obtain generator matrix G according to check matrix H.
The generator matrix G of LDPC (2044,1533) QcStructure be shown below:
G qc = I O O G 0 O I O G 1 O O I G 2
Wherein, I is 511 * 511 rank unit matrixs, and O is 511 * 511 rank, zero battle arrays, G iBe 511 * 511 rank circular matrixes, get 0≤i≤2.Circular matrix G iIn each provisional capital be by lastrow to the right one of cyclic shift obtain, each row all is that the first from left is listed as one of downward cyclic shift and obtains.G iFirst row be designated as g i=(u 510u 509∧ u j∧ u 0), u wherein j(0≤j≤510) can be 1 or 0.g iBe defined as follows (16 systems are represented):
g0：327B35FD66702180017DE92DA6FFBCB252061E04771
97FE4A8537955824FF9C7932D79A1F95599311808CB1
624628C309A1D394083FDE09B43530D140E6D1BD0
g1：36BE439C9E806A9FEC1C0BEFD17BA3709C7DBD1C3
C4C4EC3C471650312611AE35C51796BB5EA06965A56B
39D054A155CCA87C31FD8030A8ECC2068139B86C318
g2：AC50B92F9D7328958E0A73391D3FCB447DFF9CE21C
35C147CF44526ED1567044CAD98FD015DF4D2151E2B
C4EC290E578E52D1432D0888240BFD8DDFB100887A
Below introduce cataloged procedure in detail.
Seeing also Fig. 2, is embodiment of the invention coding method flow chart, comprises step:
Step 201, obtain input information, filling information is set at described input information end;
Obtain 1528 information bits of input, and add 5 information filling bits " 00000 " at its end.
At transmitting terminal, after the application data sheet filling finished, the LDPC encoder read 191 bytes of first row, and totally 1528 information bits are represented with a.Add 2 system sequences " 00000 " at a end and obtain a ', totally 1533 information bits.
Step 202, the described input information that is provided with behind the filling information is encoded, obtain corresponding codewords according to the generator matrix of low-density check LDPC sign indicating number;
Because the input information behind the interpolation filling information is 1533 information bits, therefore determine to use LDPC (2044,1533) to encode.
A ' use LDPC (2044,1533) is encoded, promptly handles by following formula:
a′·G qc＝c
C is the code word that obtains after the error correction coding, totally 2044 bits.
Step 203, the described code word that obtains is deleted the filling information of described setting, and the check information in the code word is provided with back output.
Code word behind the coding is deleted the information filling bit of described interpolation, and add the code word of 1 verification filling bit " 0 " as output at the check bit end of check information.
Code word behind the coding is deleted known 5 information filling bits " 00000 " again, promptly obtain 1528 information bits and 511 check bits, totally 2039 bits.Transmit for convenient, increase by 1 check filling bit " 0 " at the check bit end, thereby obtain LDPC (2040,1528).Therefore, the data that send among the LDPC (2040,1528) are 1528 information bits and 2040-1528=512 check bit, promptly export code word and are made up of two parts, part 1 is 1 528 original information bits, and part 2 comprises 511 check bits and 1 check filling bit " 0 ".Among the c the 1534th is filled into first row of checking data table to the 2044th bit (511 bits) and 1 verification filling bit " 0 " of increasing newly, finishes first LDPC code word in the matrix, and then successively other row in the matrix are implemented error correction codings.Because G iBe Theory of Circular Matrix, encoder only needs to store G iFirst, other row can obtain by cyclic shift.
The basic bit rate that adopts LDPC (2040,1528) to carry out forward error correction coding in the embodiment of the invention is 3/4 (1528/2040=3/4), sends for reducing data volume, saves bandwidth, preferably under the situation, can change code check at channel conditions.The variation of code check realizes by the part rows in the deletion checking data table.The 39th row are to the 64th row (the 1833rd to 2040 bit in the corresponding former code word) in the deletion checking data table, the acquisition code check is 5/6 code word, the 28th row are to the 64th row (the 1745th to 2040 bit in the corresponding former code word) in the deletion checking data table, and the acquisition code check is 7/8 code word.When the code check of transmitting terminal became 5/6 or 7/8 by 3/4, transmitting terminal transmitted application data column and not deleted checking data row.
Cataloged procedure according to above-mentioned introduction is correspondingly decoded.
Seeing also Fig. 3, is embodiment of the invention coding/decoding method flow chart, comprises step:
Step 301, obtain the low-density check LDPC code word of input, in described LDPC code word, filling information is set, and the check information in the code word is provided with, obtain new code word;
Read the code word of 2040 bits that send over, add 5 information filling bits " 00000 " at the 1528th bit end, and 1 verification filling bit " 0 " at deletion check information end, new code word obtained.
At receiving terminal, when whole matrix filled by IP datagram and checking data finish after, the LDPC decoder at first reads matrix first row, adds 2 system sequences " 00000 " at the 1528th bit end, and 1 verification filling bit " 0 " at deletion check information end, obtain code word c '.
Step 302, decode according to the relation of the described new code word LDPC check matrix corresponding with it.
Utilize existing sum-product algorithm to decode, the information of 1528 information bits of output.
In error free channel, c ' satisfies following formula:
H qc·c′＝o
According to following formula, in thanksing for your hospitality channel, decoder can recover correct information sequence a by existing sum-product algorithm etc., the information of 1528 information bits of input when i.e. output was encoded originally, a is filled into first row of application data sheet, finish the decoding of first LDPC code word in the matrix, and then successively other row in the matrix are implemented decoding.
After adopting LDPC (2040,1528) to carry out forward error correction coding in the embodiment of the invention, can find to obtain higher coding gain than adopting RS (255,191) to carry out forward error correction coding by The simulation experiment result.
See also Fig. 4, be that the embodiment of the invention adopts LDPC (2040,1528) carry out adopting RS (255 in forward error correction coding (code check is 3/4) and the DVB-H standard, 191) carry out simulation performance correlation curve figure (the corresponding LDPC sign indicating number of left side curve of forward coding, the corresponding RS sign indicating number of the right curve), the maximum iteration time of LDPC decoding is 100, and the channel model of employing is a rayleigh fading channel.Among the figure, transverse axis is represented signal to noise ratio Eb/N0, and the longitudinal axis is represented error rate BER, as can be seen from the figure, is 10 at BER -6The time, compare with adopting the RS sign indicating number, adopt the LDPC sign indicating number can obtain the coding gain of about 6dB, so improved the anti-error code capacity of system largely.
Foregoing describes the coding and the coding/decoding method of the embodiment of the invention in detail, and corresponding, the embodiment of the invention provides a kind of encoder.
Seeing also Fig. 5, is embodiment of the invention coder structure schematic diagram.
Encoder as shown in Figure 5 comprises first processing unit 501, coding unit 502 and second processing unit 503.
First processing unit, 501 coding units, 502 first processing units, 501 second processing units, 503 coding units, 502 first processing units 501 are used to obtain input information, at described input information end filling information are set.
Coding unit 502 is used for according to the generator matrix of low-density check LDPC sign indicating number the described input information that is provided with behind the filling information being encoded, and obtains corresponding codewords.
Second processing unit 503 is used for the described code word that obtains is deleted the filling information of described setting, and the check information in the code word is provided with back output.
The bit of the input information that described first processing unit 501 obtains is 1528 information bits, and is corresponding, adds 5 information filling bits at the 1528th information bit end.If 1528 information bits of input are represented with a.Add 2 system sequences " 00000 " at a end and obtain a ', totally 1533 bits.
Described coding unit 502 is that 1533 information bits determine that the generator matrix of low-density check LDPC sign indicating number is LDPC (2044 according to the input information that described first processing unit 501 adds behind 5 information filling bits, 1533) generator matrix, according to LDPC (2044,1533) generator matrix is encoded to 1533 information bits, and obtaining corresponding codewords is 2044 bits.If the generator matrix of LDPC (2044,1533) is G Qc, a ' that obtains is previously encoded by following formula: a ' G Qc=c, c are the code word that obtains after the error correction coding, totally 2044 bits.
2044 bits after described second processing unit 503 is encoded described coding unit 502 are deleted 5 information filling bits " 00000 " of described interpolation, and 1 the verification filling bit of interpolation of the check information end in code word " 0 " obtains the output of LDPC (2040,1528) back.
Encoder further comprises: code check adjustment unit 504.
Code check adjustment unit 504, be used to adjust code check, code check adjustment unit 504 obtains in the 1833rd to 2040 bit in LDPC (2040,1528) the back deletion code word or the deletion code word the 1745th to 2040 bit as the LDPC code word of output at described second processing unit 503.Be specially: the 39th row are to the 64th row (the 1833rd to 2040 bit in the corresponding former code word) in the code check adjustment unit 504 deletion checking data tables, the acquisition code check is 5/6 code word, the 28th row are to the 64th row (the 1745th to 2040 bit in the corresponding former code word) in the deletion checking data table, and the acquisition code check is 7/8 code word.
Seeing also Fig. 6, is embodiment of the invention decoder architecture schematic diagram.
Decoder as shown in Figure 6 comprises: processing unit 601 and decoding unit 602.
Processing unit 601 is used to obtain the low-density check LDPC code word of input, in described LDPC code word filling information is set, and the check information in the code word is provided with, and obtains new code word.
Decoding unit 602, the relation that is used for the new code word that obtains according to the described processing unit 601 LDPC check matrix corresponding with it is decoded.The LDPC code word that described processing unit 601 obtains input is LDPC (2040,1528); Accordingly, add 5 information filling bits " 00000 " at the 1528th bit end, and deletion check information end 1 verification filling bit " 0 ", obtain new code word c '.
It is that zero relation is carried out and amassed computing, the information of 1528 information bits importing when solving original encoding that the check matrix that described decoding unit 602 obtains the new code word LDPC corresponding with it (2044,1533) according to described processing unit 601 multiplies each other.Because in error free channel, c ' satisfies following formula: H QcC '=o, so according to following formula, in thanksing for your hospitality channel, decoder can recover correct information sequence a by existing sum-product algorithm etc., i.e. the information of 1528 information bits of input during the original coding of output.
In sum, the RS sign indicating number that adopts the LDPC sign indicating number to replace DVB-H standard Central Plains to adopt by the information to input in the embodiment of the invention carries out forward error correction coding, and corresponding decoding, therefore can obtain higher coding gain, find at BER to be 10 through the simulation performance correlation curve of emulation experiment -6The time, compare with adopting the RS sign indicating number, adopt the LDPC sign indicating number can obtain the coding gain of about 6dB, thereby also improved the anti-error code capacity of system under abominable channel condition on largely.
Further, the embodiment of the invention specifically is to adopt and the close LDPC (2040 of RS (255,191) code check, 1528) replace RS (255,91) carry out forward error correction coding, therefore when obtaining higher coding gain, also make things convenient for the application in the DVB-H standard.
Further, the embodiment of the invention also can change code check, and the variation of code check realizes by the part rows in the deletion checking data table.The 39th row are to the 64th row (the 1833rd to 2040 bit in the corresponding former code word) in the deletion checking data table, the acquisition code check is 5/6 code word, the 28th row are to the 64th row (the 1745th to 2040 bit in the corresponding former code word) in the deletion checking data table, and the acquisition code check is 7/8 code word.
More than coding, coding/decoding method and encoder, decoder that the embodiment of the invention provided are described in detail, for one of ordinary skill in the art, thought according to the embodiment of the invention, part in specific embodiments and applications all can change, in sum, this description should not be construed as limitation of the present invention.

Claims (14)

1, a kind of coding method is characterized in that, comprising:
Obtain input information;
At described input information end filling information is set; Describedly at described input information end filling information is set and is: the information filling bit that adds first predetermined number at the end of input information;
According to the generator matrix of low-density check LDPC sign indicating number the described input information that is provided with behind the filling information is encoded, obtain corresponding codewords;
The described code word that obtains is deleted the filling information of described setting, and the check information in the code word is provided with back output.
2, coding method according to claim 1 is characterized in that:
The bit of the described input information that obtains is for setting number;
The input information of the generator matrix of described low-density check LDPC sign indicating number after according to the information filling bit that adds first predetermined number determined;
Described check information in the code word is set to: the verification filling bit that adds second predetermined number behind the check information in code word.
3, coding method according to claim 2 is characterized in that:
The bit of the described input information that obtains is 1528 information bits;
The described filling information that is provided with at described input information end adds 5 information filling bits for the end at input information;
The generator matrix of described low-density check LDPC sign indicating number is the generator matrix that 1533 information bits are defined as LDPC (2044,1533) according to the input information that adds behind 5 information filling bits;
Described check information in the code word is set to: 1 verification filling bit is added at the check information end in code word;
The LDPC code word of output is LDPC (2040,1528).
4, according to claim 2 or 3 described coding methods, it is characterized in that:
The information filling bit of described interpolation and verification filling bit are 0.
5, coding method according to claim 3 is characterized in that:
Further comprise and to export behind the 1745th to 2040 bit in the 1833rd to 2040 bit or the deletion code word in described LDPC (2040,1528) the deletion code word.
6, coding method according to claim 1 is characterized in that:
Generator matrix basis and the relation that the LDPC check matrix satisfies of described LDPC calculate, and described satisfied pass is: GH T=0, H TBe the transposed matrix of LDPC check matrix H, G is the generator matrix of LDPC.
7, a kind of coding/decoding method is characterized in that, comprising:
Obtain the low-density check LDPC code word of input, in described LDPC code word, filling information is set, and the check information in the code word is provided with, obtain new code word;
Relation according to the described new code word LDPC check matrix corresponding with it is decoded.
8, coding/decoding method according to claim 7 is characterized in that:
Describedly in described LDPC code word, filling information is set and is: the information filling bit that in described LDPC code word, adds first predetermined number;
Described check information in the code word is set to: the verification filling bit of the check information in the code word being deleted second predetermined number.
9, coding/decoding method according to claim 7 is characterized in that, comprising:
The described LDPC code word of obtaining input is LDPC (2040,1528);
Add 5 information filling bits at the 1528th information bit end, and 1 verification filling bit at the check information end in the deletion code word, new code word obtained;
Multiplying each other according to the check matrix of the described new code word LDPC (2044,1533) corresponding with it is that zero relation is carried out and amassed computing, the information of 1528 information bits importing when solving original encoding.
10, a kind of encoder is characterized in that, comprising:
First processing unit is used to obtain input information, at described input information end filling information is set; Describedly at described input information end filling information is set and is: the information filling bit that adds first predetermined number at the end of input information;
Coding unit is used for according to the generator matrix of low-density check LDPC sign indicating number the described input information that is provided with behind the filling information being encoded, and obtains corresponding codewords;
Second processing unit is used for the described code word that obtains is deleted the filling information of described setting, and the check information in the code word is provided with back output.
11, encoder according to claim 10 is characterized in that:
The bit of the input information that described first processing unit obtains is 1528 information bits, adds 5 information filling bits at the 1528th information bit end;
Described coding unit is that 1533 information bits determine that the generator matrix of low-density check LDPC sign indicating number is LDPC (2044 according to the input information that described first processing unit adds behind 5 information filling bits, 1533) generator matrix, according to LDPC (2044,1533) generator matrix is encoded to 1533 information bits, and obtaining corresponding codewords is 2044 bits;
2044 bits after described second processing unit is encoded described coding unit are deleted 5 information filling bits of described interpolation, and 1 the verification filling bit of interpolation of the check information end in code word obtains the output of LDPC (2040,1528) back.
12, encoder according to claim 11 is characterized in that, described encoder further comprises:
The code check adjustment unit is used to adjust code check, and the code check adjustment unit obtains in LDPC (2040,1528) the back deletion code word exporting behind the 1745th to 2040 bit in the 1833rd to 2040 bit or the deletion code word at described second processing unit.
13, a kind of decoder is characterized in that, comprising:
Processing unit is used to obtain the low-density check LDPC code word of input, in described LDPC code word filling information is set, and the check information in the code word is provided with, and obtains new code word;
Decoding unit, the relation that is used for the new code word that obtains according to the described processing unit LDPC check matrix corresponding with it is decoded.
14, decoder according to claim 13 is characterized in that:
The LDPC code word that described processing unit obtains input is LDPC (2040,1528); Add 5 information filling bits at the 1528th information bit end, and 1 verification filling bit at the check information end in the deletion code word, new code word obtained;
It is that zero relation is carried out and amassed computing, the information of 1528 information bits importing when solving original encoding that described decoding unit multiplies each other according to the check matrix of the new code word that described processing unit the obtains LDPC (2044,1533) corresponding with it.
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