WO2018137511A1 - 一种信息传输方法及设备 - Google Patents
一种信息传输方法及设备 Download PDFInfo
- Publication number
- WO2018137511A1 WO2018137511A1 PCT/CN2018/072809 CN2018072809W WO2018137511A1 WO 2018137511 A1 WO2018137511 A1 WO 2018137511A1 CN 2018072809 W CN2018072809 W CN 2018072809W WO 2018137511 A1 WO2018137511 A1 WO 2018137511A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- bit
- information
- bits
- information sequence
- sequence
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0006—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission format
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0072—Error control for data other than payload data, e.g. control data
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0079—Formats for control data
Definitions
- the present invention relates to the field of communications technologies, and in particular, to an information transmission method and device.
- the physical layer broadcast channel is a physical layer broadcast channel of Long Term Evolution (LTE).
- the network device can send information bits to the terminal through the PBCH, and the system bandwidth and physical hybrid automatic retransmission indication are as follows. Physical (HybridHybrid ARQ Indicator Channel, PHICH) configuration, System Frame Number (SFN), and reserved bits.
- PHICH HybridHybrid ARQ Indicator Channel
- SFN System Frame Number
- CRC Cyclic Redundancy Check
- the network device will repeat the transmission 4 times in the 40 ms period through the PBCH, and the coded bits carried each time are the same.
- the mode of carrying the lowest frame number of the system frame is: the information of 4 repeated transmissions is scrambled by different scrambling sequences, and the lowest 2 bits of the system frame number can be carried by the scrambling sequence.
- each transmitted information bit and CRC are scrambled using different scrambling sequences, each time the terminal receives the information bits and the CRC, it needs to use four kinds of scrambling sequences to respectively try to receive the information bits.
- the CRC uses the scrambling sequence, so that each time the information bits and the CRC are received, it is necessary to perform multiple attempts to scramble the sequence for decoding, thereby increasing the delay of the terminal acquiring the information bits.
- the embodiment of the invention discloses an information transmission method and device, which are used for reducing the delay of acquiring information by the terminal.
- the first aspect discloses an information transmission method, which is applied to a network device, determines a CRC of an information bit to be transmitted, and concatenates a CRC and an information bit to be transmitted to obtain a first information sequence, and bits in the first information sequence
- the interleaving is performed in an interleaving manner or scrambled to obtain a second information sequence, and the second information sequence is cyclically shifted to obtain a third information sequence, and the third information sequence is transmitted. Since the number of bits of the cyclic shift carries the information of the partial bits of the system frame number, so that the terminal can determine the shift of the information before the network device sends the information by means of the reverse cyclic shifting, thereby determining the system frame number.
- the number of decodings can be reduced, thereby reducing the delay of the terminal acquiring information.
- the interleaving method or the scrambling method can ensure that the bit at the CRC position after the cyclic shift cannot verify the bit at the information bit position to be transmitted after the cyclic shift, therefore, only when the number of bits of the cyclic shift is correctly determined.
- the CRC check can pass, and therefore, the information of the partial bits of the system frame number carried by the number of bits of the cyclic shift can be accurately determined, so that The terminal can accurately obtain the information sent by the network device.
- the preset bits in the reserved bits may be set to 1 to obtain target information bits, the CRC of the target information bits is determined, and the CRC and target information are concatenated to obtain a first sequence of information. Since the information bits to be transmitted are all 0s by setting the preset bits in the reserved bits to 1 when the reserved bits are all 0, the interleaving can ensure that the cyclic shift is in place. The bit of the CRC position cannot verify the bit at the information bit position to be transmitted after the cyclic shift, so that the terminal can accurately acquire the information transmitted by the network device.
- the information bits to be transmitted may include reserved bits, and the bits in the first bit may be exchanged with the bits in the second bit to obtain a fourth information sequence, and the fourth information sequence is determined to be the first Two information sequences.
- the first bit is the first bit of the first information sequence
- the second bit is any bit of the reserved bit
- the bit of the first bit after the interleaving is 1, and the interleaving mode can be achieved by means of switching. It can be ensured that the bit at the CRC position after the cyclic shift cannot verify the bit at the information bit position to be transmitted after the cyclic shift, and therefore, the information bit to be transmitted is cyclically shifted only when the number of bits of the cyclic shift is correctly determined.
- the CRC check can pass, so that the information of the partial bit of the system frame number carried by the number of bits of the cyclic shift can be accurately determined, so that the terminal can accurately obtain the network device to transmit.
- Information when the bits included in the reserved bits are all 0, the bits of the second bit need to be set to 1 before the interleaving; when the bits included in the reserved bits are all 1, no need to be performed before the interleaving is performed.
- the bits of the t bits other than the second bit of the reserved bits and the bits of the t bits other than the bits included in the reserved bits of the fourth information sequence may be performed. Exchanging to obtain a fifth sequence of information and determining the fifth sequence of information as a second sequence of information. Where t is greater than or equal to 1 and less than the number of bits of the reserved bits, and the bits in the t bits of the reserved bits are all 1, and the interleaving mode can be further achieved by switching, and the cyclic shift can be ensured.
- the bit at the CRC position cannot verify the bit at the information bit position to be transmitted after the cyclic shift, and therefore, the information bit to be transmitted is cyclically shifted to the non-cyclic shift only when the number of bits of the cyclic shift is correctly determined.
- the CRC check can pass, so that the information of the partial bits of the system frame number carried by the number of bits of the cyclic shift can be accurately determined, so that the terminal can accurately acquire the information sent by the network device.
- the information bits to be transmitted may include reserved bits, and the bits in the first bit may be shifted to the forefront of the first information sequence to obtain a fourth information sequence, and the fourth information sequence is determined to be the second.
- the first bit is any bit of the reserved bit, and the bit in the first bit is 1.
- the purpose of the interleaving mode is achieved by shifting, and the bit at the CRC position after the cyclic shift can be verified.
- the bit that is in the position of the information bit to be transmitted after the cyclic shift therefore, the CRC check is only performed when the number of bits of the cyclic shift is correctly determined, and the information bits to be transmitted are cyclically shifted to the position before the cyclic shift.
- the information of the partial bits of the system frame number carried by the number of bits of the cyclic shift can be accurately determined, so that the terminal can accurately acquire the information sent by the network device.
- the bits in the second bit can be shifted to the target location to obtain a fifth sequence of information, and the fifth sequence of information is determined as the second sequence of information.
- the second bit is any one of the t bits except the first bit in the reserved bit
- the target position is any one of the t gaps except the target gap in the fourth information sequence.
- the target gap is the gap between the bits except the first bit in the reserved bits, t is greater than or equal to 1 and less than the number of bits of the reserved bits, the bit in the second bit is 1, further shifted by
- the way to achieve the interleaving mode ensures that the bit at the CRC position after the cyclic shift cannot verify the bit at the information bit position to be transmitted after the cyclic shift, and therefore, only when the number of bits of the cyclic shift is correctly determined,
- the CRC check can pass, and therefore, the information of the partial bits of the system frame number carried by the number of bits of the cyclic shift can be accurately determined, so that the terminal The information sent by the network device can be accurately obtained.
- the information bits to be transmitted may include reserved bits, the bits in the third bit may be shifted to the forefront of the first information sequence to obtain a fourth information sequence, and the fourth information sequence is determined to be the second Information sequence.
- the third bit is the last bit in the first information sequence
- the first bit of the fourth information sequence is 1, and the purpose of the interleaving mode is achieved by shifting, and the CRC position after the cyclic shift can be ensured.
- the bit cannot verify the bit at the position of the information bit to be transmitted after the cyclic shift, and therefore, only when the number of bits of the cyclic shift is correctly determined, the information bits to be transmitted are cyclically shifted back to the position before the cyclic shift.
- the CRC check can pass, so that the information of the partial bits of the system frame number carried by the number of bits of the cyclic shift can be accurately determined, so that the terminal can accurately acquire the information sent by the network device.
- the third information sequence may be sequentially encoded and rate matched to obtain a sixth information sequence, and then the sixth information sequence is sent, thereby improving reliability of information transmission.
- the second information sequence may be encoded to obtain a sixth information sequence, and then the sixth information sequence is cyclically shifted to obtain a third information sequence, thereby improving reliability of information transmission.
- a second aspect discloses a network device comprising means for performing the information transmission method provided by the first aspect or any of the possible implementations of the first aspect.
- a third aspect discloses a network device comprising a processor, a memory and a transceiver, the memory for storing program code, the processor for executing program code, and the transceiver for communicating with the terminal.
- the processor executes the program code stored in the memory, the processor is caused to perform the information transmission method disclosed in any of the possible implementations of the first aspect or the first aspect.
- a fourth aspect discloses a readable storage medium storing program code for a network device to perform the information transmission method disclosed in the first aspect or any of the possible implementations of the first aspect.
- the fifth aspect discloses an information transmission method, which is applied to a network device, determines a cyclic redundancy check CRC of information bits to be sent, and cascades the CRC and the information bits to be transmitted to obtain a first information sequence, and the first information is obtained.
- the sequence is cyclically shifted to obtain a second sequence of information, and the second sequence of information is transmitted. Since the number of bits of the cyclic shift carries the information of the partial bits of the system frame number, so that the terminal can determine the shift of the information before the network device sends the information by means of the reverse cyclic shifting, thereby determining the system frame number. It can be seen that there is no need to perform multiple decodings.
- the information bit to be transmitted includes a reserved bit, at least one bit of the reserved bit is at the forefront of the information bit to be transmitted, and the bit of the reserved bit in the first bit of the information bit to be transmitted is 1, which can ensure the CRC position after the cyclic shift.
- the bit cannot verify the bit at the information bit position to be transmitted after the cyclic shift, so that the terminal can accurately acquire the information sent by the network device.
- the t bits of the reserved bits are in a bit other than the bit of the information bit to be transmitted and the bit position of the reserved bit position, and the bits in each of the t bits are all 1 to further ensure cyclic shift
- the bit that is in the CRC position cannot verify the bit that is in the information bit position to be transmitted after the cyclic shift, so that the terminal can accurately acquire the information sent by the network device.
- t is greater than or equal to 1 and less than the number of bits of the reserved bit
- the second information sequence may be first encoded and rate matched to obtain a third information sequence, and then the third information sequence is sent, thereby improving reliability of information transmission.
- the first information sequence may be first encoded to obtain a fourth information sequence, and then the fourth information sequence is cyclically shifted to obtain a second information sequence, thereby improving reliability of information transmission.
- a sixth aspect discloses a network device, the network device comprising means for performing the information transmission method provided by any of the possible implementations of the fifth aspect or the fifth aspect.
- a seventh aspect discloses a network device comprising a processor, a memory and a transceiver, a memory for storing program code, a processor for executing program code, and a transceiver for communicating with the terminal.
- the processor executes the program code stored in the memory, the processor is caused to perform the information transmission method disclosed in any of the possible implementations of the fifth aspect or the fifth aspect.
- the eighth aspect discloses a readable storage medium storing program code for a network device to perform the information transmission method disclosed in any of the possible implementations of the fifth aspect or the fifth aspect.
- the ninth aspect discloses an information transmission method, which is applied to a terminal, receives a first information sequence sent by a network device, and cyclically shifts the first information sequence to obtain a second information sequence, and uses the second information according to the interleaving manner.
- the sequence is deinterleaved, or the second information sequence is descrambled according to the scrambling manner to obtain a third information sequence.
- the third information sequence CRC check passes, the bits in the third information sequence at the information bit position are determined.
- the number of bits of the system frame number is determined according to the mapping relationship by the number of bits of the reverse cyclic shift.
- the terminal can determine the system frame number by shifting the information before the network device sends the information by means of the reverse cyclic shift shift, it is visible that the decoding is not performed multiple times, so the number of decodings can be reduced. Therefore, the delay of obtaining information by the terminal can be reduced.
- the interleaving method or the scrambling method can ensure that the bit at the CRC position after the cyclic shift cannot verify the bit at the information bit position after the cyclic shift, only when the number of bits of the reverse cyclic shift is correctly determined The CRC check can pass, so that the information of the partial bits of the system frame number carried by the number of bits of the cyclic shift can be accurately determined, so that the terminal can accurately acquire the information sent by the network device.
- the information bits include reserved bits, and the bits in the preset bits in the reserved bits are 1, so that when the number of bits of the reverse cyclic shift is correctly determined, the CRC check can pass, so that the terminal can Accurately obtain information sent by network devices.
- the second information sequence may include reserved bits, and the bits in the first bit may be exchanged with the bits in the second bit to obtain a fourth information sequence, and the fourth information sequence is determined as The third sequence of information.
- the first bit is the first bit of the second information sequence
- the second bit is the preset bit at the reserved bit position.
- the bits in the t preset bits other than the second bit in the reserved bit position and the bits in the fourth information sequence other than the reserved bit position and the first bit may be The bits in the t preset bits are exchanged to obtain a fifth information sequence, and the fifth information sequence is determined as a third information sequence. Where t is greater than or equal to 1 and less than the number of bits of the reserved bits.
- the second sequence of information may include reserved bits, the first bit of the second sequence of information may be shifted to the first gap to obtain a fourth sequence of information, and the fourth sequence of information is determined to be a third sequence of information.
- the first gap is a preset gap between the bits in the reserved bit position.
- the bits in the t preset bits can be shifted to t preset gaps respectively to obtain a fifth information sequence, and the fifth information sequence is determined as the third information sequence.
- t is greater than or equal to 1 and less than the number of bits of the reserved bit.
- the second information sequence may include a reserved bit, and the first bit of the second information sequence may be bit-shifted to the last side of the second information sequence to obtain the fourth information, and the fourth information is obtained.
- the sequence is determined to be a third sequence of information.
- the first information sequence may be first decoded to obtain a sixth information sequence, and the sixth information sequence may be cyclically shifted in reverse to obtain a second information sequence, which may reduce the number of decodings.
- the second information sequence may be first decoded to obtain a sixth information sequence, and then the sixth information sequence may be deinterleaved according to the interleaving manner, or the second information sequence may be descrambled according to the scrambling manner.
- a third sequence of information is obtained.
- a tenth aspect discloses a terminal, the terminal comprising means for performing the information transmission method provided by any of the possible implementations of the ninth aspect or the ninth aspect.
- An eleventh aspect discloses a terminal comprising a processor, a memory and a transceiver, the memory for storing program code, the processor for executing program code, and the transceiver for communicating with the network device.
- the processor executes the program code stored in the memory, the processor is caused to perform the information transmission method disclosed in any of the possible implementations of the ninth aspect or the ninth aspect.
- a twelfth aspect discloses a readable storage medium storing program code for a terminal for performing the information transmission method disclosed in any of the possible implementations of the ninth aspect or the ninth aspect.
- a thirteenth aspect discloses an information transmission method, which is applied to a terminal, receives a first information sequence sent by a network device, and cyclically shifts the first information sequence to obtain a second information sequence, where the second information sequence
- the bit at the information bit position in the second information sequence is determined as the information bit
- the number of bits of the reverse cyclic shift is determined according to the mapping relationship
- the information bit includes the reserved bit.
- At least one bit of the reserved bit is at the forefront of the information bit, and the bit of the reserved bit at the first bit of the information bit is one. Since the terminal can determine the system frame number before the network device transmits the information by means of the reverse shift, the system frame number is determined, so that it is not necessary to perform multiple decodings.
- the number of decodings can be reduced, thereby reducing terminal acquisition.
- the delay of the information since the bit of the reserved bit in the first bit of the information bit is 1, only when the number of bits of the reverse cyclic shift is correctly determined, the CRC check can pass, so that the terminal can accurately acquire the information transmitted by the network device.
- the t bits of the reserved bits are at bits other than the bits of the information bit first and the reserved bit position, the bits of the t bits are all 1 so that only when the correct determination is reversed When the number of bits is cyclically shifted, the CRC check can pass, so that the terminal can accurately obtain the information sent by the network device.
- t is greater than or equal to 1 and less than the number of bits of the reserved bit
- the first information sequence may be first decoded to obtain a third information sequence, and the third information sequence may be cyclically shifted in reverse to obtain a second information sequence, which may reduce the number of decodings.
- the second sequence of information may be first decoded to obtain a third sequence of information, and when the third sequence of information CRC is passed, the bits at the position of the information bits in the third sequence of information are determined as information bits.
- a fourteenth aspect discloses a terminal, the terminal comprising means for performing the information transmission method provided by the thirteenth aspect or any of the possible implementations of the thirteenth aspect.
- a fifteenth aspect discloses a terminal comprising a processor, a memory and a transceiver, the memory for storing program code, the processor for executing program code, and the transceiver for communicating with the network device.
- the processor executes the program code stored in the memory, the processor is caused to perform the information transmission method disclosed in any one of the thirteenth aspect or the thirteenth aspect.
- a sixteenth aspect discloses a readable storage medium storing program code for a terminal for performing the information transmission method disclosed in any one of the thirteenth aspect or the thirteenth aspect.
- FIG. 1 is a schematic diagram of a network architecture disclosed in an embodiment of the present invention.
- FIG. 2 is a schematic flowchart of an information transmission method according to an embodiment of the present invention.
- FIG. 3 is a schematic flowchart diagram of another information transmission method according to an embodiment of the present invention.
- FIG. 4 is a schematic structural diagram of a network device according to an embodiment of the present invention.
- FIG. 5 is a schematic structural diagram of another network device according to an embodiment of the present disclosure.
- FIG. 6 is a schematic structural diagram of still another network device according to an embodiment of the present disclosure.
- FIG. 7 is a schematic structural diagram of still another network device according to an embodiment of the present disclosure.
- FIG. 8 is a schematic structural diagram of a terminal according to an embodiment of the present disclosure.
- FIG. 9 is a schematic structural diagram of another terminal according to an embodiment of the present disclosure.
- FIG. 10 is a schematic structural diagram of still another terminal according to an embodiment of the present invention.
- FIG. 11 is a schematic structural diagram of still another terminal according to an embodiment of the present invention.
- FIG. 12 is a schematic structural diagram of still another network device according to an embodiment of the present disclosure.
- FIG. 13 is a schematic structural diagram of still another network device according to an embodiment of the present disclosure.
- FIG. 14 is a schematic structural diagram of still another network device according to an embodiment of the present disclosure.
- FIG. 15 is a schematic structural diagram of still another network device according to an embodiment of the present disclosure.
- FIG. 16 is a schematic structural diagram of still another terminal according to an embodiment of the present invention.
- FIG. 17 is a schematic structural diagram of still another terminal according to an embodiment of the present invention.
- FIG. 18 is a schematic structural diagram of still another terminal according to an embodiment of the present invention.
- FIG. 19 is a schematic structural diagram of still another terminal according to an embodiment of the present invention.
- the embodiment of the invention discloses an information transmission method and device, which are used for reducing the delay of acquiring information by the terminal. The details are described below separately.
- the network device transmits the information sequence 4 times in the 40 ms period through the PBCH, and the information sequence transmitted each time carries the same coded bits, but the number of bits of the cyclic shift is different.
- the terminal can try different cyclic shift bits by using the CRC in the information sequence. If the CRC check passes, the number of cyclic shift bits can be determined, and the system frame number of the information bit can be determined, that is, the minimum SFN is determined. Bit.
- the scheme utilizes the characteristics of cyclic shift of Tail Biting Convolutional Codes (TBCC), which can reduce the number of decodings during blind detection and reduce the delay.
- TBCC Tail Biting Convolutional Codes
- the CRC check according to the information bits before the cyclic shift and the CRC bit position will also pass, that is, the system frame number of the transmission information sequence cannot be accurately determined. As a result, the system will not work at certain moments, and the system design is flawed.
- the obtained CRC can be [c 1 , c 2 , c 3 , ..., c M ], and the information bits and CRC can be concatenated into [a 1 , a 2 , a 3 , ..., a N , c 1 , c 2 , c 3 , ..., c M ], according to the CRC check principle, the sequence [a 1 , a 2 , a 3 , ..., a N , c 1 , When c 2 , c 3 , ..., c M ] can be divisible by [b 1 , b 2 , b 3 ,
- FIG. 1 is a schematic diagram of a network architecture disclosed in an embodiment of the present invention.
- the network architecture can include a network device 101 and at least one terminal 102.
- the network device 101 is configured to transmit information bits to the terminal 102, the information bits including at least information of reserved bits and partial bits of the system frame number.
- the network device 101 In order for the terminal 102 to determine whether the received information bits are correct, the network device 101 also needs to determine the CRC of the information bits and cascade the information bits and CRCs to the terminal 102 for the information sequence.
- the information sequence can be cyclically shifted to carry the information of the remaining partial bits of the system frame number by the number of cyclically shifted bits.
- the terminal 102 is configured to receive a sequence of information sent by the network device 101, determine a information bit included in the information sequence by using a reverse cyclic shift and a CRC check, and determine, by using a reverse cyclic shift of the number of bits, the network device by using a cyclic shift Information about a portion of the bits of the system frame number carried by the bit.
- the network device 101 may be a device for communicating with the terminal 102, for example, may be a Global System for Mobile communication (GSM) or a base station in Code Division Multiple Access (CDMA) (Base). Transceiver Station (BTS), which can also be a base station (NodeB, NB) in a Wideband Code Division Multiple Access (WCDMA) system, or an evolved type in a Long Term Evolution (LTE) system.
- the base station (Evolutional Node B, eNB or eNodeB) may also be a terminal that functions as a network device in Device to Device (D2D) communication, and may also be a relay station, an access point, an in-vehicle device, a transmitting point, and a wearable device.
- D2D Device to Device
- the device and the network side device in the future 5G network or the network device in the future evolution of the Public Land Mobile Network (PLMN), or any device that undertakes the network function.
- PLMN Public Land Mobile Network
- the terminal 102 can be a User Equipment (UE), an access terminal, a subscriber unit, a subscriber station, a mobile station, a mobile station, a remote station, a remote terminal, a mobile device, a user terminal, a wireless communication device, a user agent, or a user device.
- the access terminal may be a cellular phone, a cordless phone, a Session Initiation Protocol (SIP) phone, a Wireless Local Loop (WLL) station, a Personal Digital Assistant (PDA), with wireless communication.
- FIG. 2 is a schematic flowchart of an information transmission method according to an embodiment of the present invention.
- the information transmission method is described from the perspective of the network device 101 and the terminal 102.
- the data transmission method may include the following steps.
- the network device determines a CRC of information bits to be sent.
- the CRC of the information bits to be transmitted is determined.
- the CRC is calculated by using the information bits to be sent, and the terminal can determine whether the received information bits are correct information bits through the CRC, so that the terminal can accurately determine the transmitted information through the CRC.
- the information bits to be transmitted include reserved bits, and the reserved bits may be all 0 sequences, may be all 1 sequences, or may be other sequences.
- the network device cascades the CRC and the information bits to be sent to obtain a first information sequence.
- the CRC and the information bits to be sent are cascaded, and the first information sequence may be obtained.
- the CRC may be cascaded after the information bits to be sent, or may be
- the cascading of the information bits to be transmitted after the CRC may be performed by inserting the CRC into a certain position in the middle of the information bits to be transmitted, and may also be in another cascading manner, which is not limited in this embodiment.
- the bits in the reserved bits may be continuous or intermittent.
- the 10th to 15th bits in the first information sequence may be the positions of the reserved bits, and the 5th and 8th in the first information sequence.
- the 10, 13, 15 and 17 bits can be the position of the reserved bits.
- the preset bit in the reserved bit may be set to 1, the target information bit is obtained, and the CRC of the information bit to be transmitted is determined, that is, the CRC of the target information bit is determined.
- the CRC and the information to be transmitted are cascaded to obtain a first information sequence, that is, the CRC and the target information are concatenated to obtain a first information sequence, and the case where the information bits are all zeros can be avoided.
- the network device interleaves the bits in the first information sequence according to an interleaving manner or performs scrambling according to a scrambling manner to obtain a second information sequence.
- the bits in the first information sequence are interleaved according to the interleaving manner or scrambled according to the scrambling manner, so that the second device can obtain the second
- the sequence of information is such that by interleaving or scrambling it is ensured that the bits at the CRC position after the cyclic shift cannot verify the bits at the information bit position to be transmitted after the cyclic shift.
- the interleaving mode or the scrambling mode may be predetermined, such as determining according to the number of bits of the cyclic shift.
- the bits in the first bit may be exchanged with the bits in the second bit to obtain a fourth information sequence, and the fourth information sequence is determined as the second information sequence.
- the first bit is the first bit of the first information sequence
- the second bit is any bit of the reserved bit
- the bit of the first bit after the interleaving is 1.
- the bit in the second bit before the interleaving is 0, the bit in the second bit may be first set to 1 and then interleaved; or the interleaving may be performed first, and then the bit in the first bit after the interleaving is performed. Set to 1.
- bits in the t bits other than the second bit in the reserved bits may be used.
- the bits in the t bits other than the bits included in the reserved bits in the fourth information sequence are exchanged to obtain a fifth information sequence, and the fifth information sequence is determined as the second information sequence.
- t is greater than or equal to 1 and less than the number of bits of the reserved bits, and the bits of the t bits in the reserved bits are all 1.
- the bit in the first bit can be shifted to the forefront of the first information sequence to obtain the fourth information sequence, and the fourth information sequence is determined as the second information sequence.
- the bit in the first bit is 1.
- the bit in the second bit may be shifted to the target position to obtain the fifth information sequence. And determining the fifth information sequence as the second information sequence.
- the target position is any gap among the t gaps except the target gap in the fourth information sequence, and the target gap is a gap between the bits except the first bit in the reserved bits
- the second bit is Any one of the t bits other than the first bit in the reserved bit, t is greater than or equal to 1 and less than the number of bits of the reserved bit, and the bit in the second bit is 1.
- the bit in the third bit may be shifted to the forefront of the first information sequence to obtain a fourth information sequence, and the fourth information sequence is determined as the second information sequence.
- the third bit is the last bit in the first information sequence, and the first bit of the fourth information sequence is 1.
- the bits in the first information sequence are scrambled according to the scrambling manner, and the first information sequence may be added to the preset sequence.
- the length of the preset sequence is the same as the length of the first information sequence.
- the preset sequence is 40 bits, when the part of the system frame number to be carried is 2 bits, the information of the frame number of the 2-bit system can be carried by the number of bits 0, 10, 20, 30 of the cyclic shift.
- the preset sequence may be 0100011001110100111101000010101101010000, but the preset sequence is not unique.
- the network device cyclically shifts the second information sequence to obtain a third information sequence.
- the information bit to be transmitted further includes information of a partial bit of the system frame number. Therefore, in order to transmit the information of the remaining part of the system frame number to the terminal, the second information sequence may be cyclically shifted to obtain a third.
- the sequence of information is such that the information of the remaining portion of the system frame number is carried by the number of bits of the cyclic shift.
- the number of cyclic shift bits includes 2n. For example, when the remaining part of the system frame number is 2, the system frame number can be carried by the number of four cyclic shift bits. The remaining 2 bits.
- the network device sends a third information sequence to the terminal.
- the third information sequence is sent to the terminal, and may be sent in a broadcast manner, or may be sent through the PBCH.
- the transmission may be performed by other means, which is not limited in this embodiment.
- the third information sequence may be sequentially encoded and rate matched to obtain a sixth information sequence, and then the sixth information sequence is sent.
- Information sequence may be sequentially encoded and rate matched to obtain a sixth information sequence, and then the sixth information sequence is sent.
- the second information sequence may be first encoded to obtain the sixth information.
- the sequence is then cyclically shifted by the sixth information sequence to obtain a third sequence of information.
- the third information sequence may also be rate matched and then transmitted.
- the encoded information sequence may be [a k+1 , a k+2 , . . . , a N , a 1 , a 2 , . . . , a k ], and the coding sequence or coding after cyclic shifting by k bits
- the sequence of post-cyclic shift k bits can be
- the terminal cyclically shifts the third information sequence in reverse to obtain a seventh information sequence.
- the terminal after receiving the third information sequence sent by the network device, the terminal cyclically shifts the third information sequence to obtain a seventh information sequence.
- the number of bits of the reverse cyclic shift may be greater than or equal to 0 and less than or equal to the length of the third information sequence, and the number of bits of the reverse cyclic shift is not fixed.
- the terminal deinterleaves the seventh information sequence according to the interleaving manner, or descrambles the seventh information sequence according to the scrambling manner to obtain an eighth information sequence.
- the seventh information sequence may be deinterleaved according to the interleaving manner, or the seventh information sequence may be descrambled according to the scrambling manner.
- the interleaving mode or the scrambling mode is pre-agreed by the network device and the terminal, and can ensure that the bit in the CRC position after the cyclic shift cannot be verified by the cyclic shift and is in the information bit (ie, the information bit to be transmitted mentioned above). The bit of the location.
- the seventh information sequence includes reserved bits, and the bits in the first bit may be exchanged with the bits in the second bit to obtain a ninth information sequence, and the ninth information sequence is determined to be the eighth.
- Information sequence The first bit is the first bit of the second information sequence, and the second bit is the preset bit at the reserved bit position.
- t pre-predetermined bit positions other than the second bit may be used. Setting a bit in the bit to be exchanged with a bit in the t preset bits in the ninth information sequence except the reserved bit position and the first bit to obtain a tenth information sequence, and The ten information sequence is determined as the eighth information sequence. Where t is greater than or equal to 1 and less than the number of bits of the reserved bits.
- the first information bit of the second information sequence may be bit-shifted to the first gap to obtain a ninth information sequence, and the ninth information sequence is determined as the eighth information sequence.
- the first gap is a preset gap between the bits in the reserved bit position.
- the bits in the t preset bits may be respectively shifted to t preset gaps to obtain The tenth information sequence and the tenth information sequence is determined as the eighth information sequence.
- the first bit in the seventh information sequence may be bit-shifted to the last side of the seventh information sequence to obtain the ninth information, and the ninth information sequence is determined as the eighth information sequence.
- the terminal determines the bit at the information bit position in the eighth information sequence as the information bit, and determines the part of the system frame number according to the mapping relationship according to the mapping relationship. Bit.
- the terminal deinterleaves the seventh information sequence according to the interleaving manner, or descrambles the seventh information sequence according to the scrambling manner, and after obtaining the eighth information sequence, according to the CRC check in the eighth information sequence.
- the information bits in the eighth information sequence when the check passes, indicate that the number of bits of the reverse cyclic shift is equal to the number of bits of the network device forward cyclic shift, and the bits at the information bit position in the eighth information sequence may be determined.
- the information bits ie, the information bits to be transmitted mentioned by the network device side
- the number of bits of the reverse frame cyclic shift are determined according to the mapping relationship, thereby determining the third information bit sequence is through the system frame. The number was sent over.
- the first CRC of the bit at the information bit position in the eighth information sequence may be calculated, and the first CRC is compared with the second CRC at the CRC position in the eighth information sequence, when the first CRC is related to the second CRC At the same time, it indicates that the verification passed.
- the information bits may include reserved bits, and the bits in the preset bits in the reserved bits are 1.
- the terminal may first perform rate matching on the third information sequence, and then perform reverse cyclic shift on the third information of the de-rate matching to obtain a seventh information sequence. Then, the seventh information sequence may be first decoded to obtain an eleventh information sequence, and then the eleventh information sequence is deinterleaved according to the interleaving manner, or the eleventh information sequence is descrambled according to the scrambling manner, The eighth information sequence is obtained.
- the terminal may perform de-rate matching and decoding on the third information sequence to obtain an eleventh information sequence, and then cyclically shift the eleventh information sequence to obtain a seventh information sequence.
- the network device determines a CRC of information bits to be transmitted, and concatenates the CRC and the information bits to be transmitted to obtain a first information sequence, and interleaves the bits in the first information sequence.
- the CRC check passes, the bit at the information bit position in the eighth information sequence is determined as the information bit, and the bit number of the reverse cyclic shift is determined according to the mapping relationship to determine a partial bit of the system frame number.
- the terminal Since the number of bits of the cyclic shift carries the information of the partial bits of the system frame number, so that the terminal can determine the shift of the information before the network device sends the information by means of the reverse cyclic shifting, thereby determining the system frame number. It can be seen that there is no need to perform multiple decodings. Therefore, the number of decodings can be reduced, thereby reducing the delay of the terminal acquiring information.
- the interleaving method or the scrambling method can ensure that the bit at the CRC position after the cyclic shift cannot verify the bit at the information bit position to be transmitted after the cyclic shift, therefore, only when the number of bits of the cyclic shift is correctly determined.
- the CRC check can pass, and therefore, the information of the partial bits of the system frame number carried by the number of bits of the cyclic shift can be accurately determined, so that The terminal can accurately obtain the information sent by the network device.
- FIG. 3 is a schematic flowchart diagram of another information transmission method according to an embodiment of the present invention. As shown in FIG. 3, the information transmission method is described from the perspective of the network device 101 and the terminal 102. As shown in FIG. 3, the information transmission method may include the following steps.
- the network device determines a CRC of information bits to be sent.
- the CRC of the information bits to be transmitted is determined.
- the CRC is calculated by using the information bits to be sent, and the terminal can determine whether the received information bits are correct information bits through the CRC, so that the terminal can accurately determine the transmitted information through the CRC.
- the information bit to be transmitted includes a reserved bit, at least one bit of the reserved bit is at the forefront of the information bit to be transmitted, and the bit of the reserved bit in the first bit of the information bit to be transmitted is.
- the t bits of the reserved bits may be in a bit other than the bit of the information bit to be transmitted and the bit position of the reserved bit position, and the bits in the t bits are all 1.
- the reserved bits may be all 0 sequences, may be all 1 sequences, or may be other sequences. Where t is greater than or equal to 1 and less than the number of bits of the reserved bits.
- the network device cascades the CRC and the information bits to be sent to obtain a first information sequence.
- the CRC and the information bits to be sent are cascaded, and the first information sequence may be obtained.
- the CRC may be cascaded after the information bits to be sent, or may be
- the cascading of the information bits to be transmitted after the CRC may be performed by inserting the CRC into a certain position in the middle of the information bits to be transmitted, and may also be in another cascading manner, which is not limited in this embodiment.
- the network device cyclically shifts the first information sequence to obtain a second information sequence.
- the information bit to be transmitted further includes information of a part of the bit of the system frame number. Therefore, in order to transmit the information of the remaining part of the system frame number to the terminal, the first information sequence may be cyclically shifted to obtain a second The sequence of information is such that the information of the remaining portion of the system frame number is carried by the number of bits of the cyclic shift.
- the number of cyclic shift bits includes 2n. For example, when the remaining part of the system frame number is 2, the system frame number can be carried by the number of four cyclic shift bits. The remaining 2 bits.
- the second information sequence may be first encoded and rate matched to obtain a third information sequence, and then the third information sequence is transmitted.
- the first information sequence may be first encoded to obtain a fourth information sequence, and then the fourth information sequence is cyclically shifted to obtain a second information sequence.
- the network device sends a second information sequence.
- the second information sequence is sent to the terminal, and may be sent in a broadcast manner, or may be sent through the PBCH.
- the transmission may be performed by other means, which is not limited in this embodiment.
- the terminal cyclically shifts the second information sequence in reverse to obtain a fifth information sequence.
- the terminal after receiving the second information sequence sent by the network device, the terminal cyclically shifts the second information sequence to obtain a fifth information sequence.
- the number of bits of the reverse cyclic shift may be greater than or equal to 0 and less than or equal to the length of the second information sequence, and the number of bits of the reverse cyclic shift is not fixed.
- the terminal determines a bit at the information bit position in the fifth information sequence as the information bit, and determines, according to the mapping relationship, the part of the system frame number according to the mapping relationship. Bit.
- the terminal cyclically shifts the second information sequence in reverse to obtain the fifth information sequence, and the information bits in the fifth information sequence are verified according to the CRC in the fifth information sequence.
- the bit of the information sequence bit in the fifth information sequence can be determined as the information bit (ie, the network device side said to be sent Information bits), and the number of bits of the reverse cyclic shift is determined according to the mapping relationship to determine a partial bit of the system frame number, thereby determining that the second information bit sequence is transmitted through the system frame number.
- the first CRC of the bit at the information bit position in the fifth information sequence may be calculated, and the first CRC is compared with the second CRC at the CRC position in the fifth information sequence, when the first CRC is related to the second CRC At the same time, it indicates that the verification passed.
- the information bit comprises a reserved bit, at least one bit of the reserved bit is at the forefront of the information bit, and the bit of the reserved bit at the first bit of the information bit is 1.
- the t bits of the reserved bits may be in bits other than the bits of the information bit first and the reserved bit position, the bits of the t bits being one.
- the terminal may first perform de-rate matching and decoding on the second information sequence to obtain a sixth information sequence, and then cyclically shift the sixth information sequence to obtain a fifth information sequence.
- the terminal may also first decode the fifth information sequence to obtain a seventh information sequence, and when the seventh information sequence CRC check passes, determine the bit in the seventh information sequence that is in the information bit number. For information bits.
- the network device determines a cyclic redundancy check CRC of the information bits to be transmitted, and the network device cascades the CRC and the information bits to be transmitted to obtain a first information sequence, and the first information The sequence is cyclically shifted to obtain a second information sequence, and the second information sequence is transmitted, and the terminal cyclically shifts the second information sequence to obtain a fifth information sequence.
- the terminal When the fifth information sequence CRC is verified, the terminal The bits in the fifth information sequence that are in the information bit number are determined as information bits, and the number of bits of the reverse cyclic shift is determined according to the mapping relationship to determine a partial bit of the system frame number.
- the information bit to be transmitted includes a reserved bit, at least one bit of the reserved bit is at the forefront of the information bit to be transmitted, and the bit of the reserved bit in the first bit of the information bit to be transmitted is 1, which can ensure the CRC position after the cyclic shift. The bit cannot verify the bit at the information bit position to be transmitted after the cyclic shift, so that the terminal can accurately acquire the information sent by the network device.
- FIG. 4 is a schematic structural diagram of a network device according to an embodiment of the present invention.
- the network device may include:
- a determining module 401 configured to determine a CRC of information bits to be sent
- the cascading module 402 is configured to cascade the CRC determined by the determining module 401 and the information bits to be sent to obtain a first information sequence;
- the obtaining module 403 is configured to interleave the bits in the first information sequence cascaded by the concatenation module 402 according to an interleaving manner or perform scrambling in a scrambling manner to obtain a second information sequence, and the interleaving manner or the scrambling method is used. It is ensured that the bit at the CRC position after the cyclic shift cannot verify the bit at the information bit position to be transmitted after the cyclic shift;
- a looping module 404 configured to cyclically shift the second information sequence obtained by the obtaining module 403 to obtain a third information sequence, where the number of bits of the cyclic shift is used to carry information of a partial bit of the system frame number;
- the sending module 405 is configured to send a third information sequence obtained by the loop module 404.
- FIG. 5 is a schematic structural diagram of another network device according to an embodiment of the present invention.
- the network device shown in FIG. 5 is optimized by the network device shown in FIG. 4, where:
- the information bits to be sent include reserved bits, and the network device may further include:
- a setting module 406 configured to set a preset bit in the reserved bit to 1 to obtain a target information bit
- the determining module 401 is specifically configured to determine a CRC of the target information bits obtained by the setting module 406;
- the cascading module 402 is specifically configured to cascade the CRC determined by the determining module 401 and the target information set by the setting module 406 to obtain a first information sequence.
- the information bits to be sent may include reserved bits
- the obtaining module 403 interleaves the bits in the first information sequence in an interleaving manner to obtain a second information sequence, including:
- the bits in the first bit are exchanged with the bits in the second bit to obtain a fourth information sequence, the first bit being the first bit of the first information sequence and the second bit being any bit of the reserved bit , the bit of the first bit after the interleaving is 1;
- the fourth information sequence is determined as the second information sequence.
- the obtaining module 403 interleaves the bits in the first information sequence in an interleaving manner to obtain the second information sequence, further comprising:
- t is greater than or equal to 1 and less than the number of bits of the reserved bits, and the bits of the t bits in the reserved bits are all 1;
- the obtaining module 403 determines the fourth information sequence as the second information sequence, including:
- the fifth information sequence is determined as the second information sequence.
- the information bits to be sent may include reserved bits
- the obtaining module 403 interleaves the bits in the first information sequence in an interleaving manner to obtain a second information sequence, including:
- the fourth information sequence is determined as the second information sequence.
- the obtaining module 403 interleaves the bits in the first information sequence in an interleaving manner to obtain the second information sequence, further comprising:
- the obtaining module 403 determines the fourth information sequence as the second information sequence, including:
- the fifth information sequence is determined as the second information sequence.
- the information bits to be sent may include reserved bits
- the obtaining module 403 interleaves the bits in the first information sequence in an interleaving manner to obtain a second information sequence, including:
- the fourth information sequence is determined as the second information sequence.
- the network device may further include:
- the encoding module 407 is configured to sequentially perform encoding and rate matching on the third information sequence obtained by the loop module 404 to obtain a sixth information sequence;
- the sending module 405 is specifically configured to send the sixth information sequence obtained by the encoding module 407.
- FIG. 6 is a schematic structural diagram of another network device according to an embodiment of the present invention.
- the network device shown in FIG. 6 is optimized by the network device shown in FIG. 4, where:
- the information bits to be sent include reserved bits, and the network device may further include:
- a setting module 406 configured to set a preset bit in the reserved bit to 1 to obtain a target information bit
- the determining module 401 is specifically configured to determine a CRC of the target information bits obtained by the setting module 406;
- the cascading module 402 is specifically configured to cascade the CRC determined by the determining module 401 and the target information set by the setting module 406 to obtain a first information sequence.
- the information bits to be sent may include reserved bits
- the obtaining module 403 interleaves the bits in the first information sequence in an interleaving manner to obtain a second information sequence, including:
- the bits in the first bit are exchanged with the bits in the second bit to obtain a fourth information sequence, the first bit being the first bit of the first information sequence and the second bit being any bit of the reserved bit , the bit of the first bit after the interleaving is 1;
- the fourth information sequence is determined as the second information sequence.
- the obtaining module 403 interleaves the bits in the first information sequence in an interleaving manner to obtain the second information sequence, further comprising:
- t is greater than or equal to 1 and less than the number of bits of the reserved bits, and the bits of the t bits in the reserved bits are all 1;
- the obtaining module 403 determines the fourth information sequence as the second information sequence, including:
- the fifth information sequence is determined as the second information sequence.
- the information bits to be sent may include reserved bits
- the obtaining module 403 interleaves the bits in the first information sequence in an interleaving manner to obtain a second information sequence, including:
- the fourth information sequence is determined as the second information sequence.
- the obtaining module 403 interleaves the bits in the first information sequence in an interleaving manner to obtain the second information sequence, further comprising:
- the obtaining module 403 determines the fourth information sequence as the second information sequence, including:
- the fifth information sequence is determined as the second information sequence.
- the information bits to be sent may include reserved bits
- the obtaining module 403 interleaves the bits in the first information sequence in an interleaving manner to obtain a second information sequence, including:
- the fourth information sequence is determined as the second information sequence.
- the network device may further include:
- the encoding module 407 is configured to encode the second information sequence obtained by the obtaining module 403 to obtain a sixth information sequence
- the looping module 404 is specifically configured to cyclically shift the sixth information sequence obtained by the encoding module 407 to obtain a third information sequence.
- FIG. 7 is a schematic structural diagram of another network device according to an embodiment of the present invention.
- the network device can include a processor 701, a memory 702, a transceiver 703, and a bus 704. among them:
- bus 704 for implementing a connection between these components
- the memory 702 stores a set of program codes, and the processor 701 is configured to call the program code stored in the memory 702 to perform the following operations:
- the bits in the first information sequence are interleaved according to the interleaving manner or scrambled according to the scrambling manner to obtain a second information sequence, and the interleaving manner or the scrambling mode is used to ensure that the bits at the CRC position after the cyclic shift cannot be verified. a bit that is in the position of the information bit to be transmitted after the cyclic shift;
- the transceiver 703 is configured to send a third information sequence.
- the information bits to be sent may include reserved bits
- the processor 701 is further configured to call the program code stored in the memory 702 to perform the following operations:
- the processor 701 determines that the CRC of the information bits to be transmitted includes:
- the processor 701 cascades the CRC and the information to be sent to obtain the first information sequence, including:
- the CRC and the target information are concatenated to obtain a first information sequence.
- the information bits to be sent may include reserved bits
- the processor 701 interleaves the bits in the first information sequence in an interleaving manner to obtain a second information sequence, including:
- the bits in the first bit are exchanged with the bits in the second bit to obtain a fourth information sequence, the first bit being the first bit of the first information sequence and the second bit being any bit of the reserved bit , the bit of the first bit after the interleaving is 1;
- the fourth information sequence is determined as the second information sequence.
- the processor 701 exchanges the bits in the first bit with the bits in the second bit to obtain the fourth information sequence, and the processor 701 is further configured to invoke the storage in the memory 702.
- the program code does the following:
- t is greater than or equal to 1 and less than the number of bits of the reserved bits, and the bits of the t bits in the reserved bits are 1;
- the determining, by the processor 701, the fourth information sequence as the second information sequence includes:
- the fifth information sequence is determined as the second information sequence.
- the information bits to be sent may include reserved bits
- the processor 701 interleaves the bits in the first information sequence in an interleaving manner to obtain a second information sequence, including:
- the fourth information sequence is determined as the second information sequence.
- the processor 701 shifts the bits in the first bit to the forefront of the first information sequence to obtain the fourth information sequence, and the processor 701 is further configured to invoke the storage in the memory 702.
- the program code does the following:
- the determining, by the processor 701, the fourth information sequence as the second information sequence includes:
- the fifth information sequence is determined as the second information sequence.
- the information bits to be sent may include reserved bits
- the processor 701 interleaves the bits in the first information sequence in an interleaving manner to obtain a second information sequence, including:
- the fourth information sequence is determined as the second information sequence.
- the processor 701 is further configured to invoke the program code stored in the memory 702 to perform the following operations:
- the third information sequence is sequentially encoded and rate matched to obtain a sixth information sequence
- the third information sequence includes:
- the processor 701 is further configured to invoke the program code stored in the memory 702 to perform the following operations:
- the processor 701 cyclically shifts the second information sequence to obtain the third information sequence, including:
- the sixth information sequence is cyclically shifted to obtain a third information sequence.
- steps 201-204 may be performed by processor 701 and memory 702 in the network device, and step 205 may be performed by transceiver 703 in the network device.
- the determining module 401, the cascading module 402, the obtaining module 403, the looping module 404, the setting module 406, and the encoding module 407 can be implemented by the processor 701 and the memory 702 in the network device, and the sending module 405 can be implemented in the network device.
- the transceiver 703 is implemented.
- FIG. 8 is a schematic structural diagram of a terminal according to an embodiment of the present invention.
- the terminal 800 can include:
- the receiving module 801 is configured to receive a first information sequence sent by the network device.
- a looping module 802 configured to reverse cyclically shift a first information sequence received by the 801 receiving module to obtain a second information sequence
- the obtaining module 803 is configured to deinterleave the second information sequence obtained by the loop module 802 according to the interleaving manner, or descramble the second information sequence obtained by the loop module 802 according to the scrambling manner to obtain a third information sequence, and interleave
- the mode or scrambling mode is used to ensure that the bit at the CRC position after the cyclic shift cannot verify the bit at the information bit position after the cyclic shift;
- the determining module 804 is configured to: when the third information sequence CRC check obtained by the obtaining module 803 passes, determine a bit in the third information sequence at the information bit position as the information bit, and reversely cyclically shift the loop module 802.
- the number of bits determines the partial bits of the system frame number according to the mapping relationship.
- FIG. 9 is a schematic structural diagram of another terminal according to an embodiment of the present invention.
- the terminal shown in FIG. 9 is optimized by the terminal shown in FIG. 8, wherein:
- the information bits may include reserved bits, and the bits in the preset bits in the reserved bits are one.
- the second information sequence may include reserved bits
- the obtaining module 803 deinterleaves the second information sequence according to the interleaving manner to obtain the third information sequence, including:
- the bits in the first bit are exchanged with the bits in the second bit to obtain a fourth information sequence, the first bit being the first bit of the second information sequence, and the second bit being the preset at the reserved bit position Bit
- the fourth information sequence is determined as a third information sequence.
- the obtaining module 803 deinterleaves the second information sequence according to the interleaving manner, to obtain the third information sequence, further includes:
- Bits in t preset bits other than the second bit in the reserved bit position and t preset bits in bits other than the reserved bit position and the first bit in the fourth information sequence The bits in the bits are exchanged to obtain a fifth sequence of information, t being greater than or equal to 1 and less than the number of bits of the reserved bits;
- the obtaining module 803 determines the fourth information sequence as the third information sequence, including:
- the fifth information sequence is determined as a third information sequence.
- the second information sequence may include reserved bits
- the obtaining module 803 deinterleaves the second information sequence according to the interleaving manner to obtain the third information sequence, including:
- the fourth information sequence is determined as a third information sequence.
- the obtaining module 803 deinterleaves the second information sequence according to the interleaving manner, to obtain the third information sequence, further includes:
- the obtaining module 803 determines the fourth information sequence as the third information sequence, including:
- the fifth information sequence is determined as a third information sequence.
- the second information sequence may include reserved bits
- the obtaining module 803 deinterleaves the second information sequence according to the interleaving manner to obtain the third information sequence, including:
- the fourth information sequence is determined as a third information sequence.
- the terminal may further include:
- the decoding module 805 is configured to decode the first information sequence received by the receiving module 801 to obtain a sixth information sequence
- the looping module 802 is specifically configured to inversely cyclically shift the sixth information sequence obtained by the decoding module 805 to obtain a second information sequence.
- FIG. 10 is a schematic structural diagram of another terminal according to an embodiment of the present invention.
- the terminal shown in FIG. 10 is optimized by the terminal shown in FIG. 8, wherein:
- the information bits may include reserved bits, and the bits in the preset bits in the reserved bits are one.
- the second information sequence may include reserved bits
- the obtaining module 803 deinterleaves the second information sequence according to the interleaving manner to obtain the third information sequence, including:
- the bits in the first bit are exchanged with the bits in the second bit to obtain a fourth information sequence, the first bit being the first bit of the second information sequence, and the second bit being the preset at the reserved bit position Bit
- the fourth information sequence is determined as a third information sequence.
- the obtaining module 803 deinterleaves the second information sequence according to the interleaving manner, to obtain the third information sequence, further includes:
- Bits in t preset bits other than the second bit in the reserved bit position and t preset bits in bits other than the reserved bit position and the first bit in the fourth information sequence The bits in the bits are exchanged to obtain a fifth sequence of information, t being greater than or equal to 1 and less than the number of bits of the reserved bits;
- the obtaining module 803 determines the fourth information sequence as the third information sequence, including:
- the fifth information sequence is determined as a third information sequence.
- the second information sequence may include reserved bits
- the obtaining module 803 deinterleaves the second information sequence according to the interleaving manner to obtain the third information sequence, including:
- the fourth information sequence is determined as a third information sequence.
- the obtaining module 803 deinterleaves the second information sequence according to the interleaving manner, to obtain the third information sequence, further includes:
- the obtaining module 803 determines the fourth information sequence as the third information sequence, including:
- the fifth information sequence is determined as a third information sequence.
- the second information sequence may include reserved bits
- the obtaining module 803 deinterleaves the second information sequence according to the interleaving manner to obtain the third information sequence, including:
- the fourth information sequence is determined as a third information sequence.
- the terminal may further include:
- a decoding module 805, configured to decode the second information sequence obtained by the loop module 802, to obtain a sixth information sequence
- the obtaining module 803 is specifically configured to deinterleave the sixth information sequence obtained by the decoding module 805 according to the interleaving manner, or descramble the sixth information sequence obtained by the decoding module 805 according to the scrambling manner to obtain a third information sequence.
- FIG. 11 is a schematic structural diagram of another terminal according to an embodiment of the present invention.
- the terminal may include a processor 1101, a memory 1102, a transceiver 1103, and a bus 1104. among them:
- bus 1104 for implementing a connection between these components
- the transceiver 1103 is configured to receive a first information sequence sent by the network device and send the sequence to the processor 1101;
- the memory 1102 stores a set of program codes
- the processor 1101 is configured to call the program code stored in the memory 1102 to perform the following operations:
- the bits at the information bit position in the third information sequence are determined as information bits, and the bits of the reverse cyclic shift are determined according to the mapping relationship to determine partial bits of the system frame number.
- the information bits may include reserved bits, and the bits in the preset bits in the reserved bits are 1.
- the second information sequence may include reserved bits
- the processor 1101 deinterleaves the second information sequence according to the interleaving manner to obtain the third information sequence, including:
- the bits in the first bit are exchanged with the bits in the second bit to obtain a fourth information sequence, the first bit being the first bit of the second information sequence, and the second bit being the preset at the reserved bit position Bit
- the fourth information sequence is determined as a third information sequence.
- the processor 1101 exchanges the bits in the first bit with the bits in the second bit to obtain the fourth information sequence, and the processor 1101 is further configured to invoke the storage in the memory 1102.
- the program code does the following:
- Bits in t preset bits other than the second bit in the reserved bit position and t preset bits in bits other than the reserved bit position and the first bit in the fourth information sequence The bits in the bits are exchanged to obtain a fifth sequence of information, t being greater than or equal to 1 and less than the number of bits of the reserved bits;
- the determining, by the processor 1101, the fourth information sequence as the third information sequence includes:
- the fifth information sequence is determined as a third information sequence.
- the second information sequence may include reserved bits
- the processor 1101 deinterleaves the second information sequence according to the interleaving manner to obtain the third information sequence, including:
- the fourth information sequence is determined as a third information sequence.
- the processor 1101 is further configured to call the program stored in the memory 1102.
- the code does the following:
- the determining, by the processor 1101, the fourth information sequence as the third information sequence includes:
- the fifth information sequence is determined as a third information sequence.
- the second information sequence may include reserved bits
- the processor 1101 deinterleaves the second information sequence according to the interleaving manner to obtain the third information sequence, including:
- the fourth information sequence is determined as a third information sequence.
- the processor 1101 is further configured to invoke the program code stored in the memory 1102 to perform the following operations:
- the processor 1101 cyclically shifts the first information sequence in reverse to obtain the second information sequence, including:
- the sixth information sequence is cyclically reversed to obtain a second information sequence.
- the processor 1101 is further configured to invoke the program code stored in the memory 1102 to perform the following operations:
- the processor 1101 deinterleaves the second information sequence according to the interleaving manner, or descrambles the second information sequence according to the scrambling manner to obtain the third information sequence, including:
- the sixth information sequence is deinterleaved according to the interleaving manner, or the sixth information sequence is descrambled according to the scrambling manner to obtain a third information sequence.
- the steps 206-208 may be performed by the processor 1101 and the memory 1102 in the terminal, and the step of the terminal receiving the third information sequence in step 205 may be performed by the transceiver 1103 in the terminal.
- the loop module 802, the obtaining module 803, the determining module 804, and the decoding module 805 can be implemented by the processor 1101 and the memory 1102 in the terminal, and the receiving module 801 can be implemented by the transceiver 1103 in the terminal.
- FIG. 12 is a schematic structural diagram of another network device according to an embodiment of the present invention.
- the network device may include:
- a determining module 1201 configured to determine a CRC of an information bit to be transmitted, where the information bit to be transmitted may include a reserved bit, at least one bit of the reserved bit is at the forefront of the information bit to be transmitted, and is at a reserved bit of the first bit of the information bit to be transmitted.
- the bit is 1;
- the cascading module 1202 is configured to cascade the CRC determined by the determining module 1201 and the information bits to be sent to obtain a first information sequence;
- the looping module 1203 is configured to cyclically shift the first information sequence obtained by the cascading module 1202 to obtain a second information sequence, where the number of bits of the cyclic shift is used to carry a partial bit of the system frame number;
- the sending module 1204 is configured to send the second information sequence obtained by the loop module 1203.
- FIG. 13 is a schematic structural diagram of another network device according to an embodiment of the present invention.
- the network device shown in FIG. 13 is optimized by the network device shown in FIG. 12, where:
- the t bits of the reserved bits are in a bit other than the bit of the information bit to be transmitted and the bit position of the reserved bit position, the bits in the t bits are all 1, and t is greater than or equal to 1 and less than the reserved bit. number.
- the network device may further include:
- the encoding module 1205 is configured to sequentially perform encoding and rate matching on the second information sequence obtained by the loop module 1203 to obtain a third information sequence;
- the sending module 1204 is specifically configured to send the third information sequence obtained by the encoding module 1205.
- FIG. 14 is a schematic structural diagram of another network device according to an embodiment of the present invention.
- the network device shown in FIG. 14 is optimized by the network device shown in FIG. 12, wherein:
- the t bits of the reserved bits are in a bit other than the bit of the information bit to be transmitted and the bit position of the reserved bit position, the bits in the t bits are all 1, and t is greater than or equal to 1 and less than the reserved bit. number.
- the network device may further include:
- the encoding module 1205 is configured to encode the first information sequence obtained by the concatenation module 1202 to obtain a fourth information sequence
- the looping module 1203 is specifically configured to cyclically shift the fourth information sequence obtained by the encoding module 1205 to obtain a second information sequence.
- FIG. 15 is a schematic structural diagram of another network device according to an embodiment of the present invention.
- the network device may include a processor 1501, a memory 1502, a transceiver 1503, and a bus 1504. among them:
- bus 1504 for implementing a connection between these components
- a set of program codes is stored in the memory 1502, and the processor 1501 is configured to call the program code stored in the memory 1502 to perform the following operations:
- the information bit to be transmitted may include a reserved bit, at least one bit of the reserved bit is at the forefront of the information bit to be transmitted, and the bit of the reserved bit in the first bit of the information bit to be transmitted is 1;
- the first information sequence is cyclically shifted to obtain a second information sequence, and the number of bits of the cyclic shift is used to carry a partial bit of the system frame number;
- the transceiver 1503 is configured to send a second information sequence.
- the t bits of the reserved bits may be in a bit other than the bit of the information bit to be transmitted and the bit position of the reserved bit position, the bits in the t bits are all 1, and t is greater than or A number of bits equal to 1 and less than the reserved bits.
- the processor 1501 is further configured to invoke the program code stored in the memory 1502 to perform the following operations:
- the second information sequence is sequentially encoded and rate matched to obtain a third information sequence
- the second information sequence includes:
- the processor 1501 is further configured to invoke the program code stored in the memory 1502 to perform the following operations:
- the processor 1501 cyclically shifts the first information sequence to obtain the second information sequence, including:
- the fourth information sequence is cyclically shifted to obtain a second information sequence.
- steps 301-303 can be performed by processor 1501 and memory 1502 in the network device, and step 304 can be performed by transceiver 1503 in the network device.
- the determining module 1201, the concatenation module 1202, the recurring module 1203, and the encoding module 1205 may be implemented by a processor 1501 and a memory 1502 in a network device, and the sending module 1204 may be implemented by a transceiver 1503 in the network device.
- FIG. 16 is a schematic structural diagram of another terminal according to an embodiment of the present invention. As shown in FIG. 16, the terminal may include:
- the receiving module 1601 is configured to receive a first information sequence sent by the network device.
- a looping module 1602 configured to reverse cyclically shift the first information sequence received by the receiving module 1601 to obtain a second information sequence
- the determining module 1603 is configured to determine, when the second information sequence CRC check obtained by the loop module 1602 is passed, the bit at the information bit position in the second information sequence as the information bit, and reversely cyclically shift the loop module 1602.
- the number of bits determines a partial bit of the system frame number according to the mapping relationship, and the information bit may include a reserved bit, at least one bit of the reserved bit is at the forefront of the information bit, and the bit of the reserved bit at the first bit of the information bit is 1.
- FIG. 17 is a schematic structural diagram of another terminal according to an embodiment of the present invention.
- the terminal shown in FIG. 17 is optimized by the terminal shown in FIG. 16, wherein:
- the t bits of the reserved bits may be in bits other than the bits of the information bit first and the reserved bit position, the bits in the t bits are all 1, t is greater than or equal to 1 and less than the number of bits of the reserved bits. .
- the terminal may further include:
- the decoding module 1604 is configured to perform rate de-matching and decoding on the first information sequence received by the receiving module 1601 to obtain a third information sequence.
- the looping module 1602 is configured to inversely cyclically shift the third information sequence obtained by the decoding module 1604 to obtain a second information sequence.
- FIG. 18 is a schematic structural diagram of another terminal according to an embodiment of the present invention.
- the terminal shown in FIG. 18 is optimized by the terminal shown in FIG. 16, wherein:
- the t bits of the reserved bits may be in bits other than the bits of the information bit first and the reserved bit position, the bits in the t bits are all 1, t is greater than or equal to 1 and less than the number of bits of the reserved bits. .
- the terminal may further include:
- the decoding module 1604 is configured to decode the second information sequence obtained by the loop module 1602 to obtain a third information sequence
- the determining module 1603 is configured to determine, when the third information sequence CRC check obtained by the decoding module 1604 passes, the bit at the information bit position in the third information sequence as the information bit.
- FIG. 19 is a schematic structural diagram of another terminal according to an embodiment of the present invention.
- the terminal may include a processor 1901, a memory 1902, a transceiver 1903, and a bus 1904. among them:
- bus 1904 for implementing a connection between these components
- the transceiver 1903 is configured to receive a first information sequence sent by the network device and send the sequence to the processor 1901;
- a set of program codes is stored in the memory 1902, and the processor 1901 is configured to call the program code stored in the memory 1902 to perform the following operations:
- the bits in the second information sequence at the information bit position are determined as information bits, and the bits of the reverse cyclic shift are determined according to the mapping relationship to determine part of the system frame number, the information
- the bits include reserved bits, at least one of the reserved bits being at the forefront of the information bits, and the bits of the reserved bits at the beginning of the information bits being one.
- the t bits of the reserved bits may be in a bit other than the bit of the information bit first and the reserved bit position, the bits in the t bits are all 1, and t is greater than or equal to 1 And less than the number of bits of the reserved bits.
- the processor 1901 is further configured to invoke the program code stored in the memory 1902 to perform the following operations:
- the processor 1901 cyclically shifts the first information sequence in reverse to obtain the second information sequence, including:
- the third sequence of information is cyclically inverted to obtain a second sequence of information.
- the processor 1901 is further configured to invoke the program code stored in the memory 1902 to perform the following operations:
- the processor 1901 determines, when the second information sequence CRC check passes, the bits at the information bit position in the second information sequence as the information bits, including:
- the bit at the information bit position in the third information sequence is determined as the information bit.
- the steps 305-306 may be performed by the processor 1901 and the memory 1902 in the terminal, and the step of the terminal receiving the third information sequence in step 304 may be performed by the transceiver 1903 in the terminal.
- the loop module 1602, the determining module 1603, and the decoding module 1604 can be implemented by the processor 1901 and the memory 1902 in the terminal, and the receiving module 1601 can be implemented by the transceiver 1903 in the terminal.
- the embodiment of the invention further discloses a readable storage medium storing program code of the network device and/or the terminal for executing the information transmission method shown in FIGS. 2 and 3.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
一种信息传输方法及设备,该方法应用于网络设备,包括:确定待发送信息比特的CRC;将CRC和待发送信息比特进行级联,以获得第一信息序列;将第一信息序列中的比特按照交织方式进行交织或者按照加扰方式进行加扰,以获得第二信息序列,交织方式或加扰方式用于确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特;将第二信息序列进行循环移位,以获得第三信息序列,循环移位的位数用于携带系统帧号的部分比特的信息;发送第三信息序列。本发明实施例,可以降低终端获取信息的时延。
Description
本发明涉及通信技术领域,尤其涉及一种信息传输方法及设备。
物理层广播信道(Physical Broadcast Channel,PBCH)为长期演进(Long Term Evolution,LTE)的物理层广播信道,网络设备可以将信息比特通过PBCH发送给终端,如下行系统带宽、物理混合自动重传指示信道(PhysicalHybrid ARQ Indicator Channel,PHICH)配置、系统帧号(System Frame Number,SFN)和保留比特。此外,为了使终端能够验证接收到的信息比特是否正确,还需要将用于验证信息比特的循环冗余校验(Cyclic Redundancy Check,CRC)一起发送给终端。网络设备为了保证终端能够接收到信息比特和CRC,将会通过PBCH在40ms周期内重复发送4次,每次携带的编码比特相同。
然而,由于信息比特中的系统帧号只包括系统帧号的高8位,而最低2位需要通过其它方式进行携带。目前,一种携带系统帧号最低2位的方式为:将4次重复发送的信息通过不同的加扰序列进行加扰,通过加扰序列可以携带系统帧号的最低2位。但上述方式中,由于每次发送的信息比特和CRC使用不同的加扰序列进行加扰,终端每次接收到信息比特和CRC之后,都需要使用4种加扰序列分别尝试接收到的信息比特和CRC使用的是那种加扰序列,以致每次接收到信息比特和CRC之后都需要进行多次尝试加扰序列进行解码,从而增加了终端获取信息比特的时延。
发明内容
本发明实施例公开了一种信息传输方法及设备,用于降低终端获取信息的时延。
第一方面公开一种信息传输方法,该方法应用于网络设备,确定待发送信息比特的CRC,将CRC和待发送信息比特进行级联以获得第一信息序列,将第一信息序列中的比特按照交织方式进行交织或者按照加扰方式进行加扰以获得第二信息序列,将第二信息序列进行循环移位以获得第三信息序列,发送第三信息序列。由于循环移位的位数携带有系统帧号的部分比特的信息,以便终端可以通过反向循环移位的移位的方式确定网络设备发送信息之前对信息进行的移位,进而确定系统帧号,可见,不需要进行多次解码,因此,可以减少解码的次数,从而可以降低终端获取信息的时延。此外,由于交织方式或加扰方式可以确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特,因此,只有当正确的确定循环移位的位数,使待发送信息比特反向循环移位至未循环移位之前的位置时,CRC校验才能通过,因此,可以准确地确定循环移位的位数携带的系统帧号的部分比特的信息,以便终端可以准确地获取到网络设备发送的信息。
在一个实施例中,可以将保留比特中的预设比特位设置为1以获得目标信息比特,确定目标信息比特的CRC,将CRC和目标信息进行级联以获得第一信息序列。由于当保留 比特包括的比特均为0时,可以通过将保留比特中的预设比特位设置为1的方式避免待发送信息比特为全0的情况,可以通过交织的方式确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特,以便终端可以准确地获取到网络设备发送的信息。
在一个实施例中,待发送信息比特可以包括保留比特,可以将第一比特位中的比特与第二比特位中的比特进行交换以获得第四信息序列,并将第四信息序列确定为第二信息序列。其中,第一比特位为第一信息序列的首位,第二比特位为保留比特的任一比特位,交织后的第一比特位的比特为1,可以通过交换的方式达到交织方式的目的,可以确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特,因此,只有当正确的确定循环移位的位数,使待发送信息比特反向循环移位至未循环移位之前的位置时,CRC校验才能通过,因此,可以准确地确定循环移位的位数携带的系统帧号的部分比特的信息,以便终端可以准确地获取到网络设备发送的信息。其中,当保留比特包括的比特均为0时,在进行交织之前,需要将第二比特位的比特设置为1;当保留比特包括的比特均为1时,在进行交织之前,将不需要进行上述处理。
在一个实施例中,可以将保留比特中除第二比特位之外的t个比特位中的比特与第四信息序列中除保留比特包括的比特位之外的t个比特位中的比特进行交换,以获得第五信息序列,并将第五信息序列确定为第二信息序列。其中,t大于或等于1且小于保留比特的比特位数,保留比特中的这t个比特位中的比特均为1,可以进一步通过交换的方式达到交织方式的目的,可以确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特,因此,只有当正确的确定循环移位的位数,使待发送信息比特反向循环移位至未循环移位之前的位置时,CRC校验才能通过,因此,可以准确地确定循环移位的位数携带的系统帧号的部分比特的信息,以便终端可以准确地获取到网络设备发送的信息。
在一个实施例中,待发送信息比特可以包括保留比特,可以将第一比特位中的比特移位至第一信息序列的最前面得到第四信息序列,并将第四信息序列确定为第二信息序列。其中,第一比特位为保留比特的任一比特位,第一比特位中的比特为1,通过移位的方式达到交织方式的目的,可以确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特,因此,只有当正确的确定循环移位的位数,使待发送信息比特反向循环移位至未循环移位之前的位置时,CRC校验才能通过,因此,可以准确地确定循环移位的位数携带的系统帧号的部分比特的信息,以便终端可以准确地获取到网络设备发送的信息。
在一个实施例中,可以将第二比特位中的比特移位至目标位置得到第五信息序列,并将第五信息序列确定为第二信息序列。其中,第二比特位为保留比特中除第一比特位之外的t个比特位中的任一比特位,目标位置为第四信息序列中除目标间隙之外的t个间隙中的任一间隙,目标间隙是保留比特中除第一比特位之外的比特位间的间隙,t大于或等于1且小于保留比特的比特位数,第二比特位中的比特为1,进一步通过移位的方式达到交织方式的目的,可以确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息 比特位置的比特,因此,只有当正确的确定循环移位的位数,使待发送信息比特反向循环移位至未循环移位之前的位置时,CRC校验才能通过,因此,可以准确地确定循环移位的位数携带的系统帧号的部分比特的信息,以便终端可以准确地获取到网络设备发送的信息。
在一个实施例中,待发送信息比特可以包括保留比特,可以将第三比特位中的比特移位至第一信息序列的最前面得到第四信息序列,并将第四信息序列确定为第二信息序列。其中,第三比特位为第一信息序列中的最后一个比特位,第四信息序列的首位的比特为1,通过移位的方式达到交织方式的目的,可以确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特,因此,只有当正确的确定循环移位的位数,使待发送信息比特反向循环移位至未循环移位之前的位置时,CRC校验才能通过,因此,可以准确地确定循环移位的位数携带的系统帧号的部分比特的信息,以便终端可以准确地获取到网络设备发送的信息。
在一个实施例中,可以先对第三信息序列依次进行编码和速率匹配得到第六信息序列,再发送第六信息序列,可以提高信息传输的可靠性。
在一个实施例中,可以先对第二信息序列进行编码得到第六信息序列,再将第六信息序列进行循环移位得到第三信息序列,可以提高信息传输的可靠性。
第二方面公开一种网络设备,该网络设备包括用于执行第一方面或第一方面的任一种可能实现方式所提供的信息传输方法的模块。
第三方面公开一种网络设备,该网络设备包括处理器、存储器和收发器,存储器用于存储程序代码,处理器用于执行程序代码,收发器用于与终端进行通信。当处理器执行存储器存储的程序代码时,使得处理器执行第一方面或第一方面的任一种可能实现方式所公开的信息传输方法。
第四方面公开一种可读存储介质,该可读存储介质存储了网络设备用于执行第一方面或第一方面的任一种可能实现方式所公开的信息传输方法的程序代码。
第五方面公开一种信息传输方法,该方法应用于网络设备,确定待发送信息比特的循环冗余校验CRC,将CRC和待发送信息比特进行级联得到第一信息序列,将第一信息序列进行循环移位以获得第二信息序列,发送第二信息序列。由于循环移位的位数携带有系统帧号的部分比特的信息,以便终端可以通过反向循环移位的移位的方式确定网络设备发送信息之前对信息进行的移位,进而确定系统帧号,可见,不需要进行多次解码,因此,可以减少解码的次数,从而可以降低终端获取信息的时延。此外,待发送信息比特包括保留比特,保留比特的至少一位处于待发送信息比特的最前面,且处于待发送信息比特首位的保留比特位的比特为1,可以确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特,以便终端可以准确地获取到网络设备发送的信息。
在一个实施例中,保留比特的t个比特位处于除待发送信息比特首位和保留比特位置所在比特位之外的比特位,t个比特位中的比特均为1,可以进一步确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特,以便终端可以准确地获取到网络设备发送的信息。其中,t大于或等于1且小于保留比特的比特位数
在一个实施例中,可以先将第二信息序列依次进行编码和速率匹配得到第三信息序列, 之后再发送第三信息序列,可以提高信息传输的可靠性。
在一个实施例中,可以先将将第一信息序列进行编码以获得第四信息序列,再将第四信息序列进行循环移位以获得第二信息序列,可以提高信息传输的可靠性。
第六方面公开一种网络设备,该网络设备包括用于执行第五方面或第五方面的任一种可能实现方式所提供的信息传输方法的模块。
第七方面公开一种网络设备,该网络设备包括处理器、存储器和收发器,存储器用于存储程序代码,处理器用于执行程序代码,收发器用于与终端进行通信。当处理器执行存储器存储的程序代码时,使得处理器执行第五方面或第五方面的任一种可能实现方式所公开的信息传输方法。
第八方面公开一种可读存储介质,该可读存储介质存储了网络设备用于执行第五方面或第五方面的任一种可能实现方式所公开的信息传输方法的程序代码。
第九方面公开一种信息传输方法,该方法应用于终端,接收网络设备发送的第一信息序列,将第一信息序列反向循环移位以获得第二信息序列,根据交织方式对第二信息序列进行解交织,或者根据加扰方式对第二信息序列进行解扰,以获得第三信息序列,当第三信息序列CRC校验通过时,将第三信息序列中处于信息比特位置的比特确定为信息比特,并将反向循环移位的位数按照映射关系确定系统帧号的部分比特。由于终端可以通过反向循环移位的移位的方式确定网络设备发送信息之前对信息进行的移位,进而确定系统帧号,可见,不需要进行多次解码,因此,可以减少解码的次数,从而可以降低终端获取信息的时延。此外,由于交织方式或加扰方式可以确保循环移位后处于CRC位置的比特无法校验循环移位后处于信息比特位置的比特,因此,只有当正确的确定反向循环移位的位数时,CRC校验才能通过,因此,可以准确地确定循环移位的位数携带的系统帧号的部分比特的信息,以便终端可以准确地获取到网络设备发送的信息。
在一个实施例中,信息比特包括保留比特,保留比特中的预设比特位中的比特为1,以便当正确的确定反向循环移位的位数时,CRC校验才能通过,以便终端可以准确地获取到网络设备发送的信息。
在一个实施例中,第二信息序列可以包括保留比特,可以将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列,并将第四信息序列确定为第三信息序列。第一比特位为第二信息序列的首位,第二比特位为处于保留比特位置的预设位。
在一个实施例中,可以将处于保留比特位置中除第二比特位之外的t个预设比特位中的比特与第四信息序列中除保留比特位置和第一比特位之外的比特位中的t个预设比特位中的比特进行交换,以获得第五信息序列,并将第五信息序列确定为第三信息序列。其中,t大于或等于1且小于保留比特的比特位数。
在一个实施例中,第二信息序列可以包括保留比特,可以将第二信息序列的首位移位至第一间隙,以获得第四信息序列,并将第四信息序列确定为第三信息序列。其中,第一间隙为处于保留比特位置的比特位间的预设间隙。
在一个实施例中,可以将t个预设比特位中的比特分别移位至t个预设间隙,以获得第五信息序列,并将第五信息序列确定为第三信息序列。其中,t大于或等于1且小于保留比 特的比特位数。
在一个实施例中,第二信息序列可以包括保留比特,可以将第二信息序列中的第一个比特位移位至第二信息序列的最后面,以获得第四信息,并将第四信息序列确定为第三信息序列。
在一个实施例中,可以先将第一信息序列进行解码以获得第六信息序列,再将第六信息序列反向循环移位以获得第二信息序列,可以减少解码的次数。
在一个实施例中,可以先将第二信息序列进行解码以获得第六信息序列,再根据交织方式对第六信息序列进行解交织,或者根据加扰方式对第二信息序列进行解扰,以获得第三信息序列。
第十方面公开一种终端,该终端包括用于执行第九方面或第九方面的任一种可能实现方式所提供的信息传输方法的模块。
第十一方面公开一种终端,该终端包括处理器、存储器和收发器,存储器用于存储程序代码,处理器用于执行程序代码,收发器用于与网络设备进行通信。当处理器执行存储器存储的程序代码时,使得处理器执行第九方面或第九方面的任一种可能实现方式所公开的信息传输方法。
第十二方面公开一种可读存储介质,该可读存储介质存储了终端用于执行第九方面或第九方面的任一种可能实现方式所公开的信息传输方法的程序代码。
第十三方面公开一种信息传输方法,该方法应用于终端,接收网络设备发送的第一信息序列,将第一信息序列反向循环移位,以获得第二信息序列,当第二信息序列CRC校验通过时,将第二信息序列中处于信息比特位置的比特确定为信息比特,并将反向循环移位的位数按照映射关系确定系统帧号的部分比特,信息比特包括保留比特,保留比特的至少一位处于信息比特的最前面,且处于信息比特首位的保留比特位的比特为1。由于终端可以通过反向移位的方式确定网络设备发送信息之前对信息进行的移位,进而确定系统帧号,可见不需要进行多次解码,因此,可以减少解码的次数,从而可以降低终端获取信息的时延。此外,由于处于信息比特首位的保留比特位的比特为1,只有当正确的确定反向循环移位的位数时,CRC校验才能通过,以便终端可以准确地获取到网络设备发送的信息。
在一个实施例中,保留比特的t个比特位处于除信息比特首位和保留比特位置所在比特位之外的比特位,t个比特位中的比特均为1,以便只有当正确的确定反向循环移位的位数时,CRC校验才能通过,以便终端可以准确地获取到网络设备发送的信息。其中,t大于或等于1且小于保留比特的比特位数
在一个实施例中,可以先将第一信息序列进行解码以获得第三信息序列,再将第三信息序列反向循环移位以获得第二信息序列,可以减少解码的次数。
在一个实施例中,可以先将第二信息序列解码以获得第三信息序列,并当第三信息序列CRC校验通过时,将第三信息序列中处于信息比特位置的比特确定为信息比特。
第十四方面公开一种终端,该终端包括用于执行第十三方面或第十三方面的任一种可能实现方式所提供的信息传输方法的模块。
第十五方面公开一种终端,该终端包括处理器、存储器和收发器,存储器用于存储程 序代码,处理器用于执行程序代码,收发器用于与网络设备进行通信。当处理器执行存储器存储的程序代码时,使得处理器执行第十三方面或第十三方面的任一种可能实现方式所公开的信息传输方法。
第十六方面公开一种可读存储介质,该可读存储介质存储了终端用于执行第十三方面或第十三方面的任一种可能实现方式所公开的信息传输方法的程序代码。
图1是本发明实施例公开的一种网络架构示意图;
图2是本发明实施例公开的一种信息传输方法的流程示意图;
图3是本发明实施例公开的另一种信息传输方法的流程示意图;
图4是本发明实施例公开的一种网络设备的结构示意图;
图5是本发明实施例公开的另一种网络设备的结构示意图;
图6是本发明实施例公开的又一种网络设备的结构示意图;
图7是本发明实施例公开的又一种网络设备的结构示意图;
图8是本发明实施例公开的一种终端的结构示意图;
图9是本发明实施例公开的另一种终端的结构示意图;
图10是本发明实施例公开的又一种终端的结构示意图;
图11是本发明实施例公开的又一种终端的结构示意图;
图12是本发明实施例公开的又一种网络设备的结构示意图;
图13是本发明实施例公开的又一种网络设备的结构示意图;
图14是本发明实施例公开的又一种网络设备的结构示意图;
图15是本发明实施例公开的又一种网络设备的结构示意图;
图16是本发明实施例公开的又一种终端的结构示意图;
图17是本发明实施例公开的又一种终端的结构示意图
图18是本发明实施例公开的又一种终端的结构示意图;
图19是本发明实施例公开的又一种终端的结构示意图。
本发明实施例公开了一种信息传输方法及设备,用于降低终端获取信息的时延。以下分别进行详细说明。
为了更好地理解本发明实施例公开的一种信息传输方法及设备,下面先对本发明实施例使用的应用场景进行描述。网络设备通过PBCH在40ms周期内发送4次信息序列,每一次发送的信息序列携带相同的编码比特,但循环移位的位数不同。终端可以通过信息序列中的CRC尝试不同的循环移位位数,如果CRC校验通过就可以确定循环移位的位数,也即可以确定发送信息比特的系统帧号,即确定SFN的最低2位。该方案利用了咬尾卷积码(Tail Biting Convolutional Codes,TBCC)循环移位的特性,可以减少盲检时译码次数,降低了 时延。然而,对于某些特定的信息比特序列组合,循环移位后,按照循环移位前的信息比特和CRC比特位置进行CRC校验也会通过,即无法准确地确定传输信息序列的系统帧号,以致系统会在某些时刻无法工作,系统设计上的存在缺陷。例如:假设信息比特为[a
1,a
2,a
3,…,a
N](包含10bits的保留比特),其中,N为信息比特的长度,CRC多项式序列为[b
1,b
2,b
3,…,b
M],其中,M为CRC的长度,得到的CRC可以为[c
1,c
2,c
3,…,c
M],信息比特与CRC可以级联为[a
1,a
2,a
3,…,a
N,c
1,c
2,c
3,…,c
M],根据CRC校验原理,序列[a
1,a
2,a
3,…,a
N,c
1,c
2,c
3,…,c
M]能被[b
1,b
2,b
3,…,b
M]整除时,CRC将校验通过,若信息比特[a
1,a
2,…,a
k]=[0,0,…,0],可得序列[a
k+1,a
k+2,…,a
N,c
1,c
2,c
3,…,c
M]能被[b
1,b
2,b
3,…,b
M]整除。循环移位L位后的信息序列加CRC为[a
L+1,a
L+2,…,a
N,c
1,c
2,c
3,…,c
M,a
1,a
2,…,a
L],若L<=k,该序列也一定能被[b
1,b
2,b
3,…,b
M]整除,即盲检时CRC通过,该情况下无法准确地确定系统帧号。
为了更好地理解本发明实施例公开的一种信息传输方法及设备,下面先对本发明实施例使用的网络架构进行描述。请参阅图1,图1是本发明实施例公开的一种网络架构示意图。如图1所示,该网络架构可以包括网络设备101和至少一个终端102。网络设备101用于向终端102发送信息比特,信息比特至少包括保留比特和系统帧号的部分比特的信息。为了使终端102可以确定接收到的信息比特是否正确,网络设备101还需要确定信息比特的CRC,并将信息比特和CRC级联为信息序列一起发送给终端102。此外,由于信息比特只包括了系统帧号的部分比特的信息,因此可以通过对信息序列进行循环移位,以便通过循环移位的位数携带系统帧号的剩余部分比特的信息。终端102,用于接收网络设备101发送的信息序列,通过反向循环移位和CRC校验,确定信息序列中包括的信息比特,并通过反向循环移位的位数确定网络设备通过循环移位携带的系统帧号的部分比特的信息。此外,为了保证终端可以通过循环移位的位数唯一确定系统帧号,可以通过交织、加扰等方式确保循环移位后处于CRC位置的比特无法校验循环移位后处于信息比特位置的比特。
网络设备101可以是用于与终端102进行通信的设备,例如,可以是全球移动通信系统(Global System for Mobile communication,GSM)或码分多址(Code Division Multiple Access,CDMA)中的基站(Base Transceiver Station,BTS),也可以是宽带码分多址(Wideband Code Division Multiple Access,WCDMA)系统中的基站(NodeB,NB),还可以是长期演进(Long Term Evolution,LTE)系统中的演进型基站(Evolutional Node B,eNB或eNodeB),还可以是设备对设备(Device to Device,D2D)通信中担任网络设备功能的终端,还可以是中继站、接入点、车载设备、发射点、可穿戴设备以及未来5G网络中的网络侧设备或未来演进的公共陆地移动网络(Public Land Mobile Network,PLMN)中的网络设备,或者任一承担网络功能的设备等。
终端102可以为用户设备(User Equipment,UE)、接入终端、用户单元、用户站、移动站、移动台、远方站、远程终端、移动设备、用户终端、无线通信设备、用户代理或用户装置。接入终端可以是蜂窝电话、无绳电话、会话启动协议(Session Initiation Protocol,SIP)电话、无线本地环路(Wireless Local Loop,WLL)站、个人数字处理(Personal Digital Assistant,PDA)、具有无线通信功能的手持设备、计算设备或连接到无线调制解调器的其它处理设备、车载设备、可穿戴设备,未来5G网络中的终端或者未来演进的PLMN网络 中的终端等。
基于图1所示的网络架构,请参阅图2,图2是本发明实施例公开的一种信息传输方法的流程示意图。其中,该信息传输方法是从网络设备101和终端102的角度来描述的。如图2所示,该数据传输方法可以包括以下步骤。
201、网络设备确定待发送信息比特的CRC。
本实施例中,当网络设备存在待发送信息比特,即需要向终端发送信息比特时,将确定待发送信息比特的CRC。其中,CRC是通过待发送信息比特计算得到的,终端可以通过CRC确定接收到的信息比特是否为正确的信息比特,从而终端可以通过CRC准确的确定传输的信息。其中,待发送信息比特包括保留比特,保留比特可以为全0序列,也可以为全1序列,还可以为其它序列。
202、网络设备将CRC和待发送信息比特进行级联,以获得第一信息序列。
本实施例中,网络设备确定待发送信息比特的CRC之后,将CRC和待发送信息比特进行级联,可以得到第一信息序列,可以是将CRC级联在待发送信息比特之后,也可以是将待发送信息比特级联在CRC之后,还可以是将CRC插入待发送信息比特中间的某一位置,还可以是其它级联方式,本实施例不作限定。其中,保留比特中的比特位可以是连续的,也可以是间断的,例如:第一信息序列中的第10-15比特位可以为保留比特的位置,第一信息序列中的第5、8、10、13、15和17比特位可以为保留比特的位置。
本实施例中,当保留比特为全0序列时,可以将保留比特中的预设比特位设置为1,得到目标信息比特,确定待发送信息比特的CRC,即确定目标信息比特的CRC,将CRC和待发送信息进行级联以获得第一信息序列,即将CRC和目标信息进行级联以获得第一信息序列,可以避免信息比特为全0的情况。
203、网络设备将第一信息序列中的比特按照交织方式进行交织或者按照加扰方式进行加扰,以获得第二信息序列。
本实施例中,网络设备将CRC和待发送信息比特进行级联得到第一信息序列之后,将第一信息序列中的比特按照交织方式进行交织或者按照加扰方式进行加扰,可以得到第二信息序列,以便通过交织或加扰确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特。其中,交织方式或加扰方式可以是预先确定的,如根据循环移位的位数确定等。
本实施例中,可以将第一比特位中的比特与第二比特位中的比特进行交换得到第四信息序列,并将第四信息序列确定为第二信息序列。其中,第一比特位为第一信息序列的首位,第二比特位为保留比特的任一比特位,交织后的第一比特位的比特为1。当交织前第二比特位中的比特为0时,可以先将第二比特位中的比特设置为1,再进行交织;也可以先进行交织,再将交织后的第一比特位中的比特设置为1。
本实施例中,将第一比特位中的比特与第二比特位中的比特进行交换得到第四信息序列之后,可以将保留比特中除第二比特位之外的t个比特位中的比特与第四信息序列中除保留比特包括的比特位之外的t个比特位中的比特进行交换,以获得第五信息序列,并将第五信息序列确定为第二信息序列。其中,t大于或等于1且小于保留比特的比特位数,保 留比特中的t个比特位中的比特均为1。
本实施例中,可以将第一比特位中的比特移位至第一信息序列的最前面得到第四信息序列,并将第四信息序列确定为第二信息序列。其中,第一比特位中的比特为1。
本实施例中,将第一比特位中的比特移位至第一信息序列的最前面得到第四信息序列之后,可以将第二比特位中的比特移位至目标位置得到第五信息序列,并将第五信息序列确定为第二信息序列。其中,目标位置为第四信息序列中除目标间隙之外的t个间隙中的任一间隙,目标间隙是保留比特中除第一比特位之外的比特位间的间隙,第二比特位为保留比特中除第一比特位之外的t个比特位中的任一比特位,t大于或等于1且小于保留比特的比特位数,第二比特位中的比特为1。
本实施例中,可以将第三比特位中的比特移位至第一信息序列的最前面得到第四信息序列,并将第四信息序列确定为第二信息序列。其中,第三比特位为第一信息序列中的最后一个比特位,第四信息序列的首位的比特为1。
本实施例中,将第一信息序列中的比特按照加扰方式进行加扰,可以是将第一信息序列与预设序列相加。其中,预设序列的长度与第一信息序列的长度相同。当预设序列为40比特时,所需携带的系统帧号的部分位数为2位时,可以通过循环移位的位数0、10、20、30来携带这2位系统帧号的信息,此时,预设序列可以为0100011001110100111101000010101101010000,但预设序列并不是唯一的。
204、网络设备将第二信息序列进行循环移位,以获得第三信息序列。
本实施例中,待发送信息比特还包括系统帧号的部分比特的信息,因此,为了将系统帧号的剩余部分比特的信息发送给终端,可以将第二信息序列进行循环移位得到第三信息序列,以便通过循环移位的位数携带系统帧号的剩余部分比特的信息。当系统帧号的剩余部分比特为n时,循环移位的位数包括2n种,例如:当系统帧号的剩余部分比特为2时,通过4种循环移位的位数可以携带系统帧号的剩余2个比特。
205、网络设备向终端发送第三信息序列。
本实施例中,网络设备将第二信息序列进行循环移位得到第三信息序列之后,将向终端发送第三信息序列,可以是以广播的方式进行发送,也可以是通过PBCH进行发送,还可以是通过其它方式进行发送,本实施例不作限定。
在一个实施例中,网络设备将第二信息序列进行循环移位得到第三信息序列之后,可以先将第三信息序列依次进行编码和速率匹配,以获得第六信息序列,之后再发送第六信息序列。
在一个实施例中,网络设备将第一信息序列中的比特按照交织方式进行交织或者按照加扰方式进行加扰得到第二信息序列之后,可以先将第二信息序列进行编码以获得第六信息序列,之后再将第六信息序列进行循环移位以获得第三信息序列。其中,将第六信息序列进行循环移位以获得第三信息序列之后,还可以对第三信息序列进行速率匹配之后再发送。
举例说明,当信息序列为[a
1,a
2,a
3,…,a
N]时,编码后的信息序列可以为
循环移位k位后的信息序列可以为 [a
k+1,a
k+2,…,a
N,a
1,a
2,…,a
k],循环移位k位后的编码序列或编码后循环移位k位的序列可以为
206、终端将第三信息序列反向循环移位,以获得第七信息序列。
本实施例中,终端接收到网络设备发送的第三信息序列之后,将第三信息序列反向循环移位,以获得第七信息序列。其中,反向循环移位的位数可以大于或等于0且小于或等于第三信息序列的长度,反向循环移位的位数不是固定的。
207、终端根据交织方式对第七信息序列进行解交织,或者根据加扰方式对第七信息序列进行解扰,以获得第八信息序列。
本实施例中,终端将第三信息序列反向循环移位得到第七信息序列之后,可以根据交织方式对第七信息序列进行解交织,或者根据加扰方式对第七信息序列进行解扰,以获得第八信息序列。其中,交织方式或加扰方式是网络设备和终端预先约定好的,可以确保循环移位后处于CRC位置的比特无法校验循环移位后处于信息比特(即上面提到的待发送信息比特)位置的比特。
本实施例中,第七信息序列包括保留比特,可以将第一比特位中的比特与第二比特位中的比特进行交换,以获得第九信息序列,并将第九信息序列确定为第八信息序列。其中,第一比特位为第二信息序列的首位,第二比特位为处于保留比特位置的预设比特位。
本实施例中,将第一比特位中的比特与第二比特位中的比特进行交换,以获得第九信息序列之后,可以将处于保留比特位置中除第二比特位之外的t个预设比特位中的比特与第九信息序列中除保留比特位置和第一比特位之外的比特位中的t个预设比特位中的比特进行交换,以获得第十信息序列,并将第十信息序列确定为第八信息序列。其中,t大于或等于1且小于保留比特的比特位数。
本实施例中,可以将第二信息序列的首位移位至第一间隙,以获得第九信息序列,并将第九信息序列确定为第八信息序列。其中,第一间隙为处于保留比特位置的比特位间的预设间隙。
本实施例中,将第二信息序列的首位移位至第一间隙,以获得第九信息序列之后,可以将t个预设比特位中的比特分别移位至t个预设间隙,以获得第十信息序列,并将第十信息序列确定为第八信息序列。
本实施例中,可以将第七信息序列中的第一个比特位移位至第七信息序列的最后面,以获得第九信息,并将第九信息序列确定为第八信息序列。
208、当第八信息序列CRC校验通过时,终端将第八信息序列中处于信息比特位置的比特确定为信息比特,并将反向循环移位的位数按照映射关系确定系统帧号的部分比特。
本实施例中,终端根据交织方式对第七信息序列进行解交织,或者根据加扰方式对第七信息序列进行解扰,得到第八信息序列之后,将根据第八信息序列中的CRC校验第八信息序列中的信息比特,当校验通过时,表明反向循环移位的位数等于网络设备正向循环移位的位数,可以将第八信息序列中处于信息比特位置的比特确定为信息比特(即网络设备侧所说的待发送信息比特),并将反向循环移位的位数按照映射关系确定系统帧号的部分比特,从而确定第三信息比特序列是通过那个系统帧号发送过来的。其中,可以计算第八信 息序列中处于信息比特位置的比特的第一CRC,并将第一CRC与第八信息序列中处于CRC位置的第二CRC进行比较,当第一CRC与第二CRC相同时,表明校验通过。
本实施例中,信息比特可以包括保留比特,保留比特中的预设比特位中的比特为1。
在一个实施例中,终端可以先对第三信息序列解速率匹配,之后将解速率匹配的第三信息进行反向循环移位得到第七信息序列。之后可以先将第七信息序列进行解码,以获得第十一信息序列,之后再根据交织方式对第十一信息序列进行解交织,或者根据加扰方式对第十一信息序列进行解扰,以获得第八信息序列。
在一个实施例中,终端可以对第三信息序列依次进行解速率匹配和解码,以获得第十一信息序列,再将第十一信息序列反向循环移位,以获得第七信息序列。
在图2所描述的信息传输方法中,网络设备确定待发送信息比特的CRC,将CRC和待发送信息比特进行级联,以获得第一信息序列,将第一信息序列中的比特按照交织方式进行交织或者按照加扰方式进行加扰,以获得第二信息序列,将第二信息序列进行循环移位,以获得第三信息序列,向终端发送第三信息序列,终端将第三信息序列反向循环移位,以获得第七信息序列,根据交织方式对第七信息序列进行解交织,或者根据加扰方式对第七信息序列进行解扰,以获得第八信息序列,当第八信息序列CRC校验通过时,将第八信息序列中处于信息比特位置的比特确定为信息比特,并将反向循环移位的位数按照映射关系确定系统帧号的部分比特。由于循环移位的位数携带有系统帧号的部分比特的信息,以便终端可以通过反向循环移位的移位的方式确定网络设备发送信息之前对信息进行的移位,进而确定系统帧号,可见,不需要进行多次解码,因此,可以减少解码的次数,从而可以降低终端获取信息的时延。此外,由于交织方式或加扰方式可以确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特,因此,只有当正确的确定循环移位的位数,使待发送信息比特反向循环移位至未循环移位之前的位置时,CRC校验才能通过,因此,可以准确地确定循环移位的位数携带的系统帧号的部分比特的信息,以便终端可以准确地获取到网络设备发送的信息。
基于图1所示的网络架构,请参阅图3,图3是本发明实施例公开的另一种信息传输方法的流程示意图。如图3所示,该信息传输方法是从网络设备101和终端102的角度来描述的。如图3所示,该信息传输方法可以包括以下步骤。
301、网络设备确定待发送信息比特的CRC。
本实施例中,当网络设备存在待发送信息比特,即需要向终端发送信息比特时,将确定待发送信息比特的CRC。其中,CRC是通过待发送信息比特计算得到的,终端可以通过CRC确定接收到的信息比特是否为正确的信息比特,从而终端可以通过CRC准确的确定传输的信息。其中,待发送信息比特包括保留比特,保留比特的至少一位处于待发送信息比特的最前面,且处于待发送信息比特首位的保留比特位的比特为。此外,保留比特的t个比特位可以处于除待发送信息比特首位和保留比特位置所在比特位之外的比特位,t个比特位中的比特均为1。其中,保留比特可以为全0序列,也可以为全1序列,还可以为其它序列。其中,t大于或等于1且小于保留比特的比特位数。
302、网络设备将CRC和待发送信息比特进行级联,以获得第一信息序列。
本实施例中,网络设备确定待发送信息比特的CRC之后,将CRC和待发送信息比特进行级联,可以得到第一信息序列,可以是将CRC级联在待发送信息比特之后,也可以是将待发送信息比特级联在CRC之后,还可以是将CRC插入待发送信息比特中间的某一位置,还可以是其它级联方式,本实施例不作限定。
303、网络设备将第一信息序列进行循环移位,以获得第二信息序列。
本实施例中,待发送信息比特还包括系统帧号的部分比特的信息,因此,为了将系统帧号的剩余部分比特的信息发送给终端,可以将第一信息序列进行循环移位得到第二信息序列,以便通过循环移位的位数携带系统帧号的剩余部分比特的信息。当系统帧号的剩余部分比特为n时,循环移位的位数包括2n种,例如:当系统帧号的剩余部分比特为2时,通过4种循环移位的位数可以携带系统帧号的剩余2个比特。
在一个实施例中,可以先将第二信息序列依次进行编码和速率匹配以获得第三信息序列,再发送第三信息序列。
在一个实施例中,可以先将第一信息序列进行编码,以获得第四信息序列,再将第四信息序列进行循环移位,以获得第二信息序列。
304、网络设备发送第二信息序列。
本实施例中,网络设备将第一信息序列进行循环移位得到第二信息序列之后,将向终端发送第二信息序列,可以是以广播的方式进行发送,也可以是通过PBCH进行发送,还可以是通过其它方式进行发送,本实施例不作限定。
305、终端将第二信息序列反向循环移位,以获得第五信息序列。
本实施例中,终端接收到网络设备发送的第二信息序列之后,将第二信息序列反向循环移位,以获得第五信息序列。其中,反向循环移位的位数可以大于或等于0且小于或等于第二信息序列的长度,反向循环移位的位数不是固定的。
306、当第五信息序列CRC校验通过时,终端将第五信息序列中处于信息比特位置的比特确定为信息比特,并将反向循环移位的位数按照映射关系确定系统帧号的部分比特。
本实施例中,终端将第二信息序列反向循环移位,以获得第五信息序列之后,将根据第五信息序列中的CRC校验第五信息序列中的信息比特,当校验通过时,表明反向循环移位的位数等于网络设备正向循环移位的位数,可以将第五信息序列中处于信息比特位数的比特确定为信息比特(即网络设备侧所说的待发送信息比特),并将反向循环移位的位数按照映射关系确定系统帧号的部分比特,从而确定第二信息比特序列是通过那个系统帧号发送过来的。其中,可以计算第五信息序列中处于信息比特位置的比特的第一CRC,并将第一CRC与第五信息序列中处于CRC位置的第二CRC进行比较,当第一CRC与第二CRC相同时,表明校验通过。其中,信息比特包括保留比特,保留比特的至少一位处于信息比特的最前面,且处于信息比特首位的保留比特位的比特为1。此外,保留比特的t个比特位可以处于除信息比特首位和保留比特位置所在比特位之外的比特位,t个比特位中的比特均为1。
在一个实施例中,终端可以先将第二信息序列依次进行解速率匹配和解码,以获得第六信息序列,再将第六信息序列反向循环移位,以获得第五信息序列。
在一个实施例中,终端也可以先将第五信息序列进行解码,以获得第七信息序列,当第七信息序列CRC校验通过时,将第七信息序列中处于信息比特位数的比特确定为信息比特。
在图3所描述的信息传输方法中,网络设备确定待发送信息比特的循环冗余校验CRC,网络设备将CRC和待发送信息比特进行级联,以获得第一信息序列,将第一信息序列进行循环移位,以获得第二信息序列,发送第二信息序列,终端将第二信息序列反向循环移位,以获得第五信息序列,当第五信息序列CRC校验通过时,终端将第五信息序列中处于信息比特位数的比特确定为信息比特,并将反向循环移位的位数按照映射关系确定系统帧号的部分比特。由于循环移位的位数携带有系统帧号的部分比特的信息,以便终端可以通过反向循环移位的移位的方式确定网络设备发送信息之前对信息进行的移位,进而确定系统帧号,可见,不需要进行多次解码,因此,可以减少解码的次数,从而可以降低终端获取信息的时延。此外,待发送信息比特包括保留比特,保留比特的至少一位处于待发送信息比特的最前面,且处于待发送信息比特首位的保留比特位的比特为1,可以确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特,以便终端可以准确地获取到网络设备发送的信息。
基于图1所示的网络架构,请参阅图4,图4是本发明实施例公开的一种网络设备的结构示意图。如图4所示,该网络设备可以包括:
确定模块401,用于确定待发送信息比特的CRC;
级联模块402,用于将确定模块401确定的CRC和待发送信息比特进行级联,以获得第一信息序列;
获得模块403,用于将级联模块402级联的第一信息序列中的比特按照交织方式进行交织或者按照加扰方式进行加扰,以获得第二信息序列,交织方式或加扰方式用于确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特;
循环模块404,用于将获得模块403获得的第二信息序列进行循环移位,以获得第三信息序列,循环移位的位数用于携带系统帧号的部分比特的信息;
发送模块405,用于发送循环模块404获得的第三信息序列。
基于图1所示的网络架构,请参阅图5,图5是本发明实施例公开的另一种网络设备的结构示意图。其中,图5所示的网络设备是由图4所示的网络设备优化得到的,其中:
待发送信息比特包括保留比特,该网络设备还可以包括:
设置模块406,用于将保留比特中的预设比特位设置为1,以获得目标信息比特;
确定模块401,具体用于确定设置模块406获得的目标信息比特的CRC;
级联模块402,具体用于将确定模块401确定的CRC和设置模块406设置的目标信息进行级联,以获得第一信息序列。
作为一种可能的实施方式,待发送信息比特可以包括保留比特;
获得模块403将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:
将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列,第一 比特位为第一信息序列的首位,第二比特位为保留比特的任一比特位,交织后的第一比特位的比特为1;
将第四信息序列确定为第二信息序列。
作为一种可能的实施方式,获得模块403将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列还包括:
将保留比特中除第二比特位之外的t个比特位中的比特与第四信息序列中除保留比特包括的比特位之外的t个比特位中的比特进行交换,以获得第五信息序列,t大于或等于1且小于保留比特的比特位数,保留比特中的t个比特位中的比特均为1;
获得模块403将第四信息序列确定为第二信息序列包括:
将第五信息序列确定为第二信息序列。
作为一种可能的实施方式,待发送信息比特可以包括保留比特;
获得模块403将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:
将第一比特位中的比特移位至第一信息序列的最前面,以获得第四信息序列,第一比特位为保留比特的任一比特位,第一比特位中的比特为1;
将第四信息序列确定为第二信息序列。
作为一种可能的实施方式,获得模块403将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列还包括:
将第二比特位中的比特移位至目标位置,以获得第五信息序列,目标位置为第四信息序列中除目标间隙之外的t个间隙中的任一间隙,目标间隙是保留比特中除第一比特位之外的比特位间的间隙,第二比特位为保留比特中除第一比特位之外的t个比特位中的任一比特位,t大于或等于1且小于保留比特的比特位数,第二比特位中的比特为1;
获得模块403将第四信息序列确定为第二信息序列包括:
将第五信息序列确定为第二信息序列。
作为一种可能的实施方式,待发送信息比特可以包括保留比特;
获得模块403将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:
将第三比特位中的比特移位至第一信息序列的最前面,以获得第四信息序列,第三比特位为第一信息序列中的最后一个比特位,第四信息序列的首位的比特为1;
将第四信息序列确定为第二信息序列。
作为一种可能的实施方式,该网络设备还可以包括:
编码模块407,用于将循环模块404获得的第三信息序列依次进行编码和速率匹配,以获得第六信息序列;
发送模块405,具体用于发送编码模块407获得的第六信息序列。
基于图1所示的网络架构,请参阅图6,图6是本发明实施例公开的又一种网络设备的结构示意图。其中,图6所示的网络设备是由图4所示的网络设备优化得到的,其中:
待发送信息比特包括保留比特,该网络设备还可以包括:
设置模块406,用于将保留比特中的预设比特位设置为1,以获得目标信息比特;
确定模块401,具体用于确定设置模块406获得的目标信息比特的CRC;
级联模块402,具体用于将确定模块401确定的CRC和设置模块406设置的目标信息进行级联,以获得第一信息序列。
作为一种可能的实施方式,待发送信息比特可以包括保留比特;
获得模块403将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:
将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列,第一比特位为第一信息序列的首位,第二比特位为保留比特的任一比特位,交织后的第一比特位的比特为1;
将第四信息序列确定为第二信息序列。
作为一种可能的实施方式,获得模块403将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列还包括:
将保留比特中除第二比特位之外的t个比特位中的比特与第四信息序列中除保留比特包括的比特位之外的t个比特位中的比特进行交换,以获得第五信息序列,t大于或等于1且小于保留比特的比特位数,保留比特中的t个比特位中的比特均为1;
获得模块403将第四信息序列确定为第二信息序列包括:
将第五信息序列确定为第二信息序列。
作为一种可能的实施方式,待发送信息比特可以包括保留比特;
获得模块403将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:
将第一比特位中的比特移位至第一信息序列的最前面,以获得第四信息序列,第一比特位为保留比特的任一比特位,第一比特位中的比特为1;
将第四信息序列确定为第二信息序列。
作为一种可能的实施方式,获得模块403将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列还包括:
将第二比特位中的比特移位至目标位置,以获得第五信息序列,目标位置为第四信息序列中除目标间隙之外的t个间隙中的任一间隙,目标间隙是保留比特中除第一比特位之外的比特位间的间隙,第二比特位为保留比特中除第一比特位之外的t个比特位中的任一比特位,t大于或等于1且小于保留比特的比特位数,第二比特位中的比特为1;
获得模块403将第四信息序列确定为第二信息序列包括:
将第五信息序列确定为第二信息序列。
作为一种可能的实施方式,待发送信息比特可以包括保留比特;
获得模块403将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:
将第三比特位中的比特移位至第一信息序列的最前面,以获得第四信息序列,第三比特位为第一信息序列中的最后一个比特位,第四信息序列的首位的比特为1;
将第四信息序列确定为第二信息序列。
作为一种可能的实施方式,该网络设备还可以包括:
编码模块407,用于将获得模块403获得的第二信息序列进行编码,以获得第六信息序列;
循环模块404,具体用于将编码模块407获得的第六信息序列进行循环移位,以获得第三信息序列。
基于图1所示的网络架构,请参阅图7,图7是本发明实施例公开的又一种网络设备的结构示意图。如图7所示,该网络设备可以包括:处理器701、存储器702、收发器703和总线704。其中:
总线704,用于实现这些组件之间的连接;
存储器702中存储有一组程序代码,处理器701用于调用存储器702中存储的程序代码执行以下操作:
确定待发送信息比特的CRC;
将CRC和待发送信息比特进行级联,以获得第一信息序列;
将第一信息序列中的比特按照交织方式进行交织或者按照加扰方式进行加扰,以获得第二信息序列,交织方式或加扰方式用于确保循环移位后处于CRC位置的比特无法校验循环移位后处于待发送信息比特位置的比特;
将第二信息序列进行循环移位,以获得第三信息序列,循环移位的位数用于携带系统帧号的部分比特的信息;
收发器703,用于发送第三信息序列。
作为一种可能的实施方式,待发送信息比特可以包括保留比特,处理器701还用于调用存储器702中存储的程序代码执行以下操作:
将保留比特中的预设比特位设置为1,以获得目标信息比特;
处理器701确定待发送信息比特的CRC包括:
确定目标信息比特的CRC;
处理器701将CRC和待发送信息进行级联,以获得第一信息序列包括:
将CRC和目标信息进行级联,以获得第一信息序列。
作为一种可能的实施方式,待发送信息比特可以包括保留比特;
处理器701将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:
将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列,第一比特位为第一信息序列的首位,第二比特位为保留比特的任一比特位,交织后的第一比特位的比特为1;
将第四信息序列确定为第二信息序列。
作为一种可能的实施方式,处理器701将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列之后,处理器701还用于调用存储器702中存储的程序代码执行以下操作:
将保留比特中除第二比特位之外的t个比特位中的比特与第四信息序列中除保留比特包括的比特位之外的t个比特位中的比特进行交换,以获得第五信息序列,t大于或等于1且小于保留比特的比特位数,保留比特中的t个比特位中的比特为1;
处理器701将第四信息序列确定为第二信息序列包括:
将第五信息序列确定为第二信息序列。
作为一种可能的实施方式,待发送信息比特可以包括保留比特;
处理器701将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:
将第一比特位中的比特移位至第一信息序列的最前面,以获得第四信息序列,第一比特位为保留比特的任一比特位,第一比特位中的比特为1;
将第四信息序列确定为第二信息序列。
作为一种可能的实施方式,处理器701将第一比特位中的比特移位至第一信息序列的最前面,以获得第四信息序列之后,处理器701还用于调用存储器702中存储的程序代码执行以下操作:
将第二比特位中的比特移位至目标位置,以获得第五信息序列,目标位置为第四信息序列中除目标间隙之外的t个间隙中的任一间隙,目标间隙是保留比特中除第一比特位之外的比特位间的间隙,第二比特位为保留比特中除第一比特位之外的t个比特位中的任一比特位,t大于或等于1且小于保留比特的比特位数,第二比特位中的比特为1;
处理器701将第四信息序列确定为第二信息序列包括:
将第五信息序列确定为第二信息序列。
作为一种可能的实施方式,待发送信息比特可以包括保留比特;
处理器701将第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:
将第三比特位中的比特移位至第一信息序列的最前面,以获得第四信息序列,第三比特位为第一信息序列中的最后一个比特位,第四信息序列的首位的比特为1;
将第四信息序列确定为第二信息序列。
作为一种可能的实施方式,处理器701还用于调用存储器702中存储的程序代码执行以下操作:
将第三信息序列依次进行编码和速率匹配,以获得第六信息序列;
收发器703发送第三信息序列包括:
发送第六信息序列。
作为一种可能的实施方式,处理器701还用于调用存储器702中存储的程序代码执行以下操作:
将第二信息序列进行编码,以获得第六信息序列;
处理器701将第二信息序列进行循环移位,以获得第三信息序列包括:
将第六信息序列进行循环移位,以获得第三信息序列。
其中,步骤201-204可以由网络设备中的处理器701和存储器702来执行,步骤205 可以由网络设备中的收发器703来执行。
其中,确定模块401、级联模块402、获得模块403、循环模块404、设置模块406和编码模块407可以由网络设备中的处理器701和存储器702来实现,发送模块405可以由网络设备中的收发器703来实现。
基于图1所示的网络架构,请参阅图8,图8是本发明实施例公开的一种终端的结构示意图。如图8所示,该终端800可以包括:
接收模块801,用于接收网络设备发送的第一信息序列;
循环模块802,用于将801接收模块接收的第一信息序列反向循环移位,以获得第二信息序列;
获得模块803,用于根据交织方式对循环模块802获得的第二信息序列进行解交织,或者根据加扰方式对循环模块802获得的第二信息序列进行解扰,以获得第三信息序列,交织方式或加扰方式用于确保循环移位后处于CRC位置的比特无法校验循环移位后处于信息比特位置的比特;
确定模块804,用于当获得模块803获得的第三信息序列CRC校验通过时,将第三信息序列中处于信息比特位置的比特确定为信息比特,并将循环模块802反向循环移位的位数按照映射关系确定系统帧号的部分比特。
基于图1所示的网络架构,请参阅图9,图9是本发明实施例公开的另一种终端的结构示意图。其中,图9所示的终端是由图8所示的终端优化得到的,其中:
信息比特可以包括保留比特,保留比特中的预设比特位中的比特为1。
作为一种可能的实施方式,第二信息序列可以包括保留比特;
获得模块803根据交织方式对第二信息序列进行解交织,以获得第三信息序列包括:
将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列,第一比特位为第二信息序列的首位,第二比特位为处于保留比特位置的预设比特位;
将第四信息序列确定为第三信息序列。
作为一种可能的实施方式,获得模块803根据交织方式对第二信息序列进行解交织,以获得第三信息序列还包括:
将处于保留比特位置中除第二比特位之外的t个预设比特位中的比特与第四信息序列中除保留比特位置和第一比特位之外的比特位中的t个预设比特位中的比特进行交换,以获得第五信息序列,t大于或等于1且小于保留比特的比特位数;
获得模块803将第四信息序列确定为第三信息序列包括:
将第五信息序列确定为第三信息序列。
作为一种可能的实施方式,第二信息序列可以包括保留比特;
获得模块803根据交织方式对第二信息序列进行解交织,以获得第三信息序列包括:
将第二信息序列的首位移位至第一间隙,以获得第四信息序列,第一间隙为处于保留比特位置的比特位间的预设间隙;
将第四信息序列确定为第三信息序列。
作为一种可能的实施方式,获得模块803根据交织方式对第二信息序列进行解交织, 以获得第三信息序列还包括:
将t个预设比特位中的比特分别移位至t个预设间隙,以获得第五信息序列,t大于或等于1且小于保留比特的比特位数;
获得模块803将第四信息序列确定为第三信息序列包括:
将第五信息序列确定为第三信息序列。
作为一种可能的实施方式,第二信息序列可以包括保留比特;
获得模块803根据交织方式对第二信息序列进行解交织,以获得第三信息序列包括:
将第二信息序列中的第一个比特位移位至第二信息序列的最后面,以获得第四信息;
将第四信息序列确定为第三信息序列。
作为一种可能的实施方式,该终端还可以包括:
解码模块805,用于将接收模块801接收的第一信息序列进行解码,以获得第六信息序列;
循环模块802,具体用于将解码模块805获得的第六信息序列反向循环移位,以获得第二信息序列。
基于图1所示的网络架构,请参阅图10,图10是本发明实施例公开的又一种终端的结构示意图。其中,图10所示的终端是由图8所示的终端优化得到的,其中:
信息比特可以包括保留比特,保留比特中的预设比特位中的比特为1。
作为一种可能的实施方式,第二信息序列可以包括保留比特;
获得模块803根据交织方式对第二信息序列进行解交织,以获得第三信息序列包括:
将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列,第一比特位为第二信息序列的首位,第二比特位为处于保留比特位置的预设比特位;
将第四信息序列确定为第三信息序列。
作为一种可能的实施方式,获得模块803根据交织方式对第二信息序列进行解交织,以获得第三信息序列还包括:
将处于保留比特位置中除第二比特位之外的t个预设比特位中的比特与第四信息序列中除保留比特位置和第一比特位之外的比特位中的t个预设比特位中的比特进行交换,以获得第五信息序列,t大于或等于1且小于保留比特的比特位数;
获得模块803将第四信息序列确定为第三信息序列包括:
将第五信息序列确定为第三信息序列。
作为一种可能的实施方式,第二信息序列可以包括保留比特;
获得模块803根据交织方式对第二信息序列进行解交织,以获得第三信息序列包括:
将第二信息序列的首位移位至第一间隙,以获得第四信息序列,第一间隙为处于保留比特位置的比特位间的预设间隙;
将第四信息序列确定为第三信息序列。
作为一种可能的实施方式,获得模块803根据交织方式对第二信息序列进行解交织,以获得第三信息序列还包括:
将t个预设比特位中的比特分别移位至t个预设间隙,以获得第五信息序列,t大于或 等于1且小于保留比特的比特位数;
获得模块803将第四信息序列确定为第三信息序列包括:
将第五信息序列确定为第三信息序列。
作为一种可能的实施方式,第二信息序列可以包括保留比特;
获得模块803根据交织方式对第二信息序列进行解交织,以获得第三信息序列包括:
将第二信息序列中的第一个比特位移位至第二信息序列的最后面,以获得第四信息;
将第四信息序列确定为第三信息序列。
作为一种可能的实施方式,该终端还可以包括:
解码模块805,用于将循环模块802获得的第二信息序列进行解码,以获得第六信息序列;
获得模块803,具体用于根据交织方式对解码模块805获得的第六信息序列进行解交织,或者根据加扰方式对解码模块805获得的第六信息序列进行解扰,以获得第三信息序列。
基于图1所示的网络架构,请参阅图11,图11是本发明实施例公开的又一种终端的结构示意图。如图11所示,该终端可以包括:处理器1101、存储器1102、收发器1103和总线1104。其中:
总线1104,用于实现这些组件之间的连接;
收发器1103,用于接收网络设备发送的第一信息序列并发送给处理器1101;
存储器1102中存储有一组程序代码,处理器1101用于调用存储器1102中存储的程序代码执行以下操作:
将第一信息序列反向循环移位,以获得第二信息序列;
根据交织方式对第二信息序列进行解交织,或者根据加扰方式对第二信息序列进行解扰,以获得第三信息序列,交织方式或加扰方式用于确保循环移位后处于CRC位置的比特无法校验循环移位后处于信息比特位置的比特;
当第三信息序列CRC校验通过时,将第三信息序列中处于信息比特位置的比特确定为信息比特,并将反向循环移位的位数按照映射关系确定系统帧号的部分比特。
作为一种可能的实施方式,信息比特可以包括保留比特,保留比特中的预设比特位中的比特为1。
作为一种可能的实施方式,第二信息序列可以包括保留比特;
处理器1101根据交织方式对第二信息序列进行解交织,以获得第三信息序列包括:
将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列,第一比特位为第二信息序列的首位,第二比特位为处于保留比特位置的预设比特位;
将第四信息序列确定为第三信息序列。
作为一种可能的实施方式,处理器1101将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列之后,处理器1101还用于调用存储器1102中存储的程序代码执行以下操作:
将处于保留比特位置中除第二比特位之外的t个预设比特位中的比特与第四信息序列 中除保留比特位置和第一比特位之外的比特位中的t个预设比特位中的比特进行交换,以获得第五信息序列,t大于或等于1且小于保留比特的比特位数;
处理器1101将第四信息序列确定为第三信息序列包括:
将第五信息序列确定为第三信息序列。
作为一种可能的实施方式,第二信息序列可以包括保留比特;
处理器1101根据交织方式对第二信息序列进行解交织,以获得第三信息序列包括:
将第二信息序列的首位移位至第一间隙,以获得第四信息序列,第一间隙为处于保留比特位置的比特位间的预设间隙;
将第四信息序列确定为第三信息序列。
作为一种可能的实施方式,将第一比特位到第二比特位中的比特反向循环移位1位,以获得第四信息序列之后,处理器1101还用于调用存储器1102中存储的程序代码执行以下操作:
将t个预设比特位中的比特分别移位至t个预设间隙,以获得第五信息序列,t大于或等于1且小于保留比特的比特位数;
处理器1101将第四信息序列确定为第三信息序列包括:
将第五信息序列确定为第三信息序列。
作为一种可能的实施方式,第二信息序列可以包括保留比特;
处理器1101根据交织方式对第二信息序列进行解交织,以获得第三信息序列包括:
将第二信息序列中的第一个比特位移位至第二信息序列的最后面,以获得第四信息;
将第四信息序列确定为第三信息序列。
作为一种可能的实施方式,处理器1101还用于调用存储器1102中存储的程序代码执行以下操作:
将第一信息序列进行解码,以获得第六信息序列;
处理器1101将第一信息序列反向循环移位,以获得第二信息序列包括:
将第六信息序列反向循环移位,以获得第二信息序列。
作为一种可能的实施方式,处理器1101还用于调用存储器1102中存储的程序代码执行以下操作:
将第二信息序列进行解码,以获得第六信息序列;
处理器1101根据交织方式对第二信息序列进行解交织,或者根据加扰方式对第二信息序列进行解扰,以获得第三信息序列包括:
根据交织方式对第六信息序列进行解交织,或者根据加扰方式对第六信息序列进行解扰,以获得第三信息序列。
其中,步骤206-208可以由终端中的处理器1101和存储器1102来执行,步骤205中终端接收第三信息序列的步骤可以由终端中的收发器1103来执行。
其中,循环模块802、获得模块803、确定模块804和解码模块805可以由终端中的处理器1101和存储器1102来实现,接收模块801可以由终端中的收发器1103来实现。
基于图1所示的网络架构,请参阅图12,图12是本发明实施例公开的又一种网络设 备的结构示意图。如图12所示,该网络设备可以包括:
确定模块1201,用于确定待发送信息比特的CRC,待发送信息比特可以包括保留比特,保留比特的至少一位处于待发送信息比特的最前面,且处于待发送信息比特首位的保留比特位的比特为1;
级联模块1202,用于将确定模块1201确定的CRC和待发送信息比特进行级联,以获得第一信息序列;
循环模块1203,用于将级联模块1202获得的第一信息序列进行循环移位,以获得第二信息序列,循环移位的位数用于携带系统帧号的部分比特;
发送模块1204,用于发送循环模块1203获得的第二信息序列。
基于图1所示的网络架构,请参阅图13,图13是本发明实施例公开的又一种网络设备的结构示意图。其中,图13所示的网络设备是由图12所示的网络设备优化得到的,其中:
保留比特的t个比特位处于除待发送信息比特首位和保留比特位置所在比特位之外的比特位,t个比特位中的比特均为1,t大于或等于1且小于保留比特的比特位数。
作为一种可能的实施方式,该网络设备还可以包括:
编码模块1205,用于将循环模块1203获得的第二信息序列依次进行编码和速率匹配,以获得第三信息序列;
发送模块1204,具体用于发送编码模块1205获得的第三信息序列。
基于图1所示的网络架构,请参阅图14,图14是本发明实施例公开的又一种网络设备的结构示意图。其中,图14所示的网络设备是由图12所示的网络设备优化得到的,其中:
保留比特的t个比特位处于除待发送信息比特首位和保留比特位置所在比特位之外的比特位,t个比特位中的比特均为1,t大于或等于1且小于保留比特的比特位数。
作为一种可能的实施方式,该网络设备还可以包括:
编码模块1205,用于将级联模块1202获得的第一信息序列进行编码,以获得第四信息序列;
循环模块1203,具体用于将编码模块1205获得的第四信息序列进行循环移位,以获得第二信息序列。
基于图1所示的网络架构,请参阅图15,图15是本发明实施例公开的又一种网络设备的结构示意图。如图15所示,该网络设备可以包括:处理器1501、存储器1502、收发器1503和总线1504。其中:
总线1504,用于实现这些组件之间的连接;
存储器1502中存储有一组程序代码,处理器1501用于调用存储器1502中存储的程序代码执行以下操作:
确定待发送信息比特的CRC,待发送信息比特可以包括保留比特,保留比特的至少一位处于待发送信息比特的最前面,且处于待发送信息比特首位的保留比特位的比特为1;
将CRC和待发送信息比特进行级联,以获得第一信息序列;
将第一信息序列进行循环移位,以获得第二信息序列,循环移位的位数用于携带系统帧号的部分比特;
收发器1503,用于发送第二信息序列。
作为一种可能的实施方式,保留比特的t个比特位可以处于除待发送信息比特首位和保留比特位置所在比特位之外的比特位,t个比特位中的比特均为1,t大于或等于1且小于保留比特的比特位数。
作为一种可能的实施方式,处理器1501还用于调用存储器1502中存储的程序代码执行以下操作:
将第二信息序列依次进行编码和速率匹配,以获得第三信息序列;
收发器1503发送第二信息序列包括:
发送第三信息序列。
作为一种可能的实施方式,处理器1501还用于调用存储器1502中存储的程序代码执行以下操作:
将第一信息序列进行编码,以获得第四信息序列;
处理器1501将第一信息序列进行循环移位,以获得第二信息序列包括:
将第四信息序列进行循环移位,以获得第二信息序列。
其中,步骤301-303可以由网络设备中的处理器1501和存储器1502来执行,步骤304可以由网络设备中的收发器1503来执行。
其中,确定模块1201、级联模块1202、循环模块1203和编码模块1205可以由网络设备中的处理器1501和存储器1502来实现,发送模块1204可以由网络设备中的收发器1503来实现。
基于图1所示的网络架构,请参阅图16,图16是本发明实施例公开的又一种终端的结构示意图。如图16所示,该终端可以包括:
接收模块1601,用于接收网络设备发送的第一信息序列;
循环模块1602,用于将接收模块1601接收的第一信息序列反向循环移位,以获得第二信息序列;
确定模块1603,用于当循环模块1602获得的第二信息序列CRC校验通过时,将第二信息序列中处于信息比特位置的比特确定为信息比特,并将循环模块1602反向循环移位的位数按照映射关系确定系统帧号的部分比特,信息比特可以包括保留比特,保留比特的至少一位处于信息比特的最前面,且处于信息比特首位的保留比特位的比特为1。
基于图1所示的网络架构,请参阅图17,图17是本发明实施例公开的又一种终端的结构示意图。其中,图17所示的终端是由图16所示的终端优化得到的,其中:
保留比特的t个比特位可以处于除信息比特首位和保留比特位置所在比特位之外的比特位,t个比特位中的比特均为1,t大于或等于1且小于保留比特的比特位数。
作为一种可能的实施方式,该终端还可以包括:
解码模块1604,用于将接收模块1601接收的第一信息序列进行解速率匹配和解码,以获得第三信息序列;
循环模块1602,用于将解码模块1604获得的第三信息序列反向循环移位,以获得第二信息序列。
基于图1所示的网络架构,请参阅图18,图18是本发明实施例公开的又一种终端的结构示意图。其中,图18所示的终端是由图16所示的终端优化得到的,其中:
保留比特的t个比特位可以处于除信息比特首位和保留比特位置所在比特位之外的比特位,t个比特位中的比特均为1,t大于或等于1且小于保留比特的比特位数。
作为一种可能的实施方式,该终端还可以包括:
解码模块1604,用于将循环模块1602获得的第二信息序列进行解码,以获得第三信息序列;
确定模块1603,具体用于当解码模块1604获得的第三信息序列CRC校验通过时,将第三信息序列中处于信息比特位置的比特确定为信息比特。
基于图1所示的网络架构,请参阅图19,图19是本发明实施例公开的又一种终端的结构示意图。如图19所示,该终端可以包括:处理器1901、存储器1902、收发器1903和总线1904。其中:
总线1904,用于实现这些组件之间的连接;
收发器1903,用于接收网络设备发送的第一信息序列并发送给处理器1901;
存储器1902中存储有一组程序代码,处理器1901用于调用存储器1902中存储的程序代码执行以下操作:
将第一信息序列反向循环移位,以获得第二信息序列;
当第二信息序列CRC校验通过时,将第二信息序列中处于信息比特位置的比特确定为信息比特,并将反向循环移位的位数按照映射关系确定系统帧号的部分比特,信息比特包括保留比特,保留比特的至少一位处于信息比特的最前面,且处于信息比特首位的保留比特位的比特为1。
作为一种可能的实施方式,保留比特的t个比特位可以处于除信息比特首位和保留比特位置所在比特位之外的比特位,t个比特位中的比特均为1,t大于或等于1且小于保留比特的比特位数。
作为一种可能的实施方式,处理器1901还用于调用存储器1902中存储的程序代码执行以下操作:
将第一信息序列进行解速率匹配和解码,以获得第三信息序列;
处理器1901将第一信息序列反向循环移位,以获得第二信息序列包括:
将第三信息序列反向循环移位,以获得第二信息序列。
作为一种可能的实施方式,处理器1901还用于调用存储器1902中存储的程序代码执行以下操作:
将第二信息序列进行解码,以获得第三信息序列;
处理器1901当第二信息序列CRC校验通过时,将第二信息序列中处于信息比特位置的比特确定为信息比特包括:
当第三信息序列CRC校验通过时,将第三信息序列中处于信息比特位置的比特确定为 信息比特。
其中,步骤305-306可以由终端中的处理器1901和存储器1902来执行,步骤304中终端接收第三信息序列的步骤可以由终端中的收发器1903来执行。
其中,循环模块1602、确定模块1603和解码模块1604可以由终端中的处理器1901和存储器1902来实现,接收模块1601可以由终端中的收发器1903来实现。
本发明实施例还公开了一种可读存储介质,该可读存储介质存储了网络设备和/或终端用于执行图2和3所示的信息传输方法的程序代码。
本领域普通技术人员可以理解上述实施例的各种方法中的全部或部分步骤是可以通过程序来指令相关的硬件来完成,该程序可以存储于可读存储介质中,存储介质可以包括:闪存盘、只读存储器(read-only memory,ROM)、随机存取器(random access memory,RAM)、磁盘或光盘等。
Claims (43)
- 一种信息传输方法,其特征在于,所述方法应用于网络设备,包括:确定待发送信息比特的循环冗余校验CRC;将所述CRC和所述待发送信息比特进行级联,以获得第一信息序列;将所述第一信息序列中的比特按照交织方式进行交织或者按照加扰方式进行加扰,以获得第二信息序列,所述交织方式或所述加扰方式用于确保循环移位后处于所述CRC位置的比特无法校验循环移位后处于所述待发送信息比特位置的比特;将所述第二信息序列进行循环移位,以获得第三信息序列,循环移位的位数用于携带系统帧号的部分比特的信息;发送所述第三信息序列。
- 根据权利要求1所述的方法,其特征在于,所述待发送信息比特包括保留比特,所述方法还包括:将所述保留比特中的预设比特位设置为1,以获得目标信息比特;所述确定所述待发送信息比特的CRC包括:确定所述目标信息比特的CRC;所述将所述CRC和所述待发送信息进行级联,以获得第一信息序列包括:将所述CRC和所述目标信息进行级联,以获得第一信息序列。
- 根据权利要求1所述的方法,其特征在于,所述待发送信息比特包括保留比特;所述将所述第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列,所述第一比特位为所述第一信息序列的首位,所述第二比特位为所述保留比特的任一比特位,交织后的第一比特位的比特为1;将所述第四信息序列确定为第二信息序列。
- 根据权利要求3所述的方法,其特征在于,所述将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列之后,所述方法还包括:将所述保留比特中除所述第二比特位之外的t个比特位中的比特与所述第四信息序列中除所述保留比特包括的比特位之外的t个比特位中的比特进行交换,以获得第五信息序列,所述t大于或等于1且小于所述保留比特的比特位数,所述保留比特中的所述t个比特位中的比特均为1;所述将所述第四信息序列确定为第二信息序列包括:将所述第五信息序列确定为第二信息序列。
- 根据权利要求1所述的方法,其特征在于,所述待发送信息比特包括保留比特;所述将所述第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:将第一比特位中的比特移位至所述第一信息序列的最前面,以获得第四信息序列,所述第一比特位为所述保留比特的任一比特位,所述第一比特位中的比特为1;将所述第四信息序列确定为第二信息序列。
- 根据权利要求5所述的方法,其特征在于,所述将第一比特位中的比特移位至所述 第一信息序列的最前面,以获得第四信息序列之后,所述方法还包括:将第二比特位中的比特移位至目标位置,以获得第五信息序列,所述目标位置为所述第四信息序列中除目标间隙之外的t个间隙中的任一间隙,所述目标间隙是所述保留比特中除所述第一比特位之外的比特位间的间隙,所述第二比特位为所述保留比特中除所述第一比特位之外的t个比特位中的任一比特位,所述t大于或等于1且小于所述保留比特的比特位数,所述第二比特位中的比特为1;所述将所述第四信息序列确定为第二信息序列包括:将所述第五信息序列确定为第二信息序列。
- 根据权利要求1-6任一项所述的方法,其特征在于,所述方法还包括:将所述第三信息序列依次进行编码和速率匹配,以获得第六信息序列;所述发送所述第三信息序列包括:发送所述第六信息序列。
- 一种信息传输方法,其特征在于,所述方法应用于网络设备,包括:确定待发送信息比特的循环冗余校验CRC,所述待发送信息比特包括保留比特,所述保留比特的至少一位处于所述待发送信息比特的最前面,且处于所述待发送信息比特首位的保留比特位的比特为1;将所述CRC和所述待发送信息比特进行级联,以获得第一信息序列;将所述第一信息序列进行循环移位,以获得第二信息序列,循环移位的位数用于携带系统帧号的部分比特;发送所述第二信息序列。
- 根据权利要求8所述的方法,其特征在于,所述保留比特的t个比特位处于除所述待发送信息比特首位和所述保留比特位置所在比特位之外的比特位,所述t个比特位中的比特均为1,所述t大于或等于1且小于所述保留比特的比特位数。
- 根据权利要求8或9所述的方法,其特征在于,所述方法还包括:将所述第二信息序列依次进行编码和速率匹配,以获得第三信息序列;所述发送所述第二信息序列包括:发送所述第三信息序列。
- 一种信息传输方法,其特征在于,所述方法应用于终端,包括:接收网络设备发送的第一信息序列;将所述第一信息序列反向循环移位,以获得第二信息序列;根据交织方式对所述第二信息序列进行解交织,或者根据加扰方式对所述第二信息序列进行解扰,以获得第三信息序列,所述交织方式或所述加扰方式用于确保循环移位后处于循环冗余校验CRC位置的比特无法校验循环移位后处于信息比特位置的比特;当所述第三信息序列CRC校验通过时,将所述第三信息序列中处于信息比特位置的比特确定为信息比特,并将反向循环移位的位数按照映射关系确定系统帧号的部分比特。
- 根据权利要求11所述的方法,其特征在于,所述信息比特包括保留比特,所述保留比特中的预设比特位中的比特为1。
- 根据权利要求11所述的方法,其特征在于,所述第二信息序列包括保留比特;所述根据交织方式对所述第二信息序列进行解交织,以获得第三信息序列包括:将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列,所述第一比特位为所述第二信息序列的首位,所述第二比特位为处于所述保留比特位置的预设比特位;将所述第四信息序列确定为第三信息序列。
- 根据权利要求13所述的方法,其特征在于,所述将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列之后,所述方法还包括:将处于所述保留比特位置中除所述第二比特位之外的t个预设比特位中的比特与所述第四信息序列中除所述保留比特位置和所述第一比特位之外的比特位中的t个预设比特位中的比特进行交换,以获得第五信息序列,所述t大于或等于1且小于所述保留比特的比特位数;所述将所述第四信息序列确定为第三信息序列包括:将所述第五信息序列确定为第三信息序列。
- 根据权利要求11所述的方法,其特征在于,所述第二信息序列包括保留比特;所述根据交织方式对所述第二信息序列进行解交织,以获得第三信息序列包括:将所述第二信息序列的首位移位至第一间隙,以获得第四信息序列,所述第一间隙为处于所述保留比特位置的比特位间的预设间隙;将所述第四信息序列确定为第三信息序列。
- 根据权利要求15所述的方法,其特征在于,所述将所述第二信息序列的首位移位至第一间隙,以获得第四信息序列之后,所述方法还包括:将t个预设比特位中的比特分别移位至t个预设间隙,以获得第五信息序列,所述t大于或等于1且小于所述保留比特的比特位数;所述将所述第四信息序列确定为第三信息序列包括:将所述第五信息序列确定为第三信息序列。
- 根据权利要求11-16任一项所述的方法,其特征在于,所述方法还包括:将所述第一信息序列进行解码,以获得第六信息序列;所述将所述第一信息序列反向循环移位,以获得第二信息序列包括:将所述第六信息序列反向循环移位,以获得第二信息序列。
- 一种信息传输方法,其特征在于,所述方法应用于终端,包括:接收网络设备发送的第一信息序列;将所述第一信息序列反向循环移位,以获得第二信息序列;当所述第二信息序列循环冗余校验CRC校验通过时,将所述第二信息序列中处于信息 比特位置的比特确定为信息比特,并将反向循环移位的位数按照映射关系确定系统帧号的部分比特,所述信息比特包括保留比特,所述保留比特的至少一位处于所述信息比特的最前面,且处于所述信息比特首位的保留比特位的比特为1。
- 根据权利要求18所述的方法,其特征在于,所述保留比特的t个比特位处于除所述信息比特首位和所述保留比特位置所在比特位之外的比特位,所述t个比特位中的比特均为1,所述t大于或等于1且小于所述保留比特的比特位数。
- 根据权利要求18或19所述的方法,其特征在于,所述方法还包括:将所述第一信息序列进行解码,以获得第三信息序列;所述将所述第一信息序列反向循环移位,以获得第二信息序列包括:将所述第三信息序列反向循环移位,以获得第二信息序列。
- 一种网络设备,其特征在于,包括:确定模块,用于确定待发送信息比特的循环冗余校验CRC;级联模块,用于将所述确定模块确定的CRC和所述待发送信息比特进行级联,以获得第一信息序列;获得模块,用于将所述级联模块级联的第一信息序列中的比特按照交织方式进行交织或者按照加扰方式进行加扰,以获得第二信息序列,所述交织方式或所述加扰方式用于确保循环移位后处于所述CRC位置的比特无法校验循环移位后处于所述待发送信息比特位置的比特;循环模块,用于将所述获得模块获得的第二信息序列进行循环移位,以获得第三信息序列,循环移位的位数用于携带系统帧号的部分比特的信息;发送模块,用于发送所述循环模块获得的第三信息序列。
- 根据权利要求21所述的网络设备,其特征在于,所述待发送信息比特包括保留比特,所述网络设备还包括:设置模块,用于将保留比特中的预设比特位设置为1,以获得目标信息比特;所述确定模块,具体用于确定所述设置模块获得的目标信息比特的CRC;所述级联模块,具体用于将所述CRC和所述目标信息进行级联,以获得第一信息序列。
- 根据权利要求21所述的网络设备,其特征在于,所述待发送信息比特包括保留比特;所述获得模块将所述第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列,所述第一比特位为所述第一信息序列的首位,所述第二比特位为所述保留比特的任一比特位,交织后的第一比特位的比特为1;将所述第四信息序列确定为第二信息序列。
- 根据权利要求23所述的网络设备,其特征在于,所述获得模块将所述第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列还包括:将所述保留比特中除所述第二比特位之外的t个比特位中的比特与所述第四信息序列中除所述保留比特包括的比特位之外的t个比特位中的比特进行交换,以获得第五信息序列,所述t大于或等于1且小于所述保留比特的比特位数,所述保留比特中的所述t个比特位中的比特均为1;所述获得模块将所述第四信息序列确定为第二信息序列包括:将所述第五信息序列确定为第二信息序列。
- 根据权利要求21所述的网络设备,其特征在于,所述待发送信息比特包括保留比特;所述获得模块将所述第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列包括:将第一比特位中的比特移位至所述第一信息序列的最前面,以获得第四信息序列,所述第一比特位为所述保留比特的任一比特位,所述第一比特位中的比特为1;将所述第四信息序列确定为第二信息序列。
- 根据权利要求25所述的网络设备,其特征在于,所述获得模块将所述第一信息序列中的比特按照交织方式进行交织,以获得第二信息序列还包括:将第二比特位中的比特移位至目标位置,以获得第五信息序列,所述目标位置为所述第四信息序列中除目标间隙之外的t个间隙中的任一间隙,所述目标间隙是所述保留比特中除所述第一比特位之外的比特位间的间隙,所述第二比特位为所述保留比特中除所述第一比特位之外的t个比特位中的任一比特位,所述t大于或等于1且小于所述保留比特的比特位数,所述第二比特位中的比特为1;所述获得模块将所述第四信息序列确定为第二信息序列包括:将所述第五信息序列确定为第二信息序列。
- 根据权利要求21-26任一项所述的网络设备,其特征在于,所述网络设备还包括:编码模块,用于将所述循环模块获得的第三信息序列依次进行编码和速率匹配,以获得第六信息序列;所述发送模块,具体用于发送所述编码模块获得的第六信息序列。
- 一种网络设备,其特征在于,包括:确定模块,用于确定待发送信息比特的循环冗余校验CRC,所述待发送信息比特包括保留比特,所述保留比特的至少一位处于所述待发送信息比特的最前面,且处于所述待发送信息比特首位的保留比特位的比特为1;级联模块,用于将所述确定模块确定的CRC和所述待发送信息比特进行级联,以获得第一信息序列;循环模块,用于将所述级联模块获得的第一信息序列进行循环移位,以获得第二信息序列,循环移位的位数用于携带系统帧号的部分比特;发送模块,用于发送所述循环模块获得的第二信息序列。
- 根据权利要求28所述的网络设备,其特征在于,所述保留比特的t个比特位处于 除所述待发送信息比特首位和所述保留比特位置所在比特位之外的比特位,所述t个比特位中的比特均为1,所述t大于或等于1且小于所述保留比特的比特位数。
- 根据权利要求28或29所述的网络设备,其特征在于,所述网络设备还包括:编码模块,用于将所述循环模块获得的第二信息序列依次进行编码和速率匹配,以获得第三信息序列;所述发送模块,具体用于发送所述编码模块获得的第三信息序列。
- 一种终端,其特征在于,包括:接收模块,用于接收网络设备发送的第一信息序列;循环模块,用于将所述接收模块接收的第一信息序列反向循环移位,以获得第二信息序列;获得模块,用于根据交织方式对所述循环模块获得的第二信息序列进行解交织,或者根据加扰方式对所述第二信息序列进行解扰,以获得第三信息序列,所述交织方式或所述加扰方式用于确保循环移位后处于循环冗余校验CRC位置的比特无法校验循环移位后处于信息比特位置的比特;确定模块,用于当所述获得模块获得的第三信息序列CRC校验通过时,将所述第三信息序列中处于信息比特位置的比特确定为信息比特,并将所述循环模块反向循环移位的位数按照映射关系确定系统帧号的部分比特。
- 根据权利要求31所述的终端,其特征在于,所述信息比特包括保留比特,所述保留比特中的预设比特位中的比特为1。
- 根据权利要求31所述的终端,其特征在于,所述第二信息序列包括保留比特;所述获得模块根据交织方式对所述第二信息序列进行解交织,以获得第三信息序列包括:将第一比特位中的比特与第二比特位中的比特进行交换,以获得第四信息序列,所述第一比特位为所述第二信息序列的首位,所述第二比特位为处于所述保留比特位置的预设比特位;将所述第四信息序列确定为第三信息序列。
- 根据权利要求33所述的终端,其特征在于,所述获得模块根据交织方式对所述第二信息序列进行解交织,以获得第三信息序列还包括:将处于所述保留比特位置中除所述第二比特位之外的t个预设比特位中的比特与所述第四信息序列中除所述保留比特位置和所述第一比特位之外的比特位中的t个预设比特位中的比特进行交换,以获得第五信息序列,所述t大于或等于1且小于所述保留比特的比特位数;所述获得模块将所述第四信息序列确定为第三信息序列包括:将所述第五信息序列确定为第三信息序列。
- 根据权利要求31所述的终端,其特征在于,所述第二信息序列包括保留比特;所述获得模块根据交织方式对所述第二信息序列进行解交织,以获得第三信息序列包 括:将所述第二信息序列的首位移位至第一间隙,以获得第四信息序列,所述第一间隙为处于所述保留比特位置的比特位间的预设间隙;将所述第四信息序列确定为第三信息序列。
- 根据权利要求35所述的终端,其特征在于,所述获得模块根据交织方式对所述第二信息序列进行解交织,以获得第三信息序列还包括:将t个预设比特位中的比特分别移位至t个预设间隙,以获得第五信息序列,所述t大于或等于1且小于所述保留比特的比特位数;所述获得模块将所述第四信息序列确定为第三信息序列包括:将所述第五信息序列确定为第三信息序列。
- 根据权利要求31-36任一项所述的终端,其特征在于,所述终端还包括:解码模块,用于将所述接收模块接收的第一信息序列进行解码,以获得第六信息序列;所述循环模块,具体用于将所述解码模块获得的第六信息序列反向循环移位,以获得第二信息序列。
- 一种终端,其特征在于,包括:接收模块,用于接收网络设备发送的第一信息序列;循环模块,用于将所述接收模块接收的第一信息序列反向循环移位,以获得第二信息序列;确定模块,用于当所述循环模块获得的第二信息序列循环冗余校验CRC校验通过时,将所述第二信息序列中处于信息比特位置的比特确定为信息比特,并将反向循环移位的位数按照映射关系确定系统帧号的部分比特,所述信息比特包括保留比特,所述保留比特的至少一位处于所述信息比特的最前面,且处于所述信息比特首位的保留比特位的比特为1。
- 根据权利要求38所述的终端,其特征在于,所述保留比特的t个比特位处于除所述信息比特首位和所述保留比特位置所在比特位之外的比特位,所述t个比特位中的比特均为1,所述t大于或等于1且小于所述保留比特的比特位数。
- 根据权利要求38或39所述的终端,其特征在于,所述终端还包括:解码模块,用于将所述接收模块接收的第一信息序列进行解速率匹配和解码,以获得第三信息序列;所述循环模块,用于将所述解码模块获得的第三信息序列反向循环移位,以获得第二信息序列。
- 一种网络设备,包括:处理器、存储器和收发器,其特征在于,在所述存储器中存储有可执行代码,所述处理器用于执行所述可执行代码实现权利要求1~10任意一项所述的方法。
- 一种终端,包括:处理器、存储器和收发器,其特征在于,在所述存储器中存储有可执行代码,所述处理器用于执行所述可执行代码实现权利要求11~20任意一项所述的方法。
- 一种存储介质,其特征在于,包括:所述存储介质中存储有可执行代码,所述可执行代码被执行,则实现权利要求1~20任意一项所述的方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP18745295.8A EP3562072B1 (en) | 2017-01-25 | 2018-01-16 | Information transmission method and device |
US16/518,573 US10985873B2 (en) | 2017-01-25 | 2019-07-22 | CRC bits for information transmission method and device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710056763.1A CN108347296B (zh) | 2017-01-25 | 2017-01-25 | 一种信息传输方法及设备 |
CN201710056763.1 | 2017-01-25 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US16/518,573 Continuation US10985873B2 (en) | 2017-01-25 | 2019-07-22 | CRC bits for information transmission method and device |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2018137511A1 true WO2018137511A1 (zh) | 2018-08-02 |
Family
ID=62961836
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CN2018/072809 WO2018137511A1 (zh) | 2017-01-25 | 2018-01-16 | 一种信息传输方法及设备 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10985873B2 (zh) |
EP (1) | EP3562072B1 (zh) |
CN (1) | CN108347296B (zh) |
WO (1) | WO2018137511A1 (zh) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102035623A (zh) * | 2010-12-21 | 2011-04-27 | 大唐移动通信设备有限公司 | 一种确定系统帧号的方法及装置 |
CN102271023A (zh) * | 2010-09-30 | 2011-12-07 | 重庆重邮信科通信技术有限公司 | 长期演进lte系统的系统帧号检测方法及装置 |
US20130265927A1 (en) * | 2012-04-10 | 2013-10-10 | Innowireless Co., Ltd. | Method of decoding physical broadcast channel in long term evolution system |
CN103944699A (zh) * | 2013-01-18 | 2014-07-23 | 中兴通讯股份有限公司 | 一种系统帧序号信息的传输方法、装置及系统 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8467480B2 (en) | 2009-09-14 | 2013-06-18 | Qualcomm Incorporated | Combining decision metrics for decoding based on payload difference |
US20110255631A1 (en) * | 2010-04-20 | 2011-10-20 | Samsung Electronics Co., Ltd. | Methods and apparatus for fast synchronization using tail biting convolutional codes |
US8635517B2 (en) * | 2011-01-31 | 2014-01-21 | Samsung Electronics Co., Ltd. | Methods and apparatus for fast synchronization using quasi-cyclic low-density parity-check (QC-LDPC) codes |
US20130322402A1 (en) * | 2012-05-31 | 2013-12-05 | Mediatek Inc. | Method and apparatus for performing channel coding control |
US9369248B2 (en) * | 2012-09-19 | 2016-06-14 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and communication node for mapping an enhanced physical downlink control channel, EPDCCH, message |
US9628251B2 (en) | 2012-11-29 | 2017-04-18 | Mediatek, Inc. | UE measurement enhancement in adaptive TDD configuration networks |
EP2950461A4 (en) | 2013-01-28 | 2016-10-05 | Lg Electronics Inc | METHOD FOR EXECUTING HIGH-SPEED INITIAL ACCESS PROCESS IN WIRELESS ACCESS SYSTEM SUPPORTING ULTRA HIGH FREQUENCY BAND, AND DEVICE SUPPORTING SAID METHOD |
KR101737853B1 (ko) * | 2013-08-01 | 2017-05-19 | 엘지전자 주식회사 | 방송 신호 송신 장치, 방송 신호 수신 장치, 방송 신호 송신 방법 및 방송 신호 수신 방법 |
US9516541B2 (en) * | 2013-09-17 | 2016-12-06 | Intel IP Corporation | Congestion measurement and reporting for real-time delay-sensitive applications |
US20160014727A1 (en) * | 2014-07-14 | 2016-01-14 | Google Technology Holdings LLC | Methods for multi-subframe transmission and reception of control information |
CN106716895B (zh) | 2015-01-30 | 2019-10-22 | 华为技术有限公司 | 网络设备、用户设备和系统消息传输方法 |
US10383106B2 (en) * | 2017-01-04 | 2019-08-13 | Coherent Logix, Incorporated | Scrambling sequence design for embedding UE ID into frozen bits for DCI blind detection |
-
2017
- 2017-01-25 CN CN201710056763.1A patent/CN108347296B/zh active Active
-
2018
- 2018-01-16 WO PCT/CN2018/072809 patent/WO2018137511A1/zh unknown
- 2018-01-16 EP EP18745295.8A patent/EP3562072B1/en active Active
-
2019
- 2019-07-22 US US16/518,573 patent/US10985873B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102271023A (zh) * | 2010-09-30 | 2011-12-07 | 重庆重邮信科通信技术有限公司 | 长期演进lte系统的系统帧号检测方法及装置 |
CN102035623A (zh) * | 2010-12-21 | 2011-04-27 | 大唐移动通信设备有限公司 | 一种确定系统帧号的方法及装置 |
US20130265927A1 (en) * | 2012-04-10 | 2013-10-10 | Innowireless Co., Ltd. | Method of decoding physical broadcast channel in long term evolution system |
CN103944699A (zh) * | 2013-01-18 | 2014-07-23 | 中兴通讯股份有限公司 | 一种系统帧序号信息的传输方法、装置及系统 |
Non-Patent Citations (1)
Title |
---|
See also references of EP3562072A4 * |
Also Published As
Publication number | Publication date |
---|---|
CN108347296B (zh) | 2020-12-22 |
EP3562072B1 (en) | 2022-11-30 |
US10985873B2 (en) | 2021-04-20 |
US20190349131A1 (en) | 2019-11-14 |
CN108347296A (zh) | 2018-07-31 |
EP3562072A1 (en) | 2019-10-30 |
EP3562072A4 (en) | 2020-01-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US11071116B2 (en) | Coding/decoding method, apparatus, and device | |
KR101952799B1 (ko) | 폴라 코드 인코딩 방법 및 인코딩 장치 | |
US11057150B2 (en) | Polar code transmission method and apparatus | |
US20080301536A1 (en) | Channel coding and rate matching for lte control channels | |
CN107135046B (zh) | 一种信息传输方法及装置 | |
US20210203361A1 (en) | Method and apparatus for transmitting information | |
CN111200442A (zh) | 编译码方法、编码译码装置以及系统 | |
US20230171033A1 (en) | Retransmission method and apparatus | |
CN110890894A (zh) | 级联编码的方法和装置 | |
WO2017101023A1 (zh) | 通信方法及网络设备、用户设备 | |
CN103138901A (zh) | 用于处理捎带的应答/非应答字段的方法和设备 | |
KR102308291B1 (ko) | 통신 방법 및 통신 장치 | |
CN108737020B (zh) | 一种信息承载方法及装置 | |
US8780930B2 (en) | System and method for removing PDCCH detection errors in a telecommunications network | |
WO2018137511A1 (zh) | 一种信息传输方法及设备 | |
JP7375111B2 (ja) | 符号化方法および装置 | |
CN108696283B (zh) | 数据编码和译码的方法和装置 | |
WO2018177258A1 (zh) | 标识信息的处理方法及设备 | |
WO2017050377A1 (en) | Tail-biting convolutional codes with very short information blocks | |
CN111405660B (zh) | 传输数据的方法、网络设备和终端设备 | |
CN108631915B (zh) | 极性码的编码、译码方法及设备 | |
CN111699719B (zh) | Nb-iot设备中广播信道接收的改进 | |
WO2019029576A1 (zh) | 编码方法、译码方法、编码装置和译码装置 | |
EP2850764B1 (en) | System and method for removing pdcch detection errors in a telecommunications network | |
CN108574556A (zh) | 一种Polar码的速率匹配方法及装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 18745295 Country of ref document: EP Kind code of ref document: A1 |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
ENP | Entry into the national phase |
Ref document number: 2018745295 Country of ref document: EP Effective date: 20190724 |