WO2018135690A1 - Procédé de production d'une diode électroluminescente - Google Patents

Procédé de production d'une diode électroluminescente Download PDF

Info

Publication number
WO2018135690A1
WO2018135690A1 PCT/KR2017/001444 KR2017001444W WO2018135690A1 WO 2018135690 A1 WO2018135690 A1 WO 2018135690A1 KR 2017001444 W KR2017001444 W KR 2017001444W WO 2018135690 A1 WO2018135690 A1 WO 2018135690A1
Authority
WO
WIPO (PCT)
Prior art keywords
light emitting
polar
type semiconductor
semiconductor layer
emitting structure
Prior art date
Application number
PCT/KR2017/001444
Other languages
English (en)
Korean (ko)
Inventor
김진교
장동수
주미연
김화섭
김동회
Original Assignee
경희대학교산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 경희대학교산학협력단 filed Critical 경희대학교산학협력단
Publication of WO2018135690A1 publication Critical patent/WO2018135690A1/fr

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004Devices characterised by their operation
    • H01L33/0008Devices characterised by their operation having p-n or hi-lo junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages

Definitions

  • Embodiments of the present invention relate to a method of manufacturing a light emitting device using epitaxial lateral overgrowth (ELOG) and selective etching.
  • ELOG epitaxial lateral overgrowth
  • III-V nitride semiconductors such as gallium nitride (GaN) are due to their excellent physical and chemical properties such as light emitting diodes (LEDs), laser diodes (LDs), solar cells, optoelectronic devices, laser diodes, and high-frequency microelectronics. It is attracting attention as the core material of semiconductor optical devices such as devices.
  • the III-V nitride semiconductor is usually made of a semiconductor material having a compositional formula of Al x In y Ga 1-x -y N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1).
  • the nitride semiconductor optical device is applied as a light source of various products such as a backlight of a mobile phone, a keypad, an electronic board, an illumination device, and the like.
  • gallium nitride unlike silicon (Si), is almost impossible to manufacture ingots, and thus has a great difficulty in producing a single crystal substrate. Therefore, gallium nitride was grown by sapphire substrate, silicon carbide substrate, or silicon substrate by growing a gallium nitride thick film by heteroepitaxial, and then separating the substrate to produce gallium nitride.
  • gallium nitride at high quality is difficult to accommodate growth substrates that do not match closely to the crystal properties of gallium nitride because there is no suitable growth substrate that matches high quality bulk crystals and / or crystal properties of these materials. Defects and dislocations (for gallium nitride, in particular threading dislocations (TD) originating at the interface between the growth substrate and GaN).
  • TD threading dislocations
  • LLO laser lift off
  • CLO chemical lift off
  • the laser lift off (LLO) method is a technique of separating and dissolving an interface between a substrate and a thick film by a laser, and has a problem of high defect occurrence rate and high cost in the separation process
  • chemical lift off (CLO) method is relatively inexpensive and has a low incidence of additional defects in the separation process, but requires a chemically etchable sacrificial layer, so that the crystallinity of gallium nitride grown on the sacrificial layer is relatively low. There was this.
  • gallium nitride (GaN) based light emitting devices are expected to be used in future high efficiency lighting applications to replace incandescent and fluorescent lighting lamps.
  • gallium nitride (GaN) light emitting devices developed to date need further improvement in terms of luminous efficiency, light output and price, and in particular, in order to extend the application of gallium nitride (GaN) light emitting devices to general lighting, Achieving high brightness by improving the quality is considered a top priority.
  • the light generated inside the gallium nitride (GaN) light emitting device generates a total internal reflection due to the difference in refractive index between the semiconductor and the air, thereby increasing the light extraction efficiency.
  • a light emitting structure is mainly grown on a sapphire substrate, and then patterned to a micro size to manufacture a micro LED, and then the electrodes are connected to each other.
  • An object of embodiments of the present invention is to epitaxially lateral overgroose (ELOG) an n-type semiconductor layer to selectively grow an N-polar light emitting structure and a Ga-polar light emitting structure, and then selectively form an N-polar light emitting structure. It is for manufacturing a high quality vertical light emitting device by using a removing process.
  • ELOG epitaxially lateral overgroose
  • An object of embodiments of the present invention is to epitaxially lateral overgroose (ELOG) an n-type semiconductor layer to selectively grow an N-polar light emitting structure and a Ga-polar light emitting structure, and then selectively form an N-polar light emitting structure. It is for reducing the defect ratio of a light emitting element using the process of removing.
  • ELOG epitaxially lateral overgroose
  • An object of embodiments of the present invention is to easily remove the growth substrate from the light emitting device by using a chemical etching that does not require a sacrificial layer, and to reduce the damage of the light emitting device due to the growth substrate removal process, thereby maintaining the characteristics of the high quality light emitting device It is to let.
  • An object of the embodiments of the present invention is to produce a light emitting device by using a process of selectively growing the N-polar light emitting structure and Ga-polar light emitting structure, and then selectively remove the N-polar light emitting structure, To simplify the manufacturing process, to reduce the manufacturing cost.
  • An object of embodiments of the present invention is to epitaxially lateral overgroose (ELOG) an n-type semiconductor layer to selectively grow an N-polar n-type semiconductor layer and a Ga-polar n-type semiconductor layer, and then selectively It is for manufacturing a high quality n-type semiconductor layer using a process of removing the N-polar n-type semiconductor layer.
  • ELOG epitaxially lateral overgroose
  • a method of manufacturing a light emitting device includes: forming a mask layer including at least one window area and a protrusion area on a substrate; An n-type semiconductor layer epitaxial lateral overgrowth (ELOG) on the growth substrate and an active layer and a p-type semiconductor layer on the n-type semiconductor layer to grow an N-polar light emitting structure and Forming a light emitting structure comprising a Ga-polar light emitting structure; Selectively etching the N-polar light emitting structure; Forming a first electrode on top of the Ga-polar light emitting structure; And forming a second electrode on the bottom of the Ga-polar light emitting structure, wherein the window region of the mask layer has a window pattern of a negative type.
  • ELOG n-type semiconductor layer epitaxial lateral overgrowth
  • the negative type window pattern may have a dot shape, a polygon shape, an elliptical shape, or a stripe shape.
  • the Ga-polar light emitting structure formed on the protruding region may have a negative pattern.
  • only the N-polar light emitting structure may be grown on the window region, and only the Ga-polar light emitting structure may be grown on the protruding region, or the N-polar light emitting structure and the Ga-polar light emitting structure may be mixed and grown.
  • the first electrode and the second electrode may be formed to apply a current perpendicular to the light emitting structure.
  • the first electrode and the second electrode may be formed separately on each of the Ga-polar light emitting structures.
  • potassium hydroxide KOH
  • KOH potassium hydroxide
  • the active layer may be formed as a single-quantum well structure or a multi-quantum well structure (MQW).
  • MQW multi-quantum well structure
  • the active layer may include at least one of indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), gallium nitride (GaN), and aluminum indium gallium nitride (AlInGaN). It may include.
  • InGaN indium gallium nitride
  • AlGaN aluminum gallium nitride
  • GaN gallium nitride
  • AlInGaN aluminum indium gallium nitride
  • the growth substrate may include at least one of sapphire, gallium arsenide (GaAs), spinel, spinel, silicon (Si), indium phosphide (InP) and silicon carbide (SiC). It can be one.
  • the mask layer may include at least one of silicon oxide (SiO 2), silicon nitride (SiN x), and silicon oxynitride (SiON).
  • the n-type semiconductor layer may include gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN). It may include at least one of.
  • the p-type semiconductor layer may be formed of gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), indium nitride (InN), or aluminum nitride (InN). At least one of aluminum nitride (AlN) and aluminum indium gallium nitride (AlInGaN) may be included.
  • a light emitting device manufacturing method includes: forming a mask layer including at least one window area and a protruding area on a substrate; N-type semiconductor layer including an N-polar n-type semiconductor layer and a Ga-polar n-type semiconductor layer by epitaxial lateral overgrowth (ELOG) on the growth substrate Forming a; Selectively etching the N-polar n-type semiconductor layer; Growing an active layer and a p-type semiconductor layer on the Ga-polar n-type semiconductor layer to form a light emitting structure; Forming a first electrode on top of the light emitting structure; And forming a second electrode at a lower end of the light emitting structure, wherein the window area of the mask layer has a window pattern of a negative type.
  • the negative type window pattern may have a dot shape, a polygon shape, an elliptical shape, or a stripe shape.
  • a light emitting device manufacturing method includes: forming a mask layer including at least one window area and a protruding area on a substrate; N-type semiconductor layer including an N-polar n-type semiconductor layer and a Ga-polar n-type semiconductor layer by epitaxial lateral overgrowth (ELOG) on the growth substrate Forming a; Selectively etching the N-polar n-type semiconductor layer; Laterally growing the Ga-polar n-type semiconductor layer; Growing an active layer and a p-type semiconductor layer on the laterally grown Ga-polar n-type semiconductor layer to form a light emitting structure; Forming a first electrode on top of the light emitting structure; And forming a second electrode at a lower end of the light emitting structure, wherein the window area of the mask layer has a window pattern of a negative type.
  • the negative type window pattern may have a dot shape, a polygon shape, an elliptical shape, or a stripe shape.
  • an n-type semiconductor layer is epitaxially lateral overgroove (ELOG) to selectively grow an N-polar light emitting structure and a Ga-polar light emitting structure, and optionally, N
  • ELOG epitaxially lateral overgroove
  • an n-type semiconductor layer is epitaxially lateral overgroove (ELOG) to selectively grow an N-polar light emitting structure and a Ga-polar light emitting structure, and optionally, N
  • ELOG epitaxially lateral overgroove
  • the method of manufacturing the light emitting device according to the embodiments of the present invention removes the growth substrate from the light emitting device by using chemical etching that does not require a sacrificial layer, thereby reducing damage to the light emitting device due to the growth substrate removal process, thereby providing a high quality light emitting device. Can maintain the characteristics of
  • the light emitting device manufacturing method emits light using a process of selectively growing an N-polar light emitting structure and a Ga-polar light emitting structure, and then selectively removing the N-polar light emitting structure.
  • the manufacturing process can be simplified and the manufacturing cost can be reduced.
  • an n-type semiconductor layer is epitaxially lateral overgroove (ELOG) to selectively grow an N-polar n-type semiconductor layer and a Ga-polar n-type semiconductor layer.
  • ELOG epitaxially lateral overgroove
  • a high quality n-type semiconductor layer used for manufacturing a vertical light emitting device may be manufactured by selectively removing an N-polar n-type semiconductor layer.
  • 1 is a diagram illustrating the N-polarity and Ga-polarity of gallium nitride.
  • FIGS. 2A to 2G are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment of the present invention.
  • FIG 3 is a plan view illustrating a Ga-polar light emitting structure after removing the growth substrate and the mask layer in the light emitting device manufacturing method according to the embodiment of the present invention.
  • 4A to 4G are cross-sectional views illustrating a method of manufacturing a light emitting device according to another embodiment of the present invention.
  • 5A to 5H are cross-sectional views illustrating a method of manufacturing a light emitting device according to still another embodiment of the present invention.
  • first and second may be used to describe various components, but the components are not limited by the terms. The terms are used only to distinguish one component from another.
  • a part such as a film, layer, area, configuration request, etc. is said to be "on” or “on” another part, it is not only when it is directly above another part, but also in the middle of the other film, layer, watershed, component It also includes the case where it is interposed.
  • 1 is a diagram illustrating the N-polarity and Ga-polarity of gallium nitride.
  • Gallium nitride is used as a core material for various optical devices because of its excellent physical and chemical properties.
  • Gallium nitride is used by growing by heteroepitaxial on a growth substrate such as sapphire, silicon carbide or silicon.
  • crystal quality may be improved by utilizing epitaxial lateral overgrowth (ELOG).
  • ELOG epitaxial lateral overgrowth
  • Epitaxial lateral overgrowth can grow not only gallium nitride in the vertical direction from the substrate, but also laterally over the masking pattern.
  • gallium nitride has not only defects, but especially "crystal polarity" as an important crystalline property.
  • gallium (Ga) atoms are shown as large gray spheres, and nitrogen (N) atoms as small black spheres.
  • each gallium atom in gallium nitride (eg, wurtzite gallium nitride) is tetrahedrally coordinated to four nitrogen atoms.
  • Gallium nitride may be divided into Ga-polar (+ c; 100) and N-polar (-c; 200) depending on directions.
  • label c refers to a crystal plane that is horizontal to the plane of the epitaxy film.
  • the polarity of gallium nitride is not a surface property, but has a great influence on the bulk property of gallium nitride, and different properties may be expressed depending on the polarity. Therefore, the device may be manufactured by utilizing the polarity characteristics of the epitaxial gallium nitride growth layer.
  • Ga-polar (+ c; 100) gallium nitride and N-polar (-c; 200) gallium nitride are selectively grown, and only gallium nitride of the N-polar (-c; 200) portion is selectively grown.
  • an n-type semiconductor layer for a high quality gallium nitride light emitting structure or light emitting structure can be produced.
  • FIGS. 2A to 2G a technique of manufacturing a light emitting device according to an embodiment of the present invention will be described with reference to FIGS. 2A to 2G.
  • FIGS. 2A to 2G are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment of the present invention.
  • the method may include forming a mask layer 320 including at least one window region 321 and a protruding region 322 on a growth substrate 310.
  • Epitaxial lateral overgrowth (ELOG) on the n-type semiconductor layer 331 on the 310, and an active layer 332 and a p-type semiconductor layer 333 are grown on the n-type semiconductor layer 331, Forming a light emitting structure 330 comprising an N-polar light emitting structure 341 and a Ga-polar light emitting structure 342 and selectively etching the N-polar light emitting structure 341.
  • first electrode 350 on the top of the Ga-polar light emitting structure 342 and forming the second electrode 360 on the bottom of the Ga-polar light emitting structure 342.
  • the light emitting structure 330 is grown in the N-polar direction on the window region 321 (hereinafter referred to as “N-polar light emitting structure”) and in the Ga-polar direction on the protruding region 322.
  • N-polar light emitting structure N-polar light emitting structure
  • Ga-polar light emitting structure Ga-polar light emitting structure
  • 2A is a cross-sectional view of a mask layer including at least one window region and a protruding region formed on a growth substrate.
  • the mask layer 320 may be deposited on the growth substrate 310 using a deposition process or a solution process, and then patterned using photolithography processes.
  • the mask layer 320 may include a window region 321 and a protrusion region 322 by a patterning process, and then the n-type semiconductor layer may be grown through the window region 321 of the mask layer 320. have.
  • the window region 321 of the mask layer 320 may have a negative type window pattern, and the negative type window pattern may have a dot shape, a polygon shape, It may be an elliptical shape or a stripe shape, but is not limited thereto.
  • the light emitting device manufactured by the light emitting device manufacturing method according to the exemplary embodiment of the present invention may manufacture a light emitting device formed in a negative pattern.
  • the light emitting structures are grown on the protruding region 322 and the window region 321, the light emitting structures grown on the window region 321 are subsequently removed by chemical etching, so that the light emitting structures are dots. It may be formed into a structure including a hole of a pattern such as shape, polygonal shape, elliptical shape or stripe shape.
  • a negative pattern of the light emitting device will be described in detail with reference to FIG. 3.
  • the growth substrate 310 is formed of sapphire, gallium arsenide (GaAs), spinel, silicon (Si), indium phosphide (InP), and silicon carbide (SiC). It may be at least one, and preferably sapphire may be used.
  • the mask layer 320 may include at least one of silicon oxide (SiO 2 ), silicon nitride (SiNx) and silicon oxynitride (SiON). Can be used.
  • FIGS. 2B and 2C are cross-sectional views in which an n-type semiconductor layer is epitaxially lateral overgroove (ELOG) on a growth substrate.
  • ELOG epitaxially lateral overgroove
  • the n-type semiconductor layer 331 may be grown by an epitaxial lateral overgrowth (ELOG) method.
  • the n-type semiconductor layer 331 may be grown not only in the vertical direction from the growth substrate 310 but also in the lateral direction above the mask layer 320.
  • the n-type semiconductor layer 331 is vertically grown through the window region 321 of the mask layer 320. Thereafter, in the last step of growth, the n-type semiconductor layer 331 may be grown by extending laterally of the protruding region 322 of the mask layer 320.
  • the vertically grown n-type semiconductor layer 331 is merged, as shown in Figure 2c, the growth substrate 310 and the mask An n-type semiconductor layer 331 grown on the upper surface of the layer 320 may be formed.
  • the grown n-type semiconductor layer 331 is grown on the N-polar n-type semiconductor layer grown on the window region 321 of the mask layer 320 and the protruding region 322 of the mask layer 320. Ga-polar n-type semiconductor layer 331 may be included.
  • the N-polar n-type semiconductor layer is grown on the window region 321, and only the Ga-polar n-type semiconductor layer is grown on the protruding region 322, or the N-polar n-type semiconductor layer and Ga- are grown.
  • the polar n-type semiconductor layer may be mixed and grown.
  • the n-type semiconductor layer 331 is epitaxially lateral overgroove (ELOG) on the mask layer 320 including the window region 321 and the protruding region 322, it is generally N-polar n in all regions. Only one type of -type semiconductor layer or Ga-polar n-type semiconductor layer is grown over the entire region.
  • ELOG epitaxially lateral overgroove
  • the n-type semiconductor layer 331 is epitaxially lateral overgroove on the mask layer 320 including the window region 321 and the protruding region 322.
  • (ELOG) by using a specific condition, only the N-polar n-type semiconductor layer is grown on the window region 321 and only the Ga-polar n-type semiconductor layer is grown on the protrusion region. inversion) property.
  • the n-type semiconductor layer 331 includes gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN). gallium nitride (GaN) may be used.
  • Each gallium atom of gallium nitride used as an n-type semiconductor layer is tetrahedrally coordinated to four nitrogen atoms, and the Ga-polar n-type semiconductor layer characteristics and the N-polar n-type semiconductor layer characteristics are varied according to directions.
  • the N-polar n-type semiconductor layer grown on the window region 321 may be a defect region having a higher defect ratio than the Ga-polar n-type semiconductor layer grown on the protrusion region 322. . Therefore, it is more preferable to use the Ga-polar n-type semiconductor layer rather than the N-polar n-type semiconductor layer.
  • 2D is a cross-sectional view of a light emitting structure including an N-polar light emitting structure and a Ga-polar light emitting structure by growing an active layer and a p-type semiconductor layer on an n-type semiconductor layer.
  • the active layer 332 may have a structure in which a quantum well using a material having a small energy band gap and a quantum barrier using a material having a large energy band gap are alternately stacked at least once.
  • the quantum well may have a single quantum well structure or a multi-quantum well structure (MQW).
  • indium gallium nitride may be used as the quantum well, and gallium nitride (GaN) may be used as the quantum barrier, but is not limited thereto.
  • the active layer 332 may include at least one of indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), gallium nitride (GaN), and aluminum indium gallium nitride (AlInGaN). It may include any one.
  • InGaN indium gallium nitride
  • AlGaN aluminum gallium nitride
  • GaN gallium nitride
  • AlInGaN aluminum indium gallium nitride
  • the p-type semiconductor layer 333 may be formed of gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), indium nitride (InN), or aluminum. At least one of nitride (AlN) and aluminum indium gallium nitride (AlInGaN) may be included, and preferably gallium nitride (GaN) may be used.
  • GaN gallium nitride
  • AlGaN aluminum gallium nitride
  • AlInGaN aluminum indium gallium nitride
  • GaN gallium nitride
  • the light emitting structure 330 formed by growing the active layer 332 and the p-type semiconductor layer 333 on the n-type semiconductor layer 331 is an N-polar light emitting structure 341 grown on the window region 321.
  • the N-polar light emitting structure 341 is grown on the window region 321, and only the Ga-polar light emitting structure 342 is grown on the protruding region 322, or the N-polar light emitting structure 341 and the Ga- is grown.
  • the polar light emitting structure 342 may be mixed and grown.
  • the N-polar light emitting structure 341 grown on the window area may be a defect area having a higher defect ratio than the Ga-polar light emitting structure 342 grown on the protruding area. Therefore, it is more preferable to use the Ga-polar light emitting structure 342 than the N-polar light emitting structure 341.
  • 2E is a cross-sectional view selectively etched N-polar light emitting structure.
  • the light emitting structure may exhibit a difference in etching speed according to polarity.
  • Ga-polar light emitting structure 342 is relatively etch resistant to potassium hydroxide (KOH), whereas N-polar light emitting structure 341 has the property of being easily etched into potassium hydroxide (KOH).
  • the N-polar light emitting structure 341 may be removed by wet etching using potassium hydroxide (KOH).
  • KOH potassium hydroxide
  • the N-polar light emitting structure 341 may be etched by a dry etching method using an additional mask, and the dry etching method may be reactive ion etching (RIE), electron cyclotron resonance (ECR), and ICP (ICP). At least one of Inductively Coupled Plasma).
  • RIE reactive ion etching
  • ECR electron cyclotron resonance
  • ICP ICP
  • Ga-polar light emitting structure 342 is relatively etch resistant to potassium hydroxide (KOH), whereas N-polar light emitting structure 341 has the property of being easily etched into potassium hydroxide (KOH).
  • the light emitting device manufacturing method can easily remove the N-polar light emitting structure 341 selectively without using an additional mask only by chemical etching using potassium hydroxide (KOH).
  • KOH potassium hydroxide
  • the method of manufacturing the light emitting device according to the embodiment of the present invention selectively removes only the N-polar light emitting structure 341 so that only the Ga-polar light emitting structure 342 having relatively few defects exists.
  • the light emitting device manufacturing method by epitaxial side over-gross (ELOG) of the n-type semiconductor layer to selectively select the N-polar light emitting structure 341 and Ga-polar light emitting structure 342 After the growth, the high quality vertical light emitting device may be manufactured using a process of selectively removing the N-polar light emitting structure 341.
  • ELOG epitaxial side over-gross
  • 2F is a cross-sectional view of a first electrode formed on top of a Ga-polar light emitting structure.
  • the mask layer may be removed through chemical etching, and may be performed by wet etching using a solution of any one or a combination of one or more of hydrofluoric acid (HF) and buffered oxide etchant.
  • Hydrofluoric acid (HF) may be used, preferably.
  • the Ga-polar light emitting structure 242 is separated from the substrate by using chemical etching that does not require a sacrificial layer, thereby damaging the light emitting device due to the process of removing the growth substrate 310. In this way, high quality gallium nitride substrate 333 characteristics can be maintained.
  • a first electrode 350 is formed on the top of the Ga-polar light emitting structure 242.
  • the first electrode 350 is formed on the entire surface of the upper end of the Ga-polar light emitting structure 242.
  • the present invention is not limited thereto, and the first electrode 350 is formed on each of the Ga-polar light emitting structures 242. Can be formed.
  • the first electrode 350 may be a p-type electrode, and the first electrode 350 may be platinum (Pt), palladium (Pd), aluminum (Al), gold (Au), silver (Ag), or nickel / gold. (Ni / Au), titanium / aluminum (Ti / Al), indium tin oxide (ITO) or zinc oxide (ZnO) may be used alone or in combination.
  • the first electrode 350 may be attached to the Ga-polar light emitting structure 242 using a support substrate (not shown), and more specifically, a thermal evaporator on the support substrate (not shown). ), The first electrode 350 formed through the E-beam evaporator method, the RF or DC sputtering method, or various electrode forming methods may be attached to the Ga-polar light emitting structure 242. It is not limited to this. In addition, the support substrate (not shown) may be removed as needed.
  • 2G is a cross-sectional view in which a second electrode is formed at the bottom of the Ga-polar light emitting structure.
  • the second electrode 360 is attached to the bottom of the Ga-polar light emitting structure 242, that is, the surface on which the first electrode 350 is not formed.
  • FIG. 2G illustrates the first electrode 350 formed on the entire surface of the lower end of the Ga-polar light emitting structure 242
  • the present invention is not limited thereto, and the second electrode 360 formed on each of the Ga-polar light emitting structures 242 is illustrated. Can be formed.
  • the second electrode 360 may be an n-type electrode, and the second electrode 360 may be platinum (Pt), palladium (Pd), aluminum (Al), gold (Au), silver (Ag), or nickel / gold. (Ni / Au), titanium / aluminum (Ti / Al), indium tin oxide (ITO) or zinc oxide (ZnO) may be used alone or in combination.
  • the second electrode 360 may be formed by a thermal evaporator method, an E-beam evaporator method, a sputtering method, or various electrode forming methods.
  • the second electrode 360 may be attached to the Ga-polar light emitting structure 242 using a support substrate (not shown), and more specifically, a thermal evaporator on the support substrate (not shown). ), The second electrode 360 formed through the E-beam evaporator method, the RF or DC sputtering method, or various electrode forming methods may be attached to the Ga-polar light emitting structure 242. It is not limited to this. In addition, the support substrate (not shown) may be removed as needed.
  • the first electrode 350 and the second electrode 360 are formed in a vertical structure.
  • the first electrode 350 and the second electrode 360 may be formed to vertically apply a current to the light emitting device 300.
  • an electrode is formed on the front surface of the Ga-polar light emitting structure 242 of the light emitting device manufactured by using the method of manufacturing the light emitting device 300 according to an embodiment of the present invention, it is easy to use in a lamp (lamp) When the electrodes are formed on each of the Ga-polar light emitting structures 242, they are easy to use as a display.
  • the method of manufacturing the light emitting device 300 when the light emitting device 300 is obtained, when the first electrode 350 is disposed above and the second electrode 360 is disposed below, the method of manufacturing the light emitting device 300 according to an embodiment of the present invention Since the light emitting structure was grown in the Ga-polar direction, the Ga-polar light emitting device 300 can be obtained.
  • the light emitting device manufactured by using the manufacturing method of the light emitting device 300 according to an embodiment of the present invention may be a micro LED.
  • the light emitting device 300 manufactured according to the manufacturing method of the light emitting device 300 according to an embodiment of the present invention is an N-polar light emitting structure 341 and Ga by the epitaxial side overgloss (ELOG) method.
  • ELOG epitaxial side overgloss
  • a light emitting device manufactured using a method of manufacturing a light emitting device 300 according to an embodiment of the present invention it can be utilized for general lighting that can replace a luminescent lamp. .
  • FIG 3 is a plan view illustrating a Ga-polar light emitting structure after removing a growth substrate and a mask layer in the method of manufacturing a light emitting device according to an embodiment of the present invention.
  • the window region 321 of the mask layer has a window pattern of a negative type having a dot shape, thereby forming a dot-shaped hole (a portion corresponding to the window region 321).
  • Ga-polar light emitting structure 342 may be formed.
  • a light emitting device formed in a negative pattern may be formed.
  • FIGS. 4A to 4G a light emitting device manufacturing method according to another embodiment of the present invention will be described with reference to FIGS. 4A to 4G.
  • 4A to 4G are cross-sectional views illustrating a method of manufacturing a light emitting device according to another embodiment of the present invention.
  • a light emitting device manufacturing method includes forming a mask layer 420 including at least one window region 421 and a protrusion region 422 on a growth substrate 410.
  • the n-type semiconductor layer 430 is epitaxial lateral overgrowth (ELOG) on the 410 to form an N-polar n-type semiconductor layer 431 and a Ga-polar n-type semiconductor layer 432. Forming an n-type semiconductor layer 430 including and selectively etching the N-polar n-type semiconductor layer 431.
  • the active layer 440 and the p-type semiconductor layer 450 are grown on the Ga-polar n-type semiconductor layer 432 to form a light emitting structure 460, and the top of the light emitting structure 460 Forming a first electrode 470 and forming a second electrode 480 at a lower end of the light emitting structure 460.
  • the n-type semiconductor layer 430 is an n-type semiconductor layer 431 (hereinafter referred to as an "N-polar n-type semiconductor layer”) grown on the window region 421 in the N-polar direction and a protruding region (
  • the n-type semiconductor layer 431 (hereinafter, referred to as a "Ga-polar n-type semiconductor layer") grown on the Ga-polar direction may be included on the 422.
  • 4A is a cross-sectional view of a mask layer including at least one window region and a protrusion region formed on a growth substrate.
  • sapphire may be used for the growth substrate 410.
  • the mask layer 420 may include a window region 421 and a protrusion region 422 by a patterning process, and then the n-type semiconductor layer may be grown through the window region 421 of the mask layer 420. have.
  • Silicon oxide may be used for the mask layer 420.
  • the window area 421 and the protruding area 422 of the mask layer 420 may have a negative type window pattern, and the negative type window pattern may have a dot shape,
  • the shape may be a polygonal shape, an elliptical shape, or a stripe shape, but is not limited thereto.
  • 4B and 4C are cross-sectional views in which an n-type semiconductor layer is epitaxially lateral overgroove (ELOG) on a growth substrate.
  • ELOG epitaxially lateral overgroove
  • the n-type semiconductor layer 430 may be grown by an epitaxial lateral overgrowth (ELOG) method.
  • the n-type semiconductor layer 430 is vertically grown through the window region 821 of the mask layer 420. Thereafter, in the last stage of growth, the n-type semiconductor layer 430 may be extended to extend laterally of the protruding region 422 of the mask layer 420.
  • the n-type semiconductor layer 430 grown laterally may be merged to form the n-type semiconductor layer 430 on the upper surfaces of the growth substrate 410 and the mask layer 420. .
  • the grown n-type semiconductor layer 430 is disposed on the N-polar n-type semiconductor layer 431 and the protruding region 422 of the mask layer 420 grown on the window region 421 of the mask layer 420. It may include a Ga-polar n-type semiconductor layer 432 grown on.
  • the N-polar n-type semiconductor layer 431 is grown on the window region 421, and only the Ga-polar n-type semiconductor layer 432 is grown on the protruding region 422, or the N-polar n ⁇
  • the type semiconductor layer 431 and the Ga-polar n-type semiconductor layer 432 may be mixed and grown.
  • the N-polar n-type semiconductor layer 431 grown on the window region 421 has a higher defect ratio than the Ga-polar n-type semiconductor layer 432 grown on the protruding region 422. It may be a high defect area. Therefore, it is more preferable to use the Ga-polar n-type semiconductor layer 432 rather than the N-polar n-type semiconductor layer 431.
  • the n-type semiconductor layer 430 may include gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN). gallium nitride (GaN) may be used.
  • 4D is a cross-sectional view of the N-polar n-type semiconductor layer selectively etched.
  • the N-polar n-type semiconductor layer 431 may be removed by wet etching using potassium hydroxide (KOH).
  • Gallium nitride exhibits a difference in etching rate depending on polarity.
  • the Ga-polar n-type semiconductor layer 432 is relatively etch resistant to potassium hydroxide (KOH), whereas the N-polar n-type semiconductor layer 431 is easily etched into potassium hydroxide (KOH).
  • the light emitting device manufacturing method can easily remove the N-polar n-type semiconductor layer 431 selectively without using an additional mask by chemical etching using potassium hydroxide (KOH).
  • KOH potassium hydroxide
  • the light emitting device fabrication method selectively removes only the N-polar n-type semiconductor layer 431 so that the Ga-polar n-type semiconductor has relatively few defects on the growth substrate 410. Only layer 432 remains.
  • the light emitting device manufacturing method by epitaxial side over-gross (ELOG) of the n-type semiconductor layer, the N-polar n-type semiconductor layer 431 and Ga-polar n-type semiconductor After the layer 432 is selectively grown, a high quality n-type semiconductor layer may be removed using a process of selectively removing the N-polar n-type semiconductor layer 431.
  • ELOG epitaxial side over-gross
  • 4E is a cross-sectional view of a light emitting structure formed by growing an active layer and a p-type semiconductor layer on a Ga-polar n-type semiconductor layer.
  • the active layer 440 and the p-type semiconductor layer 450 are grown only on the Ga-polar n-type semiconductor layer 432 to form the formed light emitting structure 460.
  • the Ga-polar n-type semiconductor layer, the active layer 440, and the p-type semiconductor layer 450 are disposed only on the protruding region 422 except for a dot-shaped negative type window pattern.
  • the light emitting structure 460 may be formed in a structure including a cylindrical hole.
  • the active layer 440 may have a structure in which a quantum well using a material having a small energy band gap and a quantum barrier using a material having a large energy band gap are alternately stacked at least once.
  • the quantum well may have a single quantum well structure or a multi-quantum well structure (MQW).
  • indium gallium nitride may be used as the quantum well, and gallium nitride (GaN) may be used as the quantum barrier, but is not limited thereto.
  • the active layer 440 may include at least one of indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), gallium nitride (GaN), and aluminum indium gallium nitride (AlInGaN). It may include any one.
  • InGaN indium gallium nitride
  • AlGaN aluminum gallium nitride
  • GaN gallium nitride
  • AlInGaN aluminum indium gallium nitride
  • the p-type semiconductor layer 450 may include gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), indium nitride (InN), or aluminum. At least one of nitride (AlN) and aluminum indium gallium nitride (AlInGaN) may be included, and preferably gallium nitride (GaN) may be used.
  • GaN gallium nitride
  • AlGaN aluminum gallium nitride
  • AlInGaN aluminum indium gallium nitride
  • GaN gallium nitride
  • 4F is a cross-sectional view of a first electrode formed on the top of the light emitting structure.
  • the mask layer may be removed through chemical etching, and may be performed by wet etching using a solution of any one or a combination of one or more of hydrofluoric acid (HF) and buffered oxide etchant.
  • Hydrofluoric acid (HF) may be used, preferably.
  • the first electrode 470 is formed on the light emitting structure 460.
  • FIG. 4F illustrates the first electrode 470 formed on the front surface of the upper portion of the light emitting structure 460
  • the present invention is not limited thereto, and the first electrode 470 may be formed on each of the light emitting structures 460.
  • the first electrode 470 may be a p-type electrode, and the first electrode 470 may be platinum (Pt), palladium (Pd), aluminum (Al), gold (Au), silver (Ag), or nickel / gold. (Ni / Au), titanium / aluminum (Ti / Al), indium tin oxide (ITO) or zinc oxide (ZnO) may be used alone or in combination.
  • the first electrode 470 may be attached to the light emitting structure 460 using a support substrate (not shown), more specifically, a method of thermal evaporator on a support substrate (not shown), The first electrode 470 formed through an E-beam evaporator method, an RF or DC sputter method, or various electrode forming methods may be attached to the light emitting structure 460, but is not limited thereto. .
  • the support substrate (not shown) may be removed as needed.
  • 4G is a cross-sectional view in which a second electrode is formed at the bottom of the light emitting structure.
  • the second electrode 480 is attached to the bottom of the light emitting structure 460, that is, the surface on which the first electrode 470 is not formed.
  • the first electrode 470 formed on the front surface of the lower end of the light emitting structure 460 is illustrated.
  • the present invention is not limited thereto, and the second electrode 470 formed on each of the light emitting structures 460 may be formed.
  • the second electrode 470 may be an n-type electrode, and the second electrode 470 may be platinum (Pt), palladium (Pd), aluminum (Al), gold (Au), silver (Ag), nickel / gold (Ni / Au), titanium / aluminum (Ti / Al), indium tin oxide (ITO) or zinc oxide (ZnO) may be used alone or in combination.
  • the second electrode 470 may be formed by a thermal evaporator method, an E-beam evaporator method, a sputtering method, or a variety of electrode forming methods.
  • the second electrode 470 may be attached to the light emitting structure 460 using a support substrate (not shown), more specifically, a method of thermal evaporator on a support substrate (not shown), The second electrode 470 formed through an E-beam evaporator method, an RF or DC sputter method, or various electrode forming methods may be attached to the light emitting structure 460, but is not limited thereto. .
  • the support substrate (not shown) may be removed as needed.
  • the first electrode 470 and the second electrode 480 are formed in a vertical structure.
  • the first electrode 470 and the second electrode 480 may be formed to vertically apply a current to the light emitting device 400.
  • an electrode is formed on the front surface of the light emitting structure 460 of the light emitting device manufactured using the method of manufacturing the light emitting device 400 according to another embodiment of the present invention, it is easy to use in a lamp (lamp), the light emitting structure An electrode formed on each of the 460 is easy to use as a display.
  • the method of manufacturing the light emitting device 400 when the light emitting device 400 is obtained, when the first electrode 470 is disposed above and the second electrode 480 is disposed below, the method of manufacturing the light emitting device 400 according to another embodiment of the present invention Since the n-type semiconductor layer was grown in the Ga-polar direction, the light emitting device 400 including the Ga-polar n-type semiconductor layer 432 can be obtained.
  • the light emitting device manufactured using the light emitting device 400 manufacturing method according to another embodiment of the present invention may be a micro LED.
  • the light emitting device 400 manufactured according to the method of manufacturing the light emitting device 400 according to another embodiment of the present invention is an N-polar n-type semiconductor layer 431 using an epitaxial lateral overgloss (ELOG) method.
  • ELOG epitaxial lateral overgloss
  • the Ga-polar n-type semiconductor layer 432 are selectively grown, and then a process of selectively removing the N-polar n-type semiconductor layer 431 is used to simplify the manufacturing process and reduce the manufacturing cost. Can be reduced.
  • a light emitting device manufactured using a method of manufacturing a light emitting device 400 according to another embodiment of the present invention it can be utilized for general lighting that can replace a luminescent lamp (luminescent lamp). .
  • FIGS. 5A to 5H a light emitting device manufacturing method according to still another embodiment of the present invention will be described with reference to FIGS. 5A to 5H.
  • 4A to 4G are cross-sectional views illustrating a method of manufacturing a light emitting device according to another embodiment of the present invention.
  • FIG. 5A-5D illustrate forming a mask layer 520 including at least one window region 521 and a protruding region 522 on the growth substrate 510, n ⁇ on the growth substrate 510.
  • n-type comprising an N-polar n-type semiconductor layer 531 and a Ga-polar n-type semiconductor layer 532 by epitaxial lateral overgrowth (ELOG) of the type semiconductor layer 530.
  • ELOG epitaxial lateral overgrowth
  • 5A to 5D are the same as those shown in FIGS. 4A to 4D of the method of manufacturing a light emitting device according to another embodiment of the present invention, and thus, overlapping components will be omitted.
  • the step of later growing the Ga-polar n-type semiconductor layer 532, the active layer 540 and the p-type semiconductor layer (on the side-grown Ga-polar n-type semiconductor layer 533) Growing the 550 to form the light emitting structure 560, forming the first electrode 570 on the top of the light emitting structure 560, and forming the second electrode 580 on the bottom of the light emitting structure 560.
  • Forming step will be described in Figures 5e to 5h.
  • the n-type semiconductor layer 530 is an n-type semiconductor layer 531 (hereinafter referred to as an "N-polar n-type semiconductor layer”) grown on the window region 521 in the N-polar direction and a protruding region (
  • the n-type semiconductor layer 531 (hereinafter, referred to as a “Ga-polar n-type semiconductor layer”) grown on the Ga-polar direction may be included on the 522.
  • 5E is a cross-sectional view illustrating a laterally grown Ga-polar n-type semiconductor layer.
  • the Ga-polar n-type semiconductor layer 532 is laterally grown on the mask pattern 120 to form a dot-shaped hole (window region 521). Plate-like Ga-polar n-type semiconductor layer 533 may be formed.
  • the laterally grown Ga-polar n-type semiconductor layer 133 is formed.
  • the Ga-polar n-type semiconductor layer 133 laterally grown on the mask pattern 520 does not contact the growth substrate 510. That is, when the growth is much faster in the horizontal direction than in the vertical direction, since the Ga-polar n-type semiconductor layer 532 is very slow or hardly grown in the downward direction, the laterally grown Ga-polar n-type semiconductor layer is grown. 533 and 132 may be formed so as not to contact the growth substrate 510.
  • 5F is a cross-sectional view of an active layer and a p-type semiconductor layer grown on a laterally grown Ga-polar n-type semiconductor layer.
  • the active layer 540 and the p-type semiconductor layer 550 are grown on the Ga-polar n-type semiconductor layer 533 to form the formed light emitting structure 560.
  • the active layer 540 may have a structure in which a quantum well using a material having a small energy band gap and a quantum barrier using a material having a large energy band gap are alternately stacked at least once.
  • the quantum well may have a single quantum well structure or a multi-quantum well structure (MQW).
  • indium gallium nitride may be used as the quantum well, and gallium nitride (GaN) may be used as the quantum barrier, but is not limited thereto.
  • the active layer 540 includes at least one of indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), gallium nitride (GaN), and aluminum indium gallium nitride (AlInGaN). It may include any one.
  • InGaN indium gallium nitride
  • AlGaN aluminum gallium nitride
  • GaN gallium nitride
  • AlInGaN aluminum indium gallium nitride
  • the p-type semiconductor layer 550 may be formed of gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), indium nitride (InN), or aluminum. At least one of nitride (AlN) and aluminum indium gallium nitride (AlInGaN) may be included, and preferably gallium nitride (GaN) may be used.
  • GaN gallium nitride
  • AlGaN aluminum gallium nitride
  • AlInGaN aluminum indium gallium nitride
  • GaN gallium nitride
  • 5G is a cross-sectional view in which a first electrode is formed on the top of the light emitting structure.
  • the mask layer may be removed through chemical etching, and may be performed by wet etching using a solution of any one or a combination of one or more of hydrofluoric acid (HF) and buffered oxide etchant.
  • Hydrofluoric acid (HF) may be used, preferably.
  • a first electrode 570 is formed on the top of the light emitting structure 560.
  • FIG. 4F illustrates the first electrode 570 formed on the front surface of the upper portion of the light emitting structure 560
  • the present invention is not limited thereto, and the first electrode 570 may be formed on each of the light emitting structures 560.
  • the first electrode 570 may be a p-type electrode, and the first electrode 570 may be platinum (Pt), palladium (Pd), aluminum (Al), gold (Au), silver (Ag), or nickel / gold. (Ni / Au), titanium / aluminum (Ti / Al), indium tin oxide (ITO) or zinc oxide (ZnO) may be used alone or in combination.
  • the first electrode 570 may be attached to the light emitting structure 560 using a support substrate (not shown), more specifically, a thermal evaporator method on a support substrate (not shown), The first electrode 570 formed through an E-beam evaporator method, an RF or DC sputter method, or various electrode forming methods may be attached to the light emitting structure 560, but is not limited thereto. .
  • the support substrate (not shown) may be removed as needed.
  • 5H is a cross-sectional view in which a second electrode is formed at the bottom of the light emitting structure.
  • the second electrode 580 is attached to the bottom of the light emitting structure 560, that is, the surface on which the first electrode 570 is not formed.
  • FIG. 5H illustrates the first electrode 570 formed on the entire surface of the lower end of the light emitting structure 560
  • the present invention is not limited thereto, and the second electrode 570 formed on each of the light emitting structures 560 may be formed.
  • the second electrode 570 may be an n-type electrode, and the second electrode 570 may be platinum (Pt), palladium (Pd), aluminum (Al), gold (Au), silver (Ag), or nickel / gold. (Ni / Au), titanium / aluminum (Ti / Al), indium tin oxide (ITO) or zinc oxide (ZnO) may be used alone or in combination.
  • the second electrode 570 may be formed by a thermal evaporator method, an E-beam evaporator method, a sputtering (RF or DC sputter) method, or various electrode forming methods.
  • the second electrode 570 may be attached to the light emitting structure 560 using a support substrate (not shown), more specifically, a method of thermal evaporator on a support substrate (not shown), The second electrode 470 formed through an E-beam evaporator method, an RF or DC sputter method, or various electrode forming methods may be attached to the light emitting structure 460, but is not limited thereto. .
  • the support substrate (not shown) may be removed as needed.
  • the first electrode 570 and the second electrode 580 are formed in a vertical structure. Therefore, the first electrode 570 and the second electrode 580 may be formed to apply a current perpendicular to the light emitting device 500.
  • the method of manufacturing the light emitting device 500 when the light emitting device 500 is obtained, when the first electrode 570 is disposed above and the second electrode 580 is disposed below, the method of manufacturing the light emitting device 500 according to another embodiment of the present invention. Since the light emitting structure was grown in the Ga-polar direction, the Ga-polar light emitting device 500 can be obtained.
  • the electrode is formed on the front surface of the light emitting structure 560 of the light emitting device manufactured by using the manufacturing method of the light emitting device 500 according to another embodiment of the present invention, it is easy to use in the lamp (lamp), An electrode formed on each of the structures 560 is easy to use as a display.
  • the method of manufacturing the light emitting device 500 when the light emitting device 500 is obtained, when the first electrode 570 is disposed above and the second electrode 580 is disposed below, the method of manufacturing the light emitting device 500 according to another embodiment of the present invention. Since the n-type semiconductor layer was grown in the Ga-polar direction, the light emitting device 500 including the Ga-polar n-type semiconductor layer 532 can be obtained.
  • the light emitting device manufactured by using the method of manufacturing the light emitting device 500 according to another embodiment of the present invention may be a micro LED.
  • the light emitting device 500 manufactured according to the method of manufacturing the light emitting device 500 according to another embodiment of the present invention is an N-polar n-type semiconductor layer (e.g., an epitaxial side overgloss (ELOG) method).
  • 531 and the Ga-polar n-type semiconductor layer 532 are selectively grown, and then a process of selectively removing the N-polar n-type semiconductor layer 531 is used, thereby simplifying the manufacturing process and manufacturing costs. Can be reduced.
  • a light emitting device manufactured using a method of manufacturing a light emitting device 500 according to another embodiment of the present invention it can be utilized for general lighting that can replace a luminescent lamp (luminescent lamp) have.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

La présente invention concerne un procédé de production d'une diode électroluminescente. Le procédé de production d'une diode électroluminescente selon un mode de réalisation de la présente invention comprend : une étape de formation d'une couche de masque, comprenant au moins une région de fenêtre et au moins une région en saillie, sur un substrat de croissance; une étape de formation de nitrure de gallium (GaN), comprenant du nitrure de gallium polaire N et du nitrure de gallium polaire Ga, sur le substrat de croissance en soumettant du nitrure de gallium à une surcroissance latérale épitaxiale (ELOG); une étape de gravure sélective du nitrure de gallium polaire N; et une étape d'élimination de la couche de masque, la région de fenêtre de la couche de masque ayant un motif de fenêtre de type négatif.
PCT/KR2017/001444 2017-01-23 2017-02-10 Procédé de production d'une diode électroluminescente WO2018135690A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020170010714A KR101874229B1 (ko) 2017-01-23 2017-01-23 발광 소자의 제조 방법
KR10-2017-0010714 2017-01-23

Publications (1)

Publication Number Publication Date
WO2018135690A1 true WO2018135690A1 (fr) 2018-07-26

Family

ID=62908401

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2017/001444 WO2018135690A1 (fr) 2017-01-23 2017-02-10 Procédé de production d'une diode électroluminescente

Country Status (2)

Country Link
KR (1) KR101874229B1 (fr)
WO (1) WO2018135690A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080070334A1 (en) * 2002-01-28 2008-03-20 Philips Lumileds Lighting Company, Llc LED Including Photonic Crystal Structure
WO2011139004A1 (fr) * 2010-05-06 2011-11-10 Gwangju Institute Of Science And Technology Procédé pour fabriquer une diode électroluminescente de type vertical et procédé pour séparer des couches les unes des autres
KR101128612B1 (ko) * 2005-05-24 2012-03-26 엘지이노텍 주식회사 발광 소자 및 그의 제조 방법
US20130309794A1 (en) * 2009-12-02 2013-11-21 Samsung Electronics Co., Ltd. Light emitting device and method of manufacturing the same
KR101383161B1 (ko) * 2012-01-30 2014-04-14 인텔렉추얼디스커버리 주식회사 발광 다이오드 및 그 제조 방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080070334A1 (en) * 2002-01-28 2008-03-20 Philips Lumileds Lighting Company, Llc LED Including Photonic Crystal Structure
KR101128612B1 (ko) * 2005-05-24 2012-03-26 엘지이노텍 주식회사 발광 소자 및 그의 제조 방법
US20130309794A1 (en) * 2009-12-02 2013-11-21 Samsung Electronics Co., Ltd. Light emitting device and method of manufacturing the same
WO2011139004A1 (fr) * 2010-05-06 2011-11-10 Gwangju Institute Of Science And Technology Procédé pour fabriquer une diode électroluminescente de type vertical et procédé pour séparer des couches les unes des autres
KR101383161B1 (ko) * 2012-01-30 2014-04-14 인텔렉추얼디스커버리 주식회사 발광 다이오드 및 그 제조 방법

Also Published As

Publication number Publication date
KR101874229B1 (ko) 2018-07-03

Similar Documents

Publication Publication Date Title
WO2013089459A1 (fr) Dispositif semi-conducteur et son procédé de fabrication
WO2013048179A1 (fr) Substrat présentant un motif concave-convexe, diode électroluminescente comprenant le substrat et procédé destiné à fabriquer la diode
WO2014098510A1 (fr) Diode électroluminescente et son procédé de fabrication
WO2009128669A2 (fr) Dispositif électroluminescent et son procédé de fabrication
WO2014119909A1 (fr) Procédé permettant de fabriquer un élément électroluminescent nanostructuré à semi-conducteurs
WO2009148253A2 (fr) Substrat de support utilise dans la fabrication d’un dispositif electroluminescent semiconducteur et dispositif comprenant ledit substrat
WO2019088763A1 (fr) Dispositif à semi-conducteur
WO2020027397A1 (fr) Élément électroluminescent, son procédé de fabrication et dispositif d'affichage le comprenant
WO2016117845A1 (fr) Élément électroluminescent et appareil de dépôt par faisceau d'électrons pour sa fabrication
WO2013183888A1 (fr) Élément émetteur de lumière
WO2014163323A1 (fr) Dispositif d'émission de lumière ultraviolette séparé d'un substrat de croissance et procédé de fabrication associé
WO2020149529A1 (fr) Diode électroluminescente et dispositif d'affichage comprenant celle-ci
WO2016209015A1 (fr) Diode électroluminescente ultraviolette, boîtier de diode électroluminescente et dispositif d'éclairage
WO2021118139A1 (fr) Dispositif électroluminescent pour affichage et dispositif d'affichage le comportant
WO2018044102A1 (fr) Diode électroluminescente de boîtier-puce
WO2014061906A1 (fr) Procédé de séparation de substrat de croissance, procédé de fabrication de diode électroluminescente, et diode électroluminescente fabriquée par lesdits procédés
WO2010038976A2 (fr) Dispositif électroluminescent semi-conducteur et son procédé de fabrication
WO2017039208A1 (fr) Élément électroluminescent à électrode transparente zno et son procédé de fabrication
WO2013089417A1 (fr) Dispositif semi-conducteur et procédé de fabrication de celui-ci
WO2016159638A1 (fr) Diode électroluminescente ultraviolette
WO2014092517A1 (fr) Dispositif électroluminescent tridimensionnel et procédé de fabrication de celui-ci
WO2020138842A1 (fr) Micro-diode électroluminescente et procédé de fabrication de micro-diode électroluminescente
WO2020071810A1 (fr) Dispositif électroluminescent
WO2020040449A1 (fr) Dispositif à semi-conducteur
WO2022071679A1 (fr) Micro-del et module d'affichage la comprenant

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17892708

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17892708

Country of ref document: EP

Kind code of ref document: A1