WO2018133242A1 - 终端、调试系统和调试方法 - Google Patents

终端、调试系统和调试方法 Download PDF

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Publication number
WO2018133242A1
WO2018133242A1 PCT/CN2017/081925 CN2017081925W WO2018133242A1 WO 2018133242 A1 WO2018133242 A1 WO 2018133242A1 CN 2017081925 W CN2017081925 W CN 2017081925W WO 2018133242 A1 WO2018133242 A1 WO 2018133242A1
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WO
WIPO (PCT)
Prior art keywords
usb type
debugging
terminal
interface
unit
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PCT/CN2017/081925
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English (en)
French (fr)
Inventor
刘翔
师军令
Original Assignee
华为技术有限公司
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN201780005457.3A priority Critical patent/CN108496158B/zh
Publication of WO2018133242A1 publication Critical patent/WO2018133242A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/362—Software debugging
    • G06F11/3648—Software debugging using additional hardware
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B23/00—Testing or monitoring of control systems or parts thereof
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0042—Universal serial bus [USB]

Definitions

  • the present application relates to the field of debugging technologies, and in particular, to a terminal, a debugging system, and a debugging method.
  • JTAG debugging, program error correction, vector simulation and boundary scan are important means to solve equipment failures.
  • JTAG debugging and program error correction are based on the premise that the device master chip starts running. In progress, vector simulation and boundary scan are usually performed when the device master chip cannot be started.
  • JTAG debugging and program error correction are based on the premise that the device master chip starts running. In progress, vector simulation and boundary scan are usually performed when the device master chip cannot be started.
  • JTAG debugging and program error correction are based on the premise that the device master chip starts running. In progress, vector simulation and boundary scan are usually performed when the device master chip cannot be started.
  • JTAG debugging and program error correction can be performed on the terminal, and vector simulation and boundary scan cannot be performed.
  • the embodiment of the present invention provides a terminal, a debugging system, and a debugging method, to solve the problem that the terminal control module of the terminal needs to participate in the control, and only the JTAG debugging and the program error correction can be performed.
  • Vector simulation and boundary scan problems are only the JTAG debugging and the program error correction.
  • a first aspect of the present application provides a terminal, where the terminal includes a USB Type-C interface and a main control chip, where the main control chip includes a debugging unit, and in particular, the terminal further includes a multi-channel analog switch;
  • the debugging unit in the main control chip is connected to the multi-channel analog switch, and the multi-channel analog switch is connected to the USB Type-C interface, and the multi-channel analog switch is used to connect or disconnect the debugging unit and the USB Type-C interface. connection.
  • the USB Type-C interface includes a first set of pins and a second set of pins, and the multiple analog switches are coupled to the first set of pins.
  • the terminal further includes: a USB Type-C driver chip, and the main control chip further includes a functional unit;
  • the functional unit is connected to the USB Type-C driver chip, and the USB Type-C driver chip is connected to the multi-channel analog switch.
  • the USB Type-C driver is disconnected.
  • the connection between the chip and the USB Type-C when the multi-channel analog switch disconnects the connection between the debug unit and the USB Type-C, the connection between the USB Type-C driver chip and the USB Type-C is turned on;
  • the functional unit is connected to the USB Type-C driver chip, and the USB Type-C driver chip is connected to the second group of pins.
  • the debug unit includes a vector emulation module and a boundary scan module, as well as one or more of the following modules:
  • JTAG debug unit program error correction module
  • a second aspect of the embodiments of the present application provides a debugging system, including: a debugging device, an adapter board, and the terminal provided in any one of the foregoing first aspect or any of the foregoing first aspects, where The debugging device in the system is connected to the USB Type-C interface through an adapter board.
  • a third aspect of the embodiments of the present application provides a debugging system, comprising: a debugging device, and the terminal provided in the above first aspect or any one of the foregoing first aspects, wherein the debugging device is Includes an adapter board that connects to the USB Type-C interface of the terminal.
  • a fourth aspect of the present application provides a debugging method, where the method is applicable to a terminal, where the terminal includes a USB Type-C interface and a main control chip, and the main control chip includes a debugging unit.
  • the terminal further includes: Multi-channel analog switch; the debug unit is connected to the multi-channel analog switch in the terminal, and the multi-channel analog switch is connected to the USB Type-C interface;
  • the method includes:
  • the multi-channel analog switch of the terminal receives the debugging signal, the debugging signal carries a switching signal, and the switching signal satisfies the first preset condition; the multi-channel analog switch of the terminal
  • the connection between the debugging unit and the USB Type-C interface is turned on, and the debugging signal is forwarded to the debugging unit, wherein the debugging signal is used to control the debugging unit in the main control chip to perform the debugging operation.
  • the USB Type-C interface includes a first set of pins and a second set of pins, and the multiple analog switches are coupled to the first set of pins.
  • the terminal further includes: a USB Type-C driving chip, the main control chip further includes a functional unit; in the design, the method further includes: when the switching signal in the debugging signal meets the second preset condition When the USB Type-C interface of the signal input terminal is not debugged, the multi-channel analog switch of the terminal turns on the connection between the USB Type-C driver chip and the USB Type-C interface.
  • the debug unit includes a vector emulation module and a boundary scan module, as well as one or more of the following modules:
  • JTAG debug unit program error correction module
  • the debugging unit of the main control chip in the terminal is connected to the multi-channel analog switch, and the multi-channel analog switch is connected to the USB Type-C interface of the terminal, so that It only needs to control the connection between the debugging unit and the USB Type-C interface by multi-channel analog switch, and then the debugging unit can be controlled by the USB Type-C interface to perform specific debugging operations without additional reserved debugging interface on the terminal.
  • USB type-C interface can be used to control the debug unit for boundary scan or vector simulation.
  • the debug unit can be controlled to perform JTAG debugging or program error correction.
  • the debugging methods are various and easy to operate. Better meet the debugging needs of the terminal.
  • FIG. 1 is a schematic diagram of an internal structure of a terminal provided by the prior art
  • FIG. 2 is a schematic diagram of another internal structure of a terminal provided by the prior art
  • FIG. 3 is a schematic structural diagram of a terminal 20 according to an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a terminal 40 according to an embodiment of the present application.
  • FIG. 5 is a schematic diagram of signal transmission of the scheme shown in Figure 4.
  • FIG. 6 is a schematic diagram of another implementation manner of a terminal structure according to an embodiment of the present disclosure.
  • Figure 7 is a schematic diagram of signal transmission of the scheme shown in Figure 6;
  • FIG. 8 is a schematic flowchart of a debugging method according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic flowchart diagram of a debugging method according to an embodiment of the present application.
  • the terminal involved in the embodiment of the present application which is also called a user equipment (User Equipment, UE), is a device with a USB Type-C interface, such as a mobile phone (including various types of mobile phones, such as a 4G mobile phone, 5G). Mobile phones, etc.), tablets, laptops, PDAs, car devices, wearable devices, etc.
  • a user equipment such as a mobile phone (including various types of mobile phones, such as a 4G mobile phone, 5G). Mobile phones, etc.), tablets, laptops, PDAs, car devices, wearable devices, etc.
  • the terminal 00 includes a main control chip 01 and an external interface 02.
  • the main control chip 01 includes a functional unit 011, a debugging unit 012, and a signal complex.
  • the external interface 02 is used for connection with a debugging device (not shown in FIG. 1) outside the terminal, and the external interface 02 can be, for example, a debugging interface reserved on the terminal or a USB data interface of the terminal.
  • the debugging signal of the debugging device is sent to the control register 014 in the main control chip through the external interface 02, and the control register 014 controls the signal multiplexing unit 013 to implement the debugging unit 012 and the functional unit 011.
  • the interface is switched so that the debugging device can control the debugging unit 012 through the external interface 02 for debugging.
  • the main control chip of the terminal needs to be started and run to complete the interface switching between the debugging unit and the functional unit, and finally achieve the purpose of debugging.
  • This scheme can only perform JTAG debugging or program error correction debugging, but usually it is impossible to perform vector scanning or boundary scanning when the main control chip cannot start normally.
  • the terminal 10 includes a main control chip 11 and a module 12 in FIG. 2, wherein the module 12 includes: a signal multiplexing switch 121 and functions.
  • the main control chip 11 sends a function selection signal to the function selection circuit 122.
  • the function selection circuit 122 outputs a corresponding target function signal according to the demand, and the signal multiplexing switch 121 determines the position of the switch according to the target function signal. , complete the switch between the debugging function and other functions.
  • the main control chip of the terminal is also required to be activated, and participates in the switching between the debugging function and other functions. Similar to the scheme shown in FIG. 1, only the JTAG debugging or the program error correction debugging can be performed in the scheme shown in FIG. 2, but it is usually impossible to perform vector scanning or boundary scanning when the main control chip cannot be normally started. .
  • FIG. 3 is a schematic structural diagram of a terminal 20 according to an embodiment of the present application.
  • the terminal 20 includes a USB Type-C interface 21 and a main control chip 22, and particularly includes a multi-channel analog switch 23, wherein the main control chip 22 includes a debugging unit 221.
  • the debugging unit 221 includes at least one of a JTAG debugging unit, a program error correction module, a vector simulation module, and a boundary scan module.
  • the debugging unit 221 includes at least one of a JTAG debugging unit and a program error correction module, and a vector simulation module and a boundary scan module.
  • the JTAG debugging unit is used for JTAG software debugging of the terminal
  • the program error correction module is used for program error correction of the terminal
  • the vector simulation module is used for vector simulation of the terminal
  • the boundary scan module is used for boundary scanning of the terminal.
  • the debug unit 221 is connected to the multi-channel analog switch 23, and the multi-channel analog switch 23 is connected to the USB Type-C interface 21.
  • the multiplex analog switch 23 disconnects the connection between the debug unit 221 and the USB Type-C interface 21 by default.
  • the USB Type-C interface 21 is connected to the debug device 30 outside the terminal.
  • the debug device 30 controls the multi-channel analog switch 23 to turn on the connection between the debug unit 221 and the USB Type-C interface 21, and controls the test unit 221 to debug the terminal 20.
  • the scheme shown in FIG. 3 connects the debug unit in the terminal to the multi-channel analog switch by setting a multi-channel analog switch in the terminal, and the multi-channel analog switch is connected to the USB Type-C interface of the terminal, so that It only needs to control the connection between the debugging unit and the USB Type-C interface by multi-channel analog switch, and then the debugging unit can be controlled by the USB Type-C interface to perform specific debugging operations without additional reserved debugging interface on the terminal.
  • USB type-C interface can be used to control the debug unit for boundary scan or vector simulation.
  • the debug unit can be controlled to perform JTAG debugging or program error correction.
  • the debugging methods are various and easy to operate. Better meet the debugging needs of the terminal.
  • the terminal 40 further includes a USB Type-C driver chip 24 on the basis of the solution shown in FIG. 3, and the main control chip 22 further includes a function unit 222.
  • the function unit 222 includes at least one of an audio module, a video module, a USB module, and a display module.
  • the USB Type-C interface 21 includes a first set of pins and a second set of pins. The second set of pins and the first set of pins are respectively disposed on both sides of the USB Type-C interface 21, that is, when the first set of pins are disposed on the front side of the USB Type-C interface 21, the second set of pins is set.
  • the first set of pins are disposed on the reverse side of the USB Type-C interface 21, conversely, when the first set of pins are disposed on the reverse side of the USB Type-C interface 21, the second set of pins are disposed on the front side of the USB Type-C interface 21,
  • This embodiment does not limit this. It should be noted that the first set of pins and the second set of pins in this embodiment are pins inherent in the USB Type-C interface in the prior art.
  • the internal structure of the terminal 40 in this embodiment may include the following two possible implementation manners:
  • FIG. 4 is a schematic structural diagram of a terminal 40 according to an embodiment of the present application.
  • the functional unit 222 is connected to the USB Type-C driving chip 24, and the USB Type-C driving chip 24 and the debugging unit 221 are connected.
  • the pin on the same side of the multi-channel analog switch 23 Connected to the pin on the same side of the multi-channel analog switch 23, the other side of the multi-channel analog switch 23 is connected to the first set of pins.
  • the debugging device When debugging the terminal 40, the debugging device is connected to the USB Type-C interface 21, and sends a debugging signal to the USB Type-C interface 21, wherein the debugging signal includes switching for controlling the switching direction of the multi-channel analog switch.
  • the debugging signal includes switching for controlling the switching direction of the multi-channel analog switch.
  • the signal when the switching signal satisfies the first preset condition, for example, when the switching signal is high, the multi-channel analog switch 23 turns on the connection between the debugging unit 221 and the USB Type-C interface 21, and sends the debugging signal to the debugging unit. So that the debug unit can debug according to the debug signal.
  • the multiplex analog switch 23 turns on the connection between the functional unit 222 and the USB Type-C interface 21 by default.
  • the other side of the multi-channel analog switch is connected to the first one by connecting the USB Type-C driver chip and the debug unit to the pins on the same side of the multi-channel analog switch.
  • the flexible switching between the debugging function and other functions is realized, without the need to additionally reserve the debugging interface on the terminal, and the disassembly of the terminal housing is not required, the operation is simple and easy, and since the debugging signal is passed
  • the USB Type-C interface is sent to the debug unit. Therefore, even if the terminal's main control chip cannot operate normally, as long as the terminal's main control chip is powered on, the debug unit can be controlled by the USB Type-C interface for boundary scan or vector simulation.
  • the debugging unit can be controlled to perform JTAG debugging or program error correction operation, and the debugging means are various, the operation is simple, and the debugging requirement for the terminal can be better satisfied.
  • FIG. 5 is a schematic diagram of signal transmission of the scheme shown in FIG. 4, and the connection between the debug unit and the USB Type-C interface in FIG. 5 is in an on state.
  • the models of all the chips involved in FIG. 5 can be specifically selected according to specific needs.
  • the USB Type-C driver chip can be specifically a chip RTS5400
  • the multiplexed analog switch can be specifically a chip TS2PCIE412.
  • FIG. 5 is a schematic diagram of signal transmission of the scheme shown in FIG. 4, and the connection between the debug unit and the USB Type-C interface in FIG. 5 is in an on state.
  • the models of all the chips involved in FIG. 5 can be specifically selected according to specific needs.
  • the USB Type-C driver chip can be specifically a chip RTS5400
  • the multiplexed analog switch can be specifically a chip TS2PCIE412.
  • the debugging device sends a debugging signal to the USB Type-C interface through the interposer board, wherein the debugging signal may include at least one of the following signals: the switching signal SW, the test reserved signals SEL0 and SEL1, and the test The clock signal TCK, the test data input signal TDI, the test data output signal TDO, the test function selection signal TMS, and the test reset signal TRST.
  • the switching signal SW is used to control the switching position of the multi-channel analog switch. When the level of the switching signal SW is high, the multiplexed analog switch turns on the debugging unit, and when the switching signal SW is low, the multiplex is used.
  • the multiplexed analog switch turns on the debug unit USB Type-C driver chip.
  • the test function selection signal TMS is used to specifically select which one of the debug units performs the debug operation, and the test reserve signals SEL0 and SEL1 are used to select a specific work mode for debugging when a plurality of work modes are included in the module performing the debug.
  • the specific implementation manner and beneficial effects of the scheme shown in FIG. 5 are similar to those in FIG. 4, and details are not described herein again.
  • FIG. 6 is a schematic diagram of another implementation manner of a terminal structure according to an embodiment of the present disclosure.
  • the functional unit 222 is connected to the USB Type-C driver chip 24, and the USB Type-C driver chip 24 and The analog switches 23 are connected to the second set of pins and the first set of pins of the USB Type-C interface, respectively.
  • connection between the USB Type-C driver chip 24 and the USB Type-C interface 21 is always in communication, and the connection between the debug unit 221 and the USB Type-C interface 21 is only under debugging. Only when it is connected.
  • the terminal can be used without affecting the other.
  • debugging the terminal has a good use and debugging experience.
  • FIG. 7 is a schematic diagram of signal transmission of the scheme shown in FIG. 6.
  • the connection between the debug unit and the USB Type-C interface is in an on state.
  • the models of all the chips involved in FIG. 7 can be specifically selected according to specific needs.
  • the USB Type-C driver chip can be specifically a chip RTS5400
  • the multiplexed analog switch can be specifically a chip TS2PCIE412.
  • the debug device sends the debug signal to the first set of pins on the USB Type-C interface through the interposer board, and then the debug signal is sent to the debug unit by the first set of pins, where the debug signal may Including at least one of the following signals: switching signal SW, testing reserved signals SEL0 and SEL1, testing The clock signal TCK, the test data input signal TDI, the test data output signal TDO, the test function selection signal TMS, and the test reset signal TRST.
  • the switching signal SW is used to control the switching position of the multi-channel analog switch. When the level of the switching signal SW is high, the multiplexing analog switch turns on the debugging unit.
  • the test function selection signal TMS is used to specifically select which one of the debug units performs the debug operation, and the test reserve signals SEL0 and SEL1 are used to select a specific work mode for debugging when a plurality of work modes are included in the module performing the debug.
  • the signal sent by the debugging device for controlling the functional unit is sent to the second set of pins of the USB Type-C interface through the interposer board, and then sent to the functional unit by the second set of pins.
  • the switching signal SW in this embodiment only Participate in controlling the connection of the multi-channel analog switch to connect or disconnect the debug unit from the USB Type-C interface without affecting the operation of the Type-C driver chip.
  • the specific implementation manner and beneficial effects of the scheme shown in FIG. 7 are similar to those in FIG. 6, and are not described herein again.
  • the embodiment of the present application further provides a debugging system, which includes a debugging device, an adapter board, and a terminal shown in any of the foregoing embodiments.
  • the adapter board connects the debugging device and the USB Type-C interface of the terminal.
  • the embodiment of the present application further provides a debugging system, which includes a debugging device, and the terminal shown in any of the foregoing embodiments.
  • the debugging device includes an adapter board, and the adapter board is connected to the USB Type-C interface of the terminal.
  • the implementation manner and beneficial effects of the system are similar to those of the corresponding terminal embodiment, and are not described herein again.
  • FIG. 8 is a schematic flowchart of a debugging method according to an embodiment of the present application, and the method can be applied to the terminal shown in FIG. 3. As shown in FIG. 8, the method includes the following steps:
  • the multi-channel analog switch of the terminal receives the debugging signal, and the debugging signal carries a switching signal, and the switching signal satisfies the first preset condition.
  • the debugging unit includes a vector simulation module and a boundary scan module, and one or more of the following modules:
  • JTAG debug unit program error correction module
  • the multi-channel analog switch of the terminal turns on the connection between the debugging unit and the USB Type-C interface, and forwards the debugging signal to the debugging unit, wherein the debugging signal is used to control the debugging unit to perform the debugging operation.
  • FIG. 9 is a schematic flowchart of a debugging method according to an embodiment of the present application, and the method can be applied to the terminal shown in the embodiment of FIG. 4. As shown in FIG. 9, the method includes the following steps:
  • the multi-channel analog switch of the terminal determines whether the debug signal meets the first preset condition, and if yes, executes S23, and if not, executes S24.
  • the multi-channel analog switch of the terminal turns on the connection between the debugging unit and the USB Type-C interface, and forwards the debugging signal to the debugging unit, so that the debugging unit performs the debugging operation.
  • the multi-channel analog switch of the terminal determines that the debug signal meets the second preset condition, and the multi-channel analog switch of the terminal turns on the connection between the USB Type-C driver chip and the USB Type-C interface.
  • the multi-channel analog switch turns on the connection between the USB Type-C driver chip and the USB Type-C interface by default.
  • the disclosed apparatus and method may be implemented in other manners.
  • the device embodiments described above are merely illustrative.
  • the division of the unit is only a logical function division.
  • there may be another division manner for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored or not executed.
  • the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be in an electrical, mechanical or other form.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.
  • the above integrated unit can be implemented in the form of hardware or in the form of hardware plus software functional units.
  • the above software function parts can be stored in the storage unit.
  • the storage unit includes instructions for causing a computer device (which may be a personal computer, server, or network device, etc.) or a processor to perform some of the steps of the methods described in various embodiments of the present application.
  • the storage unit includes: one or more memories, such as a read-only memory (ROM), a random access memory (RAM), and an electrically erasable programmable read only memory (EEPROM). and many more.
  • the storage unit may exist independently or may be integrated with the processor.
  • the above embodiments it may be implemented in whole or in part by software, hardware, firmware, or any combination thereof.
  • software it may be implemented in whole or in part in the form of a computer program product.
  • the calculation The machine program product includes one or more computer instructions.
  • the computer program instructions When the computer program instructions are loaded and executed on a computer, the processes or functions described in accordance with embodiments of the present invention are generated in whole or in part.
  • the computer can be a general purpose computer, a special purpose computer, a computer network, or other programmable device.
  • the computer instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions can be from a website site, computer, server or data center Transfer to another website site, computer, server, or data center by wire (eg, coaxial cable, fiber optic, digital subscriber line (DSL), or wireless (eg, infrared, wireless, microwave, etc.).
  • the computer readable storage medium can be any available media that can be accessed by a computer or a data storage device such as a server, data center, or the like that includes one or more available media.
  • the usable medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium (such as a solid state disk (SSD)).

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Abstract

本申请实施例提供一种终端、调试系统和调试方法，该终端包括：USB Type-C接口、主控芯片和多路模拟开关，其中，主控芯片包括调试单元，调试单元连接到多路模拟开关，多路模拟开关连接到USB Type-C接口，多路模拟开关用于接通或断开调试单元与USB Type-C接口之间的连接。从而，能够在主控芯片上电但不启动的情况下，进行边界扫描和向量仿真，在主控芯片启动的情况下，进行JTAG调试和程序纠错。

Description

终端、调试系统和调试方法 技术领域
本申请涉及调试技术领域，尤其涉及一种终端、调试系统和调试方法。
背景技术
联合测试工作组(Joint Test Action Group，JTAG)调试、程序纠错、向量仿真和边界扫描是解决设备故障的重要手段，其中，JTAG调试、程序纠错是在设备主控芯片启动运行的前提下进行的，向量仿真和边界扫描通常是在设备主控芯片无法启动的情况下进行的。而现有技术中在解决手机等终端的故障时，通常需要终端的主控芯片启动运行并参与控制，因此只能对终端进行JTAG调试和程序纠错，而无法进行向量仿真和边界扫描。
发明内容
本申请实施例提供一种终端、调试系统和调试方法，以解决现有技术在解决终端故障问题时，需要终端的主控芯片参与控制，且只能进行JTAG调试和程序纠错，而无法进行向量仿真和边界扫描的问题。
本申请实施例的第一方面提供一种终端，该终端包括USB Type-C接口和主控芯片，其中，主控芯片包括调试单元，尤其的，该终端还包括多路模拟开关；在该终端中主控芯片中的调试单元连接到多路模拟开关，多路模拟开关连接到述USB Type-C接口，多路模拟开关用于接通或断开调试单元与USB Type-C接口之间的连接。
在一种可能的设计中，USB Type-C接口包括第一组引脚和第二组引脚，多路模拟开关与第一组引脚连接。
在一种可能的设计中，终端还包括：USB Type-C驱动芯片，主控芯片还包括功能单元；
功能单元连接到USB Type-C驱动芯片，USB Type-C驱动芯片连接到多路模拟开关，多路模拟开关接通调试单元与USB Type-C之间的连接时，断开USB Type-C驱动芯片与USB Type-C之间的连接，多路模拟开关断开调试单元与USB Type-C之间的连接时，接通USB Type-C驱动芯片与USB Type-C之间的连接；
或者
功能单元连接到USB Type-C驱动芯片，USB Type-C驱动芯片连接到第二组引脚。
在一种可能的设计中，调试单元包括向量仿真模块和边界扫描模块，以及如下模块中的一种或多种：
JTAG调试单元、程序纠错模块。
本申请实施例的第二方面提供一种调试系统，该系统包括：调试设备、转接板，以及上述第一方面或者上述第一方面中任意一种可能的设计中所提供的终端，在该系统中调试设备通过转接板与所述USB Type-C接口连通。
本申请实施例的第三方面提供一种调试系统，该系统包括：调试设备，以及上述第一方面或者上述第一方面中任意一种可能的设计中所提供的终端，其中，该调试设备中包括转接板，该转接板连接到终端的USB Type-C接口。
本申请实施例的第四方面提供一种调试方法，该方法适用于一种终端，该终端包括USB Type-C接口和主控芯片，主控芯片包括调试单元，尤其的，该终端还包括：多路模拟开关；在该终端中调试单元连接到多路模拟开关，多路模拟开关连接到USB Type-C接口；
该方法包括：
当有调试信号输入终端的USB Type-C接口时，终端的多路模拟开关接收该调试信号，该调试信号中携带有切换信号，且切换信号满足第一预设条件；终端的多路模拟开关接通调试单元和USB Type-C接口之间的连接，将调试信号转发至调试单元，其中，调试信号用于控制主控芯片中的调试单元执行调试操作。
在一种可能的设计中，USB Type-C接口包括第一组引脚和第二组引脚，多路模拟开关与第一组引脚连接。
在一种可能的设计中，终端还包括：USB Type-C驱动芯片，主控芯片还包括功能单元；在此设计中，上述方法还包括：当调试信号中的切换信号满足第二预设条件，或者没有调试信号输入终端的USB Type-C接口时，终端的多路模拟开关接通USB Type-C驱动芯片与USB Type-C接口之间的连接。
在一种可能的设计中，调试单元包括向量仿真模块和边界扫描模块，以及如下模块中的一种或多种：
JTAG调试单元、程序纠错模块。
可见，在以上各个方面，通过在终端中设置多路模拟开关，将终端中主控芯片的调试单元连接到多路模拟开关上，多路模拟开关连接到终端的USB Type-C接口上，使得只需要控制多路模拟开关接通调试单元与USB Type-C接口之间的连接，即可通过USB Type-C接口控制调试单元进行具体的调试操作，无需在终端上额外预留调试接口，也无需对终端的外壳进行拆卸，操作简单易行，并且由于调试信号是通过USB Type-C接口发送给调试单元的，因此，即使终端的主控芯片不能正常运行，但只要终端的主控芯片上电，即可通过USB Type-C接口控制调试单元进行边界扫描或向量仿真，而在主控芯片启动运行时则可以控制调试单元执行JTAG调试或程序纠错操作，调试手段多样，操作简单，能够更好的满足对终端的调试需求。
附图说明
图1为现有技术提供的一种终端内部结构示意图；
图2为现有技术提供的另一种终端内部结构示意图；
图3为本申请实施例提供的一种终端20的结构示意图；
图4为本申请实施例提供的一种终端40的结构示意图；
图5为图4所示方案的信号传输示意图；
图6为本申请实施例提供的另一种终端结构的实现方式示意图；
图7为图6所示方案的信号传输示意图；
图8为本申请实施例提供的一种调试方法的流程示意图；
图9为本申请实施例提供的一种调试方法的流程示意图。
具体实施方式
本申请实施例的说明书和权利要求书及上述附图中的术语“第一”、“第二”、“第三”、“第四”等(如果存在)是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的本申请实施例例如能够以除了在这里图示或描述的那些以外的顺序实施。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
本申请实施例中所涉及的终端，又称之为用户设备(User Equipment，UE)，是一种具有USB Type-C接口的设备，例如手机(包括各种制式的手机，比如4G手机、5G手机等)、平板电脑、笔记本电脑、掌上电脑、车载设备、可穿戴设备等。
图1为现有技术提供的一种终端内部结构示意图，如图1所示，终端00包括主控芯片01和外部接口02，其中主控芯片01中包括功能单元011、调试单元012、信号复用单元013和控制寄存器014，外部接口02用于与终端外部的调试设备(图1中未示出)连接，该外部接口02例如可以是终端上预留的调试接口或者终端的USB数据接口。在对图1所示的终端进行调试时，调试设备的调试信号通过外部接口02发送给主控芯片中的控制寄存器014，控制寄存器014控制信号复用单元013实现调试单元012与功能单元011之间的接口切换，从而使得调试设备能够通过外部接口02控制调试单元012进行调试。在图1所示的方案中，终端的主控芯片需要启动并运行才能完成调试单元与功能单元之间的接口切换，并最终实现调试的目的。这种方案仅能进行JTAG调试或程序纠错调试，而通常需要在主控芯片不能正常启动时进行向量扫描或边界扫描则不能进行。
图2为现有技术提供的另一种终端内部结构示意图，如图2所示，在图2中终端10包括主控芯片11、模块12，其中，模块12包括：信号复用开关121、功能选择电路122和预留的调试接口123，其中预留的调试接口123与调试设备(图2中未示出)连接。当对终端10进行调试时，主控芯片11发送功能选择信号给功能选择电路122，功能选择电路122在根据需求输出相应的目标功能信号，信号复用开关121再根据目标功能信号确定开关的位置，完成调试功能与其他功能之间的切换。由此可知，在图2所示的方案中也需要终端的主控芯片启动，并参与到调试功能与其他功能之间的切换中来。与图1所示的方案类似的，在图2所示的方案中也只能进行JTAG调试或程序纠错调试，而通常需要在主控芯片不能正常启动时进行向量扫描或边界扫描则不能进行。
针对上述问题，本申请一实施例提供了一种终端，如图3所示，图3为本申请实施例提供的一种终端20的结构示意图。如图3所示，终端20包括USB Type-C接口21、主控芯片22，尤其包括，多路模拟开关23，其中，主控芯片22中包括调试单元221。 可选的，调试单元221中包括JTAG调试单元、程序纠错模块、向量仿真模块、边界扫描模块中的至少一种。优选的，调试单元221包括JTAG调试单元和程序纠错模块中的至少一种，以及向量仿真模块和边界扫描模块。其中，JTAG调试单元用于对终端进行JTAG软件调试，程序纠错模块用于对终端进行程序纠错，向量仿真模块用于对终端进行向量仿真，边界扫描模块用于对终端进行边界扫描。
图3中调试单元221连接到多路模拟开关23上，多路模拟开关23连接到USB Type-C接口21。在未进行调试操作时，多路模拟开关23默认断开调试单元221与USB Type-C接口21之间的连接。当对终端20进行调试时，USB Type-C接口21与终端外部的调试设备30连接。调试设备30控制多路模拟开关23接通调试单元221与USB Type-C接口21之间的连接，并控制试单元221对终端20进行调试。
由此可见，图3所示的方案通过在终端中设置多路模拟开关，将终端中的调试单元连接到多路模拟开关上，多路模拟开关连接到终端的USB Type-C接口上，使得只需要控制多路模拟开关接通调试单元与USB Type-C接口之间的连接，即可通过USB Type-C接口控制调试单元进行具体的调试操作，无需在终端上额外预留调试接口，也无需对终端的外壳进行拆卸，操作简单易行，并且由于调试信号是通过USB Type-C接口发送给调试单元的，因此，即使终端的主控芯片不能正常运行，但只要终端的主控芯片上电，即可通过USB Type-C接口控制调试单元进行边界扫描或向量仿真，而在主控芯片启动运行时则可以控制调试单元执行JTAG调试或程序纠错操作，调试手段多样，操作简单，能够更好的满足对终端的调试需求。
本申请另一实施例提供一种终端40，终端40在图3所示方案的基础上还包括USB Type-C驱动芯片24，主控芯片22中还包括功能单元222。可选的，功能单元222包括音频模块、视频模块、USB模块、显示模块中的至少一种。USB Type-C接口21包括第一组引脚和第二组引脚。第二组引脚和第一组引脚分别设置在USB Type-C接口21的两面上，即当第一组引脚设置在USB Type-C接口21的正面上时，第二组引脚设置在USB Type-C接口21的反面上，相反的，当第一组引脚设置在USB Type-C接口21的反面上时，第二组引脚设置在USB Type-C接口21的正面上，本实施例对此不做限定。需要说明的是，本实施例中的第一组引脚和第二组引脚为现有技术中USB Type-C接口上固有的引脚。
在本实施例中终端40的内部结构可能包括如下两种可能的实现方式：
图4为本申请实施例提供的一种终端40的结构示意图，在图4所示的方式中功能单元222连接到USB Type-C驱动芯片24上，USB Type-C驱动芯片24与调试单元221连接到多路模拟开关23同一侧的引脚上，多路模拟开关23的另一侧引脚连接到上述第一组引脚上。
在对终端40进行调试时，调试设备连接到USB Type-C接口21上，并向USB Type-C接口21发送调试信号，其中，该调试信号中包括用于控制多路模拟开关开关方向的切换信号，当切换信号满足第一预设条件，比如切换信号为高电平时，则多路模拟开关23接通调试单元221与USB Type-C接口21之间的连接，将调试信号发送给调试单元，以使调试单元根据调试信号进行调试。而当切换信号满足第二预设条件，比如 切换信号为低电平，或者USB Type-C接口21未与调试设备连接时，多路模拟开关23默认接通功能单元222与USB Type-C接口21之间的连接。
在图4所示的方式中，通过将USB Type-C驱动芯片和调试单元连接到多路模拟开关的同一侧的引脚上，将多路模拟开关的另一侧引脚连接到上述第一组引脚上，从而实现了调试功能与其他功能之间的灵活切换，而无需在终端上额外预留调试接口，也无需对终端的外壳进行拆卸，操作简单易行，并且由于调试信号是通过USB Type-C接口发送给调试单元的，因此，即使终端的主控芯片不能正常运行，但只要终端的主控芯片上电，即可通过USB Type-C接口控制调试单元进行边界扫描或向量仿真，而在主控芯片启动运行时则可以控制调试单元执行JTAG调试或程序纠错操作，调试手段多样，操作简单，能够更好的满足对终端的调试需求。
示例的，图5为图4所示方案的信号传输示意图，图5中调试单元与USB Type-C接口之间的连接处于接通状态。图5中所涉及的所有芯片的型号均可以根据具体需要具体选择，比如，USB Type-C驱动芯片可以被具体为芯片RTS5400、多路复用模拟开关可以被具体为芯片TS2PCIE412等。在图5中，调试设备通过转接板将调试信号发送给USB Type-C接口，其中，调试信号中可能包括如下信号中的至少一种：切换信号SW，测试预留信号SEL0和SEL1，测试时钟信号TCK、测试数据输入信号TDI、测试数据输出信号TDO、测试功能选择信号TMS、测试复位信号TRST。其中，切换信号SW用于控制多路模拟开关的开关位置，当切换信号SW的电平为高电平时，多路复用模拟开关接通调试单元，当切换信号SW为低电平时，多路复用模拟开关接通调试单元USB Type-C驱动芯片。测试功能选择信号TMS用于具体选择调试单元中的哪一模块执行调试操作，测试预留信号SEL0和SEL1用于在执行调试的模块中包括多个工作模式时，选择具体的工作模式进行调试。图5所示方案的具体执行方式和有益效果与图4类似，在这里不再赘述。
图6为本申请实施例提供的另一种终端结构的实现方式示意图，在图5所示的方式中功能单元222连接到USB Type-C驱动芯片24上，USB Type-C驱动芯片24和多路模拟开关23分别连接在USB Type-C接口的第二组引脚和第一组引脚上。
在这种实现方式中，USB Type-C驱动芯片24与USB Type-C接口21之间的连接始终是连通的，而调试单元221与USB Type-C接口21之间的连接则是只有在调试时，才接通。
在图6所示的方式中由于USB Type-C驱动芯片和多路模拟开关分别连接在USB Type-C接口的第二组引脚和第一组引脚上，因此，可以在不影响终端其他功能的情况下，对终端进行调试，具有较好的使用和调试体验。
图7为图6所示方案的信号传输示意图，图7中调试单元与USB Type-C接口之间的连接处于接通状态。图7中所涉及的所有芯片的型号均可以根据具体需要具体选择，比如，USB Type-C驱动芯片可以被具体为芯片RTS5400、多路复用模拟开关可以被具体为芯片TS2PCIE412等。在图7中，调试设备通过转接板将调试信号发送给USB Type-C接口上的第一组引脚，再由第一组引脚将调试信号发送给调试单元，其中，调试信号中可能包括如下信号中的至少一种：切换信号SW，测试预留信号SEL0和SEL1，测试 时钟信号TCK、测试数据输入信号TDI、测试数据输出信号TDO、测试功能选择信号TMS、测试复位信号TRST。其中，切换信号SW用于控制多路模拟开关的开关位置，当切换信号SW的电平为高电平时，多路复用模拟开关接通调试单元。测试功能选择信号TMS用于具体选择调试单元中的哪一模块执行调试操作，测试预留信号SEL0和SEL1用于在执行调试的模块中包括多个工作模式时，选择具体的工作模式进行调试。调试设备发送的用于控制功能单元的信号通过转接板发送给USB Type-C接口的第二组引脚，由第二组引脚再发送给功能单元。这里需要说明的是，由于USB Type-C驱动芯片和多路模拟开关分别连接到USB Type-C接口的第二组引脚和第一组引脚上，因此，本实施例中切换信号SW只参与控制多路模拟开关连通或断开调试单元与USB Type-C接口之间的连接，而不影响Type-C驱动芯片的工作。图7所示方案的具体执行方式和有益效果与图6类似，在这里不再赘述。
本申请实施例还提供一种调试系统，该系统包括调试设备、转接板，以及上述任意实施例所示的终端，转接板连通调试设备和终端的USB Type-C接口。该系统的执行方式和有益效果与对应终端实施例的执行方式和有益效果类似在这里不再赘述。
本申请实施例还提供一种调试系统，该系统包括调试设备，以及上述任意实施例所示的终端，调试设备中包括转接板，转接板连接到终端的USB Type-C接口。该系统的执行方式和有益效果与对应终端实施例的执行方式和有益效果类似在这里不再赘述。
图8为本申请实施例提供的一种调试方法的流程示意图，该方法能够应用与图3所示的终端。如图8所示，该方法包括如下步骤：
S11、当有调试信号输入终端的USB Type-C接口时，终端的多路模拟开关接收所述调试信号，调试信号中携带有切换信号，切换信号满足第一预设条件。
其中，调试单元包括向量仿真模块和边界扫描模块，以及如下模块中的一种或多种：
JTAG调试单元、程序纠错模块。
S12、终端的多路模拟开关接通调试单元和USB Type-C接口之间的连接，将调试信号转发至调试单元，其中，调试信号用于控制调试单元执行调试操作。
本实施例提供的方法的执行方式和有益效果与图3实施例的方案类似，在这里不再赘述。
图9为本申请实施例提供的一种调试方法的流程示意图，该方法能够应用于图4实施例中所示的终端。如图9所示，该方法包括如下步骤：
S21、当有调试信号输入所述终端的USB Type-C接口时，终端的多路模拟开关接收调试信号。
S22、终端的多路模拟开关确定调试信号是否满足第一预设条件，若是，则执行S23，若不是，则执行S24。
S23、终端的多路模拟开关接通调试单元和USB Type-C接口之间的连接，将调试信号转发至调试单元，以使调试单元执行调试操作。
S24、终端的多路模拟开关确定调试信号满足第二预设条件，终端的多路模拟开关接通USB Type-C驱动芯片与USB Type-C接口之间的连接。
其中，当USB Type-C接口中没有调试信号输入时，多路模拟开关默认接通USB Type-C驱动芯片与USB Type-C接口之间的连接。
本实施例提供的方法的执行方式和有益效果与图4实施例的方案类似，在这里不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用硬件加软件功能单元的形式实现。
上述软件功能部分可以存储在存储单元中。所述存储单元包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)或处理器(processor)执行本申请各个实施例所述方法的部分步骤。所述存储单元包括：一个或多个存储器，如只读存储器(Read-Only Memory，ROM)、随机存取存储器(Random Access Memory，RAM)，电可擦写可编程只读存储器(EEPROM)，等等。所述存储单元可以独立存在，也可以和处理器集成在一起。
本领域技术人员可以清楚地了解到，为描述的方便和简洁，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成，即将装置的内部结构划分成不同的功能模块，以完成以上描述的全部或者部分功能。上述描述的装置的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
本领域普通技术人员可以理解：本文中涉及的第一、第二等各种数字编号仅为描述方便进行的区分，并不用来限制本申请实施例的范围。
本领域普通技术人员可以理解，在本申请的各种实施例中，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算 机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本发明实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质(例如固态硬盘Solid State Disk(SSD))等。
最后应说明的是：以上各实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述各实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的范围。

Claims (10)

  1. 一种终端，包括USB Type-C接口、主控芯片，所述主控芯片包括调试单元，其特征在于，所述终端还包括：多路模拟开关；
    所述调试单元连接到所述多路模拟开关，所述多路模拟开关连接到所述USB Type-C接口，所述多路模拟开关用于接通或断开所述调试单元与所述USB Type-C接口之间的连接。
  2. 根据权利要求1所述的终端，其特征在于，所述USB Type-C接口包括第一组引脚和第二组引脚，所述多路模拟开关与所述第一组引脚连接。
  3. 根据权利要求2所述的终端，其特征在于，所述终端还包括：USB Type-C驱动芯片，所述主控芯片还包括功能单元；
    所述功能单元连接到所述USB Type-C驱动芯片，所述USB Type-C驱动芯片连接到所述多路模拟开关，所述多路模拟开关接通所述调试单元与所述USB Type-C之间的连接时，断开所述USB Type-C驱动芯片与所述USB Type-C之间的连接，所述多路模拟开关断开所述调试单元与所述USB Type-C之间的连接时，接通所述USB Type-C驱动芯片与所述USB Type-C之间的连接；或者
    所述功能单元连接到所述USB Type-C驱动芯片，所述USB Type-C驱动芯片连接到所述第二组引脚。
  4. 根据权利要求1-3中任一项所述的终端，其特征在于，所述调试单元包括向量仿真模块和边界扫描模块，以及如下模块中的一种或多种：
    JTAG调试单元、程序纠错模块。
  5. 一种调试系统，其特征在于，包括：调试设备、转接板，以及如权利要求1-4中任一项所述的终端，所述转接板连通所述调试设备和所述USB Type-C接口。
  6. 一种调试系统，其特征在于，包括：调试设备，以及如权利要求1-4中任一项所述的终端，所述调试设备中包括转接板，所述转接板连接到所述USB Type-C接口。
  7. 一种调试方法，该方法适用于一种终端，该终端包括USB Type-C接口、主控芯片，所述主控芯片包括调试单元，其特征在于，所述终端还包括：多路模拟开关；
    所述调试单元连接到所述多路模拟开关，所述多路模拟开关连接到所述USBType-C接口；
    所述方法包括：
    当有调试信号输入所述终端的USB Type-C接口时，所述终端的多路模拟开关接收所述调试信号，所述调试信号中携带有切换信号，所述切换信号满足第一预设条件；
    所述终端的多路模拟开关接通所述调试单元和所述USB Type-C接口之间的连接，将所述调试信号转发至所述调试单元，其中，所述调试信号用于控制所述调试单元执行调试操作。
  8. 根据权利要求7所述的方法，其特征在于，所述USB Type-C接口包括第一组引脚和第二组引脚，所述多路模拟开关与所述第一组引脚连接。
  9. 根据权利要求8所述的方法，其特征在于，所述终端还包括：USB Type-C驱 动芯片，所述主控芯片还包括功能单元；
    所述功能单元连接到所述USB Type-C驱动芯片，所述USB Type-C驱动芯片连接到所述多路模拟开关；
    所述方法还包括：
    当所述切换信号满足第二预设条件，或者没有调试信号输入所述终端的USBType-C接口时，所述终端的多路模拟开关接通所述USB Type-C驱动芯片与所述USBType-C接口之间的连接。
  10. 根据权利要求7-9中任一项所述的方法，其特征在于，所述调试单元包括向量仿真模块和边界扫描模块，以及如下模块中的一种或多种：
    JTAG调试单元、程序纠错模块。
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