WO2018127222A1

WO2018127222A1 - Synchronization sequence sending method, and synchronous detection method and device

Info

Publication number: WO2018127222A1
Application number: PCT/CN2018/075481
Authority: WO
Inventors: 赵铮; 任斌; 郑方政; 马文平; 孙韶辉; 潘学明
Original assignee: 电信科学技术研究院
Priority date: 2017-01-09
Filing date: 2018-02-06
Publication date: 2018-07-12

Abstract

The present invention provides a synchronization sequence sending method, and synchronous detection method and device. The sending method comprises: setting a target synchronization sequence having a good autocorrelation property, at least one segment of sequence intercepted on a time domain or a frequency domain of the target synchronization sequence being a sub-synchronization sequence, the sub-synchronization sequences having good autocorrelation properties and good cross-correlation properties; and sending the target synchronization sequence to a terminal.

Description

Synchronization sequence transmission method, synchronization detection method and device

Cross-reference to related applications

The present application claims the priority of the Chinese Patent Application No. 201710013632.5 filed on Jan. 9, 2017 in China and the Chinese Patent Application No. 201710107142.1 filed on Jan. 6, 2017 in China. References are included here.

Technical field

The present disclosure relates to the field of communications technologies, and in particular, to a method for transmitting a synchronization sequence, a method and device for detecting synchronization.

Background technique

In the 5G system, since the multi-beam system is to be supported, the synchronization sequence has a long period. In order to reduce the delay of the synchronization detection, synchronous detection is required to improve the accuracy of one detection as much as possible; for this reason, the synchronization sequence should be as long as possible, and the frequency is synchronous. For the domain, the bandwidth of the synchronization sequence should be as wide as possible. In 5G communication, the user's system bandwidth will range from 180k to 80M. In the same frequency band, different users will have different working bandwidths. In order to guarantee the performance of one detection and support users with different bandwidths, the synchronization sequence can work under different bandwidths, that is, in the frequency domain, the synchronization sequence is intercepted, and the synchronization sequence can still have better autocorrelation and cross-correlation characteristics.

In addition, when the user moves at high speed, in order to ensure the synchronization detection accuracy, the synchronization signal should have a higher carrier spacing, but in the case where the total bandwidth is constant, the higher carrier spacing reduces the length of the synchronization sequence. Therefore, it is necessary to design a synchronization sequence to support different carrier spacing.

However, the synchronization sequence in the existing Long Term Evolution (LTE) system does not support the use of the bandwidth interception and is still used as the synchronization sequence, and does not support the synchronization sequence of different carrier intervals.

Summary of the invention

An object of the present disclosure is to provide a method for transmitting a synchronization sequence, a synchronization detection method, and an apparatus, which solve the problem that the sequence length and the bandwidth width of the synchronization sequence of the related art are mutually limited, resulting in low detection accuracy.

In order to achieve the above objective, an embodiment of the present disclosure provides a method for sending a synchronization sequence, including:

Setting a target synchronization sequence; wherein at least one sequence intercepted in a time domain or a frequency domain of the target synchronization sequence is a synchronization sequence;

Sending the target synchronization sequence to the terminal.

Optionally, the step of setting a target synchronization sequence includes:

Obtaining a reference synchronization sequence;

The plurality of sequence points of the reference synchronization sequence are rearranged according to a preset rule to obtain a target synchronization sequence.

Optionally, if the reference synchronization sequence is a generalized sample sequence, and the sequence length of the ZC sequence is an even number,

And the step of reordering the plurality of sequence points of the reference synchronization sequence according to the preset rule to obtain the target synchronization sequence, including:

The sequence points of the reference synchronization sequence are extracted at equal intervals, and the extracted sequence points are successively placed to obtain a target synchronization sequence.

Optionally, the steps of separately extracting sequence points of the reference synchronization sequence and sequentially extracting the extracted sequence points to obtain a target synchronization sequence include:

Extracting even sequence points and odd sequence points of the reference synchronization sequence respectively;

Dividing the even sequence points into a plurality of first short sequences, and dividing the odd sequence points into a plurality of second short sequences; wherein the first short sequence includes a plurality of consecutive even sequence points, The second short sequence includes a plurality of consecutive odd sequence points;

And arranging the plurality of first short sequences and the plurality of second short sequences in a preset order to obtain a target synchronization sequence.

Optionally, the step of arranging the plurality of first short sequences and the plurality of second short sequences in a preset order to obtain a target synchronization sequence includes:

The first short sequence and the second short sequence are alternately placed to obtain a target synchronization sequence.

Optionally, if the sequence length of the reference synchronization sequence is divided by 4, the result is even, then the multiple first short sequences are ZC sequences; if the sequence length of the reference synchronization sequence is divided by 4, When the result is an odd number, then the plurality of second short sequences are ZC sequences.

Optionally, if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an odd number, and the sequence length is equal to a square of N;

Starting from the 0th sequence point of the reference synchronization sequence, extracting one target sequence point in each consecutive N sequence points;

The extracted target sequence points are successively placed at preset positions of the reference synchronization sequence to obtain a target synchronization sequence; wherein N is an integer greater than or equal to 3.

Optionally, the preset position is a position starting from an integral multiple of N.

Optionally, if the sequence length of the ZC sequence is an integer multiple of X, the sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is a sequence of one-segment X segment of the target synchronization sequence, and The sub-synchronization sequence is a ZC sequence; wherein X is an integer greater than or equal to 2.

Optionally, if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number,

Interlacing the even sequence points and the odd sequence points of the reference synchronization sequence respectively;

Placing an even sequence point of the reference synchronization sequence before an odd sequence point of the reference synchronization sequence to obtain a rearrangement sequence; or placing an odd sequence point of the reference synchronization sequence on an even sequence point of the reference synchronization sequence Previously, a rearrangement sequence was obtained;

The rearrangement sequence is respectively mapped to each subcarrier in the frequency domain, and after the inverse Fourier transform, a target synchronization sequence is obtained.

Optionally, the sub-synchronization sequence intercepted in the frequency domain of the target synchronization sequence is a sequence of a first quarter segment of the target synchronization sequence, and a second sequence of the target synchronization sequence a sequence of a segment, a sequence of a third quarter of the target synchronization sequence, and/or a sequence of a fourth quarter of the target sequence, and the sub-synchronization sequence is ZC sequence.

The embodiment of the present disclosure further provides a synchronization detection method, including:

Receiving a target synchronization sequence sent by the base station;

Synchronous detection is performed according to the target synchronization sequence.

Optionally, the step of performing synchronization detection according to the target synchronization sequence includes:

And intercepting a sequence in the time domain or the frequency domain of the target synchronization sequence as a synchronization sequence;

Synchronous detection is performed based on the intercepted synchronization sequence.

Optionally, if the target synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number,

The synchronization sequence intercepted in the time domain or the frequency domain of the target synchronization sequence is one or more first short sequences and/or one or more second short sequences included in the target synchronization sequence; wherein The first short sequence includes a plurality of sequence points, and the second short sequence includes a plurality of sequence points.

Performing related processing on the target synchronization sequence by using a preset synchronization sequence;

Determining, according to the number of correlation peaks obtained by the correlation processing, a subcarrier spacing of the base station transmitting the target synchronization sequence;

Synchronous detection is performed according to the subcarrier spacing and the intercepted synchronization sequence.

Optionally, if the target synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an odd number and the sequence length is equal to the square of N,

The synchronization sequence intercepted in the time domain of the target synchronization sequence is a sequence of one-segment X segment of the target synchronization sequence, and the intercepted synchronization sequence is a ZC sequence; wherein the sequence length of the ZC sequence Is an integer multiple of X, and X is an integer greater than or equal to 2.

Optionally, the step of performing synchronization detection according to the intercepted synchronization sequence includes:

Put the intercepted synchronization sequence to a power of p to obtain a sequence to be detected; wherein p is an integer greater than or equal to 2;

Synchronous detection is performed according to the sequence to be detected.

The embodiment of the present disclosure further provides a sending device of a synchronization sequence, including:

a sequence setting module, configured to set a target synchronization sequence; wherein at least one sequence intercepted in a time domain or a frequency domain of the target synchronization sequence is a synchronization sequence;

And a sequence sending module, configured to send the target synchronization sequence to the terminal.

Optionally, the sequence setting module includes:

a reference acquisition module, configured to acquire a reference synchronization sequence;

And a rearrangement module, configured to rearrange a plurality of sequence points of the reference synchronization sequence according to a preset rule to obtain a target synchronization sequence.

Optionally, the rearrangement module includes:

a first rearrangement submodule, configured to: if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number, extract the sequence points of the reference synchronization sequence at equal intervals, respectively, and extract the sequence The points are successively placed to obtain the target synchronization sequence.

Optionally, the first rearrangement submodule includes:

a first extracting unit, configured to respectively extract an even sequence point and an odd sequence point of the reference synchronization sequence;

a first dividing unit, configured to divide the even sequence point into a plurality of first short sequences, and divide the odd sequence points into a plurality of second short sequences; wherein the first short sequence includes multiple a continuous even sequence of points, the second short sequence comprising a plurality of consecutive odd sequence points;

And a rearrangement unit, configured to arrange the plurality of first short sequences and the plurality of second short sequences in a preset order to obtain a target synchronization sequence.

Optionally, the rearrangement unit includes:

And rearranging the subunits for alternately placing the first short sequence and the second short sequence to obtain a target synchronization sequence.

Optionally, the rearrangement module includes:

Extracting a sub-module, if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an odd number, and the sequence length is equal to the square of N, starting from the 0th sequence point of the reference synchronization sequence, Extracting one target sequence point in each consecutive N sequence points;

a second rearrangement submodule, configured to continuously place the extracted target sequence points in a preset position of the reference synchronization sequence to obtain a target synchronization sequence; wherein N is an integer greater than or equal to 3.

Optionally, if the sequence length of the ZC sequence is an integer multiple of X, the synchronization sequence intercepted in the time domain of the target synchronization sequence is a sequence of one-segment X segment of the target synchronization sequence, and The intercepted synchronization sequence is a ZC sequence; wherein X is an integer greater than or equal to 2.

Optionally, the rearrangement module includes:

a second intercepting sub-module, configured to: if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number, intercept the even sequence point and the odd sequence point of the reference synchronization sequence respectively;

a third rearrangement submodule, configured to: place an even sequence point of the reference synchronization sequence before an odd sequence point of the reference synchronization sequence to obtain a rearrangement sequence; or place an odd sequence point of the reference synchronization sequence Before the even sequence point of the reference synchronization sequence, a rearrangement sequence is obtained;

The frequency domain mapping submodule is configured to map the rearrangement sequence to each subcarrier of the frequency domain, and obtain an object synchronization sequence after performing inverse Fourier transform.

Optionally, the synchronization sequence intercepted in the frequency domain of the target synchronization sequence is a sequence of a first quarter segment of the target synchronization sequence, and a second quarter of the target synchronization sequence a sequence of one segment, a sequence of a third quarter segment of the target synchronization sequence, and/or a sequence of a fourth quarter segment of the target sequence, and the intercepted synchronization sequence is ZC sequence.

The embodiment of the present disclosure further provides a synchronization detecting apparatus, including:

a sequence receiving module, configured to receive a target synchronization sequence sent by the base station;

And a detecting module, configured to perform synchronous detection according to the target synchronization sequence.

Optionally, the detecting module includes:

An intercepting submodule, configured to intercept a sequence in the time domain or the frequency domain of the target synchronization sequence as a synchronization sequence;

The detecting submodule is configured to perform synchronous detection according to the intercepted synchronization sequence.

Optionally, the detecting module includes:

a correlation processing submodule, configured to perform related processing on the target synchronization sequence by using a preset synchronization sequence;

An interval determining submodule, configured to determine, according to the number of correlation peaks obtained by the correlation process, a subcarrier spacing of the base station transmitting the target synchronization sequence;

The synchronization detection submodule is configured to perform synchronization detection according to the subcarrier spacing and the intercepted synchronization sequence.

The synchronization sequence intercepted in the time domain of the target synchronization sequence is a sequence of one-segment X segment of the target synchronization sequence, and the intercepted synchronization sequence is a ZC sequence; wherein the sequence length of the ZC sequence is X Integer multiple, X is an integer greater than or equal to 2.

Optionally, the detecting submodule includes:

a preprocessing module, configured to obtain a p-th power of the intercepted synchronization sequence to obtain a sequence to be detected; wherein p is an integer greater than or equal to 2;

And a detecting unit, configured to perform synchronous detection according to the sequence to be detected.

An embodiment of the present disclosure further provides a synchronization sequence sending apparatus, including: a processor, a memory, and a transceiver, where:

The processor is configured to read a program in the memory and perform the following process:

Transmitting the target synchronization sequence to the terminal by the transceiver,

The transceiver is for receiving and transmitting data, and the memory is capable of storing data used by the processor in performing operations.

The embodiment of the present disclosure further provides a synchronization detecting apparatus, including: a processor, a memory, and a transceiver, wherein:

Receiving, by the transceiver, a target synchronization sequence sent by the base station;

Performing synchronous detection according to the target synchronization sequence,

The above technical solutions of the present disclosure have at least the following beneficial effects:

In the method for transmitting, synchronizing, and detecting a synchronization sequence in the embodiment of the present disclosure, the base station side presets a target synchronization sequence having good autocorrelation characteristics, and the sequence obtained in the time domain or the frequency domain of the target synchronization sequence is still It can be used as a synchronization sequence, and the obtained sub-synchronization sequence has good autocorrelation property and good cross-correlation property; then, for terminals of different bandwidths or terminals with different carrier spacing, after the base station side transmits the same target synchronization sequence, the terminal The corresponding sub-synchronization sequence can be intercepted according to its own requirements for synchronous detection, which not only ensures the synchronization detection accuracy, but also improves the application range of the target synchronization sequence.

DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings used in the description of the embodiments of the present disclosure will be briefly described. It is obvious that the drawings in the following description are only some embodiments of the present disclosure. Other drawings may also be obtained from those of ordinary skill in the art in view of the drawings.

1 is a flow chart showing the steps of a method for transmitting a synchronization sequence provided in some embodiments of the present disclosure;

2 is a flow chart showing the steps of a synchronization detecting method provided in some embodiments of the present disclosure;

FIG. 3 is a schematic structural diagram of a transmitting apparatus of a synchronization sequence provided in some embodiments of the present disclosure;

4 is a block diagram showing another apparatus for transmitting a synchronization sequence and a synchronization detecting apparatus provided in some embodiments of the present disclosure;

FIG. 5 shows a block diagram of another synchronization detecting apparatus provided in some embodiments of the present disclosure.

detailed description

The technical solutions in the embodiments of the present disclosure are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present disclosure. It is obvious that the described embodiments are only a part of the embodiments of the present disclosure, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present disclosure without departing from the inventive scope are the scope of the disclosure.

As shown in FIG. 1 , some embodiments of the present disclosure provide a method for sending a synchronization sequence, including:

Step 11: Set a target synchronization sequence with good autocorrelation characteristics; wherein at least one sequence intercepted in a time domain or a frequency domain of the target synchronization sequence is a sub-synchronization sequence, and the sub-synchronization sequence has a good self Related characteristics and good cross-correlation properties between the sub-synchronization sequences;

Step 12: Send the target synchronization sequence to the terminal.

The above-described embodiment described with reference to FIG. 1 of the present disclosure is applied to the base station side, and the base station side sets a target synchronization sequence having good sub-correlation characteristics and cross-correlation characteristics. And if a sequence or a plurality of sequences obtained according to a preset rule in the time domain or the frequency domain of the target synchronization sequence can also be used as a synchronization sequence, which is called a sub-synchronization sequence, the sub-synchronization sequence also has good autocorrelation characteristics and Cross-correlation properties.

Specifically, for terminals of different bandwidths or terminals with different carrier intervals, after the base station side sends the same target synchronization sequence, the terminal may intercept the corresponding sub-synchronization sequence according to its own requirements for synchronous detection.

Further, step 11 of the embodiment of the present disclosure described above with reference to FIG. 1 includes:

Step 111: Obtain a reference synchronization sequence with good autocorrelation properties;

Step 112: Perform rearrangement of multiple sequence points of the reference synchronization sequence according to a preset rule to obtain a target synchronization sequence with good autocorrelation characteristics.

Specifically, the preset rule may be specifically set according to a characteristic of the reference synchronization sequence; specifically, if the target synchronization sequence is a synchronization sequence that is insensitive to the carrier interval, at least one sequence intercepted in the time domain of the target synchronization sequence If the target synchronization sequence is a bandwidth-insensitive synchronization sequence, at least one sequence intercepted in the frequency domain of the target synchronization sequence is a sub-synchronization sequence.

The sub-synchronization sequence in the time domain and the sub-synchronization sequence in the frequency domain are respectively described below. First, the case where the sequence intercepted in the time domain of the target synchronization sequence is a sub-synchronization sequence is described:

Specifically, it is divided into two cases: the first reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number, and the second reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is It is odd and the sequence length is equal to the square of N; wherein the Chinese name of the ZC (Zadoff-Chu) sequence is: a generalized sample sequence.

In the first case, if the reference synchronization sequence is a ZC sequence and the sequence length of the ZC sequence is an even number, step 112 includes:

Step 1123: Extract the sequence points of the reference synchronization sequence at equal intervals, and successively place the extracted sequence points to obtain a target synchronization sequence with good autocorrelation properties.

Further step 1123 includes:

Step 11231, extracting even sequence points and odd sequence points of the reference synchronization sequence respectively;

Step 11232, dividing the even sequence point into a plurality of first short sequences, and dividing the odd sequence points into a plurality of second short sequences; wherein the first short sequence includes multiple consecutive even sequences Point, the second short sequence includes a plurality of consecutive odd sequence points;

Step 11233, the plurality of first short sequences and the plurality of second short sequences are arranged in a preset order to obtain a target synchronization sequence having good autocorrelation characteristics.

And step 11233 includes:

The first short sequence and the second short sequence are alternately placed to obtain a target synchronization sequence having good autocorrelation properties.

For example, when the sequence length of the reference synchronization sequence is an integer multiple of 4, step 11232 is specifically: dividing the even sequence point into two first short sequences, which are short sequence 1 and short sequence 2, respectively; The sequence points are divided into two second short sequences, which are short sequence 3 and short sequence 4, respectively. The short sequence 1 is the first half of the even sequence point of the reference synchronization sequence, the short sequence 2 is the second half of the even sequence point of the reference synchronization sequence; the short sequence 3 is the first half of the odd sequence point of the reference synchronization sequence, and the short sequence 4 is the reference The second half of the odd sequence of the synchronization sequence.

Alternating the first short sequence and the second short sequence specifically means in the rearranged target sequence, between the short sequences 1 and 2 is a short sequence of 3 or 4, and between the short sequences 3 and 4. For short sequence 1 or 2; for example, the target synchronization sequence is [short sequence 1, short sequence 3, short sequence 2, short sequence 4], or [short sequence 1, short sequence 4, short sequence 2, short sequence 3], Or [short sequence 2, short sequence 3, short sequence 1, short sequence 4], [short sequence 2, short sequence 4, short sequence 1, short sequence 3], similarly, a short sequence consisting of odd points can be placed in The first short sequence position is not listed here.

It should be noted that the method of alternately placing the first short sequence and the second short sequence is only a preferred embodiment of the present application, and other placement sequences are equally applicable to the present application. For example, a plurality of first short sequences are successively placed, and then a plurality of second short sequences are successively continued; or, a plurality of second short sequences are successively placed, and then a plurality of first short sequences are successively placed. Briefly, placing an even sequence point of the reference synchronization sequence before an odd sequence point of the reference synchronization sequence results in a target synchronization sequence having good autocorrelation properties; or an odd sequence point of the reference synchronization sequence Placed before the even sequence point of the reference synchronization sequence, a target synchronization sequence with good autocorrelation properties is obtained.

Further, in the foregoing embodiment of the present disclosure, if the sequence length of the reference synchronization sequence is divided by 4, the result is even, then the plurality of first short sequences are ZC sequences; if the sequence of the reference synchronization sequence is When the result obtained by dividing the length by 4 is an odd number, then the plurality of second short sequences are ZC sequences.

Specifically, when the length of the reference synchronization sequence is an even number, if the quarter of the reference synchronization sequence is an even number, the short sequence 1 and the short sequence 2 are ZC sequences; if the reference synchronization sequence is one quarter long For odd numbers, short sequence 3 and short sequence 4 are ZC sequences.

If the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number, the step 112 further includes:

Step 1121, respectively intercepting even sequence points and odd sequence points of the reference synchronization sequence;

Step 1122: placing an even sequence point of the reference synchronization sequence before an odd sequence point of the reference synchronization sequence to obtain a target synchronization sequence with good autocorrelation characteristics; or placing an odd sequence point of the reference synchronization sequence A target synchronization sequence having good autocorrelation properties is obtained before the even sequence points of the reference synchronization sequence.

For example, the reference synchronization sequence includes {sequence point 1, sequence point 2, sequence point 3, sequence point 4, sequence point 5, sequence point 6, sequence point 7, sequence point 8}, and the target synchronization sequence is {sequence point 2 Sequence point 4, sequence point 6, sequence point 8, sequence point 1, sequence point 3, sequence point 5, sequence point 7}; or target synchronization sequence is {sequence point 1, sequence point 3, sequence point 5, sequence point 7 , sequence point 2, sequence point 4, sequence point 6, sequence point 8}.

Further, when the first half of the target synchronization sequence is an even sequence point of the reference synchronization sequence, and the second half of the target synchronization sequence is an odd sequence point of the reference synchronization sequence, that is, the target synchronization sequence is {sequence point 2 Sequence point 4, sequence point 6, sequence point 8, sequence point 1, sequence point 3, sequence point 5, sequence point 7};

If the sequence length of the ZC sequence is divided by 4, the result obtained by the time domain of the target synchronization sequence is the first quarter of the target synchronization sequence. a sequence and/or a sequence of a second quarter of the target synchronization sequence, and the sub-synchronization sequence is a ZC sequence; that is, the sub-synchronization sequence is {sequence point 2, sequence point 4} or a sub-synchronization sequence Is {sequence point 6, sequence point 8}.

If the sequence length of the ZC sequence is divided by 4, the result is an odd number, and the sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is the third quarter of the target synchronization sequence. a sequence and/or a sequence of a fourth quarter of the target synchronization sequence, and the sub-synchronization sequence is a ZC sequence;

Or, when the first half of the target synchronization sequence is an odd sequence point of the reference synchronization sequence, and the second half of the target synchronization sequence is an even sequence point of the reference synchronization sequence, that is, the target synchronization sequence is {sequence point 1, sequence Point 3, sequence point 5, sequence point 7, sequence point 2, sequence point 4, sequence point 6, sequence point 8};

If the sequence length of the ZC sequence is divided by 4, the result is an odd number, and the sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is the first quarter of the target synchronization sequence. a sequence and/or a sequence of a second quarter of the target synchronization sequence, and the sub-synchronization sequence is a ZC sequence;

If the sequence length of the ZC sequence is divided by 4 and the result is even, the sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is the third quarter of the target synchronization sequence. a sequence and/or a sequence of a fourth quarter of the target synchronization sequence, and the sub-synchronization sequence is a ZC sequence; that is, the sub-synchronization sequence is {sequence point 2, sequence point 4} or a sub-synchronization sequence Is {sequence point 6, sequence point 8}.

The specific proof is as follows:

The even ZC sequence is:

This sequence has the following characteristics:

When N _zc /4 is still even, the even point of the first half of z(n) is still a ZC sequence.

Proof: Let n=2m, m=0,1,...,N _zc /4, with the following formula:

Then, when N _zc /4 is still even, z ₁ (m) is a ZC sequence.

When N _zc /4 is still even, the even point of the second half of z(n) is still a ZC sequence.

Proof: Let n=2m, m=0,1,...,N _zc /4, with the following formula:

When N _zc /4 is still even, z ₂ (m) is a ZC sequence.

When N _zc /4 is an odd number, the odd point of the first half of z(n) is still a ZC sequence.

Proof: Let n=2m, m=0,1,...,N _zc /4, with the following formula:

When N _zc /4 is an odd number, z ₃ (m) is a ZC sequence in which

When N _zc /4 is an odd number, the odd point of the second half of z(n) is still a ZC sequence.

Proof: Let n=2m, m=0,1,...,N _zc /4, with the following formula:

When N _zc /4 is an odd number, z ₄ (m) is a ZC sequence in which

The second case: if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is odd and the sequence length is equal to the square of N, step 112 includes:

Step 1123, starting from the 0th sequence point of the reference synchronization sequence, extracting one target sequence point in each consecutive N sequence points;

Step 1124: The extracted target sequence points are successively placed in a preset position of the reference synchronization sequence to obtain a target synchronization sequence having good autocorrelation properties; wherein N is an integer greater than or equal to 3.

And the preset position is a position starting from an integral multiple of N.

For example, the reference synchronization sequence includes {sequence point 1, sequence point 2, sequence point 3, sequence point 4, sequence point 5, sequence point 6, sequence point 7, sequence point 8, sequence point 9}, and N is equal to 3; The target synchronization sequence is {sequence point 1, sequence point 4, sequence point 7, sequence point 2, sequence point 5, sequence point 8, sequence point 3, sequence point 6, sequence point 9}.

Further, if the sequence length of the ZC sequence is an integer multiple of X, the sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is a sequence of one-segment X segment of the target synchronization sequence, and The subsynchronization sequence is a ZC sequence; wherein X is an integer greater than or equal to 2.

For example, if X is equal to 3 and the target synchronization sequence is {sequence point 1, sequence point 3, sequence point 4, sequence point 6, sequence point 2, sequence point 7, sequence point 8, sequence point 9, sequence point 5}, then The sequence length of the target synchronization sequence is 9, and 9 is an integer multiple of 3, so the sub-synchronization sequence is a sequence of one-third of the target synchronization sequence, that is, {sequence point 1, sequence point 3, sequence point 4}, or { Sequence point 6, sequence point 2, sequence point 7}, or {sequence point 8, sequence point 9, sequence point 5}.

Further, the case where the sequence intercepted in the frequency domain of the target synchronization sequence is a sub-synchronization sequence is described. In this case, the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is Even, step 112 includes:

Step 1125: Intercepting even sequence points and odd sequence points of the reference synchronization sequence respectively;

Step 1126: placing an even sequence point of the reference synchronization sequence before an odd sequence point of the reference synchronization sequence to obtain a rearrangement sequence; or placing an odd sequence point of the reference synchronization sequence on the reference synchronization sequence A rearrangement sequence is obtained before the even sequence point;

Step 1127: The rearrangement sequence is respectively mapped to each subcarrier in the frequency domain, and after the inverse Fourier transform, a target synchronization sequence with good autocorrelation property is obtained.

Specifically, the sub-synchronization sequence intercepted in the frequency domain of the target synchronization sequence is a sequence of a first quarter segment of the target synchronization sequence, and a second quarter of the target synchronization sequence. a sequence of one segment, a sequence of a third quarter of the target synchronization sequence, and/or a sequence of a fourth quarter of the target sequence, and the subsynchronization sequence is a ZC sequence .

Similarly, the sub-ZC sequence on each carrier can be used as a synchronization sequence according to the formula of the even ZC sequence, that is, it has good autocorrelation property and cross-correlation property. It is not specifically described here.

In summary, in the foregoing embodiment of the present disclosure described with reference to FIG. 1, the base station side presets a target synchronization sequence with good autocorrelation characteristics, which is insensitive to carrier spacing and system bandwidth, and can satisfy different system bandwidths and The carrier interval is required by the user; specifically, the sequence obtained in the time domain of the target synchronization sequence or in the frequency domain can still be used as a synchronization sequence, and the obtained sub-synchronization sequence has good autocorrelation property and good cross-correlation. Characteristics: For terminals with different bandwidths or terminals with different carrier spacings, after the base station side transmits the same target synchronization sequence, the terminal can intercept the corresponding sub-synchronization sequence according to its own requirements for synchronous detection, which not only ensures the synchronization detection accuracy, but also improves The scope of application of the target synchronization sequence.

As shown in FIG. 2, in some embodiments of the present disclosure, a synchronization detection method is provided, including:

Step 21: Receive a target synchronization sequence that is sent by the base station and has good autocorrelation characteristics.

Step 22: Perform synchronous detection according to the target synchronization sequence.

The embodiment described above with reference to FIG. 2 of the present disclosure is applied to the terminal side, that is, the terminal side receives the target synchronization sequence transmitted by the base station, and performs synchronization detection according to its own needs and the received target synchronization sequence to implement synchronization timing.

Specifically, step 22 of the embodiment of the present disclosure described above with reference to FIG. 2 includes:

Step 221: Intercept a sequence in the time domain or the frequency domain of the target synchronization sequence as a sub-synchronization sequence, where the sub-synchronization sequence has good autocorrelation characteristics; the target synchronization sequence is insensitive to carrier spacing and system bandwidth, and The requirements of different system bandwidths and carrier spacing users are met; in short, the subsequence obtained by the terminal after intercepting in the frequency domain or the time domain of the target synchronization sequence can still be used as the synchronization sequence.

Step 222: Perform synchronization detection according to the sub-synchronization sequence.

If the target synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number,

The sub-synchronization sequence intercepted in the time domain or the frequency domain of the target synchronization sequence is one or more first short sequences and/or one or more second short sequences included in the target synchronization sequence; The first short sequence includes a plurality of sequence points, and the second short sequence includes a plurality of sequence points.

It should be noted that the specific first short sequence includes several sequence points and the second short sequence includes several sequence points, and is determined according to the sequence length of the reference synchronization sequence is an integer multiple of several, which is not specifically limited herein.

Specifically, if the target synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number, and the sequence length of the ZC sequence is an integer multiple of 4,

a sub-synchronization sequence intercepted in a time domain or a frequency domain of the target synchronization sequence is a sequence of a first quarter segment of the target synchronization sequence, and a second quarter of the target synchronization sequence a sequence of segments, a sequence of a third quarter of the target synchronization sequence, or a sequence of a fourth quarter of the target synchronization sequence, and the subsynchronization sequence is a ZC sequence.

It should be noted that the specific sequence of the first quarter segment can be determined as the sub-synchronization sequence according to whether the result of dividing the sequence length of the target synchronization sequence by 4 is odd or even, and the characteristics of the target synchronization sequence. Specifically, the characteristics of the target synchronization sequence may be indicated by the base station side, and are not specifically limited herein.

Correspondingly, step 22 includes:

Step 223: Perform correlation processing on the target synchronization sequence by using a preset synchronization sequence.

Step 224: Determine, according to the number of correlation peaks obtained by the correlation processing, a subcarrier spacing of the base station to send the target synchronization sequence.

Step 225: Perform synchronous detection according to the subcarrier spacing and the sub synchronization sequence.

Specifically, when the receiving end does not know the subcarrier spacing used by the base station (ie, the transmitting end), the subcarrier spacing may be determined according to the number of correlation peaks obtained by correlating the synchronization sequence.

The target synchronization sequence is exemplified as [short sequence 1, short sequence 3, short sequence 2, short sequence 4]. When the subcarrier spacing is 15k Hz, the transmission target synchronization sequence is [short sequence 1, short sequence 3, short sequence 2, short sequence 4]. When the subcarrier spacing is 30k Hz, the transmitted target synchronization sequence is [short sequence]. 1, short sequence 3], when the subcarrier spacing is 60k Hz, the target synchronization sequence transmitted is [short sequence 1].

When the receiving end user performs detection, the transmission terminal carrier interval can be determined according to the number of correlation peaks. For example, if the transmission terminal carrier interval is 15 kHz, the user uses the 60 k Hz preset synchronization sequence [short sequence 1] as the local sequence for correlation, and two peaks are detected; if the transmission terminal carrier interval is 60 kHz, the user uses the 60 k Hz preset. When the synchronization sequence [short sequence 1] is correlated, one peak is detected; if the transmission terminal carrier interval is 30 kHz, the user uses the 60 k Hz preset synchronization sequence [short sequence 1] for correlation, and the user detects only one peak. However, if the user uses [short sequence 3] for correlation, the user will also detect a peak, but for the case where the transmission terminal carrier spacing is 30 kHz, the short sequence 3 is used, and there is no peak, thereby judging the transmission terminal carrier spacing. , thereby further performing synchronous detection.

Or, if the target synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an odd number and the sequence length is equal to the square of N,

The sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is a sequence of one-segment X segment of the target synchronization sequence, and the sub-synchronization sequence is a ZC sequence; wherein the sequence length of the ZC sequence is An integer multiple of X, where X is an integer greater than or equal to two. For example, if the sequence length is 15 and X is 3, the sub-synchronization sequence is any one-third sequence of the target synchronization sequence.

Specifically, in the foregoing embodiment of the present disclosure, the step of performing synchronization detection by the terminal according to the sub-synchronization sequence includes:

Calculating a sequence of the sub-synchronization sequence to obtain a sequence to be detected; that is, preprocessing the sub-synchronization sequence; wherein p is an integer greater than or equal to 2;

Synchronous detection is performed according to the sequence to be detected; that is, the pre-processed signal is synchronously detected.

Optionally, the receiving process includes two parts: pre-processing and synchronous detection, and the synchronization detection is an existing algorithm, which is not described here. The following preprocessing algorithm is used to detect the target synchronization sequence: let the received signal be y(n)n=0,1,2,3..., let: y ₁ (2m)=y(4m), y ₁ ( 2m+1)=0; y ₂ (2m+1)=y(4m+3), y ₂ (2m)=0;

Where r(m) is used for synchronization correlation detection.

In summary, in the embodiment described above with reference to FIG. 2, after receiving the target synchronization sequence, the terminal side intercepts the corresponding sub-synchronization sequence according to its own requirements for synchronization detection, which not only ensures synchronization detection accuracy, but also improves target synchronization. The application range of the sequence; specifically, the target synchronization sequence is insensitive to carrier spacing and system bandwidth, and can meet the needs of users with different system bandwidths and carrier spacing.

As shown in FIG. 3, in some embodiments of the present disclosure, a synchronization sequence sending apparatus is provided, including:

a sequence setting module 31, configured to set a target synchronization sequence with good autocorrelation characteristics; wherein at least one sequence intercepted in a time domain or a frequency domain of the target synchronization sequence is a sub-synchronization sequence, and the sub-synchronization sequence Has good autocorrelation properties and has good cross-correlation properties between the sub-synchronization sequences;

The sequence sending module 32 is configured to send the target synchronization sequence to the terminal.

Specifically, the sequence setting module in the embodiment described above with reference to FIG. 3 of the present disclosure includes:

a reference acquisition module, configured to obtain a reference synchronization sequence with good autocorrelation properties;

The rearrangement module is configured to rearrange the plurality of sequence points of the reference synchronization sequence according to a preset rule to obtain a target synchronization sequence having good autocorrelation characteristics.

Specifically, the rearrangement module in the embodiment described above with reference to FIG. 3 of the present disclosure includes:

a first rearrangement submodule, configured to: if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number, extract the sequence points of the reference synchronization sequence at equal intervals, respectively, and extract the sequence The points are successively placed to obtain a target synchronization sequence with good autocorrelation properties.

Specifically, the first rearrangement sub-module in the embodiment described above with reference to FIG. 3 of the present disclosure includes:

And a rearrangement unit, configured to arrange the plurality of first short sequences and the plurality of second short sequences in a preset order to obtain a target synchronization sequence having good autocorrelation characteristics.

Specifically, in the above embodiment of the present disclosure described with reference to FIG. 3, the rearrangement unit includes:

And rearranging the subunits for alternately placing the first short sequence and the second short sequence to obtain a target synchronization sequence having good autocorrelation properties.

Specifically, in the foregoing embodiment of the present disclosure described with reference to FIG. 3, if the sequence length of the reference synchronization sequence is divided by 4, the result is an even number, then the plurality of first short sequences are ZC sequences; When the result of dividing the sequence length of the reference synchronization sequence by 4 is an odd number, then the plurality of second short sequences are ZC sequences.

a first intercepting submodule, configured to: if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number, intercept the even sequence point and the odd sequence point of the reference synchronization sequence respectively;

a first rearrangement submodule, configured to: place an even sequence point of the reference synchronization sequence before an odd sequence point of the reference synchronization sequence to obtain a target synchronization sequence having good autocorrelation characteristics; or synchronize the reference The odd sequence points of the sequence are placed before the even sequence points of the reference synchronization sequence to obtain a target synchronization sequence with good autocorrelation properties.

Specifically, in the embodiment described above with reference to FIG. 3, when the first half of the target synchronization sequence is an even sequence point of the reference synchronization sequence, the second half of the target synchronization sequence is an odd sequence point of the reference synchronization sequence. Time,

If the sequence length of the ZC sequence is divided by 4, the result obtained by the time domain of the target synchronization sequence is the first quarter of the target synchronization sequence. a sequence and/or a sequence of a second quarter of the target synchronization sequence, and wherein the sub-synchronization sequence is a ZC sequence;

If the sequence length of the ZC sequence is divided by 4, the result is an odd number, and the sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is the third quarter of the target synchronization sequence. a sequence and/or a sequence of a fourth quarter of the target synchronization sequence, and the subsynchronization sequence is a ZC sequence.

Specifically, in the embodiment described above with reference to FIG. 3, when the first half of the target synchronization sequence is an odd sequence point of the reference synchronization sequence, the second half of the target synchronization sequence is an even sequence point of the reference synchronization sequence. Time,

If the sequence length of the ZC sequence is divided by 4, the result is an odd number, and the sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is the first quarter of the target synchronization sequence. a sequence and/or a sequence of a second quarter of the target synchronization sequence, and wherein the sub-synchronization sequence is a ZC sequence;

If the sequence length of the ZC sequence is divided by 4 and the result is even, the sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is the third quarter of the target synchronization sequence. a sequence and/or a sequence of a fourth quarter of the target synchronization sequence, and the subsynchronization sequence is a ZC sequence.

Extracting a submodule, if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an odd number and the sequence length is equal to the square of N, starting from the 0th sequence point of the reference synchronization sequence, Extracting one target sequence point from every N consecutive sequence points;

a second rearrangement sub-module, configured to continuously place the extracted target sequence points in a preset position of the reference synchronization sequence to obtain a target synchronization sequence with good autocorrelation characteristics; wherein N is greater than or equal to 3 The integer.

Specifically, the above-described preset position of the present embodiment described with reference to FIG. 3 is a position starting from an integral multiple of N.

Specifically, in the embodiment described above with reference to FIG. 3, if the sequence length of the ZC sequence is an integer multiple of X, the sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is the target. A sequence of one-segment X of the synchronization sequence, and the sub-synchronization sequence is a ZC sequence; wherein X is an integer greater than or equal to two.

The rearrangement module includes:

The frequency domain mapping sub-module is configured to map the rearrangement sequence to each sub-carrier of the frequency domain, and obtain an object synchronization sequence with good autocorrelation characteristics after performing inverse Fourier transform.

Specifically, in the foregoing embodiment of the present disclosure described with reference to FIG. 3, the sub-synchronization sequence intercepted in the frequency domain of the target synchronization sequence is the first quarter segment of the target synchronization sequence. a sequence, a sequence of a second quarter of the target synchronization sequence, a sequence of a third quarter of the target synchronization sequence, and/or a fourth quarter of the target sequence A sequence of segments, and the subsynchronization sequence is a ZC sequence.

In summary, in the embodiment described above with reference to FIG. 3, the base station side presets a target synchronization sequence with good autocorrelation characteristics, which is insensitive to carrier spacing and system bandwidth, and can satisfy different system bandwidths and The carrier interval is required by the user; specifically, the sequence obtained in the time domain of the target synchronization sequence or in the frequency domain can still be used as a synchronization sequence, and the obtained sub-synchronization sequence has good autocorrelation property and good cross-correlation. Characteristics: For terminals with different bandwidths or terminals with different carrier spacings, after the base station side transmits the same target synchronization sequence, the terminal can intercept the corresponding sub-synchronization sequence according to its own requirements for synchronous detection, which not only ensures the synchronization detection accuracy, but also improves The scope of application of the target synchronization sequence.

It should be noted that the transmitting apparatus of the synchronization sequence provided by the embodiment described above with reference to FIG. 3 of the present disclosure is a transmitting apparatus capable of executing the transmitting method of the synchronization sequence provided by the embodiment described above with reference to FIG. 1, and the synchronization sequence is All embodiments of the transmitting method are applicable to the transmitting device and both achieve the same or similar benefits.

As shown in FIG. 4, in some embodiments of the present disclosure, another synchronization sequence transmission apparatus is further provided. The synchronization sequence transmission apparatus includes: a processor 100; and a memory 120 connected to the processor 100 through a bus interface. And a transceiver 110 coupled to the processor 100 via a bus interface; the memory for storing programs and data used by the processor in performing operations; transmitting control commands and the like through the transceiver 110; When the program calls and executes the programs and data stored in the memory, the following functional modules are implemented:

a sequence setting module, configured to set a target synchronization sequence having a good autocorrelation property; wherein at least one sequence intercepted in a time domain or a frequency domain of the target synchronization sequence is a sub-synchronization sequence, and the sub-synchronization sequence has Good autocorrelation properties and good cross-correlation properties between the subsynchronous sequences;

Wherein, in FIG. 4, the bus architecture can include any number of interconnected buses and bridges, specifically linked by one or more processors represented by processor 100 and various circuits of memory represented by memory 120. The bus architecture can also link various other circuits such as peripherals, voltage regulators, and power management circuits. The bus interface provides an interface. Transceiver 110 can be a plurality of components, including a transmitter and a transceiver, providing means for communicating with various other devices on a transmission medium. The processor 100 is responsible for managing the bus architecture and general processing, and the memory 120 can store data used by the processor 100 in performing operations.

The processor 100 is responsible for managing the bus architecture and general processing, and the memory 920 can store data used by the processor 100 in performing operations.

It should be noted that the transmitting apparatus of the synchronization sequence provided by the embodiment described above with reference to FIG. 4 of the present disclosure is a transmitting apparatus capable of executing the transmitting method of the synchronization sequence provided by the embodiment described above with reference to FIG. 1, and the synchronization sequence is All embodiments of the transmitting method are applicable to the transmitting device and both achieve the same or similar benefits.

As shown in FIG. 5, some embodiments of the present disclosure further provide a synchronization detecting apparatus, including:

The sequence receiving module 51 is configured to receive a target synchronization sequence that is sent by the base station and has good autocorrelation characteristics;

The detecting module 52 is configured to perform synchronous detection according to the target synchronization sequence.

Specifically, the detection module in the embodiment described above with reference to FIG. 5 of the present disclosure includes:

a intercepting submodule, configured to intercept a sequence in the time domain or the frequency domain of the target synchronization sequence as a sub-synchronization sequence, the sub-synchronization sequence having good autocorrelation characteristics;

The detecting submodule is configured to perform synchronous detection according to the sub synchronization sequence.

Specifically, in the embodiment described above with reference to FIG. 5, if the target synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number,

Specifically, in the foregoing embodiment of the present disclosure described with reference to FIG. 5, the detecting module includes:

The synchronization detection submodule is configured to perform synchronization detection according to the subcarrier spacing and the sub synchronization sequence.

Specifically, in the embodiment described above with reference to FIG. 5, if the target synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an odd number and the sequence length is equal to the square of N,

The sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is a sequence of one-segment X segment of the target synchronization sequence, and the sub-synchronization sequence is a ZC sequence; wherein the sequence length of the ZC sequence is An integer multiple of X, where X is an integer greater than or equal to two.

Specifically, the detecting submodule in the embodiment described above with reference to FIG. 5 of the present disclosure includes:

a pre-processing module, configured to obtain a p-th power of the sub-synchronization sequence to obtain a sequence to be detected; p is an integer greater than or equal to 2;

In summary, in the embodiment described above with reference to FIG. 5, after receiving the target synchronization sequence, the terminal side intercepts the corresponding sub-synchronization sequence according to its own needs for synchronization detection, which not only ensures synchronization detection accuracy, but also improves target synchronization. The application range of the sequence; specifically, the target synchronization sequence is insensitive to carrier spacing and system bandwidth, and can meet the needs of users with different system bandwidths and carrier spacing.

It should be noted that, in the synchronization detecting apparatus provided by the embodiment described above with reference to FIG. 5 of the present disclosure, the synchronization detecting apparatus capable of executing the synchronization detecting method provided by the embodiment described above with reference to FIG. 2, all the implementations of the above-described synchronous detecting method The examples are applicable to the synchronous detection device and both achieve the same or similar beneficial effects.

As shown in FIG. 4, another embodiment of the present disclosure further provides another synchronization detecting apparatus, including: a processor 100; a memory 120 connected to the processor 100 through a bus interface, and a bus a transceiver 110 having an interface coupled to the processor 100; the memory for storing programs and data used by the processor when performing operations; transmitting control commands by the transceiver 110, etc.; when the processor calls and executes When the program and data stored in the memory are implemented, the following functional modules are implemented:

a sequence receiving module, configured to receive a target synchronization sequence that is sent by the base station and has good autocorrelation characteristics;

It should be noted that, in the synchronization detecting apparatus provided by the embodiment described above with reference to FIG. 4 of the present disclosure, the synchronization detecting apparatus capable of executing the synchronization detecting method provided by the embodiment described above with reference to FIG. 2, all the implementations of the above-described synchronous detecting method The examples are applicable to the synchronous detection device and both achieve the same or similar beneficial effects.

The above is a preferred embodiment of the present disclosure, and it should be noted that those skilled in the art can also make several improvements and refinements without departing from the principles of the present disclosure. It should also be considered as the scope of protection of the present disclosure.

Claims

A method for transmitting a synchronization sequence, comprising:

Setting a target synchronization sequence; wherein at least one sequence intercepted in a time domain or a frequency domain of the target synchronization sequence is a synchronization sequence;

Sending the target synchronization sequence to the terminal.
The method of claim 1 wherein said step of setting a target synchronization sequence comprises:

Obtaining a reference synchronization sequence;

The plurality of sequence points of the reference synchronization sequence are rearranged according to a preset rule to obtain a target synchronization sequence.
The method according to claim 2, wherein, if said reference synchronization sequence is a Zadoff-Chu (ZC) sequence, and the sequence length of the ZC sequence is an even number,

And the step of reordering the plurality of sequence points of the reference synchronization sequence according to the preset rule to obtain the target synchronization sequence, including:

The sequence points of the reference synchronization sequence are extracted at equal intervals, and the extracted sequence points are successively placed to obtain a target synchronization sequence.
The method according to claim 3, wherein the steps of extracting sequence points of the reference synchronization sequence and equally spacing the extracted sequence points to obtain a target synchronization sequence are respectively included at intervals:

Extracting even sequence points and odd sequence points of the reference synchronization sequence respectively;

Dividing the even sequence points into a plurality of first short sequences, and dividing the odd sequence points into a plurality of second short sequences; wherein the first short sequence includes a plurality of consecutive even sequence points, The second short sequence includes a plurality of consecutive odd sequence points;

And arranging the plurality of first short sequences and the plurality of second short sequences in a preset order to obtain a target synchronization sequence.
The method according to claim 4, wherein the step of arranging the plurality of first short sequences and the plurality of second short sequences in a predetermined order to obtain a target synchronization sequence comprises:

The first short sequence and the second short sequence are alternately placed to obtain a target synchronization sequence.
The method according to claim 4 or 5, wherein if the sequence length of the reference synchronization sequence is divided by 4 to obtain an even number, the plurality of first short sequences are ZC sequences; if the reference synchronization When the sequence length of the sequence is divided by 4 and the result is an odd number, then the plurality of second short sequences are ZC sequences.
The method according to claim 2, wherein if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an odd number, and the sequence length is equal to a square of N;

And the step of reordering the plurality of sequence points of the reference synchronization sequence according to the preset rule to obtain the target synchronization sequence, including:

Starting from the 0th sequence point of the reference synchronization sequence, extracting one target sequence point in each consecutive N sequence points;

The extracted target sequence points are successively placed at preset positions of the reference synchronization sequence to obtain a target synchronization sequence; wherein N is an integer greater than or equal to 3.
The method of claim 7, wherein the preset position is a position starting from an integral multiple of N.
The method according to claim 8, wherein if the sequence length of the ZC sequence is an integer multiple of X, the sub-synchronization sequence intercepted in the time domain of the target synchronization sequence is the X of the target synchronization sequence. A sequence of segments, and the subsynchronization sequence is a ZC sequence; wherein X is an integer greater than or equal to two.
The method according to claim 2, wherein, if said reference synchronization sequence is a ZC sequence, and said sequence length of said ZC sequence is an even number,

And the step of reordering the plurality of sequence points of the reference synchronization sequence according to the preset rule to obtain the target synchronization sequence, including:

Interlacing the even sequence points and the odd sequence points of the reference synchronization sequence respectively;

Placing an even sequence point of the reference synchronization sequence before an odd sequence point of the reference synchronization sequence to obtain a rearrangement sequence; or placing an odd sequence point of the reference synchronization sequence on an even sequence point of the reference synchronization sequence Previously, a rearrangement sequence was obtained;

The rearrangement sequence is respectively mapped to each subcarrier in the frequency domain, and after the inverse Fourier transform, a target synchronization sequence is obtained.
The method according to claim 10, wherein said sub-synchronization sequence intercepted in the frequency domain of said target synchronization sequence is a sequence of said first quarter segment of said target synchronization sequence, said target a sequence of a second quarter segment of the synchronization sequence, a sequence of a third quarter segment of the target synchronization sequence, and/or a sequence of a fourth quarter segment of the target sequence, and The sub-synchronization sequence is a ZC sequence.
A method for synchronous detection, comprising:

Receiving a target synchronization sequence sent by the base station;

Synchronous detection is performed according to the target synchronization sequence.
The method of claim 12, wherein the step of performing synchronization detection based on the target synchronization sequence comprises:

And intercepting a sequence in the time domain or the frequency domain of the target synchronization sequence as a synchronization sequence;

Synchronous detection is performed based on the intercepted synchronization sequence.
The method according to claim 13, wherein if said target synchronization sequence is a ZC sequence and said sequence length of said ZC sequence is an even number,

The synchronization sequence intercepted in the time domain or the frequency domain of the target synchronization sequence is one or more first short sequences and/or one or more second short sequences included in the target synchronization sequence; wherein The first short sequence includes a plurality of sequence points, and the second short sequence includes a plurality of sequence points.
The method of claim 14, wherein the step of performing synchronization detection based on the target synchronization sequence comprises:

Performing related processing on the target synchronization sequence by using a preset synchronization sequence;

Determining, according to the number of correlation peaks obtained by the correlation processing, a subcarrier spacing of the base station transmitting the target synchronization sequence;

Synchronous detection is performed according to the subcarrier spacing and the intercepted synchronization sequence.
The method according to claim 13, wherein if said target synchronization sequence is a ZC sequence, and said sequence length of said ZC sequence is odd and the sequence length is equal to the square of N,

The synchronization sequence intercepted in the time domain of the target synchronization sequence is a sequence of one-segment X segment of the target synchronization sequence, and the intercepted synchronization sequence is a ZC sequence; wherein the sequence length of the ZC sequence Is an integer multiple of X, and X is an integer greater than or equal to 2.
The method of claim 16, wherein the step of performing synchronization detection based on the intercepted synchronization sequence comprises:

Put the intercepted synchronization sequence to a power of p to obtain a sequence to be detected; wherein p is an integer greater than or equal to 2;

Synchronous detection is performed according to the sequence to be detected.
A transmitting device for a synchronization sequence, comprising:

a sequence setting module, configured to set a target synchronization sequence; wherein at least one sequence intercepted in a time domain or a frequency domain of the target synchronization sequence is a synchronization sequence;

And a sequence sending module, configured to send the target synchronization sequence to the terminal.
The apparatus of claim 18, wherein the sequence setting module comprises:

a reference acquisition module, configured to acquire a reference synchronization sequence;

And a rearrangement module, configured to rearrange a plurality of sequence points of the reference synchronization sequence according to a preset rule to obtain a target synchronization sequence.
The apparatus of claim 19, wherein the rearrangement module comprises:

a first rearrangement submodule, configured to: if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number, extract the sequence points of the reference synchronization sequence at equal intervals, respectively, and extract the sequence The points are successively placed to obtain the target synchronization sequence.
The apparatus of claim 20, wherein the first rearrangement sub-module comprises:

a first extracting unit, configured to respectively extract an even sequence point and an odd sequence point of the reference synchronization sequence;

a first dividing unit, configured to divide the even sequence point into a plurality of first short sequences, and divide the odd sequence points into a plurality of second short sequences; wherein the first short sequence includes multiple a continuous even sequence of points, the second short sequence comprising a plurality of consecutive odd sequence points;

And a rearrangement unit, configured to arrange the plurality of first short sequences and the plurality of second short sequences in a preset order to obtain a target synchronization sequence.
The apparatus of claim 21 wherein said rearranging unit comprises:

And rearranging the subunits for alternately placing the first short sequence and the second short sequence to obtain a target synchronization sequence.
The apparatus according to claim 21 or 22, wherein if the sequence length of the reference synchronization sequence is divided by 4, the result is even, the plurality of first short sequences are ZC sequences; if the reference synchronization When the sequence length of the sequence is divided by 4 and the result is an odd number, then the plurality of second short sequences are ZC sequences.
The apparatus of claim 19, wherein the rearrangement module comprises:

Extracting a sub-module, if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an odd number, and the sequence length is equal to the square of N, starting from the 0th sequence point of the reference synchronization sequence, Extracting one target sequence point in each consecutive N sequence points;

a second rearrangement submodule, configured to continuously place the extracted target sequence points in a preset position of the reference synchronization sequence to obtain a target synchronization sequence; wherein N is an integer greater than or equal to 3.
The apparatus according to claim 24, wherein said preset position is a position starting from an integral multiple of N.
The apparatus according to claim 25, wherein if the sequence length of said ZC sequence is an integer multiple of X, the synchronization sequence intercepted in the time domain of said target synchronization sequence is the X score of said target synchronization sequence a sequence of one segment, and the intercepted synchronization sequence is a ZC sequence; wherein X is an integer greater than or equal to 2.
The apparatus of claim 19, wherein the rearrangement module comprises:

a second intercepting sub-module, configured to: if the reference synchronization sequence is a ZC sequence, and the sequence length of the ZC sequence is an even number, intercept the even sequence point and the odd sequence point of the reference synchronization sequence respectively;

a third rearrangement submodule, configured to: place an even sequence point of the reference synchronization sequence before an odd sequence point of the reference synchronization sequence to obtain a rearrangement sequence; or place an odd sequence point of the reference synchronization sequence Before the even sequence point of the reference synchronization sequence, a rearrangement sequence is obtained;

The frequency domain mapping submodule is configured to map the rearrangement sequence to each subcarrier of the frequency domain, and obtain an object synchronization sequence after performing inverse Fourier transform.
The apparatus according to claim 27, wherein said synchronization sequence intercepted in the frequency domain of said target synchronization sequence is a sequence of said first quarter segment of said target synchronization sequence, said target synchronization a sequence of a second quarter of the sequence, a sequence of a third quarter of the target synchronization sequence, and/or a sequence of a fourth quarter of the target sequence, and The intercepted synchronization sequence is a ZC sequence.
A synchronous detecting device comprising:

a sequence receiving module, configured to receive a target synchronization sequence sent by the base station;

And a detecting module, configured to perform synchronous detection according to the target synchronization sequence.
The apparatus of claim 29, wherein the detecting module comprises:

An intercepting submodule, configured to intercept a sequence in the time domain or the frequency domain of the target synchronization sequence as a synchronization sequence;

The detecting submodule is configured to perform synchronous detection according to the intercepted synchronization sequence.
The apparatus according to claim 30, wherein, if said target synchronization sequence is a ZC sequence, and said sequence length of said ZC sequence is an even number,

The synchronization sequence intercepted in the time domain or the frequency domain of the target synchronization sequence is one or more first short sequences and/or one or more second short sequences included in the target synchronization sequence; wherein The first short sequence includes a plurality of sequence points, and the second short sequence includes a plurality of sequence points.
The apparatus of claim 31 wherein said detecting module comprises:

a correlation processing submodule, configured to perform related processing on the target synchronization sequence by using a preset synchronization sequence;

An interval determining submodule, configured to determine, according to the number of correlation peaks obtained by the correlation process, a subcarrier spacing of the base station transmitting the target synchronization sequence;

The synchronization detection submodule is configured to perform synchronization detection according to the subcarrier spacing and the intercepted synchronization sequence.
The apparatus according to claim 30, wherein if said target synchronization sequence is a ZC sequence, and said sequence length of said ZC sequence is odd and the sequence length is equal to the square of N,

The synchronization sequence intercepted in the time domain of the target synchronization sequence is a sequence of one-segment X segment of the target synchronization sequence, and the intercepted synchronization sequence is a ZC sequence; wherein the sequence length of the ZC sequence is X Integer multiple, X is an integer greater than or equal to 2.
The apparatus of claim 33, wherein the detection sub-module comprises:

a preprocessing module, configured to obtain a p-th power of the intercepted synchronization sequence to obtain a sequence to be detected; wherein p is an integer greater than or equal to 2;

And a detecting unit, configured to perform synchronous detection according to the sequence to be detected.
A synchronization sequence transmitting apparatus includes: a processor, a memory, and a transceiver, wherein:

The processor is configured to read a program in the memory and perform the following process:

Setting a target synchronization sequence; wherein at least one sequence intercepted in a time domain or a frequency domain of the target synchronization sequence is a synchronization sequence;

Transmitting the target synchronization sequence to the terminal by the transceiver,

The transceiver is for receiving and transmitting data, and the memory is capable of storing data used by the processor in performing operations.
A synchronization detecting device includes: a processor, a memory, and a transceiver, wherein:

The processor is configured to read a program in the memory and perform the following process:

Receiving, by the transceiver, a target synchronization sequence sent by the base station;

Performing synchronous detection according to the target synchronization sequence,

The transceiver is for receiving and transmitting data, and the memory is capable of storing data used by the processor in performing operations.