WO2018125219A1 - Systèmes, procédés et appareils de mise en œuvre d'apprentissage machine basé sur un noyau géométrique permettant de réduire une erreur de modèle d'opc - Google Patents

Systèmes, procédés et appareils de mise en œuvre d'apprentissage machine basé sur un noyau géométrique permettant de réduire une erreur de modèle d'opc Download PDF

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WO2018125219A1
WO2018125219A1 PCT/US2016/069522 US2016069522W WO2018125219A1 WO 2018125219 A1 WO2018125219 A1 WO 2018125219A1 US 2016069522 W US2016069522 W US 2016069522W WO 2018125219 A1 WO2018125219 A1 WO 2018125219A1
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semi
features
mask
physical
physical model
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PCT/US2016/069522
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English (en)
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Seungmin HONG
Hyungjin MA
Seongtae Jeong
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Intel Corporation
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Priority to PCT/US2016/069522 priority Critical patent/WO2018125219A1/fr
Publication of WO2018125219A1 publication Critical patent/WO2018125219A1/fr

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes

Definitions

  • HVM high volume manufacturing
  • Figure I A depicts an exemplary Artificial Neural Network (ANN) machine learning algorithm in which the input variables predict the deterministic model error or process driven changes in critical dimension in accordance with described embodiments;
  • ANN Artificial Neural Network
  • Figure IB depicts an exemplary modeling flow utilizing the Artificial Neural Network (ANN) machine learning algorithm in accordance with described embodiments.
  • ANN Artificial Neural Network
  • Figure 1C depicts an exemplary model training phase and model prediction phase 104 in accordance with described embodiments
  • Figure 2 depicts an exemplary geometric region search using an adaptive edge detection methodology in accordance with described embodiments
  • Figure 3 depicts an exemplary geometric region search using an adaptive edge detection methodology in additional detail in accordance with described embodiments
  • Figure 4 depicts a non-iterative contour shift scheme in accordance with described embodiments
  • Figure 5 depicts the relative Root-Mean-Square Error (RMSE) improvements in accordance with described embodiments.
  • RMSE Root-Mean-Square Error
  • Figure 6 is a schematic of a computer system in accordance with described embodiments.
  • Figure 7 illustrates a semiconductor device (or an interposer) that inciudes one or more described embodiments
  • Figure 8 illustrates a computing device in accordance with one implementation of the invention.
  • Figure 9 is a flow diagram illustrating a method for implementing geometric kernel based machine learning for reducing Optical Proximity Correction (OPC) model error in accordance with described embodiments.
  • OPC Optical Proximity Correction
  • Optical Proximity Correction OPC
  • OPC Optical Proximity Correction
  • Rule-based compensation has been attempted previously in an effort to reflect layout geometry into a mask design, however, a rule-based compensation is inherently inaccurate as it attempts to condense complex geometric layout information into discrete algebraic bins. Rule-based model error compensation is therefore only feasible for a very limited set of geometries, and it is therefore not appropriate to generate the requisite rules for all possible configurations in the circuit pattern.
  • rule-based compensation further requires the development of exceedingly complex rules to account for the multitude of possible geometric configurations in a circuit layout which in turn introduces unacceptably long development delays into the lithography and OPC development cycle due to the amount of human resources required to develop such rules.
  • Use of rule based model error compensation unnecessarily introduces undesirable complexity into the tapeout flow, translating to the increased costs and resource expenditure in terms of the engineering resources necessary to characterize, specify, code, and validate such rules as well as the computational resources which are then required to then calculate the models.
  • resist patterns generated by lithographic processes are the results of complicated optical, chemical and physical phenomenon, which can be modeled based on optical image parameters and geometric parameters but are not well suited to a rule-based compensation scheme due to the sheer volume of possible minute deviations.
  • Machine learning algorithms are employed to model complicated lithographic and post-lithographic processes such as Post Exposure Bake (PEB), post-1 it ho development, and post lithographic etch processes and then render predictions for such operations.
  • PEB Post Exposure Bake
  • post-1 it ho development
  • post lithographic etch processes render predictions for such operations.
  • Model predictions which are represented in the form of contours, are generated based on image maps, which are numerically stable and efficient enough to be used for high volume manufacturing.
  • machine learning algorithms such as Artificial Neural Network (ANN) algorithms are employed in accordance with certain embodiments.
  • Engineered features are also used to improve the convergence of model training as well as to improve the interpretabiiity and out-of-sampie performance of models by minimizing the number of fitting parameters required, thus permitting such modeling and predictive techniques to be utilized in the context of high volume manufacturing (HVM) environment.
  • HVM high volume manufacturing
  • OPC Optical Proximity Correction
  • the existing modeling software for OPC is deficient in terms of accuracy for new lithographic systems and next generation fabrication post lithographic processes which require significantly tighter margins and dimensions.
  • Conventional modeling software for OPC therefore results in unworkable errors inhibiting the newer technologies from being successfully scaled to high volume manufacturing.
  • Conventional OPC models simply cannot predict with sufficient accuracy and precision to the smaller feature size and feature geometries associated new technologies.
  • the conventional OPC models need further adjustment and correction and improved contour correction or shifting means so as to move these printed features into the correct position with a greater degree of precision. Such improvements ensure functionally operable silicon and thus improve manufacturing yields and profitability for any given product.
  • embodiments further include various operations which are described below.
  • the operations described in accordance with such embodiments may be performed by hardware components or may be embodied in machine-executable instructions, which may be used to cause a general-purpose or special-purpose processor programmed with the instructions to perform the operations.
  • the operations may be performed by a combination of hardware and software.
  • any of the disclosed embodiments may be used alone or together with one another in any combination. Although various embodiments may have been partially motivated by deficiencies with conventional techniques and approaches, some of which are described or alluded to within the specification, the embodiments need not necessarily address or solve any of these deficiencies, but rather, may address only some of the deficiencies, address none of the deficiencies, or be directed toward different deficiencies and problems which are not directly discussed.
  • implementations of embodiments of the invention may be formed or carried out on a substrate, such as a semiconductor substrate.
  • the semiconductor substrate may be a crystalline substrate formed using a bulk silicon or a silicon-on-insulator substructure.
  • the semiconductor substrate may be formed using alternate materials, which may or may not be combined with silicon, that include but are not limited to germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, indium gallium arsenide, gallium antimonide, or other combinations of group 1II-V or group IV materials.
  • germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, indium gallium arsenide, gallium antimonide, or other combinations of group 1II-V or group IV materials Although a few examples of materials from which the substrate may be formed are described here, any material that may serve as a foundation upon which a semiconductor device may be built
  • a plurality of transistors such as metal-oxide-semiconductor field-effect transistors (MOSFET or simply MOS transistors), may be fabricated on the substrate.
  • MOSFET metal-oxide-semiconductor field-effect transistors
  • the MOS transistors may be planar transistors, nonplanar transistors, or a combination of both.
  • Nonplanar transistors include FinFET transistors such as double-gate transistors and tri-gate transistors, and wrap-around or all-around gate transistors such as nanoribbon and nanowire transistors.
  • Each MOS transistor includes a gate stack formed of at least two layers, a gate dielectric layer and a gate electrode layer.
  • the gate dielectric layer may include one layer or a stack of layers.
  • the one or more layers may include silicon oxide, silicon dioxide (SiO:) and/or a high-k dielectric material.
  • the high-k dielectric material may include elements such as hafnium, silicon, oxygen, titanium, tantalum, lanthanum, aluminum, zirconium, barium, strontium, yttrium, lead, scandium, niobium, and zinc.
  • high-k materials that may be used in the gate dielectric layer include, but are not limited to, hafnium oxide, hafnium silicon oxide, lanthanum oxide, lanthanum aluminum oxide, zirconium oxide, zirconium silicon oxide, tantalum oxide, titanium oxide, barium strontium titanium oxide, barium titanium oxide, strontium titanium oxide, yttrium oxide, aluminum oxide, lead scandium tantalum oxide, and lead zinc niobate.
  • an annealing process may be carried out on the gate dielectric layer to improve its quality when a high-k material is used.
  • the gate electrode layer is formed on the gate dielectric layer and may consist of at least one P-type workfunction metal or N-type workfunction metal, depending on whether the transistor is to be a PMOS or an NMOS transistor.
  • the gate electrode layer may consist of a stack of two or more metal layers, where one or more metal layers are workfunction metal layers and at least one metal layer is a fill metal layer.
  • metals that may be used for the gate electrode include, but are not limited to. ruthenium, palladium, platinum, cobalt, nickel, and conductive metal oxides, e.g., ruthenium oxide.
  • a P-type metal layer will enable the formation of a PMOS gate electrode with a workfunction that is between about 4.9 eV and about 5.2 eV.
  • metals that may be used for the gate electrode include, but are not limited to, hafnium, zirconium, titanium, tantalum, aluminum, alloys of these metals, and carbides of these metals such as hafnium carbide, zirconium carbide, titanium carbide, tantalum carbide, and aluminum carbide.
  • An N-type metal layer will enable the formation of an NMOS gate electrode with a workfunction that is between about 3.9 eV and about 4.2 eV.
  • the gate electrode may consist of a "U s, -shaped siiucture that includes a bottom portion substantially parallel to the surface of the substrate and two sidewall portions that are substantially perpendicular to the top surface of the substrate.
  • at least one of the metal layers that form the gate electrode may simply be a planar layer that is substantially parallel to the top surface of the substrate and does not include sidewall portions substantially perpendicular to the top surface of the substrate.
  • the gate electrode may consist of a combination of U-shaped structures and planar, non-U-shaped structures.
  • the gate electrode may consist of one or more U-shaped metal layers formed atop one or more planar, non-U-shaped layers.
  • a pair of sidewall spacers may be formed on opposing sides of the gate stack that bracket the gate stack.
  • the sidewall spacers may be formed from a material such as silicon nitride, silicon oxide, silicon carbide, silicon nitride doped with carbon, and silicon oxynitride. Processes for forming sidewall spacers are well known in the art and generally include deposition and etching process steps. In an alternate implementation, a plurality of spacer pairs may be used, for instance, two pairs, three pairs, or four pairs of sidewall spacers may be formed on opposing sides of the gate stack.
  • source and drain regions are formed within the substrate adjacent to the gate siack of each MOS transistor.
  • the source and drain regions are generally formed using either an implantation/diffusion process or an etching/deposition process, in the former process, dopants such as boron, aluminum, antimony, phosphorous, or arsenic may be ion-implanted into the substrate to form the source and drain regions.
  • An annealing process that activates the dopants and causes them to diffuse further into the substrate typically follows the ion implantation process. In the latter process, the substrate may first be etched to form recesses at the locations of the source and drain regions.
  • An epitaxial deposition process may then be carried out to fill the recesses with material that is used to fabricate the source and drain regions.
  • the source and drain regions may be fabricated using a silicon alloy such as silicon germanium or silicon carbide.
  • the epitaxial ly deposited silicon alloy may be doped in situ with dopants such as boron, arsenic, or
  • the source and drain regions may be formed using one or more alternate semiconductor materials such as germanium or a group 111-V material or alloy. And in further embodiments, one or more layers of metal and/or metal alloys may be used to form the source and drain regions.
  • ILD interlayer dielectrics
  • the ILD layers may be formed using dielectric materials known for their applicability in integrated circuit structures, such as low-k dielectric materials. Examples of dielectric materials that may be used include, but are not limited to, silicon dioxide (SiO..), carbon doped oxide (CDO), silicon nitride, organic polymers such as perfluorocyclobutane or
  • ILD layers may include pores or air gaps to further reduce their dielectric constant.
  • Figure 1 A depicts an exemplary Artificial Neural Network (ANN) machine learning algorithm in which the input variables predict the deterministic model error or process driven changes in critical dimension in accordance with described embodiments.
  • ANN Artificial Neural Network
  • an initial OPC contour 120 represented by the bold line and outermost ellipse and then a second contour is further depicted via the inner ellipse showing the Scanning Electron Microscope (SEM) contour 125 representing fabrication data as taken from an SEM image.
  • SEM Scanning Electron Microscope
  • a neural network 105 having as input several input image parameters 1 10 which are calculated using an OPC model and the resulting output from the neural network is a contour shift prediction 1 15.
  • the image input parameters 110 used to train the neural network 105 are simulated optical parameters representing the entirety of the feature set for use as the input image parameters 110.
  • Neural networks such as Artificial Neural Network (ANN) are able to approximate any arbitrary formula.
  • the neural network 105 is trained to describe the relationship between the layout and the respective OPC model error, using the image input parameters 1 10 to enable the neural network 105 to learn about the layout.
  • a sufficient quantity of image input parameters 1 10 are provided so as to enable such learning.
  • a simulated optical image from conventional OPC models is obtained from the convolution of the layout and an optical transfer function.
  • image parameters are defined via optical images that capture information about the layout which is then used to train the neural network 105 to describe the deterministic relationship between the layout and conventional OPC model error.
  • an Artificial Neural Network is a computational approach which is based on a large collection of neural units loosely modeling the way a biological brain solves problems with large clusters of biological neurons connected by axons. Each neural unit is connected with many others, and links can be enforcing or inhibitory in their effect on the activation state of connected neural units.
  • Such systems are self-learning and trained rather than explicitly programmed and they excel in areas where the solution or feature detection is difficult to express in a traditional computer program.
  • geometric information from the layout is additionally utilized to directly train the neural network to predict the amount of model error associated with the geometry.
  • the neural network 105 provides a more accurate model which can then be implemented by shifting the initial OPC contour 120 by an amount predicted by neural network 105.
  • the OPC model provides a forward function which connects what is on the mask to what is on the wafer.
  • Software algorithms provide a basic physics solution to this problem, but the solution requires many approximations which thus operates as a source of inaccuracies. Described embodiments therefore reformulate the problem in such a way that a list of features is provided to the neural network for the purposes of training.
  • the neural network learns what adaptations are necessary to conform the base OPC models to known physical models.
  • These adaptations are output as the contour shift predictions 1 15 and result in a semi- physical model which permits formulas and corrections by which the trained neural network 105 describes the differences between the incoming base OPC model and the observed physical realities.
  • the neural network 105 predicts the deterministic model error or process driven changes in critical dimensions for the si/.e and position of features.
  • the neural network provides contour titling to the SEM contour 125 image representing the actually observed physical outputs from a fabrication process utilizing the base OPC model which provides the initial OPC contour 120.
  • the initial OPC contour 120 is a result of the software algorithms which provides a prediction of the physical space via a semi-physical model. According to such an embodiment, SEM image data is then collected for the patterns to generate or determine the SEM contour 125 representing the fab data for actual physical samples of fabricated physical silicon wafers generated using the initial OPC base model.
  • the delta between the initial OPC contour 120 and the SEM contour 125 is the determined model error of the base OPC model.
  • the neural network 105 is trained to be able to predict the determined model error of the base OPC model so as to output an improved model using the contour shift prediction 115 provided by the trained neural network 105.
  • Figure IB depicts an exemplary modeling flow 101 utilizing the Artificial Neural Network (ANN) machine learning algorithm in accordance with described embodiments.
  • ANN Artificial Neural Network
  • block 106 means for sampling data collection tor model building. Processing then proceeds to block 107 where a base OPC model (e.g., an initial contour such as the initial OPC contour depicted by element 120 at Figure I A) is provided. According to certain embodiments, the processing then advances to block 1 12 where a correction engine for mask design applies the contour as rendered by the base OPC model.
  • a base OPC model e.g., an initial contour such as the initial OPC contour depicted by element 120 at Figure I A
  • a correction engine for mask design applies the contour as rendered by the base OPC model.
  • described embodiments provide further correction and improvement over the base OPC model via the contour shifting 109 as predicted by the trained neural network.
  • the processing instead advances into the newly introduced elements of the modeling flow 101 depicted by the dashed line in which processing from block 107 advances next to block 108 where a model error and lithographic process characterization is applied.
  • contour shifting 109 is applied utilizing the contour shift as predicted by the trained neural network.
  • processing then advances to block 1 1 1 where the final model or the final contour is provided as a result of the contour shifting 109 applied using the contour shift as predicted by the neural network.
  • ft is at block 108 where a model error and lithographic process characterization is applied that embodiments described herein utilize simplified geometric features in conjunction with machine learning to build an empirical prediction model for lithography and post lithography processes, including post-lithographic Negative Tone Development (NTD) of the wafer.
  • NTD post-lithographic Negative Tone Development
  • processing then returns to block 1 12 where the correction engine for the mask design applies the appropriate correction as benefitted from the contour shifting 109 operation.
  • the contour shift is applied to the final model 1 1 1 to result in the final contour at which point the final contour is then applied to the mask design via the correction engine 112.
  • the trained neural network output providing the contour shift prediction results in a third contour, one between the initial OPC contour 120 and the SEM contour 125 (see Figure 1A), which is a predicted contour as output by applying the contour shift prediction 115 of the trained neural network as a correction for the base OK' model, thus yielding an improved contour fit between the improved prediction and reality.
  • the contour shifting 109 operation produces the final model's final contour at block 1 1 1 from the input base OPC model's initial contour at block 107, and it is this final contour which is then utilized by the correction engine for the mask design at block 1 12.
  • the combination of the semi-physical model and the output of the trained neural network would exactly equal the physical data which equates the observed measurements from the SEM imagery data.
  • significant improvement is attained as described below, but the predicted final contour 11 1 is not exactly identical, but it is sufficiently accurate for the smaller feature size dimensions and positions utilized by the newer technologies, and thus, appropriate for scaling up silicon wafer production in high volume manufacturing.
  • Figure 1C depicts an exemplary model training phase 103 and model prediction phase 104 in accordance with described embodiments.
  • the model training phase 103 begins with an initial mask 165 from which a semi-physical model is obtained, for instance, by capturing light intensity data from an imager, laser, or other light source shone through the photolithographic mask 165.
  • a two-dimensional (2D) image map 175 is then rendered or obtained from the semi-physical model (e.g., using a forward transfer function) thus providing initial contours 180 for a plurality of features, structures, and geometries which are represented by the initial mask 165.
  • processing also proceeds forward to block 185 where algorithm I is applied, thus yielding input 190 for the machine learning process, in which the input 190 includes intensity data as well as geometric parameters extracted from the 2D image map produced at block 175.
  • the flow proceeds to block 195 where the machine learning process 195 is applied utilizing machine learning methods applied by a neural network to produce as output data offsets between the semi-physical model (initial) contours determined at block 180 and the contours from actual silicon wafer
  • measurement data for instance, as captured from Scanning Electron Microscope (SEM) image data.
  • SEM Scanning Electron Microscope
  • an offset prediction model outputs offsets, or contour adjustments, or performs contour shifting, as necessary, any of which may then lie utilized for Optical Proximity Correction (OPC) modeling to ensure the adjusted contours of the semi-physical model match the actually observed contours taken from the SEM imagery for an exemplary wafer, thus ending the model training phase 103.
  • OPC Optical Proximity Correction
  • offsets or contour adjustments may now be produced for new and never before seen photolithographic masks, which may thus be processed through Optical Proximity Correction (OPC) modeling to render significantly improved correlation or matching between the contours rendered by a semi-physical model for the new photolithographic mask and the reality observed (e.g., via SEM imagery) for any silicon wafer produced using the new lithographic mask, whether at a photolithographic stage, or a post-litho stage such as etch, Post Exposure Bake (PEB), Negative Tone Development (NTD) processes, and so forth.
  • OPC Optical Proximity Correction
  • the model prediction phase 104 depicts at block 155 an initial mask 155, which may be a new and never before seen photolithographic mask, is utilized to develop a semi-physical model 150 of the mask, from which a two-dimensional (2D) image map 145 is rendered. Processing then advances to block 140 where an initial contour is produced for the initial mask 155.
  • an initial mask 155 which may be a new and never before seen photolithographic mask
  • processing next proceeds to the offset prediction model at block 135 which renders or outputs the offset prediction 130 based on the previously trained neural network which creates the offset prediction 130 as output using the newly provided initial mask 155.
  • processing then proceeds to algorithm 2 or 3 at block 186 which accepts as its inputs both the initial contour 140 from the semi-physical model (produced via the 2D image map 145) and also the offset prediction 130 from the trained neural network.
  • the new prediction contour 181 is then output which may then be applied via Optical Proximity Correction (OPC) modeling such that wafers may be fabricated using the new initial mask 155.
  • OPC Optical Proximity Correction
  • the models 170 and 150 described herein provide output which predicts the critical dimensions of the features, geometries, and other structures which will be printed upon a wafer after lithography and etching and other patterning processes. Consequently, it is very important that the models are as precise as possible so as to best represent what the fabricated wafer will ultimately become. Errors in the model translate to potentially systematic errors within the fabricated wafer and impede high volume manufacturing, impede efficient production, and slow the time from development to release of a new product as the errors in the model must be resolved so as to attain a correctly fabricated product.
  • a semi-physical model which describes the optics of, for instance, a lithographic mask, upon which various machine learning techniques are them applied to describe the inaccuracies of the previous semi-physical model versus what is actually observed within fabricated wafers, based on, for instance, SEM images of such wafers (refer to block 195).
  • parameters calculated based on a baseline semi-physical model 170 are utilized as input into the neural networks for the purposes of training the model.
  • the baseline semi-physical optical models are able to predict an optical image of the radical and therefore, that output of the baseline semi-physical optical may be received as an input into a process which renders a 2D image map 175 which may then be utilized as input into the neural networks for training the models or for learning algorithms.
  • the machine learning neural networks will "learn” or otherwise identify how lo describe the inaccuracies between the 2D optical images 175 provided as input into the neural network and actual physical measurements from SEM images, thus producing an Edge Placement Error (EPE) shift prediction, offset, contour shifts, or other contour adjustment which may then be utilized to attain the final adjusted contours corresponding to the SEM contour representing actual fab data as predicted by the models, regardless of whether those predictions are for a previously known photolithographic mask or a never before seen photolithographic mask.
  • EPE Edge Placement Error
  • Contour adjustments to the semi-physical model are necessary because the predictions by a model do not exactly match the end result of a fabricated silicon wafer having physically undergone a lithography process or post lithographic process. Such contour adjustments therefore help to better align the predictions of the models with the end result of the corresponding physical processes which result in the fabricated wafer.
  • the neural networks can then be utilized in pursuit of the objective to reduce the inaccuracy between the predictions of the semi -physical model and the actual measurement data captured from the SEM images.
  • the model is utilized to predict die result of lithographic patterning tor any given physical lithographic mask.
  • EPE represents the discrepancy, delta, or measured inaccuracy between the predictions for any given feature or geometry as provided by the semi-physical model versus the reality of those same corresponding features and geometries within a wafer, as captured by an SEM image.
  • simulated optical images are therefore created using a semi-physical model and converted into 2D optical images, which are then provided as input to this neural network.
  • Measurements of actual EPE data is then additionally provided as input into the neural network from which the code of the neural network then develops the necessary transformations starting from the simulated images (based on the photolithographic physical mask) to the actual physical measurements taken from the SEM images.
  • model training phase 103 which utilizes the semi-physical model 170 by taking a photolithographic mask as its input and providing as an output a prediction of what the physical reality should be and a second system implementing the model prediction phase 104 which accepts as its input the predictions from the semi-physical model along with the physical measurements from the actual electron microscope imagery and provides as its output an offset or contour adjustment necessary to bring the actual physically fabricated wafer into alignment with the predictions by the model.
  • such an offset may be considered an etch placement error shift which accounts for the various features and geometries of the model and renders the necessary contour adjustments so as to permit the models to more accurately predict what will result from the physical photolithographic Spin, Exposure, Develop, (SED) and post SED processes.
  • SED Exposure, Develop,
  • an initial baseline model contour is provided by a baseline semi-physical model, from which contour offsets and adjustments are yielded by the algorithms described herein. Measurements obtained from SEM imagery is then utilized to capture critical dimensions for multiple features which are then provided as input to the machine learning neural net work which outputs an offset prediction model 160 capable of calculating contour adjustments and offsets for other new and never before seen initial masks 155 based on previously learned algorithmic correlations between the initial mask 165 and Si-wafer measurement data (element 190) utilized to train the neural network.
  • Figure 2 depicts an exemplary geometric region search using an adaptive edge detection methodology 200 in accordance with described embodiments.
  • Described herein is a new approach utilizing a geometric region search with adaptive edge detection capable of identifying smoothly defined geometric features in the space and therefore does not suffer from the discreteness of rule-based compensation which tends to undermine the accuracy of prior approaches seeking to reduce variability.
  • Application of the geometric region search noi only reduces variability but provides far greater accuracy and reduces second order effect.
  • Application of geometric region search process additionally reduces the turn-around time for developing the OPC flow by eliminating the need to deal with complex geometries and corner cases.
  • the geometric region search through adaptive edge detection methodology 200 identifies features and geometries by quantifying surrounding geometric features and extracting an effective size of the immediate geometric region and therefore its effective geometric boundary 205 near any given point.
  • the geometric region search described herein seeks to represent the most crucial geomeiric information in perspective of the lithographic process. For instance, while geometric features beyond first-level proximity may have a role in lithographic processes, such features are generally known to be of secondary effect in almost all cases and therefore are not the focus of the geometric region search. Rather, the focus is to provide a fast and a reliable computation scheme that extracts the immediate geometric region and its effective geometric boundary 205 from a given 2D image rendered or output by the semi-physical model.
  • the processing seeks to retrieve geometric information for each interest point or Region Of Interest (1101), via which the processing may extract relevant geometric information representing the various features and geometries without loss of accuracy.
  • the ROI point which may start anywhere within the 2D image intensity map is utilized as a known starting position from which a ray may then be shot to identify another boundary of another feature, from which the intensity of the point of interest may then be matched against the intensity map to identify precisely where that boundary lies within the 2D image intensity map.
  • the ray 230 dmax is shot from ROI point shown at the upper feature of the 2D image map (b) at element 207 and the ray eventually hits the boundary of the feature shown at the lower left, with the specific angle and distance revealing the precise location of that point.
  • By looking in many different directions from that particular starting ROl point, it is thus possible to determine exactly what may be seen in each direction at each varying angle from that point, thus revealing the effective geometric boundary 205 as shown by the 2D image map (a) at element 206.
  • This approach may reveal, for instance, points PI and P2 noted above, from which the half angle between two points may be bisected thus revealing P3, which is another point along the contour at the feature of interest.
  • Processing via the described algorithm I then permits walking along that boundary to reveal additional finer points and to better complete the precise location of the boundary at any particular feature, thus filling in the points with a greater density as depicted by the 2D image map (d) at element 209.
  • the 2D image map (e) at element 21 1 depicts shooting the ray again at different angles in search of non-observed points or potential blind spots with the added contextual knowledge of the boundary points filled in by walking the boundary in prior processing operations, thus revealing still further detail about the geometries and features within the 2D image map.
  • This processing helps to fill the gap between what is represented by a photolithographic mask utilized to pattern a silicon wafer and what the actual result will be after the physical patterning of the wafer with the photolithographic mask as well as the changes induced into the silicon wafer via post-lithographic processes, each of which slightly affect and thus modify the precise size and locations of the features and geometries fabricated into the silicon wafer.
  • the trained machine learning model By training the machine learning model to adjust for the changes in contours through practice of the described embodiments and algorithms, it is then possible for the trained machine learning model to output a new radical or new corrected photolithographic mask which precisely match the design specifications desired for the silicon wafer, but once a silicon wafer is exposed to the new corrected photolithographic mask via a lithography process to pattern the silicone, the new corrected photolithographic mask will yield precisely the design intended for that silicon wafer, thus having exactly or nearly exact i : 1 corresponding features and geometries to the original non-corrected photolithographic mask.
  • processing begins with definition of relevant geometric region from a given Region Of Interest (ROI) point within a maximum distance d m * ⁇ by an initial coarse search via a ray-shooting detection process from the ROI, followed by an attempt to find a bisectional angle search, P3 at element 220 between existing two points, PI and P2 at elements 215 and 225 respectively.
  • ROI Region Of Interest
  • Processing then continues with locally connected contour edge detection, in both clockwise and counterclockwise direction (e.g., in the brighter and then darker directions), followed by additional ray-shooting search operations from a new and different ROI point for blind spots or unsearched spot detection, then followed by iterative repetition of locally connected contour edge detection in both directions to ensure sufficiently dense sampling and finally outputting the geometric region and therefore the effective geometric boundary 205 detection results plotted as distance vs. ray-search angles on the graph which is depicted at Figure 3 below.
  • the methodology seeks to identify an effective geometric size via two primary operations. First, an initial sparse sampling of detectable region is performed through ray-shooting. Secondly, a subsequent adaptive search is performed with supplementary blind region detection as illustrated via the geometric region search through adaptive edge detection methodology 200 of Figure 2.
  • blind spot points are filled in along the contours of the features which are un-viewable by the ray 230 dmax.
  • a final refinement operation is performed as shown via the 2D image map (f) of element 212 to complete the contours of the various features.
  • FIG. 3 depicts an exemplary geometric region search using an adaptive edge detection methodology 300 in additional detail in accordance with described embodiments.
  • the graph at Figure 3 depicts the ray angle 310 in degrees on the horizontal axis and shows search distance in nanometers (nm) 315 on the vertical axis with dma* 320 depicted at the top left.
  • the points correspond to the distances and angles of the ray shooting and also represent the various operations detailed above, in which a first operation 331 performs step 1 which is an initial course search identifying the solid black circles on the chart and
  • step 2 finds the middle points on a contour of an identified feature corresponding to the 2D image map (c) at element 208 from Figure 2 and represented by the white circles with the cross.
  • step 3 detects the visible edge as represented by the solid black squares and corresponding to the 2D image map (d) at element 209 from Figure 2.
  • processing performs step 4 to fill in the blind spots as represented by the white squares and corresponding to the 2D image map (e) at element 211 from Figure 2 and lastly operation 335 performs step 5 for final refinement of the contours of the identified features as represented by the white star shapes on the graph and corresponding to the 2D image map (f) at element 212 from Figure 2.
  • the geometric boundary detection and effective size computation operations as represented by Figures 2 and 3 are performed utilizing the following algorithms.
  • Algorithm 1 provides for a geometric boundary detection and effective size computation, in which the input includes the 2D intensity maps (e.g., the image maps depicted at Figure 2) where map 'map, represents a region of interest at point P(x,y), with a max search distance d « «, and a search angle range of the 2D intensity maps (e.g., the image maps depicted at Figure 2) where map 'map, represents a region of interest at point P(x,y), with a max search distance d « «, and a search angle range of
  • me reference intensity I, e t is extracted at a given point P(x,y) and the corresponding norma] gradient direction is obtained.
  • Adaptive edge detection (see step 3 at element 333 from Figure 3) is next performed pursuant to the following sub-operations, beginning with operation (i), where, for each point or if the local ray-incident angle is close to 90 degrees, then pass, otherwise processing will proceed to operation (ii) where processing will compute a local in- plane curvature where Next, for operation (iii)
  • processing finds a new intensity crossing near a candidate point Q along the line that connect ROl (Region Of Interest where the ray originates) to 0, such that
  • processing performs blind spot detection (see step 4 at element 334 from Figure 3) where the sorted data set (refer to adaptive edge detection operation above) is next examined checking for angular differences or radial distances and determining where the angular difference or radial distance is sufficiently small, within a threshold amount. When the condition is not satisfied because the angular difference or radial distance is too large, then additional ray- shooting operations are performed searching for any region in-between.
  • step 5 at element 335 from Figure 3 final refinement operations are performed (see step 5 at element 335 from Figure 3) by repeating the adaptive edge detection operations (see step 3 at element 333 from Figure 3) to ensure radial or angular difference is sufficiently fine within the threshold amount configured.
  • the data set is sorted by ray-angle and the prior operations are then repeated in the opposite direction namely, in the darker direction.
  • the output of the above processing pursuant to algorithm 1 is a set of ray distances, and corresponding angles, along two major directions, representing
  • Figure 4 depicts a non-iterative contour shift scheme 400 in accordance with described embodiments.
  • contour (a) at element 405 depicts the final contour 410 being obtained by way of a local shift of the baseline model contour 415.
  • Contour (b) at element 440 depicts an iterative contour shifting scheme where location X' is found iteratively 420 from an initial guess 425, and contour (c) at element 445 depicts a non-iterative contour shifting scheme where processing finds X 1 along the normal line 435 within a specified range.
  • the iterative contour shifting processes (b) at element 440 of Figure 4 depicts the iterative processing where the process repeats until it converges to a baseline model contour 415 at location X' of contour (a) at element 405, where the amount of shift is locally updated at each generation or process iteration in search of increasingly fine and therefore smaller and more granular points on the identified contour.
  • non-iterative processing seeks to identify a baseline location along a local normal line 435 (e.g.. to find X' along the normal line as depicted at contour (c) of element 445) within a specified lange in which the inputs for contour shift equation are acquired from the baseline location, thus pennitting non-iterative processing as described in greater detail below.
  • iterative contour shifting scheme (algorithm 2) and processing begins with iis inputs being the 2D image map an initial image rendering for location x at the contour (b) of element 440 and a shift equation l* , where an initial guess 425 and iteration is made and where location X ' is found iteratively 420, with the initial guess 425 and iteration being: are inputs obtained from the location X tract, where * denotes the shift location.
  • the exit condition denotes: where if any of the Boolean conditions fail, then the iteration is terminated, thus setting X , otherwise setting where none of the Boolean conditions fail.
  • the non-iterative contour shifting scheme (algorithm 3) and processing begins with its inputs being the 2D image map an initial image rendering for location x at the contour (c) of element 445 where and shift equation i! . Processing then proceeds to search a baseline location, such that for a given point x , processing will compute a normal direction ⁇ to try and find a baseline contour location Processing then computes the shift amount by acquiring parameters at x' and computing shift If a crossing is not detected in
  • image map shifting and contouring is performed where the intensity at location x is overwritten with the intensity ⁇ and the threshold formula is then applied to the new image map to get the final contours, thus outputting the shifted image map and final contour as depicted by the darker line at contour (c) of element 445.
  • the non-iterative scheme exhibits particularly strong advantages compared to previously known methodologies. For instance- where iterative processing includes a risk of convergence failure which could lead instability in output model contour, the non-iterative scheme accurately determines whether or not its baseline contour is within a specific proximity. Stated differently, the non-iterative scheme is inherently free from convergence failure.
  • the non-iterative processing scheme is therefore especially efficient when combined with use of the geometric region search using an adaptive edge detection methodology
  • either or both iterative processing and non-iterative schemes may be utilized in conjunction with the geometric region search using an adaptive edge detection processing in accordance with the embodiments described herein.
  • Figure 5 depicts the relative Root-Mean-Square Error (RMSE) improvements 500 in accordance with described embodiments.
  • RMSE Root-Mean-Square Error
  • the bar chart shows significant improvement to the adjusted contour 515 for each of the RMSE_ AI1 520, RMSE_Width 525, and also RMSE_Height 530 through the practice of the embodiments as disclosed herein. Specifically, the adjusted contour 515 surpasses both the improved contour 510 attainable via certain previously known
  • Critical Dimension (CD) variability post etch is reduced by 42% when compared to a rule-based solution resulting in drastic improvement to RMSE.
  • Critical Dimension (CD) variability at the DCCD stage is reduced by 38% for in sample and 42% for out of sample when compared to previously known improved contour 510 solutions.
  • Overall fit is improved by 40% for the adjusted contour 515 attainable through practice of the disclosed embodiments when compared with the improved contour 510 attainable via previously blown solutions and drastically improved over the baseline model contour 505.
  • FIG. 6 is a schematic of a computer system 600 in accordance with described embodiments.
  • the computer system 600 (also referred to as the electronic system 600) as depicted can embody means for implementing geometric kernel based machine learning for reducing Optical Proximity Correction (OPC) model error, according to any of the several disclosed embodiments and their equivalents as set forth in this disclosure.
  • the computer system 600 may be a mobile device such as a net-book computer.
  • the computer system 600 may be a mobile device such as a wireless smartphone or tablet.
  • the computer system 600 may be a desktop computer.
  • the computer system 600 may be a hand-held reader.
  • the computer system 600 may be a server system.
  • the computer system 600 may be a supercomputer or high- performance computing system.
  • the electronic system 600 is a computer system that includes a system bus 620 to electrically couple the various components of the electronic system 600.
  • the system bus 620 is a single bus or any combination of busses according to various embodiments.
  • Tht electronic system 600 includes a voltage source 630 that provides power to the integrated circuit 610. In some embodiments, the voltage source 630 supplies current to the integrated circuit 610 through the system bus 620.
  • Such an integrated circuit 610 is electrically coupled to the system bus 620 and includes any circuit, or combination of circuits according to an embodiment.
  • the integrated circuit 610 includes a processor 612 that can be of any type.
  • the processor 612 may mean any type of circuit such as, but not limited to, a microprocessor, a microcontroller, a graphics processor, a digital signal processor, or another processor.
  • the processor 612 includes, or is coupled with, electrical devices having gradient encapsulate protection, as disclosed herein.
  • SRAM embodiments are found in memory caches of the processor.
  • Other types of circuits that can be included in the integrated circuit 610 are a custom circuit or an application-specific integrated circuit (ASIC), such as a
  • the integrated circuit 610 includes on-die memory 616 such as static random-access memory (SRAM).
  • the integrated circuit 610 includes embedded on-die memory 616 such as embedded dynamic random-access memory (eDRAM).
  • the integrated circuit 610 is complemented with a subsequent integrated circuit 61 1.
  • Useful embodiments include a dual processor 613 and a dual communications circuit 615 and dual on-die memory 617 such as SRAM.
  • the dual integrated circuit 610 includes embedded on-die memory 617 such as eDRAM.
  • the electronic system 600 also includes an external memory 640 that in turn may include one or more memory elements suitable to the particular application, such as a main memory 642 in the form of RAM, one or more hard drives 644, and/or one or more drives that handle removable media 646, such as diskettes, compact disks (CDs), digital variable disks (DVDs), flash memory drives, and other removable media known in the art.
  • the external memory 640 may also be embedded memory 648 such as the first die in a die stack, according to an embodiment.
  • the electronic system 600 also includes a display device 650 and an audio output 660.
  • the electronic system 600 includes an input device 670 such as a controller that may be a keyboard, mouse, trackball, game controller, microphone, voice-recognition device, or any other input device that inputs information into the electronic system 600.
  • an input device 670 is a camera.
  • an input device 670 is a digital sound recorder.
  • an input device 670 is a camera and a digital sound recorder.
  • the integrated circuit 610 can be implemented in a number of different embodiments, including means for implementing geometric kernel based machine learning for reducing Optical Proximity Correction (OPC) model error, according to any of the several disclosed embodiments and their equivalents, an electronic system, a computer system, one or more methods of fabricating an integrated circuit, and one or more methods of fabricating an electronic assembly that includes means for implementing geometric kernel based machine learning for reducing Optical Proximity Correction (OPC) model error, according to any of the several disclosed embodiments as set forth herein in the various embodiments and their art- recognized equivalents.
  • OPC Optical Proximity Correction
  • the elements, materials, geometries, dimensions, and sequence of operations can all be varied to suit particular I/O coupling requirements including array contact count, array contact configuration for a microelectronic die embedded in a processor mounting substrate according to any of the several disclosed package substrates and means for
  • a foundation substrate 698 may be included, as represented by the dashed line of Figure 6.
  • Passive devices 699 may also be included, as is also depicted in Figure 6.
  • FIG. 7 illustrates a semiconductor device 700 (or an interposer) that includes one or more described embodiments.
  • the interposer 700 is an intervening substrate used to bridge a first substrate 702 to a second substrate 704.
  • the first substrate 702 maybe, for instance, an integrated circuit die.
  • the second substrate 704 may be. for instance, a memory module, a computer motherboard, or another integrated circuit die.
  • the purpose of an interposer 700 is to spread a connection to a wider pitch or to reroute a connection to a different connection.
  • an interposer 700 may couple an integrated circuit die to a ball grid array (BGA) 706 that can subsequently be coupled to the second substrate 704.
  • BGA ball grid array
  • first and second substrates 702/704 are attached to opposing sides of the interposer 700. In other embodiments, the first and second substrates 702/704 are attached to the same side of the interposer 700. And in further embodiments, three or more substrates are interconnected by way of the interposer 700.
  • the interposer 700 may be formed of an epoxy resin, a fiberglass-reinforced epoxy resin, a ceramic material, or a polymer material such as polyimide. In further
  • the interposer may be formed of alternate rigid or flexible materials that may include the same materials described above for use in a semiconductor substrate, such as silicon, germanium, and other group ill-V and group I V materials.
  • the interposer may include metal interconnects 70S and vias 710, including but not limited to through-silicon vias (TSVs) 712.
  • the interposer 700 may further include embedded devices 714, including both passive and active devices.
  • Such devices include, but are not limited to, capacitors, decoupling capacitors, resistors, inductors, fuses, diodes, transformers, sensors, and electrostatic discharge (ESD) devices.
  • More complex devices such as radio- frequency (RF) devices, power amplifiers, power management devices, antennas, arrays, sensors, and ME: MS devices may also be formed on the interpose.- 700. in accordance with described embodiments, apparatuses or processes disclosed herein may be used in the fabrication of interposer 700.
  • Figure 8 illustrates a computing device 800 in accordance with one
  • the computing device 800 houses a board 802.
  • the board 802 may include a number of components, including but not limited to a processor 804 and at least one communication chip 806.
  • the processor 804 is physically and electrically coupled to the board 802. in some implementations, the at least one communication chip 806 is also physically and electrically coupled to the board 802. !n further implementations, the communication chip 806 is pari of the processor 804.
  • computing device 800 may include other components that may or may not be physically and electrically coupled to the board 802. These other components include, but are not limited to, volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, a graphics processor, a digital signal processor, a crypto processor, a chipset, an antenna, a display, a touchscreen display, a touchscreen controller, a battery, an audio codec, a video codec, a power amplifier, a global positioning system (GPS) device, a compass, an accelerometer, a gyroscope, a speaker, a camera, and a mass storage device (such as hard disk drive, compact disk (CD), digital versatile disk (DVD), and so forth).
  • volatile memory e.g., DRAM
  • non-volatile memory e.g., ROM
  • flash memory e.g., a graphics processor, a digital signal processor, a crypto processor, a chipset, an antenna, a
  • the communication chip 806 enables wireless communications for the transfer of data to and from the computing device 800.
  • wireless and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a non-solid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not.
  • the communication chip 806 may implement any of a number of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.1 I family), WiMAX (IEEE 802.16 family), IEEE 802.20, long-term evolution (LTE), Ev- DO, HSPA+, HSDPA* HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond.
  • the computing device 800 may include a plurality of communication chips 806. For instance, a first communication chip 806 may be dedicated to shorter range wireless
  • 13 ⁇ 4e processor 804 of the computing device 800 includes an integrated circuit die packaged within the processor 804.
  • the integrated circuit die of the processor includes one or more devices, such as MOS-FHT transistors built in accordance with implementations of the invention.
  • the term "processor ' may refer to any device or portion of a device that processes electronic data from registers and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory.
  • the communication chip 806 also includes an integrated circuit die packaged within the communication chip 806.
  • the integrated circuit die of the communication chip includes one or more devices, such as MOS- FET transistors buiii in accordance with implementations of the invention.
  • another component housed within the computing device 800 may contain an integrated circuit die that includes one or more devices, such as MOS-FET transistors built in accordance with implementations of the invention.
  • the computing device 800 may be a laptop, a netbook, a notebook, an ultrabook, a smartphone. a tablet, a personal digital assistant (PDA), an ultra mobile PC, a mobile phone, a desktop computer, a server, a printer, a scanner, a monitor, a set-top box, an entertainment control unit, a digital camera, a portable music player, or a digital video recorder.
  • the computing device 800 may be any other electronic device that processes data.
  • FIG. 9 is a flow diagram illustrating a method 900 for implementing geometric kernel based machine learning tor reducing Optical Proximity Correction (OPC) model error in accordance with described embodiments.
  • OPC Optical Proximity Correction
  • the method 900 for reducing Optical Proximity Correction (OPC) model error begins by performing the following operations.
  • the method includes creating a mask via a lithography process.
  • the method includes fabricating a physical silicon wafer using the mask, the physical silicon wafer having a plurality of features embodied therein as defined by the mask.
  • the method includes capturing Scanning Electron Microscope (SEM) images of the plurality of features embodied within the physical silicon wafer.
  • SEM Scanning Electron Microscope
  • the method includes creating a semi-physical model of the mask using physical parameters of the lithography process used to create the mask, the semi 'physical model specifying contours of the plurality of features of the mask.
  • the method includes extracting geometric boundaries of the features of the mask from the semi-physical model.
  • the method includes quantifying the geometric boundaries extracted from the semi-physical model.
  • the method includes adjusting the contours of the plurality of features of the mask as specified by the semi-physical model based on the quantified geometric boundaries extracted from the semi-physical model.
  • a method for reducing Optical Proximity Correction (OPC) model error by: creating a mask via a lithography process; fabricating a physical silicon wafer using the mask, the physical silicon wafer having a plurality of features embodied therein as defined by the mask; capturing Scanning Electron Microscope (SEM) images of the plurality of features embodied within the physical silicon wafer; creating a semi- physical model of the mask using physical parameters of the lithography process used to create the mask, the semi-physical model specifying contours of the plurality of features of the mask; extracting geometric boundaries of the features of the mask from the semi-physical model;
  • OPC Optical Proximity Correction
  • the method further includes, training a neural network by inputting the quantified geometric boundaries extracted from the semi- physical model; in which the trained neural network is to describe a relationship between the captured SEM images of the plurality of features embodied within the physical silicon wafer and the contours of the plurality of features of the mask as specified by the semi-physical model.
  • (he trained neural network to describe a relationship between the captured SEM images of the plurality of features embodied within the physical silicon wafer and the contours of the plurality of features of the mask as specified by the semi-physical model includes: outputting from the trained neural network offsets from the contours of the plurality of features of the mask as specified by the semi-physical model ; in which the offsets when applied to the contours of the plurality of features as specified by the semi-physical model via Optical Proximity Correction (OPC) define final contours for the plurality of features as specified by the semi-physical with reduced model error between the final contours for the plurality of features as specified by the semi-physical and the corresponding contours of the plurality of features embodied within the physical silicon wafer.
  • OPC Optical Proximity Correction
  • the trained neural network to describe a relationship between the captured SEM images of the plurality of features embodied within the physical silicon wafer and the contours of the plurality of features of the mask as specified by the semi-physical model includes: outputting adjusted contours from the trained neural network; in which the adjusted contours when applied to the semi-physical model via Optical Proximity Correction (OPC) reduce model error between non-adjusted contours of the plurality of features as specified by the semi-physical and the corresponding contours of the plurality of features embodied within the physical silicon wafer.
  • OPC Optical Proximity Correction
  • quantifying the geometric boundaries extracted from the semi-physical model includes outputting numbers representing the geometric boundaries as a computed area surrounding the geometric boundaries or numbers representing an effective geometric boundary as extracted from the semi-physical model.
  • the method further includes * , inputting the quantified geometric boundaries into a machine learning neural network with measurements taken from the captured SEM images corresponding to critical dimensions of the features embodied within the physical silicon wafer and setting as a target for the machine learning neural network an offset from the contour of the plurality of features of the mask as specified by the semi-physical model to contours corresponding to the critical dimensions of the features embodied within the physical silicon wafer; and outputting the offsets from the machine learning neural network.
  • extracting geometric boundaries of the features of the mask from the semi-physical model includes: rendering a 2D image map as an output from the semi-physical model having therein a plurality of intensity values representing the contours of the plurality of the features of the mask as specified by the semi-physical model; and applying a geometric region search using an adaptive edge detection process to the 2D image map identifying the geometric boundaries at the contours of the plurality of the features of the mask as specified by the semi-physical model.
  • the method further includes:
  • generating a 2D image map as an output from the semi-physical model by extracting a reference intensity at each of a plurality of points within the semi-physical model and converting the extracted reference intensities to a 2D image map to reveal geometric contours of the plurality of features of the mask as specified by the semi-physical model.
  • quantifying the geometric boundaries extracted from the semi-physical model includes outputting a set of ray distances and corresponding angles representing a plurality of points along the geometric boundaries corresponding to the contours of the plurality of features of the mask as specified by the semi-physical model.
  • extracting the geometric boundaries of the features of the mask from the semi-physical model includes: generating a 2D image map as an output from the semi-physical model; identifying a Region of Interest (ROI) as a starting point; and performing an initial coarse search by shooting a ray from the ROI to a plurality of points which intersect with any of the contours of the plurality of features of the mask as specified by the semi-physical model, in which each of the plurality of points are represented by a ray distance and a corresponding ray angle.
  • ROI Region of Interest
  • extracting the geometric boundaries of the features of the semi-physical model includes further includes: identifying a half angle between two of the plurality of points and bisecting the half angle to identify a new middle point not identified via the ray shooting in between two of the plurality of points identified via the ray shooting, in which the new middle point and the two of the plurality of points all represent one of the geometric boundaries corresponding to one of the contours of the plurality of features of the mask as specified by the semi-physical model.
  • extracting the geometric boundaries of the features of the semi-physical model includes further includes: identifying an intensity reference point from the 2D image map as candidate point Q within a threshold distance of one of the plurality of points previously identified via the ray shooting and which falls along a line connecting the ROI point with the candidate point Q and adding the candidate point Q to a set including ihe plurality of points representing one of the geometric boundaries corresponding to one of the contours of the plurality of features of the mask as specified by the semi-physical model.
  • extracting the geometric boundaries of the features of the semi-physical model includes further includes: repeating the identifying intensity reference points from the 2D image map as candidate points Q until no additional points are identified within the threshold distance of a neighboring point selected from among one of the plurality of points previously identified via the ray shooting or a previously identified candidate point Q added to the set of points representing one of the geometric boundaries corresponding to one of the contours of the plurality of features of the mask as specified by the semi-physical model.
  • extracting the geometric boundaries of the features of the semi-physical model includes further includes: traversing a boundary in a first direction from one of the plurality of points identified via the ray shooting which intersect with any of the contours of the plurality of features of the mask as specified by the semi-physical model in which traversing the boundary in the first direction reveals additional finer points along one of the contours of the plurality of features of the mask to more densely complete a precise location of the geometric boundary for a particular feature corresponding to the contour upon which the one of the plurality of points identified via the ray shooting resides.
  • extracting the geometric boundaries of the features of the semi-physical model includes further includes: traversing the boundary in a second direction from the same one of the plurality of points identified via the ray shooting; in which the first direction corresponds to a brighter direction within the 2D image map; and in which the second direction corresponds to a darker direction within the 2D image map.
  • extracting the geometric boundaries of the features of the semi-physical model includes further includes: repeating the ray shooting from the previously identified ROI along previously unused ray angles to identify additional previously undetected spots or blind spots or both.
  • extracting the geometric boundaries of the features of the semi-physical model includes further includes: relocating the previously identified R.O. from the starting point to a new position within the 2D map; and repeating the ray shooting from the new position within the 2D map to identify previously undetected points and/or blind spot points representing one or more of the geometric boundaries corresponding to any of the contours of the plurality of features of the mask as specified by the semi-physical model.
  • extracting the geometric boundaries of the features of the semi-physical model includes further includes: performing a final refinement process for detecting the geometric boundaries corresponding to any of the contours of the plurality of features of the mask as specified by the semi-physical model by traversing a boundary in a first direction from one of the previously undetected points and/or blind spot points identified via the ray shooting from the new position within the 2D image map; in which traversing the boundary in the first direction reveals additional finer points along one of the contours of the plurality of features of the mask to more densely complete a precise location of the geometric boundary for a particular feature corresponding to the contour upon which the one of the plurality of points identified via the ray shooting resides; and traversing the boundary in a second direction from one of the previously undetected points and/or blind spot points identified via the ray shooting from the new position within the 2D image map.
  • the method further includes: training a neural network to describe a relationship between the captured SEM images of the plurality of features embodied within the physical silicon wafer and the contours of the plurality of features of the mask as specified by the semi-physical model.
  • creating the semi- physical model of the mask using physical parameters of the lithography process used to create the mask includes: capturing optical intensity values from a light source shone through a photolithographic mask, in which the semi-physicaJ model specifies the optical intensity values representing the plurality of features of the mask as captured from the light source when shone through the photolithographic mask; and generating two-dimensional (2D) simulated images from the semi-physical model of the mask including the optical intensity values representing the plurality of features of the mask.
  • the method further includes: training a neural network by inputting the quantified geometric boundaries extracted from the semi- physical model; identifying deltas between contours of the plurality of features embodied within the physical silicon wafer as captured by the SEM images and the quantified geometric boundaries corresponding to the plurality of features of the mask as specified by the semi- physical model; and fitting the deltas between the semi-physical model and measurements taken from the physical silicon wafer as captured by the SEM images; and outputting offsets for use with Optical Proximity Correction (OPC) based on the fitting of the deltas.
  • OPC Optical Proximity Correction
  • the method further includes: creating a new semi-physical model of a new mask using physical parameters of the lithography process used to create the new mask, the new semi-physical model specifying optical intensity values representing a new plurality of features of the new mask; outputting contour adjustment predictions from the trained neural network defining offsets to contours of the new plurality of features of the new mask as specified by the new semi-physical model; and applying the offsets to the new semi-physical model via Optical Proximity Correction (OPC) to reduce OPC model error of the new semi-physical model.
  • OPC Optical Proximity Correction
  • the method further includes: training a neural network by inputting the quantified geometric boundaries extracted from the semi- physical model; in which the neural network generates an equation function to represent a delta by which to shift the contours of the plurality of features of the mask as specified by the semi- physical model based on differences between the quantified geometric boundaries and the plurality of features embodied within the physical silicon wafer as captured by the SEM images; in which the neural network generates a new model of the mask specifying the contours of the plurality of features of the mask shifted by the delta at each of a plurality of points of the shifted contour according to the equation function generated by the neural network; and using the new model generated by the trained neural network to predict new mask features based on a predicted contour shift generated by the trained neural network to contours of the new mask features as determined by the semi-physical model.
  • a system to reduce Optical Proximity Correction (OPC) model error in which the system includes: a mask created via a lithography process; a physical silicon wafer having been fabricated using the mask, the physical silicon wafer having a plurality of features embodied therein as defined by the mask; storage to capture Scanning Electron Microscope (SEM ) images of the plurality of features embodied within the physical silicon wafer; a semi-physical model of the mask created using physical parameters of the lithography process used to create the mask, the semi-physical model specifying contours of the plurality of features of the mask; an analysis unit to extract geometric boundaries of the features of the mask from the semi-physical model; the analysis unit to quantify the geometric boundaries extracted from the semi-physical model; and the analysts unit to adjust the contours of the plurality of features of the mask as specified by the semi-physical model based on the quantified geometric boundaries extracted from the semi-physical model.
  • OPC Optical Proximity Correction
  • such a system further includes: a neural network trained by inputting the quantified geometric boundaries extracted from the semi- physical model; in which the trained neural network is to describe a relationship between the captured SEM images of the plurality of features embodied within the physical silicon wafer and the contours of the plurality of features of the mask as specified by the semi-physical model.
  • the trained neural network to describe a relationship between the captured SEM images of the plurality of features embodied within the physical silicon wafer and the contours of the plurality of features of the mask as specified by the semi-physical model includes: the trained neural network to output offsets from the contours of the plurality of features of the mask as specified by the semi-physical model; in which the offsets when applied to the contours of the plurality of features as specified by the semi-physical model via Optical Proximity Correction (OPC) define final contours for the plurality of features as specified by the semi-physical with reduced model error between the final contours for the plurality of features as specified by the semi-physical and the corresponding contours of the plurality of features embodied within the physical silicon wafer.
  • OPC Optical Proximity Correction
  • a non-transitory computer readable storage media having instructions stored thereupon that, when executed by a processor, the instructions cause the processor to perform operations for reducing Optical Proximity Correction (OPC) model error, in which operations include: creating a mask via a lithography process; fabricating a physical silicon wafer using the mask, the physical silicon wafer having a plurality of features embodied therein as defined by the mask; capturing Scanning Electron Microscope (SEM) images of the plurality of features embodied within the physical silicon wafer : creating a semi-physical model of the mask using physical parameters of the lithography process used to create the mask, the semi-physical model specifying contours of the plurality of features of the mask; extracting geometric boundaries of the features of the mask from the semi- physical model; quantifying the geometric boundaries extracted from the semi-physical model; and adjusting the contours of the plurality of features of the mask as specified by the semi- physical model based on the quantified geometric boundaries
  • OPC Optical Proximity Correction
  • the non-transitory computer readable media includes further instructions which cause the processor to perform operations which further include: training a neural network by inputting the quantified geometric boundaries extracted from the semi-physical model; in which the trained neural network is to describe a relationship between the captured SF.M images of the plurality of features embodied within the physical silicon wafer and the contours of the plurality of features of the mask as specified by the semi- physical model.
  • the trained neural network to describe a relationship between the captured SEM images of the plurality of features embodied within the physical silicon wafer and the contours of the plurality of features of the mask as specified by the semi-physical model includes: outputting from the trained neural network offsets from the contours of the plurality of features of the mask as specified by the semi-physical model; in which the offsets when applied to the contours of the plurality of features as specified by the semi-physical model via Optical Proximity Correction (OPC) define final contours for the plurality of features as specified by the semi-physical with reduced model error between the final contours for the plurality of features as specified by the semi-physical and the corresponding contours of the plurality of features embodied within the physical silicon wafer.
  • OPC Optical Proximity Correction

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Abstract

L'invention, selon certains modes de réalisation, concerne des procédés, des systèmes et des appareils de mise en œuvre d'un apprentissage machine basé sur un noyau géométrique permettant de réduire une erreur de modèle de correction de proximité optique (OPC). Par exemple, selon un mode de réalisation, il existe des moyens pour réduire une erreur de modèle de correction de proximité optique (OPC), consistant à : créer un masque par le biais d'un traitement de lithographie; fabriquer une tranche de silicium physique à l'aide du masque, la tranche de silicium physique comportant une pluralité de caractéristiques incorporées en son sein définies par le masque; capturer des images de microscope électronique à balayage (MEB) de la pluralité de caractéristiques incorporées dans la tranche de silicium physique; créer un modèle semi-physique du masque à l'aide de paramètres physiques du traitement de lithographie intervenant pour créer le masque, le modèle semi-physique spécifiant des contours de la pluralité de caractéristiques du masque; extraire des limites géométriques des caractéristiques du masque du modèle semi-physique; quantifier les limites géométriques extraites du modèle semi-physique; et ajuster les contours de la pluralité de caractéristiques du masque spécifiées par le modèle semi-physique sur la base des limites géométriques quantifiées extraites du modèle semi-physique. L'invention décrit également d'autres modes de réalisation associés.
PCT/US2016/069522 2016-12-30 2016-12-30 Systèmes, procédés et appareils de mise en œuvre d'apprentissage machine basé sur un noyau géométrique permettant de réduire une erreur de modèle d'opc WO2018125219A1 (fr)

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US11379647B2 (en) * 2018-03-30 2022-07-05 Intel Corporation Multilayer optical proximity correction (OPC) model for OPC correction
WO2020043474A1 (fr) * 2018-08-31 2020-03-05 Asml Netherlands B.V. Procédé et appareil de mesure
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US11635699B2 (en) 2018-12-28 2023-04-25 Asml Netherlands B.V. Determining pattern ranking based on measurement feedback from printed substrate
CN114556228A (zh) * 2019-09-05 2022-05-27 Asml荷兰有限公司 用于基于显影后图像确定图案缺陷的方法
WO2021052918A1 (fr) * 2019-09-20 2021-03-25 Asml Netherlands B.V. Système et procédé de génération d'images prédictives pour inspection de tranche à l'aide d'un apprentissage machine
CN110765724A (zh) * 2019-10-26 2020-02-07 东方晶源微电子科技（北京）有限公司 一种掩模优化方法及电子设备
CN113759657A (zh) * 2020-06-03 2021-12-07 中芯国际集成电路制造(上海)有限公司 光学邻近校正方法
CN113759657B (zh) * 2020-06-03 2024-05-03 中芯国际集成电路制造(上海)有限公司 光学邻近校正方法
CN112749424B (zh) * 2021-01-14 2023-04-21 泉芯集成电路制造(济南)有限公司 光刻胶的轮廓三维建模方法、系统和可读存储介质
CN112749424A (zh) * 2021-01-14 2021-05-04 泉芯集成电路制造(济南)有限公司 光刻胶的轮廓三维建模方法、系统和可读存储介质
CN115598937A (zh) * 2022-12-13 2023-01-13 华芯程（杭州）科技有限公司（Cn） 一种光刻掩膜形状预测方法及装置、电子设备
CN115598937B (zh) * 2022-12-13 2023-04-07 华芯程(杭州)科技有限公司 一种光刻掩膜形状预测方法及装置、电子设备
US12038694B2 (en) 2023-03-07 2024-07-16 Asml Netherlands B.V. Determining pattern ranking based on measurement feedback from printed substrate

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