WO2018123250A1 - Δς modulator, transmitter, semiconductor integrated circuit, processing method, and computer program - Google Patents

Abstract

This ΔΣ modulator comprises: a first adder that adds a plurality of input signals that have different frequencies; a loop filter to which output from the first adder is applied; and a quantizer that quantizes output from the loop filter. The loop filter receives output from the quantizer as a feedback signal and prevents noise near the respective frequencies of the plurality of input signals.

Description

ΔΣ modulator, transmitter, semiconductor integrated circuit, processing method, and computer program

The present invention relates to a ΔΣ modulator, a transmitter, a semiconductor integrated circuit, a processing method, and a computer program.
This application claims priority based on Japanese Patent Application No. 2016-255766 filed on December 28, 2016, and incorporates all the description content described in the above Japanese application.

Patent Document 1 describes a ΔΣ modulator that can output an output signal including a plurality of signals having different frequencies.
The ΔΣ modulator adds a plurality of input ports to which a plurality of input signals having different frequencies are provided, a plurality of loop filters provided corresponding to the plurality of input ports, and outputs of the plurality of loop filters. And an adder.

JP 2014-165846 A

The ΔΣ modulator according to an embodiment includes a first adder that adds a plurality of input signals having different frequencies, a loop filter that is provided with an output of the first adder, and a quantum that quantizes the output of the loop filter. The loop filter receives the output of the quantizer as a feedback signal, and blocks noise in the vicinity of the frequency of each of the plurality of input signals.

Further, a transmitter according to an embodiment includes the above-described ΔΣ modulator and a transmission unit to which an output of the quantizer is given.

A semiconductor integrated circuit according to an embodiment is a semiconductor integrated circuit used in a ΔΣ modulator that performs ΔΣ modulation on a plurality of input signals having different frequencies, and adds a plurality of input signals having different frequencies. 1 adder, a loop filter to which the output of the first adder is given, and a quantizer for quantizing the output of the loop filter, wherein the loop filter outputs the output of the quantizer as a feedback signal And the noise near the frequency of each of the plurality of input signals is blocked.

Further, the processing method according to an embodiment is a processing method for performing ΔΣ modulation on a plurality of input signals having different frequencies, and a first addition step of adding the plurality of input signals having different frequencies, A filter step for performing a loop filter process on the output of the first addition step, and a quantization step for quantizing the output of the filter step, wherein the filter step outputs the output of the quantization step as a feedback signal And the loop filter processing is performed by a loop filter that blocks noise in the vicinity of the frequency of each of the plurality of input signals.

A computer program according to an embodiment is a computer program for causing a computer to execute processing for performing ΔΣ modulation on data representing a plurality of input signals having different frequencies, and the computer program includes a plurality of computers having different frequencies. A first addition step for outputting data obtained by adding the input signals, a filter step for performing a loop filter process on the output of the first addition step, and a quantization step for quantizing the output of the filter step; The filter step receives the output of the quantization step as feedback data, and performs the loop filter processing by a loop filter that blocks noise in the vicinity of each frequency of the plurality of input signals. Do.

FIG. 1 is a block diagram showing the configuration of the ΔΣ modulator according to the first embodiment. FIG. 2 is a diagram illustrating an example of the power spectrum of the output signal obtained by the simulation and obtained from the ΔΣ modulator of the first embodiment. FIG. 3 is a diagram showing another example of the power spectrum of the output signal obtained by the simulation by the ΔΣ modulator of the first embodiment. FIG. 4 is a block diagram showing a configuration of the ΔΣ modulator according to the second embodiment. FIG. 5 is a diagram illustrating an example of the power spectrum of the output signal obtained by the simulation by the ΔΣ modulator of the second embodiment. FIG. 6 is a block diagram showing a configuration of the ΔΣ modulator according to the third embodiment. FIG. 7 is a block diagram illustrating an example of a wireless communication device using a ΔΣ modulator.

[Problems to be solved by the present disclosure]
The ΔΣ modulator described in Patent Document 1 includes a plurality of loop filters corresponding to a plurality of input ports. For this reason, for example, when an input signal is not applied to one of the input ports, the function of the loop filter corresponding to the input port to which the input signal is not applied may not be exhibited, resulting in a useless configuration. Yes, I was unable to respond appropriately.

The present disclosure has been made in view of such circumstances, and an object of the present disclosure is to provide a ΔΣ modulator that can appropriately cope with a case where any one of a plurality of input signals is not given. And

[Effects of the present disclosure]
According to the present disclosure, even if any one of the plurality of input signals is not given, it is possible to appropriately cope with it.
First, embodiments will be listed and described.

[Outline of Embodiment]
(1) A ΔΣ modulator according to an embodiment includes a first adder that adds a plurality of input signals having different frequencies, a loop filter to which an output of the first adder is given, and an output of the loop filter that is quantized. The loop filter receives the output of the quantizer as a feedback signal and blocks noise in the vicinity of the frequency of each of the plurality of input signals.

According to the delta-sigma modulator configured as described above, the loop filter has a characteristic of blocking noise near the frequency of each of the plurality of input signals, and the output of the first adder obtained by adding the plurality of input signals is the loop filter. Therefore, even if any one of the plurality of input signals is not given, the other given input signals can be given to the loop filter. As a result, even if any one of the plurality of input signals is not given, it can be appropriately handled by changing the setting of the loop filter.

(2) In the ΔΣ modulator, the loop filter includes an internal filter circuit to which a difference between an output of the adder and the feedback signal is given, and the internal filter circuit includes a plurality of filters connected in series. It is preferable that it is comprised.
In this case, the order of the transfer functions of the plurality of filters can be lowered with respect to the order of the transfer function as the entire internal filter circuit.

(3) In the ΔΣ modulator, the loop filter includes an internal filter circuit to which a difference between the output of the adder and the feedback signal is given, and the internal filter circuit includes a plurality of parallel filter circuits connected in parallel. It is preferable that it is comprised by the filter of this.
Also in this case, the order of the transfer functions of the plurality of filters can be lowered with respect to the order of the transfer function as the entire internal filter circuit.
Furthermore, since the plurality of filters are connected in parallel, it is possible to prevent the influence of errors generated in each of the plurality of filters from reaching each other among the plurality of filters.

(4) In the ΔΣ modulator, it is preferable that the internal filter circuit has a pass band in the vicinity of the frequency of each of the plurality of input signals.
In this case, the characteristic of the internal filter circuit that has a pass band near the frequency of each of the plurality of input signals can be realized by the plurality of filters.

(5) In the ΔΣ modulator, the loop filter includes a second adder that outputs a result of adding the output of the first adder and the output of the internal filter circuit as the output of the loop filter. It is preferable that

(6) In the ΔΣ modulator, the loop filter may reduce a noise level in a band between adjacent noise blocking bands among noise blocking bands that block noise in the vicinity of frequencies of the plurality of input signals. It is preferable to suppress the noise level so that it is lower than the noise level in a band other than the band between the adjacent noise stop bands.
In this case, it is easy or unnecessary to remove noise in a band between adjacent noise stop bands.

(7) Moreover, the transmitter which is one Embodiment is provided with the delta-sigma modulator as described in said (1), and the transmission part to which the output of the said quantizer is given.

(8) A semiconductor integrated circuit according to an embodiment is a semiconductor integrated circuit used in a ΔΣ modulator that performs ΔΣ modulation on a plurality of input signals having different frequencies, and a plurality of input signals having different frequencies are A first adder for adding, a loop filter to which an output of the first adder is provided, and a quantizer for quantizing the output of the loop filter, wherein the loop filter outputs an output of the quantizer Is received as a feedback signal, and noise near the frequency of each of the plurality of input signals is blocked.

(9) A processing method according to an embodiment is a processing method for performing ΔΣ modulation on a plurality of input signals having different frequencies, and the first addition for adding the plurality of input signals having different frequencies. A step of performing a loop filter process on the output of the first addition step, and a quantization step of quantizing the output of the filter step, wherein the filter step is an output of the quantization step Is received as a feedback signal, and the loop filter processing is performed by a loop filter that blocks noise in the vicinity of frequencies of the plurality of input signals.

(10) A computer program according to an embodiment is a computer program for causing a computer to execute processing for performing ΔΣ modulation on data representing a plurality of input signals having different frequencies. A first addition step for outputting data obtained by adding a plurality of input signals having different values, a filter step for performing a loop filter process on the output of the first addition step, and a quantization for quantizing the output of the filter step And the filter step accepts the output of the quantization step as feedback data, and the loop filter prevents the noise in the vicinity of the frequency of each of the plurality of input signals. Filtering Do.

[Details of the embodiment]
Hereinafter, preferred embodiments will be described with reference to the drawings.
Note that at least a part of each embodiment described below may be arbitrarily combined.
[About the first embodiment]
FIG. 1 is a block diagram showing the configuration of the ΔΣ modulator according to the first embodiment. As shown in FIG. 1, the ΔΣ modulator 1 includes input ports 2a and 2b to which two input signals U ₁ and U ₂ having different frequencies are input. The ΔΣ modulator 1 outputs a single output signal V (quantized signal: ΔΣ modulation signal) including the received two input signals U ₁ and U ₂ from the output port 4.

The ΔΣ modulator 1 includes a first adder 5 that adds input signals U ₁ and U ₂ , a loop filter 6, and a quantizer 7 that outputs an output signal V.
The first adder 5 adds the input signals U ₁ and U ₂ received by the input ports 2 a and 2 b and gives the added output to the loop filter 6.

The loop filter 6 is supplied with the output of the first adder 5 and the output signal V output from the quantizer 7 as a feedback signal. The output signal V fed back to the loop filter 6 is fed back via a path 8 connecting the output terminal of the quantizer 7 and the loop filter 6. Hereinafter, the output signal V fed back to the loop filter 6 via the path 8 is also referred to as a feedback signal.

The loop filter 6 includes a differentiator 9 and a filter circuit 10.
The differencer 9 is given the output of the first adder 5 and a feedback signal. The difference unit 9 obtains a difference between the output of the first adder 5 and the feedback signal.
The difference that is the output of the differentiator 9 is given to the filter circuit 10.
The output of the filter circuit 10 is given to the second adder 11 provided at the subsequent stage of the filter circuit 10.

The filter circuit 10 includes a first filter 15, a second filter 16, and a third adder 18.
The first filter 15 and the second filter 16 are connected in parallel to the differentiator 9. Therefore, the output of the differentiator 9 is given to each of the first filter 15 and the second filter 16.
The third adder 18 adds the output of the first filter 15 and the output of the second filter 16. The output of the third adder 18 is given to the second adder 11 as the output of the filter circuit 10.

The second adder 11 adds the output of the first adder 5 and the output of the filter circuit 10 and outputs the addition result as the output of the loop filter 6.
The output of the second adder 11 is given to the quantizer 7. The quantizer 7 is a two-level quantizer and outputs a 1-bit pulse train as an output signal V. As described above, the output signal V of the quantizer 7 is given to the loop filter 6 via the path 8 as a feedback signal.
The output signal V from the quantizer 7 is output from the output port 4.

Here, the output signal V is expressed by a function in the z region as in the following formula (1).
V (z) =
U ₁ (z) + U ₂ (z) + NTF (z) E (z) (1)

In the above formula (1), V (z) is an output signal, U ₁ (z) and U ₂ (z) are input signals, NTF (z) is a noise transfer function of the filter circuit 10, and E (z) is ΔΣ modulation. This is the quantization noise of the device 1.
From the above equation (1), the output of the differentiator 9 is expressed as the following equation (2).
U ₁ (z) + U ₂ (z) −V (z) =
U ₁ (z) + U ₂ (z)
− (U ₁ (z) + U ₂ (z) + NTF (z) E (z))
= -NTF (z) E (z) (2)

From equation (2), the output of the differentiator 9 is the inverse characteristic of the noise component contained in the output signal V (z).
The filter circuit 10 of the present embodiment has a first pass band including the frequency band of the input signal U ₁ and a second pass band including the frequency band of the input signal U ₂ , and the first pass band and the second pass band are included. In a band other than the band, the filter characteristic (noise transfer function NTF (z)) for blocking the passage of signals is set.
Therefore, the filter circuit 10 outputs a signal having the inverse characteristic of the noise component in the second pass band including a first passband, and the frequency band of the input signal U ₂ comprises a frequency band of the input signal U _1, second This is given to the adder 11. The signal having the inverse characteristic is added to the output of the first adder 5 by the second adder 11. The output of the first adder 5 to which the signal having the inverse characteristic is added is quantized by the quantizer 7, and the output signal V is fed back to the filter circuit 10.

As described above, the loop filter 6 of the present embodiment repeatedly adds a signal having the inverse characteristic of the noise component in the first passband and the second passband to the output of the first adder 5, thereby generating an output signal. Noise in the first passband and the second passband in V is suppressed.
Therefore, the loop filter 6 of the present embodiment has a filter characteristic having a band that blocks noise at two locations of the first passband and the second passband.
That is, the loop filter 6 of the present embodiment has a characteristic of blocking noise near the frequencies of the input signals U ₁ and U ₂ .

Further, the ΔΣ modulator 1 includes a control unit 19 for controlling the first filter 15 and the second filter 16. The control unit 19 can store a plurality of setting parameters that determine the filter characteristics of the first filter 15 and the second filter 16. The control unit 19 has a function of controlling the filter characteristics of the first filter 15 and the second filter 16 by selectively giving a plurality of stored setting parameters to the first filter 15 and the second filter 16. ing.

The ΔΣ modulator 1 of this embodiment can also be configured by a computer including a CPU, a storage unit, and the like. In this case, the computer can realize each functional unit included in the ΔΣ modulator 1 by reading and executing a computer program or the like stored in the storage unit. When the ΔΣ modulator 1 is configured by a computer, the ΔΣ modulator 1 processes data representing each signal (input signal, output signal, etc.).

Further, the ΔΣ modulator 1 of the present embodiment can be configured by a semiconductor integrated circuit such as an FPGA (Field Programmable Gate Array). When the ΔΣ modulator 1 is configured by a semiconductor integrated circuit, the functional units such as the filter circuit 10 and the quantizer 7 included in the ΔΣ modulator 1 are configured using various semiconductor elements included in the semiconductor integrated circuit. Is done.

Further, the ΔΣ modulator 1 includes an FPGA which is a programmable integrated circuit, and a computer having a function of giving circuit configuration information related to the circuit configuration of the FPGA to the FPGA and causing the FPGA to configure the circuit according to the circuit configuration information. It can also be configured by other systems.
In this case, the storage unit of the computer stores a program for causing the computer to execute processing for providing the circuit configuration information to the FPGA, and one or a plurality of circuit configuration information.
The computer provides circuit configuration information stored in the storage unit to the FPGA. The FPGA to which the circuit configuration information is given constitutes a circuit according to the given circuit configuration information.
The storage unit of the computer stores circuit configuration information indicating a circuit configuration for configuring the ΔΣ modulator 1 in the FPGA.
The computer can cause the FPGA to configure the digital signal processing unit 2 by providing the FPGA with circuit configuration information for configuring the ΔΣ modulator 1.

As described above, the filter circuit 10 included in the ΔΣ modulator 1 of the present embodiment includes the first pass band including the frequency band of the input signal U ₁ and the second pass band including the frequency band of the input signal U _2. It is set to have a filter characteristic (noise transfer function NTF (z)).
Further, the noise transfer function NTF (z) of the filter circuit 10 is set with respect to at least the first pass band, the second pass band, and the band between the two pass bands in the output signal V.

When the transfer function of the first filter 15 constituting the filter circuit 10 is L ₁ (z) and the transfer function of the second filter 16 is L ₂ (z), the noise transfer function NTF (z) of the filter circuit 10 is used.
Is represented by the following formula (3).
NTF (z) = L ₁ (z) + L ₂ (z) (3)

The filter circuit 10 of the present embodiment is a fourth-order IIR (Infinite Impulse Response) filter.
The transfer function _{L 2} of the transfer functions _{L 1,} and the second filter 16 of the first filter 15 is set based on the noise transfer function NTF of the filter circuit 10 having the fourth-order filter (z).
Here, the first filter 15 and the second filter 16 are set as secondary IIR filters.

The transfer function _{L 2} of the transfer functions _{L 1,} and the second filter 16 of the first filter 15, as shown in the equation (3), that are added together, the noise transfer function NTF of the filter circuit 10 (z) It is set to become.

The following equation (4) is an example of a general equation of the noise transfer function NTF (z) of the filter circuit 10.

The above equation (4) represents a noise transfer function when the filter circuit 10 is configured as an n-th order IIR filter. In equation (4), A ₀ , A ₁ ,... A _n , B ₁ ,... B _n are parameters of each term constituting the denominator and the numerator, and are setting parameters that determine filter characteristics.

Since the denominator and numerator in the above formula (4) are polynomials of z, they can be expressed by, for example, a product of lower order polynomials. Therefore, the above equation (4) can be decomposed into partial fractions having lower order polynomials as denominators and numerators. That is, the expression (4) can be expressed as a sum of a plurality of lower-order polynomials.

The following formula (5) shows an example when the noise transfer function NTF (z) shown in the above formula (4) is decomposed into a plurality of polynomials.

Equation (5) shows a case where the noise transfer function NTF (z) of the nth-order filter circuit 10 is decomposed into partial fractions representing the transfer function of the second-order filter and expressed as the sum of these. In formula (5), i is an integer from 1 to I, for example, where the number of decomposed partial fractions is I. Ki is a coefficient of each decomposed partial fraction, A _{1, i} ,..., A _{n, i} , B _{1, i} ,... B _{n, i} are the terms constituting the denominator and numerator in the partial fraction. And is a setting parameter that determines the filter characteristics when the noise transfer function NTF (z) is expressed as a partial fraction.

Thus, after the noise transfer function NTF (z) of the filter circuit 10 is designed as a high-order filter, it can be decomposed into a plurality of second-order filter transfer functions.

In the present embodiment, a filter characteristic having a first pass band including the frequency band of the input signal U ₁ and a second pass band including the frequency band of the input signal U ₂ is realized by the fourth-order IIR filter. The setting parameter is obtained according to the above equation (4).

For the noise transfer function NTF (z), by optimizing a plurality of zeros and poles, each setting parameter in the above equation (4) is obtained, and the above-described filter characteristics having a plurality of pass bands are realized. be able to. For optimization of zeros and poles, see, for example, “Introduction to Takao Wabo, Akira Yasuda (original author Richard Schreier, Gabor C. Temes) ΔΣ analog / digital converter, Maruzen Co., Ltd., 2007, pages 88 to 99. The technique described in “Page” can be used.

After obtaining the setting parameter based on the above equation (4), the noise transfer function NTF (z) based on the obtained setting parameter is decomposed into two partial fractions. The decomposed two partial fractions show a transfer function representing a second-order IIR filter. Thus, setting parameters for each partial fraction obtained by decomposing the noise transfer function NTF (z) are obtained.
A setting parameter when the noise transfer function NTF (z) is expressed by being divided into partial fractions is given to the first filter 15 and the second filter 16 for each partial fraction.
The first filter 15 and the second filter 16 given the setting parameters are set to transfer functions represented by partial fractions obtained by decomposing the noise transfer function NTF (z) into partial fractions.

Note that the setting parameter when the noise transfer function NTF (z) is decomposed into partial fractions and expressed is stored in the control unit 19. The first filter 15 and the second filter 16 are set to the transfer function when a setting parameter is given from the control unit 19.

As described above, in the present embodiment, the noise transfer function NTF (z) of the filter circuit 10 that is a fourth-order IIR filter is decomposed into two transfer functions representing the second-order IIR filter, and the two transfer signals that have been decomposed. function is set as a transfer function _{L 2} of the transfer functions _{L 1,} and the second filter 16 of the first filter 15.

Therefore, the third adder 18 that adds the output of the first filter 15 and the output of the second filter 16 includes the first pass band including the frequency band of the input signal U _{1 and} the frequency band of the input signal U _2. An output of the filter circuit 10 serving as a fourth-order IIR filter having a noise transfer function NTF (z) having a second passband is supplied to the second adder 11.

In the above-described conventional delta-sigma modulator, two loop filters are provided corresponding to each of the two input ports, and the transfer function of the internal filter included in each loop filter is the input signal applied to the corresponding input port. It is individually set to have a pass band only in the vicinity of the frequency.

On the other hand, in this embodiment, the transfer function _{L 1} of the first filter 15 constituting the filter circuit 10, and the transfer function _{L 2} of the second filter 16, the noise transfer function NTF of the filter circuit 10 (z) in the partial fraction It is the transfer function obtained by decomposing. Therefore, the transfer functions of the first filter 15 and the second filter 16 are not individually set as in the case of the conventional example, and even if they are set to have the same passband as the conventional example, both The individual transfer functions of the filters 15 and 16 are not necessarily the same as in the conventional example.
That is, the first filter 15 and the second filter 16 of the present embodiment are connected in parallel to each other to form a filter (filter circuit 10) having a desired characteristic.

In addition, since the filter circuit 10 of the present embodiment is configured using a plurality of filters (the first filter 15 and the second filter 16), the characteristics of the filter circuit 10 having a plurality of pass bands are represented by the first filter 15. And the second filter 16.
Therefore, the order of the transfer functions of the first filter 15 and the second filter 16 can be lowered with respect to the order of the noise transfer function NTF (z) as the entire filter circuit 10. Thereby, even if a high-order filter is configured, the processing load of the filter circuit 10 can be suppressed.

Furthermore, since the filter circuit 10 of the present embodiment has the first filter 15 and the second filter 16 connected in parallel, for example, compared with the case where the first filter 15 and the second filter 16 are connected in series, both It is possible to prevent the influence of errors generated in the filters 15 and 16 from reaching each other between the filters 15 and 16.

FIG. 2 is a diagram illustrating an example of the power spectrum of the output signal obtained by the simulation and obtained from the ΔΣ modulator of the first embodiment. (A) in FIG. 2 is a diagram illustrating an example of the power spectrum of the output signal V from the ΔΣ modulator 1 of the first embodiment, and (b) in FIG. 2 is a diagram of (a) in FIG. It is a principal part enlarged view.
In (a) in FIG. 2 and (b) in FIG. 2, the frequency of the input signal U ₁ is 940 MHz, the frequency of the input signal U ₂ is 1025 MHz, and the first passband in the filter circuit 10 is around 940 MHz. In this example, two passbands are set in the vicinity of 1025 MHz.
In this case, the order of the filter as the filter circuit 10 is fourth order, and the order of the filter for forming both passbands as filter characteristics is set to second order.

As shown in (a) in FIG. 2 and (b) in FIG. 2, the power spectrum of the output signal V includes an input signal U ₁ having a frequency of 940 MHz and an input signal U ₂ having a frequency of 1025 MHz. Appears. In addition, bands where noise is blocked (quantization noise blocking bands) are formed at two positions near 940 MHz and 1025 MHz. Within these quantization noise stop bands, the quantization noise is sufficiently suppressed compared to other bands.

As described above, the ΔΣ modulator 1 of the present embodiment receives a plurality of input signals U ₁ and U ₂ having different frequencies and includes the input signals U ₁ and U ₂ in a single output signal V without causing interference with each other. Can be output.

Further, as shown in (a) in FIG. 2 and (b) in FIG. 2, the noise level in the band between two adjacent quantization noise blocking bands is a noise corresponding to the input signal U _1. appearing below the noise level of the higher frequency side than the noise rejection band corresponding to the noise level and the input signal U ₂ of the lower frequency side than the stop band.

This is because the loop filter 6 has two quantization noise stop bands and the noise level of the band between these two quantization noise stop bands is different from the band between the two quantization noise stop bands. This is because the noise level is suppressed to be lower than the noise level of the band.

The filter circuit 10 is set to a noise transfer function NTF (z) that can realize the above-described filter characteristics in the loop filter 6.
In the ΔΣ modulator 1 of the present embodiment, the noise transfer function NTF (z) of the filter circuit 10 that determines the quantization noise stop band is configured to set the first pass band and the second pass band. The characteristics of at least the band between the first pass band and the second pass band can be set.
That is, when setting the noise transfer function NTF (z) of the filter circuit 10, it is possible to adjust the characteristics of the band between the two quantization noise stop bands in addition to the two quantization noise stop bands. Yes.
Note that the characteristics of the band between the two quantization noise stop bands are also determined by the setting parameters described above.

For example, when two loop filters are provided corresponding to each of the two input ports as in the above-described conventional delta-sigma modulator, the filter characteristics of the internal filter included in each loop filter are set to the corresponding input ports. It is individually set so as to have a pass band only in the vicinity of the frequency of the given input signal. Therefore, it is difficult to adjust the noise level in the band between the quantization noise stop bands corresponding to the two input signals.

In contrast, in the present embodiment, as described above, the noise transfer function NTF (z) of the filter circuit 10 is set for at least the first passband, the second passband, and the band between the two passbands. Is possible. Therefore, the loop filter 6 having a filter characteristic for suppressing the noise level in the band between the two quantization noise stop bands so as to be lower than the noise level in the other band can be obtained.

As described above, the loop filter 6 of the present embodiment has a filter characteristic that suppresses the noise level in the band between the two quantization noise blocking bands so as to be lower than the noise level in the other band. The removal of noise in the band between the quantization noise stop bands adjacent to each other becomes easy or unnecessary.

Here, the noise level of the band between the two quantization noise stop bands is the other band (the band on the frequency side lower than the noise stop band corresponding to the input signal U ₁ and the noise corresponding to the input signal U _2. It is preferably 10 dB lower than the band on the frequency side higher than the stop band. When the noise level is 10 dB lower, it is possible to easily remove noise included in the band between the two quantization noise stop bands in the subsequent processing.

Furthermore, the noise level in the band between the two quantization noise stop bands is preferably 48 dB lower than the signal levels of the input signals U ₁ and U ₂ .
This is because the noise level in the band between the two quantization noise stop bands can be set to a level that does not need to be removed with respect to the signal levels of the input signals U ₁ and U ₂ .

The ΔΣ modulator 1 of the present embodiment, the loop filter 6 has the property of inhibiting a plurality of input signals U _1, U ₂ noise of each frequency near, a plurality of input signals U _1, U ₂ since providing an output of the first adder 5 adds to the loop filter 6, the input signal U _1, U as one of the input signals of the _two is not given, for the other of the input signal given loop filter 6 can be given. As a result, even if any one of the input signals is not given, for example, the setting parameters of the filters 15 and 16 constituting the loop filter 6 are changed to the setting parameters corresponding to the given input signal. And can respond appropriately.

FIG. 3 is a diagram showing another example of the power spectrum of the output signal obtained by the simulation by the ΔΣ modulator of the first embodiment. 3A is a diagram showing another example of the power spectrum of the output signal V obtained by the ΔΣ modulator 1 of the first embodiment obtained by simulation, and FIG. 3 is an enlarged view of the main part of (a) in FIG.
3A and 3B show a case where only the input signal U ₁ having a frequency of 975 MHz is supplied to the ΔΣ modulator 1.
In this case, the pass band in the filter circuit 10 is set in the vicinity of 975 MHz corresponding to the input signal U _1, and the order of the filter for forming this pass band as a filter characteristic is set to the 4th order. ing.

Note that setting parameters given to both filters 15 and 16 for setting the pass band in the filter circuit 10 to around 975 MHz are stored in the control unit 19.
The first filter 15 and the second filter 16 are set so that the passband in the filter circuit 10 has a characteristic corresponding to the input signal U ₁ when a setting parameter is given from the control unit 19.

As shown in (a) in FIG. 3 and (b) in FIG. 3, an input signal U ₁ having a frequency of 975 MHz appears in the power spectrum of the output signal V. A quantization noise stop band is formed only in the vicinity of 975 MHz.
Thus, even when only the input signal U ₁ is given, the ΔΣ modulator 1 can include the input signal U ₁ in the output signal V and output it.

Further, since the order of the filter when the pass band of the filter circuit 10 is formed as the filter characteristic is set to the fourth order, for example, the quantization noise in the loop filter 6 is compared with the case where the order of the filter is set to the second order. The bandwidth of the stop band can be made wider, and the cutoff characteristic of the quantization noise can be made steeper.

That is, if the filter characteristic of the filter circuit 10 is appropriately adjusted as in this example, both filters 15 that are targeted for the plurality of input signals U ₁ and U ₂ even when the input signal U ₂ is not given. , can be used 16 capability only on the input signal U _1, the capacity of both filters 15 and 16 can be efficiently used.

In the present embodiment, even if the input signal U ₂ is not given among the input signals U ₁ and U ₂ , the output of the first adder 5 is given to the loop filter 6, so the setting parameters of the filters 15 and 16 are set. To a setting parameter corresponding to the input signal U ₁ .

In the above, in providing only the input signal U ₁ frequency is 975MHz to ΔΣ modulator 1 shows the case of setting the characteristics corresponding to the input filter characteristic signal U ₁ of the loop filter 6 (the filter circuit 10) but, for example, if the loop filter characteristics of the filter 6 is a characteristic corresponding to the input signal U _1, U _2, which gives one of the input signals U _1, U ₂ only ΔΣ modulator 1, the loop filter 6 The filter characteristics may be used as they are.
Even in this case, the ΔΣ modulator 1 can include the input signal U ₁ in the output signal V and output it when only the input signal U ₁ is given.

When the control unit 19 stores both setting parameters corresponding to both the input signals U ₁ and U ₂ and setting parameters corresponding only to the input signal U ₁ , the control unit 19 is set in advance. A setting parameter to be given to both filters 15 and 16 may be selected based on a command, or information such as the number of input signals and frequency is acquired, and a setting parameter to be given to both filters 15 and 16 based on the acquired information. May be selected.
When the control unit 19 selects a setting parameter to be given to both the filters 15 and 16 based on the information of the input signal, the control unit 19 can change the setting parameter according to the input signal, and the filter circuit 10 has. The capabilities of both filters 15 and 16 can be appropriately allocated to the input signal.

As described above, according to the present embodiment, when both the input signals U ₁ and U ₂ are given and used, the output including the input signals U ₁ and U ₂ using both the filters 15 and 16 is used. A signal can be output.
Further, even when the input signal U ₂ of the input signals U _1, U ₂ not given, the filter characteristic of the filter circuit 10 by appropriately adjusting, more broadband by increasing the order of the filter For example, the ability of both filters 15 and 16 intended for a plurality of input signals U ₁ and U ₂ can be used only for the input signal U ₁ .
That is, when both the input signals U _1, U ₂ is used provided may be used so as to output an output signal containing the input signal U _1, U _2, the input signal U _1, U ₂ When one of the input signals is not given, the bandwidth for outputting the other input signal can be used to widen the bandwidth.

Thus, according to the present embodiment, when both the input signals U ₁ and U ₂ are provided and used, and when one of the input signals U ₁ and U ₂ is not provided. In either case, the capabilities of both filters 15 and 16 can be utilized without waste.

[About the second embodiment]
FIG. 4 is a block diagram showing a configuration of the ΔΣ modulator according to the second embodiment.
The ΔΣ modulator 1 of the present embodiment receives three input signals U ₁ , U ₂ , U ₃ having different frequencies, and a single output signal V including the received three input signals U ₁ , U ₂ , U _3. Is different from the first embodiment.

The delta-sigma modulator 1 of this embodiment is provided with three input ports 2a, 2b, 2c to which input signals U ₁ , U ₂ , U ₃ are input. The first adder 5 adds the input signals U ₁ , U ₂ , U ₃ received by the input ports 2 a, 2 b, 2 c and gives the added output to the loop filter 6.

The filter circuit 10 of the present embodiment includes a first filter 15, a second filter 16, and a third filter 17, and is constituted by three filters. Each filter 15, 16, 17 is connected in parallel to the differentiator 9.
The third adder 18 adds the output of the first filter 15, the output of the second filter 16, and the output of the third filter 17. The output of the third adder 18 is given to the second adder 11 as the output of the filter circuit 10.

The filter circuit 10 of the present embodiment, the first pass band including a frequency band of the input signal U _1, second passband including a frequency band of the input signal U _2, and the third passage containing the frequency band of the input signal U ₃ The noise transfer function NTF (z) having a band is set.
Further, the noise transfer function NTF (z) of the filter circuit 10 is set for the output signal V for at least the first passband, the second passband, the third passband, and the band between the passbands. ing.

The filter circuit 10 of this embodiment is a sixth-order IIR filter.
In the present embodiment, the noise transfer function NTF (z) of the filter circuit 10 that is a sixth-order IIR filter is decomposed into three transfer functions representing a second-order IIR filter, and the three transferred transfer functions are the first transfer function _{L 1} of 1 filter 15 is set as a transfer function _{L 3} of the transfer function _{L 2,} and the third filter 17 of the second filter 16.

Thus, the output of the first filter 15, the output of the second filter 16, and a third adder 18 for adding the output of the third filter 17, a first pass band including a frequency band of the input signal U _1, the input signal Second addition of the output as a 6th order IIR filter having a noise transfer function NTF (z) having a second passband including the frequency band of U _{2 and} a _third passband including the frequency band of the input signal U ₃ Give to vessel 11.

Note that the setting parameters given to both filters 15 and 16 for setting three passbands of the first passband, the second passband, and the third passband with respect to the characteristics of the filter circuit 10 are: Is remembered.
The first filter 15 and the second filter 16 are set so that the filter characteristic of the filter circuit 10 includes three passbands when a setting parameter is given from the control unit 19.

FIG. 5 is a diagram illustrating an example of the power spectrum of the output signal obtained by the simulation by the ΔΣ modulator of the second embodiment. (A) in FIG. 5 is a diagram showing an example of the power spectrum of the output signal V obtained by the simulation by the ΔΣ modulator 1 of the second embodiment, and (b) in FIG. 5 is in FIG. It is a principal part enlarged view of (a).
In (a) in FIG. 5 and (b) in FIG. 5, the frequency of the input signal U ₁ is 940 MHz, the frequency of the input signal U ₂ is 980 MHz, the frequency of the input signal U ₃ is 1025 MHz. In this example, the first pass band is set near 940 MHz, the second pass band is set near 980 MHz, and the third pass band is set near 1025 MHz.
In this case, the order of the filter as the filter circuit 10 is sixth, and the order of the filter for forming each pass band as a filter characteristic is set to second order.

As shown in FIG. 5A and FIG. 5B, the power spectrum of the output signal V includes an input signal U ₁ having a frequency of 940 MHz, an input signal U ₂ having a frequency of 980 MHz, and The input signal U ₃ with a frequency of 1025 MHz appears.
In the present embodiment, the band in which the quantization noise is suppressed appears as a relatively wide band including the input signals U ₁ , U ₂ , and U ₃ .

As described above, the ΔΣ modulator 1 of the present embodiment receives a plurality of input signals U ₁ , U ₂ , U ₃ having different frequencies, and inputs the input signals U ₁ , U ₂ , U ₃ as a single unit without causing interference with each other. The output signal V can be included and output.
Further, even if one or two of the input signals U ₁ , U ₂ , U ₃ are not given, the output of the first adder 5 is given to the loop filter 6. Therefore, for example, the setting parameters of the filters 15 and 16 constituting the loop filter 6 can be appropriately handled by changing the setting parameters to the setting parameters corresponding to the given input signal.

Further, the loop filter 6 of the present embodiment forms quantization noise stop bands at three locations corresponding to the input signals U ₁ , U ₂ , and U ₃ , and between the two quantization noise stop bands. The filter characteristic is to suppress the noise level of the band so as to be lower than the noise level of the other band.
Therefore, the quantization noise stop bands appear to be connected to each other, and as shown in (a) in FIG. 5 and (b) in FIG. 5, the band in which the quantization noise is suppressed is the input signal. It appears as a relatively wide band including U ₁ , U ₂ , and U ₃ .

[About the third embodiment]
FIG. 6 is a block diagram showing a configuration of the ΔΣ modulator according to the third embodiment.
The ΔΣ modulator 1 of the present embodiment is different from the first embodiment in that the first filter 15 and the second filter 16 constituting the filter circuit 10 are connected in series.

The filter circuit 10 of the present embodiment, as in the first embodiment, the NTF has a second pass band including a first passband, and the frequency band of the input signal U ₂ comprises a frequency band of the input signal U ₁ NTF (Z) is set.

As described above, the noise transfer function NTF (z) of the filter circuit 10 is a polynomial whose denominator and numerator are z, and can be expressed by a product of lower order polynomials. In other words, the above equation (4) can be expressed as a product of a plurality of lower-order polynomials.

The following formula (6) shows an example when the noise transfer function NTF (z) shown in the above formula (4) is expressed as a product of a plurality of polynomials.

Equation (6) shows a case where the noise transfer function NTF (z) of the nth-order filter circuit 10 is decomposed into partial fractions representing the transfer function of the second-order filter and expressed as a product of these. In formula (6), C ₁ , C ₂ ,... D ₁ , D ₂ ,... Are coefficients of terms that constitute the denominator and numerator in each polynomial.
As described above, the noise transfer function NTF (z) of the filter circuit 10 can be expressed as a product of transfer functions of a plurality of second-order filters after being designed as a high-order filter.

The filter circuit 10 of this embodiment is a fourth-order IIR filter.
In the present embodiment, the noise transfer function NTF (z) of the filter circuit 10 that is a fourth-order IIR filter is a product of two transfer functions representing the second-order IIR filter, and these two transfer functions are the first transfer function. It is set as a transfer function _{L 2} of the transfer functions _{L 1,} and the second filter 16 of the filter 15.

Thereby, the second filter 16 to which the output of the first filter 15 is given has noise having a first pass band including the frequency band of the input signal U ₁ and a second pass band including the frequency band of the input signal U _2. An output as a fourth-order IIR filter having a transfer function NTF (z) is supplied to the second adder 11.

Also in the delta-sigma modulator 1 of this embodiment, similarly to the first embodiment, a plurality of input signals U ₁ and U ₂ having different frequencies are received, and the input signals U ₁ and U ₂ are output as a single output without interfering with each other. The signal V can be included and output.
Even if one input signal is not given, the output of the first adder 5 is given to the loop filter 6. Therefore, for example, the setting parameters of the filters 15 and 16 constituting the loop filter 6 can be appropriately handled by changing the setting parameters to the setting parameters corresponding to the given input signal.

In addition, since the filter circuit 10 of the present embodiment is also configured by using a plurality of filters (the first filter 15 and the second filter 16), the characteristic of the filter circuit 10 having a plurality of pass bands is expressed by the first filter. 15 and the second filter 16. Therefore, the order of the transfer functions of the first filter 15 and the second filter 16 can be lowered with respect to the order of the noise transfer function NTF (z) as the entire filter circuit 10. Thereby, even if a high-order filter is configured, the processing load of the filter circuit 10 can be suppressed.

[About wireless communication devices]
FIG. 7 is a block diagram illustrating an example of a wireless communication device using a ΔΣ modulator. (A) in FIG. 7 is a block diagram illustrating an example of a wireless communication device using the above-described ΔΣ modulator 1. In FIG. 7A, the wireless communication device 20 includes a plurality of quadrature modulation units (primary modulators) 21 and 22, a ΔΣ modulator (secondary modulator) 1, a first bandpass filter 25, And a second band pass filter 26.
The plurality of quadrature modulation units 21 and 22 perform quadrature modulation as primary modulation on the baseband signals I ₁ , Q ₁ , I ₂ , and Q ₂ , respectively. The plurality of orthogonal modulation units 21 and 22 output radio signals (RF signals) U ₁ and U ₂ having different frequencies because the frequencies w ₁ and w ₂ of the local transmitters 21a and 22a are different from each other.
The plurality of radio signals U ₁ and U ₂ are input signals to the ΔΣ modulator 1.

The ΔΣ modulator 1 performs ΔΣ modulation as a secondary modulation on the plurality of radio signals (input signals) U ₁ and U ₂ and outputs a pulse signal including the plurality of radio signals U ₁ and U ₂ . The output signal of the ΔΣ modulator 1 is given to both the bandpass filters 25 and 26 via the transmission line 24.
The band pass filters 25 and 26 are provided corresponding to both the radio signals U ₁ and U ₂ . The first band pass filter 25 has a pass band that allows the radio signal U ₁ to pass therethrough. The second band pass filter 26 has a pass band that allows the radio signal U ₂ to pass therethrough.
The first band pass filter 25 removes noise outside the band of the radio signal U ₁ . Further, noise outside the band of the radio signal U ₂ is removed by the second band pass filter 26.

The radio signal U ₁ output from the first band pass filter 25 is amplified by the power amplifier 31 and output from the antenna 32.
The radio signal U ₂ output from the second band pass filter 26 is amplified by the power amplifier 33 and output from the antenna 34.

The wireless communication device 20 can operate in a dual band mode (multiband mode) that simultaneously outputs a plurality of wireless signals having different frequencies.
Further, since the output of the ΔΣ modulator 1 is a digital signal, it is possible to transmit a radio signal as a digital signal to a long distance through a high-speed transmission path 24 such as an optical fiber.
In addition, since a plurality of radio signals can be included in one digital data stream, a plurality of radio signals can be transmitted through one transmission path 24.

FIG. 7B is a block diagram illustrating another example of a wireless communication device using the ΔΣ modulator 1.
In this example, the first band-pass filter 25 is provided at the subsequent stage of the ΔΣ modulator 1, but the second band-pass filter 26 is not provided, and the example of FIG. It is different.
The first band-pass filter 25 in the wireless communication device 20 in FIG. 7B has a pass band that allows a plurality of wireless signals U ₁ and U ₂ to pass through. The first band pass filter 25 removes noise outside the band of the plurality of radio signals U ₁ and U ₂ .

For example, as shown in FIG. 2 and FIG. 6, when the noise level in the band between the plurality of radio signals U ₁ and U ₂ is sufficiently lower than the signal level of the radio signals U ₁ and U ₂ , 1 The first band-pass filter 25 can be configured to remove noise outside the bands of the plurality of radio signals U ₁ and U ₂ . This is because the noise level existing between the plurality of radio signals U ₁ and U ₂ need not be removed sufficiently low.

As described above, the loop filter 6 included in the ΔΣ modulator 1 of the present embodiment is a filter that suppresses the noise level in the band between the two quantization noise stop bands so as to be lower than the noise level in the other band. Therefore, when it is necessary to remove noise in the band between the quantization noise blocking bands including the radio signals U ₁ and U ₂ adjacent to each other, a process for removing the noise is performed. It can be simplified.

Note that the ΔΣ modulator 1 used in the wireless communication device 20 shown in (a) in FIG. 7 and (b) in FIG. 7 is one of the ΔΣ modulators 1 in the first to third embodiments described above. May be used.
The ΔΣ modulator 1 of the second embodiment can accept three input signals, but can accept two radio signals U ₁ and U ₂ . In this case, if the setting parameters of the filters 15, 16, and 17 constituting the loop filter 6 are changed to the setting parameters corresponding to the radio signals U ₁ and U ₂ , even when the radio signal U ₃ is not given, The capabilities of the filters 15, 16, and 17 can be used for the radio signals U ₁ and U _2, and the capabilities of the filters 15, 16, and 17 can be used without waste.

[Others]
The embodiment disclosed this time should be considered as illustrative in all points and not restrictive.
Further, in each of the above embodiments, the case where the filter circuit 10 is configured using two or three filters is illustrated, but the filter circuit 10 may be configured using a larger number of filters.
The scope of the present invention is defined not by the above-described meaning but by the claims, and is intended to include meanings equivalent to the claims and all modifications within the scope.

DESCRIPTION OF SYMBOLS 1 Modulator 2a, 2b, 2c Input port 4 Output port 5 1st adder 6 Loop filter 7 Quantizer 8 Path | route 9 Differentiator 10 Filter circuit 11 2nd adder 15 1st filter 16 2nd filter 17 3rd filter 18 Third adder 19 Control unit 20 Wireless communication device 21, 22 Orthogonal modulation unit 21a, 22a Local transmitter 24 Transmission path 25 First band pass filter 26 Second band pass filter 31 Power amplifier 32 Antenna 33 Power amplifier 34 Antenna

Claims (10)

1. A first adder for adding a plurality of input signals having different frequencies;
   A loop filter provided with an output of the first adder;
   A quantizer for quantizing the output of the loop filter;
   With
   The loop filter is a ΔΣ modulator that receives the output of the quantizer as a feedback signal and blocks noise in the vicinity of frequencies of the plurality of input signals.
2. The loop filter includes an internal filter circuit to which a difference between the output of the adder and the feedback signal is given,
   The ΔΣ modulator according to claim 1, wherein the internal filter circuit includes a plurality of filters connected in series.
3. The loop filter includes an internal filter circuit to which a difference between the output of the adder and the feedback signal is given,
   The ΔΣ modulator according to claim 1, wherein the internal filter circuit includes a plurality of filters connected in parallel.
4. The ΔΣ modulator according to claim 2, wherein the internal filter circuit has a pass band in the vicinity of the frequency of each of the plurality of input signals.
5. 5. The ΔΣ modulator according to claim 4, wherein the loop filter includes a second adder that outputs a result of adding the output of the first adder and the output of the internal filter circuit as an output of the loop filter. .
6. The loop filter is configured to reduce a noise level in a band between adjacent noise stop bands among noise stop bands that block noise in the vicinity of each frequency of the plurality of input signals. The ΔΣ modulator according to claim 1, wherein the ΔΣ modulator is suppressed so as to be lower than a noise level in a band other than a band between.
7. A ΔΣ modulator according to any one of claims 1 to 6,
   A transmitter provided with an output of the quantizer.
8. A semiconductor integrated circuit used in a ΔΣ modulator that performs ΔΣ modulation on a plurality of input signals having different frequencies,
   A first adder for adding a plurality of input signals having different frequencies;
   A loop filter provided with an output of the first adder;
   A quantizer for quantizing the output of the loop filter;
   With
   The loop filter accepts an output of the quantizer as a feedback signal and blocks noise in the vicinity of the frequency of each of the plurality of input signals.
9. A processing method for performing ΔΣ modulation on a plurality of input signals having different frequencies,
   A first addition step of adding a plurality of input signals having different frequencies;
   A filter step for performing a loop filter process on the output of the first addition step;
   A quantization step for quantizing the output of the filter step;
   Including
   The processing method in which the filter step receives the output of the quantization step as a feedback signal and performs the loop filter processing by a loop filter that blocks noise in the vicinity of the frequency of each of the plurality of input signals.
10. A computer program for causing a computer to execute a process for performing ΔΣ modulation on data representing a plurality of input signals having different frequencies,
    A first adding step of outputting data obtained by adding a plurality of input signals having different frequencies to a computer;
    A filter step for performing a loop filter process on the output of the first addition step;
    A quantization step for quantizing the output of the filter step;
    A computer program that executes processing including:
    The computer program that receives the output of the quantization step as feedback data and performs the loop filter processing by a loop filter that blocks noise in the vicinity of the frequency of each of the plurality of input signals.

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