WO2018122207A1

WO2018122207A1 - Device and method for creating a trusted environment in a distributed system

Info

Publication number: WO2018122207A1
Application number: PCT/EP2017/084550
Authority: WO
Inventors: Arnaud SAMAMA; Eric Dujardin
Original assignee: Thales
Priority date: 2016-12-27
Filing date: 2017-12-22
Publication date: 2018-07-05
Also published as: FR3061326A1

Abstract

The present invention relates to a device and method for establishing, in a distributed system, trusted communications between a plurality of processors that have configured a trusted environment enabling a secure mode of execution and an unsecure mode of execution for data. In particular, the device comprises means that make it possible: to receive from a source processor, a request for transmission of data, for data issued either from the secure mode of execution or from the unsecured mode of execution; to construct a frame, at least said data and the address of at least one destination processor being placed in the body of the frame, and an indication of the unsecure or secure mode of execution for said data being placed in a header field of said frame, the header field being accessible uniquely at the network-hardware level; and to send said frame over a network of the distributed system.

Description

DEVICE AND METHOD FOR CREATING A

ENVIRONMENT OF CONFIDENCE IN A DISTRIBUTED SYSTEM

Field of the invention The invention relates to the field of distributed systems and more particularly relates to a method and a device for establishing a communication of trust between several processors of a distributed system.

STATE OF THE ART Many equipments have processors which, in addition to the standard or unsecured execution mode, have a secure execution mode also known as the execution mode in a trusted environment or "Trusted Execution". Environment (TEE) "according to the consecrated Anglicism. In these devices, during the startup phase, the first code that runs, usually an operating system loader, has access to all CPU resources and is in secure mode (S). The operating system loader is in charge of resource management and allows to allow interactions between the processor resources and the different "hardware" elements such as RAM (for example, DDR-SDRAM) and interfaces. enter exit. A particular case of an input-output interface is that of the communication interfaces, which make it possible to access a communication network such as Ethernet or a serial link such as RS-232. The operating system loader is also responsible for managing access rights, and ensures that resources allocated in secure mode are only used by hardware elements or executable code with higher or equal rights. An element hardware or code executing on the processor, while it is in non-secure mode NS, has by default, access to any resource. The operating system loader can then inform certain processor resources that they can accept requests for code or hardware items running in NS mode.

Typically a device is either secure or non-secure. The communication devices are thus allocated to one or the other mode. For example, software in NS mode will communicate via Ethernet communication interface in NS mode, software in S mode will communicate via a serial link (RS-232) in S mode.

The operating system loader, in addition to the system that runs in S mode, may launch another unsecure operating system that will be limited to resources in NS mode. For example, you can load a Linux® kernel that runs in non-secure mode. The two operating systems having started respectively in S and NS mode, each start a set of software which they determine the mode, S or NS. There are then two environments or worlds called "secure world" and "unsecured world" that share the use of a processor in isolation. The allocation to the secure world S or the non-secure world NS of a hardware element can be done either at the device level or at the level of the bus for accessing the device. Thus, if a software running in NS mode attempts to access a secure device S, it usually receives a Bus Error either from the device itself or from the bus to access the device. Indeed, the hardware once configured S or NS, ensures that the unsecured world NS can not read or write a secure world information S. When two or more processors, each configured with both modes (S, NS), must be associated to form a distributed system, they typically use two separate links that reflect this isolation. Two types of communication are used, typically Ethernet for NS communications, and the serial link for S communications. Ethernet is rarely used in S mode, either because of lack of available interface, or because it requires a set of software that can weaken the security of software running in Mode S. To overcome this, a serial link is implemented, resulting in a doubling of the number of connectors and cables, which induces a lower communication speed for the S mode, and limited point-to-point, or point-to-point, but unidirectional, communications for the secure side.

It is possible to use only one type of communication, whose material control is entrusted to one of the two worlds S or NS. Typically, this is the S world that needs guaranteed communication, which by nature the NS world can not offer. All communications in the NS world must then pass through the S-world. This results in major drawbacks, such as: - the communication between the S world and the NS world is more complex, in that it increases the attack surface ;

the repeated passing of the transmission parameters through the S-NS transition is costly in execution time;

- the need for performance of the NS world is managed by the world S. It then results in a greater complexity of the world S, a code maintenance difficulty, and a decrease in overall performance compared to a system that does not have an environment of trust (TEE). Thus, there is the need for a solution that allows in a distributed system, communications between processors operating in a trusted environment, and that overcomes the disadvantages of known approaches. The present invention meets this need. Summary of the invention

To achieve this objective, an object of the present invention is to provide a device and a method for propagating secure or non-secure information through a single network link. The method of the invention is based on the use of a communication interface called "Trust Aware Adapter", which when it receives a request via a system bus associated with a source processor, determines if the request is a request issued from the secure world or the unsecured world, and builds a message containing the world information corresponding to the source request for sending to the destination. At destination, the communication interface that receives the message, identifies by reading the received frame to which execution mode belongs the source request, and solicits at the target processor level the secure or non-secure type of software that is appropriate.

Advantageously, the destination communication interface is a hardware device that operates autonomously without intervention at the software level.

The "software level" is defined for the present invention as the set of code that executes on one or more processors implementing the trusted environment. The "hardware level" is defined for the present invention as the set of physical elements for networking processors including communication interfaces, links, links and network switches. The communication interface in transmitter or receiver mode, uses to mark the message as being secure or non-secure, distributed system communication protocol fields that are not accessible at the software level but accessible only at the hardware level. Thus, in a particular implementation, the communication protocol is the RapidIO ™ protocol, and the field used to indicate the execution mode information is the virtual VC virtual field, which is only accessible at the hardware level. .

Thus, the trusted environment (TEE) is extended for a distributed system over a network, and it becomes possible to create a distributed secure environment for a set of secure worlds, without doubling connectivity for communications.

Advantageously, these secure worlds working together can then provide a higher level of service, by the overview they have on the distributed system, the topology of the network being insignificant to operate the invention. The network is shared between the two worlds, so they are not located on each node of the network, but they each form a distributed system that operates a single network. Advantageously, the invention makes it possible to limit the number of communication interfaces used, by proposing a single interface for the management of secure and non-secure execution modes. The invention also makes it possible to use communication interfaces that enable both high-performance and multi-point, bidirectional communications, both from the secure world and from the non-secure world.

Advantageously, the invention makes it possible to use the communication interfaces, such as the RapidIO peripherals, effectively by preserving the isolation of the two secure and non-secure worlds, without impact their software, thus preserving their simplicity, especially in the secure part.

The invention will find advantageous applications in the fields where TEE trusted environments are used, such as:

- security: it is a privileged application area of the TEE, which guarantees the respect of a chain of trust from a cryptographic key stored in the silicon of the processor. Secured world isolation allows you to save passwords, and host confidential algorithms. This provides encryption and signing capabilities for data protection, secure GPS access, digital rights management, access to payment systems, and more. These typically secure functions are thus made available to a standard Windows® or Android® operating system (OS) in the non-secure world.

- supervision: the secure world can observe at regular intervals the functioning of the unsecured world. This makes it possible to detect faults, attempts to intrude, to measure the level of use of software and hardware resources, etc. It also allows to suspend or restart a non-secure OS. This type of use is envisaged for example in the context of drones, systems that must guarantee vital functions in autonomy.

- real-time: the TEE can be configured to guarantee the responsiveness of the secure world, regardless of the current unsecured processing. The secure world can host a hard real-time OS, which thus shares hardware resources with a more complex non-secure OS. This type of operation is found in complex sensor-actuator networks, which join regular data acquisition and precise engine control functions, with analysis functions providing a first level of synthesis on the data acquired or the operation of the system.

The systems operating in TEE environment that can benefit from the invention are for example microprocessors of smartphones, tablets, set-top boxes, televisions, electronic cards, DSP type, FPGA, ASIC, and any system on machines. small sizes or on autonomous electronic devices (space probes, on-board computers, etc.) or computer centers. To obtain the desired results, a device and a method are proposed.

In particular, there is provided a device for establishing in a distributed system, trust communications between a plurality of processors, each processor having configured a trusted environment for a secure execution mode and a non-secure mode of execution, the device comprising means for:

receiving from a source processor a data transmission request for data originating from either the secure execution mode or the non-secure execution mode;

constructing a frame by placing at least in the body of the frame at least said data, the address of the destination processor, and placing in a header field of said frame an indication of the secure execution mode or unsecured for said data, said header field being accessible only at the hardware level; and

transmitting said frame on a network of the distributed system. Advantageously, the format of the frame corresponds to the format of the frames of the communication protocol used in the network of the distributed system.

In one implementation, the communication protocol is the RapidIO protocol, the frame format is the RapidIO format, and the data execution mode indication is placed in the Virtual Channel (VC) field of the RapidIO frames. In an alternative embodiment, the indication of the data execution mode is the zero or one bit state. According to one embodiment, the data transmission request is transmitted on a system bus of the source processor. In a variant, the system bus is a bus according to the Advanced Microcontroller Bus Architecture (AMBA) standard.

According to embodiments, the source processor is a microprocessor synthesized on a programmable logic circuit (FPGA) or a circuit-on-a-chip (SoC).

In one embodiment, the network comprises a network switch. The network may be a ring network or a mesh network or a star network. The invention also covers the claimed device further comprising means for:

to receive a frame sent on a network from a source processor

determining, according to the content of the header field, the secure or non-secure execution mode to be applied for the data contained in the frame; and

- Transmit to at least one destination processor a transfer request for processing corresponding to the secure or non-secure execution mode as determined. A communication system according to the invention comprises:

a source processor configured in a trusted environment;

a recipient processor configured in a trusted environment; a network connecting the source processor to the recipient processor;

a communication interface coupled to the source processor and comprising the claimed device; and

a communication interface coupled to the destination processor and comprising the claimed device.

The invention also covers a method for establishing in a distributed system trusted communications between a plurality of processors, each processor having configured a trusted environment for a secure execution mode and a non-secure execution mode. The method is characterized in that it comprises at least one step of transmitting on a network of the distributed system, a frame containing in the frame body data from either the secure execution mode or the non-execution mode. source processor and an address of at least one destination processor, the frame further containing in a header field, an indication of the secure or non-secure execution mode for said data, said field of header being accessible only at the hardware level.

In one embodiment, the step of transmitting a frame is performed by a communication interface coupled to a source processor and the network.

According to the embodiments, the method comprises, before the step of transmitting a frame, the steps of:

- Generate on a system bus of a source processor a data transmission request, the data being from the execution mode secure or non-secure execution mode of said source processor; and

constructing a frame by placing in the body of the frame at least said data and the address of at least one destination processor, and in said header field of the frame indicating the secure execution mode or unsecured for said data.

Advantageously, the claimed method operates for an AXI type system bus, the frame is in RapidIO format and the indication of the secure or non-secure execution mode for the data is placed in the Virtual Channel (VC) field of the frame. RapidIO.

The method may furthermore comprise, after the step of emitting a frame, the steps of:

transmitting the frame to a communication interface coupled to a destination processor of the distributed network;

determining, upon reception of the frame by said communication interface, the secure or non-secure execution mode for the data; and

transmitting to the destination processor a transfer request for processing corresponding to the secure or non-secure execution mode as determined.

Certain steps of the method of the invention may operate in the form of a computer program product that includes code instructions for performing these steps when the program is run on a computer.

Description of figures Various aspects and advantages of the invention will appear in support of the description of a preferred embodiment of the invention, but not limiting, with reference to the figures below:

FIG. 1 illustrates, in a schematic view at the software level, a known implementation of the secure and non-secure worlds in a processor element;

Figure 2 illustrates in schematic view, a hardware level implementation of the device of the invention according to one embodiment; FIG. 3 illustrates an exemplary frame according to the protocol

RapidIO;

FIG. 4 illustrates a simplified architecture of a network of distributed systems in which the device of the invention can operate according to one embodiment; Figure 5 shows a sequence of steps of the method of transmitting a packet according to an embodiment of the invention;

Figure 6 shows a sequence of steps of the method of receiving a packet according to an embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION The following description is based on examples to allow a good understanding of the principles of the invention, and a concrete application, but is in no way exhaustive and should enable the person skilled in the art to apply modifications and implementation variants keeping the same principles. Thus the present description of the invention is made to illustrate an implementation in a distributed system operating according to the RapidIO protocol but is not limiting, and can to be used according to other architectures and communication protocols for interconnecting distributed system processors.

Figure 1 shows at the software level the implementation of the non-secure (102) and secure (104) worlds on a typical processor element (100). Such a processor element (100) may be a microprocessor synthesized on a programmable logic circuit "FPGA" for example or a circuit-on-chip (SoC), which may also include a plurality of processors. In the remainder of the description, the processor element (100) for applying the principles of the invention more generally designates any autonomous data processing system or entity that can communicate with another autonomous data processing system or entity. a network of distributed systems. Furthermore, only the components allowing a good understanding of the principles of the invention are described, the other components (memories, clocks, hypervisor, etc.) of a typical processor element being known to those skilled in the art are not detailed. The processor element (100) is configured at initialization to define a trusted environment (TEE), and have software resources (102) executing in non-secure mode NS and software resources (104) executing in secure mode S. In a known manner, for the system-type platforms on a chip or "System on chip (SoC)" in English, which implement a TEE trust environment, the status S or NS of a code is accessible to processor level according to the state 0 or 1 of a specific bit (101) which according to its value indicates the secure character S or non-secure NS of the software running. In an implementation of a TEE platform, this bit is called the "unsecured bit" (or "NS bit") and is available in a secure configuration register (SCR). The unsecured (102) and secure (104) software resources are coupled to an interface input-output device (1 10) via an input-output port (106). This input-output port is structured and can be divided according to the following parts:

- A security configuration (108) for configuring the access rights of the NS software to the input-output interface. It takes into account the status bit (101) to ensure that it is handled only by the secure software;

- I / O input / output channels (107) for exchanging data between the software and the input-output interface. These channels take into account the status bit (101) to ensure consistency with the configuration of the access rights;

interrupt signals (109) enabling the input-output interface (1 10) to signal the availability of incoming data to the software. In a preferred implementation, there are two interrupt signals called 'FIQ' for 'Fast Interrupt Request' and 'IRQ' for 'Interruption Request'. The FIQ signal is dedicated to the S world because its use can be protected from the NS world, while the IRQ signal is dedicated to the NS world.

The parts, I / O channels (107) and interrupt signals (109) can be duplicated. In an implementation, each part and its replica are dedicated respectively to S or NS exchanges.

The invention relates to input-output interfaces (1 10) which are communication interfaces. Since the existing systems do not allow access to the communication interface simultaneously from the S and NS worlds in a coherent manner, this interface is then reserved for one of the two worlds, and the NS bit is transmitted to the interface in order to that it can forbid the other world to use it. The I / O channels (107) and the interrupt signals (109) therefore interact with only one of the two worlds. Advantageously, when a communication interface implements the method of the present invention, the two worlds S and NS can use it in a coherent manner. The principles illustrated in Figure 1 remain unchanged, the only differences being that: - worlds S and NS can both use the input-output channel (107);

the interrupt signals (109) can request the two worlds S and NS when incoming data is available. In a preferred implementation, the two interrupt signals IRQ and FIQ are activated at a time.

Advantageously, the method of the invention ensures that the data respectively from each world S and NS are transmitted at the recipient level, that software in the same world. The method of the invention makes it possible to use any transfer mode, such as the DMA transfer for example, while respecting the separation of the S and NS worlds. Once notified, the recipient world S or NS has access to the frame.

Figure 2 illustrates an implementation of the device of the invention. The requests to be transmitted on the network of a distributed system can be either unsecured requests called 'NS requests' from a non-secure software block (102) said 'NS initiator', or be secure requests said 'requests S' from a secure software block (104) said 'initiator S'. It should be noted that the same elements, whether hardware or software, bear the same references in the different figures. Initiators NS (102) and S (104) are coupled to a communication interface (1 10) via an interconnect bus (202) and an input / output port (106). This bus carries the transfer information while including the associated information S or NS, issued by the initiator of the transfer. In a preferred implementation, the interconnect bus is according to the AMBA® standard (Advanced Microcontroller Bus Architecture) from version 3. This bus carries read and write requests and carries the address information, data as well as a NS bit. The information S or NS is transmitted to the input-output communication interface (1 10). In known systems, the bus (202) or the interface (1 10) use this information to allow or not NS access to the interface (1 10).

The communication interface (1 10) is coupled to a network switch (204) via a network input / output (I / O) link (210). From a hardware point of view, the network switch (204) can be either located on the same hardware component as the bus (202), or on another component and connected by a cable type link.

The network switch (204) has input / output interfaces (not shown) for communication over other network links (212) to nodes in the distributed system. Frames sent through the network link (210) can traverse multiple switches before reaching a communication interface (1 10) on the destination nodes. In a particular implementation where there is no switch, it is called direct link via a single network link between two interfaces (1 10).

The general principle of the invention thus consists in providing a communication interface (1 10) accessible to the two worlds S and NS of a processor element through an interconnection bus. The interface retains the information of the world S or NS of origin, and generates on a single network link (210), a frame configured according to this information S or NS. The network is blocked at any access other than through the communications interfaces as described. In an implementation, it may be a wired network using shielded and physically locked cables. During the traversal of the network, the information of the S / NS origin world is not modified by the intermediate routing nodes of the network traversed by the frame. Advantageously, this information can also be used to guarantee the quality of service associated end-to-end. At destination, on the communication interface (1 10) of a destination node, this origin mode information is used to activate a receive signal corresponding to the S or NS software of the destination processor. The association between the network frame and the S / NS information that it carries is made in such a way that this information is made invisible to the software, in particular in NS mode. For this, the information of the S / NS origin world is not transmitted as data, which would be visible at the software level. To be invisible at the software level, the S / NS origin world information is transmitted in a frame header, which is visible only at the hardware level. In an implementation according to the RapidIO protocol, the format of the packets or frames ("frame" in English) at the physical level which are transmitted on the network is as shown in FIG. 3. Each packet has fields (40 to 44) which are only accessible to the communication interface (1 10): - AckID (40): link specific packet identifier;

- VC (41): Virtual Channel defines the use of the priority (42) and CriticaIRequest Flow (43) fields;

- TT (44): Size of the source and destination identifiers.

The packets additionally have fields (45, 46, 47) making it possible to define the identifiers of the source 'Srcld' (47) and the destination Oestld '(46) of the packet and the type of request' FType '(45) contained in the package.

Those skilled in the art will be able to refer to the numerous available literature to obtain more details on the RapidIO protocol. In this implementation, the communication interface (1 10) is configured so that the value of the NS bit corresponding to the world of origin is applied to the field VC (41) of the RapidIO packets. Thus, any transmitted packet carries in its header which is visible only at the hardware level, the value of the NS bit representative of the NS or S world from which the transmitted data originates. This value is kept throughout the transport of the packet in the network to the destination.

Upon receipt of a transmitted packet, the communication interface of the processor element that receives the packet retrieves the value contained in the VC header field to identify the NS or S status of the data, and associates the received packet to the corresponding world.

Advantageously, the use of a protocol field which is not accessible at the software level makes it possible to avoid attacks of the "VLAN DoubleTagging" type. Although a preferred implementation is that according to the RapidIO protocol, one skilled in the art can derive the same principles for any other transport protocol offering the ability to transmit the S / NS information invisibly at the software level.

Advantageously, the communication interface of the invention further comprises components (not shown) adapted to provide a high-level hardware interface, in particular allowing direct access transfers (DMA) to the memory of the processor element. , and allowing a routing entirely controlled by controller configuration tables. In addition, S and NS accesses are associated with qualities of service that are configured from the secure world. The qualities of service correspond to conventional sharing modes of the network, namely:

- by priority where the secure access has priority and the associated data are transmitted in priority; - per portion of the network rate where each access has a reserved portion, so that each TEE mode has a guaranteed rate.

In an implementation where the trusted environment is used to provide a security guarantee across a network and the physical part of that network is possibly exposed to physical attacks, appropriate protection is applied to the packet header. , such as a signature and an authentication, to guarantee the preservation of secure or non-secure access.

FIG. 4 illustrates, in a schematic view at the hardware level, an architecture of a network of distributed systems in which the device of the invention can operate according to one embodiment. For reasons of clarity and simplification of the description and without being considered as a limitation, the figure shows a single transmitting processor element (200_E), which can communicate through a single element network (400). receiving processor (200_R) via network links (212). Each processor element comprises respectively at its hardware, at least one interconnect bus (202_E, 202_R) and a communication interface (1 10_E, 1 10_R) configured according to the communication protocol. Optionally, a network switch (204_E, 204_R) may be added to access the network link.

It should be noted that the topology of the network is not imposed and that the device and method of the invention are applicable in various types of networks, such as ring networks, mesh or star networks. FIG. 5 shows a sequence of steps of the method of transmitting a packet according to the principle of the invention. The method begins when a communication request is initiated at the secure or unsecured world level in a processor element. A corresponding message is prepared (502) and transmitted on the system bus of the element processor (504). In an AMBA® implementation, the message is prepared by an AXI Master component and sent on the AXI bus.

The message is then (506) written at the communication interface. The method creates (508) the physical level of the packet to be sent. Then, in a next step (510), the method makes it possible to configure the header of the packet by positioning in the secure bit field that is reserved according to the communication protocol used, the value of the bit corresponding to the secure source or unsecured request. The thus configured packet is transmitted and transmitted (512) over the physical layer of the communication network to be routed to the destination processor. In a preferred implementation, the transmitted packet is a RapidIO frame whose VC field contains a bit value equal to 0 or 1 depending on the origin of the request.

Figure 6 shows a sequence of steps of the method of receiving a packet according to the principle of the invention. The method begins when a packet is received (602) through a communication interface via a network switch. According to the principles of the invention, the interface is configured to extract (604) the value of the bit contained in the header field of the frame that is used to indicate the required execution mode. The method then makes it possible to create (606) a message or a transfer request that is adapted to the architecture of the destination processor element. In a next step (608), the method makes it possible to determine whether the message is a message of the secure or insecure type and according to the result of transferring the request to the appropriate zone of the processor element corresponding to the secure execution mode. non-secure (610, 612).

Those skilled in the art will appreciate that variations can be made on the method that is described for a preferred implementation. Thus, the examples taken are based on an architecture TEE type AMBA®, but the principles of the invention can be applied to other architectural variants.

Moreover, even if the description refers to a packet sending method and a packet receiving method, both methods can be operated by the same communication interface as a transmitter / receiver.

In the case of broadcast or multicast transmission, the address placed in the frame designates several destination processors without this changing the process.

The method of the present invention can be implemented from hardware elements (ASIC, VLSI for example) and / or synthesis (FPGA). When the communication interface is implemented with dedicated software that is not accessible to the main processor, the method can be implemented, in whole or in part, by this dedicated software. Such a case occurs for example in the NXP solution DPAA2 / AIOP®. This method can therefore be available as a computer program product on a computer readable medium.

Claims

claims

1. A device for establishing trusted communications between a plurality of processors of a distributed system, each processor having configured a trusted environment for a secure execution mode and a non-secure execution mode for data, the device comprising means for:

receiving from a source processor a request for transmission of data to at least one destination processor for data originating from either the secure execution mode or the non-secure execution mode of the source processor;

constructing a frame by placing in the body of the frame at least said data and the address of said at least one destination processor, and placing in a header field of said frame an indication of the secure execution mode or non-secure for said data, said header field being accessible only at the hardware level; and

transmitting said frame on a network link of the distributed system.

2. The device according to claim 1 wherein the format of the frame corresponds to the format of the frames of the communication protocol used in the network of the distributed system.

3. The device according to claim 2 wherein the communication protocol is the RapidIO protocol, the format of the frame is the RapidIO format and the indication of the mode of execution of the data is placed in the Virtual Channel (VC) field of the RapidIO frames.

4. The device according to any one of claims 1 to 3 wherein the data transmission request is transmitted on a system bus of the source processor.

5. The device of claim 4 wherein the system bus is a bus according to the standard Advanced Microcontroller Bus Architecture (AMBA).

6. The device according to any one of claims 1 to 5 wherein the indication of the mode of execution of said data is the zero or one state of a bit.

7. The device according to any one of claims 1 to 6 wherein the source processor is a microprocessor synthesized on a programmable logic circuit (FPGA) or a circuit-on-chip (SoC).

8. The device according to any one of claims 1 to 7 wherein the network comprises a network switch.

9. The device according to any one of claims 1 to 8 wherein the network is a ring network or a mesh network or a star network.

The device according to any one of claims 1 to 9 further comprising means for:

receiving a frame transmitted on a network link from a source processor; determining, according to the content of the header field, the secure or non-secure execution mode for the data contained in the frame; and

1 1. A communication system comprising:

a source processor configured in a trusted environment;

a recipient processor configured in a trusted environment;

a network connecting the source processor to the recipient processor;

a communication interface coupled to the source processor comprising a device according to any one of claims 1 to 10; and

a communication interface coupled to the destination processor comprising a device according to any one of claims 1 to 10.

A method for establishing trust communications between a plurality of processors of a distributed system, wherein each processor has configured a trusted environment for a secure execution mode and a non-secure execution mode, the method being characterized in that it comprises at least one step of transmitting on a network of the distributed system, a frame containing in the frame body at least data from either the secure execution mode or the non-secure execution mode d a source processor and an address of at least one destination processor, the frame further containing in a header field, an indication of the secure or non-secure execution mode for said data, said header field being accessible only at the hardware level.

The method of claim 12 wherein the step of transmitting a frame over a network is performed from a communication interface coupled to a source processor and to said network.

14. The method according to claims 12 or 13 comprising before the step of transmitting a frame, the steps of:

- Generate on a system bus of a source processor a data transmission request, the data being from the secure execution mode or non-secure execution mode of said source processor; and

The method of claim 14 wherein the system bus is an AXI bus, the frame is in RapidIO format, and the indication of the secure or non-secure execution mode for the data is contained in the Virtual Channel (VC) field. ) RapidIO frames.

16. The method according to any one of claims 12 to 15 comprising after the step of transmitting a frame, the steps of:

transmitting the frame to a communication interface coupled to a destination processor of the distributed network; determining, upon reception of the frame by said communication interface, the secure or non-secure execution mode for the data; and

17. A computer program product, said computer program comprising code instructions for performing the steps of the method according to any of claims 12 to 16, when said program is executed on a computer.