WO2018119951A1

WO2018119951A1 - Gpu virtualization method, device, system, and electronic apparatus, and computer program product

Info

Publication number: WO2018119951A1
Application number: PCT/CN2016/113260
Authority: WO
Inventors: 温燕飞
Original assignee: 深圳前海达闼云端智能科技有限公司
Priority date: 2016-12-29
Filing date: 2016-12-29
Publication date: 2018-07-05
Also published as: CN107003892B; CN107003892A

Abstract

A GPU virtualization method, device, system, and electronic apparatus, and computer program product. The method comprises: receiving an image processing operation at a first operating system (201), and determining, according to the image processing operation, a corresponding image processing instruction; and transmitting, by means of a shared memory (203), to a second operating system (202) the image processing instruction, wherein the shared memory (203) is readable and writable for the first operating system (201) and the second operating system (202). The above method of the present invention can be employed to virtualize a GPU.

Description

GPU virtualization method, device, system and electronic device, computer program product

Technical field

The present application relates to computer technology, and in particular, to a virtualization method, device, system, electronic device, and computer program product of a graphics processor GPU.

Background technique

A virtualization architecture based on Qemu/KVM (Kernel-based Virtual Machine) technology is shown in FIG.

As shown in Figure 1, the virtualization architecture based on Qemu/KVM technology consists of a primary Host operating system and several virtual guest guest operating systems. The Host operating system includes multiple Host user space programs and the Host Linux kernel. Each guest guest operating system includes user space, Guest Linux kernel, and Qemu. These operating systems run on the same set of hardware processor chips, sharing processor and peripheral resources. The ARM processor supporting the virtualization architecture includes at least EL2, EL1, and EL0 modes, and the virtual machine manager Hypervisor program is run in EL2 mode; the Linux kernel program is run in EL1 mode, that is, the Linux kernel program; and the user space is run in the EL0 mode. program. The Hypervisor layer manages hardware resources such as CPU, memory, timers, and interrupts, and can use different CPUs, memory, timers, and interrupted virtualization resources to load different operating systems into physical processors for runtime. Functionality.

KVM/Hypervisor spans the Host Linux kernel and Hypervisor. It provides a driver node for the analog processor Qemu, which allows Qemu to create virtual CPUs through KVM nodes and manage virtualized resources. On the other hand, KVM/Hypervisor can also host Host. The Linux system switches out from the physical CPU, then loads the Guest Linux system onto the physical processor and processes the subsequent transactions that the Guest Linux system exits abnormally.

As an application running on Host Linux, Qemu provides virtual hardware device resources for the operation of Guest Linux. Through the KVM node of the KVM/Hypervisor module, a virtual CPU is created, and physical hardware resources are allocated to load an unmodified Guest Linux. Go to the physical hardware processing to run.

To implement the above virtualization architecture on a terminal device such as a mobile phone or a tablet, it is necessary to solve the virtualization of all hardware devices, and the virtual operating system can also use real hardware devices. There is currently no virtualization method for the graphics processing unit GPU (Graphics Processing Unit).

Summary of the invention

In the embodiment of the present application, a GPU virtualization method, device, system, and electronic device and computer program product are provided for implementing virtualization of a GPU.

According to a first aspect of the embodiments of the present application, a virtualization method of a graphics processor GPU is provided, including: receiving a graphics processing operation at a first operating system, and determining a corresponding graphics processing instruction according to the graphics processing operation Passing the graphics processing instruction to the second operating system through the shared memory; wherein the shared memory is in a readable and writable state for both the first operating system and the second operating system.

According to a second aspect of the embodiments of the present application, a virtualization method of a GPU is provided, including: acquiring a graphics processing instruction from a first operating system by using a shared memory; and executing the graphics processing instruction at a second operating system to obtain Processing the result, and displaying the processing result as a response to the graphics processing operation, wherein the graphics processing operation is received at the first operating system; wherein the shared memory is for the first operating system and the second operating system Both are readable and writable.

According to a third aspect of the embodiments of the present application, a GPU virtualization apparatus includes: a first receiving module, configured to receive a graphics processing operation at a first operating system, and determine a corresponding according to the graphics processing operation a graphics operation instruction; a first delivery module, configured to pass the graphics processing instruction to the second operating system through the shared memory; wherein the shared memory is readable and readable by the first operating system and the second operating system Write status.

According to a fourth aspect of the embodiments of the present application, a virtualization device of a GPU is provided, including: an obtaining module, configured to acquire a graphics processing instruction from a first operating system by using a shared memory; and an execution module, in the Executing, by the operating system, the graphics processing instruction, obtaining a processing result, and displaying the processing result as a response of the graphics processing operation, where the graphics processing operation is received at the first operating system; wherein the shared memory pair The first operating system and the second operating system are both readable and writable.

According to a fifth aspect of the embodiments of the present application, a virtualization system of a GPU is provided, including: a first operating system, including a virtualization device of a GPU according to the third aspect of the embodiment of the present application; a shared memory, configured to: Storing graphics operation instructions from the first operating system and processing results from the second operating system; wherein the shared memory is in a readable and writable state for both the first operating system and the second operating system; A virtualization device for a GPU, such as the fourth aspect of the embodiments of the present application.

According to a sixth aspect of embodiments of the present application, there is provided an electronic device comprising: a display, a memory, one or more processors; and one or more modules, the one or more modules being stored In the memory, and configured to be executed by the one or more processors, the one or more modules include instructions for performing the various steps in the virtualization method of the GPU of the first aspect of the embodiments of the present application.

According to a seventh aspect of embodiments of the present application, there is provided an electronic device comprising: a display, a memory, one or more processors; and one or more modules, the one or more modules being stored In the memory, and configured to be executed by the one or more processors, the one or more modules include instructions for performing the various steps in the virtualization method of the GPU of the second aspect of the embodiments of the present application.

According to an eighth aspect of embodiments of the present application, there is provided a computer program product for use in conjunction with an electronic device including a display, the computer program product comprising a computer readable storage medium and a computer program mechanism embedded therein The computer program mechanism includes instructions for performing the various steps in the virtualization method of the GPU of the first aspect of the embodiments of the present application.

According to a ninth aspect of embodiments of the present application, there is provided a computer program product for use in conjunction with an electronic device including a display, the computer program product comprising a computer readable storage medium and a computer program mechanism embedded therein The computer program mechanism includes instructions for performing the various steps of the virtualization method of the GPU of the second aspect of the embodiments of the present application.

The GPU virtualization method, device, system, and electronic device and computer program product according to the embodiments of the present application are implemented, and the graphics processing instruction and the execution result are transmitted through the shared memory between the first operating system and the second operating system. Virtualization of the GPU.

DRAWINGS

The drawings described herein are intended to provide a further understanding of the present application, and are intended to be a part of this application. In the drawing:

A schematic diagram of a virtualization architecture based on Qemu/KVM technology is shown in FIG. 1;

2 is a schematic diagram of a system architecture for implementing a virtualization method of a GPU in an embodiment of the present application;

FIG. 3 is a flowchart of a virtualization method of a GPU according to Embodiment 1 of the present application;

FIG. 4 is a flowchart of a virtualization method of a GPU according to Embodiment 2 of the present application;

FIG. 5 is a flowchart of a virtualization method of a GPU according to Embodiment 3 of the present application;

FIG. 6 is a schematic structural diagram of a virtualization device of a GPU according to Embodiment 4 of the present application;

FIG. 7 is a schematic structural diagram of a virtualization device of a GPU according to Embodiment 5 of the present application;

FIG. 8 is a schematic structural diagram of a virtualization system of a GPU according to Embodiment 6 of the present application;

FIG. 9 is a schematic structural diagram of an electronic device according to Embodiment 7 of the present application;

FIG. 10 is a schematic structural diagram of an electronic device according to Embodiment 8 of the present application.

detailed description

In the process of implementing the present application, the inventor has found that implementing the above virtualization architecture on a terminal device such as a mobile phone or a tablet requires solving the virtualization of all hardware devices and allowing the virtual operating system to be operated. The system can also use real hardware devices. Therefore, there is a need to provide a virtualization method for a GPU.

In the embodiment of the present application, a GPU virtualization method, apparatus, system, electronic device, and computer program product are provided, and graphics processing instructions and execution are implemented by using a shared memory between the first operating system and the second operating system. The delivery of the results enables virtualization of the GPU.

The solution in the embodiment of the present application can be applied to various scenarios, for example, a smart terminal based on a virtualization architecture based on Qemu/KVM technology, an Android emulator, and the like.

The solution in the embodiment of the present application can be implemented in various computer languages, for example, an object-oriented programming language Java or the like.

The exemplary embodiments of the present application are further described in detail below with reference to the accompanying drawings. Not all embodiments are exhaustive. It should be noted that the embodiments in the present application and the features in the embodiments may be combined with each other without conflict.

Embodiment 1

FIG. 2 shows a system architecture for implementing a virtualization method of a GPU in an embodiment of the present application. As shown in FIG. 2, the GPU virtualization system according to an embodiment of the present application includes a first operating system 201, a second operating system 202, and a shared memory 203. Specifically, the first operating system may be a guest operating system; the second operating system may be a Host operating system. It should be understood that, in a specific implementation, the first operating system may also be a Host operating system, and the second operation may also be a Guest operating system, which is not limited in this application.

Next, the specific implementation manner of the present application is described in detail by taking the example that the first operating system is the guest operating system and the second operating system is the host operating system.

Specifically, the guest operating system may include user space 2011, Guest Linux Kernel 2012, and Qemu 2013; there is a virtual graphics program interface in the user space of the guest operating system, specifically, the graphics program interface may be OpenGL (Open Graphics Library). , Open Graphics Lab) API (Application Program Interface) interface, which can also be, for example, Direct 3D, Other graphics program interfaces, such as Quick Draw 3D, are not limited in this application.

Specifically, the host operating system may include a user space 2021 and a Host Linux Kernel 2022; in the user space of the Host operating system, a graphics program backend server corresponding to the graphical program interface in the Guest operating system may be installed, specifically, It is the OpenGL Backend Server; the backend server can operate the GPU device 204 through the GPU driver in the Host Linux Kernel.

Specifically, the shared memory 203 is a memory that is visible to each other between the guest operating system and the host operating system; and the memory is in a readable and writable state for both the guest operating system and the host operating system, that is, both the guest operating system and the host operating system. Read and write operations can be performed on shared memory.

In a specific implementation, the shared memory 203 may include only the first storage area 2031; and may also be divided into a first storage area 2031 and a second storage area 2032. Specifically, the first storage area may also be referred to as private memory; the second storage area may also be referred to as public memory. In a specific implementation, the division of the first storage area and the second storage area has no specific rules, and may be divided according to the data size generally stored by the first storage area and the second storage area, according to the experience of the designer; Pre-set policies are used to divide, and this application does not limit this.

Specifically, the first storage area may be used for transmission of functions and parameters between the respective threads of the Guest operating system and the Backend Server thread, and/or synchronization information; specifically, the private memory may be further divided into multiple blocks. One block is defined as one channel, one channel corresponds to one thread of the Guest operating system; in the specific division, the multiple blocks may be equally divided blocks of equal size, or may be called according to common threads in the system. The functions and parameters, and/or the size of the synchronization information are intelligently divided, and this application does not limit this. In the specific implementation, the user program of the Guest operating system can dynamically manage the channels in the private memory, that is, the user program can allocate, reallocate, and release the channels in the private memory at any time.

Specifically, the second storage area can be used for large data blocks between all threads of the Guest operating system and the Backend Server thread, for example, transmission of graphic content data. In the specific implementation, To divide the common memory into several large chunks of unequal size. Specifically, the user program in the Guest operating system can manage the blocks in the common memory, that is, the user program can allocate and release the channels in the common memory at any time, and each time the allocation and release are performed according to the entire block. Processed.

In a specific implementation, the division of the size of the block in the common memory can be adapted to the commonly used GPU graphics processing data. For example, in the process of implementing the present application, the research and development personnel find that, in the process of GPU virtualization, the first operating system usually transmits about 2M to 16M of graphic content data to the second operating system to meet the requirements of GPU graphics virtualization processing. Therefore, when allocating the size of the block in the common memory, the common memory can be divided into multiple memory blocks such as 2M, 4M, 8M, and 16M.

For example, if the total common memory size is 32M, divided into 2M, 2M, 4M, 8M, 16M 5 memory blocks, when the user program applies for 3M space, the 4M memory block area can be directly allocated to the corresponding thread, and When the thread is released, an idle flag is set to the 4M block.

It should be understood that, for the purpose of example, only one Guest operating system, one Host operating system, and one shared memory are shown in FIG. 2; but in specific implementation, it may be one or more Guest operating systems, or may be One or more Host operating systems may also be one or more shared memory; that is, the Guest operating system, the Host operating system, and the shared memory may be any number, which is not limited in this application.

It should be understood that, for the purpose of example, the shared memory shown in FIG. 2 includes two storage areas of private memory and common memory; and the private memory is divided into three equal-sized channels; the common memory is divided into four sizes. Channel. In a specific implementation, the shared memory may be a storage area including only private memory; and the private memory may not be divided or divided into multiple channels of different sizes; the common memory may not exist or may be divided into multiple sizes. Equal channels, etc., are not limited in this application.

Next, a virtualization method of a GPU according to an embodiment of the present application will be described in conjunction with the system architecture shown in FIG. 2.

FIG. 3 is a flowchart of a virtualization method of a GPU according to Embodiment 1 of the present application. In this application In the first embodiment, the steps of the GPU virtualization method using the Guest operating system as the execution subject are described. As shown in FIG. 3, a virtualization method of a GPU according to an embodiment of the present application includes the following steps:

S301. Receive a graphics processing operation at the guest operating system, and determine a corresponding graphics processing instruction according to the graphics processing operation.

In a specific implementation, before S301, the shared memory corresponding to the GPU device may be created when the Qemu corresponding to the guest system is started. Specifically, Qemu can create a corresponding shared memory through a system call. Specifically, a specific address space can be divided from the memory as the shared memory of the GPU device. The size of the shared memory can be set by the developer and adapted to the GPU. For example, the shared memory corresponding to the GPU device can be set to 128M or the like, which is not limited in this application.

It should be understood that when there are multiple guest systems, a shared memory may be recreated for the GPU by the Qemu of each guest system, or a shared memory corresponding to the GPU may be shared by the multiple guest systems; .

Qemu further maps the shared memory to the PCI (Peripheral Component Interconnect) device memory space of the Guest system; and provides the guest system with a virtual PCI register as the PCI configuration space.

The Guest Linux Kernel then divides the shared memory into private and public memory.

Specifically, the Guest Linux Kernel can partition the shared memory when initializing the GPU device; so that the shared memory supports access by multiple processes or threads. Specifically, the private memory, that is, the first storage area may be divided into a first preset number of multiple channels; the common memory, that is, the second storage area may be divided into a second preset number of multiple blocks. Specifically, the first preset number and the second preset number may be set by a developer. Specifically, the size of the multiple channels of the private memory may be equal; the size of the multiple blocks of the common memory may be adapted to the processing data of the physical device corresponding to the shared memory.

Further, before S301, the step of allocating a corresponding shared memory address space for the front-end thread and the corresponding back-end thread may be included when the front-end thread is started.

In a specific implementation, when an API call instruction is received, a front-end thread corresponding to the API call instruction may be created. The thread creation instruction corresponding to the API call instruction is sent to the Host operating system to trigger the Host operating system to create a corresponding backend thread. During the creation of the front-end thread and the back-end thread, the address space of the private memory channel corresponding to the front-end thread and the common memory address space allocated to the front-end thread may also be obtained from the Guest Linux Kernel; and the front-end thread is correspondingly The address space of the private memory channel and the common memory address space allocated to the front-end thread are mapped to the address space of the front-end thread; thereby establishing a synchronous control channel with Qemu. Specifically, a certain channel in the private memory is usually allocated to the front-end thread, and the common memory is entirely allocated to the front-end thread.

Next, the address space of the private memory channel corresponding to the front-end thread and the address space of the common memory can be transferred to Qemu through the PCI configuration space; then Qemu uses the inter-process communication mechanism to address the address space of the private memory channel corresponding to the front-end thread, And the address space of the public memory is sent to the backend server; and it is mapped to the address space of the backend thread.

At this point, the initialization of the shared memory between the front-end thread and the back-end thread is completed.

In a specific implementation, the user typically performs a graphics processing operation on a thread in the guest operating system, which may be, for example, opening a new window, opening a new page, or the like. It can be understood that, before this step, the step of creating a new thread in the user space of the Guest operating system may also be included. In a specific implementation, the new thread may be an application, such as QQ, WeChat, and the like. The behavior of the user creating a new thread may be, for example, the user opening WeChat or the like.

Specifically, the first storage area may be further divided into one or more channels, and if the first storage area includes multiple channels, before the graphics processing instruction is written to the shared memory, the method further includes: processing the instruction according to the graphics The corresponding thread determines the channel corresponding to the graphics processing instruction.

When a user creates a new thread in the user space of the guest operating system, the thread can be assigned a corresponding channel of the first storage area according to a preset rule. Specifically, the rule may be in the order in which the threads are created. For example, when a new thread is created, the Guest Linux kernel assigns a unique channel number to the thread, and the private memory corresponding to the channel number and the whole The public memory is simultaneously mapped to the user program; the Guest user program notifies OpenGL Backend Server to create a thread through Qemu, and maps the corresponding private memory channel number and the entire common memory space to the thread. It should be understood that, in the specific implementation, if there is only one channel in the private memory, the step of allocating the channel number may not be performed; or the step corresponding to the thread corresponding to the graphics processing instruction may be not performed, and the step corresponding to the channel corresponding to the graphics processing instruction may be determined. .

S302. Pass the graphics processing instruction to the second operating system through the shared memory, so that the second operating system executes the graphics processing instruction to obtain a processing result.

In a specific implementation, the transferring the graphics processing instruction to the second operating system through the shared memory may be implemented by: writing the graphics processing instruction to the shared memory; and offsetting the graphics processing instruction in the shared memory Sent to the second operating system. Specifically, the guest user program may perform an offset record on the memory allocated for each block, that is, record the offset address of the memory currently written in the graphics processing instruction in the memory block corresponding to the current thread; and then shift the offset of the current memory block. The address is sent to the corresponding thread in the Host operating system. Then, the host operating system can read the graphics processing instruction to the corresponding position of the shared memory through the corresponding channel number and offset address, and immediately execute the function to obtain the processing result.

In a first embodiment, the graphics processing instructions may only include graphics processing functions and parameters; the graphics processing functions and parameters may be stored in a first memory area of the shared memory, ie, private memory. After the Host operating system obtains the corresponding graphics processing functions and parameters, it can execute the function immediately and get the processing result. Specifically, to save the data transmission amount, the number corresponding to the graphics processing function may be determined first; then the graphics processing function number and parameters are written to the first storage area. After obtaining the corresponding graphics processing function number, the host operating system determines the corresponding graphics processing function according to the number, and then executes the function according to the graphics processing function and parameters, and obtains the processing result. Specifically, the graphics processing function may be an OpenGL function.

In a second embodiment, the graphics processing instruction includes, in addition to the graphics processing function and the parameter, synchronization information, where the synchronization information is used to indicate the time when the second operating system executes the graphics processing instruction; Graphics processing functions and parameters, as well as synchronization information are stored in the share The first storage area that is stored, that is, private memory. After obtaining the corresponding graphics processing function and parameters, the host operating system can execute the function at the time indicated by the synchronization information, and obtain the processing result.

In a third embodiment, the graphics processing instruction includes graphics content data in addition to graphics processing functions and parameters; the graphics processing function and parameters may be stored in the shared memory of the shared memory, and the graphics content is The data is written to the second storage area, which is the common memory. The Guest user program sends the offset address of the private memory block and the offset address of the common memory block to the corresponding thread in the Host operating system. Then, the host operating system can read the graphic processing function and parameters through the corresponding channel number and the private memory offset address; to the corresponding position of the private memory; and read the graphic content data through the common memory offset address to the corresponding position of the common memory, And execute the function immediately after reading, and get the processing result. Specifically, the graphic content data may refer to an image frame that requires image processing.

Specifically, the common memory may be further divided into a plurality of blocks having a size adapted to the GPU graphic content data; if the second storage area includes a plurality of blocks, the graphic content data is written to the second Before the storage area, the method further includes: determining, according to the size of the graphic content data, a block corresponding to the graphic content data.

For example, if the total common memory size is 32M, divided into 2M, 2M, 4M, 8M, 16M 5 memory blocks, when the user program requests to transfer 3M data content data, you can directly allocate 4M common memory blocks to the corresponding the rout.

In a fourth specific embodiment, the graphics processing instruction includes graphics content data in addition to graphics processing functions, parameters, and synchronization information; the graphics processing function, parameters, and synchronization information may be stored in the shared memory private The memory writes the graphic content data to the second storage area, that is, the common memory. The Guest user program sends the offset address of the private memory block and the offset address of the common memory block to the corresponding thread in the Host operating system. Then, the host operating system can read the graphics processing function, parameters, and synchronization information through the corresponding channel number and the private memory offset address; to the corresponding position in the private memory; and read the graphic through the common memory offset address to the corresponding position of the common memory. The content data is executed at the time indicated by the synchronization information, and the processing result is obtained.

It should be understood that, in a specific implementation, the shared memory may be utilized one or more times between the first operating system and the second operation to deliver any one or more of the following data: a graphics processing function or a graphics processing function number, a parameter , synchronization information, graphic content data. Specifically, the first operating system may transfer the graphics processing instruction to be delivered to the second operating system through the shared memory at one time; or may split the graphics processing instruction into an appropriate size and use the shared memory to transfer to the second operation multiple times. The system does not limit the splitting strategy of the graphics processing instructions by using the common technical means of those skilled in the art.

S303. The second operating system displays the processing result as a response of the graphics processing operation.

In a specific implementation, after obtaining the processing result, the second operating system may display the processing result to the screen through the GPU device.

S304. The first operating system receives an execution result from the second operating system.

In a specific implementation, the second operating system may generate an execution result according to the execution result of the function. Specifically, the execution result may include a message that the graphics processing function performs success or failure, and/or software version information, etc.; and returns to the first operating system; so that the corresponding thread in the first operating system can acquire the function. carried out.

Specifically, the host operating system can write the execution result to the shared memory; and record the current write execution result position, the offset address in the memory block corresponding to the current thread; and then send the offset address to the guest operating system. Corresponding thread. Then, the Guest operating system can read the data to the corresponding location of the shared memory through the corresponding offset address.

So far, the remote call of the GPU device by the user program in the Guest operating system is realized; that is, the virtualization of the GPU is realized.

With the virtualization method of the GPU in the embodiment of the present application, the remote call of the OpenGL API is implemented on the basis of the shared memory, thereby realizing the virtualization of the GPU.

Embodiment 2

FIG. 4 is a flowchart of a virtualization method of a GPU according to Embodiment 2 of the present application. In this application In the second embodiment, the steps of the GPU virtualization method using the Host operating system as the execution body are described. For the implementation of the system architecture in the embodiment of the present application, refer to the system architecture shown in FIG. 2 in the first embodiment, and details are not described herein again.

As shown in FIG. 4, a virtualization method of a GPU according to an embodiment of the present application includes the following steps:

S401. The host operating system acquires graphics processing instructions from the guest operating system through the shared memory.

In a specific implementation, the shared memory may be divided into private memory and common memory; and the private memory may be further divided into multiple channels corresponding to different threads; if the private memory includes multiple channels, before S401, the method further includes: A thread corresponding to the graphics processing instruction determines a channel corresponding to the graphics processing instruction.

Specifically, when the user creates a new thread in the user space of the guest operating system, the thread may be allocated a corresponding channel of the first storage area according to a preset rule. Specifically, the rule may be in the order in which the threads are created. For example, when a new thread is created, the Guest Linux kernel assigns a unique channel number to the thread, and maps the private memory corresponding to the channel number and the entire public memory to the user program at the same time; the Guest user program notifies OpenGL Backend through Qemu. Server creates a thread and maps the corresponding private memory channel number and the entire public memory space to the thread. It should be understood that, in the specific implementation, if there is only one channel in the private memory, the step of allocating the channel number may not be performed; or the step corresponding to the thread corresponding to the graphics processing instruction may be not performed, and the step corresponding to the channel corresponding to the graphics processing instruction may be determined. .

In a specific implementation, the guest operating system may send the graphics processing instruction to the host operating system at an offset address of the shared memory; the host operating system reads the graphics processing from the shared memory according to the offset address of the shared memory according to the graphics processing instruction. instruction.

In the first embodiment, the graphics processing instruction only includes the graphics processing function and the parameter; the host operating system can obtain the corresponding graphics processing function and parameters in the private memory. If the number of the graphics processing function is obtained in the private memory, the corresponding graphics processing function can be determined according to the number, and the function and parameters are processed according to the graphics.

In a second embodiment, the graphics processing instruction includes, in addition to the graphics processing function and the parameter, synchronization information, where the synchronization information is used to indicate the time when the second operating system executes the graphics processing instruction; Obtain the corresponding graphics processing functions, parameters, and synchronization information in private memory.

In a third specific implementation, the graphics processing instruction includes graphic content data in addition to the graphics processing function and parameters; the host operating system can pass the corresponding channel number and the private memory offset address; corresponding to the private memory The position reads the graphics processing function and parameters; the graphic content data is read through the common memory offset address to the corresponding position of the common memory.

In a fourth specific implementation, the graphics processing instruction includes graphic content data in addition to the graphics processing function, parameters, and synchronization information; the host operating system may pass the corresponding channel number and the private memory offset address; The corresponding position of the memory reads the graphics processing function, parameters and synchronization information; the graphic content data is read through the common memory offset address to the corresponding position of the common memory.

S402. The host operating system executes the graphic processing instruction to obtain a processing result.

In a specific implementation, if the synchronization processing information is included in the graphics processing instruction, after acquiring the graphics processing instruction, the host operating system may execute the graphics processing function based on the parameter at the moment indicated by the synchronization information, and obtain the processing result.

In the specific implementation, the synchronization processing information is not included in the graphics processing instruction, and after the host operating system acquires the graphics processing instruction, the host operating system can immediately execute the graphics processing function based on the parameters, and obtain the processing result.

S403. Display the processing result as a response to the graphics processing operation received at the first operating system.

In the specific implementation, the process of the host operating system displaying the function processing result may adopt the conventional technical means of those skilled in the art, which is not described in this application.

S404. Pass the execution result to the first operating system through the shared memory.

In a specific implementation, after the host operating system obtains the processing result, the execution result of the function, for example, a message for identifying that the function execution succeeds or the execution failure is written, may be written into the shared memory; And sending the message to the first operating system at the offset address of the shared memory, so that the first operating system obtains the function execution result according to the offset address.

At this point, the remote calling of the GPU device is implemented in the Host operating system in conjunction with the user program in the Guest operating system; that is, the virtualization of the GPU is implemented.

Embodiment 3

FIG. 5 is a flowchart of a virtualization method of a GPU according to Embodiment 3 of the present application. In the third embodiment of the present application, the step of implementing the GPU virtualization method by using the OpenGL graphics processing interface as an example, the Guest operating system and the Host operating system are described. For the implementation of the system architecture in the embodiment of the present application, refer to the system architecture shown in FIG. 2 in the first embodiment, and details are not described herein again.

In the embodiment of the present application, the initiator of the OpenGL API function remote call is the Guest operating system, and the function execution party is the Host operating system. The downlink synchronization process from the Guest operating system to the Host operating system goes through the Guest Linux kernel and Qemu reaches the OpenGL Backend Server. The uplink synchronization process from the Host operating system to the Guest operating system is initiated from the OpenGL Backend Server and reaches the OpenGL emulator API via the Qemu and Guest Linux kernels.

In the embodiment of the present application, each time the guest operating system creates a new display window, a thread is created to initialize and call the OpenGL function. During the initialization process, the OpenGL Backend Server also creates a guest interface with the guest. Corresponding thread.

Next, the implementation process of the GPU virtual method based on the above application scenario will be described in detail.

As shown in FIG. 5, the virtualization method of the GPU according to Embodiment 3 of the present application includes the following steps:

S501, shared memory initialization.

In the specific implementation, the shared memory can be divided into two large blocks in the Guest Linux kernel, which are defined as private memory and common memory.

Specifically, the private memory may be equally divided into a plurality of blocks of equal size, and one block is a channel, and each channel is used for transmitting data and synchronization information of a thread of the Guest operating system to an OpenGL Backend Server thread. In particular, the data may include graphics processing function numbers and parameters.

Specifically, the common memory can be divided into a plurality of large unequal chunks for large data block transmission from all threads of the Guest operating system to the OpenGL Backend Server thread.

S502, establishing a mapping of shared memory and threads.

In the specific implementation, the number of the private channel can be controlled by the Guest Linux kernel. When the Guest user program creates a new thread each time, the kernel is responsible for allocating a unique channel number, and the private memory corresponding to the channel and the entire public memory. Also map to the user program.

Then the Guest user program tells OpenGL Backend Server to create a thread through Qemu and use the corresponding private channel memory and the entire public memory space.

The guest user program dynamically manages the private channel memory, and the program can allocate, redistribute, and release operations in the private memory at any time.

The Guest user program manages the fixed size of the common memory. Each allocation and release is handled by the entire block. For example, if the total public memory size is 32M, the partition is 2M, 2M, 4M, 8M, 16M 5 In the memory block, when the user applies for 3M space, the 4M memory block area is directly allocated, and an idle flag is set to the 4M block area when released.

The Guest user program performs an offset record on each allocated memory, that is, records the offset address of the currently allocated memory across the entire system memory block.

S503. The Guest user program determines a corresponding graphics processing instruction in response to the user's graphics processing operation.

For the implementation of step S503, reference may be made to the implementation of S301 in the first embodiment, and the repeated description is omitted.

S504: After the guest user program writes the function number and its parameters to the allocated memory block, the function number and the parameter are transferred to the thread corresponding to the host operating system at the offset address of the current memory block.

For the implementation of step S504, reference may be made to the process of transmitting the function number and parameters in the first embodiment S302. The implementation, repetitions will not be repeated.

S505: The host operating system acquires the passed function number and its parameters from the shared memory, and starts executing the function.

For the implementation of step S505, reference may be made to the process of obtaining the function number and parameters in the second embodiment S401, and the implementation of the function execution process in the second embodiment S402, and the repeated description is omitted.

S506, after the Host operating system executes the function, the processing result is displayed, and the same method is used to write the success or failure of the identification function in the shared memory, and then the corresponding offset address is returned to the Guest operating system to complete the function. carried out.

For the implementation of step S506, reference may be made to the implementation of the second embodiment S403 and S404, and the repeated description is not repeated.

At this point, the remote call of the OpenGL API between the Guest operating system and the Host operating system is implemented, thereby realizing the virtualization of the GPU.

The virtualization method of the GPU in the embodiment of the present application uses a method of sharing memory across operating systems, that is, two operating systems are mutually visible and read and written on one memory, and implemented on the basis of shared memory. Remote calls to the OpenGL API to virtualize the GPU.

Based on the same inventive concept, a GPU virtualization device is also provided in the embodiment of the present application. The principle of the device is similar to the GPU virtualization method provided in the first embodiment of the present application. See the implementation of the method, and the repetition will not be repeated.

Embodiment 4

FIG. 6 is a schematic structural diagram of a virtualization device of a GPU according to Embodiment 4 of the present application.

As shown in FIG. 6, the virtualization device 600 of the GPU according to Embodiment 4 of the present application includes: a first receiving module 601, configured to receive a graphics processing operation at a first operating system, and determine a corresponding according to the graphics processing operation. a graphics operation instruction; the first delivery module 602 is configured to pass the graphics processing instruction to the second operating system through the shared memory, so that the second operating system executes the graphics processing instruction, obtains a processing result, and uses the processing result as The response of the graphics processing operation is displayed; The shared memory is in a readable and writable state for both the first operating system and the second operating system.

Specifically, the first operating system may be a guest guest operating system, and the second operating system may be a host guest operating system.

Specifically, the first delivery module may specifically include: a first writing submodule, the graphic processing instruction is written to the shared memory; and the first sending submodule is configured to bias the graphic processing instruction in the shared memory The transfer address is sent to the second operating system.

Specifically, the graphics processing instruction may include a graphics processing function and a parameter; the first writing sub-module may be specifically configured to: store the graphics processing instruction into the first storage area of the shared memory.

Specifically, the graphics processing instruction may further include synchronization information, where the synchronization information may be used to indicate a timing at which the second operating system executes the graphics processing instruction.

Specifically, the graphics processing instruction may further include graphic content data; the shared memory may further include a second storage area; the first writing sub-module may further be configured to: write the graphic content data to the second storage area .

Specifically, the second storage area includes a plurality of blocks, wherein each block has a preset size, and the preset size is adapted to the GPU graphic content data; the device may further include: a first determining module, configured to use the graphic content according to the graphic content The size of the data determines the block corresponding to the graphic content data.

Specifically, the first storage area includes a plurality of channels, wherein each channel corresponds to a different thread; the device may further include: a second determining module, configured to determine, according to the thread corresponding to the graphics processing instruction, the graphics processing instruction Channel.

Specifically, the graphics processing instruction may include a number and a parameter corresponding to the graphics processing function; the first writing sub-module may be specifically configured to: determine a number corresponding to the graphics processing function; and write the graphics processing function number and parameters to The first storage area.

Specifically, the GPU virtualization apparatus according to the embodiment of the present application further includes: a second receiving module 603, configured to receive an execution result from the second operating system.

Specifically, the second receiving module may further include: a first address receiving submodule, configured to receive an offset address of the execution result from the second operating system in the shared memory; the first reading submodule, Used to read the execution result from the shared memory based on the offset address of the shared memory according to the execution result.

With the virtualization device of the GPU in the embodiment of the present application, the remote call of the OpenGL API is implemented on the basis of the shared memory, thereby realizing the virtualization of the GPU.

Based on the same inventive concept, a virtualization device of a GPU is also provided in the embodiment of the present application. The principle of the device is similar to the virtualization method of the GPU provided by the second embodiment of the present application. See the implementation of the method, and the repetition will not be repeated.

Embodiment 5

FIG. 7 is a schematic structural diagram of a virtualization device of a GPU according to Embodiment 5 of the present application.

As shown in FIG. 7, the virtualization device 700 of the GPU according to Embodiment 5 of the present application includes: an obtaining module 701, configured to acquire a graphics processing instruction from a first operating system by using a shared memory; and an executing module 702, configured to: The operating system executes the graphics processing instruction to obtain a processing result; the display module 703 is configured to display the processing result as a response of the graphics processing operation; wherein the graphics processing operation is received by the first operating system; The shared memory is readable and writable for both the first operating system and the second operating system.

Specifically, the acquiring module may specifically include: a second address receiving submodule, configured to receive an offset address of the graphics processing instruction from the first operating system in the shared memory; and a second read submodule configured to process according to the graphic The instruction reads the graphics processing instruction from the shared memory at the offset address of the shared memory.

Specifically, the graphics processing instruction may include a graphics processing function and a parameter; and the second reading sub-module may be specifically configured to: read the graphics processing instruction from the first storage area of the shared memory.

Specifically, the graphics processing instruction may further include synchronization information, where the synchronization information may be used to indicate a time when the second operating system executes the graphics processing instruction, and the execution module may be configured to: execute at a time indicated by the synchronization information The graphics processing instructions.

Specifically, the graphics processing instruction may further include graphics content data; the shared memory may further include a second storage area; and the second reading submodule may be further configured to: read the graphic content from the second storage area of the shared memory data.

Specifically, the graphics processing instruction may include a number and a parameter corresponding to the graphics processing function; the second reading submodule may be specifically configured to: read the graphics processing function number and parameters from the first storage area; The processing function number determines the corresponding graphics processing function.

Specifically, the GPU virtualization apparatus according to the embodiment of the present application may further include: a second delivery module, configured to deliver the execution result to the first operating system through the shared memory.

Specifically, the second delivery module may specifically include: a second write submodule, configured to write an execution result to the shared memory; and a second sending submodule, configured to send the execution result to an offset address of the shared memory Go to the first operating system, so that the first operating system obtains an execution result according to the offset result of the shared memory in the processing result.

Based on the same inventive concept, a virtualization system of a GPU is also provided in the embodiment of the present application. The principle of solving the problem is similar to the virtualization method of the GPU provided in Embodiments 1 and 2 of the present application. Implementation can refer to the implementation of the method, and the repetition will not be repeated.

Embodiment 6

FIG. 8 is a schematic structural diagram of a virtualization system of a GPU according to Embodiment 6 of the present application.

As shown in FIG. 8, the virtualization system 800 of the GPU according to Embodiment 6 of the present application includes: a first operating system 801, a virtualization device 600 including a GPU, and a shared memory 802 for storing graphics from the first operating system. Operation instructions and processing results from the second operating system; wherein, the total The memory is in a readable and writable state for both the first operating system and the second operating system; the second operating system 803 includes a virtualization device 700 of the GPU.

For the implementation of the first operating system 801, refer to the implementation of the first operating system 201 in the first embodiment of the present application, and details are not described herein again.

For the implementation of the shared memory 802, refer to the implementation of the shared memory 203 in the first embodiment of the present application, and details are not described herein again.

For the implementation of the second operating system 803, refer to the implementation of the second operating system 202 in the first embodiment of the present application, and details are not described herein again.

With the virtualization system of the GPU in the embodiment of the present application, the remote call of the OpenGL API is implemented on the basis of the shared memory, thereby realizing the virtualization of the GPU.

Example 7

Based on the same inventive concept, an electronic device 900 as shown in FIG. 9 is also provided in the embodiment of the present application.

As shown in FIG. 9, an electronic device 900 according to Embodiment 7 of the present application includes: a display 901, a memory 902, one or more processors 903, a bus 904, and one or more modules, the one or more modules being stored In the memory, and configured to be executed by the one or more processors, the one or more modules include instructions for performing the steps in any of the methods of the first embodiment of the present application.

Based on the same inventive concept, a computer program product for use in conjunction with an electronic device 900 including a display, the computer program product comprising a computer readable storage medium and a computer program mechanism embedded therein are also provided. The computer program mechanism includes instructions for performing the various steps of the method of any of the first embodiment of the present application.

Example eight

Based on the same inventive concept, an electronic device 1000 as shown in FIG. 10 is also provided in the embodiment of the present application.

As shown in FIG. 10, an electronic device 1000 according to Embodiment 8 of the present application includes: a display 1001, a memory 1002, one or more processors 1003, a bus 1004, and one or more modules, the one or more modules being stored in The memory is configured to be executed by the one or more processors, the one or more modules comprising instructions for performing the steps of any of the methods of the second embodiment of the present application.

Based on the same inventive concept, a computer program product for use in conjunction with an electronic device 1000 including a display, the computer program product comprising a computer readable storage medium and a computer program mechanism embedded therein are also provided. The computer program mechanism includes instructions for performing the various steps of the method of any of the second embodiment of the present application.

Those skilled in the art will appreciate that embodiments of the present application can be provided as a method, system, or computer program product. Thus, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment in combination of software and hardware. Moreover, the application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) including computer usable program code.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (system), and computer program products according to embodiments of the present application. It will be understood that each flow and/or block of the flowchart illustrations and/or FIG. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing device to produce a machine for the execution of instructions for execution by a processor of a computer or other programmable data processing device. Means for implementing the functions specified in one or more of the flow or in a block or blocks of the flow chart.

These computer program instructions can also be stored in a bootable computer or other programmable data processing device. In a computer readable memory that operates in a particular manner, causing instructions stored in the computer readable memory to produce an article of manufacture comprising an instruction device implemented in one or more flows and/or block diagrams of the flowchart The function specified in the box or in multiple boxes.

These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device. The instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

While the preferred embodiment of the present application has been described, it will be apparent that those skilled in the art can make further changes and modifications to the embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and the modifications and

It will be apparent to those skilled in the art that various modifications and changes can be made in the present application without departing from the spirit and scope of the application. Thus, it is intended that the present invention cover the modifications and variations of the present invention.

Claims

A method for virtualizing a graphics processor GPU, comprising:

Receiving a graphics processing operation at the first operating system, and determining a corresponding graphics processing instruction according to the graphics processing operation;

Passing the graphics processing instructions to the second operating system through the shared memory; wherein the shared memory is in a readable and writable state for both the first operating system and the second operating system.
The method according to claim 1, wherein the transferring the graphics processing instruction to the second operating system through the shared memory comprises:

Writing the graphics processing instruction to the shared memory;

Transmitting the graphics processing instruction to the second operating system at an offset address of the shared memory.
The method of claim 2, wherein the graphics processing instructions comprise graphics processing functions and parameters; and the writing of the graphics processing instructions to the shared memory comprises:

The graphics processing instructions are stored to a first memory area of the shared memory.
The method of claim 3 wherein said graphics processing instructions further comprise synchronization information for indicating a time at which said second operating system executes said graphics processing instructions.
The method of claim 3, wherein the graphics processing instructions further comprise graphics content data; the shared memory further comprising a second memory area; writing the graphics processing instructions to the shared memory, further include:

Writing the graphic content data to the second storage area.
The method according to claim 5, wherein the second storage area comprises a plurality of blocks, wherein the blocks have a preset size, and the preset size is adapted to GPU graphic content data; Before the writing of the graphic content data to the second storage area, the method further includes:

And determining, according to the size of the graphic content data, a block corresponding to the graphic content data.
The method of claim 3 wherein said first storage area comprises a plurality a channel, wherein each channel corresponds to a different thread; before the graphics processing instruction is written to the shared memory, the method further includes:

Determining, according to the thread corresponding to the graphics processing instruction, a channel corresponding to the graphics processing instruction.
The method according to claim 2, wherein the graphics processing instruction includes a number and a parameter corresponding to the graphics processing function; and the writing the graphics processing instruction to the shared memory, specifically:

Determining a number corresponding to the graphics processing function;

The graphics processing function number and parameters are written to the first memory area.
The method of claim 1 further comprising receiving an execution result from said second operating system.
The method according to claim 9, wherein receiving the execution result from the second operating system comprises:

Receiving an offset address of the execution result from the second operating system in the shared memory;

The execution result is read from the shared memory according to an execution result of the offset address of the shared memory.
A method for virtualizing a GPU, comprising:

Obtaining graphics processing instructions from the first operating system through the shared memory;

Executing the graphics processing instruction at a second operating system to obtain a processing result;

Displaying the result of the processing as a response to a graphics processing operation; wherein the graphics processing operation is received at the first operating system;

The shared memory is in a readable and writable state for both the first operating system and the second operating system.
The method of claim 11, wherein the obtaining the graphics processing instruction from the first operating system by using the shared memory comprises:

Receiving an offset address of the graphics processing instruction from the first operating system in the shared memory;

The graphics processing instruction is read from the shared memory according to the offset address of the shared memory in the graphics processing instruction.
The method according to claim 12, wherein the graphics processing instruction comprises a graphics processing function and a parameter; and the reading the graphics processing instruction from the shared memory comprises:

The graphics processing instructions are read from a first memory area of the shared memory.
The method according to claim 13, wherein said graphics processing instruction further comprises synchronization information, said synchronization information being used to indicate a time at which said second operating system executes said graphics processing instruction; The graphic processing instruction is executed by the operating system, and specifically includes:

The graphics processing instruction is executed at the timing indicated by the synchronization information.
The method according to claim 13, wherein the graphics processing instruction further comprises graphic content data; the shared memory further comprises a second storage area; and the reading the graphics processing instruction from the shared memory, further comprising:

The graphic content data is read from a second storage area of the shared memory.
The method of claim 13 wherein said first storage area comprises a plurality of channels, wherein said each channel corresponds to a different thread; prior to reading said graphics processing instructions from said shared memory, include:

Determining, according to the thread corresponding to the graphics processing instruction, a channel corresponding to the graphics processing instruction.
The method according to claim 12, wherein the graphics processing instruction includes a number and a parameter corresponding to the graphics processing function; and the reading the graphics processing instruction from the first storage area of the shared memory, specifically:

Reading the graphics processing function number and parameters from the first storage area;

A corresponding graphics processing function is determined according to the graphics processing function number.
The method of claim 11 further comprising:

The execution result is passed to the first operating system through the shared memory.
The method of claim 18, wherein the execution result is passed through the shared memory Passed to the first operating system, specifically:

Write the execution result to the shared memory;

Transmitting the execution result to the first operating system at an offset address of the shared memory, so that the first operating system acquires the execution result according to the processing result in an offset address of the shared memory.
A GPU virtualization device, comprising:

a first receiving module, configured to receive a graphics processing operation at the first operating system, and determine a corresponding graphics operation instruction according to the graphics processing operation;

a first delivery module, configured to deliver the graphics processing instruction to the second operating system through a shared memory; wherein the shared memory is readable and writable to both the first operating system and the second operating system status.
The device according to claim 20, wherein the first delivery module comprises:

a first write submodule, writing the graphics processing instruction to the shared memory;

And a first sending submodule, configured to send the graphics processing instruction to the second operating system at an offset address of the shared memory.
The device according to claim 21, wherein the graphics processing instruction comprises a graphics processing function and a parameter; and the first writing sub-module is specifically configured to:

The graphics processing instructions are stored to a first memory area of the shared memory.
The apparatus of claim 22, wherein the graphics processing instructions further comprise synchronization information for indicating a time at which the second operating system executes the graphics processing instructions.
The device according to claim 22, wherein the graphics processing instruction further comprises graphic content data; the shared memory further comprises a second storage area; the first writing sub-module is further configured to:

Writing the graphic content data to the second storage area.
The apparatus according to claim 24, wherein said second storage area comprises a plurality of blocks, wherein said each block has a preset size, said preset size being adapted to a GPU Graphic content data; the device further includes:

The first determining module is configured to determine, according to the size of the graphic content data, a block corresponding to the graphic content data.
The device according to claim 22, wherein the first storage area comprises a plurality of channels, wherein each of the channels corresponds to a different thread; the device further comprises:

The second determining module is configured to determine, according to the thread corresponding to the graphics processing instruction, a channel corresponding to the graphics processing instruction.
The device according to claim 21, wherein the graphics processing instruction includes a number and a parameter corresponding to the graphics processing function; and the first writing sub-module is specifically configured to:

Determining a number corresponding to the graphics processing function;

The graphics processing function number and parameters are written to the first memory area.
The apparatus according to claim 20, further comprising: a second receiving module, configured to receive an execution result from the second operating system.
The device according to claim 28, wherein the second receiving module specifically includes:

a first address receiving submodule, configured to receive an offset address of the execution result from the second operating system in the shared memory;

And a first reading submodule, configured to read the execution result from the shared memory according to an execution result of the offset address of the shared memory.
A GPU virtualization device, comprising:

Obtaining a module, configured to acquire a graphics processing instruction from the first operating system by using the shared memory;

An execution module, configured to execute the graphics processing instruction at the second operating system, to obtain a processing result;

a display module, configured to display the processing result as a response of a graphics processing operation; wherein the graphics processing operation is received by the first operating system; wherein the shared memory is to the first operation Both the system and the second operating system are in a readable and writable state.
The device according to claim 30, wherein the acquiring module comprises:

a second address receiving submodule, configured to receive an offset address of the graphics processing instruction from the first operating system in the shared memory;

And a second reading submodule, configured to read the graphics processing instruction from the shared memory according to the offset address of the shared memory in the graphics processing instruction.
The device according to claim 31, wherein the graphics processing instruction comprises a graphics processing function and a parameter; and the second reading sub-module is specifically configured to:

The graphics processing instructions are read from a first memory area of the shared memory.
The apparatus according to claim 32, wherein the graphics processing instruction further comprises synchronization information, wherein the synchronization information is used to indicate a time when the second operating system executes the graphics processing instruction; and an execution module, specifically to:

The graphics processing instruction is executed at the timing indicated by the synchronization information.
The device according to claim 32, wherein the graphics processing instruction further comprises graphic content data; the shared memory further comprises a second storage area; and the second reading sub-module is further configured to:

The graphic content data is read from a second storage area of the shared memory.
The device according to claim 32, wherein the first storage area comprises a plurality of channels, wherein each of the channels corresponds to a different thread; the device further comprises:

The second determining module is configured to: determine, by the thread corresponding to the graphics processing instruction, a channel corresponding to the graphics processing instruction.
The device according to claim 31, wherein the graphics processing instruction comprises a number and a parameter corresponding to the graphics processing function; and the second reading sub-module is specifically configured to:

Reading the graphics processing function number and parameters from the first storage area;

A corresponding graphics processing function is determined according to the graphics processing function number.
The device of claim 30, further comprising:

And a second delivery module, configured to pass the execution result to the first operating system through the shared memory.
The device according to claim 37, wherein the second delivery module comprises:

a second write submodule, configured to write an execution result to the shared memory;

a second sending submodule, configured to send the execution result to the first operating system at an offset address of the shared memory, so that the first operating system offsets the shared memory according to the processing result Address to obtain the execution result.
A GPU virtualization system, comprising:

a first operating system, comprising the virtualization device of the GPU of any one of claims 20 to 29;

a shared memory for storing graphics operation instructions from the first operating system and processing results from a second operating system; wherein the shared memory is readable and readable by both the first operating system and the second operating system Writable state

A second operating system comprising the virtualization device of the GPU of any one of claims 30 to 38.
An electronic device, comprising: a display, a memory, one or more processors; and one or more modules, the one or more modules being stored in the memory and being Configured to be executed by the one or more processors, the one or more modules comprising instructions for performing the various steps of the method of any of claims 1-10.
An electronic device, comprising: a display, a memory, one or more processors; and one or more modules, the one or more modules being stored in the memory and being Configured to be executed by the one or more processors, the one or more modules comprising instructions for performing the various steps of the method of any of claims 11-19.
A computer program product for use with an electronic device including a display, the computer program product comprising a computer readable storage medium and a computer program mechanism embedded therein, the computer program mechanism comprising for performing claim 1 The instructions of the various steps in any of the methods described in 10.
A computer program product for use with an electronic device including a display, the calculation The machine program product comprises a computer readable storage medium and a computer program mechanism embodied therein, the computer program mechanism comprising instructions for performing the various steps of the method of any of claims 11-19.