WO2018095026A1 - 一种耳机测试电路 - Google Patents

一种耳机测试电路 Download PDF

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Publication number
WO2018095026A1
WO2018095026A1 PCT/CN2017/089226 CN2017089226W WO2018095026A1 WO 2018095026 A1 WO2018095026 A1 WO 2018095026A1 CN 2017089226 W CN2017089226 W CN 2017089226W WO 2018095026 A1 WO2018095026 A1 WO 2018095026A1
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Prior art keywords
unit
signal
earphone
test circuit
socket
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PCT/CN2017/089226
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English (en)
French (fr)
Inventor
王建波
曹新放
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歌尔股份有限公司
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Publication of WO2018095026A1 publication Critical patent/WO2018095026A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R29/00—Monitoring arrangements; Testing arrangements
    • H04R29/001—Monitoring arrangements; Testing arrangements for loudspeakers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R29/00—Monitoring arrangements; Testing arrangements
    • H04R29/004—Monitoring arrangements; Testing arrangements for microphones

Definitions

  • the present invention relates to the field of circuit design technology, and more particularly, to a headphone test circuit.
  • USB interface headphones need to test the performance of the microphone and speaker of the USB interface headphones before leaving the factory. It is tested whether the speaker of the USB interface earphone can sound normally, and whether the microphone can normally collect the voice to ensure that the USB interface earphone can be used normally.
  • Headphones can be tested by electronic devices in the prior art, but this makes the cost of earphone testing higher.
  • a headphone test circuit comprising a decoding unit, an encoding unit, a storage unit, a USB socket for connecting a playback device, and a 3.5 mm socket for connecting the earphone to be tested, the storage unit Provided to store a digital audio signal and transmit the digital audio signal to the decoding unit; the decoding unit is configured to decode the digital audio signal to obtain an analog audio signal, and to pass the analog audio signal The 3.5mm socket is transmitted to the earphone to be tested for playing; the encoding unit is configured to receive an analog voice signal sent by the microphone of the earphone to be tested through the 3.5mm socket, and perform the analog voice signal The encoding process obtains a digital voice signal, and the digital voice signal is sent to the playing device for playing via the USB socket.
  • the USB socket is a Type-C socket.
  • the earphone testing circuit further includes an encoding unit, the decoding unit has a digital differential input terminal for inputting a digital audio signal, and an analog output terminal for outputting an analog audio signal, the storage unit having a An audio differential output for outputting a pre-stored digital audio signal, the encoding unit having an analog input and a digital differential output, the audio differential output being coupled to the digital differential input, the analog output
  • the end is correspondingly connected to the left channel contact and the right channel contact of the 3.5mm socket; the microphone contact of the 3.5mm socket is connected to the analog input, the digital differential output and the Type-
  • the RX+ pin of the C socket is connected to the RX- pin, and the coding unit is configured to convert the analog signal received through the analog input into a digital differential signal for transmission to a corresponding digital differential output.
  • the earphone test circuit further includes a first button and a control unit, the first button outputs a first trigger signal to the control unit, and the control unit is configured to be controlled according to the first trigger signal
  • the storage unit outputs the digital audio signal.
  • the earphone test circuit further includes a second button, the second button outputs a second trigger signal to the control unit, and the control unit is configured to control the storing according to the second trigger signal The unit increases the power of the digital audio signal.
  • the earphone test circuit further includes a third button, the third button outputs a third trigger signal to the control unit, and the control unit is configured to control the storage according to the third trigger signal The unit reduces the power of the digital audio signal.
  • the decoding unit, the encoding unit, the storage unit, and the control unit are provided by a single chip.
  • the power supply unit includes a battery and a linear regulator, the linear regulator is configured to convert a battery voltage provided by the battery into the first voltage signal, and the first voltage The signal is output to the power pin of the USB socket.
  • the earphone test circuit further includes a voltage conversion unit configured to convert the first voltage signal into a second voltage signal to supply power to other units.
  • the voltage conversion unit is provided by a linear regulator.
  • the inventors of the present invention have found that in the prior art, there is a problem that the earphone is tested by an electronic device, resulting in a high cost. Therefore, the technical task to be achieved by the present invention or the technical problem to be solved is not thought of or expected by those skilled in the art, so the present invention is a new technical solution.
  • FIG. 1 is a block schematic diagram of an implementation structure of a headphone test circuit in accordance with the present invention
  • FIG. 2 is a block schematic diagram showing another implementation structure of a headphone test circuit according to the present invention.
  • FIG. 3 is a block schematic diagram of a third implementation structure of a headphone test circuit in accordance with the present invention.
  • FIG. 4 is a circuit schematic diagram of an implementation structure of a headphone test circuit in accordance with the present invention.
  • U11 decoding unit
  • U12 coding unit
  • U13 storage unit
  • U14 control unit
  • U1 single chip microcomputer
  • U21 power supply unit
  • U22 voltage conversion unit
  • J1 3.5mm socket
  • J2 USB socket
  • R right channel contact
  • L left channel contact
  • M microphone contact
  • VCC1 first voltage signal
  • VCC2 second voltage signal
  • C1, C2, C3 trigger signal
  • SW1, SW2, SW3 button; GND: ground terminal;
  • VBUS power supply pin of Type-C socket
  • GND2 grounding pin of USB socket
  • J21 Type-C socket
  • DR digital audio signal
  • DM1, DM2 digital voice signal
  • AM1 analog voice signal
  • AR1 analog audio signal
  • AM2 analog voice signal
  • RX+, RX-, TX+, TX- differential pins for Type-C sockets
  • RX1+, RX1- digital differential input of the decoding unit
  • TX3+, TX3- audio differential output of the storage unit
  • DVCC Power supply pin for the microcontroller.
  • the present invention provides a headphone testing circuit, as shown in FIG. 1, including a decoding unit U11, The coding unit U12, the storage unit U13, the USB socket J2 for connecting the USB interface playback device, and the 3.5mm socket J1 for connecting the 3.5mm interface to be tested, wherein the earphone to be tested has a microphone, and the storage unit is set to be stored.
  • the digital audio signal DR, and the digital audio signal DR is sent to the decoding unit U11; the decoding unit U11 is arranged to decode the received digital audio signal DR to obtain an analog audio signal AR2, and transmit the analog audio signal AR2 to 3.5 mm
  • the earphone connected to the socket J1 is played for playing; the encoding unit U12 is configured to receive the analog voice signal AM2 sent by the microphone of the earphone to be tested via the 3.5mm socket J1, and encode the analog voice signal AM2 to obtain a digital voice signal DM2.
  • the digital voice signal DM2 is sent to the playback device for playback via the USB socket J2.
  • the analog voice signal AM2 is collected by the microphone of the earphone to be tested; the playback device may be, for example, a USB interface earphone or a speaker.
  • the earphone test circuit can perform performance tests on the microphone and speaker of the 3.5mm interface earphone and the USB interface earphone at the same time.
  • the plug of the 3.5mm interface earphone needs to be inserted into the 3.5mm socket J1 of the earphone test circuit, and the earphone or the speaker corresponding to the plug can be inserted into the USB socket J2, and the 3.5mm can be played.
  • the speaker of the 3.5mm interface earphone can play the audio signal, thereby detecting the speaker of the 3.5mm interface earphone.
  • the performance, in this way, the performance test of the earphone by the earphone test circuit in this embodiment can enrich the test scenario of the earphone test circuit and reduce the test cost.
  • the USB socket J2 may be, for example, a USB A-type socket, a micro-USB socket, a mini-USB socket, or a Type-C socket.
  • the USB socket J2 is a Type-C socket as an example.
  • the receiving end and the transmitting end of the Type-C socket are digital differential pins, for example, the receiving end is a pin RX+, RX-, and the transmitting end is a pin TX+, TX-, therefore, the storage unit U13 can output to the Type-
  • the digital audio signal of the C socket J21 is a digital differential signal.
  • the 3.5mm socket J1 has a left channel contact L, a right channel contact R, a microphone contact M and a ground contact.
  • encoding unit U12 has an input for simulation
  • the analog input terminal IN2 of the voice signal AM2 and the digital differential output terminals TX2+ and TX2- for outputting the digital voice signals DM1 and DM2, and the audio differential output terminals TX3+ and TX3- are connected to the digital differential input terminals RX1+ and RX1, that is, the storage
  • the output terminal TX3+ of the unit U13 is connected to the input terminal RX1+ of the decoding unit U11
  • the output terminal TX3- of the storage unit U13 is connected to the input terminal RX1- of the decoding unit U11
  • the microphone contact M of the 3.5mm socket is connected to the analog input terminal IN2.
  • the digital differential output terminals TX2+ and TX2- are connected to the RX+ pin and the RX- pin of the Type-C socket J21, that is, the output terminal TX2+ of the coding unit U12 is connected to the RX+ pin of the Type-C socket J21, and the coding unit U12 is connected.
  • the output terminal TX2- is connected to the RX- pin of the Type-C socket J21; the encoding unit U12 is arranged to convert the analog signal received via the analog input terminal IN2 into a digital differential signal, and transmit the digital differential signal to the corresponding number Differential outputs TX2+, TX2-.
  • the 3.5mm socket J1 can also be connected to the 3.5mm interface playback device, and the USB interface J2 can also be connected to the USB interface to be tested.
  • the storage unit U13 is set to store the number.
  • the audio signal DR is sent to the earphone connected to the USB socket J2 for playing;
  • the decoding unit U11 is configured to decode the digital voice signal DM1 sent by the microphone of the earphone to be tested through the USB socket J2 to obtain an analog voice.
  • the signal AM1 is sent to the playback device for playback by the 3.5mm socket, wherein the digital voice signal DM1 is collected by the earphone to be tested; the playback device may be, for example, a 3.5mm interface earphone or a speaker.
  • the plug of the USB interface earphone needs to be inserted into the USB socket J2 of the earphone test circuit, and by inserting a corresponding plug earphone or a speaker and other playback devices in the 3.5mm socket J1, Playing the voice signal collected by the microphone of the earphone to be tested to detect the microphone performance of the USB interface earphone; the USB interface earphone receives the audio signal output by the storage unit U13, and plays the audio signal through the speaker of the earphone to be tested, thereby detecting the USB interface
  • the speaker performance of the earphone so that the performance test of the USB interface earphone can be performed by the earphone test circuit of the present invention, and the test cost can be effectively reduced.
  • the memory unit U13 may have a pair of audio differential outputs TX3+, TX3- for outputting the digital audio signal DR; the decoding unit U11 may have a digital differential input for receiving the digital voice signal DM1. RX1+, RX1-, and analog output terminals OUT1 and OUT2 for outputting analog voice signals AM11 and AM12, wherein analog outputs OUT1 and OUT2 It may be the same output or different output.
  • the decoding unit U11 may be implemented by a codec chip.
  • the analog voice signal may include a left channel signal and a right channel signal, and the decoding unit U11 will have a left channel signal and a right channel.
  • the channel signals are respectively transmitted to the analog output terminals OUT1 and OUT2. Therefore, the analog output terminal OUT1 is connected to the left channel contact L, and the analog output terminal OUT2 is connected to the right channel contact R to transmit the left channel signal to the left.
  • the channel contact L transmits the right channel signal to the right channel contact R.
  • the TX+ pin and the TX- pin of the Type-C socket J21 are connected to the digital differential input terminals RX1+ and RX1-, that is, the TX+ pin of the Type-C socket J21 is connected to the input terminal RX1+ of the decoding unit U11, and the Type-C socket is connected.
  • the earphone test circuit may further include a first button SW1 and a control unit U14.
  • the first button SW1 outputs a first trigger signal C1 to the control unit U14, and the control unit U14 is set to be controlled according to the first trigger signal C1.
  • the storage unit U13 outputs a digital audio signal, wherein the first trigger signal C1 can be, for example, a low-level pulse. If the digital audio signal DR is not output by the storage unit U13, if the control unit U14 receives the first trigger signal C1 The control unit U13 outputs a digital audio signal.
  • the USB interface to be tested by the USB socket J2 or the 3.5mm interface to be tested connected by the 3.5mm socket J1 will play the audio signal; the digital unit outputs the number in the storage unit U13.
  • the control unit U14 receives the first trigger signal C1
  • the control storage unit U13 stops outputting the digital audio signal, and stops the speaker of the earphone to be tested.
  • the earphone test circuit may further include a second button SW2, and the second button SW2 outputs a second trigger signal C2 to the control unit U14, and the control unit U14 is configured to control the storage unit U13 to increase the digital audio according to the second trigger signal C2.
  • the power of the signal wherein the second trigger signal C2 can be, for example, a low-level pulse.
  • the memory unit U13 outputs the digital audio signal
  • the control unit U14 receives the second trigger signal C2
  • the memory unit U13 is controlled.
  • the power of the output digital audio signal is increased.
  • the digital audio signal power may be increased, for example, in the form of an arithmetic progression.
  • the earphone test circuit may further include a third button SW3, and the third button SW3 outputs a third trigger signal C3 to the control unit U14, and the control unit U14 is set according to the third trigger signal C3.
  • the control storage unit U13 reduces the power of the digital audio signal, wherein the third trigger signal C3 can be, for example, a low-level pulse. If the storage unit U13 outputs the digital audio signal, if the control unit U14 receives the third trigger The signal C3 will control the memory unit U13 to reduce the power of the output digital audio signal. Specifically, the digital audio signal power can be reduced, for example, in the form of an arithmetic progression.
  • the output terminal TX3+ of the storage unit U13 and the output terminal TX2+ of the encoding unit U12 are both connected to the pin RX+ of the Type-C socket J21 through the pin P1.4 of the single chip U1; the output terminal TX3- of the storage unit U13 and the encoding unit U12
  • the output terminal TX2- is connected to the pin RX- of the Type-C socket J21 through the pin P1.3 of the single chip U1; the pin TX+ of the Type-C socket J21 is passed through the pin P1.5 of the single chip U1 and the decoding unit U11
  • the output terminal RX1+ is connected; the pin TX- of the Type-C socket J21 is connected to the output terminal RX1- of the decoding unit U11 through the pin P1.6 of the single chip U1; the decoding unit U11
  • the analog output terminal OUT1 is connected to the left channel contact L of the 3.5mm socket J1 via the pin P2.1 of the single chip U1; the analog output terminal OUT2 of the
  • the right channel contact R is connected; the microphone contact M of the 3.5mm socket J1 is connected to the analog input terminal IN2 of the coding unit U12 via the pin P1.7 of the microcontroller U1.
  • the button SW1 can be connected between the I/O pin P1.0 of the single chip U1 and the ground GND, and the button SW2 is connected between the I/O pin P1.1 of the single chip U1 and the ground GND, and the button SW2 Connected between the I/O pin P1.2 of the microcontroller U1 and the ground GND, so that when any button is pressed, a low-level pulse trigger signal is generated, for example, the digital audio is not output on the U1 chip.
  • the digital audio signal is output to the differential pin RX+, RX- corresponding to the Type-C socket J21;
  • the digital audio signal is output, if the I/O pin P1.1 detects a low level pulse, the power of the output digital audio signal is increased.
  • the grounding pin GND2 of the Type-C socket J21, the grounding contact G of the 3.5mm socket J1, and the grounding pin of the microcontroller U1 are all connected to the grounding terminal GND.
  • the earphone test circuit further includes a power supply unit U21 configured to output a first voltage signal VCC1 to a power supply pin VBUS of the Type-C socket J21, wherein the power supply unit U21 can Including the battery, for example, when the supply voltage of the Type-C interface earphone is 5V, if the battery supply voltage is greater than 5V, for example, 12V, the voltage unit U21 also includes a linear regulator capable of converting 12V voltage into 5V voltage.
  • the power supply unit U21 may be provided by a battery having an output voltage of 5V or a powered USB data line.
  • the power supply voltage of the single chip U1 is usually less than 5V, for example, 1.8V-3.3V
  • the earphone test circuit further includes a voltage conversion unit U22, and the voltage conversion unit U22 is set.
  • the voltage conversion unit U22 can be, for example, a linear regulator, and the model thereof can be, for example, the LM1117.

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  • Health & Medical Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Otolaryngology (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Acoustics & Sound (AREA)
  • Signal Processing (AREA)
  • Headphones And Earphones (AREA)
  • Circuit For Audible Band Transducer (AREA)

Abstract

一种耳机测试电路，包括解码单元（U11）、编码单元（U12）、存储单元（U13）、USB插座（J2）和3.5mm插座（J1），存储单元（U13）被设置存储数字音频信号（DR），并将数字音频信号（DR）发送至解码单元（U11）；解码单元（U11）被设置为对数字音频信号（DR）进行解码处理得到模拟音频信号（AR2），并将模拟音频信号（AR2）经3.5mm插座（J1）传送至待测耳机进行播放；编码单元（U12）被设置为接收待测耳机的麦克风经3.5mm插座（J1）发送的模拟语音信号（AM2），并对模拟语音信号（AM2）进行编码处理得到数字语音信号（DM1，DM2），再将数字语音信号（DM1，DM2）经USB插座（J2）发送至播放设备进行播放。利用该耳机测试电路，能够对3.5mm接口耳机的扬声器和麦克风性能进行测试，且成本较低。

Description

一种耳机测试电路 技术领域
本发明涉及电路设计技术领域，更具体地，本发明涉及一种耳机测试电路。
背景技术
随着带支持USB接口耳机的电子设备逐渐增多，用户对USB接口耳机的需求也越来越大，现有的USB接口耳机在出厂之前，需对USB接口耳机的麦克风和扬声器性能进行测试，具体的是，测试USB接口耳机的扬声器是否能够正常发声，麦克风是否能够正常采集语音，以保证USB接口耳机能够正常使用。
在现有技术中可以通过电子设备对耳机进行测试，但是这使得耳机测试的成本较高。
发明内容
本发明的一个目的是提供一种低成本的测试耳机麦克风和扬声器性能的新技术方案。
根据本发明的第一方面，提供了一种耳机测试电路，包括解码单元、编码单元、存储单元、用于连接播放设备的USB插座和用于连接待测耳机的3.5mm插座，所述存储单元被设置存储数字音频信号，并将所述数字音频信号发送至所述解码单元；所述解码单元被设置为对所述数字音频信号进行解码处理得到模拟音频信号，并将所述模拟音频信号经所述3.5mm插座传送至所述待测耳机进行播放；所述编码单元被设置为接收所述待测耳机的麦克风经所述3.5mm插座发送的模拟语音信号，并对所述模拟语音信号进行编码处理得到数字语音信号，再将所述数字语音信号经所述USB插座发送至所述播放设备进行播放。
可选的是，所述USB插座为Type-C插座。
可选的是，所述耳机测试电路还包括编码单元，所述解码单元具有用于输入数字音频信号的数字差分输入端、及用于输出模拟音频信号的模拟输出端，所述存储单元具有一对用于输出预先存储的数字音频信号的音频差分输出端，所述编码单元具有模拟输入端和数字差分输出端，所述音频差分输出端与所述数字差分输入端对应连接，所述模拟输出端与所述3.5mm插座的左声道触点和右声道触点对应连接；所述3.5mm插座的麦克风触点与所述模拟输入端连接，所述数字差分输出端与所述Type-C插座的RX+引脚和RX-引脚对应连接，所述编码单元被设置为将经所述模拟输入端接收的模拟信号转换为数字差分信号传输至对应的数字差分输出端。
可选的是，所述耳机测试电路还包括第一按键和控制单元，所述第一按键向所述控制单元输出第一触发信号，所述控制单元被设置为根据所述第一触发信号控制所述存储单元输出所述数字音频信号。
可选的是，所述耳机测试电路还包括第二按键，所述第二按键向所述控制单元输出第二触发信号，所述控制单元被设置为根据所述第二触发信号控制所述存储单元增大所述数字音频信号的功率。
可选的是，所述耳机测试电路还包括第三按键，所述第三按键向所述控制单元输出第三触发信号，所述控制单元被设置为根据所述第三触发信号控制所述存储单元减小所述数字音频信号的功率。
可选的是，所述解码单元、所述编码单元、所述存储单元和所述控制单元由一单片机芯片提供。
可选的是，所述耳机测试电路还包括电源单元，所述电源单元被设置为输出第一电压信号至所述USB插座的电源引脚。
可选的是，所述电源单元包括电池和线性稳压器，所述线性稳压器被设置为将所述电池提供的电池电压转换为所述第一电压信号，并将所述第一电压信号输出至所述USB插座的电源引脚。
可选的是，所述耳机测试电路还包括电压转换单元，所述电压转换单元被设置为将所述第一电压信号转换为第二电压信号、以向其他单元供电。
可选的是，所述电压转换单元由线性稳压器提供。
本发明的发明人发现，在现有技术中，存在通过电子设备对耳机进行测试导致成本较高的问题。在因此，本发明所要实现的技术任务或者所要解决的技术问题是本领域技术人员从未想到的或者没有预期到的，故本发明是一种新的技术方案。
本发明的一个有益效果在于，通过本发明的耳机测试电路，能够使得该耳机测试电路连接的3.5mm接口耳机的扬声器播放存储单元存储的音频信号，使得3.5mm接口耳机的麦克风采集的语音信号能够经USB插座连接的播放设备进行播放，这样，就实现了对3.5mm接口耳机的扬声器和麦克风性能的测试，且成本较低。
通过以下参照附图对本发明的示例性实施例的详细描述，本发明的其它特征及其优点将会变得清楚。
附图说明
被结合在说明书中并构成说明书的一部分的附图示出了本发明的实施例，并且连同其说明一起用于解释本发明的原理。
图1为根据本发明一种耳机测试电路的一种实施结构的方框原理图；
图2为根据本发明一种耳机测试电路的另一种实施结构的方框原理图；
图3为根据本发明一种耳机测试电路的第三种实施结构的方框原理图；
图4为根据本发明一种耳机测试电路的一种实施结构的电路原理图。
附图标记说明：
U11：解码单元；              U12：编码单元；
U13：存储单元；              U14：控制单元；
U1：单片机；                 U21：电源单元；
U22：电压转换单元；          J1：3.5mm插座；
J2：USB插座；                R：右声道触点；
L：左声道触点；              M：麦克风触点；
G：接地触点；                VCC1：第一电压信号；
VCC2：第二电压信号；         C1、C2、C3：触发信号；
OUT1、OUT2：模拟输出端；     IN3：模拟输入端；
SW1、SW2、SW3：按键；        GND：接地端；
VBUS：Type-C插座的电源引脚； GND2：USB插座的接地引脚；
J21：Type-C插座；            DR：数字音频信号；
DM1、DM2：数字语音信号；     AM1：模拟语音信号；
AR1：模拟音频信号；          AM2：模拟语音信号；
RX+、RX-、TX+、TX-：Type-C插座的差分引脚；
RX1+、RX1-：解码单元的数字差分输入端；
TX2+、TX2-：编码单元的数字差分输出端；
TX3+、TX3-：存储单元的音频差分输出端；
P1.0、P1.1、P1.2、P1.3、P1.4、P1.5、P1.6、P1.7、P2.0、P2.1：单片机的I/O引脚；
DVCC：单片机的电源引脚。
具体实施方式
现在将参照附图来详细描述本发明的各种示例性实施例。应注意到：除非另外具体说明，否则在这些实施例中阐述的部件和步骤的相对布置、数字表达式和数值不限制本发明的范围。
以下对至少一个示例性实施例的描述实际上仅仅是说明性的，决不作为对本发明及其应用或使用的任何限制。
对于相关领域普通技术人员已知的技术、方法和设备可能不作详细讨论，但在适当情况下，所述技术、方法和设备应当被视为说明书的一部分。
在这里示出和讨论的所有例子中，任何具体值应被解释为仅仅是示例性的，而不是作为限制。因此，示例性实施例的其它例子可以具有不同的值。
应注意到：相似的标号和字母在下面的附图中表示类似项，因此，一旦某一项在一个附图中被定义，则在随后的附图中不需要对其进行进一步讨论。
为了解决现有技术中存在通过电子设备对耳机进行测试成本较高的问题，本发明提供了一种耳机测试电路，如图1所示，包括解码单元U11、 编码单元U12、存储单元U13、用于连接USB接口播放设备的USB插座J2、及用于连接3.5mm接口待测耳机的3.5mm插座J1，其中，待测耳机具有麦克风，存储单元被设置为存储数字音频信号DR，并将数字音频信号DR发送至解码单元U11；解码单元U11被设置为对接收的数字音频信号DR进行解码处理得到模拟音频信号AR2，并将该模拟音频信号AR2传送至3.5mm插座J1连接的待测耳机进行播放；编码单元U12被设置为接收待测耳机的麦克风经3.5mm插座J1发送的模拟语音信号AM2，并对该模拟语音信号AM2进行编码处理得到数字语音信号DM2，再将该数字语音信号DM2经USB插座J2发送至播放设备进行播放，其中，模拟语音信号AM2为待测耳机的麦克风采集的；播放设备例如可以是USB接口的耳机或者是扬声器等。
这样，该耳机测试电路就可以同时对3.5mm接口耳机和USB接口耳机的麦克风及扬声器均进行性能测试。在3.5mm接口耳机的测试过程中，需将3.5mm接口耳机的插头插入该耳机测试电路的3.5mm插座J1中，通过在USB插座J2中插入对应插头的耳机或者是扬声器，就可以播放3.5mm接口耳机的麦克风采集到的语音信号，以检测3.5mm接口耳机的麦克风性能；存储单元U13输出的数字音频信号经解码单元U11转换为模拟的左声道音频信号和右声道音频信号后，将左声道音频信号输出至左声道触点L，将右声道音频信号输出至右声道触点R，3.5mm接口耳机的扬声器就可以播放该音频信号，进而检测3.5mm接口耳机的扬声器性能，这样，通过本实施例中的耳机测试电路对耳机进行性能测试，就可以丰富该耳机测试电路的测试场景，降低测试成本。
具体的，USB插座J2例如可以是USB A型插座、micro-USB插座、mini-USB插座或者是Type-C插座中的任意一种，下面以USB插座J2为Type-C插座为例进行说明。
由于Type-C插座的接收端和发送端均为数字差分引脚，例如接收端为引脚RX+、RX-，发送端为引脚TX+、TX-，因此，可以是存储单元U13输出至Type-C插座J21的数字音频信号为数字差分信号，那么，在本发明的一个具体实施例中，3.5mm插座J1具有左声道触点L、右声道触点R、麦克风触点M和接地触点G，如图3所示，编码单元U12具有用于输入模拟 语音信号AM2的模拟输入端IN2、及用于输出数字语音信号DM1、DM2数字差分输出端TX2+、TX2-，音频差分输出端TX3+、TX3-与数字差分输入端RX1+、RX1-对应连接，即存储单元U13的输出端TX3+与解码单元U11的输入端RX1+连接，存储单元U13的输出端TX3-与解码单元U11的输入端RX1-连接；3.5mm插座的麦克风触点M与模拟输入端IN2连接，数字差分输出端TX2+、TX2-与Type-C插座J21的RX+引脚和RX-引脚对应连接，即编码单元U12的输出端TX2+与Type-C插座J21的RX+引脚连接，编码单元U12的输出端TX2-与Type-C插座J21的RX-引脚连接；编码单元U12被设置为将经模拟输入端IN2接收的模拟信号转换为数字差分信号，并将该数字差分信号传输至对应的数字差分输出端TX2+、TX2-。
在本发明的另一个具体实施例中，3.5mm插座J1也可以连接3.5mm接口播放设备，同时，USB接口J2也可以连接USB接口的待测耳机，此时，存储单元U13被设置为存储数字音频信号DR，并将数字音频信号DR发送至USB插座J2连接的待测耳机进行播放；解码单元U11被设置为待测耳机的麦克风经USB插座J2发送的数字语音信号DM1进行解码处理得到模拟语音信号AM1，并将模拟语音信号AM1经3.5mm插座发送至播放设备进行播放，其中，数字语音信号DM1是待测耳机采集的；播放设备例如可以是3.5mm接口的耳机或者是扬声器等。
这样，在USB接口耳机的测试过程中，需将USB接口耳机的插头插入该耳机测试电路的USB插座J2中，通过在3.5mm插座J1中插入对应插头的耳机或者是扬声器等播放设备，就可以播放待测耳机的麦克风采集到的语音信号，以检测USB接口耳机的麦克风性能；USB接口耳机接收存储单元U13输出的音频信号，并通过待测耳机的扬声器播放该音频信号，就能够检测USB接口耳机的扬声器性能，这样，通过本发明的耳机测试电路，能够对USB接口耳机进行性能测试，同时能够有效降低测试成本。
进一步地，如图3所示，存储单元U13可以具有一对用于输出数字音频信号DR的音频差分输出端TX3+、TX3-；解码单元U11可以具有用于接收数字语音信号DM1的数字差分输入端RX1+、RX1-，及用于输出模拟语音信号AM11、AM12的模拟输出端OUT1、OUT2，其中，模拟输出端OUT1和OUT2 可以是同一个输出端，也可以是不同的输出端，解码单元U11可以是通过codec芯片实现，模拟语音信号可以包括左声道信号和右声道信号，解码单元U11将左声道信号和右声道信号分别传送至模拟输出端OUT1和OUT2，因此，模拟输出端OUT1与左声道触点L连接，模拟输出端OUT2与右声道触点R连接，以将左声道信号传送至左声道触点L，将右声道信号传送至右声道触点R。Type-C插座J21的TX+引脚和TX-引脚与数字差分输入端RX1+、RX1-对应连接，即Type-C插座J21的TX+引脚与解码单元U11的输入端RX1+连接，Type-C插座J21的TX-引脚与解码单元U11的输入端RX1-连接；Type-C插座的RX+引脚和RX-引脚与音频差分输出端TX3+、TX3-对应连接，即Type-C插座的RX+引脚与存储单元U13的输出端TX3+连接，Type-C插座的RX-引脚与存储单元U13的输出端TX3-连接；两个模拟输出端OUT1、OUT2分别与左声道触点L和右声道触点R对应连接。
如图3所示，该耳机测试电路还可以包括第一按键SW1和控制单元U14，第一按键SW1向控制单元U14输出第一触发信号C1，控制单元U14被设置为根据第一触发信号C1控制存储单元U13输出数字音频信号，其中，该第一触发信号C1例如可以是低电平脉冲，在存储单元U13未输出数字音频信号DR的情况下，如果控制单元U14接收到该第一触发信号C1，将控制存储单元U13输出数字音频信号，此时，USB插座J2连接的USB接口待测耳机或者是3.5mm插座J1连接的3.5mm接口待测耳机将播放该音频信号；在存储单元U13输出数字音频信号的情况下，如果控制单元U14接收到该第一触发信号C1，将控制存储单元U13停止输出数字音频信号，停止对待测耳机的扬声器进行测试。
进一步地，该耳机测试电路还可以包括第二按键SW2，第二按键SW2向控制单元U14输出第二触发信号C2，控制单元U14被设置为根据第二触发信号C2控制存储单元U13增大数字音频信号的功率，其中，该第二触发信号C2例如可以是低电平脉冲，在存储单元U13输出数字音频信号的情况下，如果控制单元U14接收到该第二触发信号C2，将控制存储单元U13增大输出的数字音频信号的功率，具体的，数字音频信号功率例如可以呈等差数列的形式增大。
在此基础上，如图3所示，该耳机测试电路还可以包括第三按键SW3，第三按键SW3向控制单元U14输出第三触发信号C3，控制单元U14被设置为根据第三触发信号C3控制存储单元U13减小数字音频信号的功率，其中，该第三触发信号C3例如可以是低电平脉冲，在存储单元U13输出数字音频信号的情况下，如果控制单元U14接收到该第三触发信号C3，将控制存储单元U13降低输出的数字音频信号的功率，具体的，数字音频信号功率例如可以呈等差数列的形式降低。
在本发明的一个具体实施例中，上述解码单元U11、编码单元U12、存储单元U13和控制单元U14由一单片机U1提供，该单片机U1的型号例如可以是MSp430G2553，如图4所示，例如可以是但不局限于将单片机的I/O引脚P1.3、P1.4、P1.5、P1.6分别与Type-C插座J21的差分引脚RX-、RX+、TX-、TX+对应连接，将单片机的I/O引脚P1.7、P2.0、P2.1分别与3.5mm插座J1的麦克风触点M、右声道触点R和左声道触点L对应连接，此时，存储单元U13的输出端TX3+和编码单元U12的输出端TX2+均通过单片机U1的引脚P1.4与Type-C插座J21的引脚RX+连接；存储单元U13的输出端TX3-和编码单元U12的输出端TX2-均通过单片机U1的引脚P1.3与Type-C插座J21的引脚RX-连接；Type-C插座J21的引脚TX+通过单片机U1的引脚P1.5与解码单元U11的输出端RX1+连接；Type-C插座J21的引脚TX-通过单片机U1的引脚P1.6与解码单元U11的输出端RX1-连接；解码单元U11的模拟输出端OUT1经单片机U1的引脚P2.1与3.5mm插座J1的左声道触点L连接；解码单元U11的模拟输出端OUT2经单片机U1的引脚P2.0与3.5mm插座J1的右声道触点R连接；3.5mm插座J1的麦克风触点M经单片机U1的引脚P1.7与编码单元U12的模拟输入端IN2连接。例如还可以将按键SW1连接在单片机U1的I/O引脚P1.0与接地端GND之间，按键SW2连接在单片机U1的I/O引脚P1.1与接地端GND之间，按键SW2连接在单片机U1的I/O引脚P1.2与接地端GND之间，这样，在任一按键被按下时，都会产生一个低电平的脉冲触发信号，例如在单片机U1在未输出数字音频信号时，如果I/O引脚P1.0检测到一个低电平脉冲，则输出数字音频信号至Type-C插座J21对应的差分引脚RX+、RX-；在单片机U1输 出数字音频信号时，如果I/O引脚P1.1检测到一个低电平脉冲，则增大输出数字音频信号的功率。Type-C插座J21的接地引脚GND2、3.5mm插座J1的接地触点G、单片机U1的接地引脚均与接地端GND连接。在此，图4中仅示出了本实施例中使用的引脚。
在本发明的一个具体实施例中，该耳机测试电路还包括电源单元U21，电源单元U21被设置为输出第一电压信号VCC1至Type-C插座J21的电源引脚VBUS，其中，电源单元U21可以包括电池，例如在Type-C接口耳机的供电电压为5V的情况下，如果电池的供电电压大于5V例如为12V，则电压单元U21中还包括一个能够将12V电压转换为5V电压的线性稳压器；也可以是电源单元U21可以是由输出电压为5V的电池或者是接电的USB数据线提供的。
进一步地，为了降低该耳机测试电路的功耗，单片机U1的供电电压通常小于5V，例如可以是1.8V-3.3V，那么，该耳机测试电路还包括电压转换单元U22，电压转换单元U22被设置为将第一电压信号VCC1转换为第二电压信号VCC2、以向解码单元U11和存储单元U13供电，具体的，如图4所示，电压转换单元U22输出的第二电压信号VCC2传送至单片机U1的电源引脚DVCC。其中，该电压转换单元U22例如可以是线性稳压器，其型号例如可以是LM1117。
上述各实施例主要重点描述与其他实施例的不同之处，但本领域技术人员应当清楚的是，上述各实施例可以根据需要单独使用或者相互结合使用。
虽然已经通过例子对本发明的一些特定实施例进行了详细说明，但是本领域的技术人员应该理解，以上例子仅是为了进行说明，而不是为了限制本发明的范围。本领域的技术人员应该理解，可在不脱离本发明的范围和精神的情况下，对以上实施例进行修改。本发明的范围由所附权利要求来限定。

Claims (10)

  1. 一种耳机测试电路，其特征在于，包括解码单元(U11)、编码单元(U12)、存储单元(U13)、用于连接播放设备的USB插座(J2)、及用于连接待测耳机的3.5mm插座(J1)，所述存储单元(U13)被设置存储数字音频信号(DR)，并将所述数字音频信号(DR)发送至所述解码单元(U11)；所述解码单元(U11)被设置为对所述数字音频信号(DR)进行解码处理得到模拟音频信号(AR2)，并将所述模拟音频信号(AR2)经所述3.5mm插座(J1)传送至所述待测耳机进行播放；所述编码单元(U12)被设置为接收所述待测耳机的麦克风经所述3.5mm插座(J1)发送的模拟语音信号(AM2)，并对所述模拟语音信号(AM2)进行编码处理得到数字语音信号(DM2)，再将所述数字语音信号(DM2)经所述USB插座(J2)发送至所述播放设备进行播放。
  2. 根据权利要求1所述的耳机测试电路，其特征在于，所述USB插座(J2)为Type-C插座(J21)。
  3. 根据权利要求2所述的耳机测试电路，其特征在于，所述解码单元(U11)具有用于输入数字音频信号的数字差分输入端(RX1+，RX1-)、及用于输出模拟音频信号的模拟输出端(OUT1，OUT2)，所述存储单元(U13)具有一对用于输出预先存储的数字音频信号的音频差分输出端(TX3+，TX3-)，所述编码单元(U12)具有模拟输入端(IN2)和数字差分输出端(TX2+、TX2-)，所述音频差分输出端(TX3+，TX3-)与所述数字差分输入端(RX1+，RX1-)对应连接，所述模拟输出端(OUT1，OUT2)与所述3.5mm插座的左声道触点(L)和右声道触点(R)对应连接；所述3.5mm插座(J1)的麦克风触点(M)与所述模拟输入端(IN2)连接，所述数字差分输出端(TX2+、TX2-)与所述Type-C插座(J21)的RX+引脚和RX-引脚对应连接，所述编码单元(U12)被设置为将经所述模拟输入端(IN2)接收的模拟信号转换为数字差分信号传输至对应的数字差分输出端(TX2+、TX2-)。
  4. 根据权利要求1-3中任一项所述的耳机测试电路，其特征在于，所述耳机测试电路还包括第一按键(SW1)和控制单元(U14)，所述第一按 键(SW1)向所述控制单元(U14)输出第一触发信号(C1)，所述控制单元(U14)被设置为根据所述第一触发信号(C1)控制所述存储单元(U13)输出所述数字音频信号。
  5. 根据权利要求4所述的耳机测试电路，其特征在于，所述耳机测试电路还包括第二按键(SW2)，所述第二按键(SW2)向所述控制单元(U14)输出第二触发信号(C2)，所述控制单元(U14)被设置为根据所述第二触发信号(C2)控制所述存储单元(U13)增大所述数字音频信号的功率。
  6. 根据权利要求4或5所述的耳机测试电路，其特征在于，所述耳机测试电路还包括第三按键(SW3)，所述第三按键(SW3)向所述控制单元(U14)输出第三触发信号(C3)，所述控制单元(U14)被设置为根据所述第三触发信号(C3)控制所述存储单元(U13)减小所述数字音频信号的功率。
  7. 根据权利要求4-6中任一项所述的耳机测试电路，其特征在于，所述解码单元(U11)、所述编码单元(U12)、所述存储单元(U13)和所述控制单元(U14)由一单片机芯片提供。
  8. 根据权利要求1-7中任一项所述的耳机测试电路，其特征在于，所述耳机测试电路还包括电源单元(U21)，所述电源单元(U21)被设置为输出第一电压信号(VCC1)至所述USB插座(J2)的电源引脚(VBUS)。
  9. 根据权利要求8所述的耳机测试电路，其特征在于，所述电源单元(U21)包括电池和线性稳压器，所述线性稳压器被设置为将所述电池提供的电池电压转换为所述第一电压信号(VCC1)，并将所述第一电压信号(VCC1)输出至所述USB插座(J2)的电源引脚。
  10. 根据权利要求8或9所述的耳机测试电路，其特征在于，所述耳机测试电路还包括电压转换单元(U22)，所述电压转换单元(U22)被设置为将所述第一电压信号(VCC1)转换为第二电压信号(VCC2)、以向其他单元供电。
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