WO2018090904A1 - 测量时延的方法和设备 - Google Patents

测量时延的方法和设备 Download PDF

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Publication number
WO2018090904A1
WO2018090904A1 PCT/CN2017/110879 CN2017110879W WO2018090904A1 WO 2018090904 A1 WO2018090904 A1 WO 2018090904A1 CN 2017110879 W CN2017110879 W CN 2017110879W WO 2018090904 A1 WO2018090904 A1 WO 2018090904A1
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WIPO (PCT)
Prior art keywords
packet
port
physical
port number
timestamp
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PCT/CN2017/110879
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English (en)
French (fr)
Inventor
张锡权
宋建民
魏家宏
刘麟
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP17872530.5A priority Critical patent/EP3528434B1/en
Publication of WO2018090904A1 publication Critical patent/WO2018090904A1/zh
Priority to US16/413,186 priority patent/US10771374B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/50—Testing arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/12—Shortest path evaluation
    • H04L45/121—Shortest path evaluation by minimising delays
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0852—Delays
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/74—Address processing for routing

Definitions

  • the present invention relates to the field of communications, and in particular, to a method and apparatus for time delay measurement.
  • TWAMP Two-Way Active Measurement Protocol
  • IP Internet Protocol
  • FPM Flow Performance Measurement
  • the present application provides a method and device for measuring time delay, which can more accurately measure the delay of processing a packet by a network device.
  • the present application provides a method for measuring a time delay, the method comprising: receiving, by a physical layer chip of a first physical port of a network device, a medium access control to the first physical port (English: The media access control (MAC) chip sends the first timestamp and the message.
  • the value of the first timestamp is the time when the packet reaches the physical layer chip of the first physical port.
  • the MAC chip of the first physical port adds the first timestamp to the packet, and sends the packet.
  • the MAC chip of the second physical port receives the packet and extracts the first timestamp of the packet, and then sends the packet to the physical layer chip of the second physical port.
  • the MAC chip of the second physical port receives the second timestamp of the packet, and the second timestamp is sent by the physical layer chip of the second physical port.
  • the value of the second timestamp is the time when the packet reaches the physical layer chip of the second physical port.
  • the network device calculates a processing delay of the packet.
  • the processing delay is a value obtained by subtracting the first timestamp from the second timestamp.
  • the first timestamp in the foregoing solution is added to the packet, and the network device extracts the first timestamp from the packet, and it is easy to match the first timestamp with the corresponding packet, and then subtract the first timestamp according to the second timestamp.
  • the timestamp difference determines the processing delay of the network device. Therefore, the foregoing solution can measure the processing delay of any packet, for example, measuring the processing delay of the ordinary data packet, so that not only the bandwidth is not wasted, but also the ordinary data packet can be directly measured. Delay.
  • the delay measured by the method includes a physical layer chip from the network device into the port to the physical layer chip of the same network device out port, so that not only the physical boundary of the measurement path is more clear and complete, but also the network can be accurately After the delay of the network device is displayed, the delay in the network is segmented and differentiated, which will make the location of network congestion more accurate.
  • the MAC chip of the second physical port sends the first timestamp and the second timestamp.
  • the CPU calculates the delay.
  • the MAC chip of the second physical port calculates a processing delay of the packet.
  • the delay is sent to the CPU, and the CPU does not need to calculate the delay to reduce the burden on the CPU.
  • the method further includes: adding, by the MAC chip of the first physical port, the inbound port number of the packet to the packet before sending the packet.
  • the port number is the port number of the ingress port of the packet.
  • the ingress port of the packet is the first physical port.
  • the network processor of the network device extracts the priority of the packet and the ingress port number, and adds the priority of the packet and the ingress port number to the source MAC address field of the packet.
  • the MAC chip of the second physical port obtains the egress port number of the packet, and extracts the priority of the packet and the ingress port number from the source MAC address field of the packet, where the The priority of the message, the ingress port number and the egress port number are sent to the central processing unit CPU.
  • the egress port number is the port number of the egress port of the packet, and the egress port of the packet is the second physical port.
  • the source MAC address field is used to mark the source information of the packet. After the network processor of the network device receives the packet and before the MAC chip of the egress port receives the packet, the source MAC address field does not need to function, so the network processing of the network device
  • the source MAC address field of the sent message can be modified to include the field of the packet priority and the inbound port number.
  • the network device sends the packet to the MAC chip of the second physical port the MAC chip of the second physical port first extracts the port number and priority information of the packet, and then the MAC chip of the second physical port will source the MAC address.
  • the address information is re-added to the source MAC address field of the message.
  • the network processor modifying the value of the source MAC address field does not affect the normal forwarding of the packet.
  • the processing delay of the packets that are forwarded by the port according to the inbound port number and the outbound port number and the priority port are counted by the CPU to calculate the processing delay for the packets of different priorities to be forwarded between different ingress ports and egress ports. Therefore, the processing delay of packets in different combinations of the ingress port and the outbound port and the priority can be reported to the user.
  • the method further includes: adding, by the MAC chip of the first physical port, the inbound port number of the packet to the packet before sending the packet.
  • the ingress port number is the port number of the ingress port of the packet, and the ingress port of the packet is the first physical port.
  • the first network processor of the network device extracts the priority of the packet and the ingress port number, and sends the priority of the packet and the ingress port number to the second network of the network device processor.
  • the first network processor is a processor of a circuit board on which the first physical port is located.
  • the second network processor is a processor of a circuit board where the second physical port is located.
  • the second network processor extracts the priority of the packet and the ingress port number, and adds the priority of the packet and the ingress port number to a source MAC address field of the packet.
  • the MAC chip of the second physical port obtains the egress port number of the packet, and extracts the priority of the packet and the ingress port number from the source MAC address field of the packet, where the The priority of the message, the ingress port number, and the egress port number are sent to the CPU.
  • the egress port number is the port number of the egress port of the packet
  • the egress port of the packet is the second physical port.
  • the source MAC address field does not need to function again after the network processor receives the message until the message reaches the outgoing MAC chip. Therefore, the second network processor of the network device can modify the source MAC address in the above process, and add the port number and priority information of the packet to the source MAC address field.
  • the MAC chip of the egress port When the packet is sent to the MAC chip of the egress port, the MAC chip of the egress port re-adds the source MAC address information to the source MAC address field of the packet.
  • the second network processor adds the feature information to the source MAC field and forwards the packet, and the MAC chip of the second physical port adds the port number of the packet.
  • the port information and the priority information are extracted and sent to the CPU of the network device.
  • the packets can be classified according to the priority, the inbound port number, and the egress port number. This facilitates the targeted statistics of different port numbers. Outgoing port number and processing delay of priority packets.
  • the MAC chip of the first physical port adds the first timestamp to a cyclic redundancy check field of the packet.
  • the Cyclic Redundancy Check field is the most common type of error check code in the field of data communications and is used to detect or verify errors that may occur in data transmission.
  • the cyclic redundancy check field checks whether the data transmission error occurs at the MAC chip of the network device ingress port, and is no longer required between the MAC chip of the ingress port of the network device and the MAC chip of the second physical port. In the role of testing.
  • the MAC chip of the second physical port extracts the feature information of the packet from the packet, and then adds the CRC field to the packet. Therefore, the MAC chip of the first physical port modifies the value of the source cyclic redundancy check field without affecting the normal transmission of the packet.
  • the application provides a device for measuring a time delay, the device comprising a processor, a first physical port and a second physical port, wherein the first physical port includes a physical of the first physical port The layer chip and the medium access control MAC chip of the first physical port.
  • the second physical port includes a physical layer chip of the second physical port and a MAC chip of the second physical port.
  • the physical layer chip of the first physical port is configured to receive a packet, and send a first timestamp and the packet to the MAC chip of the first physical port.
  • the value of the first timestamp is the time when the message arrives at the physical layer chip of the first physical port.
  • the MAC chip of the first physical port is configured to add the first timestamp to the packet, and send the packet.
  • the MAC chip of the second physical port is configured to receive the packet, extract the first timestamp of the packet, send the packet to a physical layer chip of the second physical port, and receive the A second timestamp sent by the physical chip of the second physical port.
  • the physical layer chip of the second physical port is configured to receive the packet, and send the second timestamp to a MAC chip of the second physical port.
  • the value of the second timestamp is the time when the packet reaches the physical layer chip of the second physical port.
  • the processor is configured to obtain a processing delay of the packet, where the processing delay is a value obtained by subtracting the first timestamp from the second timestamp.
  • the device can measure not only the processing delay of various types of packets, but also the delay of the packet from the physical layer chip at the ingress end of the device to the physical layer chip of the egress port, so that the physical boundary of the measurement path is measured. It is clearer and more accurate to measure the delay of the device processing the message.
  • the processor is configured to receive a processing delay of the packet from a MAC chip of the second physical port.
  • the MAC chip of the second physical port is further configured to calculate a processing delay of the packet.
  • the processing delay of the packet is calculated by the MAC chip of the second physical port of the device, and the CPU does not need to calculate the delay to reduce the burden on the CPU.
  • the device further includes a network processor, wherein the MAC chip of the first physical port is further configured to add an ingress port number of the packet to the packet.
  • the ingress port number is the packet The port number of the incoming port.
  • the ingress port of the packet is the first physical port.
  • the network processor is configured to extract the priority of the packet and the ingress port number, and add the priority of the packet and the ingress port number to a source MAC field of the packet.
  • the MAC chip of the second physical port is further configured to obtain an egress port number of the packet, and extract a priority of the packet and the ingress port number from the source MAC address field of the packet, Sending the priority of the packet, the ingress port number, and the egress port number to the CPU.
  • the egress port number is a port number of an egress port of the packet.
  • the outbound port of the packet is the second physical port.
  • the device adds the feature information of the packet to the source MAC field and forwards the packet, and then sends the feature information of the inbound port number, the outbound port number, and the priority of the packet to the CPU of the network device.
  • the packets are sorted according to the priority, which facilitates the statistical processing of the delays of the packets of different priorities.
  • the device further includes a first network processor and a second network processor, wherein the MAC chip of the first physical port is further configured to send the message before sending the message
  • the inbound port number of the packet is added to the packet.
  • the ingress port number is the port number of the ingress port of the packet, and the ingress port of the packet is the first physical port.
  • the first network processor is configured to extract a priority of the packet and the ingress port number, and send the priority of the packet and the ingress port number to the second network processor.
  • the first network processor is a processor of a circuit board where the first physical port is located.
  • the second network processor is a processor of a circuit board where the second physical port is located.
  • the second network processor is configured to extract the priority of the packet and the ingress port number, and add the priority of the packet and the ingress port number to a source MAC field of the packet.
  • the MAC chip of the second physical port is further configured to obtain an egress port number of the packet, and extract a priority of the packet and the ingress port number from the source MAC address field of the packet. Sending the priority of the packet, the ingress port number, and the egress port number to the CPU.
  • the egress port number is a port number of an egress port of the packet.
  • the outbound port of the packet is the second physical port.
  • the second network processor adds the feature information to the source MAC field and forwards the packet, and then the MAC chip of the second physical port selects the inbound port number, the outbound port number, and the priority of the packet.
  • the information is extracted and sent to the CPU of the network device.
  • the packets can be classified according to their priorities, which facilitates the statistical processing of delays in processing packets of different priorities.
  • the MAC chip of the first physical port adds the first timestamp to a cyclic redundancy check field of the packet.
  • the MAC chip of the first physical port of the network device adds a timestamp to the cyclic redundancy check field of the packet, so as to avoid adding a field directly to the packet, increasing the packet length and wasting bandwidth.
  • FIG. 1 is a schematic diagram of a possible application scenario according to an embodiment of the present invention.
  • FIG. 2 is a schematic flowchart of a method for measuring a delay according to an embodiment of the present invention.
  • FIG. 3A is a schematic structural diagram of an apparatus for measuring delay according to an embodiment of the present invention.
  • FIG. 3B is a schematic structural diagram of another apparatus for measuring delay according to an embodiment of the present invention.
  • FIG. 1 is a schematic diagram of an application scenario according to an embodiment of the present invention.
  • the network device 101 may be a forwarding device, such as a router, a switch, an optical transport network (OTN) device, a packet transport network (PTN) device, and a wavelength division multiplexing (English: Wavelength-division multiplexing, WDM) equipment.
  • a forwarding device such as a router, a switch, an optical transport network (OTN) device, a packet transport network (PTN) device, and a wavelength division multiplexing (English: Wavelength-division multiplexing, WDM) equipment.
  • OTN optical transport network
  • PDN packet transport network
  • WDM Wavelength-division multiplexing
  • the present application measures the delay of processing the packet by the network device, that is, the process of the packet passing through the network device 101.
  • the delay from the ingress port 103 to the egress port 104.
  • the network device may be the foregoing forwarding device, as described above, so that the bandwidth is not wasted, the forwarding of other normal service packets is affected, and the delay of processing various types of packets by the network device can be measured more accurately.
  • the time delays in the network are segmented and accurately differentiated and displayed, which facilitates the location of network congestion faults.
  • FIG. 2 is a schematic flowchart diagram of a method for measuring a delay according to an embodiment of the present invention.
  • the method can be applied to the application scenario shown in FIG. 1.
  • the network device in the method shown in FIG. 2 may be the network device 101 or the network device 102 shown in FIG. 1.
  • the method includes the following steps.
  • the physical layer chip of the first physical port of the network device receives the packet, and sends the first timestamp and the packet to the media access control MAC chip of the first physical port.
  • the value of the first timestamp is the time when the message arrives at the physical layer chip of the first physical port.
  • the physical layer chip of the ingress port of the network device records the value of the first timestamp in the register of the physical layer chip while receiving the message, and the first timestamp is used to indicate the time when the packet passes through the physical chip of the port. Then, the ingress physical layer chip sends the received packet and the first timestamp to the MAC chip of the ingress port.
  • the above-mentioned packet is an arbitrary packet that the network device normally receives and forwards, and may not be a detection packet.
  • the MAC chip of the first physical port adds the first timestamp to the packet, and sends the packet.
  • the MAC chip of the ingress port adds the timestamp to the message one by one, and the physical layer chip of the ingress port sends the first timestamp to the MAC chip for a short time.
  • the MAC chip of the ingress port receives the packet and the first timestamp sent by the physical layer chip of the ingress port.
  • the MAC chip of the ingress port can directly add the first timestamp to the packet.
  • the MAC chip of the ingress port can also add the first timestamp to the available fields of the message.
  • the MAC chip of the first physical port adds the first timestamp to a cyclic redundancy check field of the packet.
  • the MAC chip adds the first timestamp to the packet in three ways, because the cyclic redundancy check field of the packet enters the ingress port of the network device to the egress port of the network device.
  • the MAC chip of the ingress port of the network device adds the first timestamp to the cyclic redundancy check field of the packet. This method does not increase the packet length and does not waste bandwidth.
  • the method further includes: adding, by the MAC chip of the first physical port, the inbound port number of the packet to the packet before sending the packet.
  • the port number is the port number of the ingress port of the packet.
  • the ingress port of the packet is the first physical port.
  • the network processor of the network device extracts the priority of the packet and the ingress port number, and adds the priority of the packet and the ingress port number to the source MAC address field of the packet.
  • the MAC chip of the second physical port obtains the egress port number of the packet, and extracts the priority of the packet and the ingress port number from the source MAC address field of the packet, where the The priority of the message, the ingress port number and the egress port number are sent to the central processing unit CPU.
  • the egress port number is the port number of the egress port of the packet, and the egress port of the packet is the second physical port.
  • the ingress port MAC chip adds the inbound port number to the packet, and the network device of the network device receives the packet sent by the inbound port MAC chip, and extracts the priority and entry of the packet from the packet. Port number information, and then the information is added to the source MAC address field of the packet, and then the packet is sent to the MAC chip of the egress port, and the egress port number obtained by the MAC chip of the egress port and the ingress port number obtained from the packet are obtained. And the priority information is sent to the CPU to record the priority, the outbound port number, and the inbound port number information corresponding to the packet.
  • the method further includes: adding, by the MAC chip of the first physical port, the inbound port number of the packet to the packet before sending the packet.
  • the ingress port number is the port number of the ingress port of the packet, and the ingress port of the packet is the first physical port.
  • the first network processor of the network device extracts the priority of the packet and the ingress port number, and sends the priority of the packet and the ingress port number to the second network of the network device processor.
  • the first network processor is a processor of a circuit board on which the first physical port is located.
  • the second network processor is a processor of a circuit board where the second physical port is located.
  • the second network processor extracts the priority of the packet and the ingress port number, and adds the priority of the packet and the ingress port number to a source MAC address field of the packet.
  • the MAC chip of the second physical port obtains the egress port number of the packet, and extracts the priority of the packet and the ingress port number from the source MAC address field of the packet, where the The priority of the message, the ingress port number, and the egress port number are sent to the CPU.
  • the egress port number is the port number of the egress port of the packet
  • the egress port of the packet is the second physical port.
  • the network device includes a plurality of network processors, wherein the network processor on the circuit board of the message in port extracts the port number and priority information of the message in the message, and exchanges information between the modules. These feature information is sent to the network processor on the board where the message egress port is located.
  • the source MAC address field of the packet does not need to function in the process of the packet entering the ingress port of the network device until the packet is sent to the egress port. Therefore, the network processor on the circuit board where the egress port is located will receive these packets.
  • the feature information is added to the source MAC address field of the packet, and the packet is sent to the MAC chip of the packet outbound port.
  • the MAC chip of the egress port extracts the foregoing feature information in the packet, and sends the foregoing feature information and the egress port number of the packet to the CPU.
  • the feature information of the message and the message are simultaneously sent from the network processor of the circuit board where the ingress port is located to the network processor of the circuit board where the egress port is located, and the MAC chip of the egress port simultaneously extracts the first timestamp and The above characteristic information of the message.
  • the MAC chip of the second physical port receives the packet and extracts the first timestamp of the packet, and sends the packet to a physical layer chip of the second physical port.
  • the MAC chip of the outbound port of the packet extracts the value of the first timestamp from the packet, and sends the packet to the physical layer chip of the ingress port.
  • the MAC chip of the second physical port receives the second timestamp of the packet.
  • the second timestamp is sent by a physical layer chip of the second physical port.
  • the value of the second timestamp is the time when the message arrives at the physical layer chip of the second physical port.
  • the MAC chip of the outbound port sends the packet to the physical layer chip of the egress port.
  • the physical layer chip of the outgoing port records the second timestamp with its register and sends the second timestamp to the MAC chip giving the port.
  • the MAC chip extracts the first timestamp from the message and the second timestamp is received at the same time, that is, the MAC chip of the outbound port obtains the values of the first timestamp and the second timestamp almost simultaneously. Therefore, the MAC chip determines the time when the first timestamp and the second timestamp arrive at the same physical layer chip.
  • the network device calculates a processing delay of the packet.
  • the processing delay is a value obtained by subtracting the first timestamp from the second timestamp.
  • the network device After obtaining the first timestamp and the second timestamp, the network device obtains the processing delay by subtracting the value obtained by the first timestamp from the second timestamp, and the network device may calculate the delay by using the service chip, for example, the MAC chip, or The delay is calculated by the network device processor.
  • the service chip for example, the MAC chip
  • the delay measured by the method includes a physical layer chip from the network device into the port to the physical layer chip of the same network device out port, so that not only the physical boundary of the measurement path is more clear and complete, but also the network can be accurately After the delay of the network device is displayed, the delay in the network is segmented and differentiated, which will make the location of network congestion more accurate.
  • the network device calculates a processing delay of the packet, where the MAC chip of the second physical port calculates a processing delay of the packet.
  • the MAC chip of the egress port After the MAC chip of the egress port extracts the first timestamp from the packet and obtains the second timestamp from the physical layer chip of the egress port, the value of the processing delay is obtained by subtracting the first timestamp from the second timestamp, The timestamp obtained by it needs to be uploaded to the processor and the timestamp is calculated by the processor, which reduces the waste of bandwidth.
  • FIG. 3A and FIG. 3B are schematic diagrams showing the structure of two different measurement delays according to an embodiment of the present invention.
  • the device can be applied to the application scenario described in FIG.
  • the device shown in FIG. 3A and FIG. 3B may be the network device 102 and the network device 102 in the application scenario of FIG. 1, and the network device in the method of FIG. 2.
  • the device includes:
  • the processor 301 is a first physical port 302 and a second physical port 305.
  • the first physical port 302 includes a physical layer chip 303 of the first physical port and a MAC chip 304 of the first physical port.
  • the second physical port 305 includes a physical layer chip 306 of the second physical port and a MAC chip 306 of the second physical port.
  • the physical layer chip 303 of the first physical port is configured to receive a packet, and send a first timestamp and the packet to the MAC chip 304 of the first physical port, where the value of the first timestamp is the arrival of the packet.
  • the time of the physical layer chip 303 of the first physical port is described.
  • the MAC chip 304 of the first physical port is configured to add the first timestamp to the message and send the message.
  • the MAC chip 307 of the second physical port is configured to receive the packet and extract the first timestamp of the packet, send the packet to the physical layer chip 306 of the second physical port, and receive the second physics.
  • the second timestamp sent by the physical chip 306 of the port is configured to receive the packet and extract the first timestamp of the packet, send the packet to the physical layer chip 306 of the second physical port, and receive the second physics.
  • the physical layer chip 306 of the second physical port is configured to receive a packet, and send a MAC address to the second physical port.
  • the chip 307 sends the second timestamp, where the value of the second timestamp is the time when the message arrives at the physical layer chip 306 of the second physical port.
  • the processor 301 is configured to obtain a processing delay of the packet, where the processing delay is specifically a value obtained by subtracting the first timestamp from the second timestamp.
  • the device can measure the processing delay of various types of packets, and can measure the delay of the packet from the physical layer chip at the ingress end of the device to the physical layer chip of the egress port. The delay in processing the message.
  • the processor 301 is configured to receive a processing delay of the packet from the MAC chip 307 of the second physical port.
  • the MAC chip 307 of the second physical port is further configured to calculate a processing delay of the packet.
  • the device 300 further includes a network processor 308, wherein the MAC chip 304 of the first physical port 302 is further configured to add an ingress port number of the packet to the packet.
  • the port number is the port number of the ingress port of the packet.
  • the ingress port of the packet is the first physical port 302.
  • the network processor 308 is configured to extract the priority of the packet and the ingress port number, and add the priority of the packet and the ingress port number to a source MAC field of the packet.
  • the MAC chip 307 of the second physical port 305 is further configured to obtain an egress port number of the packet, and extract a priority of the packet and the ingress port from the source MAC address field of the packet. No., sending the priority of the packet, the ingress port number, and the egress port number to the CPU.
  • the egress port number is a port number of an egress port of the packet.
  • the outbound port of the packet is the second physical port 305.
  • the network processor of the router can extract the inbound port number and priority information of the packet and add it to the source MAC field of the packet.
  • the router's network processor 308 then sends the message to the MAC chip 307 of the second physical port.
  • the MAC chip 307 of the second physical port extracts the ingress port number and priority in the message for matching with the aforementioned first timestamp and second timestamp.
  • the device 300 further includes a first network processor 309 and a second network processor 310, where the MAC chip 304 of the first physical port 302 is further configured to send the packet.
  • the inbound port number of the packet is added to the packet.
  • the ingress port number is the port number of the ingress port of the packet, and the ingress port of the packet is the first physical port 302.
  • the first network processor 309 is configured to extract the priority of the packet and the ingress port number, and send the priority of the packet and the ingress port number to the second network processor 310.
  • the first network processor 309 is a processor of the circuit board 311 where the first physical port 302 is located.
  • the second network processor 310 is a processor of the circuit board 312 where the second physical port 305 is located.
  • the second network processor 310 is configured to extract the priority of the packet and the ingress port number, and add the priority of the packet and the ingress port number to a source MAC field of the packet. .
  • the MAC chip of the second physical port 305 is further configured to obtain an egress port number of the packet, and extract a priority of the packet and the ingress port from the source MAC address field of the packet. No., sending the priority of the packet, the ingress port number, and the egress port number to the CPU.
  • the egress port number is a port number of an egress port of the packet.
  • the outbound port of the packet is the second physical port 305.
  • the network of the board where the port is located The network processor extracts the inbound port number and priority information of the packet from the packet, and the information is sent to the network processor of the circuit board where the egress port is located through the inter-module information transmission and the packet.
  • the MAC chip of the outbound port extracts the inbound port number and priority information of the packet from the packet, and sends the obtained outbound port number to the CPU of the device.
  • the MAC chip 304 of the first physical port adds the first timestamp to a cyclic redundancy check field of the packet.

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Abstract

本申请公开了一种测量时延的方法及设备。网络设备的第一物理端口的物理层芯片接收报文，并向所述第一物理端口的介质访问控制MAC芯片发送第一时间戳和所述报文，所述第一物理端口的MAC芯片将所述第一时间戳添加到所述报文中，并发送所述报文，第二物理端口的MAC芯片接收所述报文并提取所述报文的所述第一时间戳，并向所述第二物理端口的物理层芯片发送所述报文，所述第二物理端口的MAC控制芯片接收所述报文的第二时间戳，所述网络设备计算所述报文的处理时延，所述处理时延为所述第二时间戳减去所述第一时间戳得到的值，以实现精确测量网络设备处理报文的时延。

Description

测量时延的方法和设备
本申请要求于2016年11月15日提交中国专利局、申请号为201611006034.7、申请名称为“测量时延的方法和设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及通信领域，尤其涉及一种时延测量的方法和设备。
背景技术
双向主动测量协议(英文：Two-Way Active Measurement Protocol，TWAMP)是一种双向延迟测量技术，主要应用于端到端业务的全路径时延测量和监控。网际协议(英文：Internet Protocol，IP)流性能测量(英文：Flow Performance Measurement，FPM)也是一种应用于端到端业务路径时延测量和监控的方法，同样无法测量由单设备处理报文产生的时延。
发明内容
本申请提供了一种测量时延的方法和设备,该测量方法可以更加精确的测量网络设备处理报文的时延。
第一方面，本申请提供了一种测量时延的方法，该方法包括：网络设备的第一物理端口的物理层芯片接收报文，并向所述第一物理端口的介质访问控制(英文：media access control，MAC)芯片发送第一时间戳和所述报文。其中，第一时间戳的值是所述报文到达所述第一物理端口的物理层芯片的时间。所述第一物理端口的MAC芯片将所述第一时间戳添加到所述报文中，并发送所述报文。第二物理端口的MAC芯片接收所述报文并提取所述报文的所述第一时间戳，然后向所述第二物理端口的物理层芯片发送所述报文。所述第二物理端口的MAC芯片接收所述报文的第二时间戳，所述第二时间戳是所述第二物理端口的物理层芯片发送的。其中，第二时间戳的值是所述报文到达所述第二物理端口的物理层芯片的时间。所述网络设备计算所述报文的处理时延。所述处理时延为所述第二时间戳减去所述第一时间戳得到的值。
使用专用的测量报文测量网络时延不仅会占用带宽，并且可能会影响其它正常业务报文的转发。上述方案中的第一时间戳添加在报文中，网络设备从报文中提取第一时间戳，很容易将第一时间戳与对应报文进行匹配，然后根据第二时间戳减去第一时间戳的差确定网络设备处理时延，因此上述方案可以测量任意报文的处理时延，例如测量普通数据报文的处理时延，这样不仅不会浪费带宽，还可以直接测量普通数据报文的时延。其次，使用该方法测量的时延包括从网络设备入端口的物理层芯片到同一网络设备出端口的物理层芯片，这样不仅使测量路径的物理边界更加清楚和完整，还可以精确将网络中所经过网络设备的时延区分显示出来，将网络中的时延进行分段区分后，也会使网络拥塞的定位将更加准确。
在一种可能的实现方式中，第二物理端口的MAC芯片将第一时间戳和第二时间戳发送 给中央处理器(英文：central processing unit，CPU)，由CPU计算时延。
在一种可能的实现方式中，所述第二物理端口的MAC芯片计算所述报文的处理时延。
第二物理端口的MAC芯片计算所述报文的处理时延后，将所述时延发送给CPU,不需要CPU计算时延，以减少CPU的负担。
在又一种可能的实现方式中，所述方法还包括：所述第一物理端口的MAC芯片发送所述报文前，将所述报文的入端口号添加到所述报文中。所述入端口号为所述报文的入端口的端口号。所述报文的入端口为所述第一物理端口。所述网络设备的网络处理器提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号添加到所述报文的源MAC地址字段。所述第二物理端口的MAC芯片获得所述报文的出端口号，从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级，所述入端口号和所述出端口号发送到中央处理器CPU。所述出端口号为所述报文的出端口的端口号，所述报文的出端口为所述第二物理端口。
源MAC地址字段用于标记报文的来源信息，在网络设备的网络处理器接收报文之后至出端口的MAC芯片接收报文之前，源MAC地址字段不需要发挥作用，所以网络设备的网络处理器可以将发送的报文的源MAC地址字段修改为包含报文优先级和入端口号的字段。网络设备将所述报文发送到在第二物理端口的MAC芯片时，第二物理端口的MAC芯片则先提取报文的端口号和优先级信息，然后第二物理端口的MAC芯片将源MAC地址信息重新添加到报文源MAC地址字段。这样网络处理器修改源MAC地址字段的值不会影响报文的正常转发。CPU按照入端口号，出端口号和优先级归类报文的处理时延，以统计网络设备对不同优先级的报文在不同的入端口和出端口之间被转发的处理时延。因此可以向用户报告入端口，出端口和优先级的不同组合下的报文的处理时延。
在又一种可能的实现方式中，所述方法还包括：所述第一物理端口的MAC芯片发送所述报文前，将所述报文的入端口号添加到所述报文中。所述入端口号为所述报文的入端口的端口号，所述报文的入端口为所述第一物理端口。
所述网络设备的第一网络处理器提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号发送到所述网络设备的第二网络处理器。所述第一网络处理器在所述第一物理端口所在电路板的处理器。所述第二网络处理器在所述第二物理端口所在电路板的处理器。
所述第二网络处理器提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号添加到所述报文的源MAC地址字段。
所述第二物理端口的MAC芯片获得所述报文的出端口号，从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级、所述入端口号和所述出端口号发送到CPU。所述出端口号为所述报文的出端口的端口号，所述报文的出端口为所述第二物理端口。如上所述，在网络处理器接收报文之后至报文达到出端口的MAC芯片之间，源MAC地址字段不需要再发挥作用。因此，网络设备的第二网络处理器可以在上述过程中修改源MAC地址，将报文的端口号和优先级信息添加到源MAC地址字段中。在报文被发送到出端口的MAC芯片时，出端口的MAC芯片再将源MAC地址信息重新添加到报文源MAC地址字段。在上述不会影响报文正常转发的条件下，第二网络处理器将所述特征信息添加到源MAC字段并将报文进行转发，第二物理端口的MAC芯片将报文的入端口号、 出端口号和优先级这些特征信息进行提取并发送到网络设备的CPU，可以实现将报文按照优先级、入端口号和出端口号进行归类，方便有针对性的统计不同入端口号、出端口号以及优先级报文的处理时延。
在又一种可能的实现方式中，所述第一物理端口的MAC芯片将所述第一时间戳添加到所述报文的循环冗余校验字段中。
循环冗余校验字段是数据通信领域中最常见的一种差错校验码，用于检测或者校验数据传输可能出现的错误。循环冗余校验字段在网络设备入端口的MAC芯片处对报文进行校验是否存数据传输错误，从网络设备的入端口的MAC芯片至第二物理端口的MAC芯片之间，不再需要在发挥检验作用。并且，第二物理端口的MAC芯片将报文的特征信息从报文中提取出来后将CRC字段重新添加到报文中。因此，第一物理端口的MAC芯片修改源循环冗余校验字段的值不会影响报文的正常发送。
第二方面，本申请提供了一种测量时延的设备，所述设备包括处理器，第一物理端口和第二物理端口，其中，所述第一物理端口包括所述第一物理端口的物理层芯片和所述第一物理端口的介质访问控制MAC芯片。
所述第二物理端口包括所述第二物理端口的物理层芯片和所述第二物物理端口的MAC芯片。
所述第一物理端口的物理层芯片用于接收报文，并向所述第一物理端口的MAC芯片发送第一时间戳和所述报文。所述第一时间戳的值是所述报文到达所述第一物理端口的物理层芯片的时间。
所述第一物理端口的MAC芯片用于将所述第一时间戳添加到所述报文中，并发送所述报文。
所述第二物理端口的MAC芯片用于接收所述报文并提取所述报文的所述第一时间戳，向所述第二物理端口的物理层芯片发送所述报文，并接收所述第二物理端口的物理芯片发送的第二时间戳。
所述第二物理端口的物理层芯片用于接收所述报文，并向所述第二物理端口的MAC芯片发送所述第二时间戳。所述第二时间戳的值为所述报文到达所述所述第二物理端口的物理层芯片的时间。
处理器用于获取所述报文的处理时延，所述处理时延为所述第二时间戳减去所述第一时间戳得到的值。
上述方案中，该设备不仅可以测量各种类型报文的处理时延，还可以测量报文从该设备的入口端的物理层芯片到出端口的物理层芯片的时延，使得测量路径的物理边界更加清晰，能够更加精确的测量设备处理报文的时延。
在一种可能的实现方式中，所述处理器用于接收来自所述第二物理端口的MAC芯片的所述报文的处理时延。
所述第二物理端口的MAC芯片还用于计算所述报文的处理时延。
上述方案中，由该设备的第二物理端口的MAC芯片计算所述报文的处理时延，而不需要CPU计算时延，以减少CPU的负担。
在又一种可能的实现方式中，所述设备还包括网络处理器，其中，所述第一物理端口的MAC芯片还用于将报文的入端口号添加到所述报文中。所述入端口号为所述报文 的入端口的端口号。所述报文的入端口为所述第一物理端口。
所述网络处理器用于提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号添加到所述报文的源MAC字段。
所述第二物理端口的MAC芯片还用于获得所述报文的出端口号，从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级、所述入端口号和所述出端口号发送到CPU。所述出端口号为所述报文的出端口的端口号。所述报文的出端口为所述第二物理端口。
上述方案中，该设备将报文的特征信息添加到源MAC字段并将报文进行转发，然后将报文的入端口号、出端口号和优先级这些特征信息发送到网络设备的CPU，可以实现将报文按照优先级进行归类，方便有针对性的统计不同优先级报文的处理时延。
在又一种可能的实现方式中，所述设备还包括第一网络处理器和第二网络处理器，其中，所述第一物理端口的MAC芯片还用于在发送所述报文前将所述报文的入端口号添加到所述报文中。所述入端口号为所述报文的入端口的端口号，所述报文的入端口为所述第一物理端口。
所述第一网络处理器用于提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号发送到所述第二网络处理器。所述第一网络处理器为所述第一物理端口所在电路板的处理器。所述第二网络处理器为所述第二物理端口所在电路板的处理器。
所述第二网络处理器用于提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号添加到所述报文的源MAC字段。
所述第二物理端口的MAC芯片还用于获得所述报文的出端口号，并从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级、所述入端口号和所述出端口号发送到CPU。所述出端口号为所述报文的出端口的端口号。所述报文的出端口为所述第二物理端口。
上述方案中，第二网络处理器将所述特征信息添加到源MAC字段并将报文进行转发，然后第二物理端口的MAC芯片将报文的入端口号、出端口号和优先级这些特征信息进行提取并发送到网络设备的CPU，可以实现将报文按照优先级进行归类，方便有针对性的统计不同优先级报文的处理时延。
在又一种可能的实现方式中，所述第一物理端口的MAC芯片将所述第一时间戳添加到所述报文的循环冗余校验字段中。
上述方案中，网络设备的第一物理端口的MAC芯片将时间戳添加到报文的循环冗余校验字段中，避免在报文上直接添加字段而增加报文长度，浪费带宽。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作一简单地介绍，显而易见地，下面描述中的附图是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例一种可能的应用场景示意图。
图2为本发明实施例提供的一种测量时延的方法流程示意图。
图3A为本发明实施例提供的一种测量时延的设备结构示意图。
图3B为本发明实施例提供的一另种测量时延的设备结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所述的实施例是本发明的一部分实施例，而不是全部实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例，都应属于本发明保护的范围。
图1为本发明实施例提供的一种应用场景示意图。网络设备101可以指转发设备，比如可以是路由器、交换机、光传送网(英文：Optical Transport Network，OTN)设备、分组传送网(英文：Packet Transport Network，PTN)设备、波分复用(英文：wavelength-division multiplexing，WDM)设备。
为了更加精确的测量网络设备处理时延，如图1所示，本发明实施例提供的应用场景中，本申请测量的是网络设备处理报文的时延，即指报文经过网络设备101过程中，从入端口103至出端口104的时延。所述网络设备如上所述可以是上述转发设备，这样不仅不会浪费带宽，影响其它正常业务报文的转发，还可以更加精确的测量网络设备处理各种类型报文的时延，也可以在此基础上对网络中所经过的时延进行分段精确化区分显示出来，方便网络拥塞故障的定位。
图2示出了本发明实施例提供的一种测量时延的方法流程示意图。举例来说，所述方法可以应用于图1所示的应用场景中。图2所示的方法中的网络设备，可以是图1中所示的网络设备101或者网络设备102。所述方法包括以下步骤。
S201，网络设备的第一物理端口的物理层芯片接收报文，并向所述第一物理端口的介质访问控制MAC芯片发送第一时间戳和所述报文。所述第一时间戳的值是所述报文到达所述第一物理端口的物理层芯片的时间。
网络设备的入端口的物理层芯片接收到报文的同时在物理层芯片的寄存器记录第一时间戳的值，第一时间戳用于表明报文经过入端口物理芯片的时间。然后入端口物理层芯片将接收的报文和第一时间戳发送给入端口的MAC芯片。上述报文是网络设备正常接收转发的任意报文，可以不是检测报文。
S202，所述第一物理端口的MAC芯片将所述第一时间戳添加到所述报文中，并发送所述报文。
举例来说，由于入端口的MAC芯片是逐一将时间戳添加到报文中的，并且入端口的物理层芯片将第一时间戳发送到MAC芯片的时间很短。入端口的MAC芯片几乎同时接收到报文和入端口物理层芯片发送的第一时间戳。入端口的MAC芯片可以直接将第一时间戳添加到报文中。入端口的MAC芯片还可以将第一时间戳添加到报文的可利用的字段里。
可选的，所述第一物理端口的MAC芯片将所述第一时间戳添加到所述报文的循环冗余校验字段中。
如前步骤S202中所述，MAC芯片将第一时间戳添加到报文中存在三种方式，由于报文的循环冗余校验字段在进入网络设备的入端口至到达网络设备的出端口之间不需要发挥其作用，因此网络设备入端口的MAC芯片将第一时间戳添加到报文的循环冗余校验字段，这种方式不会增加报文长度，不会浪费带宽。
可选的，所述方法还包括：所述第一物理端口的MAC芯片发送所述报文前，将所述报文的入端口号添加到所述报文中。所述入端口号为所述报文的入端口的端口号。所述报文的入端口为所述第一物理端口。所述网络设备的网络处理器提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号添加到所述报文的源MAC地址字段。所述第二物理端口的MAC芯片获得所述报文的出端口号，从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级，所述入端口号和所述出端口号发送到中央处理器CPU。所述出端口号为所述报文的出端口的端口号，所述报文的出端口为所述第二物理端口。
举例来说，入端口的MAC芯片将获得的入端口号添加到报文中，网络设备的网络处理器接收到入端口MAC芯片发送的报文后，从报文提取报文的优先级和入端口号信息，然后将这些信息添加到报文的源MAC地址字段后将报文发送到出端口的MAC芯片，出端口的MAC芯片将获得的出端口号和从报文中获得的入端口号和优先级信息发送到CPU以记录与报文对应的优先级、出端口号和入端口号信息。
可选的，所述方法还包括：所述第一物理端口的MAC芯片发送所述报文前，将所述报文的入端口号添加到所述报文中。所述入端口号为所述报文的入端口的端口号，所述报文的入端口为所述第一物理端口。
所述网络设备的第一网络处理器提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号发送到所述网络设备的第二网络处理器。所述第一网络处理器在所述第一物理端口所在电路板的处理器。所述第二网络处理器在所述第二物理端口所在电路板的处理器。
所述第二网络处理器提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号添加到所述报文的源MAC地址字段。
所述第二物理端口的MAC芯片获得所述报文的出端口号，从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级、所述入端口号和所述出端口号发送到CPU。所述出端口号为所述报文的出端口的端口号，所述报文的出端口为所述第二物理端口。举例来说，网络设备包括多个网络处理器，其中报文入端口的电路板上的网络处理器将报文中的报文入端口号和优先级信息提取出来，并通过模块间的信息交换将这些特征信息发送给报文出端口所在电路板上的网络处理器。由于报文的源MAC地址字段在报文进入该网络设备的入端口至报文被发送到出端口的过程中不需要发挥作用，因此出端口所在电路板上的网络处理器将报文的这些特征信息添加到报文的源MAC地址字段，并将报文发送到报文出端口的MAC芯片。出端口的MAC芯片提取报文中的上述特征信息，并将报文的上述特征信息和出端口号发送到CPU。在上述方案中，报文的这些特征信息与报文同时从入端口所在电路板的网络处理器被发送到出端口所在电路板的网络处理器，出端口的MAC芯片同时提取第一时间戳和报文的上述特征信息。
S203，第二物理端口的MAC芯片接收所述报文并提取所述报文的所述第一时间戳，向所述第二物理端口的物理层芯片发送所述报文。
举例来说，所述报文的出端口的MAC芯片将接收到报文后，从报文中提取第一时间戳的值，并将报文向入端口的物理层芯片发送。
S204，所述第二物理端口的MAC芯片接收所述报文的第二时间戳。所述第二时间戳是所述第二物理端口的物理层芯片发送的。所述第二时间戳的值是所述报文到达所述第二物理端口的物理层芯片的时间。
出端口的MAC芯片将报文发送到出端口的物理层芯片。出端口的物理层芯片利用其寄存器记录第二时间戳，并将第二时间戳发送给出端口的MAC芯片。MAC芯片从报文中提取第一时间戳与接收到第二时间戳几乎发生在同时，也就是说出端口的MAC芯片几乎同时获得第一时间戳和第二时间戳的值。因此MAC芯片确定第一时间戳和第二时间戳同一个报文到达不同物理层芯片的时间。
S205，所述网络设备计算所述报文的处理时延。所述处理时延为所述第二时间戳减去所述第一时间戳得到的值。
网络设备在获得第一时间戳和第二时间戳后，通过第二时间戳减去第一时间戳得到的值获得处理时延，网络设备可以通过业务芯片计算时延，例如MAC芯片，也可以通过该网络设备处理器计算时延。
上述方案可以使用任意报文测量时延，不需要不仅不会浪费带宽，并且不会影响正常业务报文的转发。其次，使用该方法测量的时延包括从网络设备入端口的物理层芯片到同一网络设备出端口的物理层芯片，这样不仅使测量路径的物理边界更加清楚和完整，还可以精确将网络中所经过网络设备的时延区分显示出来，将网络中的时延进行分段区分后，也会使网络拥塞的定位将更加准确。
可选的，所述网络设备计算所述报文的处理时延，包括：所述第二物理端口的MAC芯片计算所述报文的处理时延。
出端口的MAC芯片从报文中提取到第一时间戳以及从出端口的物理层芯片获得第二时间戳之后，直接通过第二时间戳减去第一时间戳得到处理时延的值，不需要将其获得的时间戳上传给处理器并由处理器对时间戳进行计算，减少带宽的浪费。
图3A和图3B示出了本发明实施例提供的两种不同的测量时延的设备结构示意图。举例来说，所述设备可以应用于图1所述的应用场景中。图3A和图3B所示的设备可以是图1应用场景中的网络设备102和网络设备102，以及图2方法中的网络设备。所述设备包括：
处理器301，第一物理端口302和第二物理端口305，其中，第一物理端口302包括第一物理端口的物理层芯片303和第一物理端口的MAC芯片304。第二物理端口305包括第二物理端口的物理层芯片306和第二物物理端口的MAC芯片306。
第一物理端口的物理层芯片303用于接收报文，向第一物理端口的MAC芯片304发送第一时间戳和所述报文，所述第一时间戳的值是所述报文到达所述所述第一物理端口的物理层芯片303的时间。
第一物理端口的MAC芯片304用于将所述第一时间戳添加到所述报文中，并发送所述报文。
第二物理端口的MAC芯片307用于接收报文并提取所述报文的所述第一时间戳，向所述第二物理端口的物理层芯片306发送所述报文，并接收第二物理端口的物理芯片306发送的第二时间戳。
所述第二物理端口的物理层芯片306用于接收报文，向所述第二物理端口的MAC 芯片307发送所述第二时间戳，所述第二时间戳的值为所述报文到达所述所述第二物理端口的物理层芯片306的时间。
处理器301用于获取报文的处理时延，处理时延具体为所述第二时间戳减去所述第一时间戳得到的值。
上述方案中，该设备可以测量各种类型报文的处理时延，还可以通过测量报文从该设备的入口端的物理层芯片到出端口的物理层芯片的时延，能够更加精确的测量设备处理报文的时延。
可选的，处理器301用于接收来自所述第二物理端口的MAC芯片307的报文的处理时延。
所述第二物理端口的MAC芯片307还用于计算所述报文的处理时延。
可选的，如图3A所示，设备300还包括网络处理器308，其中，所述第一物理端口302的MAC芯片304还用于将报文的入端口号添加到所述报文中。所述入端口号为所述报文的入端口的端口号。所述报文的入端口为所述第一物理端口302。
所述网络处理器308用于提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号添加到所述报文的源MAC字段。
所述第二物理端口305的MAC芯片307还用于获得所述报文的出端口号，从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级、所述入端口号和所述出端口号发送到CPU。所述出端口号为所述报文的出端口的端口号。所述报文的出端口为所述第二物理端口305。
举例来说，所述设备300为路由器时，无论是盒式路由器还是框式路由器，路由器的网络处理器都可以将报文的入端口号和优先级信息提取出来添加到报文的源MAC字段以方便出端口的MAC芯片提取，接着路由器的网络处理器308发送所述报文到第二物理端口的MAC芯片307。第二物理端口的MAC芯片307将报文中的入端口号和优先级提取出来用来和前述第一时间戳和第二时间戳来匹配。
可选的，如图3B所述，设备300还包括第一网络处理器309和第二网络处理器310，其中，所述第一物理端口302的MAC芯片304还用于在发送所述报文前将所述报文的入端口号添加到所述报文中。所述入端口号为所述报文的入端口的端口号，所述报文的入端口为所述第一物理端口302。
所述第一网络处理器309用于提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号发送到所述第二网络处理器310。所述第一网络处理器309为所述第一物理端口302所在电路板311的处理器。所述第二网络处理器310为所述第二物理端口305所在电路板312的处理器。
所述第二网络处理器310用于提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号添加到所述报文的源MAC字段。
所述第二物理端口305的MAC芯片还用于获得所述报文的出端口号，并从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级、所述入端口号和所述出端口号发送到CPU。所述出端口号为所述报文的出端口的端口号。所述报文的出端口为所述第二物理端口305。
举例来说，对于存在多个网络处理器的框式路由器来说，入端口所在电路板的网 络处理器从报文中提取报文的入端口号和优先级信息，这些信息通过模块间信息传递与报文同时发送到出端口所在电路板的网络处理器。出端口的MAC芯片将报文的入端口号和优先级信息从报文中提取出来，并将获得的出端口号一起发送到该设备的CPU。
可选的，所述第一物理端口的MAC芯片304将所述第一时间戳添加到所述报文的循环冗余校验字段中。
本领域普通技术人员可以理解实现上述实施例方法中的全部或部分步骤是可以通过程序来指令处理器完成，所述的程序可以存储于计算机可读存储介质中，所述存储介质可以是随机存取存储器，只读存储器，快闪存储器，硬盘，固态硬盘，磁带(英文：magnetic tape)，软盘(英文：floppy disk)，光盘(英文：optical disc)及其任意组合。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (10)

  1. 一种测量时延的方法，其特征在于，所述方法包括：
    网络设备的第一物理端口的物理层芯片接收报文，并向所述第一物理端口的介质访问控制MAC芯片发送第一时间戳和所述报文，所述第一时间戳的值是所述报文到达所述第一物理端口的物理层芯片的时间；
    所述第一物理端口的MAC芯片将所述第一时间戳添加到所述报文中，并发送所述报文；
    第二物理端口的MAC芯片接收所述报文并提取所述报文的所述第一时间戳，向所述第二物理端口的物理层芯片发送所述报文；
    所述第二物理端口的MAC芯片接收所述报文的第二时间戳，所述第二时间戳是所述第二物理端口的物理层芯片发送的，所述第二时间戳的值是所述报文到达所述第二物理端口的物理层芯片的时间；
    所述网络设备计算所述报文的处理时延，所述处理时延为所述第二时间戳减去所述第一时间戳得到的值。
  2. 根据权利要求1所述的方法，其特征在于，所述网络设备计算所述报文的处理时延，包括：
    所述第二物理端口的MAC芯片计算所述报文的处理时延。
  3. 根据权利要求1或2所述的方法，其特征在于，所述方法还包括：
    所述第一物理端口的MAC芯片发送所述报文前，将所述报文的入端口号添加到所述报文中，所述入端口号为所述报文的入端口的端口号，所述报文的入端口为所述第一物理端口；
    所述网络设备的网络处理器提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号添加到所述报文的源MAC地址字段；
    所述第二物理端口的MAC芯片获得所述报文的出端口号，从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级，所述入端口号和所述出端口号发送到中央处理器CPU，所述出端口号为所述报文的出端口的端口号，所述报文的出端口为所述第二物理端口。
  4. 根据权利要求1或2所述的方法，其特征在于，所述方法还包括：
    所述第一物理端口的MAC芯片发送所述报文前，将所述报文的入端口号添加到所述报文中，所述入端口号为所述报文的入端口的端口号，所述报文的入端口为所述第一物理端口；
    所述网络设备的第一网络处理器提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号发送到所述网络设备的第二网络处理器，所述第一网络处理器在所述第一物理端口所在电路板的处理器，所述第二网络处理器在所述第二物理端口所在电路板的处理器；
    所述第二网络处理器提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号添加到所述报文的源MAC地址字段；
    所述第二物理端口的MAC芯片获得所述报文的出端口号，从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级、所述入端口号和所述出端口号发送到CPU，所述出端口号为所述报文的出端口的端口号，所述报文的出端口为所述第二物理端口。
  5. 根据权利要求1至4任一所述的方法，其特征在于，所述第一物理端口的MAC芯片将所述第一时间戳添加到所述报文的循环冗余校验字段中。
  6. 一种测量时延的设备，其特征在于，所述设备包括处理器，第一物理端口和第二物理端口，其中，
    所述第一物理端口包括所述第一物理端口的物理层芯片和所述第一物理端口的介质访问控制MAC芯片；
    所述第二物理端口包括所述第二物理端口的物理层芯片和所述第二物物理端口的MAC芯片；
    所述第一物理端口的物理层芯片，用于接收报文，向所述第一物理端口的MAC芯片发送第一时间戳和所述报文，所述第一时间戳的值是所述报文到达所述第一物理端口的物理层芯片的时间；
    所述第一物理端口的MAC芯片，用于将所述第一时间戳添加到所述报文中，并发送所述报文；
    所述第二物理端口的MAC芯片，用于接收所述报文并提取所述报文的所述第一时间戳，向所述第二物理端口的物理层芯片发送所述报文，并接收所述第二物理端口的物理芯片发送的第二时间戳；
    所述第二物理端口的物理层芯片，用于接收所述报文，向所述第二物理端口的MAC芯片发送所述第二时间戳，所述第二时间戳的值为所述报文到达所述所述第二物理端口的物理层芯片的时间；
    处理器，用于获取所述报文的处理时延，所述处理时延为所述第二时间戳减去所述第一时间戳得到的值。
  7. 根据权利要求6所述的设备，其特征在于，
    所述处理器用于接收来自所述第二物理端口的MAC芯片的所述报文的处理时延；
    所述第二物理端口的MAC芯片还用于计算所述报文的处理时延。
  8. 根据权利要求6或7所述的设备，其特征在于，所述设备还包括网络处理器，其中，
    所述第一物理端口的MAC芯片，还用于将报文的入端口号添加到所述报文中，所述入端口号为所述报文的入端口的端口号，所述报文的入端口为所述第一物理端口；
    所述网络处理器，用于提取所述报文的优先级和所述入端口号，并将所述报文的 优先级和所述入端口号添加到所述报文的源MAC字段；
    所述第二物理端口的MAC芯片，还用于获得所述报文的出端口号，从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级、所述入端口号和所述出端口号发送到CPU，所述出端口号为所述报文的出端口的端口号，所述报文的出端口为所述第二物理端口；
  9. 根据权利要求6或7所述的设备，其特征在于，所述设备还包括第一网络处理器和第二网络处理器，其中，
    所述第一物理端口的MAC芯片，还用于在发送所述报文前将所述报文的入端口号添加到所述报文中，所述入端口号为所述报文的入端口的端口号，所述报文的入端口为所述第一物理端口；
    所述第一网络处理器，用于提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号发送到所述第二网络处理器，所述第一网络处理器为所述第一物理端口所在电路板的处理器，所述第二网络处理器为所述第二物理端口所在电路板的处理器，
    所述第二网络处理器，用于提取所述报文的优先级和所述入端口号，并将所述报文的优先级和所述入端口号添加到所述报文的源MAC字段；
    所述第二物理端口的MAC芯片，还用于获得所述报文的出端口号，并从所述报文的所述源MAC地址字段中提取所述报文的优先级和所述入端口号，将所述报文的优先级、所述入端口号和所述出端口号发送到CPU，所述出端口号为所述报文的出端口的端口号，所述报文的出端口为所述第二物理端口。
  10. 根据权利要求6至9任一所述的设备，其特征在于，所述第一物理端口的MAC芯片将所述第一时间戳添加到所述报文的循环冗余校验字段中。
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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111817977B (zh) * 2019-04-12 2024-04-16 华为技术有限公司 一种网络拥塞控制方法和装置
CN112398560A (zh) * 2019-08-16 2021-02-23 中国移动通信有限公司研究院 一种测量方法、装置及存储介质
CN110971331B (zh) * 2019-11-26 2021-08-06 中国信息通信研究院 一种逐跳时延测量方法和系统
CN112787951B (zh) * 2020-08-07 2024-02-27 中兴通讯股份有限公司 拥塞控制方法、装置、设备和计算机可读存储介质
US11405315B2 (en) * 2020-09-25 2022-08-02 Juniper Networks, Inc. Multi-hop physical layer data collection protocol
CN114978961A (zh) * 2021-02-19 2022-08-30 中兴通讯股份有限公司 时延测量方法、装置、设备和计算机可读存储介质
CN115242682A (zh) * 2021-04-21 2022-10-25 中兴通讯股份有限公司 报文处理方法和装置、电子设备、计算机可读存储介质

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101926146A (zh) * 2008-01-28 2010-12-22 思科技术公司 灵活的时间标记
US20140092918A1 (en) * 2012-09-28 2014-04-03 Thomas Jost High accuracy 1588 timestamping over high speed multi lane distribution physical code sublayers
CN105207734A (zh) * 2015-10-09 2015-12-30 盛科网络（苏州）有限公司 芯片堆叠模式下ptp的实现方法及实现装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001088746A1 (en) * 2000-05-18 2001-11-22 Brix Networks, Inc. Method and system for transmit time stamp insertion in a hardware time stamp system for packetized data networks
US6470031B1 (en) * 2000-09-05 2002-10-22 Coactive Networks, Inc. Method and apparatus for accurate packet time stamping
US20050152330A1 (en) * 2004-01-12 2005-07-14 Stephens Adrian P. Clock recovery methods and apparatus
US7590151B2 (en) * 2004-02-09 2009-09-15 Semtech Corporation Method and apparatus for aligning time references when separated by an unreliable data packet network
US7474627B2 (en) * 2004-12-17 2009-01-06 Nortel Networks Limited Voice over internet protocol (VoIP) call admission and call regulation in a wireless network
US7707379B2 (en) 2006-07-13 2010-04-27 International Business Machines Corporation Dynamic latency map for memory optimization
US8358713B2 (en) 2007-09-10 2013-01-22 Sarath Babu Govindarajulu High throughput and low latency map decoder
US7953528B2 (en) 2007-12-21 2011-05-31 General Motors Llc SMS and packet data performance monitoring
US8107502B2 (en) * 2009-09-11 2012-01-31 Symmetricom, Inc. Method and apparatus for monitoring packet networks
CN101827098A (zh) * 2010-03-31 2010-09-08 中兴通讯股份有限公司 时间同步的处理方法及装置
US8427958B2 (en) 2010-04-30 2013-04-23 Brocade Communications Systems, Inc. Dynamic latency-based rerouting
US9154394B2 (en) 2010-09-28 2015-10-06 Brocade Communications Systems, Inc. Dynamic latency-based rerouting
CN101997774A (zh) * 2010-11-03 2011-03-30 华为数字技术有限公司 一种转发时延的记录方法及路由器
US20140056157A1 (en) * 2012-08-24 2014-02-27 Ascom Network Testing Ab Systems and Methods for Measuring Available Bandwidth in Mobile Telecommunications Networks
US9961000B2 (en) * 2015-04-27 2018-05-01 Pollere Inc. Estimation of network path segment delays

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101926146A (zh) * 2008-01-28 2010-12-22 思科技术公司 灵活的时间标记
US20140092918A1 (en) * 2012-09-28 2014-04-03 Thomas Jost High accuracy 1588 timestamping over high speed multi lane distribution physical code sublayers
CN105207734A (zh) * 2015-10-09 2015-12-30 盛科网络（苏州）有限公司 芯片堆叠模式下ptp的实现方法及实现装置

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