WO2018087485A1

WO2018087485A1 - Method for the collective production of a plurality of optoelectronic chips

Info

Publication number: WO2018087485A1
Application number: PCT/FR2017/053067
Authority: WO
Inventors: Sylvie Menezo; Frank Fournel
Original assignee: Commissariat à l'énergie atomique et aux énergies alternatives
Priority date: 2016-11-14
Filing date: 2017-11-10
Publication date: 2018-05-17
Also published as: CN110178064A; EP3538937A1; FR3058830B1; CA3043644A1; JP7069153B2; FR3058830A1; US20190265413A1; JP2019536097A; CN110178064B; EP3538937B1; US10884187B2

Abstract

The invention relates to a method for the collective production of a plurality of optoelectronic chips (P1, P2), comprising the following steps: i) supplying a receiving substrate (1) comprising a plurality of zones called elementary zones (z1, z2), each one comprising at least one waveguide called a coupling waveguide (31, 32) built into the receiving substrate (1); ii) transferring a plurality of contact plates (6) to the elementary zones (z1, z2) such that the contact plates (6) partially cover the coupling waveguides (31, 32); and iii) producing said first optoelectronic components (21, 22) from said contact plates (6); characterised in that, following the transfer stage, each contact plate (6) extends over an assembly (E) of at least two adjacent elementary zones (z1, z2).

Description

PROCESS FOR THE COLLECTIVE PRODUCTION OF A PLURALITY OF CHIPS

CURTAINS

TECHNICAL AREA

The field of the invention is that of the collective production methods of a plurality of optoelectronic chips, by a technique of transfer of vignettes on a functionalized receiving substrate.

STATE OF THE PRIOR ART

[002] The production of optoelectronic chips having diodes capable of emitting or detecting electromagnetic radiation can be performed collectively, by a technique of transfer of pads made from a semiconductor compound, also called vignettes, on a substrate of reception.

[003] FIG. 1A schematically illustrates, in plan view, an example of optoelectronic chips P made on a receiving substrate 1 of the SOI type. The dashed lines represent cutting lines L of a subsequent step of individualization of the optoelectronic chips P by cutting the receiving substrate 1. The cutting lines L thus delimit elementary zones z of the receiving substrate ι at which are realized the optoelectronic chips P. Each elementary zone z here comprises active photonic components (diodes, modulators, etc.) and passive components (waveguides, multiplexers, etc.) optically coupled to each other so as to form a photonic circuit.

[004] Figure IB illustrates in detail four adjacent optoelectronic chips Pi, P2, P3, P4 shown in Fig.iA. The optoelectronic chips Pi, P2, P3, P4 are here transmitters each comprising an array of several laser diodes 2 made based on a semiconductor compound, for example InP, in the form of a stack of semiconductor layers comprising here mainly de, each laser diode being optically coupled to a so-called coupling waveguide (here represented by an arrow starting from the laser diode 2), integrated in the receiving substrate 1, which allows the propagation of the transmitted optical mode by the laser diode 2 to a modulator 4 and then to a multiplexer 5. Of course, the integrated photonic circuits may be different from those shown in this figure, and may include in particular other photonic components, for example couplers to optical fibers. . Optoelectronic chips can also be photodiode receivers, or transceivers (transceivers) comprising both laser diodes and photodiodes.

[005] A method of collectively producing the optoelectronic chips may comprise a step of transferring a plurality of pads to the receiving substrate at the level of the different elementary zones. Each pad comprises a semiconductor portion made from a semiconductor compound, for example a III-V compound, and is then called III-V label. The semiconductor portion can thus be made in a stack of several semiconductor layers. The postponement is carried out so that the III-V stickers are deposited in distinct elementary zones, so that each III-V vignette covers a so-called coupling part of at least one coupling waveguide of the zone. corresponding. The III-V stickers may in particular be bonded to the molecular adhesion receiving substrate. A step of structuring the III-V vignettes is then carried out to produce, by lithography and etching, a plurality of optoelectronic components, such as laser diodes, photodiodes or even electro-absorption modulators, each optoelectronic component being opposite the coupling part of a waveguide, and thus optically coupled thereto. The optoelectronic chips are then individualized by cutting the receiving substrate.

The application WO2016 / 011002 describes the production of photonic integrated circuits by transfer, type flip chip, a semiconductor vignette on a functionalized substrate made of silicon.

[007] However, there is a need to reduce the cost of manufacturing optoelectronic chips without, however, complicating the production method.

STATEMENT OF THE INVENTION

The invention aims to remedy at least in part the disadvantages of the prior art, and more particularly to provide a method of collective realization of optoelectronic chips that reduces manufacturing costs. For this purpose, the object of the invention is a method of collectively producing a plurality of optoelectronic chips, comprising the following steps:

- Providing a reception substrate, comprising a plurality of so-called elementary zones each intended to delimit an optoelectronic chip, each elementary zone comprising at least one so-called coupling waveguide, integrated in the receiving substrate, intended to be coupled optically to a first optoelectronic component; transferring a plurality of pads to the elementary areas so that the pads partially overlap the coupling waveguides;

producing said first optoelectronic components from said pads, so that each first optoelectronic component is facing at least one coupling waveguide of the corresponding elementary zone.

[009] According to the invention, following the transfer step, each stud extends over a set of at least two adjacent elementary zones, so as to partially cover at least one coupling waveguide. each of said adjacent elementary areas.

Some preferred but non-limiting aspects of this process are as follows.

Thus, during the step of producing the first optoelectronic components, each of the first optoelectronic components made from the same pad may be located opposite one of the coupling waveguides of the adjacent elementary zones of said same together.

At least one first optoelectronic component of a first elementary zone and at least one second optoelectronic component of a second elementary zone adjacent to the first elementary zone and belonging to said same assembly, said first and second optoelectronic components being realized at from the same pad, may be respectively spaced an equal distance from a separation line, forming a common border to said first and second adjacent elementary areas. Said distance may be less than όθθμηι.

Said first optoelectronic component and said second optoelectronic component may be spaced from each other by a distance of less than 1.2 μηι.

A first optoelectronic component may be located opposite a coupling portion of a first coupling waveguide of a first elementary zone of an assembly, and a second optoelectronic component may be located opposite a a coupling portion of a second coupling waveguide of a second elementary zone adjacent to the first elementary zone and belonging to said same assembly, the first and second coupling waveguides extending, starting from their respective coupling parts, in parallel.

Said first and second coupling waveguides may extend from their respective coupling portions in opposite directions to each other.

Said first and second coupling waveguides may extend, from their respective coupling portions, in parallel directions to one another. The first coupling waveguide and the second waveguide may extend, from their respective coupling parts, so as to present, one vis-a-vis the other, axial symmetry with respect to said line of separation.

Each pad may extend over a set of four adjacent elementary zones two by two.

Each pad may comprise a semiconductor portion made from a semiconductor compound, and a growth substrate from which is made by epitaxy the semiconductor portion.

The method may comprise a step of removing the growth substrate, the latter being made of an alloy based on said semiconductor compound.

Each pad may comprise a semiconductor portion made from a III-V semiconductor compound.

The first optoelectronic component may be a laser source, a photodiode or an electro-optical modulator.

Each elementary zone of said assembly may comprise an array of several coupling waveguides, and a network of several first optoelectronic components may be produced for each of the elementary zones of said assembly, so that the first optoelectronic components of a same network are respectively opposite the corresponding coupling waveguides.

The method may comprise a step of transferring a plurality of first pads from which is made a plurality of laser diodes and a step of transferring a plurality of second pads from which is made a plurality of photodiodes or a plurality of electro-optical modulators.

The method may comprise a subsequent step of cutting the receiving substrate along cutting lines passing between the elementary zones, so as to obtain a plurality of optoelectronic chips distinct from each other.

BRIEF DESCRIPTION OF THE DRAWINGS

Other aspects, objects, advantages and features of the invention will appear better on reading the following detailed description of preferred embodiments thereof, given by way of non-limiting example, and made with reference. in the accompanying drawings in which: FIG. 1A, already described with reference to the prior art, schematically illustrates, in plan view, an example of optoelectronic chips formed at a receiving substrate; and FIG. 1B, already described, is a detailed view of four adjacent optoelectronic chips illustrated in FIG. A;

2A to 2D illustrate partially and schematically, in cross section along the line A-A of FIG. IB, various steps of a conventional method of collectively producing optoelectronic chips;

FIG. 3 partially and schematically illustrates, in plan view, the surface that a vignette presents during various stages of the conventional method described above, making it possible to produce, for an elementary zone, an array of four coupled laser diodes coupling waveguides;

Figures 4A to 4D illustrate partially and schematically in cross section along the line B-B of FIG. 5A, various steps of a method of collectively producing optoelectronic chips according to one embodiment of the invention;

FIG. 5A partially and schematically illustrates, in plan view, an example of four optoelectronic chips made on a receiving substrate by the method described with reference to FIGS. 4A to 4D;

FIG. 5B partially and schematically illustrates, in plan view, the surface that a vignette presents during various stages of the process illustrated with reference to FIGS. 4A to 4D, allowing the realization, from a single vignette, of several laser diode arrays of a set of four adjacent elementary zones;

FIGS. 6A, 6B and 6C partially and schematically illustrate, in plan view, different variants of optoelectronic chips made on a receiving substrate, in which the laser diode arrays of a set of adjacent elementary zones are obtained from of the same vignette III-V.

DETAILED PRESENTATION OF PARTICULAR EMBODIMENTS

In the figures and in the following description, the same references represent the same or similar elements. In addition, the various elements are not represented on the scale so as to favor the clarity of the figures. Moreover, the various embodiments and variants are not exclusive of each other and can be combined with each other. Unless otherwise indicated, the terms "substantially", "about", "of the order of" mean within 10%. The invention relates to the collective production of optoelectronic chips, by a technique of transfer of pads, also called vignettes, on a functionalized receiving substrate.

By optoelectronic chip is meant a device comprising at least a first optoelectronic component capable of transmitting, detecting or even modulating electromagnetic radiation, made based on a given semiconductor compound, which rests on the receiving substrate. The first optoelectronic component is said to be made based on the semiconducting compound given in the sense that it comprises mainly said semiconductor compound. It may comprise a stack of thin layers made of different alloys consisting of or comprising said semiconductor compound. Each chip further comprises passive and / or active photonic components. Each first optoelectronic component is optically coupled to a so-called coupling waveguide integrated in the receiving substrate, which forms at least a portion of a photonic circuit. Optoelectronic chips are made at so-called elementary zones of a receiving substrate, the elementary zones forming distinct surfaces of the substrate. The photonic circuit of an optoelectronic chip can be made from a basic pattern identical or similar to each of the optoelectronic chips. The elementary pattern can thus be defined at the level of a mask used during photolithography steps.

The pads, or vignettes, each comprise a semiconductor portion made by epitaxial growth from a growth substrate. The semiconductor portion is made based on the semiconductor compound mentioned above, and is intended to allow the realization of one or more first optoelectronic components. The pads may have a surface, in the plane parallel to the plane of the receiving substrate, of the order of a few square millimeters, and a thickness of the order of a few tens of microns to a few hundred microns. The semiconductor compound is preferably of type III-V, that is to say that it is an alloy comprising at least one element of column III and at least one element of column V of the periodic table. The semiconductor compound may be, for example, InP or GaAs. The thumbnails are then called III-V vignettes.

The semiconductor portion may be a heterostructure comprising a stack of a first N-doped layer, and a second P-doped layer, arranged with respect to one another so as to form a PN or PIN junction, between which may be located at least one intermediate layer forming a quantum well, possibly interposed between barrier layers. The quantum well (s) and barrier layers are intrinsic, i.e. unintentionally doped, and are made from the semiconductor compound. By way of example, the heterostructure may be of the InGaAsP / InP, InAlGaAs / InP, AlInGaAs / GaAs or other type. Thus, in the case of an InP semiconductor compound, the doped layers can be InP, the InAsP quantum wells and the InGaAsP barrier layers.

The receiving substrate is said functionalized in the sense that it comprises at least one passive optical transmission component, namely a coupling waveguide, integrated in the substrate, that is to say made at the from or under the front face of the receiving substrate. It may also comprise other passive optical components (multiplexers or demultiplexers, fiber optic couplers, etc.) and / or active optical components (modulators, etc.), optically coupled to each other so as to form a photonic circuit. says integrated. The receiving substrate may be of the SOI type, that is to say that it may comprise a thin surface layer of silicon and a massive layer of silicon, between which is interposed a layer of silicon oxide called BOX (buried oxide, in English). The thin surface layer may be covered with a layer for bonding the sticker on the front face of the receiving substrate, for example an oxide layer in the case of molecular bonding.

In general, the optoelectronic chips may be Tx transmitters in which there is a network of laser diodes coupled to coupling waveguides, as well as, for example, modulators, at least one multiplexer and a coupler to an optical fiber. They can also be Rx receivers comprising photodiodes, a demultiplexer and a coupler; even be transceivers comprising both laser diodes and photodiodes. In the context of the invention, the optoelectronic chips are, for purely illustrative purposes, Tx transmitters comprising laser diodes made based on a III-V semiconductor compound, optically coupled to coupling waveguides of a photonic circuit, the latter being integrated in a receiving substrate made of silicon, for example of the SOI type.

[0034] FIGS. 2A to 2D are partial and schematic views, in section along the axis A-A illustrated in FIG. 1B, of various steps of an example of a conventional method for producing optoelectronic chips by transfer of vignettes. on a receiving substrate, and more particularly the production of first optoelectronic components, here laser diodes, optically coupled to an integrated photonic circuit. In this example, the vignettes are made based on a III-V semiconductor compound and the receiving substrate is of the SOI type. Only certain steps of the production method are illustrated and described here. For the rest of the description, a three-dimensional orthogonal direct reference mark (Χ, Υ, Ζ) is defined here, in which the X and Y axes form a plane parallel to the plane of the front face of the receiving substrate, and where Z axis is oriented substantially orthogonal to the plane of the receiving substrate.

In this example, the III-V stickers are pads distinct from one another having a semiconductor portion made of a III-V semiconductor compound, for example InP or GaAs, and is formed here. a stack of thin layers in which the III-V semiconductor compound is predominant. They further comprise the growth substrate from which the respective semiconductor portions are made. This is made of a material having a good ratio of the mesh parameter with that of the III-V semiconductor compound. It may be made of the same III-V semiconductor compound, for example InP, or even an alloy comprising the same elements III and V of the III-V semiconductor compound. By way of illustration, the growth substrate may be InP when the stickers are of the InGaAsP / InP type. The receiving substrate is made of silicon, and may be an SOI substrate. It comprises photonic components said integrated in the sense that they are located inside the same receiving substrate, and here are coupling waveguides, silicon modulators, and a wavelength multiplexer in silicon . The coupling guides form an optical path between the diodes and the modulators.

FIG. 2A illustrates a step of transferring a plurality of vignettes 6 to the receiving substrate 1. Each vignette 6 comprises a semiconductor portion 7 and a growth substrate 8. The transfer is carried out so that the free face of each semiconductor portion 7, that is to say the face opposite to the growth substrate 8, comes into contact with the front face 1a of the receiving substrate 1. The stickers 6 are here fixed to the receiving substrate 1 by molecular bonding by means of an oxide layer (not shown) located at the interface between the sticker 6 and the receiving substrate 1, for example a silicon oxide layer of a few nanometers to a few tens of nanometers thick .

The thumbnails 6 are each positioned in an elementary zone z of the receiving substrate 1, here because of a vignette 6 per elementary zone z, although, alternatively, several distinct vignettes can be deposited on the same elementary zone. . Here, the thumbnails 6 ₃ and 6 ₄ are respectively positioned in the elementary zones z3 and Z4. The elementary zones z are situated between the dashed lines, and are intended to delimit the surface of the optoelectronic chips P, here in particular P3 and P4 (FIG. 2D), which will be individualized during a subsequent step of cutting the receiving substrate. 1. In each elementary zone z is located at least one photonic circuit comprising photonic components of which only a coupling waveguide 3 and a modulator 4 are represented here. The photonic circuit is here said integrated in that it comprises several photonic components (a guide 3, a modulator 4, etc.) manufactured on the same receiving substrate 1 and located inside the latter. Here, in the case of the elementary zone z4, the photonic circuit comprises an array of coupling waveguides 3 ₄ , each coupling waveguide 3 ₄ having a first coupling part 3e ₄ , allowing the optical coupling. between the laser diodes 2 ₄ and the waveguides 3 ₄ .

Each thumbnail 6 ₃ , 6 ₄ is positioned in a different elementary zone Z3, Z4, so as to partially cover the coupling waveguides 3 ₃ , 3 ₄ of the corresponding photonic circuit, at the coupling portions 3e ₃ , 3rd ₄ respective.

The thumbnails 6 reported have an initial surface S ^m , in the XY plane, for example equal to Li ^elem x Li ^elem in the case of a square profile. The initial surface S? J ^m depends on the number of diodes 2 to be made opposite the coupling waveguides 3, and may be of the order of a few square millimeters. Of course, the thumbnails 6 may have other types of profile in the XY plane, for example rectangular, polygonal, circular or other.

FIG. 2B illustrates a preferential step of suppressing the growth substrate 8. The suppression can be carried out by chemical etching, possibly preceded by mechanical thinning. The thickness of the vignettes 6 then corresponds substantially to that of the semiconductor portions 7.

Over-etching lateral semiconductor portions 7 in the XY plane is likely to occur during the removal of the growth substrate, especially when the material of the growth substrate 8 is an alloy comprising at least the same elements. III and V than those of the semiconductor compound III-V on which semiconductor portions 7 are formed. This is the case, for example, when an InP growth substrate 8 is used for the growth of a semiconductor portion 7 based on InP, for example of the InGaAsP / InP type, and the growth substrate 8 is removed by chemical etching with hydrochloric acid. The semiconductor portion 7 of the vignettes 6 then has a surface S ^em in the XY plane, for example Li ^elem x Li ^elem in the case of a square profile, less than the initial surface Si. For example, the semiconductor portion 7 can be etched from its lateral edge 7I over a distance of approximately 3θθμηι, which translates as: Li ^elem = Li ^elem - 2 x 300μηι. FIG. 2C illustrates a following step of embodiment here of an array of four laser diodes 2 from each semiconductor portion 7. The laser diodes 2 are here ribbon diodes, which have a length Lf along the axis longitudinal X greater than a width lf along the transverse axis Y, but other diodes are possible, such as for example VCSEL (Vertical-Cavity Surface-Emitting Laser) laser diodes. Such a ribbon laser diode 2 comprises a waveguide located in the semiconductor portion 7 which forms the optical amplification material (SOA for Semiconductor Optical Amplifier, in English), and is arranged facing along the Z axis of a coupling waveguide 3 to allow optical coupling between the two guides. An example of a ribbon laser diode is described in particular in document EP2811593. The laser diodes 2 are produced by conventional lithography and etching steps, so that each laser diode 2 ₃ , 2 ₄ is located opposite, along the Z axis, a coupling portion 3e ₃ , 3e ₄ d a coupling waveguide 3 _3, 3 _4, so that the diode 2 is optically coupled to the three corresponding coupling waveguide. Metal contacts (not shown) are also realized so as to inject a pumping current into the different diodes 2.

Figure 2D illustrates the step of cutting the receiving substrate 1 along the cutting lines L, so as to obtain a plurality of optoelectronic chips P distinct from each other. In this example, the chips P3 and P4 are obtained by cutting in particular along the line L34. The separation of the optoelectronic chips P can be carried out by mechanical cutting and / or by laser, by chemical etching, by physical etching, or the like.

FIG. 3 schematically illustrates, in plan view, a network of four laser diodes 2 in ribbon made from the same vignette 6 and disposed opposite, along the Z axis, waveguides. coupling 3 of the same photonic circuit, and illustrates in particular the surface in the XY plane that shows the sticker 6 at different stages of the conventional method of production.

In this example, the laser diodes 2 in ribbon each have a length Lf of approximately 8θθμηι along the longitudinal axis X, for a width lf of approximately 5θμηι along the transverse axis Y, and are spaced apart from each other. a distance of about 200 μηι along the Y axis, here from edge to edge. For these dimensions, the steps of lithography and etching typically involve disposing a semiconductor portion 7, and therefore a sticker 6, a useful said initial surface S? J ^m ² about 1x1mm.

However, in practice, it may be necessary to provide a so-called initial surface S? " ^Em of vignette 6 much greater than the original useful surface S? J ^m . Indeed, he It is appropriate to take into account an uncertainty of positioning of the sticker 6, of the order of ± 200μηι approximately, vis-à-vis the coupling waveguide (s) 3 of the corresponding elementary zone. In addition, it may also be necessary to take into account a possible lateral over-etching of the semiconductor portion 7 that may take place during the step of removing the growth substrate 8, which may be of the order of 3θθμηι from the lateral edge 7I of the semiconductive portion 7.

Thus, for example, to have a semiconductor portion 7 of a useful initial surface S? J ^m of 1x1mm ² approximately to obtain the laser diodes 2 to the desired dimensions and correctly positioned facing, along the Z axis, respective coupling waveguides 3, it may be necessary to postpone a sticker 6 with a necessary initial surface S " ^em of about 2x2mm ² , or 4mm ² . Indeed, a vignette 6 with a surface area S " ^em of 4mm ² can provide a semiconductor portion 7 of a surface S ^lem of i, 4xi, 4 = 2, or about ² , after removal of the growth substrate 8 and overetching side of the semiconductor material of the portion 7, then this surface corresponding to the useful initial surface S? J ^m of 1x1mm ² plus 200μηι at the side edge 7I in the XY plane, to take into account the uncertainty positioning.

Thus, it follows that, in general, it is necessary to provide a necessary initial surface

of material of the semiconductor portion 7 much larger than the initial useful surface S?} ^m , of the order of 4 times greater in this example, which results in high manufacturing costs. In addition, this results in a loss of material of the semiconductor portion 7 between the initial surface required

and the useful initial surface

of the order of 75% in this example.

To reduce manufacturing costs, the method according to the invention proposes to use a same vignette for the production of first optoelectronic components of a set E of several adjacent optoelectronic chips, which results in a reduction of the initial surface necessary vis-à-vis the initial useful surface, related to each elementary zone of optoelectronic chip, as well as by a decrease in the lost volume of the material of the semiconductor portion of the thumbnails.

For this, each sticker is carried on the receiving substrate so as to extend over a set E of at least two adjacent elementary zones, and preferably on a set E of four adjacent elementary zones two by two, thus partially covering at least one coupling waveguide of each of said adjacent elementary zones. During the stage of realization of the first components Optoelectronic devices, said first components made from the same sticker can thus be located facing, along the Z axis, the respective coupling waveguides of said adjacent elementary zones, so that each first optoelectronic component is optically coupled to corresponding coupling waveguide.

As detailed below, the networks of first optoelectronic components of a set E of two adjacent elementary zones are arranged so as to be located near a separation line, or cutting. It is the same for coupling waveguide networks, at their coupling parts. In general, a line of separation passes between two adjacent elementary zones, and forms a border which is common to these two adjacent elementary zones. The networks of first optoelectronic components may also be spaced, vis-à-vis this line of separation, an identical distance, preferably less than όθθμηι, for example less than or equal to 300 μηι. They are spaced from each other by a greater distance, for example at Ιθμηι, for example greater than or equal to 5θμηι. Moreover, they may have, opposite each other, a mirror symmetry with respect to the plane formed by said separation line (parallel here to the axis X or Y) and the axis of thickness Z.

FIGS. 4A to 4D illustrate an example of a method for producing optoelectronic chips P making it possible to limit the initial surface area of the semiconductor material necessary for producing the diodes 2 of each optoelectronic chip P, and thus to limit manufacturing costs. The figures are schematic and partial views of adjacent optoelectronic chips Pi, P2, for different process steps, along the sectional plane B-B of FIG. 5A. In this example, the vignettes 6 and the receiving substrate 1 are similar, in terms of material, to those of the example of FIGS. 2A to 2D. The first optoelectronic components are here laser diodes.

FIG. 4A illustrates the step of transfer of vignettes 6 on the receiving substrate 1. Each vignette 6 comprises a semiconductor portion 7 based on the semiconductor compound III-V, for example an InP-based heterostructure forming a PN junction or PIN, whose free face is brought into contact with the front face of the receiving substrate 1. It also comprises the growth substrate 8 from which the semiconductor portion 7 has been made by epitaxial growth.

Here, each vignette 6 is placed on the receiving substrate 1 so that it extends over a set E of at least two adjacent elementary zones, and in this example on a set E of four adjacent elementary zones. two by two, here z1, z2, z3, z4 in the example of FIG. 5A. It thus covers at least one coupling waveguide 3 of the photonic circuit, and here an array of four coupling waveguides 3, of each adjacent elementary zones zi, z2, z3, z4 of said set E. Each vignette 6 thus extends continuously over a portion of the four adjacent elementary zones, without breaking the material of the sticker between the different adjacent zones.

[0058] Each thumbnail 6 has an initial area needed S ™ ^s, e.g. Li x Li ^ens ^ens dimensions in the case of a square section in the XY plane, where Li ^ens is a size of the thumbnail in the plane 6 XY. The initial surface S ™ ^s is adapted to cover the coupling waveguides 3, at their respective coupling portions 3e, of each adjacent elementary zone zi, z2, z3, z4 of the same set E.

FIG. 4B illustrates a preferential step of suppressing the growth substrate 8. As above, the suppression can be carried out by chemical etching, possibly preceded by mechanical thinning. The thickness of the vignettes 6 is then reduced so as to substantially equal that of the semiconductor portions 7.

In the case of a lateral over-etching of the semiconductor portion 7 of the vignettes 6, the semiconductor portion 7 then has a surface S ^ns in the XY plane, for example Li ^ens x Li ^ens in the case of a square profile, less than the surface S ™ ^s . For example, the 7I side edge portion of the semiconductor 7 can be engraved on a 3θθμηι in breadth, ie: Li = Li ^ens ^ens - 2 x 3θθμηι.

FIG. 4C illustrates a step of structuring the semiconductor portion 7 to produce at least one diode 2 _X , 2 ₂ , 2 ₃ , 2 ₄ for each adjacent elementary zone z 1, z 2, Z 3, z 4 of the same set E. In this example, from the same semiconductor portion 7, an array of several laser diodes 2 is produced for each of the photonic circuits of the adjacent elementary zones z 1, z 2, z 3, z 4 of the same set E.

The laser diodes 2 are here also ribbon laser diodes 2, which have a length Lf along the longitudinal axis X and a width lf along the transverse axis Y. The laser diodes 2 are produced by conventional steps of FIG. lithography and etching, so that each laser diode 2 is located opposite, along the Z axis, the coupling portion 3e of a coupling waveguide 3 of the photonic circuit of the corresponding elementary zone.

FIG. 4D illustrates the step of cutting the receiving substrate 1 along the cutting lines L, so as to obtain a plurality of optoelectronic chips P distinct from each other.

As will be shown with reference to the example of Figures 5A and 5B, the use of a same sticker 6 for the realization of diodes 2 of a set of E zones adjacent elementary elements makes it possible to reduce the initial surface required of semiconductor material per elementary zone, and thus to reduce manufacturing costs.

FIG. 5A schematically illustrates a set E of optoelectronic chips Pi, P2, P3, P4 adjacent two by two, made from the production method described with reference to FIGS. 4A to 4D. FIG. 5B is a schematic view which illustrates in detail the first optoelectronic components 2, here laser diodes, of an assembly E of several optoelectronic chips Pi, P2, P3, P4 adjacent two by two, as well as the different surfaces that present vignette 6 during the production process.

Here, a set E of four optoelectronic chips Pi, P2, P3, P4 adjacent two by two are formed on the receiving substrate. They are distinct from each other at the cutting lines L12, L23, L34, L14, or separation line, schematized by the dashed lines. In this example, each optoelectronic chip Pi, P2, P3, P4 comprises an array of two laser diodes 2 _X , 2 ₂ , 2 ₃ , 2 ₄ coupled to a photonic circuit comprising photonic components integrated into the receiving substrate, such as waveguides, modulators, and a wavelength multiplexer.

The photonic circuit thus comprises an array of several coupling waveguides (represented here by arrows starting from the diodes), the coupling parts of which are located, along the Z axis, of the laser diodes 2 (FIG. Fig.4A), so that each laser diode 2 is optically coupled to the corresponding coupling waveguide 3. Each photonic circuit here comprises optical paths each formed of a coupling waveguide optically coupled to a laser diode 2 and coupling each laser diode 2 to a modulator, and each output of a modulator to an input of the multiplexer. wavelengths.

As far as the laser diode arrays 2 of the adjacent elementary zones z 1, z 2, z 3, z 4 have been made from the same vignette 6, they are located in the adjacent corners two by two of the elementary zones zi. z2, z3, z4 of the same set E. More precisely, the diode array 2 of an elementary zone of said set E, for example of the zone zi, is located in an adjacent corner of the other three elementary zones z2, Z3, Z4 of said set E.

Furthermore, at least a first diode of a first elementary zone and at least a second diode of a second adjacent elementary zone of said assembly E, said first and second diodes being made from the same sticker, are located close to the dividing line forming a border common to the said first and second adjacent elementary zones. The first and second diodes may be spaced from the separation line by an equal distance, which may be less than όθθμηι, for example less than or equal to 3θθμηι, for example equal to approximately ιοομηι. This distance may be greater than or equal to ten microns, for example Ιθμηι, or even a few tens of microns, for example 5θμηι in the case of a cutting blade width of 5θμηι.

In the example of FIG. 5A, the coupling portions of the coupling waveguides 3i of the elementary zone zi and those of the coupling waveguides 32 of the elementary zone z2 are preferably situated close to each other. of the separation line L12 forming a border common to the elementary zones zi and z2. More specifically, the coupling portions of the coupling guides 31 of the elementary zone zi may be located at a distance from the separation line L12 less than that separating them from the opposite separation line and parallel to the line L12. Similarly, the coupling portions 3 ₂ of the elementary zone z2 coupling guides are situated at a distance from the separation line L12 less than that separating the opposing parting line and parallel to the line L12.

Preferably, the laser diodes 2 _X of the elementary zone zi are located at the same distance from the separation line L12 as the laser diodes 2 ₂ of the elementary zone z2. This distance corresponds to the minimum distance between a border of the considered diode and the separation line. Thus, the diodes 2 _X of the elementary zone zi are spaced from the diodes 2 ₂ of the elementary zone z2 by a distance, from edge to edge, which may be less than 1.2 μηι, for example less than or equal to όθθμηι, for example equal to 200μηι approximately. This distance is however greater than or equal to ten microns, for example ιομηι, even a few tens of microns, for example 5θμηι. This limits the semiconductor portion area necessary for the realization of the diodes of the adjacent elementary zones of the same set E.

Furthermore, the coupling waveguides 31 of the elementary zone zi and those 32 of the elementary zone z2 are arranged mutually so that the respective coupling portions of the coupling guides 31 of the elementary zone zi are in position. opposite, in the XY plane, coupling portions of the coupling guides 32 of the elementary zone z2, that is to say face to face, along the longitudinal axis of the coupling waveguides with the at the respective coupling portions, here parallel to the axis X. in addition, the coupling guides 3 ₁ of the elementary zone zi and z2 those 32 of the elementary zone each extend, from their respective coupling portions , in opposite directions to each other. In this example, the coupling guides 31 of the elementary zone zi extend in the direction -X whereas the coupling guides 32 of the elementary zone z2 extend in the + X direction. Each coupling guide 31 of the elementary zone zi is positioned coaxially to a coupling guide 3 ₂ of the elementary zone z2.

[0073] Preferably, the 3i coupling waveguides of the elementary zone zi and those 3 ₂ of the elementary zone z2 extend from their respective coupling portions, so as to present, one vis to the others, axial symmetry, or mirror symmetry, with respect to the line of separation L12. This makes it possible to simplify the preliminary realization of the photonic circuits, insofar as it is then possible to use a photolithography mask (stepper, in English) which optically covers the set E of adjacent elementary zones zi to z4, and no longer as in the example of the prior art, a mask for each elementary zone. The application of this mask is then repeated, or photo-repeated, for each of the sets E of adjacent zones.

With regard to the adjacent elementary zones z 1 and z 4, the coupling waveguides 3 ₁ of the elementary zone z 1 and the coupling waveguides 3 ₄ of the elementary zone z 4 are here located close to the separation line L14. More specifically, the coupling guides 31 of the elementary zone zi are situated at a distance from the separation line L14 which is smaller than that separating them from the opposite line of separation and parallel to the line L14. Similarly, the 3 ₄ of the elementary zone z4 coupling guides are situated at a distance from the separation line L14 less than that separating the opposing parting line and parallel to the line L14.

[0075] Preferably, the diode 31 of the elementary zone zi closest to the dividing line L14 is located at a same distance from the L14 separation line that diode 3 ₄ of the elementary zone z4 closest to the line L14. In the same way, these neighboring diodes 31, 3 ₄ may be spaced from each other by a distance which may be less than ι, 2μηι, for example less than or equal to όθθμηι, for example equal to approximately 200μηι. This distance may be greater than or equal to ten microns, for example ιομηι or even 5θμηι. This limits the semiconductor portion area required for producing the diodes of the adjacent zones of the same set E.

Furthermore, the coupling waveguides of the elementary zone zi and those of the elementary zone Z4 extend, from their respective coupling parts, in directions parallel to each other, here following the direction -X. In this example, the respective coupling portions 3 ₁ bussection guides and those of March ₄ coupling guides are aligned along an axis parallel to lines L12 and L34 separation.

[0077] Preferably, the coupling waveguides 31 of the elementary zone zi and those z4 3 ₄ on the elementary area extend from their respective coupling portions, so as to present, one vis to the others, axial symmetry with respect to the line of separation L14. As before, this makes it possible to simplify the realization preliminary photonic circuits by the optical application of a photolithography mask (stepper, in English) common to each set E of adjacent elementary areas.

FIG. 5B, by way of example, for producing the laser diode arrays 2 ₁ , 2 ₂ , 2 ₃ , 2 ₄ of the four adjacent elementary zones z 1, z 2, z 3, z 4 of the same set E, where each laser diode 2 has a length Lf of approximately 8θθμηι for a width lf of approximately 5θμηι, and is spaced from the neighboring laser diodes 2 by a distance of approximately 200μηι edge to edge, the sticker 6 has a necessary initial surface S ™ ^s greater than the total effective initial area S ^s , which is substantially equal to the sum of the initial useful surfaces referred to as elementary

which can be here, as in the example of fig.3, of the order of 1x1mm ² .

[0079] Thus, to obtain a semiconductor portion 7 having continuously without intermediate material, an initial total surface area S? ^'S substantially equal to 4xS? ^M}, taking into account the uncertainty of positioning the sticker 6 , here of the order of ± 200μηι approximately, vis-à-vis the coupling waveguides 31, 32, 3 ₃ , 3 ₄ adjacent elementary zones zi, z2, z3, z4 of the same set E. In addition , it is possible to take into account the possible lateral over-etching of the semiconductor portion 6 during the step of suppressing the growth substrate 7, for example of the order of 3θθμηι from the lateral edge 7I of the semiconductive portion 7.

Thus, in this example, to obtain a total effective initial surface S ™ ^s of about 4x (ixi) mm ² , the sticker 6 can then have a total initial surface required S ™ ^s of 3x3 = mm ² approximately. Indeed, a vignette 6 with a surface S ™ ^s of 9 mm ² can provide a semiconductor portion 7 with a surface S ^ns of approximately 2.4 × 2.4 = 5.8 mm ² after removal of the growth substrate 8 and on -gravure side of semiconductor material 3θθμηι 7I from the side edge portion of the semiconductor 7. the surface s ^ns corresponds to the initial total surface area s? ^'s increased 200μηι at the lateral edge of the portion 7I semiconductor 7, in the XY plane, to take into account the positioning uncertainty.

Thus, unlike the prior art, to obtain a basic elementary surface useful S? U ^em of îximm ² for each elementary zone, the use of a same sticker for the realization of the diodes of the adjacent elementary zones of a total initial surface necessary S ™ ^s of 3x3 = 9mm ² , makes it possible to bring back the initial necessary surface S ^ ^em , by elementary area, to

instead of 4mm ² as in the example of fig.3. Thus, compared to the example of FIG. 3, it follows that the initial surface required S ^ ^em of material of the semiconductor portion is more than, per elemental area, of the order of 2.5 times the initial useful surface S 1 ^em , which results in a substantial decrease in the amount of semiconductor material required per elementary area , and therefore a reduction in manufacturing costs. This also results in a decrease in the material loss of the semiconductor portion, per elementary area, corresponding to the difference between the initial surface needed

and the initial surface useful here of the order of 6o% in this example, and not more than 75% as in the example of fig.3.

The production method also allows, with an equal number of optoelectronic chips, to use and manipulate a reduced number of pads, the latter being divided by 2 or 4 with respect to the number of pads of the example of FIG. the prior art. It can also be used to handle larger blocks. The complexity and the duration of execution of the process are thus reduced.

Unlike the example of the prior art, it is then possible to use, for the production of the photonic circuits of each chip, a photolithography mask (stepper, in English) whose pattern is optically applied. to a set E of adjacent elementary zones, and no longer to a single elementary zone. Thus, the pattern of the mask applied optically for each of the sets E of adjacent zones, and no longer for each of the elementary zones as in the prior art. This simplifies the production process and reduces the execution time.

While in the example of the prior art, the pattern of the lithography mask is identical from one elementary zone to another, it is here identical to a set of E adjacent zones to the other. Within the same set E, a first sub-pattern corresponding to a first elementary zone has a mirror symmetry to a second sub-pattern corresponding to a second elementary zone, the latter being adjacent to the first elementary zone.

FIG. 6A schematically and partially illustrates a variant of the mode shown in FIG. 5A, in which the diodes 2 2 ₂ of the adjacent elementary zones z 1 and z 2 are produced from the same sticker, and the diodes 2 ₃ , 2 ₄ adjacent elementary zones Z3 and Z4 are made from another vignette, distinct from the previous one. The coupling waveguides of the zone zi have, at their respective coupling portions, an axial symmetry with respect to the line L12 with respect to the coupling waveguides of the zone z2. It is the same for the coupling guides of zone Z4 vis-à-vis those of zone Z3 with respect to line L34. FIG. 6B schematically and partially illustrates a variant of that represented in FIG. 6A, in which the diodes 2 _X , 2 ₄ of the adjacent elementary zones z 1 and z 4 are made from the same sticker, and diodes 2 ₂ , 2 ₃ adjacent elementary zones z2 and z3 are made from another sticker, distinct from the previous one. The coupling waveguides of the zone zi have, at their respective coupling portions, an axial symmetry with respect to the line L14 with respect to the coupling waveguides of the zone Z4. It is the same for the coupling guides of the zone z2 vis-à-vis those of the zone z3 with respect to the line L23.

FIG. 6C schematically and partially illustrates another variant in which the same elementary zone comprises a laser diode Tx transmitter, and a photodiode receiver Rx. In this example, the transmitter Tx is identical to that described above and the receiver Rx comprises an array of photodiodes optically coupled to a waveguide, itself coupled to a demultiplexer, the waveguides and the demultiplexer being integrated into inside the receiving substrate. Tx transmitters and Rx receivers may include other photonic components, such as couplers to optical fibers.

The process of collectively producing the optoelectronic chips then comprises a step of reporting first pads, or vignettes, where each first vignette, made on the basis of a first semiconductor compound, extends over a set E of several elementary zones. adjacent. In this example, the same first vignette allows the realization of the laser diodes of a set E of the adjacent elementary zones zi2, Z13, Z22, Z23.

The method also includes a step of transferring second pads, or vignettes, of different nature, preferably performed simultaneously to the transfer step of the first pads. The second pads are made based on a second semiconductor compound, identical to or different from the first semiconductor compound, and reported on a set E 'of several adjacent elementary zones, this set E' being different from the set E but may comprise elementary areas common to the latter. In this example, the same second vignette allows the realization of photodiodes of a set E 'of adjacent elementary zones z2i, z22, Z31, Z32. It is therefore distinct from the set E but comprises, in common with the latter, the elementary zone z22.

[0090] Particular embodiments have just been described. Various variations and modifications will occur to those skilled in the art.

Thus, each optoelectronic chip may comprise an electroabsorption modulator, made on the basis of a third or different semiconductor compound. semiconductor compound of the laser diodes and / or photodiodes, and obtained from a third pad or vignette. As mentioned above, the third vignettes can be transferred to another set E "of several adjacent elementary zones, this set E" being distinct from the sets E and E 'but may comprise elementary zones common to the latter.

Furthermore, each first optoelectronic component, such as a laser diode, a photodiode or an electro-absorption modulator, may also be electrically connected to an integrated circuit present in the corresponding elementary zone. The integrated circuit thus comprises electrically conductive tracks located inside the receiving substrate, as well as an electrically conductive thin layer located on the surface of the receiving substrate on which the first optoelectronic component rests.

Claims

l. A method of collectively producing a plurality of optoelectronic chips (Pi, P2), comprising the steps of:

i) providing a reception substrate (1), comprising a plurality of so-called elementary zones (zi, z2) each intended to delimit an optoelectronic chip (Pi, P2), each elementary zone (zi, z2) comprising at least one said coupling waveguide (31, 32) integrated in the receiving substrate (1) for optically coupling to a first optoelectronic component (2 _X , 2 ₂ );

ii) carrying a plurality of studs (6) on the elementary zones (zi, z2), so that the studs (6) partially cover the coupling waveguides (31, 32);

iii) producing said first optoelectronic components (2 _X , 2 ₂ ) from said pads (6), so that each first optoelectronic component (2 _X , 2 ₂ ) is opposite at least one coupling waveguide (31, 32) of the corresponding elementary zone (zi, z2);

characterized in that, following the transfer step, each stud (6) extends over a set (E) of at least two adjacent elementary zones (zi, z2), so as to partially cover at least a coupling waveguide (31, 32) of each of said adjacent elementary zones (zi, z2). 2. Method according to claim 1, wherein, during the step of producing the first optoelectronic components, each of the first optoelectronic components (2 _X ,

2 ₂ ) made from the same pad (6) is located opposite one of the coupling waveguides (31, 32) adjacent elementary zones (zi, z2) of the same set (E).

3. Method according to claim 1 or 2, wherein, at least one first optoelectronic component (2 of a first elementary zone (zi) and at least one second optoelectronic component (2 ₂ ) of a second elementary zone (z2). adjacent to the first elementary zone (zi) and belonging to said same set (E), said first and second optoelectronic components (2 _X , 2 ₂ ) being made from one and the same pad (6) are respectively spaced apart from each other; an equal distance from a separation line (L12) forming a border common to said first and second adjacent elementary zones (zi,

Z2).

4. The method of claim 3, wherein said distance is less than όθθμηι.

5. The method of claim 3 or 4, wherein said first optoelectronic component (2 and said second optoelectronic component (2 ₂ ) are spaced from each other by a distance of less than 1.2 μηι.

6. Method according to any one of claims 1 to 5, wherein a first optoelectronic component (2 is located opposite a coupling portion (3e of a first coupling waveguide (3 of a first elementary zone (zi) of a set (E), and a second optoelectronic component (2 ₂ ) is located opposite a coupling portion (3e ₂ ) of a second coupling waveguide (32) d a second elementary zone (z2) adjacent to the first elementary zone (zi) and belonging to said same set (E), the first and second coupling waveguides (31, 32) extending from their parts coupling (3βι, 3e ₂ ) respectively, in parallel.

7. Method according to claim 6, wherein said first and second coupling waveguides (3 ₁ , 3 ₂ ) extend, from their respective coupling portions (3βι, 3e ₂ ), in opposite directions. one to the other.

The method according to claim 6, wherein said first and second coupling waveguides (31, 32) extend, from their respective coupling portions (3βι, 3e ₂ ), in parallel directions one to another.

The method according to any one of claims 6 to 8, wherein the first coupling waveguide (3 and the second waveguide (32) extend, from their coupling portions (3βι, 3e ₂ ) respectively, so as to present, vis-a-vis the other, an axial symmetry with respect to said line of separation (L12).

10. Method according to any one of claims 1 to 9, wherein each pad (6) extends over a set (E) of four elementary zones (zi, z2, z3, Z4) adjacent two by two.

11. Method according to any one of claims 1 to 10, wherein each pad (6) comprises a semiconductor portion (7) made from a semiconductor compound, and a growth substrate (8) from which is made by epitaxy the semiconductor portion (7).

12. The method of claim 11, comprising a step of removing the growth substrate (8), the latter being made of an alloy based on said semiconductor compound.

13. Method according to any one of claims 1 to 12, wherein each pad (6) comprises a semiconductor portion (7) made based on a III-V semiconductor compound.

The method of any one of claims 1 to 13, wherein the first optoelectronic component is a laser source, a photodiode or an electro-optic modulator.

The method according to any one of claims 1 to 14, wherein each elementary zone (zi, z2) of said set (E) comprises an array of several coupling waveguides (31, 32), and wherein, a network of several first optoelectronic components (2 _X , 2 ₂ ) is produced for each of the elementary zones (zi, z2) of said set (E), so that the first optoelectronic components (2 _X ; 2 ₂ ) of the same network respectively facing the corresponding coupling waveguides (3 ₁ ; 3 ₂ ).

16. Method according to any one of claims 1 to 15, comprising a step of transferring a plurality of first pads from which is made a plurality of laser diodes (2) and a step of reporting a plurality of second pads from which a plurality of photodiodes (10) or a plurality of electro-optical modulators are made.